hdl2v
/

qwen2.5-coder-32b-combined-verilog-vhdl-chisel-pymtl3

Text Generation

text-generation-inference

Model card Files Files and versions

qwen2.5-coder-32b-combined-verilog-vhdl-chisel-pymtl3 / model-00014-of-00014.safetensors

Commit History

Duplicate from rtl-llm/qwen-32b-everything

a77a108
verified

broberts commited on Jul 26