name
stringlengths 1
473k
| code
stringlengths 7
647k
| asm
stringlengths 4
3.39M
| file
stringlengths 8
196
|
|---|---|---|---|
diy::RegularLink<diy::Bounds<int>>::RegularLink()
|
RegularLink():
dim_(0), core_(0), bounds_(0) {}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
andq $0x0, 0x18(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, 0x8(%rdi)
movb 0x215aa(%rip), %al # 0x41480
leaq 0x207f3(%rip), %rax # 0x406d0
movq %rax, (%rdi)
andl $0x0, 0x20(%rdi)
leaq 0x30(%rdi), %rax
andl $0x0, 0x30(%rdi)
andq $0x0, 0x38(%rdi)
movq %rax, 0x40(%rdi)
movq %rax, 0x48(%rdi)
leaq 0x70(%rdi), %r15
movups %xmm0, 0x50(%rdi)
movups %xmm0, 0x60(%rdi)
movq %r15, %rdi
xorl %esi, %esi
callq 0x1dbf0
leaq 0xf0(%rbx), %rdi
xorl %esi, %esi
callq 0x1dbf0
xorps %xmm0, %xmm0
movups %xmm0, 0x1a0(%rbx)
movups %xmm0, 0x190(%rbx)
movups %xmm0, 0x180(%rbx)
movups %xmm0, 0x170(%rbx)
andq $0x0, 0x1b0(%rbx)
popq %rbx
popq %r14
popq %r15
retq
movq %rax, %r14
movq %r15, %rdi
callq 0x1dcd4
jmp 0x1ff5a
movq %rax, %r14
leaq 0x58(%rbx), %rdi
leaq 0x28(%rbx), %r15
callq 0x1e6f4
movq %r15, %rdi
callq 0x20194
movq %rbx, %rdi
callq 0x236a4
movq %r14, %rdi
callq 0x67d0
nop
|
/diatomic[P]diy/include/diy/link.hpp
|
diy::RegularLink<diy::Bounds<int>>::load(diy::BinaryBuffer&)
|
void load(BinaryBuffer& bb) override
{
Link::load(bb);
diy::load(bb, dim_);
diy::load(bb, dir_map_);
diy::load(bb, dir_vec_);
diy::load(bb, core_);
diy::load(bb, bounds_);
diy::load(bb, nbr_cores_);
diy::load(bb, nbr_bounds_);
diy::load(bb, wrap_);
}
|
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rdi), %rsi
movq %rbx, %rdi
callq 0x1e39a
leaq 0x20(%r14), %rsi
movq (%rbx), %rax
pushq $0x4
popq %rdx
movq %rbx, %rdi
callq *0x20(%rax)
leaq 0x28(%r14), %rsi
movq %rbx, %rdi
callq 0x2084a
leaq 0x58(%r14), %rsi
movq %rbx, %rdi
callq 0x1f690
leaq 0x70(%r14), %rsi
movq %rbx, %rdi
callq 0x1eede
leaq 0xf0(%r14), %rsi
movq %rbx, %rdi
callq 0x1eede
leaq 0x170(%r14), %rsi
movq %rbx, %rdi
callq 0x20ce8
leaq 0x188(%r14), %rsi
movq %rbx, %rdi
callq 0x20ce8
addq $0x1a0, %r14 # imm = 0x1A0
movq %rbx, %rdi
movq %r14, %rsi
addq $0x8, %rsp
popq %rbx
popq %r14
jmp 0x1f690
|
/diatomic[P]diy/include/diy/link.hpp
|
diy::Serialization<std::vector<diy::Bounds<int>, std::allocator<diy::Bounds<int>>>>::save(diy::BinaryBuffer&, std::vector<diy::Bounds<int>, std::allocator<diy::Bounds<int>>> const&)
|
static void save(BinaryBuffer& bb, const Vector& v)
{
size_t s = v.size();
diy::save(bb, s);
if (s > 0)
diy::save(bb, &v[0], v.size());
}
|
pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq 0x8(%rsi), %rax
subq (%rsi), %rax
sarq $0x7, %rax
leaq 0x8(%rsp), %r15
movq %rax, (%r15)
movq (%rdi), %rax
pushq $0x8
popq %rdx
movq %r15, %rsi
callq *0x10(%rax)
cmpq $0x0, (%r15)
je 0x20814
movq (%r14), %rsi
movq 0x8(%r14), %rdx
subq %rsi, %rdx
sarq $0x7, %rdx
movq %rbx, %rdi
callq 0x2081e
addq $0x10, %rsp
popq %rbx
popq %r14
popq %r15
retq
|
/diatomic[P]diy/include/diy/serialization.hpp
|
diy::Serialization<std::vector<diy::Bounds<int>, std::allocator<diy::Bounds<int>>>>::load(diy::BinaryBuffer&, std::vector<diy::Bounds<int>, std::allocator<diy::Bounds<int>>>&)
|
static void load(BinaryBuffer& bb, Vector& v)
{
size_t s;
diy::load(bb, s);
v.resize(s, U());
if (s > 0)
diy::load(bb, &v[0], s);
}
|
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x88, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq (%rdi), %rax
movq %rsp, %r15
pushq $0x8
popq %rdx
movq %r15, %rsi
callq *0x20(%rax)
movq (%r15), %r15
leaq 0x8(%rsp), %r12
movq %r12, %rdi
callq 0x20da2
movq %r14, %rdi
movq %r15, %rsi
movq %r12, %rdx
callq 0x20d6c
leaq 0x8(%rsp), %rdi
callq 0x1dcd4
movq (%rsp), %rdx
testq %rdx, %rdx
je 0x20d47
movq (%r14), %rsi
movq %rbx, %rdi
callq 0x20da9
addq $0x88, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
movq %rax, %rbx
leaq 0x8(%rsp), %rdi
callq 0x1dcd4
movq %rbx, %rdi
callq 0x67d0
nop
|
/diatomic[P]diy/include/diy/serialization.hpp
|
diy::RegularLink<diy::Bounds<float>>::RegularLink()
|
RegularLink():
dim_(0), core_(0), bounds_(0) {}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
andq $0x0, 0x18(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, 0x8(%rdi)
movb 0x202dc(%rip), %al # 0x41490
leaq 0x1f5c5(%rip), %rax # 0x40780
movq %rax, (%rdi)
andl $0x0, 0x20(%rdi)
leaq 0x30(%rdi), %rax
andl $0x0, 0x30(%rdi)
andq $0x0, 0x38(%rdi)
movq %rax, 0x40(%rdi)
movq %rax, 0x48(%rdi)
leaq 0x70(%rdi), %r15
movups %xmm0, 0x50(%rdi)
movups %xmm0, 0x60(%rdi)
movq %r15, %rdi
xorl %esi, %esi
callq 0x2125e
leaq 0xf0(%rbx), %rdi
xorl %esi, %esi
callq 0x2125e
xorps %xmm0, %xmm0
movups %xmm0, 0x1a0(%rbx)
movups %xmm0, 0x190(%rbx)
movups %xmm0, 0x180(%rbx)
movups %xmm0, 0x170(%rbx)
andq $0x0, 0x1b0(%rbx)
popq %rbx
popq %r14
popq %r15
retq
movq %rax, %r14
movq %r15, %rdi
callq 0x2129e
jmp 0x21238
movq %rax, %r14
leaq 0x58(%rbx), %rdi
leaq 0x28(%rbx), %r15
callq 0x1e6f4
movq %r15, %rdi
callq 0x20194
movq %rbx, %rdi
callq 0x236a4
movq %r14, %rdi
callq 0x67d0
nop
|
/diatomic[P]diy/include/diy/link.hpp
|
diy::RegularLink<diy::Bounds<float>>::save(diy::BinaryBuffer&) const
|
void save(BinaryBuffer& bb) const override
{
Link::save(bb);
diy::save(bb, dim_);
diy::save(bb, dir_map_);
diy::save(bb, dir_vec_);
diy::save(bb, core_);
diy::save(bb, bounds_);
diy::save(bb, nbr_cores_);
diy::save(bb, nbr_bounds_);
diy::save(bb, wrap_);
}
|
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rdi), %rsi
movq %rbx, %rdi
callq 0x1e348
leaq 0x20(%r14), %rsi
movq (%rbx), %rax
pushq $0x4
popq %rdx
movq %rbx, %rdi
callq *0x10(%rax)
leaq 0x28(%r14), %rsi
movq %rbx, %rdi
callq 0x2074a
leaq 0x58(%r14), %rsi
movq %rbx, %rdi
callq 0x1ed18
leaq 0x70(%r14), %rsi
movq %rbx, %rdi
callq 0x219f8
leaq 0xf0(%r14), %rsi
movq %rbx, %rdi
callq 0x219f8
leaq 0x170(%r14), %rsi
movq %rbx, %rdi
callq 0x21a72
leaq 0x188(%r14), %rsi
movq %rbx, %rdi
callq 0x21a72
addq $0x1a0, %r14 # imm = 0x1A0
movq %rbx, %rdi
movq %r14, %rsi
addq $0x8, %rsp
popq %rbx
popq %r14
jmp 0x1ed18
|
/diatomic[P]diy/include/diy/link.hpp
|
itlib::small_vector<float, 4ul, 0ul, std::allocator<float>>::~small_vector()
|
~small_vector()
{
clear();
if (m_dynamic_data)
{
atraits::deallocate(get_alloc(), m_dynamic_data, m_dynamic_capacity);
}
}
|
movq %rdi, %rax
movq 0x8(%rdi), %rcx
movq 0x38(%rdi), %rdi
movq %rcx, 0x10(%rax)
testq %rdi, %rdi
je 0x214ff
movq 0x30(%rax), %rsi
shlq $0x2, %rsi
jmp 0x6450
retq
|
/diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp
|
itlib::small_vector<float, 4ul, 0ul, std::allocator<float>>::choose_data(unsigned long)
|
T* choose_data(size_t desired_capacity)
{
if (m_begin == m_dynamic_data)
{
// we're at the dyn buffer, so see if it needs resize or revert to static
if (desired_capacity > m_dynamic_capacity)
{
while (m_dynamic_capacity < desired_capacity)
{
// grow by roughly 1.5
m_dynamic_capacity *= 3;
++m_dynamic_capacity;
m_dynamic_capacity /= 2;
}
m_dynamic_data = atraits::allocate(get_alloc(), m_dynamic_capacity);
return m_dynamic_data;
}
else if (desired_capacity < RevertToStaticSize)
{
// we're reverting to the static buffer
return static_begin_ptr();
}
else
{
// if the capacity and we don't revert to static, just do nothing
return m_dynamic_data;
}
}
else
{
assert(m_begin == static_begin_ptr()); // corrupt begin ptr?
if (desired_capacity > StaticCapacity)
{
// we must move to dyn memory
// see if we have enough
if (desired_capacity > m_dynamic_capacity)
{
// we need to allocate more
// we don't have anything to destroy, so we can also deallocate the buffer
if (m_dynamic_data)
{
atraits::deallocate(get_alloc(), m_dynamic_data, m_dynamic_capacity);
}
m_dynamic_capacity = desired_capacity;
m_dynamic_data = atraits::allocate(get_alloc(), m_dynamic_capacity);
}
return m_dynamic_data;
}
else
{
// we have enough capacity as it is
return static_begin_ptr();
}
}
}
|
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movq 0x38(%rdi), %rax
cmpq %rax, 0x8(%rdi)
je 0x215d8
cmpq $0x5, %r14
jb 0x21604
movq 0x30(%rbx), %rsi
cmpq %r14, %rsi
jae 0x2160b
testq %rax, %rax
je 0x215cc
shlq $0x2, %rsi
movq %rax, %rdi
callq 0x6450
movq %r14, 0x30(%rbx)
movq %rbx, %rdi
movq %r14, %rsi
jmp 0x215f9
movq 0x30(%rbx), %rsi
cmpq %r14, %rsi
jb 0x215f1
jmp 0x2160b
leaq (%rsi,%rsi,2), %rsi
incq %rsi
shrq %rsi
movq %rsi, 0x30(%rbx)
cmpq %r14, %rsi
jb 0x215e3
movq %rbx, %rdi
callq 0x21614
movq %rax, 0x38(%rbx)
jmp 0x2160b
addq $0x20, %rbx
movq %rbx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
nop
|
/diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp
|
diy::Serialization<diy::DynamicPoint<float, 4ul>>::save(diy::BinaryBuffer&, diy::DynamicPoint<float, 4ul> const&)
|
static void save(BinaryBuffer& bb, const Point& p)
{
size_t s = p.size();
diy::save(bb, s);
if (s > 0)
diy::save(bb, &p[0], p.size());
}
|
pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq 0x10(%rsi), %rax
subq 0x8(%rsi), %rax
sarq $0x2, %rax
leaq 0x8(%rsp), %r15
movq %rax, (%r15)
movq (%rdi), %rax
pushq $0x8
popq %rdx
movq %r15, %rsi
callq *0x10(%rax)
cmpq $0x0, (%r15)
je 0x21a67
movq 0x8(%r14), %rsi
movq 0x10(%r14), %rdx
subq %rsi, %rdx
movq (%rbx), %rax
movq %rbx, %rdi
callq *0x10(%rax)
addq $0x10, %rsp
popq %rbx
popq %r14
popq %r15
retq
nop
|
/diatomic[P]diy/include/diy/dynamic-point.hpp
|
diy::Serialization<diy::DynamicPoint<float, 4ul>>::load(diy::BinaryBuffer&, diy::DynamicPoint<float, 4ul>&)
|
static void load(BinaryBuffer& bb, Point& p)
{
size_t s;
diy::load(bb, s);
p.resize(s);
if (s > 0)
diy::load(bb, &p[0], s);
}
|
pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq (%rdi), %rax
leaq 0x8(%rsp), %r15
pushq $0x8
popq %rdx
movq %r15, %rsi
callq *0x20(%rax)
movq (%r15), %rsi
movq %r14, %rdi
callq 0x21b66
movq (%r15), %rdx
testq %rdx, %rdx
je 0x21b5c
movq 0x8(%r14), %rsi
shlq $0x2, %rdx
movq (%rbx), %rax
movq %rbx, %rdi
callq *0x20(%rax)
addq $0x10, %rsp
popq %rbx
popq %r14
popq %r15
retq
|
/diatomic[P]diy/include/diy/dynamic-point.hpp
|
itlib::small_vector<float, 4ul, 0ul, std::allocator<float>>::small_vector(itlib::small_vector<float, 4ul, 0ul, std::allocator<float>>&&)
|
small_vector(small_vector&& v) noexcept
: m_alloc(std::move(v.get_alloc()))
, m_capacity(v.m_capacity)
, m_dynamic_capacity(v.m_dynamic_capacity)
, m_dynamic_data(v.m_dynamic_data)
{
if (v.m_begin == v.static_begin_ptr())
{
m_begin = m_end = static_begin_ptr();
for (auto p = v.m_begin; p != v.m_end; ++p)
{
atraits::construct(get_alloc(), m_end, std::move(*p));
++m_end;
}
v.clear();
}
else
{
m_begin = v.m_begin;
m_end = v.m_end;
}
v.m_dynamic_capacity = 0;
v.m_dynamic_data = nullptr;
v.m_begin = v.m_end = v.static_begin_ptr();
v.m_capacity = StaticCapacity;
}
|
movq 0x18(%rsi), %rax
movq %rax, 0x18(%rdi)
leaq 0x30(%rsi), %rax
movq 0x30(%rsi), %rcx
movq %rcx, 0x30(%rdi)
movq 0x38(%rsi), %rcx
movq %rcx, 0x38(%rdi)
movq 0x8(%rsi), %rdx
leaq 0x20(%rsi), %rcx
cmpq %rcx, %rdx
je 0x2202c
movq %rdx, 0x8(%rdi)
movq 0x10(%rsi), %rdx
movq %rdx, 0x10(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
movq %rcx, 0x10(%rsi)
movq %rcx, 0x8(%rsi)
movq $0x4, 0x18(%rsi)
retq
leaq 0x20(%rdi), %rdx
movq %rdx, 0x10(%rdi)
movq %rdx, 0x8(%rdi)
movq 0x8(%rsi), %rdx
leaq 0x24(%rdi), %r8
cmpq 0x10(%rsi), %rdx
je 0x22015
movss (%rdx), %xmm0
movss %xmm0, -0x4(%r8)
movq %r8, 0x10(%rdi)
addq $0x4, %rdx
addq $0x4, %r8
jmp 0x22040
|
/diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp
|
diy::RegularLink<diy::Bounds<double>>::RegularLink()
|
RegularLink():
dim_(0), core_(0), bounds_(0) {}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
andq $0x0, 0x18(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, 0x8(%rdi)
movb 0x1f240(%rip), %al # 0x414a0
leaq 0x1e5c9(%rip), %rax # 0x40830
movq %rax, (%rdi)
andl $0x0, 0x20(%rdi)
leaq 0x30(%rdi), %rax
andl $0x0, 0x30(%rdi)
andq $0x0, 0x38(%rdi)
movq %rax, 0x40(%rdi)
movq %rax, 0x48(%rdi)
leaq 0x70(%rdi), %r15
movups %xmm0, 0x50(%rdi)
movups %xmm0, 0x60(%rdi)
movq %r15, %rdi
xorl %esi, %esi
callq 0x2230a
leaq 0x110(%rbx), %rdi
xorl %esi, %esi
callq 0x2230a
xorps %xmm0, %xmm0
movups %xmm0, 0x1e0(%rbx)
movups %xmm0, 0x1d0(%rbx)
movups %xmm0, 0x1c0(%rbx)
movups %xmm0, 0x1b0(%rbx)
andq $0x0, 0x1f0(%rbx)
popq %rbx
popq %r14
popq %r15
retq
movq %rax, %r14
movq %r15, %rdi
callq 0x2234a
jmp 0x222e4
movq %rax, %r14
leaq 0x58(%rbx), %rdi
leaq 0x28(%rbx), %r15
callq 0x1e6f4
movq %r15, %rdi
callq 0x20194
movq %rbx, %rdi
callq 0x236a4
movq %r14, %rdi
callq 0x67d0
nop
|
/diatomic[P]diy/include/diy/link.hpp
|
diy::RegularLink<diy::Bounds<double>>::load(diy::BinaryBuffer&)
|
void load(BinaryBuffer& bb) override
{
Link::load(bb);
diy::load(bb, dim_);
diy::load(bb, dir_map_);
diy::load(bb, dir_vec_);
diy::load(bb, core_);
diy::load(bb, bounds_);
diy::load(bb, nbr_cores_);
diy::load(bb, nbr_bounds_);
diy::load(bb, wrap_);
}
|
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rdi), %rsi
movq %rbx, %rdi
callq 0x1e39a
leaq 0x20(%r14), %rsi
movq (%rbx), %rax
pushq $0x4
popq %rdx
movq %rbx, %rdi
callq *0x20(%rax)
leaq 0x28(%r14), %rsi
movq %rbx, %rdi
callq 0x2084a
leaq 0x58(%r14), %rsi
movq %rbx, %rdi
callq 0x1f690
leaq 0x70(%r14), %rsi
movq %rbx, %rdi
callq 0x22bd6
leaq 0x110(%r14), %rsi
movq %rbx, %rdi
callq 0x22bd6
leaq 0x1b0(%r14), %rsi
movq %rbx, %rdi
callq 0x22d04
leaq 0x1c8(%r14), %rsi
movq %rbx, %rdi
callq 0x22d04
addq $0x1e0, %r14 # imm = 0x1E0
movq %rbx, %rdi
movq %r14, %rsi
addq $0x8, %rsp
popq %rbx
popq %r14
jmp 0x1f690
|
/diatomic[P]diy/include/diy/link.hpp
|
itlib::small_vector<double, 4ul, 0ul, std::allocator<double>>::assign_impl(unsigned long, double const&)
|
void assign_impl(size_type count, const T& value)
{
assert(m_begin);
assert(m_begin == m_end);
m_begin = m_end = choose_data(count);
for (size_type i = 0; i < count; ++i)
{
atraits::construct(get_alloc(), m_end, value);
++m_end;
}
update_capacity();
}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %rbx
callq 0x2264a
movq %rax, 0x10(%rbx)
movq %rax, 0x8(%rbx)
leaq 0x8(%rax), %rcx
subq $0x1, %r15
jb 0x2262d
movsd (%r14), %xmm0
movsd %xmm0, -0x8(%rcx)
movq %rcx, 0x10(%rbx)
addq $0x8, %rcx
jmp 0x22613
leaq 0x20(%rbx), %rcx
cmpq %rcx, %rax
je 0x2263c
movq 0x40(%rbx), %rax
jmp 0x2263f
pushq $0x4
popq %rax
movq %rax, 0x18(%rbx)
popq %rbx
popq %r14
popq %r15
retq
nop
|
/diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp
|
itlib::small_vector<double, 4ul, 0ul, std::allocator<double>>::small_vector(itlib::small_vector<double, 4ul, 0ul, std::allocator<double>> const&, std::allocator<double> const&)
|
small_vector(const small_vector& v, const Alloc& alloc)
: m_alloc(alloc)
, m_dynamic_capacity(0)
, m_dynamic_data(nullptr)
{
if (v.size() > StaticCapacity)
{
m_dynamic_capacity = v.size();
m_begin = m_end = m_dynamic_data = atraits::allocate(get_alloc(), m_dynamic_capacity);
m_capacity = v.size();
}
else
{
m_begin = m_end = static_begin_ptr();
m_capacity = StaticCapacity;
}
for (auto p = v.m_begin; p != v.m_end; ++p)
{
atraits::construct(get_alloc(), m_end, *p);
++m_end;
}
}
|
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
xorps %xmm0, %xmm0
movups %xmm0, 0x40(%rdi)
movq 0x10(%rsi), %rsi
subq 0x8(%rbx), %rsi
sarq $0x3, %rsi
cmpq $0x5, %rsi
jb 0x229ae
movq %rsi, 0x40(%r14)
movq %r14, %rdi
callq 0x226c6
movq %rax, 0x48(%r14)
movq %rax, 0x10(%r14)
movq %rax, 0x8(%r14)
movq 0x8(%rbx), %rcx
movq 0x10(%rbx), %rdx
subq %rcx, %rdx
sarq $0x3, %rdx
jmp 0x229c1
leaq 0x20(%r14), %rax
movq %rax, 0x10(%r14)
movq %rax, 0x8(%r14)
movq 0x8(%rbx), %rcx
pushq $0x4
popq %rdx
movq %rdx, 0x18(%r14)
addq $0x8, %rax
cmpq 0x10(%rbx), %rcx
je 0x229e2
movsd (%rcx), %xmm0
movsd %xmm0, -0x8(%rax)
movq %rax, 0x10(%r14)
addq $0x8, %rcx
jmp 0x229c5
addq $0x8, %rsp
popq %rbx
popq %r14
retq
|
/diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp
|
itlib::small_vector<double, 4ul, 0ul, std::allocator<double>>::resize(unsigned long)
|
void resize(size_type n)
{
auto new_buf = choose_data(n);
if (new_buf == m_begin)
{
// no special transfers needed
auto new_end = m_begin + n;
while (m_end > new_end)
{
atraits::destroy(get_alloc(), --m_end);
}
while (new_end > m_end)
{
atraits::construct(get_alloc(), m_end++);
}
}
else
{
// we need to transfer the elements into the new buffer
const auto s = size();
const auto num_transfer = n < s ? n : s;
for (size_type i = 0; i < num_transfer; ++i)
{
atraits::construct(get_alloc(), new_buf + i, std::move(*(m_begin + i)));
}
// free obsoletes
for (size_type i = 0; i < s; ++i)
{
atraits::destroy(get_alloc(), m_begin + i);
}
// construct new elements
for (size_type i = num_transfer; i < n; ++i)
{
atraits::construct(get_alloc(), new_buf + i);
}
if (new_buf == static_begin_ptr())
{
m_capacity = StaticCapacity;
}
else
{
if (m_begin != static_begin_ptr())
{
// we've moved from dyn to dyn memory, so deallocate the old one
atraits::deallocate(get_alloc(), m_begin, m_capacity);
}
m_capacity = m_dynamic_capacity;
}
m_begin = new_buf;
m_end = new_buf + n;
}
}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %r14
movq %rdi, %rbx
callq 0x2264a
movq 0x8(%rbx), %rdi
cmpq %rdi, %rax
je 0x22cbd
movq %rax, %r15
movq 0x10(%rbx), %rax
subq %rdi, %rax
sarq $0x3, %rax
cmpq %r14, %rax
cmovaeq %r14, %rax
xorl %ecx, %ecx
cmpq %rcx, %rax
je 0x22c97
movsd (%rdi,%rcx,8), %xmm0
movsd %xmm0, (%r15,%rcx,8)
incq %rcx
jmp 0x22c7a
andq $0x0, (%r15,%rax,8)
incq %rax
cmpq %rax, %r14
jne 0x22c8f
leaq 0x20(%rbx), %rax
cmpq %rax, %r15
je 0x22cea
cmpq %rax, %rdi
je 0x22cb7
movq 0x18(%rbx), %rsi
shlq $0x3, %rsi
callq 0x6450
movq 0x40(%rbx), %rax
jmp 0x22ced
leaq (%rdi,%r14,8), %rax
movq 0x10(%rbx), %rcx
cmpq %rax, %rcx
jbe 0x22ce3
addq $-0x8, %rcx
movq %rcx, 0x10(%rbx)
jmp 0x22cc5
leaq 0x8(%rcx), %rdx
movq %rdx, 0x10(%rbx)
andq $0x0, (%rcx)
movq %rdx, %rcx
cmpq %rcx, %rax
ja 0x22cd4
jmp 0x22cfd
pushq $0x4
popq %rax
movq %rax, 0x18(%rbx)
movq %r15, 0x8(%rbx)
leaq (%r15,%r14,8), %rax
movq %rax, 0x10(%rbx)
popq %rbx
popq %r14
popq %r15
retq
nop
|
/diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp
|
itlib::small_vector<double, 4ul, 0ul, std::allocator<double>>::small_vector(itlib::small_vector<double, 4ul, 0ul, std::allocator<double>>&&)
|
small_vector(small_vector&& v) noexcept
: m_alloc(std::move(v.get_alloc()))
, m_capacity(v.m_capacity)
, m_dynamic_capacity(v.m_dynamic_capacity)
, m_dynamic_data(v.m_dynamic_data)
{
if (v.m_begin == v.static_begin_ptr())
{
m_begin = m_end = static_begin_ptr();
for (auto p = v.m_begin; p != v.m_end; ++p)
{
atraits::construct(get_alloc(), m_end, std::move(*p));
++m_end;
}
v.clear();
}
else
{
m_begin = v.m_begin;
m_end = v.m_end;
}
v.m_dynamic_capacity = 0;
v.m_dynamic_data = nullptr;
v.m_begin = v.m_end = v.static_begin_ptr();
v.m_capacity = StaticCapacity;
}
|
movq 0x18(%rsi), %rax
movq %rax, 0x18(%rdi)
leaq 0x40(%rsi), %rax
movq 0x40(%rsi), %rcx
movq %rcx, 0x40(%rdi)
movq 0x48(%rsi), %rcx
movq %rcx, 0x48(%rdi)
movq 0x8(%rsi), %rdx
leaq 0x20(%rsi), %rcx
cmpq %rcx, %rdx
je 0x23150
movq %rdx, 0x8(%rdi)
movq 0x10(%rsi), %rdx
movq %rdx, 0x10(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
movq %rcx, 0x10(%rsi)
movq %rcx, 0x8(%rsi)
movq $0x4, 0x18(%rsi)
retq
leaq 0x20(%rdi), %rdx
movq %rdx, 0x10(%rdi)
movq %rdx, 0x8(%rdi)
movq 0x8(%rsi), %rdx
leaq 0x28(%rdi), %r8
cmpq 0x10(%rsi), %rdx
je 0x23139
movsd (%rdx), %xmm0
movsd %xmm0, -0x8(%r8)
movq %r8, 0x10(%rdi)
addq $0x8, %rdx
addq $0x8, %r8
jmp 0x23164
|
/diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp
|
diy::RegularLink<diy::Bounds<long>>::RegularLink()
|
RegularLink():
dim_(0), core_(0), bounds_(0) {}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
andq $0x0, 0x18(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, 0x8(%rdi)
movb 0x1e108(%rip), %al # 0x414b0
leaq 0x1d531(%rip), %rax # 0x408e0
movq %rax, (%rdi)
andl $0x0, 0x20(%rdi)
leaq 0x30(%rdi), %rax
andl $0x0, 0x30(%rdi)
andq $0x0, 0x38(%rdi)
movq %rax, 0x40(%rdi)
movq %rax, 0x48(%rdi)
leaq 0x70(%rdi), %r15
movups %xmm0, 0x50(%rdi)
movups %xmm0, 0x60(%rdi)
movq %r15, %rdi
xorl %esi, %esi
callq 0x23452
leaq 0x110(%rbx), %rdi
xorl %esi, %esi
callq 0x23452
xorps %xmm0, %xmm0
movups %xmm0, 0x1e0(%rbx)
movups %xmm0, 0x1d0(%rbx)
movups %xmm0, 0x1c0(%rbx)
movups %xmm0, 0x1b0(%rbx)
andq $0x0, 0x1f0(%rbx)
popq %rbx
popq %r14
popq %r15
retq
movq %rax, %r14
movq %r15, %rdi
callq 0x23490
jmp 0x2342c
movq %rax, %r14
leaq 0x58(%rbx), %rdi
leaq 0x28(%rbx), %r15
callq 0x1e6f4
movq %r15, %rdi
callq 0x20194
movq %rbx, %rdi
callq 0x236a4
movq %r14, %rdi
callq 0x67d0
nop
|
/diatomic[P]diy/include/diy/link.hpp
|
diy::RegularLink<diy::Bounds<long>>::load(diy::BinaryBuffer&)
|
void load(BinaryBuffer& bb) override
{
Link::load(bb);
diy::load(bb, dim_);
diy::load(bb, dir_map_);
diy::load(bb, dir_vec_);
diy::load(bb, core_);
diy::load(bb, bounds_);
diy::load(bb, nbr_cores_);
diy::load(bb, nbr_bounds_);
diy::load(bb, wrap_);
}
|
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rdi), %rsi
movq %rbx, %rdi
callq 0x1e39a
leaq 0x20(%r14), %rsi
movq (%rbx), %rax
pushq $0x4
popq %rdx
movq %rbx, %rdi
callq *0x20(%rax)
leaq 0x28(%r14), %rsi
movq %rbx, %rdi
callq 0x2084a
leaq 0x58(%r14), %rsi
movq %rbx, %rdi
callq 0x1f690
leaq 0x70(%r14), %rsi
movq %rbx, %rdi
callq 0x23d2c
leaq 0x110(%r14), %rsi
movq %rbx, %rdi
callq 0x23d2c
leaq 0x1b0(%r14), %rsi
movq %rbx, %rdi
callq 0x23e56
leaq 0x1c8(%r14), %rsi
movq %rbx, %rdi
callq 0x23e56
addq $0x1e0, %r14 # imm = 0x1E0
movq %rbx, %rdi
movq %r14, %rsi
addq $0x8, %rsp
popq %rbx
popq %r14
jmp 0x1f690
|
/diatomic[P]diy/include/diy/link.hpp
|
itlib::small_vector<long, 4ul, 0ul, std::allocator<long>>::assign_impl(unsigned long, long const&)
|
void assign_impl(size_type count, const T& value)
{
assert(m_begin);
assert(m_begin == m_end);
m_begin = m_end = choose_data(count);
for (size_type i = 0; i < count; ++i)
{
atraits::construct(get_alloc(), m_end, value);
++m_end;
}
update_capacity();
}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %rbx
callq 0x237a2
movq %rax, 0x10(%rbx)
movq %rax, 0x8(%rbx)
leaq 0x8(%rax), %rcx
subq $0x1, %r15
jb 0x23786
movq (%r14), %rdx
movq %rdx, -0x8(%rcx)
movq %rcx, 0x10(%rbx)
addq $0x8, %rcx
jmp 0x2376f
leaq 0x20(%rbx), %rcx
cmpq %rcx, %rax
je 0x23795
movq 0x40(%rbx), %rax
jmp 0x23798
pushq $0x4
popq %rax
movq %rax, 0x18(%rbx)
popq %rbx
popq %r14
popq %r15
retq
|
/diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp
|
itlib::small_vector<long, 4ul, 0ul, std::allocator<long>>::small_vector(itlib::small_vector<long, 4ul, 0ul, std::allocator<long>> const&, std::allocator<long> const&)
|
small_vector(const small_vector& v, const Alloc& alloc)
: m_alloc(alloc)
, m_dynamic_capacity(0)
, m_dynamic_data(nullptr)
{
if (v.size() > StaticCapacity)
{
m_dynamic_capacity = v.size();
m_begin = m_end = m_dynamic_data = atraits::allocate(get_alloc(), m_dynamic_capacity);
m_capacity = v.size();
}
else
{
m_begin = m_end = static_begin_ptr();
m_capacity = StaticCapacity;
}
for (auto p = v.m_begin; p != v.m_end; ++p)
{
atraits::construct(get_alloc(), m_end, *p);
++m_end;
}
}
|
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
xorps %xmm0, %xmm0
movups %xmm0, 0x40(%rdi)
movq 0x10(%rsi), %rsi
subq 0x8(%rbx), %rsi
sarq $0x3, %rsi
cmpq $0x5, %rsi
jb 0x23b06
movq %rsi, 0x40(%r14)
movq %r14, %rdi
callq 0x2381e
movq %rax, 0x48(%r14)
movq %rax, 0x10(%r14)
movq %rax, 0x8(%r14)
movq 0x8(%rbx), %rcx
movq 0x10(%rbx), %rdx
subq %rcx, %rdx
sarq $0x3, %rdx
jmp 0x23b19
leaq 0x20(%r14), %rax
movq %rax, 0x10(%r14)
movq %rax, 0x8(%r14)
movq 0x8(%rbx), %rcx
pushq $0x4
popq %rdx
movq %rdx, 0x18(%r14)
addq $0x8, %rax
cmpq 0x10(%rbx), %rcx
je 0x23b38
movq (%rcx), %rdx
movq %rdx, -0x8(%rax)
movq %rax, 0x10(%r14)
addq $0x8, %rcx
jmp 0x23b1d
addq $0x8, %rsp
popq %rbx
popq %r14
retq
|
/diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp
|
diy::Serialization<std::vector<diy::Bounds<long>, std::allocator<diy::Bounds<long>>>>::save(diy::BinaryBuffer&, std::vector<diy::Bounds<long>, std::allocator<diy::Bounds<long>>> const&)
|
static void save(BinaryBuffer& bb, const Vector& v)
{
size_t s = v.size();
diy::save(bb, s);
if (s > 0)
diy::save(bb, &v[0], v.size());
}
|
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movq 0x8(%rsi), %rax
subq (%rsi), %rax
movl $0xa0, %r12d
cqto
idivq %r12
movq %rsp, %r15
movq %rax, (%r15)
movq (%rdi), %rax
pushq $0x8
popq %rdx
movq %r15, %rsi
callq *0x10(%rax)
cmpq $0x0, (%r15)
je 0x23cf2
movq (%r14), %rsi
movq 0x8(%r14), %rax
subq %rsi, %rax
cqto
idivq %r12
movq %rbx, %rdi
movq %rax, %rdx
callq 0x23cfe
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
|
/diatomic[P]diy/include/diy/serialization.hpp
|
itlib::small_vector<long, 4ul, 0ul, std::allocator<long>>::resize(unsigned long)
|
void resize(size_type n)
{
auto new_buf = choose_data(n);
if (new_buf == m_begin)
{
// no special transfers needed
auto new_end = m_begin + n;
while (m_end > new_end)
{
atraits::destroy(get_alloc(), --m_end);
}
while (new_end > m_end)
{
atraits::construct(get_alloc(), m_end++);
}
}
else
{
// we need to transfer the elements into the new buffer
const auto s = size();
const auto num_transfer = n < s ? n : s;
for (size_type i = 0; i < num_transfer; ++i)
{
atraits::construct(get_alloc(), new_buf + i, std::move(*(m_begin + i)));
}
// free obsoletes
for (size_type i = 0; i < s; ++i)
{
atraits::destroy(get_alloc(), m_begin + i);
}
// construct new elements
for (size_type i = num_transfer; i < n; ++i)
{
atraits::construct(get_alloc(), new_buf + i);
}
if (new_buf == static_begin_ptr())
{
m_capacity = StaticCapacity;
}
else
{
if (m_begin != static_begin_ptr())
{
// we've moved from dyn to dyn memory, so deallocate the old one
atraits::deallocate(get_alloc(), m_begin, m_capacity);
}
m_capacity = m_dynamic_capacity;
}
m_begin = new_buf;
m_end = new_buf + n;
}
}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %r14
movq %rdi, %rbx
callq 0x237a2
movq 0x8(%rbx), %rdi
cmpq %rdi, %rax
je 0x23e10
movq %rax, %r15
movq 0x10(%rbx), %rax
subq %rdi, %rax
sarq $0x3, %rax
cmpq %r14, %rax
cmovaeq %r14, %rax
xorl %ecx, %ecx
cmpq %rcx, %rax
je 0x23dea
movq (%rdi,%rcx,8), %rdx
movq %rdx, (%r15,%rcx,8)
incq %rcx
jmp 0x23dd0
andq $0x0, (%r15,%rax,8)
incq %rax
cmpq %rax, %r14
jne 0x23de2
leaq 0x20(%rbx), %rax
cmpq %rax, %r15
je 0x23e3d
cmpq %rax, %rdi
je 0x23e0a
movq 0x18(%rbx), %rsi
shlq $0x3, %rsi
callq 0x6450
movq 0x40(%rbx), %rax
jmp 0x23e40
leaq (%rdi,%r14,8), %rax
movq 0x10(%rbx), %rcx
cmpq %rax, %rcx
jbe 0x23e36
addq $-0x8, %rcx
movq %rcx, 0x10(%rbx)
jmp 0x23e18
leaq 0x8(%rcx), %rdx
movq %rdx, 0x10(%rbx)
andq $0x0, (%rcx)
movq %rdx, %rcx
cmpq %rcx, %rax
ja 0x23e27
jmp 0x23e50
pushq $0x4
popq %rax
movq %rax, 0x18(%rbx)
movq %r15, 0x8(%rbx)
leaq (%r15,%r14,8), %rax
movq %rax, 0x10(%rbx)
popq %rbx
popq %r14
popq %r15
retq
|
/diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp
|
opts::OptionContainer<int>::OptionContainer(char, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, int&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&)
|
OptionContainer(char s_,
const std::string& l_,
T& var_,
const std::string& help_,
const std::string& type_ = Traits<T>::type_string()):
BasicOption(s_, l_, default_value(var_), type_, help_),
var(&var_) {}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x80, %rsp
movq %r9, %r12
movq %r8, %r15
movq %rcx, %rbx
movl %esi, %ebp
movq %rdi, %r14
leaq 0x60(%rsp), %rdi
movq %rdx, %rsi
callq 0x65e0
leaq 0x40(%rsp), %rdi
movq %rbx, %rsi
callq 0x24d16
leaq 0x20(%rsp), %rdi
movq %r12, %rsi
callq 0x65e0
movq %rsp, %rdi
movq %r15, %rsi
callq 0x65e0
movsbl %bpl, %esi
leaq 0x60(%rsp), %rdx
leaq 0x40(%rsp), %rcx
leaq 0x20(%rsp), %r8
movq %rsp, %r9
movq %r14, %rdi
callq 0x24d7c
movq %rsp, %rdi
callq 0x6230
leaq 0x20(%rsp), %rdi
callq 0x6230
leaq 0x40(%rsp), %rdi
callq 0x6230
leaq 0x60(%rsp), %rdi
callq 0x6230
leaq 0x1bca4(%rip), %rax # 0x40960
movq %rax, (%r14)
movq %rbx, 0x90(%r14)
addq $0x80, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
movq %rsp, %rdi
callq 0x6230
jmp 0x24ce6
movq %rax, %rbx
leaq 0x20(%rsp), %rdi
callq 0x6230
jmp 0x24cf5
movq %rax, %rbx
leaq 0x40(%rsp), %rdi
callq 0x6230
jmp 0x24d04
movq %rax, %rbx
leaq 0x60(%rsp), %rdi
callq 0x6230
movq %rbx, %rdi
callq 0x67d0
|
/diatomic[P]diy/examples/opts.h
|
backward::SignalHandling::make_default_signals()
|
static std::vector<int> make_default_signals() {
const int posix_signals[] = {
// Signals for which the default action is "Core".
SIGABRT, // Abort signal from abort(3)
SIGBUS, // Bus error (bad memory access)
SIGFPE, // Floating point exception
SIGILL, // Illegal Instruction
SIGIOT, // IOT trap. A synonym for SIGABRT
SIGQUIT, // Quit from keyboard
SIGSEGV, // Invalid memory reference
SIGSYS, // Bad argument to routine (SVr4)
SIGTRAP, // Trace/breakpoint trap
SIGXCPU, // CPU time limit exceeded (4.2BSD)
SIGXFSZ, // File size limit exceeded (4.2BSD)
#if defined(BACKWARD_SYSTEM_DARWIN)
SIGEMT, // emulation instruction executed
#endif
};
return std::vector<int>(posix_signals,
posix_signals +
sizeof posix_signals / sizeof posix_signals[0]);
}
|
pushq %rbx
subq $0x40, %rsp
movq %rdi, %rbx
movups 0x4641(%rip), %xmm0 # 0x29bcc
leaq 0x3c(%rsp), %rdx
movups %xmm0, -0x10(%rdx)
movaps 0x4625(%rip), %xmm0 # 0x29bc0
movaps %xmm0, -0x1c(%rdx)
movaps 0x460a(%rip), %xmm0 # 0x29bb0
movaps %xmm0, -0x2c(%rdx)
leaq 0x10(%rsp), %rsi
leaq 0xf(%rsp), %rcx
callq 0x256e6
movq %rbx, %rax
addq $0x40, %rsp
popq %rbx
retq
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::SignalHandling::sig_handler(int, siginfo_t*, void*)
|
static void
sig_handler(int signo, siginfo_t *info, void *_ctx) {
handleSignal(signo, info, _ctx);
// try to forward the signal.
raise(info->si_signo);
// terminate the process immediately.
puts("watf? exit");
_exit(EXIT_FAILURE);
}
|
pushq %rbx
movq %rsi, %rbx
callq 0x257d4
movl (%rbx), %edi
callq 0x6440
leaq 0x4428(%rip), %rdi # 0x29bdf
callq 0x66d0
pushq $0x1
popq %rdi
callq 0x6740
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::Printer::Printer()
|
Printer()
: snippet(true), color_mode(ColorMode::automatic), address(false),
object(false), inliner_context_size(5), trace_context_size(7) {}
|
pushq %rbx
movq %rdi, %rbx
movb $0x1, (%rdi)
andl $0x0, 0x4(%rdi)
andw $0x0, 0x8(%rdi)
movabsq $0x700000005, %rax # imm = 0x700000005
movq %rax, 0xc(%rdi)
addq $0x18, %rdi
callq 0x25cfe
leaq 0xb8(%rbx), %rax
movq %rax, 0x88(%rbx)
movq $0x1, 0x90(%rbx)
xorps %xmm0, %xmm0
movups %xmm0, 0x98(%rbx)
movl $0x3f800000, 0xa8(%rbx) # imm = 0x3F800000
movups %xmm0, 0xb0(%rbx)
popq %rbx
retq
nop
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::StackTraceImplBase::load_thread_info()
|
void load_thread_info() {
#ifdef BACKWARD_SYSTEM_LINUX
#ifndef __ANDROID__
_thread_id = static_cast<size_t>(syscall(SYS_gettid));
#else
_thread_id = static_cast<size_t>(gettid());
#endif
if (_thread_id == static_cast<size_t>(getpid())) {
// If the thread is the main one, let's hide that.
// I like to keep little secret sometimes.
_thread_id = 0;
}
#elif defined(BACKWARD_SYSTEM_DARWIN)
_thread_id = reinterpret_cast<size_t>(pthread_self());
if (pthread_main_np() == 1) {
// If the thread is the main one, let's hide that.
_thread_id = 0;
}
#endif
}
|
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movl $0xba, %edi
xorl %eax, %eax
callq 0x6080
movq %rax, %r14
movq %rax, (%rbx)
callq 0x6680
cltq
cmpq %rax, %r14
jne 0x25c45
andq $0x0, (%rbx)
addq $0x8, %rsp
popq %rbx
popq %r14
retq
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::details::Unwinder<backward::StackTraceImpl<backward::system_tag::linux_tag>::callback>::backtrace(_Unwind_Context*)
|
_Unwind_Reason_Code backtrace(_Unwind_Context *ctx) {
if (_index >= 0 && static_cast<size_t>(_index) >= _depth)
return _URC_END_OF_STACK;
int ip_before_instruction = 0;
uintptr_t ip = _Unwind_GetIPInfo(ctx, &ip_before_instruction);
if (!ip_before_instruction) {
// calculating 0-1 for unsigned, looks like a possible bug to sanitiziers,
// so let's do it explicitly:
if (ip == 0) {
ip = std::numeric_limits<uintptr_t>::max(); // set it to 0xffff... (as
// from casting 0-1)
} else {
ip -= 1; // else just normally decrement it (no overflow/underflow will
// happen)
}
}
if (_index >= 0) { // ignore first frame.
(*_f)(static_cast<size_t>(_index), reinterpret_cast<void *>(ip));
}
_index += 1;
return _URC_NO_REASON;
}
|
pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
movq 0x8(%rdi), %rax
testq %rax, %rax
js 0x25cbc
cmpq 0x10(%rbx), %rax
jb 0x25cbc
pushq $0x5
popq %rax
jmp 0x25cf8
leaq 0xc(%rsp), %rax
andl $0x0, (%rax)
movq %rsi, %rdi
movq %rax, %rsi
callq 0x6050
movq 0x8(%rbx), %rcx
testq %rcx, %rcx
js 0x25cef
cmpl $0x1, 0xc(%rsp)
sbbq $0x0, %rax
movq (%rbx), %rdx
movq (%rdx), %rdx
movq 0x20(%rdx), %rdx
movq %rax, (%rdx,%rcx,8)
incq %rcx
movq %rcx, 0x8(%rbx)
xorl %eax, %eax
addq $0x10, %rsp
popq %rbx
retq
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::TraceResolverLinuxBase::TraceResolverLinuxBase()
|
TraceResolverLinuxBase()
: argv0_(get_argv0()), exec_path_(read_symlink("/proc/self/exe")) {}
|
pushq %r15
pushq %r14
pushq %rbx
subq $0x30, %rsp
movq %rdi, %rbx
andq $0x0, 0x8(%rdi)
movb $0x1, 0x10(%rdi)
andq $0x0, 0x18(%rdi)
leaq 0x1ada9(%rip), %rax # 0x40c40
movq %rax, (%rdi)
leaq 0x20(%rdi), %r14
movq %r14, %rdi
callq 0x25f20
leaq 0x3d3d(%rip), %rsi # 0x29bea
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x61e0
leaq 0x40(%rbx), %rdi
leaq 0x10(%rsp), %rsi
callq 0x25f92
leaq 0x10(%rsp), %rdi
callq 0x6230
addq $0x30, %rsp
popq %rbx
popq %r14
popq %r15
retq
movq %rax, %r15
leaq 0x10(%rsp), %rdi
callq 0x6230
jmp 0x25ef0
movq %rax, %r15
movq %r14, %rdi
callq 0x6230
jmp 0x25efd
movq %rax, %r15
movq %rbx, %rdi
callq 0x260e0
movq %r15, %rdi
callq 0x67d0
nop
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::details::demangler_impl<backward::system_tag::linux_tag>::demangle[abi:cxx11](char const*)
|
std::string demangle(const char *funcname) {
using namespace details;
char *result = abi::__cxa_demangle(funcname, _demangle_buffer.get(),
&_demangle_buffer_length, nullptr);
if (result) {
_demangle_buffer.update(result);
return result;
}
return funcname;
}
|
pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %rbx
movq (%rsi), %rsi
leaq 0x10(%r15), %rdx
movq %r14, %rdi
xorl %ecx, %ecx
callq 0x63b0
testq %rax, %rax
je 0x2622f
movq %rax, (%r15)
movb $0x0, 0x8(%r15)
leaq 0xf(%rsp), %rdx
movq %rbx, %rdi
movq %rax, %rsi
jmp 0x2623a
leaq 0xe(%rsp), %rdx
movq %rbx, %rdi
movq %r14, %rsi
callq 0x61e0
movq %rbx, %rax
addq $0x10, %rsp
popq %rbx
popq %r14
popq %r15
retq
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::Printer::print_trace(std::ostream&, backward::ResolvedTrace const&, backward::Colorize&)
|
void print_trace(std::ostream &os, const ResolvedTrace &trace,
Colorize &colorize) {
os << "#" << std::left << std::setw(2) << trace.idx << std::right;
bool already_indented = true;
if (!trace.source.filename.size() || object) {
os << " Object \"" << trace.object_filename << "\", at " << trace.addr
<< ", in " << trace.object_function << "\n";
already_indented = false;
}
for (size_t inliner_idx = trace.inliners.size(); inliner_idx > 0;
--inliner_idx) {
if (!already_indented) {
os << " ";
}
const ResolvedTrace::SourceLoc &inliner_loc =
trace.inliners[inliner_idx - 1];
print_source_loc(os, " | ", inliner_loc);
if (snippet) {
print_snippet(os, " | ", inliner_loc, colorize, Color::purple,
inliner_context_size);
}
already_indented = false;
}
if (trace.source.filename.size()) {
if (!already_indented) {
os << " ";
}
print_source_loc(os, " ", trace.source, trace.addr);
if (snippet) {
print_snippet(os, " ", trace.source, colorize, Color::yellow,
trace_context_size);
}
}
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rcx, 0x10(%rsp)
movq %rdx, %r12
movq %rsi, %r14
movq %rdi, %r15
leaq 0x3749(%rip), %rsi # 0x29c3c
movq %r14, %rdi
callq 0x6420
movq (%rax), %rcx
movq -0x18(%rcx), %rdx
movl $0xffffff4f, %ebx # imm = 0xFFFFFF4F
movl 0x18(%rax,%rdx), %esi
andl %ebx, %esi
orl $0x20, %esi
movl %esi, 0x18(%rax,%rdx)
movq -0x18(%rcx), %rcx
movq $0x2, 0x10(%rax,%rcx)
movq 0x8(%r12), %rsi
movq %rax, %rdi
callq 0x6310
movq (%rax), %rcx
movq -0x18(%rcx), %rcx
andl 0x18(%rax,%rcx), %ebx
orl $0x80, %ebx
movl %ebx, 0x18(%rax,%rcx)
cmpq $0x0, 0x78(%r12)
je 0x26554
movb $0x1, %cl
cmpb $0x1, 0x9(%r15)
jne 0x265b8
leaq 0x36e3(%rip), %rsi # 0x29c3e
movq %r14, %rdi
callq 0x6420
leaq 0x10(%r12), %rsi
movq %rax, %rdi
callq 0x63d0
leaq 0x36d3(%rip), %rsi # 0x29c4a
movq %rax, %rdi
callq 0x6420
movq (%r12), %rsi
movq %rax, %rdi
callq 0x6370
leaq 0x36bf(%rip), %rsi # 0x29c51
movq %rax, %rdi
callq 0x6420
leaq 0x30(%r12), %rsi
movq %rax, %rdi
callq 0x63d0
leaq 0x1e57(%rip), %rsi # 0x28405
movq %rax, %rdi
callq 0x6420
xorl %ecx, %ecx
movq 0xa0(%r12), %rax
subq 0x98(%r12), %rax
leaq 0x50(%r12), %rdx
movq %rdx, 0x8(%rsp)
pushq $0x48
popq %rsi
cqto
idivq %rsi
movq %rax, %rbp
imulq $0x48, %rax, %r13
addq $-0x48, %r13
subq $0x1, %rbp
jb 0x26655
testb $0x1, %cl
jne 0x265ff
movq %r14, %rdi
leaq 0x3667(%rip), %rsi # 0x29c61
callq 0x6420
movq 0x98(%r12), %rbx
addq %r13, %rbx
movq %r15, %rdi
movq %r14, %rsi
leaq 0x3643(%rip), %rdx # 0x29c5a
movq %rbx, %rcx
xorl %r8d, %r8d
callq 0x26774
cmpb $0x1, (%r15)
jne 0x2664d
movl 0xc(%r15), %eax
movl %eax, (%rsp)
movq %r15, %rdi
movq %r14, %rsi
leaq 0x361b(%rip), %rdx # 0x29c57
movq %rbx, %rcx
movq 0x10(%rsp), %r8
pushq $0x23
popq %r9
callq 0x26834
addq $-0x48, %r13
xorl %ecx, %ecx
jmp 0x265e5
cmpq $0x0, 0x78(%r12)
je 0x266b9
testb $0x1, %cl
jne 0x26671
leaq 0x35f8(%rip), %rsi # 0x29c61
movq %r14, %rdi
callq 0x6420
movq (%r12), %r8
leaq 0x35e5(%rip), %rdx # 0x29c61
movq %r15, %rdi
movq %r14, %rsi
movq 0x8(%rsp), %rcx
callq 0x26774
cmpb $0x1, (%r15)
jne 0x266b9
movl 0x10(%r15), %eax
movl %eax, (%rsp)
leaq 0x35be(%rip), %rdx # 0x29c5e
pushq $0x21
popq %r9
movq %r15, %rdi
movq %r14, %rsi
movq 0x8(%rsp), %rcx
movq 0x10(%rsp), %r8
callq 0x26834
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::Printer::print_source_loc(std::ostream&, char const*, backward::ResolvedTrace::SourceLoc const&, void*)
|
void print_source_loc(std::ostream &os, const char *indent,
const ResolvedTrace::SourceLoc &source_loc,
void *addr = nullptr) {
os << indent << "Source \"" << source_loc.filename << "\", line "
<< source_loc.line << ", in " << source_loc.function;
if (address && addr != nullptr) {
os << " [" << addr << "]";
}
os << "\n";
}
|
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %r8, %r14
movq %rcx, %r12
movq %rsi, %rbx
movq %rdi, %r15
movq %rsi, %rdi
movq %rdx, %rsi
callq 0x6420
leaq 0x34cb(%rip), %rsi # 0x29c65
movq %rax, %rdi
callq 0x6420
leaq 0x20(%r12), %rsi
movq %rax, %rdi
callq 0x63d0
leaq 0x34b8(%rip), %rsi # 0x29c6e
movq %rax, %rdi
callq 0x6420
movl 0x40(%r12), %esi
movq %rax, %rdi
callq 0x6310
leaq 0x347f(%rip), %rsi # 0x29c51
movq %rax, %rdi
callq 0x6420
movq %rax, %rdi
movq %r12, %rsi
callq 0x63d0
testq %r14, %r14
je 0x2681a
cmpb $0x0, 0x8(%r15)
je 0x2681a
leaq 0x347f(%rip), %rsi # 0x29c77
movq %rbx, %rdi
callq 0x6420
movq %rax, %rdi
movq %r14, %rsi
callq 0x6370
leaq 0x1c07(%rip), %rsi # 0x28419
movq %rax, %rdi
callq 0x6420
leaq 0x1be4(%rip), %rsi # 0x28405
movq %rbx, %rdi
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
jmp 0x6420
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::Colorize::set_color(backward::Color::type)
|
void set_color(Color::type ccode) {
if (!_enabled)
return;
// I assume that the terminal can handle basic colors. Seriously I
// don't want to deal with all the termcap shit.
_os << "\033[" << static_cast<int>(ccode) << "m";
_reset = (ccode != Color::reset);
}
|
cmpb $0x1, 0x9(%rdi)
jne 0x269d3
pushq %rbp
pushq %rbx
pushq %rax
movl %esi, %ebp
movq %rdi, %rbx
movq (%rdi), %rdi
leaq 0x32f1(%rip), %rsi # 0x29c99
callq 0x6420
movq %rax, %rdi
movl %ebp, %esi
callq 0x67b0
leaq 0x32de(%rip), %rsi # 0x29c9c
movq %rax, %rdi
callq 0x6420
cmpl $0x27, %ebp
setne 0x8(%rbx)
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::SourceFile::SourceFile(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&)
|
SourceFile(const std::string &path) {
// 1. If BACKWARD_CXX_SOURCE_PREFIXES is set then assume it contains
// a colon-separated list of path prefixes. Try prepending each
// to the given path until a valid file is found.
const std::vector<std::string> &prefixes = get_paths_from_env_variable();
for (size_t i = 0; i < prefixes.size(); ++i) {
// Double slashes (//) should not be a problem.
std::string new_path = prefixes[i] + '/' + path;
_file.reset(new std::ifstream(new_path.c_str()));
if (is_open())
break;
}
// 2. If no valid file found then fallback to opening the path as-is.
if (!_file || !is_open()) {
_file.reset(new std::ifstream(path.c_str()));
}
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq %rsi, (%rsp)
movq %rdi, %rbx
andq $0x0, (%rdi)
movb $0x1, 0x8(%rdi)
callq 0x27074
movq %rax, %r15
pushq $-0x1
popq %r14
xorl %r13d, %r13d
leaq 0x28(%rsp), %r12
movq (%r15), %rsi
movq 0x8(%r15), %rax
subq %rsi, %rax
sarq $0x5, %rax
incq %r14
cmpq %rax, %r14
jae 0x26b77
addq %r13, %rsi
movq %r12, %rdi
pushq $0x2f
popq %rdx
callq 0x27108
leaq 0x8(%rsp), %rdi
movq %r12, %rsi
movq (%rsp), %rdx
callq 0x270e9
movq %r12, %rdi
callq 0x6230
movl $0x208, %edi # imm = 0x208
callq 0x6430
movq %rax, %rbp
movq 0x8(%rsp), %rsi
movq %rax, %rdi
pushq $0x8
popq %rdx
callq 0x6810
movq %rbx, %rdi
movq %rbp, %rsi
callq 0x2713e
movq %rbx, %rdi
callq 0x27162
movl %eax, %ebp
addq $0x20, %r13
leaq 0x8(%rsp), %rdi
callq 0x6230
testb %bpl, %bpl
je 0x26af1
cmpb $0x0, 0x8(%rbx)
jne 0x26b8f
cmpq $0x0, (%rbx)
je 0x26b8f
movq %rbx, %rdi
callq 0x27162
testb %al, %al
jne 0x26bb9
movl $0x208, %edi # imm = 0x208
callq 0x6430
movq %rax, %r15
movq (%rsp), %rax
movq (%rax), %rsi
pushq $0x8
popq %rdx
movq %r15, %rdi
callq 0x6810
movq %rbx, %rdi
movq %r15, %rsi
callq 0x2713e
addq $0x48, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %r14
movq %r15, %rdi
callq 0x6410
jmp 0x26c00
jmp 0x26bd7
movq %rax, %r14
jmp 0x26c00
movq %rax, %r14
movq %rbp, %rdi
callq 0x6410
jmp 0x26bf6
movq %rax, %r14
leaq 0x28(%rsp), %rdi
jmp 0x26bfb
movq %rax, %r14
leaq 0x8(%rsp), %rdi
callq 0x6230
movq %rbx, %rdi
callq 0x2716e
movq %r14, %rdi
callq 0x67d0
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::SourceFile::get_lines(unsigned int, unsigned int, std::vector<std::pair<unsigned int, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>, std::allocator<std::pair<unsigned int, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>>>&)
|
lines_t &get_lines(unsigned line_start, unsigned line_count, lines_t &lines) {
using namespace std;
// This function make uses of the dumbest algo ever:
// 1) seek(0)
// 2) read lines one by one and discard until line_start
// 3) read line one by one until line_start + line_count
//
// If you are getting snippets many time from the same file, it is
// somewhat a waste of CPU, feel free to benchmark and propose a
// better solution ;)
_file->clear();
_file->seekg(0);
string line;
unsigned line_idx;
for (line_idx = 1; line_idx < line_start; ++line_idx) {
std::getline(*_file, line);
if (!*_file) {
return lines;
}
}
// think of it like a lambda in C++98 ;)
// but look, I will reuse it two times!
// What a good boy am I.
struct isspace {
bool operator()(char c) { return std::isspace(c); }
};
bool started = false;
for (; line_idx < line_start + line_count; ++line_idx) {
getline(*_file, line);
if (!*_file) {
return lines;
}
if (!started) {
if (std::find_if(line.begin(), line.end(), not_isspace()) == line.end())
continue;
started = true;
}
lines.push_back(make_pair(line_idx, line));
}
lines.erase(
std::find_if(lines.rbegin(), lines.rend(), not_isempty()).base(),
lines.end());
return lines;
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
movq %rcx, 0x8(%rsp)
movl %edx, %ebp
movl %esi, %r15d
movq %rdi, %r14
movq (%rdi), %rdi
movq (%rdi), %rax
addq -0x18(%rax), %rdi
xorl %ebx, %ebx
xorl %esi, %esi
callq 0x6780
movq (%r14), %rdi
xorl %esi, %esi
xorl %edx, %edx
callq 0x6560
leaq 0x20(%rsp), %rax
movq %rax, -0x10(%rax)
andq $0x0, -0x8(%rax)
movb $0x0, (%rax)
cmpl $0x1, %r15d
movl %r15d, %r13d
adcl $0x0, %r13d
leaq 0x10(%rsp), %r12
incl %ebx
cmpl %r15d, %ebx
jae 0x275d7
movq (%r14), %rdi
movq %r12, %rsi
callq 0x60e0
movq (%r14), %rax
movq (%rax), %rcx
movq -0x18(%rcx), %rcx
testb $0x5, 0x20(%rax,%rcx)
je 0x275af
jmp 0x2769a
addl %r15d, %ebp
leaq 0x48(%rsp), %r15
xorl %ebx, %ebx
leaq 0x10(%rsp), %r12
cmpl %ebp, %r13d
jae 0x27663
movq (%r14), %rdi
movq %r12, %rsi
callq 0x60e0
movq (%r14), %rax
movq (%rax), %rcx
movq -0x18(%rcx), %rcx
testb $0x5, 0x20(%rax,%rcx)
jne 0x2769a
testb $0x1, %bl
jne 0x27631
movq 0x10(%rsp), %rdi
movq 0x18(%rsp), %rsi
addq %rdi, %rsi
callq 0x2776d
movq 0x10(%rsp), %rcx
addq 0x18(%rsp), %rcx
cmpq %rcx, %rax
je 0x2765f
movl %r13d, 0x40(%rsp)
movq %r15, %rdi
movq %r12, %rsi
callq 0x65e0
movq 0x8(%rsp), %rdi
leaq 0x40(%rsp), %rsi
callq 0x27872
movq %r15, %rdi
callq 0x6230
movb $0x1, %bl
incl %r13d
jmp 0x275e6
xorl %ebx, %ebx
jmp 0x2765a
movq 0x8(%rsp), %rbx
movq 0x8(%rbx), %rax
leaq 0x38(%rsp), %rsi
movq %rax, (%rsi)
movq (%rbx), %rax
leaq 0x30(%rsp), %rdx
movq %rax, (%rdx)
leaq 0x40(%rsp), %rdi
callq 0x27743
movq 0x40(%rsp), %rsi
movq 0x8(%rbx), %rdx
movq %rbx, %rdi
callq 0x2773e
leaq 0x10(%rsp), %rdi
callq 0x6230
movq 0x8(%rsp), %rax
addq $0x68, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
jmp 0x276cf
jmp 0x276cf
jmp 0x276cf
movq %rax, %rbx
movq %r15, %rdi
callq 0x6230
jmp 0x276d2
jmp 0x276cf
jmp 0x276cf
movq %rax, %rbx
leaq 0x10(%rsp), %rdi
callq 0x6230
movq %rbx, %rdi
callq 0x67d0
|
/diatomic[P]diy/tests/backward/backward.hpp
|
backward::SourceFile::not_isempty::operator()(std::pair<unsigned int, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>> const&)
|
bool operator()(const lines_t::value_type &p) {
return !(std::find_if(p.second.begin(), p.second.end(), not_isspace()) ==
p.second.end());
}
|
pushq %rbx
movq %rsi, %rbx
movq 0x8(%rsi), %rdi
movq 0x10(%rsi), %rsi
addq %rdi, %rsi
callq 0x27cd8
movq 0x8(%rbx), %rcx
addq 0x10(%rbx), %rcx
cmpq %rcx, %rax
setne %al
popq %rbx
retq
|
/diatomic[P]diy/tests/backward/backward.hpp
|
usage()
|
void usage()
{
std::cout <<
"\n"
"Usage:\n"
" XSTSHarness <testSet>\n"
"\n"
"This program runs the tests listed in the XMLSchema Test Suite, available at\n"
"http://www.w3.org/XML/2004/xml-schema-test-suite/xmlschema2006-11-06/xsts-2007-06-20.tar.gz\n"
"Run this executable against the suite.xml file found in the top directory\n"
"\n"
"It also runs the tests listed in the XML Test Suite, available at\n"
"http://www.w3.org/XML/Test/xmlts20080827.zip\n"
"Run this executable against the xmlconf.xml file found in the top directory\n"
"\n"
<< std::endl;
}
|
pushq %rax
movq 0x8a24(%rip), %rdi # 0xef68
leaq 0x3b1f(%rip), %rsi # 0xa06a
callq 0x61b0
movq %rax, %rdi
popq %rax
jmp 0x6330
nop
|
/apache[P]xerces-c/tests/src/XSTSHarness/XSTSHarness.cpp
|
BaseHarnessHandlers::error(xercesc_4_0::SAXParseException const&)
|
void BaseHarnessHandlers::error(const SAXParseException& e)
{
fSawErrors = true;
std::cout << "\nError at file " << StrX(e.getSystemId())
<< ", line " << e.getLineNumber()
<< ", char " << e.getColumnNumber()
<< "\n Message: " << StrX(e.getMessage()) << std::endl;
}
|
pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %rbx
movb $0x1, 0x88(%rdi)
movq 0x898a(%rip), %rdi # 0xef68
leaq 0x3c59(%rip), %rsi # 0xa23e
callq 0x61b0
movq %rax, %r14
movq %rbx, %rdi
callq 0x6230
leaq 0x8(%rsp), %r15
movq %r15, %rdi
movq %rax, %rsi
callq 0x721a
movq (%r15), %rsi
movq %r14, %rdi
callq 0x61b0
leaq 0x3c37(%rip), %rsi # 0xa24e
movq %r14, %rdi
callq 0x61b0
movq %rax, %r14
movq %rbx, %rdi
callq 0x6060
movq %r14, %rdi
movq %rax, %rsi
callq 0x6160
leaq 0x3c1a(%rip), %rsi # 0xa256
movq %rax, %rdi
callq 0x61b0
movq %rax, %r14
movq %rbx, %rdi
callq 0x62f0
movq %r14, %rdi
movq %rax, %rsi
callq 0x6160
leaq 0x3bfd(%rip), %rsi # 0xa25e
movq %rax, %rdi
callq 0x61b0
movq %rax, %r14
movq (%rbx), %rax
movq %rbx, %rdi
callq *0x10(%rax)
movq %rsp, %rdi
movq %rax, %rsi
callq 0x721a
movq (%rsp), %rsi
movq %r14, %rdi
callq 0x61b0
movq %r14, %rdi
callq 0x6330
movq %rsp, %rdi
callq 0x7238
leaq 0x8(%rsp), %rdi
callq 0x7238
addq $0x10, %rsp
popq %rbx
popq %r14
popq %r15
retq
movq %rax, %rbx
movq %rsp, %rdi
callq 0x7238
jmp 0x66c2
jmp 0x66bf
movq %rax, %rbx
leaq 0x8(%rsp), %rdi
callq 0x7238
movq %rbx, %rdi
callq 0x6210
|
/apache[P]xerces-c/tests/src/XSTSHarness/XSTSHarness.cpp
|
BaseHarnessHandlers::fatalError(xercesc_4_0::SAXParseException const&)
|
void BaseHarnessHandlers::fatalError(const SAXParseException& e)
{
fSawErrors = true;
std::cout << "\nFatal Error at file " << StrX(e.getSystemId())
<< ", line " << e.getLineNumber()
<< ", char " << e.getColumnNumber()
<< "\n Message: " << StrX(e.getMessage()) << std::endl;
}
|
pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %rbx
movb $0x1, 0x88(%rdi)
movq 0x8870(%rip), %rdi # 0xef68
leaq 0x3b6c(%rip), %rsi # 0xa26b
callq 0x61b0
movq %rax, %r14
movq %rbx, %rdi
callq 0x6230
leaq 0x8(%rsp), %r15
movq %r15, %rdi
movq %rax, %rsi
callq 0x721a
movq (%r15), %rsi
movq %r14, %rdi
callq 0x61b0
leaq 0x3b1d(%rip), %rsi # 0xa24e
movq %r14, %rdi
callq 0x61b0
movq %rax, %r14
movq %rbx, %rdi
callq 0x6060
movq %r14, %rdi
movq %rax, %rsi
callq 0x6160
leaq 0x3b00(%rip), %rsi # 0xa256
movq %rax, %rdi
callq 0x61b0
movq %rax, %r14
movq %rbx, %rdi
callq 0x62f0
movq %r14, %rdi
movq %rax, %rsi
callq 0x6160
leaq 0x3ae3(%rip), %rsi # 0xa25e
movq %rax, %rdi
callq 0x61b0
movq %rax, %r14
movq (%rbx), %rax
movq %rbx, %rdi
callq *0x10(%rax)
movq %rsp, %rdi
movq %rax, %rsi
callq 0x721a
movq (%rsp), %rsi
movq %r14, %rdi
callq 0x61b0
movq %r14, %rdi
callq 0x6330
movq %rsp, %rdi
callq 0x7238
leaq 0x8(%rsp), %rdi
callq 0x7238
addq $0x10, %rsp
popq %rbx
popq %r14
popq %r15
retq
movq %rax, %rbx
movq %rsp, %rdi
callq 0x7238
jmp 0x67dc
jmp 0x67d9
movq %rax, %rbx
leaq 0x8(%rsp), %rdi
callq 0x7238
movq %rbx, %rdi
callq 0x6210
|
/apache[P]xerces-c/tests/src/XSTSHarness/XSTSHarness.cpp
|
BaseHarnessHandlers::printFile(xercesc_4_0::XMLURL&)
|
void BaseHarnessHandlers::printFile(XMLURL& url)
{
if(XMLString::equals(url.getURLText(), dummy))
return;
BinInputStream* stream=url.makeNewStream();
if(stream==NULL)
{
std::cout << "File " << StrX(url.getURLText()) << " is missing" << std::endl;
return;
}
std::cout << "Content of file " << StrX(url.getURLText()) << std::endl;
XMLByte buffer[256];
XMLSize_t nRead;
while((nRead=stream->readBytes(buffer, 255)) >0)
{
buffer[nRead]=0;
// sending data containing \n\r to cout generates \n\n\r, so strip any \r
XMLSize_t idx=0;
while(true)
{
int cr=XMLString::indexOf((const char*)buffer, '\r', idx);
if(cr==-1)
break;
memmove(&buffer[cr], &buffer[cr+1], XMLString::stringLen((const char*)&buffer[cr+1])+1);
idx=cr;
if(buffer[idx]==0)
break;
}
std::cout << (const char*)buffer;
}
std::cout << std::endl;
delete stream;
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x118, %rsp # imm = 0x118
movq %rsi, %r14
movq %rsi, %rdi
callq 0x72ac
leaq 0x36e5(%rip), %rsi # 0xa010
movq %rax, %rdi
callq 0x7252
testb %al, %al
jne 0x6a8c
movq %r14, %rdi
callq 0x61c0
movq %rax, 0x8(%rsp)
movq 0x8619(%rip), %rdi # 0xef68
testq %rax, %rax
je 0x6a39
leaq 0x3946(%rip), %rsi # 0xa2a5
callq 0x61b0
movq %rax, %r15
movq %r14, %rdi
callq 0x72ac
leaq 0x10(%rsp), %r14
movq %r14, %rdi
movq %rax, %rsi
callq 0x721a
movq (%r14), %rsi
movq %r15, %rdi
callq 0x61b0
movq %r15, %rdi
callq 0x6330
leaq 0x10(%rsp), %r14
movq %r14, %rdi
callq 0x7238
movq 0x860a(%rip), %rbx # 0xefb0
pushq $0xd
popq %rbp
movq 0x8(%rsp), %rdi
movq (%rdi), %rax
movl $0xff, %edx
movq %r14, %rsi
callq *0x18(%rax)
testq %rax, %rax
je 0x6a20
movb $0x0, 0x10(%rsp,%rax)
xorl %r12d, %r12d
movq (%rbx), %rcx
movq %r14, %rdi
movl %ebp, %esi
movq %r12, %rdx
callq 0x6360
cmpl $-0x1, %eax
je 0x6a0f
movslq %eax, %r12
leaq (%rsp,%r12), %r13
addq $0x10, %r13
leaq (%rsp,%r12), %r15
addq $0x11, %r15
movq %r15, %rdi
callq 0x62e0
leaq 0x1(%rax), %rdx
movq %r13, %rdi
movq %r15, %rsi
callq 0x60a0
cmpb $0x0, -0x1(%r15)
jne 0x69c9
movq 0x8552(%rip), %rdi # 0xef68
movq %r14, %rsi
callq 0x61b0
jmp 0x69a9
movq 0x8541(%rip), %rdi # 0xef68
callq 0x6330
movq 0x8(%rsp), %rdi
movq (%rdi), %rax
callq *0x8(%rax)
jmp 0x6a8c
leaq 0x3853(%rip), %rsi # 0xa293
callq 0x61b0
movq %rax, %rbx
movq %r14, %rdi
callq 0x72ac
leaq 0x10(%rsp), %r14
movq %r14, %rdi
movq %rax, %rsi
callq 0x721a
movq (%r14), %rsi
movq %rbx, %rdi
callq 0x61b0
leaq 0x3827(%rip), %rsi # 0xa299
movq %rbx, %rdi
callq 0x61b0
movq %rax, %rdi
callq 0x6330
leaq 0x10(%rsp), %rdi
callq 0x7238
addq $0x118, %rsp # imm = 0x118
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
jmp 0x6aa0
movq %rax, %rbx
leaq 0x10(%rsp), %rdi
callq 0x7238
movq %rbx, %rdi
callq 0x6210
nop
|
/apache[P]xerces-c/tests/src/XSTSHarness/XSTSHarness.cpp
|
main
|
int main(int argC, char* argV[])
{
// Check command line and extract arguments.
if (argC < 2)
{
usage();
return 1;
}
try
{
XMLPlatformUtils::Initialize();
}
catch (const XMLException& toCatch)
{
std::cout << "Error during initialization! Message:\n"
<< StrX(toCatch.getMessage()) << std::endl;
return 1;
}
int argInd;
for (argInd = 1; argInd < argC; argInd++)
{
// Break out on first parm not starting with a dash
if (argV[argInd][0] != '-')
break;
// Watch for special case help request
if (!strcmp(argV[argInd], "-?"))
{
usage();
return 2;
}
// TODO: add option to generate the XML summarizing the result
else if (!strncmp(argV[argInd], "-scanner=", 9))
{
g_scanner = XMLString::transcode(argV[argInd]+9);
}
else
{
std::cout << "Unknown option '" << argV[argInd]
<< "', ignoring it\n" << std::endl;
}
}
//
// There should be only one and only one parameter left, and that
// should be the file name.
//
if (argInd != argC - 1)
{
usage();
return 1;
}
//
// Create a SAX parser object.
//
SAX2XMLReader* parser = XMLReaderFactory::createXMLReader();
parser->setFeature(XMLUni::fgSAX2CoreNameSpaces, true);
parser->setFeature(XMLUni::fgSAX2CoreValidation, false);
const char* xmlFile = argV[argInd];
// Discover if the test suite is the XML or XMLSchema one
RootExtractor rootExtractor;
parser->setContentHandler(&rootExtractor);
try
{
parser->parse(xmlFile);
}
catch (...)
{
}
XMLCh* uniFile = XMLString::transcode(xmlFile);
XMLCh* uri = new XMLCh[XMLString::stringLen(xmlFile) + 9];
XMLString::fixURI(uniFile, uri);
BaseHarnessHandlers* handler=NULL;
if(rootExtractor.isXMLSuite())
{
// XML Test Suite
handler=new XMLHarnessHandlers(uri, g_scanner);
}
else
{
// XMLSchema Test Suite
handler=new XSTSHarnessHandlers(uri, g_scanner);
}
XMLString::release(&uniFile);
delete [] uri;
parser->setContentHandler(handler);
parser->setErrorHandler(handler);
bool errorOccurred=false;
const unsigned long startMillis = XMLPlatformUtils::getCurrentMillis();
//
// Get the starting time and kick off the parse of the indicated
// file. Catch any exceptions that might propagate out of it.
//
try
{
parser->parse(xmlFile);
}
catch (const OutOfMemoryException&)
{
std::cout << "OutOfMemoryException" << std::endl;
errorOccurred = true;
}
catch (const XMLException& e)
{
std::cout << "\nError during parsing: '" << xmlFile << "'\n"
<< "Exception message is: \n"
<< StrX(e.getMessage()) << "\n" << std::endl;
errorOccurred = true;
}
catch (...)
{
std::cout << "\nUnexpected exception during parsing: '" << xmlFile << "'\n";
errorOccurred = true;
}
const unsigned long endMillis = XMLPlatformUtils::getCurrentMillis();
unsigned long duration = endMillis - startMillis;
if (handler->getSawErrors())
errorOccurred = true;
std::cout << "Scanner: " << StrX(g_scanner) << std::endl;
std::cout << " Total tests: " << handler->getTotalTests() << std::endl;
std::cout << " Failed tests: " << handler->getFailedTests() << std::endl;
std::cout << " Success rate: " << ((double)(handler->getTotalTests()-handler->getFailedTests()))/(double)handler->getTotalTests()*100 << "%" << std::endl;
std::cout << " Duration: ";
if(duration > 60000)
{
std::cout << duration/60000 << ":";
duration=duration % 60000;
}
if(duration/1000 < 10)
std::cout << "0";
std::cout << duration/1000 << "." << duration % 1000 << std::endl;
//
// Delete the parser itself. Must be done prior to calling Terminate, below.
//
delete parser;
delete handler;
// And call the termination method
XMLPlatformUtils::Terminate();
if (errorOccurred)
return 4;
else
return 0;
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x58, %rsp
cmpl $0x1, %edi
jg 0x6ba5
callq 0x653c
pushq $0x1
popq %rax
addq $0x58, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %rsi, %r14
movl %edi, %ebx
movq 0x8387(%rip), %rdi # 0xef38
xorl %esi, %esi
xorl %edx, %edx
xorl %ecx, %ecx
callq 0x62c0
movl %ebx, 0x14(%rsp)
movl %ebx, %ebx
decq %rbx
xorl %r13d, %r13d
leaq 0x3ab6(%rip), %r15 # 0xa685
pushq $0x9
popq %r12
cmpq %r13, %rbx
je 0x6b8e
movq 0x8(%r14,%r13,8), %rbp
cmpb $0x2d, (%rbp)
jne 0x6c67
cmpb $0x3f, 0x1(%rbp)
jne 0x6bf7
cmpb $0x0, 0x2(%rbp)
je 0x6d86
movq %rbp, %rdi
movq %r15, %rsi
movq %r12, %rdx
callq 0x60c0
testl %eax, %eax
je 0x6c42
movq 0x8358(%rip), %rdi # 0xef68
leaq 0x3a78(%rip), %rsi # 0xa68f
callq 0x61b0
movq 0x8(%r14,%r13,8), %rsi
movq %rax, %rdi
callq 0x61b0
movq %rax, %rdi
leaq 0x3a6d(%rip), %rsi # 0xa6a0
callq 0x61b0
movq %rax, %rdi
callq 0x6330
jmp 0x6c5f
addq $0x9, %rbp
movq 0x8363(%rip), %rax # 0xefb0
movq (%rax), %rsi
movq %rbp, %rdi
callq 0x6110
movq %rax, 0x8591(%rip) # 0xf1f0
incq %r13
jmp 0x6bd3
movl 0x14(%rsp), %eax
addl $-0x2, %eax
cmpl %r13d, %eax
jne 0x6b8e
movq 0x8332(%rip), %rax # 0xefb0
movq (%rax), %rdi
xorl %esi, %esi
callq 0x6200
movq %rax, %rbx
movq (%rax), %rax
movq 0x82fb(%rip), %rsi # 0xef90
pushq $0x1
popq %rdx
movq %rbx, %rdi
callq *0x60(%rax)
movq (%rbx), %rax
movq 0x8298(%rip), %rsi # 0xef40
movq %rbx, %rdi
xorl %edx, %edx
callq *0x60(%rax)
movq 0x8(%r14,%r13,8), %r12
leaq 0x30(%rsp), %rsi
leaq 0x76c7(%rip), %rax # 0xe388
movq %rax, -0x10(%rsi)
leaq 0x77d4(%rip), %rax # 0xe4a0
movq %rax, -0x8(%rsi)
leaq 0x7801(%rip), %rax # 0xe4d8
movq %rax, (%rsi)
leaq 0x786f(%rip), %rax # 0xe550
movq %rax, 0x8(%rsi)
leaq 0x78a4(%rip), %rax # 0xe590
movq %rax, 0x10(%rsi)
leaq 0x78f1(%rip), %rax # 0xe5e8
movq %rax, 0x18(%rsi)
movb $0x0, 0x20(%rsi)
movq (%rbx), %rax
movq %rbx, %rdi
callq *0x40(%rax)
movq (%rbx), %rax
movq %rbx, %rdi
movq %r12, %rsi
callq *0x80(%rax)
movq 0x8292(%rip), %rax # 0xefb0
movq (%rax), %rsi
movq %r12, %rdi
callq 0x6110
movq %rax, 0x18(%rsp)
movq %r12, %rdi
callq 0x62e0
leaq 0x12(,%rax,2), %rcx
addq $0x9, %rax
pushq $-0x1
popq %rdi
cmovnsq %rcx, %rdi
callq 0x6150
movq %rax, %r15
movq 0x18(%rsp), %rdi
movq %rax, %rsi
callq 0x6080
cmpb $0x1, 0x50(%rsp)
jne 0x6d92
movl $0x120, %edi # imm = 0x120
callq 0x6090
movq %rax, %r14
movq 0x8477(%rip), %rdx # 0xf1f0
movq %rax, %rdi
movq %r15, %rsi
callq 0x8d34
jmp 0x6db1
callq 0x653c
pushq $0x2
jmp 0x6b95
movl $0x3e0, %edi # imm = 0x3E0
callq 0x6090
movq %rax, %r14
movq 0x844a(%rip), %rdx # 0xf1f0
movq %rax, %rdi
movq %r15, %rsi
callq 0x75dc
movq 0x81f8(%rip), %rax # 0xefb0
movq (%rax), %rsi
leaq 0x18(%rsp), %rdi
callq 0x6100
movq %r15, %rdi
callq 0x6120
leaq 0x10(%r14), %rsi
movq (%rbx), %rax
movq %rbx, %rdi
callq *0x40(%rax)
leaq 0x18(%r14), %rsi
movq (%rbx), %rax
movq %rbx, %rdi
callq *0x58(%rax)
callq 0x62d0
movq %rax, %r15
movq (%rbx), %rax
movq %rbx, %rdi
movq %r12, %rsi
callq *0x80(%rax)
xorl %ebp, %ebp
callq 0x62d0
movq %rax, %r12
orb 0x88(%r14), %bpl
movl %ebp, 0x14(%rsp)
movq 0x814e(%rip), %rdi # 0xef68
leaq 0x3901(%rip), %rsi # 0xa722
callq 0x61b0
movq %rax, %r13
movq 0x83c0(%rip), %rsi # 0xf1f0
leaq 0x8(%rsp), %rdi
callq 0x721a
movq 0x8(%rsp), %rsi
movq %r13, %rdi
callq 0x61b0
movq %r13, %rdi
callq 0x6330
leaq 0x8(%rsp), %rdi
callq 0x7238
movq 0x8108(%rip), %rdi # 0xef68
leaq 0x38c5(%rip), %rsi # 0xa72c
callq 0x61b0
movl 0x90(%r14), %esi
movq %rax, %rdi
callq 0x6160
movq %rax, %rdi
callq 0x6330
movq 0x80de(%rip), %rdi # 0xef68
leaq 0x38ab(%rip), %rsi # 0xa73c
callq 0x61b0
movl 0x8c(%r14), %esi
movq %rax, %rdi
callq 0x6160
movq %rax, %rdi
callq 0x6330
movq 0x80b4(%rip), %rdi # 0xef68
leaq 0x3892(%rip), %rsi # 0xa74d
callq 0x61b0
movl 0x90(%r14), %ecx
movl 0x8c(%r14), %edx
cvtsi2sd %rcx, %xmm1
subl %edx, %ecx
cvtsi2sd %rcx, %xmm0
divsd %xmm1, %xmm0
mulsd 0x3122(%rip), %xmm0 # 0xa008
movq %rax, %rdi
callq 0x6240
leaq 0x3869(%rip), %rsi # 0xa75e
movq %rax, %rdi
callq 0x61b0
movq %rax, %rdi
callq 0x6330
movq 0x805c(%rip), %rdi # 0xef68
leaq 0x384d(%rip), %rsi # 0xa760
callq 0x61b0
subq %r15, %r12
cmpq $0xea61, %r12 # imm = 0xEA61
jb 0x6f52
movl $0xea60, %ecx # imm = 0xEA60
movq %r12, %rax
xorl %edx, %edx
divq %rcx
movq %rdx, %r12
movq 0x802d(%rip), %rdi # 0xef68
movq %rax, %rsi
callq 0x6160
leaq 0x3823(%rip), %rsi # 0xa76d
movq %rax, %rdi
callq 0x61b0
movw $0x3e8, %cx # imm = 0x3E8
movl %r12d, %eax
xorl %edx, %edx
divw %cx
movl %edx, %ebp
movl %eax, %r15d
cmpq $0x270f, %r12 # imm = 0x270F
ja 0x6f7f
movq 0x7ff5(%rip), %rdi # 0xef68
leaq 0x37f5(%rip), %rsi # 0xa76f
callq 0x61b0
movzwl %r15w, %esi
movq 0x7fde(%rip), %rdi # 0xef68
callq 0x6160
leaq 0x37db(%rip), %rsi # 0xa771
movq %rax, %rdi
callq 0x61b0
movzwl %bp, %esi
movq %rax, %rdi
callq 0x6160
movq %rax, %rdi
callq 0x6330
movq (%rbx), %rax
movq %rbx, %rdi
callq *0x8(%rax)
movq (%r14), %rax
movq %r14, %rdi
callq *0x8(%rax)
callq 0x6180
movzbl 0x14(%rsp), %eax
shll $0x2, %eax
jmp 0x6b96
movq %rax, %rbx
movl $0x3e0, %esi # imm = 0x3E0
jmp 0x6fe7
movq %rax, %rbx
movl $0x120, %esi # imm = 0x120
movq %r14, %rdi
callq 0x6070
jmp 0x720e
jmp 0x720b
jmp 0x720b
movq %rdx, %rbp
movq %rax, %rdi
cmpl $0x3, %ebp
jne 0x7036
callq 0x6030
movq 0x7f53(%rip), %rdi # 0xef68
leaq 0x36f1(%rip), %rsi # 0xa70d
callq 0x61b0
movq %rax, %rdi
callq 0x6330
movb $0x1, %bpl
callq 0x6260
jmp 0x6e00
callq 0x6030
cmpl $0x1, %ebp
jne 0x70cf
movq %rax, %r13
movq 0x7f1a(%rip), %rdi # 0xef68
leaq 0x3686(%rip), %rsi # 0xa6db
callq 0x61b0
movq %rax, %rdi
movq %r12, %rsi
callq 0x61b0
leaq 0x366c(%rip), %rsi # 0xa6d8
movq %rax, %rdi
callq 0x61b0
leaq 0x3679(%rip), %rsi # 0xa6f4
movq %rax, %rdi
callq 0x61b0
movq %rax, %r12
movq 0x20(%r13), %rsi
leaq 0x8(%rsp), %rdi
callq 0x721a
movq 0x8(%rsp), %rsi
movq %r12, %rdi
callq 0x61b0
leaq 0x3194(%rip), %rsi # 0xa23c
movq %r12, %rdi
callq 0x61b0
movq %rax, %rdi
callq 0x6330
leaq 0x8(%rsp), %rdi
callq 0x7238
movb $0x1, %bpl
callq 0x6260
jmp 0x6e00
movq 0x7e92(%rip), %rdi # 0xef68
leaq 0x35d3(%rip), %rsi # 0xa6b0
callq 0x61b0
movq %rax, %rdi
movq %r12, %rsi
callq 0x61b0
leaq 0x35e4(%rip), %rsi # 0xa6d8
movq %rax, %rdi
callq 0x61b0
movb $0x1, %bpl
callq 0x6260
jmp 0x6e00
jmp 0x720b
jmp 0x7131
jmp 0x720b
movq %rax, %rbx
callq 0x6260
jmp 0x720e
movq %rax, %rbx
leaq 0x8(%rsp), %rdi
callq 0x7238
jmp 0x7134
movq %rax, %rbx
callq 0x6260
jmp 0x720e
movq %rax, %rbx
callq 0x6260
jmp 0x720e
jmp 0x720b
jmp 0x720b
movq %rax, %rdi
callq 0x6030
callq 0x6260
jmp 0x6d17
jmp 0x720b
movq %rax, %rbx
leaq 0x8(%rsp), %rdi
callq 0x7238
jmp 0x720e
jmp 0x720b
jmp 0x720b
movq %rax, %rbx
cmpl $0x1, %edx
jne 0x720e
movq %rbx, %rdi
callq 0x6030
movq %rax, %r14
movq 0x7dc6(%rip), %rdi # 0xef68
leaq 0x34b5(%rip), %rsi # 0xa65e
callq 0x61b0
movq %rax, %rbx
movq 0x20(%r14), %rsi
leaq 0x20(%rsp), %rdi
callq 0x721a
movq 0x20(%rsp), %rsi
movq %rbx, %rdi
callq 0x61b0
movq %rbx, %rdi
callq 0x6330
leaq 0x20(%rsp), %rdi
callq 0x7238
callq 0x6260
jmp 0x6b93
jmp 0x71ea
movq %rax, %rbx
jmp 0x71fc
movq %rax, %rbx
leaq 0x20(%rsp), %rdi
callq 0x7238
callq 0x6260
jmp 0x720e
movq %rax, %rdi
callq 0x735b
movq %rax, %rbx
movq %rbx, %rdi
callq 0x6210
|
/apache[P]xerces-c/tests/src/XSTSHarness/XSTSHarness.cpp
|
testing::internal::String::FormatIntWidth2[abi:cxx11](int)
|
std::string String::FormatIntWidth2(int value) {
std::stringstream ss;
ss << std::setfill('0') << std::setw(2) << value;
return ss.str();
}
|
subq $0x1e8, %rsp # imm = 0x1E8
movq %rdi, 0x18(%rsp)
movq %rdi, %rax
movq %rax, 0x20(%rsp)
movq %rdi, 0x1e0(%rsp)
movl %esi, 0x1dc(%rsp)
leaq 0x50(%rsp), %rdi
callq 0x83b0
leaq 0x60(%rsp), %rax
movq %rax, 0x28(%rsp)
movl $0x30, %edi
callq 0x2f400
movb %al, 0x37(%rsp)
jmp 0x10307
movq 0x28(%rsp), %rdi
movb 0x37(%rsp), %al
movb %al, 0x4f(%rsp)
movzbl 0x4f(%rsp), %esi
callq 0x8a60
movq %rax, 0x10(%rsp)
jmp 0x10325
movl $0x2, %edi
callq 0x2f420
movl %eax, 0xc(%rsp)
jmp 0x10335
movq 0x10(%rsp), %rdi
movl 0xc(%rsp), %eax
movl %eax, 0x38(%rsp)
movl 0x38(%rsp), %esi
callq 0x86f0
movq %rax, (%rsp)
jmp 0x10351
movq (%rsp), %rdi
movl 0x1dc(%rsp), %esi
callq 0x8b70
jmp 0x10363
movq 0x18(%rsp), %rdi
leaq 0x50(%rsp), %rsi
callq 0x8550
jmp 0x10374
leaq 0x50(%rsp), %rdi
callq 0x8420
movq 0x20(%rsp), %rax
addq $0x1e8, %rsp # imm = 0x1E8
retq
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x40(%rsp)
movl %eax, 0x3c(%rsp)
leaq 0x50(%rsp), %rdi
callq 0x8420
movq 0x40(%rsp), %rdi
callq 0x8ba0
nopl (%rax)
|
/scientific-systems[P]fmt/test/gmock-gtest-all.cc
|
testing::ValidateTestPropertyName(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, std::vector<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, std::allocator<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>> const&)
|
bool ValidateTestPropertyName(const std::string& property_name,
const std::vector<std::string>& reserved_names) {
if (std::find(reserved_names.begin(), reserved_names.end(), property_name) !=
reserved_names.end()) {
ADD_FAILURE() << "Reserved key used in RecordProperty(): " << property_name
<< " (" << FormatWordList(reserved_names)
<< " are reserved by " << GTEST_NAME_ << ")";
return false;
}
return true;
}
|
subq $0xb8, %rsp
movq %rdi, 0xa8(%rsp)
movq %rsi, 0xa0(%rsp)
movq 0xa0(%rsp), %rdi
callq 0x2fba0
movq %rax, 0x90(%rsp)
movq 0xa0(%rsp), %rdi
callq 0x2fbd0
movq %rax, 0x88(%rsp)
movq 0xa8(%rsp), %rdx
movq 0x90(%rsp), %rdi
movq 0x88(%rsp), %rsi
callq 0x2fb40
movq %rax, 0x98(%rsp)
movq 0xa0(%rsp), %rdi
callq 0x2fbd0
movq %rax, 0x80(%rsp)
leaq 0x98(%rsp), %rdi
leaq 0x80(%rsp), %rsi
callq 0x2fb00
testb $0x1, %al
jne 0x10b19
jmp 0x10c8c
leaq 0x78(%rsp), %rdi
movq %rdi, 0x30(%rsp)
callq 0xca70
movq 0x30(%rsp), %rdi
leaq 0x3fcf0(%rip), %rsi # 0x50824
callq 0x2fc00
movq %rax, 0x38(%rsp)
jmp 0x10b40
movq 0x38(%rsp), %rdi
movq 0xa8(%rsp), %rsi
callq 0x2d960
movq %rax, 0x28(%rsp)
jmp 0x10b59
movq 0x28(%rsp), %rdi
leaq 0x41b3e(%rip), %rsi # 0x526a3
callq 0x2e300
movq %rax, 0x20(%rsp)
jmp 0x10b71
movq 0xa0(%rsp), %rsi
leaq 0x48(%rsp), %rdi
callq 0x10cb0
jmp 0x10b85
movq 0x20(%rsp), %rdi
leaq 0x48(%rsp), %rsi
callq 0x2d960
movq %rax, 0x18(%rsp)
jmp 0x10b9b
movq 0x18(%rsp), %rdi
leaq 0x3fca5(%rip), %rsi # 0x5084c
callq 0x2fc40
movq %rax, 0x10(%rsp)
jmp 0x10bb3
movq 0x10(%rsp), %rdi
leaq 0x3fc9f(%rip), %rsi # 0x5085e
callq 0x2e220
movq %rax, 0x8(%rsp)
jmp 0x10bcb
movq 0x8(%rsp), %rdi
leaq 0x410dd(%rip), %rsi # 0x51cb4
callq 0x2d9a0
movq %rax, (%rsp)
jmp 0x10be2
leaq 0x3f996(%rip), %rdx # 0x5057f
leaq 0x3fc7a(%rip), %r8 # 0x5086a
leaq 0x40(%rsp), %rdi
movl $0x1, %esi
movl $0xcea, %ecx # imm = 0xCEA
callq 0x9ba0
jmp 0x10c06
movq (%rsp), %rsi
leaq 0x40(%rsp), %rdi
callq 0x9c70
jmp 0x10c16
leaq 0x40(%rsp), %rdi
callq 0x9c30
leaq 0x48(%rsp), %rdi
callq 0x8d18
leaq 0x78(%rsp), %rdi
callq 0x2dee0
movb $0x0, 0xb7(%rsp)
jmp 0x10c94
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x70(%rsp)
movl %eax, 0x6c(%rsp)
jmp 0x10c80
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x70(%rsp)
movl %eax, 0x6c(%rsp)
jmp 0x10c76
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x70(%rsp)
movl %eax, 0x6c(%rsp)
leaq 0x40(%rsp), %rdi
callq 0x9c30
leaq 0x48(%rsp), %rdi
callq 0x8d18
leaq 0x78(%rsp), %rdi
callq 0x2dee0
jmp 0x10ca5
movb $0x1, 0xb7(%rsp)
movb 0xb7(%rsp), %al
andb $0x1, %al
addq $0xb8, %rsp
retq
movq 0x70(%rsp), %rdi
callq 0x8ba0
nop
|
/scientific-systems[P]fmt/test/gmock-gtest-all.cc
|
testing::TestInfo::TestInfo(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, char const*, char const*, void const*, testing::internal::TestFactoryBase*)
|
TestInfo::TestInfo(const std::string& a_test_case_name,
const std::string& a_name,
const char* a_type_param,
const char* a_value_param,
internal::TypeId fixture_class_id,
internal::TestFactoryBase* factory)
: test_case_name_(a_test_case_name),
name_(a_name),
type_param_(a_type_param ? new std::string(a_type_param) : NULL),
value_param_(a_value_param ? new std::string(a_value_param) : NULL),
fixture_class_id_(fixture_class_id),
should_run_(false),
is_disabled_(false),
matches_filter_(false),
factory_(factory),
result_() {}
|
subq $0xc8, %rsp
movq 0xd0(%rsp), %rax
movq %rdi, 0xc0(%rsp)
movq %rsi, 0xb8(%rsp)
movq %rdx, 0xb0(%rsp)
movq %rcx, 0xa8(%rsp)
movq %r8, 0xa0(%rsp)
movq %r9, 0x98(%rsp)
movq 0xc0(%rsp), %rdi
movq %rdi, 0x58(%rsp)
movq %rdi, %rax
movq %rax, 0x50(%rsp)
movq 0xb8(%rsp), %rsi
callq 0x8230
movq 0x58(%rsp), %rdi
addq $0x20, %rdi
movq %rdi, 0x60(%rsp)
movq 0xb0(%rsp), %rsi
callq 0x8230
jmp 0x11f6e
movq 0x50(%rsp), %rax
addq $0x40, %rax
movq %rax, 0x48(%rsp)
movq 0xa8(%rsp), %rax
movb $0x0, 0x7f(%rsp)
movb $0x0, 0x7d(%rsp)
cmpq $0x0, %rax
je 0x11fff
movl $0x20, %edi
callq 0x8580
movq %rax, 0x40(%rsp)
jmp 0x11fa5
movq 0x40(%rsp), %rax
movq %rax, 0x80(%rsp)
movb $0x1, 0x7f(%rsp)
movq 0xa8(%rsp), %rax
movq %rax, 0x30(%rsp)
leaq 0x7e(%rsp), %rdi
movq %rdi, 0x38(%rsp)
callq 0x8bb0
movq 0x40(%rsp), %rdi
movq 0x30(%rsp), %rsi
movq 0x38(%rsp), %rdx
movb $0x1, 0x7d(%rsp)
callq 0x8910
jmp 0x11fee
movq 0x40(%rsp), %rax
movb $0x0, 0x7f(%rsp)
movq %rax, 0x28(%rsp)
jmp 0x12008
xorl %eax, %eax
movq %rax, 0x28(%rsp)
jmp 0x12008
movq 0x48(%rsp), %rdi
movq 0x28(%rsp), %rsi
callq 0x30710
jmp 0x12019
testb $0x1, 0x7d(%rsp)
jne 0x12022
jmp 0x1202c
leaq 0x7e(%rsp), %rdi
callq 0x8640
movq 0x50(%rsp), %rax
addq $0x48, %rax
movq %rax, 0x20(%rsp)
movq 0xa0(%rsp), %rax
movb $0x0, 0x6f(%rsp)
movb $0x0, 0x6d(%rsp)
cmpq $0x0, %rax
je 0x120b9
movl $0x20, %edi
callq 0x8580
movq %rax, 0x18(%rsp)
jmp 0x12063
movq 0x18(%rsp), %rax
movq %rax, 0x70(%rsp)
movb $0x1, 0x6f(%rsp)
movq 0xa0(%rsp), %rax
movq %rax, 0x8(%rsp)
leaq 0x6e(%rsp), %rdi
movq %rdi, 0x10(%rsp)
callq 0x8bb0
movq 0x18(%rsp), %rdi
movq 0x8(%rsp), %rsi
movq 0x10(%rsp), %rdx
movb $0x1, 0x6d(%rsp)
callq 0x8910
jmp 0x120a9
movq 0x18(%rsp), %rax
movb $0x0, 0x6f(%rsp)
movq %rax, (%rsp)
jmp 0x120c1
xorl %eax, %eax
movq %rax, (%rsp)
jmp 0x120c1
movq 0x20(%rsp), %rdi
movq (%rsp), %rsi
callq 0x30710
jmp 0x120d1
testb $0x1, 0x6d(%rsp)
jne 0x120da
jmp 0x120e4
leaq 0x6e(%rsp), %rdi
callq 0x8640
movq 0x50(%rsp), %rdi
movq 0x98(%rsp), %rax
movq %rax, 0x50(%rdi)
movb $0x0, 0x58(%rdi)
movb $0x0, 0x59(%rdi)
movb $0x0, 0x5a(%rdi)
movq 0xd0(%rsp), %rax
movq %rax, 0x60(%rdi)
addq $0x68, %rdi
callq 0x104e0
jmp 0x12118
addq $0xc8, %rsp
retq
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x90(%rsp)
movl %eax, 0x8c(%rsp)
jmp 0x12215
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x90(%rsp)
movl %eax, 0x8c(%rsp)
jmp 0x1220b
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x90(%rsp)
movl %eax, 0x8c(%rsp)
testb $0x1, 0x7d(%rsp)
jne 0x1216f
jmp 0x12179
leaq 0x7e(%rsp), %rdi
callq 0x8640
testb $0x1, 0x7f(%rsp)
jne 0x12182
jmp 0x1218f
movq 0x80(%rsp), %rdi
callq 0x8520
jmp 0x1220b
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x90(%rsp)
movl %eax, 0x8c(%rsp)
jmp 0x12201
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x90(%rsp)
movl %eax, 0x8c(%rsp)
testb $0x1, 0x6d(%rsp)
jne 0x121c4
jmp 0x121ce
leaq 0x6e(%rsp), %rdi
callq 0x8640
testb $0x1, 0x6f(%rsp)
jne 0x121d7
jmp 0x121e1
movq 0x70(%rsp), %rdi
callq 0x8520
jmp 0x12201
movq 0x20(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x90(%rsp)
movl %eax, 0x8c(%rsp)
callq 0x30730
movq 0x48(%rsp), %rdi
callq 0x30730
movq 0x60(%rsp), %rdi
callq 0x8d18
movq 0x58(%rsp), %rdi
callq 0x8d18
movq 0x90(%rsp), %rdi
callq 0x8ba0
nopl (%rax)
|
/scientific-systems[P]fmt/test/gmock-gtest-all.cc
|
testing::internal::ReportInvalidTestCaseType(char const*, char const*, int)
|
void ReportInvalidTestCaseType(const char* test_case_name,
const char* file, int line) {
Message errors;
errors
<< "Attempted redefinition of test case " << test_case_name << ".\n"
<< "All tests in the same test case must use the same test fixture\n"
<< "class. However, in test case " << test_case_name << ", you tried\n"
<< "to define a test using a fixture class different from the one\n"
<< "used earlier. This can happen if the two fixture classes are\n"
<< "from different namespaces and have the same name. You should\n"
<< "probably rename one of the classes to put the tests into different\n"
<< "test cases.";
fprintf(stderr, "%s %s", FormatFileLocation(file, line).c_str(),
errors.GetString().c_str());
}
|
subq $0xe8, %rsp
movq %rdi, 0xe0(%rsp)
movq %rsi, 0xd8(%rsp)
movl %edx, 0xd4(%rsp)
leaq 0xc8(%rsp), %rdi
movq %rdi, 0x68(%rsp)
callq 0xca70
movq 0x68(%rsp), %rdi
leaq 0x3e625(%rip), %rsi # 0x50ae1
callq 0x308e0
movq %rax, 0x70(%rsp)
jmp 0x124c8
movq 0x70(%rsp), %rdi
leaq 0xe0(%rsp), %rsi
callq 0x2e180
movq %rax, 0x60(%rsp)
jmp 0x124e1
movq 0x60(%rsp), %rdi
leaq 0x3e898(%rip), %rsi # 0x50d85
callq 0x2e300
movq %rax, 0x58(%rsp)
jmp 0x124f9
movq 0x58(%rsp), %rdi
leaq 0x3e36c(%rip), %rsi # 0x50871
callq 0x30210
movq %rax, 0x50(%rsp)
jmp 0x12511
movq 0x50(%rsp), %rdi
leaq 0x3e470(%rip), %rsi # 0x5098d
callq 0x303e0
movq %rax, 0x48(%rsp)
jmp 0x12529
movq 0x48(%rsp), %rdi
leaq 0xe0(%rsp), %rsi
callq 0x2e180
movq %rax, 0x40(%rsp)
jmp 0x12542
movq 0x40(%rsp), %rdi
leaq 0x3e5b8(%rip), %rsi # 0x50b06
callq 0x30920
movq %rax, 0x38(%rsp)
jmp 0x1255a
movq 0x38(%rsp), %rdi
leaq 0x3e5ad(%rip), %rsi # 0x50b13
callq 0x30420
movq %rax, 0x30(%rsp)
jmp 0x12572
movq 0x30(%rsp), %rdi
leaq 0x3e5d4(%rip), %rsi # 0x50b52
callq 0x303a0
movq %rax, 0x28(%rsp)
jmp 0x1258a
movq 0x28(%rsp), %rdi
leaq 0x3e5fa(%rip), %rsi # 0x50b90
callq 0x303a0
movq %rax, 0x20(%rsp)
jmp 0x125a2
movq 0x20(%rsp), %rdi
leaq 0x3e620(%rip), %rsi # 0x50bce
callq 0x30960
movq %rax, 0x18(%rsp)
jmp 0x125ba
movq 0x18(%rsp), %rdi
leaq 0x3e4ee(%rip), %rsi # 0x50ab4
callq 0x2e220
jmp 0x125cd
movq 0x5a9ec(%rip), %rax # 0x6cfc0
movq (%rax), %rax
movq %rax, 0x10(%rsp)
movq 0xd8(%rsp), %rsi
movl 0xd4(%rsp), %edx
leaq 0x98(%rsp), %rdi
callq 0x126d0
jmp 0x125fa
leaq 0x98(%rsp), %rdi
callq 0x8220
movq %rax, 0x8(%rsp)
leaq 0x78(%rsp), %rdi
leaq 0xc8(%rsp), %rsi
callq 0xce50
jmp 0x12620
leaq 0x78(%rsp), %rdi
callq 0x8220
movq 0x10(%rsp), %rdi
movq 0x8(%rsp), %rdx
movq %rax, %rcx
leaq 0x3e5d4(%rip), %rsi # 0x50c12
movb $0x0, %al
callq 0x8970
leaq 0x78(%rsp), %rdi
callq 0x8d18
leaq 0x98(%rsp), %rdi
callq 0x8d18
leaq 0xc8(%rsp), %rdi
callq 0x2dee0
addq $0xe8, %rsp
retq
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0xc0(%rsp)
movl %eax, 0xbc(%rsp)
jmp 0x126a8
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0xc0(%rsp)
movl %eax, 0xbc(%rsp)
leaq 0x98(%rsp), %rdi
callq 0x8d18
leaq 0xc8(%rsp), %rdi
callq 0x2dee0
movq 0xc0(%rsp), %rdi
callq 0x8ba0
nopw %cs:(%rax,%rax)
|
/scientific-systems[P]fmt/test/gmock-gtest-all.cc
|
testing::TestPartResult::~TestPartResult()
|
class GTEST_API_ TestPartResult {
public:
// The possible outcomes of a test part (i.e. an assertion or an
// explicit SUCCEED(), FAIL(), or ADD_FAILURE()).
enum Type {
kSuccess, // Succeeded.
kNonFatalFailure, // Failed but the test can continue.
kFatalFailure // Failed and the test should be terminated.
};
// C'tor. TestPartResult does NOT have a default constructor.
// Always use this constructor (with parameters) to create a
// TestPartResult object.
TestPartResult(Type a_type,
const char* a_file_name,
int a_line_number,
const char* a_message)
: type_(a_type),
file_name_(a_file_name == NULL ? "" : a_file_name),
line_number_(a_line_number),
summary_(ExtractSummary(a_message)),
message_(a_message) {
}
// Gets the outcome of the test part.
Type type() const { return type_; }
// Gets the name of the source file where the test part took place, or
// NULL if it's unknown.
const char* file_name() const {
return file_name_.empty() ? NULL : file_name_.c_str();
}
// Gets the line in the source file where the test part took place,
// or -1 if it's unknown.
int line_number() const { return line_number_; }
// Gets the summary of the failure message.
const char* summary() const { return summary_.c_str(); }
// Gets the message associated with the test part.
const char* message() const { return message_.c_str(); }
// Returns true iff the test part passed.
bool passed() const { return type_ == kSuccess; }
// Returns true iff the test part failed.
bool failed() const { return type_ != kSuccess; }
// Returns true iff the test part non-fatally failed.
bool nonfatally_failed() const { return type_ == kNonFatalFailure; }
// Returns true iff the test part fatally failed.
bool fatally_failed() const { return type_ == kFatalFailure; }
private:
Type type_;
// Gets the summary of the failure message by omitting the stack
// trace in it.
static std::string ExtractSummary(const char* message);
// The name of the source file where the test part took place, or
// "" if the source file is unknown.
std::string file_name_;
// The line in the source file where the test part took place, or -1
// if the line number is unknown.
int line_number_;
std::string summary_; // The test failure summary.
std::string message_; // The test failure message.
}
|
subq $0x18, %rsp
movq %rdi, 0x10(%rsp)
movq 0x10(%rsp), %rdi
movq %rdi, 0x8(%rsp)
addq $0x50, %rdi
callq 0x8d18
movq 0x8(%rsp), %rdi
addq $0x30, %rdi
callq 0x8d18
movq 0x8(%rsp), %rdi
addq $0x8, %rdi
callq 0x8d18
addq $0x18, %rsp
retq
nopl (%rax)
|
/scientific-systems[P]fmt/test/gtest/gtest.h
|
testing::internal::ScopedPrematureExitFile::ScopedPrematureExitFile(char const*)
|
explicit ScopedPrematureExitFile(const char* premature_exit_filepath)
: premature_exit_filepath_(premature_exit_filepath) {
// If a path to the premature-exit file is specified...
if (premature_exit_filepath != NULL && *premature_exit_filepath != '\0') {
// create the file with a single "0" character in it. I/O
// errors are ignored as there's nothing better we can do and we
// don't want to fail the test because of this.
FILE* pfile = posix::FOpen(premature_exit_filepath, "w");
fwrite("0", 1, 1, pfile);
fclose(pfile);
}
}
|
subq $0x18, %rsp
movq %rdi, 0x10(%rsp)
movq %rsi, 0x8(%rsp)
movq 0x10(%rsp), %rax
movq 0x8(%rsp), %rcx
movq %rcx, (%rax)
cmpq $0x0, 0x8(%rsp)
je 0x32586
movq 0x8(%rsp), %rax
movsbl (%rax), %eax
cmpl $0x0, %eax
je 0x32586
movq 0x8(%rsp), %rdi
leaq 0x1f70f(%rip), %rsi # 0x51c6b
callq 0x31a60
movq %rax, (%rsp)
movq (%rsp), %rcx
leaq 0x1ff42(%rip), %rdi # 0x524b2
movl $0x1, %edx
movq %rdx, %rsi
callq 0x8cc0
movq (%rsp), %rdi
callq 0x8570
addq $0x18, %rsp
retq
nopl (%rax,%rax)
|
/scientific-systems[P]fmt/test/gmock-gtest-all.cc
|
bool testing::internal::HandleExceptionsInMethodIfSupported<testing::internal::UnitTestImpl, bool>(testing::internal::UnitTestImpl*, bool (testing::internal::UnitTestImpl::*)(), char const*)
|
Result HandleExceptionsInMethodIfSupported(
T* object, Result (T::*method)(), const char* location) {
// NOTE: The user code can affect the way in which Google Test handles
// exceptions by setting GTEST_FLAG(catch_exceptions), but only before
// RUN_ALL_TESTS() starts. It is technically possible to check the flag
// after the exception is caught and either report or re-throw the
// exception based on the flag's value:
//
// try {
// // Perform the test method.
// } catch (...) {
// if (GTEST_FLAG(catch_exceptions))
// // Report the exception as failure.
// else
// throw; // Re-throws the original exception.
// }
//
// However, the purpose of this flag is to allow the program to drop into
// the debugger when the exception is thrown. On most platforms, once the
// control enters the catch block, the exception origin information is
// lost and the debugger will stop the program at the point of the
// re-throw in this function -- instead of at the point of the original
// throw statement in the code under test. For this reason, we perform
// the check early, sacrificing the ability to affect Google Test's
// exception handling in the method where the exception is thrown.
if (internal::GetUnitTestImpl()->catch_exceptions()) {
#if GTEST_HAS_EXCEPTIONS
try {
return HandleSehExceptionsInMethodIfSupported(object, method, location);
} catch (const internal::GoogleTestFailureException&) { // NOLINT
// This exception type can only be thrown by a failed Google
// Test assertion with the intention of letting another testing
// framework catch it. Therefore we just re-throw it.
throw;
} catch (const std::exception& e) { // NOLINT
internal::ReportFailureInUnknownLocation(
TestPartResult::kFatalFailure,
FormatCxxExceptionMessage(e.what(), location));
} catch (...) { // NOLINT
internal::ReportFailureInUnknownLocation(
TestPartResult::kFatalFailure,
FormatCxxExceptionMessage(NULL, location));
}
return static_cast<Result>(0);
#else
return HandleSehExceptionsInMethodIfSupported(object, method, location);
#endif // GTEST_HAS_EXCEPTIONS
} else {
return (object->*method)();
}
}
|
subq $0xc8, %rsp
movq %rsi, 0xb0(%rsp)
movq %rdx, 0xb8(%rsp)
movq 0xb0(%rsp), %rax
movq 0xb8(%rsp), %rdx
movq %rdi, 0xa8(%rsp)
movq %rdx, 0xa0(%rsp)
movq %rax, 0x98(%rsp)
movq %rcx, 0x90(%rsp)
callq 0x2d8f0
movq %rax, %rdi
callq 0x45340
testb $0x1, %al
jne 0x3261d
jmp 0x327eb
movq 0xa8(%rsp), %rdi
movq 0x98(%rsp), %rax
movq 0xa0(%rsp), %rdx
movq 0x90(%rsp), %rcx
movq %rdx, 0x88(%rsp)
movq %rax, 0x80(%rsp)
movq 0x80(%rsp), %rsi
movq 0x88(%rsp), %rdx
callq 0x47cf0
movb %al, 0x1f(%rsp)
jmp 0x32668
movb 0x1f(%rsp), %al
andb $0x1, %al
movb %al, 0xc7(%rsp)
jmp 0x32852
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x78(%rsp)
movl %eax, 0x74(%rsp)
movl 0x74(%rsp), %eax
movl %eax, 0x18(%rsp)
movl $0x3, %ecx
cmpl %ecx, %eax
jne 0x326b2
movq 0x78(%rsp), %rdi
callq 0x8210
movq %rax, 0x20(%rsp)
callq 0x89a0
jmp 0x32875
movl 0x18(%rsp), %eax
movl $0x2, %ecx
cmpl %ecx, %eax
jne 0x32718
movq 0x78(%rsp), %rdi
callq 0x8210
movq %rax, 0x48(%rsp)
movq 0x48(%rsp), %rdi
movq (%rdi), %rax
movq 0x10(%rax), %rax
callq *%rax
movq %rax, %rsi
movq 0x90(%rsp), %rdx
leaq 0x28(%rsp), %rdi
callq 0x2b7a0
jmp 0x326f3
movl $0x2, %edi
leaq 0x28(%rsp), %rsi
callq 0x113f0
jmp 0x32704
leaq 0x28(%rsp), %rdi
callq 0x8d18
callq 0x8af0
jmp 0x327e1
movq 0x78(%rsp), %rdi
callq 0x8210
movq 0x90(%rsp), %rdx
xorl %eax, %eax
movl %eax, %esi
leaq 0x50(%rsp), %rdi
callq 0x2b7a0
jmp 0x3273a
movl $0x2, %edi
leaq 0x50(%rsp), %rsi
callq 0x113f0
jmp 0x3274b
leaq 0x50(%rsp), %rdi
callq 0x8d18
callq 0x8af0
jmp 0x327e1
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x78(%rsp)
movl %eax, 0x74(%rsp)
jmp 0x32787
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x78(%rsp)
movl %eax, 0x74(%rsp)
leaq 0x50(%rsp), %rdi
callq 0x8d18
callq 0x8af0
jmp 0x3278e
jmp 0x32863
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x78(%rsp)
movl %eax, 0x74(%rsp)
jmp 0x327bb
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x78(%rsp)
movl %eax, 0x74(%rsp)
leaq 0x28(%rsp), %rdi
callq 0x8d18
callq 0x8af0
jmp 0x327c2
jmp 0x32863
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x78(%rsp)
movl %eax, 0x74(%rsp)
callq 0x8af0
jmp 0x327dc
jmp 0x32863
movb $0x0, 0xc7(%rsp)
jmp 0x32852
movq 0xa8(%rsp), %rcx
movq 0x98(%rsp), %rax
movq %rax, 0x8(%rsp)
movq 0xa0(%rsp), %rdx
addq %rdx, %rcx
movq %rcx, 0x10(%rsp)
andq $0x1, %rax
cmpq $0x0, %rax
je 0x32835
movq 0x8(%rsp), %rcx
movq 0x10(%rsp), %rax
movq (%rax), %rax
subq $0x1, %rcx
movq (%rax,%rcx), %rax
movq %rax, (%rsp)
jmp 0x3283e
movq 0x8(%rsp), %rax
movq %rax, (%rsp)
movq 0x10(%rsp), %rdi
movq (%rsp), %rax
callq *%rax
andb $0x1, %al
movb %al, 0xc7(%rsp)
movb 0xc7(%rsp), %al
andb $0x1, %al
addq $0xc8, %rsp
retq
movq 0x78(%rsp), %rdi
callq 0x8ba0
movq %rax, %rdi
callq 0x2d900
nopw %cs:(%rax,%rax)
nop
|
/scientific-systems[P]fmt/test/gmock-gtest-all.cc
|
Gudhi::Persistence_representations::Persistence_landscape::multiply_lanscape_by_real_number_not_overwrite(double) const
|
Persistence_landscape Persistence_landscape::multiply_lanscape_by_real_number_not_overwrite(double x) const {
std::vector<std::vector<std::pair<double, double> > > result(this->land.size());
for (size_t dim = 0; dim != this->land.size(); ++dim) {
std::vector<std::pair<double, double> > lambda_dim(this->land[dim].size());
for (size_t i = 0; i != this->land[dim].size(); ++i) {
lambda_dim[i] = std::make_pair(this->land[dim][i].first, x * this->land[dim][i].second);
}
result[dim] = lambda_dim;
}
Persistence_landscape res;
// CHANGE
// res.land = result;
res.land.swap(result);
return res;
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movsd %xmm0, 0x28(%rsp)
movq %rsi, %r14
movq 0x8(%rsi), %rsi
subq (%r14), %rsi
movq %rdi, 0x20(%rsp)
sarq $0x3, %rsi
movabsq $-0x5555555555555555, %rbp # imm = 0xAAAAAAAAAAAAAAAB
imulq %rbp, %rsi
leaq 0x30(%rsp), %rdi
leaq 0x8(%rsp), %rdx
callq 0x6070
movq (%r14), %rax
cmpq %rax, 0x8(%r14)
je 0x47e0
xorl %ebx, %ebx
leaq 0x8(%rsp), %r15
leaq 0x7(%rsp), %r12
leaq (%rbx,%rbx,2), %r13
movq 0x8(%rax,%r13,8), %rsi
subq (%rax,%r13,8), %rsi
sarq $0x4, %rsi
movq %r15, %rdi
movq %r12, %rdx
callq 0x5ebe
movq (%r14), %rcx
movq (%rcx,%r13,8), %rax
movq 0x8(%rcx,%r13,8), %rcx
subq %rax, %rcx
movsd 0x28(%rsp), %xmm2
je 0x4797
sarq $0x4, %rcx
movl $0x8, %edx
movq 0x8(%rsp), %rsi
movsd (%rax,%rdx), %xmm0
mulsd %xmm2, %xmm0
movsd -0x8(%rax,%rdx), %xmm1
movsd %xmm1, -0x8(%rsi,%rdx)
movsd %xmm0, (%rsi,%rdx)
addq $0x10, %rdx
decq %rcx
jne 0x4774
shlq $0x3, %r13
addq 0x30(%rsp), %r13
movq %r13, %rdi
movq %r15, %rsi
callq 0x5f34
movq 0x8(%rsp), %rdi
testq %rdi, %rdi
je 0x47c2
movq 0x18(%rsp), %rsi
subq %rdi, %rsi
callq 0x2240
incq %rbx
movq (%r14), %rax
movq 0x8(%r14), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
imulq %rbp, %rcx
cmpq %rcx, %rbx
jne 0x4733
xorpd %xmm0, %xmm0
movq 0x20(%rsp), %rbx
movupd %xmm0, 0x18(%rbx)
leaq 0x30(%rsp), %rdi
movaps (%rdi), %xmm1
movups %xmm1, (%rbx)
movq 0x10(%rdi), %rax
movq %rax, 0x10(%rbx)
movapd %xmm0, (%rdi)
movq $0x0, 0x10(%rdi)
callq 0x5e6a
movq %rbx, %rax
addq $0x48, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
jmp 0x4843
movq %rax, %rbx
movq 0x8(%rsp), %rdi
testq %rdi, %rdi
je 0x4843
movq 0x18(%rsp), %rsi
subq %rdi, %rsi
callq 0x2240
leaq 0x30(%rsp), %rdi
callq 0x5e6a
movq %rbx, %rdi
callq 0x2380
nop
|
/GUDHI[P]gudhi-devel/src/Persistence_representations/include/gudhi/Persistence_landscape.h
|
archs_enable
|
static void archs_enable(void)
{
static bool initialized = false;
if (initialized)
return;
#ifdef CAPSTONE_HAS_ARM
ARM_enable();
#endif
#ifdef CAPSTONE_HAS_ARM64
AArch64_enable();
#endif
#ifdef CAPSTONE_HAS_MIPS
Mips_enable();
#endif
#ifdef CAPSTONE_HAS_POWERPC
PPC_enable();
#endif
#ifdef CAPSTONE_HAS_SPARC
Sparc_enable();
#endif
#ifdef CAPSTONE_HAS_SYSZ
SystemZ_enable();
#endif
#ifdef CAPSTONE_HAS_X86
X86_enable();
#endif
#ifdef CAPSTONE_HAS_XCORE
XCore_enable();
#endif
initialized = true;
}
|
cmpb $0x0, 0x254973(%rip) # 0x298f14
jne 0x445d7
pushq %rax
callq 0x458dc
callq 0x45a0c
callq 0x45adc
callq 0x45bd0
callq 0x48048
callq 0x48124
callq 0x45cac
callq 0x481f4
movb $0x1, 0x254941(%rip) # 0x298f14
addq $0x8, %rsp
retq
|
/radare[P]capstone/cs.c
|
cs_support
|
CAPSTONE_EXPORT
bool cs_support(int query)
{
archs_enable();
if (query == CS_ARCH_ALL)
return all_arch == ((1 << CS_ARCH_ARM) | (1 << CS_ARCH_ARM64) |
(1 << CS_ARCH_MIPS) | (1 << CS_ARCH_X86) |
(1 << CS_ARCH_PPC) | (1 << CS_ARCH_SPARC) |
(1 << CS_ARCH_SYSZ) | (1 << CS_ARCH_XCORE));
if ((unsigned int)query < CS_ARCH_MAX)
return all_arch & (1 << query);
if (query == CS_SUPPORT_DIET) {
#ifdef CAPSTONE_DIET
return true;
#else
return false;
#endif
}
if (query == CS_SUPPORT_X86_REDUCE) {
#if defined(CAPSTONE_HAS_X86) && defined(CAPSTONE_X86_REDUCE)
return true;
#else
return false;
#endif
}
// unsupported query
return false;
}
|
pushq %rbx
movl %edi, %ebx
callq 0x4459a
cmpl $0xffff, %ebx # imm = 0xFFFF
jne 0x445f7
cmpl $0xff, 0x25491e(%rip) # 0x298f10
sete %al
jmp 0x4460c
cmpl $0x7, %ebx
ja 0x4460a
movl 0x25490e(%rip), %eax # 0x298f10
btl %ebx, %eax
setb %al
jmp 0x4460c
xorl %eax, %eax
popq %rbx
retq
|
/radare[P]capstone/cs.c
|
cs_close
|
CAPSTONE_EXPORT
cs_err cs_close(csh *handle)
{
struct cs_struct *ud;
if (*handle == 0)
// invalid handle
return CS_ERR_CSH;
ud = (struct cs_struct *)(*handle);
if (ud->printer_info)
cs_mem_free(ud->printer_info);
cs_mem_free(ud->insn_cache);
memset(ud, 0, sizeof(*ud));
cs_mem_free(ud);
// invalidate this handle by ZERO out its value.
// this is to make sure it is unusable after cs_close()
*handle = 0;
return CS_ERR_OK;
}
|
pushq %rbp
pushq %r14
pushq %rbx
movq (%rdi), %r14
testq %r14, %r14
je 0x44791
movq %rdi, %rbx
movq 0x10(%r14), %rdi
testq %rdi, %rdi
je 0x44764
callq *0x160964(%rip) # 0x1a50c8
movq 0xf0(%r14), %rdi
callq *0x160957(%rip) # 0x1a50c8
xorl %ebp, %ebp
movl $0x128, %edx # imm = 0x128
movq %r14, %rdi
xorl %esi, %esi
callq 0x440c0
movq %r14, %rdi
callq *0x16093d(%rip) # 0x1a50c8
andq $0x0, (%rbx)
jmp 0x44794
pushq $0x4
popq %rbp
movl %ebp, %eax
popq %rbx
popq %r14
popq %rbp
retq
|
/radare[P]capstone/cs.c
|
cs_option
|
CAPSTONE_EXPORT
cs_err cs_option(csh ud, cs_opt_type type, size_t value)
{
struct cs_struct *handle;
archs_enable();
// cs_option() can be called with NULL handle just for CS_OPT_MEM
// This is supposed to be executed before all other APIs (even cs_open())
if (type == CS_OPT_MEM) {
cs_opt_mem *mem = (cs_opt_mem *)value;
cs_mem_malloc = mem->malloc;
cs_mem_calloc = mem->calloc;
cs_mem_realloc = mem->realloc;
cs_mem_free = mem->free;
cs_vsnprintf = mem->vsnprintf;
return CS_ERR_OK;
}
handle = (struct cs_struct *)(uintptr_t)ud;
if (!handle)
return CS_ERR_CSH;
switch(type) {
default:
break;
case CS_OPT_DETAIL:
handle->detail = value;
return CS_ERR_OK;
case CS_OPT_SKIPDATA:
handle->skipdata = (value == CS_OPT_ON);
if (handle->skipdata) {
if (handle->skipdata_size == 0) {
// set the default skipdata size
handle->skipdata_size = skipdata_size(handle);
}
}
return CS_ERR_OK;
case CS_OPT_SKIPDATA_SETUP:
if (value)
handle->skipdata_setup = *((cs_opt_skipdata *)value);
return CS_ERR_OK;
}
return arch_option[handle->arch](handle, type, value);
}
|
pushq %rbp
pushq %r14
pushq %rbx
movq %rdx, %r14
movl %esi, %ebp
movq %rdi, %rbx
callq 0x4459a
cmpl $0x4, %ebp
jne 0x447ee
movq (%r14), %rax
movq %rax, 0x1608f5(%rip) # 0x1a50b0
movq 0x8(%r14), %rax
movq %rax, 0x1608f2(%rip) # 0x1a50b8
movq 0x10(%r14), %rax
movq %rax, 0x1608ef(%rip) # 0x1a50c0
movq 0x18(%r14), %rax
movq %rax, 0x1608ec(%rip) # 0x1a50c8
movq 0x20(%r14), %rax
movq %rax, 0x1608e9(%rip) # 0x1a50d0
xorl %eax, %eax
jmp 0x4489f
testq %rbx, %rbx
je 0x4480b
cmpl $0x6, %ebp
je 0x44847
cmpl $0x5, %ebp
je 0x44813
cmpl $0x2, %ebp
jne 0x44866
movl %r14d, 0xe0(%rbx)
jmp 0x447e7
pushq $0x4
popq %rax
jmp 0x4489f
xorl %eax, %eax
cmpq $0x3, %r14
sete 0x100(%rbx)
jne 0x4489f
cmpb $0x0, 0x101(%rbx)
jne 0x4489f
movl (%rbx), %ecx
cmpq $0x7, %rcx
ja 0x44897
leaq 0x7c982(%rip), %rdx # 0xc11bc
movslq (%rdx,%rcx,4), %rcx
addq %rdx, %rcx
jmpq *%rcx
movb $0x4, %cl
jmp 0x44899
xorl %eax, %eax
testq %r14, %r14
je 0x4489f
movq 0x10(%r14), %rcx
movq %rcx, 0x118(%rbx)
movups (%r14), %xmm0
movups %xmm0, 0x108(%rbx)
jmp 0x4489f
movl (%rbx), %eax
leaq 0x254621(%rip), %rcx # 0x298e90
movq (%rcx,%rax,8), %rax
movq %rbx, %rdi
movl %ebp, %esi
movq %r14, %rdx
popq %rbx
popq %r14
popq %rbp
jmpq *%rax
movb $0x2, %cl
jmp 0x44899
testb $0x10, 0x4(%rbx)
sete %cl
addb %cl, %cl
addb $0x2, %cl
jmp 0x44899
movb $0x1, %cl
jmp 0x44899
movb $-0x1, %cl
movb %cl, 0x101(%rbx)
popq %rbx
popq %r14
popq %rbp
retq
|
/radare[P]capstone/cs.c
|
fill_insn
|
static void fill_insn(struct cs_struct *handle, cs_insn *insn, char *buffer, MCInst *mci,
PostPrinter_t postprinter, const uint8_t *code)
{
#ifndef CAPSTONE_DIET
char *sp, *mnem;
#endif
unsigned int copy_size = MIN(sizeof(insn->bytes), insn->size);
// fill the instruction bytes.
// we might skip some redundant bytes in front in the case of X86
memcpy(insn->bytes, code + insn->size - copy_size, copy_size);
insn->size = copy_size;
// alias instruction might have ID saved in OpcodePub
if (MCInst_getOpcodePub(mci))
insn->id = MCInst_getOpcodePub(mci);
// post printer handles some corner cases (hacky)
if (postprinter)
postprinter((csh)handle, insn, buffer, mci);
#ifndef CAPSTONE_DIET
// fill in mnemonic & operands
// find first space or tab
sp = buffer;
mnem = insn->mnemonic;
for (sp = buffer; *sp; sp++) {
if (*sp == ' '|| *sp == '\t')
break;
if (*sp == '|') // lock|rep prefix for x86
*sp = ' ';
// copy to @mnemonic
*mnem = *sp;
mnem++;
}
*mnem = '\0';
// copy @op_str
if (*sp) {
// find the next non-space char
sp++;
for (; ((*sp == ' ') || (*sp == '\t')); sp++);
strncpy(insn->op_str, sp, sizeof(insn->op_str) - 1);
insn->op_str[sizeof(insn->op_str) - 1] = '\0';
} else
insn->op_str[0] = '\0';
#endif
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %r8, %r15
movq %rcx, %r12
movq %rdx, %r14
movq %rsi, %rbx
movzwl 0x10(%rsi), %esi
cmpw $0x10, %si
pushq $0x10
popq %rbp
cmovbl %esi, %ebp
movq %rdi, %r13
leaq 0x12(%rbx), %rdi
addq %r9, %rsi
subq %rbp, %rsi
movq %rbp, %rdx
callq 0x440e0
movw %bp, 0x10(%rbx)
movq %r12, %rdi
callq 0x45584
testl %eax, %eax
je 0x44d41
movq %r12, %rdi
callq 0x45584
movl %eax, (%rbx)
testq %r15, %r15
je 0x44d55
movq %r13, %rdi
movq %rbx, %rsi
movq %r14, %rdx
movq %r12, %rcx
callq *%r15
leaq 0x22(%rbx), %rax
incq %r14
movabsq $0x100000201, %rcx # imm = 0x100000201
movzbl -0x1(%r14), %edx
cmpl $0x7c, %edx
je 0x44d7f
cmpl $0x20, %edx
ja 0x44d86
movl %edx, %esi
btq %rsi, %rcx
jae 0x44d86
jmp 0x44d90
movb $0x20, -0x1(%r14)
movb $0x20, %dl
movb %dl, (%rax)
incq %rax
incq %r14
jmp 0x44d66
movb $0x0, (%rax)
cmpb $0x0, -0x1(%r14)
je 0x44dc7
movzbl (%r14), %eax
cmpl $0x20, %eax
je 0x44da8
cmpl $0x9, %eax
jne 0x44dad
incq %r14
jmp 0x44d9a
leaq 0x42(%rbx), %rdi
movl $0x9f, %edx
movq %r14, %rsi
callq 0x44040
movb $0x0, 0xe1(%rbx)
jmp 0x44dcb
movb $0x0, 0x42(%rbx)
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
|
/radare[P]capstone/cs.c
|
skipdata_opstr
|
static void skipdata_opstr(char *opstr, const uint8_t *buffer, size_t size)
{
char *p = opstr;
int len;
size_t i;
if (!size) {
opstr[0] = '\0';
return;
}
len = sprintf(p, "0x%02x", buffer[0]);
p+= len;
for(i = 1; i < size; i++) {
len = sprintf(p, ", 0x%02x", buffer[i]);
p+= len;
}
}
|
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %rdi, %r12
testq %rdx, %rdx
je 0x44e37
movq %rdx, %rbx
movq %rsi, %r14
movzbl (%rsi), %edx
leaq 0x7c650(%rip), %rsi # 0xc144b
movq %r12, %rdi
xorl %eax, %eax
callq 0x44120
movslq %eax, %r15
addq %r12, %r15
pushq $0x1
popq %r13
leaq 0x7c633(%rip), %r12 # 0xc1449
cmpq %r13, %rbx
je 0x44e3c
movzbl (%r14,%r13), %edx
movq %r15, %rdi
movq %r12, %rsi
xorl %eax, %eax
callq 0x44120
cltq
addq %rax, %r15
incq %r13
jmp 0x44e16
movb $0x0, (%r12)
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
retq
|
/radare[P]capstone/cs.c
|
cs_disasm_iter
|
CAPSTONE_EXPORT
bool cs_disasm_iter(csh ud, const uint8_t **code, size_t *size,
uint64_t *address, cs_insn *insn)
{
struct cs_struct *handle;
uint16_t insn_size;
MCInst mci;
bool r;
handle = (struct cs_struct *)(uintptr_t)ud;
if (!handle) {
return false;
}
handle->errnum = CS_ERR_OK;
MCInst_Init(&mci);
mci.csh = handle;
// relative branches need to know the address & size of current insn
mci.address = *address;
// save all the information for non-detailed mode
mci.flat_insn = insn;
mci.flat_insn->address = *address;
#ifdef CAPSTONE_DIET
// zero out mnemonic & op_str
mci.flat_insn->mnemonic[0] = '\0';
mci.flat_insn->op_str[0] = '\0';
#endif
r = handle->disasm(ud, *code, *size, &mci, &insn_size, *address, handle->getinsn_info);
if (r) {
SStream ss;
SStream_Init(&ss);
mci.flat_insn->size = insn_size;
// map internal instruction opcode to public insn ID
handle->insn_id(handle, insn, mci.Opcode);
handle->printer(&mci, &ss, handle->printer_info);
fill_insn(handle, insn, ss.buffer, &mci, handle->post_printer, *code);
*code += insn_size;
*size -= insn_size;
*address += insn_size;
} else { // encounter a broken instruction
size_t skipdata_bytes;
// if there is no request to skip data, or remaining data is too small,
// then bail out
if (!handle->skipdata || handle->skipdata_size > *size)
return false;
if (handle->skipdata_setup.callback) {
skipdata_bytes = handle->skipdata_setup.callback(*code, *size,
0, handle->skipdata_setup.user_data);
if (skipdata_bytes > *size)
// remaining data is not enough
return false;
if (!skipdata_bytes)
// user requested not to skip data, so bail out
return false;
} else
skipdata_bytes = handle->skipdata_size;
// we have to skip some amount of data, depending on arch & mode
insn->id = 0; // invalid ID for this "data" instruction
insn->address = *address;
insn->size = (uint16_t)skipdata_bytes;
memcpy(insn->bytes, *code, skipdata_bytes);
strncpy(insn->mnemonic, handle->skipdata_setup.mnemonic,
sizeof(insn->mnemonic) - 1);
skipdata_opstr(insn->op_str, *code, skipdata_bytes);
*code += skipdata_bytes;
*size -= skipdata_bytes;
*address += skipdata_bytes;
}
return true;
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x558, %rsp # imm = 0x558
testq %rdi, %rdi
je 0x44fec
movq %r8, %r12
movq %rcx, %rbx
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %r13
andl $0x0, 0x58(%rdi)
leaq 0x20(%rsp), %rbp
movq %rbp, %rdi
callq 0x45528
movq %r13, 0x320(%rbp)
movq (%rbx), %r9
movq %r9, 0x318(%rbp)
movq %r12, 0x310(%rbp)
movq %r9, 0x8(%r12)
movq (%r15), %rsi
movq (%r14), %rdx
movq 0x20(%r13), %rax
movq %rax, (%rsp)
leaq 0x16(%rsp), %r8
movq %r13, %rdi
movq %rbp, %rcx
callq *0x18(%r13)
testb %al, %al
je 0x44fd2
leaq 0x354(%rsp), %rbp
movq %rbp, %rdi
callq 0x45654
movzwl 0x16(%rsp), %eax
movq %rbx, 0x18(%rsp)
leaq 0x20(%rsp), %rbx
movq 0x310(%rbx), %rcx
movw %ax, 0x10(%rcx)
movl 0x8(%rbx), %edx
movq %r13, %rdi
movq %r12, %rsi
callq *0x48(%r13)
movq 0x10(%r13), %rdx
movq %rbx, %rdi
movq %rbp, %rsi
callq *0x8(%r13)
movq 0x50(%r13), %r8
movq (%r15), %r9
movq %r13, %rdi
movq %r12, %rsi
movq %rbp, %rdx
movq %rbx, %rcx
callq 0x44ced
movzwl 0x16(%rsp), %eax
addq %rax, (%r15)
subq %rax, (%r14)
movq 0x18(%rsp), %rcx
addq %rax, (%rcx)
movb $0x1, %bpl
jmp 0x44fee
cmpb $0x1, 0x100(%r13)
jne 0x44fec
movzbl 0x101(%r13), %eax
movq (%r14), %rsi
cmpq %rax, %rsi
jae 0x45002
xorl %ebp, %ebp
movl %ebp, %eax
addq $0x558, %rsp # imm = 0x558
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x110(%r13), %r8
testq %r8, %r8
je 0x4502a
movq (%r15), %rdi
movq 0x118(%r13), %rcx
xorl %ebp, %ebp
xorl %edx, %edx
callq *%r8
movq %rax, %rcx
decq %rcx
cmpq (%r14), %rcx
jae 0x44fee
andl $0x0, (%r12)
movq (%rbx), %rcx
movq %rcx, 0x8(%r12)
movw %ax, 0x10(%r12)
leaq 0x12(%r12), %rdi
movq (%r15), %rsi
movq %rax, %rbp
movq %rax, %rdx
callq 0x440e0
leaq 0x22(%r12), %rdi
movq 0x108(%r13), %rsi
pushq $0x1f
popq %rdx
callq 0x44040
addq $0x42, %r12
movq (%r15), %rsi
movq %r12, %rdi
movq %rbp, %rdx
callq 0x44dda
addq %rbp, (%r15)
subq %rbp, (%r14)
addq %rbp, (%rbx)
jmp 0x44fcd
|
/radare[P]capstone/cs.c
|
DecodeT2LoadShift
|
static DecodeStatus DecodeT2LoadShift(MCInst *Inst, unsigned Insn,
uint64_t Address, const void *Decoder)
{
DecodeStatus S = MCDisassembler_Success;
unsigned addrmode;
unsigned Rt = fieldFromInstruction_4(Insn, 12, 4);
unsigned Rn = fieldFromInstruction_4(Insn, 16, 4);
if (Rn == 15) {
switch (MCInst_getOpcode(Inst)) {
case ARM_t2LDRBs:
MCInst_setOpcode(Inst, ARM_t2LDRBpci);
break;
case ARM_t2LDRHs:
MCInst_setOpcode(Inst, ARM_t2LDRHpci);
break;
case ARM_t2LDRSHs:
MCInst_setOpcode(Inst, ARM_t2LDRSHpci);
break;
case ARM_t2LDRSBs:
MCInst_setOpcode(Inst, ARM_t2LDRSBpci);
break;
case ARM_t2LDRs:
MCInst_setOpcode(Inst, ARM_t2LDRpci);
break;
case ARM_t2PLDs:
MCInst_setOpcode(Inst, ARM_t2PLDpci);
break;
case ARM_t2PLIs:
MCInst_setOpcode(Inst, ARM_t2PLIpci);
break;
default:
return MCDisassembler_Fail;
}
return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
}
if (Rt == 15) {
switch (MCInst_getOpcode(Inst)) {
case ARM_t2LDRSHs:
return MCDisassembler_Fail;
case ARM_t2LDRHs:
// FIXME: this instruction is only available with MP extensions,
// this should be checked first but we don't have access to the
// feature bits here.
MCInst_setOpcode(Inst, ARM_t2PLDWs);
break;
default:
break;
}
}
switch (MCInst_getOpcode(Inst)) {
case ARM_t2PLDs:
case ARM_t2PLDWs:
case ARM_t2PLIs:
break;
default:
if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
return MCDisassembler_Fail;
}
addrmode = fieldFromInstruction_4(Insn, 4, 2);
addrmode |= fieldFromInstruction_4(Insn, 0, 4) << 2;
addrmode |= fieldFromInstruction_4(Insn, 16, 4) << 6;
if (!Check(&S, DecodeT2AddrModeSOReg(Inst, addrmode, Address, Decoder)))
return MCDisassembler_Fail;
return S;
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %esi, %r14d
movq %rdi, %rbx
movl %esi, %ebp
shrl $0x10, %ebp
andl $0xf, %ebp
cmpl $0xf, %ebp
jne 0x53e3f
movq %rbx, %rdi
callq 0x45580
cmpl $0x949, %eax # imm = 0x949
je 0x53f07
cmpl $0x9b4, %eax # imm = 0x9B4
je 0x53f15
cmpl $0x960, %eax # imm = 0x960
je 0x53f0e
cmpl $0x968, %eax # imm = 0x968
je 0x53ef2
cmpl $0x971, %eax # imm = 0x971
je 0x53f00
cmpl $0x9b0, %eax # imm = 0x9B0
je 0x53ef9
cmpl $0x958, %eax # imm = 0x958
jne 0x53edc
movl $0x956, %esi # imm = 0x956
jmp 0x53f1a
movl %r14d, %r15d
shrl $0xc, %r15d
andl $0xf, %r15d
cmpl $0xf, %r15d
jne 0x53e73
movq %rbx, %rdi
callq 0x45580
cmpl $0x968, %eax # imm = 0x968
je 0x53edc
cmpl $0x958, %eax # imm = 0x958
jne 0x53e73
movq %rbx, %rdi
movl $0x9ac, %esi # imm = 0x9AC
callq 0x45579
movq %rbx, %rdi
callq 0x45580
addl $0xfffff654, %eax # imm = 0xFFFFF654
cmpl $0x8, %eax
ja 0x53ec6
movl $0x111, %ecx # imm = 0x111
btl %eax, %ecx
jae 0x53ec6
pushq $0x3
popq %r15
movl %r14d, %eax
shrl $0x4, %eax
andl $0x3, %eax
andl $0xf, %r14d
leal (%rax,%r14,4), %eax
shll $0x6, %ebp
orl %eax, %ebp
movq %rbx, %rdi
movl %ebp, %esi
callq 0x53aab
testl %eax, %eax
je 0x53ee1
cmpl $0x3, %eax
je 0x53ee4
movl %eax, %r15d
cmpl $0x1, %eax
jne 0x53edc
jmp 0x53ee4
movq %rbx, %rdi
movl %r15d, %esi
callq 0x4fd97
movl %eax, %r15d
orl $0x2, %eax
cmpl $0x3, %eax
je 0x53e93
xorl %r15d, %r15d
jmp 0x53ee4
movl %eax, %r15d
movl %r15d, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movl $0x966, %esi # imm = 0x966
jmp 0x53f1a
movl $0x9af, %esi # imm = 0x9AF
jmp 0x53f1a
movl $0x96e, %esi # imm = 0x96E
jmp 0x53f1a
movl $0x947, %esi # imm = 0x947
jmp 0x53f1a
movl $0x95e, %esi # imm = 0x95E
jmp 0x53f1a
movl $0x9b3, %esi # imm = 0x9B3
movq %rbx, %rdi
callq 0x45579
movq %rbx, %rdi
movl %r14d, %esi
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
jmp 0x542e4
|
/radare[P]capstone/arch/ARM/ARMDisassembler.c
|
DecodeT2LoadImm8
|
static DecodeStatus DecodeT2LoadImm8(MCInst *Inst, unsigned Insn,
uint64_t Address, const void* Decoder)
{
DecodeStatus S = MCDisassembler_Success;
unsigned Rn = fieldFromInstruction_4(Insn, 16, 4);
unsigned Rt = fieldFromInstruction_4(Insn, 12, 4);
unsigned U = fieldFromInstruction_4(Insn, 9, 1);
unsigned imm = fieldFromInstruction_4(Insn, 0, 8);
imm |= (U << 8);
imm |= (Rn << 9);
if (Rn == 15) {
switch (MCInst_getOpcode(Inst)) {
case ARM_t2LDRi8:
MCInst_setOpcode(Inst, ARM_t2LDRpci);
break;
case ARM_t2LDRBi8:
MCInst_setOpcode(Inst, ARM_t2LDRBpci);
break;
case ARM_t2LDRSBi8:
MCInst_setOpcode(Inst, ARM_t2LDRSBpci);
break;
case ARM_t2LDRHi8:
MCInst_setOpcode(Inst, ARM_t2LDRHpci);
break;
case ARM_t2LDRSHi8:
MCInst_setOpcode(Inst, ARM_t2LDRSHpci);
break;
case ARM_t2PLDi8:
MCInst_setOpcode(Inst, ARM_t2PLDpci);
break;
case ARM_t2PLIi8:
MCInst_setOpcode(Inst, ARM_t2PLIpci);
break;
default:
return MCDisassembler_Fail;
}
return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
}
if (Rt == 15) {
switch (MCInst_getOpcode(Inst)) {
case ARM_t2LDRSHi8:
return MCDisassembler_Fail;
default:
break;
}
}
switch (MCInst_getOpcode(Inst)) {
case ARM_t2PLDi8:
case ARM_t2PLIi8:
case ARM_t2PLDWi8:
break;
default:
if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
return MCDisassembler_Fail;
}
if (!Check(&S, DecodeT2AddrModeImm8(Inst, imm, Address, Decoder)))
return MCDisassembler_Fail;
return S;
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %esi, %ebp
movq %rdi, %rbx
movl %esi, %r14d
shrl $0x10, %r14d
andl $0xf, %r14d
cmpl $0xf, %r14d
jne 0x53fb3
movq %rbx, %rdi
callq 0x45580
cmpl $0x9b2, %eax # imm = 0x9B2
je 0x54067
cmpl $0x955, %eax # imm = 0x955
je 0x54075
cmpl $0x95d, %eax # imm = 0x95D
je 0x5406e
cmpl $0x965, %eax # imm = 0x965
je 0x54052
cmpl $0x96d, %eax # imm = 0x96D
je 0x54060
cmpl $0x9ae, %eax # imm = 0x9AE
je 0x54059
cmpl $0x946, %eax # imm = 0x946
jne 0x5403c
movl $0x947, %esi # imm = 0x947
jmp 0x5407a
movl %ebp, %r15d
shrl $0xc, %r15d
andl $0xf, %r15d
cmpl $0xf, %r15d
jne 0x53fd3
movq %rbx, %rdi
callq 0x45580
cmpl $0x965, %eax # imm = 0x965
je 0x5403c
movq %rbx, %rdi
callq 0x45580
addl $0xfffff655, %eax # imm = 0xFFFFF655
cmpl $0x7, %eax
ja 0x54026
movl $0x89, %ecx
btl %eax, %ecx
jae 0x54026
pushq $0x3
popq %r15
movzbl %bpl, %eax
shrl %ebp
andl $0x100, %ebp # imm = 0x100
orl %eax, %ebp
shll $0x9, %r14d
orl %ebp, %r14d
movq %rbx, %rdi
movl %r14d, %esi
callq 0x53ca3
testl %eax, %eax
je 0x54041
cmpl $0x3, %eax
je 0x54044
movl %eax, %r15d
cmpl $0x1, %eax
jne 0x5403c
jmp 0x54044
movq %rbx, %rdi
movl %r15d, %esi
callq 0x4fd97
movl %eax, %r15d
orl $0x2, %eax
cmpl $0x3, %eax
je 0x53ff3
xorl %r15d, %r15d
jmp 0x54044
movl %eax, %r15d
movl %r15d, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movl $0x966, %esi # imm = 0x966
jmp 0x5407a
movl $0x9af, %esi # imm = 0x9AF
jmp 0x5407a
movl $0x96e, %esi # imm = 0x96E
jmp 0x5407a
movl $0x9b3, %esi # imm = 0x9B3
jmp 0x5407a
movl $0x95e, %esi # imm = 0x95E
jmp 0x5407a
movl $0x956, %esi # imm = 0x956
movq %rbx, %rdi
callq 0x45579
movq %rbx, %rdi
movl %ebp, %esi
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
jmp 0x542e4
|
/radare[P]capstone/arch/ARM/ARMDisassembler.c
|
DecodeT2LoadT
|
static DecodeStatus DecodeT2LoadT(MCInst *Inst, unsigned Insn,
uint64_t Address, const void* Decoder)
{
DecodeStatus S = MCDisassembler_Success;
unsigned Rn = fieldFromInstruction_4(Insn, 16, 4);
unsigned Rt = fieldFromInstruction_4(Insn, 12, 4);
unsigned imm = fieldFromInstruction_4(Insn, 0, 8);
imm |= (Rn << 9);
if (Rn == 15) {
switch (MCInst_getOpcode(Inst)) {
case ARM_t2LDRT:
MCInst_setOpcode(Inst, ARM_t2LDRpci);
break;
case ARM_t2LDRBT:
MCInst_setOpcode(Inst, ARM_t2LDRBpci);
break;
case ARM_t2LDRHT:
MCInst_setOpcode(Inst, ARM_t2LDRHpci);
break;
case ARM_t2LDRSBT:
MCInst_setOpcode(Inst, ARM_t2LDRSBpci);
break;
case ARM_t2LDRSHT:
MCInst_setOpcode(Inst, ARM_t2LDRSHpci);
break;
default:
return MCDisassembler_Fail;
}
return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
}
if (!Check(&S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder)))
return MCDisassembler_Fail;
if (!Check(&S, DecodeT2AddrModeImm8(Inst, imm, Address, Decoder)))
return MCDisassembler_Fail;
return S;
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %esi, %ebp
movq %rdi, %rbx
movl %esi, %r14d
shrl $0x10, %r14d
andl $0xf, %r14d
cmpl $0xf, %r14d
jne 0x540f0
movq %rbx, %rdi
callq 0x45580
cmpl $0x969, %eax # imm = 0x969
je 0x5415b
movl %eax, %ecx
cmpl $0x951, %eax # imm = 0x951
je 0x54138
cmpl $0x959, %ecx # imm = 0x959
je 0x54154
cmpl $0x961, %ecx # imm = 0x961
je 0x5413f
xorl %eax, %eax
cmpl $0x942, %ecx # imm = 0x942
jne 0x54149
movl $0x947, %esi # imm = 0x947
jmp 0x54160
movl %ebp, %esi
shrl $0xc, %esi
andl $0xf, %esi
movq %rbx, %rdi
callq 0x53442
movl %eax, %r15d
xorl %eax, %eax
movl %r15d, %ecx
orl $0x2, %ecx
cmpl $0x3, %ecx
jne 0x54149
movzbl %bpl, %eax
shll $0x9, %r14d
orl %eax, %r14d
movq %rbx, %rdi
movl %r14d, %esi
callq 0x53ca3
testl %eax, %eax
je 0x54149
cmpl $0x3, %eax
je 0x54146
cmpl $0x1, %eax
je 0x54149
xorl %eax, %eax
jmp 0x54149
movl $0x956, %esi # imm = 0x956
jmp 0x54160
movl $0x966, %esi # imm = 0x966
jmp 0x54160
movl %r15d, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movl $0x95e, %esi # imm = 0x95E
jmp 0x54160
movl $0x96e, %esi # imm = 0x96E
movq %rbx, %rdi
callq 0x45579
movq %rbx, %rdi
movl %ebp, %esi
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
jmp 0x542e4
|
/radare[P]capstone/arch/ARM/ARMDisassembler.c
|
DecodeT2LoadImm12
|
static DecodeStatus DecodeT2LoadImm12(MCInst *Inst, unsigned Insn,
uint64_t Address, const void* Decoder)
{
DecodeStatus S = MCDisassembler_Success;
unsigned Rn = fieldFromInstruction_4(Insn, 16, 4);
unsigned Rt = fieldFromInstruction_4(Insn, 12, 4);
unsigned imm = fieldFromInstruction_4(Insn, 0, 12);
imm |= (Rn << 13);
if (Rn == 15) {
switch (MCInst_getOpcode(Inst)) {
case ARM_t2LDRi12:
MCInst_setOpcode(Inst, ARM_t2LDRpci);
break;
case ARM_t2LDRHi12:
MCInst_setOpcode(Inst, ARM_t2LDRHpci);
break;
case ARM_t2LDRSHi12:
MCInst_setOpcode(Inst, ARM_t2LDRSHpci);
break;
case ARM_t2LDRBi12:
MCInst_setOpcode(Inst, ARM_t2LDRBpci);
break;
case ARM_t2LDRSBi12:
MCInst_setOpcode(Inst, ARM_t2LDRSBpci);
break;
case ARM_t2PLDi12:
MCInst_setOpcode(Inst, ARM_t2PLDpci);
break;
case ARM_t2PLIi12:
MCInst_setOpcode(Inst, ARM_t2PLIpci);
break;
default:
return MCDisassembler_Fail;
}
return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
}
if (Rt == 15) {
switch (MCInst_getOpcode(Inst)) {
case ARM_t2LDRSHi12:
return MCDisassembler_Fail;
case ARM_t2LDRHi12:
MCInst_setOpcode(Inst, ARM_t2PLDi12);
break;
default:
break;
}
}
switch (MCInst_getOpcode(Inst)) {
case ARM_t2PLDi12:
case ARM_t2PLDWi12:
case ARM_t2PLIi12:
break;
default:
if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
return MCDisassembler_Fail;
}
if (!Check(&S, DecodeT2AddrModeImm12(Inst, imm, Address, Decoder)))
return MCDisassembler_Fail;
return S;
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %esi, %ebp
movq %rdi, %rbx
movl %esi, %r14d
shrl $0x10, %r14d
andl $0xf, %r14d
cmpl $0xf, %r14d
jne 0x541f8
movq %rbx, %rdi
callq 0x45580
cmpl $0x945, %eax # imm = 0x945
je 0x542b8
cmpl $0x9b1, %eax # imm = 0x9B1
je 0x542c6
cmpl $0x95c, %eax # imm = 0x95C
je 0x542bf
cmpl $0x964, %eax # imm = 0x964
je 0x542a3
cmpl $0x96c, %eax # imm = 0x96C
je 0x542b1
cmpl $0x9ad, %eax # imm = 0x9AD
je 0x542aa
cmpl $0x954, %eax # imm = 0x954
jne 0x5428d
movl $0x956, %esi # imm = 0x956
jmp 0x542cb
movl %ebp, %r15d
shrl $0xc, %r15d
andl $0xf, %r15d
cmpl $0xf, %r15d
jne 0x5422c
movq %rbx, %rdi
callq 0x45580
cmpl $0x964, %eax # imm = 0x964
je 0x5428d
cmpl $0x954, %eax # imm = 0x954
jne 0x5422c
movq %rbx, %rdi
movl $0x9ad, %esi # imm = 0x9AD
callq 0x45579
movq %rbx, %rdi
callq 0x45580
addl $0xfffff656, %eax # imm = 0xFFFFF656
cmpl $0x7, %eax
ja 0x54277
movl $0x89, %ecx
btl %eax, %ecx
jae 0x54277
pushq $0x3
popq %r15
andl $0xfff, %ebp # imm = 0xFFF
shll $0xd, %r14d
orl %ebp, %r14d
movq %rbx, %rdi
movl %r14d, %esi
callq 0x53d60
testl %eax, %eax
je 0x54292
cmpl $0x3, %eax
je 0x54295
movl %eax, %r15d
cmpl $0x1, %eax
jne 0x5428d
jmp 0x54295
movq %rbx, %rdi
movl %r15d, %esi
callq 0x4fd97
movl %eax, %r15d
orl $0x2, %eax
cmpl $0x3, %eax
je 0x5424c
xorl %r15d, %r15d
jmp 0x54295
movl %eax, %r15d
movl %r15d, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movl $0x966, %esi # imm = 0x966
jmp 0x542cb
movl $0x9af, %esi # imm = 0x9AF
jmp 0x542cb
movl $0x96e, %esi # imm = 0x96E
jmp 0x542cb
movl $0x947, %esi # imm = 0x947
jmp 0x542cb
movl $0x95e, %esi # imm = 0x95E
jmp 0x542cb
movl $0x9b3, %esi # imm = 0x9B3
movq %rbx, %rdi
callq 0x45579
movq %rbx, %rdi
movl %ebp, %esi
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
jmp 0x542e4
|
/radare[P]capstone/arch/ARM/ARMDisassembler.c
|
DecodeSPRRegisterClass
|
static DecodeStatus DecodeSPRRegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Address, const void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return MCDisassembler_Fail;
Register = SPRDecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x54626
pushq %rax
movl %esi, %eax
leaq 0x7897a(%rip), %rcx # 0xccf90
movzwl (%rcx,%rax,2), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
|
/radare[P]capstone/arch/ARM/ARMDisassembler.c
|
DecodeAddrMode5Operand
|
static DecodeStatus DecodeAddrMode5Operand(MCInst *Inst, unsigned Val,
uint64_t Address, const void *Decoder)
{
DecodeStatus S = MCDisassembler_Success;
unsigned Rn = fieldFromInstruction_4(Val, 9, 4);
unsigned U = fieldFromInstruction_4(Val, 8, 1);
unsigned imm = fieldFromInstruction_4(Val, 0, 8);
if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
return MCDisassembler_Fail;
if (U)
MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm));
else
MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_sub, (unsigned char)imm));
return S;
}
|
pushq %rbp
pushq %r14
pushq %rbx
movl %esi, %ebx
movq %rdi, %r14
shrl $0x9, %esi
andl $0xf, %esi
callq 0x4fd97
movl %eax, %ebp
orl $0x2, %eax
cmpl $0x3, %eax
jne 0x5465e
andl $0x1ff, %ebx # imm = 0x1FF
xorl $0x100, %ebx # imm = 0x100
movq %r14, %rdi
movq %rbx, %rsi
callq 0x4563a
jmp 0x54660
xorl %ebp, %ebp
movl %ebp, %eax
popq %rbx
popq %r14
popq %rbp
retq
|
/radare[P]capstone/arch/ARM/ARMDisassembler.c
|
ARM_post_printer
|
void ARM_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci)
{
if (((cs_struct *)ud)->detail != CS_OPT_ON)
return;
// check if this insn requests write-back
if (mci->writeback || (strrchr(insn_asm, '!')) != NULL) {
insn->detail->arm.writeback = true;
} else if (mci->csh->mode & CS_MODE_THUMB) {
// handle some special instructions with writeback
switch(mci->Opcode) {
default:
break;
case ARM_t2LDC2L_PRE:
case ARM_t2LDC2_PRE:
case ARM_t2LDCL_PRE:
case ARM_t2LDC_PRE:
case ARM_t2LDRB_PRE:
case ARM_t2LDRD_PRE:
case ARM_t2LDRH_PRE:
case ARM_t2LDRSB_PRE:
case ARM_t2LDRSH_PRE:
case ARM_t2LDR_PRE:
case ARM_t2STC2L_PRE:
case ARM_t2STC2_PRE:
case ARM_t2STCL_PRE:
case ARM_t2STC_PRE:
case ARM_t2STRB_PRE:
case ARM_t2STRD_PRE:
case ARM_t2STRH_PRE:
case ARM_t2STR_PRE:
case ARM_t2LDC2L_POST:
case ARM_t2LDC2_POST:
case ARM_t2LDCL_POST:
case ARM_t2LDC_POST:
case ARM_t2LDRB_POST:
case ARM_t2LDRD_POST:
case ARM_t2LDRH_POST:
case ARM_t2LDRSB_POST:
case ARM_t2LDRSH_POST:
case ARM_t2LDR_POST:
case ARM_t2STC2L_POST:
case ARM_t2STC2_POST:
case ARM_t2STCL_POST:
case ARM_t2STC_POST:
case ARM_t2STRB_POST:
case ARM_t2STRD_POST:
case ARM_t2STRH_POST:
case ARM_t2STR_POST:
insn->detail->arm.writeback = true;
break;
}
} else { // ARM mode
// handle some special instructions with writeback
switch(mci->Opcode) {
default:
break;
case ARM_LDC2L_PRE:
case ARM_LDC2_PRE:
case ARM_LDCL_PRE:
case ARM_LDC_PRE:
case ARM_LDRD_PRE:
case ARM_LDRH_PRE:
case ARM_LDRSB_PRE:
case ARM_LDRSH_PRE:
case ARM_STC2L_PRE:
case ARM_STC2_PRE:
case ARM_STCL_PRE:
case ARM_STC_PRE:
case ARM_STRD_PRE:
case ARM_STRH_PRE:
case ARM_LDC2L_POST:
case ARM_LDC2_POST:
case ARM_LDCL_POST:
case ARM_LDC_POST:
case ARM_LDRBT_POST:
case ARM_LDRD_POST:
case ARM_LDRH_POST:
case ARM_LDRSB_POST:
case ARM_LDRSH_POST:
case ARM_STC2L_POST:
case ARM_STC2_POST:
case ARM_STCL_POST:
case ARM_STC_POST:
case ARM_STRBT_POST:
case ARM_STRD_POST:
case ARM_STRH_POST:
case ARM_LDRB_POST_IMM:
case ARM_LDR_POST_IMM:
case ARM_STRB_POST_IMM:
case ARM_STR_POST_IMM:
insn->detail->arm.writeback = true;
break;
}
}
// check if this insn requests update flags
if (insn->detail->arm.update_flags == false) {
// some insn still update flags, regardless of tabgen info
unsigned int i, j;
for (i = 0; i < ARR_SIZE(insn_update_flgs); i++) {
if (insn->id == insn_update_flgs[i].id &&
!strncmp(insn_asm, insn_update_flgs[i].name,
strlen(insn_update_flgs[i].name))) {
insn->detail->arm.update_flags = true;
// we have to update regs_write array as well
for (j = 0; j < ARR_SIZE(insn->detail->regs_write); j++) {
if (insn->detail->regs_write[j] == 0) {
insn->detail->regs_write[j] = ARM_REG_CPSR;
break;
}
}
break;
}
}
}
// instruction should not have invalid CC
if (insn->detail->arm.cc == ARM_CC_INVALID) {
insn->detail->arm.cc = ARM_CC_AL;
}
// manual fix for some special instructions
// printf(">>> id: %u, mcid: %u\n", insn->id, mci->Opcode);
switch(mci->Opcode) {
default:
break;
case ARM_MOVPCLR:
insn->detail->arm.operands[0].type = ARM_OP_REG;
insn->detail->arm.operands[0].reg = ARM_REG_PC;
insn->detail->arm.operands[1].type = ARM_OP_REG;
insn->detail->arm.operands[1].reg = ARM_REG_LR;
insn->detail->arm.op_count = 2;
break;
}
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
cmpl $0x3, 0xe0(%rdi)
jne 0x5bd2a
movq %rcx, %r14
movq %rdx, %r15
movq %rsi, %rbx
cmpb $0x0, 0x32e(%rcx)
jne 0x5bc5f
pushq $0x21
popq %rsi
movq %r15, %rdi
callq 0x440b0
testq %rax, %rax
jne 0x5bc5f
movq 0x320(%r14), %rax
testb $0x10, 0x4(%rax)
movl 0x8(%r14), %eax
jne 0x5bc2a
leal -0x80(%rax), %ecx
cmpl $0x3c, %ecx
ja 0x5bc14
movabsq $0x118c0c0604803333, %rdx # imm = 0x118C0C0604803333
btq %rcx, %rdx
jb 0x5bc5f
addl $0xfffffe80, %eax # imm = 0xFFFFFE80
cmpl $0x38, %eax
ja 0x5bc6a
movabsq $0x10c060120003333, %rcx # imm = 0x10C060120003333
jmp 0x5bc59
leal -0x92f(%rax), %ecx
cmpl $0x3c, %ecx
ja 0x5bc45
movabsq $0x1818181818303333, %rdx # imm = 0x1818181818303333
btq %rcx, %rdx
jb 0x5bc5f
addl $0xfffff5f2, %eax # imm = 0xFFFFF5F2
cmpl $0x30, %eax
ja 0x5bc6a
movabsq $0x183030c003333, %rcx # imm = 0x183030C003333
btq %rax, %rcx
jae 0x5bc6a
movq 0xe8(%rbx), %rax
movb $0x1, 0x49(%rax)
movq 0xe8(%rbx), %r13
cmpb $0x0, 0x48(%r13)
jne 0x5bccd
movq %r14, 0x8(%rsp)
movq %rbx, 0x10(%rsp)
movl (%rbx), %ebp
pushq $0x8
popq %r14
leaq 0x137b41(%rip), %rbx # 0x1937d0
cmpq $0x1c8, %r14 # imm = 0x1C8
je 0x5bcc3
cmpl -0x8(%r14,%rbx), %ebp
jne 0x5bcbd
movq (%r14,%rbx), %r12
movq %r12, %rdi
callq 0x44080
movq %r15, %rdi
movq %r12, %rsi
movq %rax, %rdx
callq 0x44050
testl %eax, %eax
je 0x5bd39
addq $0x10, %r14
jmp 0x5bc8f
movq 0x10(%rsp), %rbx
movq 0x8(%rsp), %r14
cmpl $0x0, 0x44(%r13)
jne 0x5bcdc
movl $0xf, 0x44(%r13)
cmpl $0xd6, 0x8(%r14)
jne 0x5bd2a
movq 0xe8(%rbx), %rax
pushq $0x1
popq %rcx
movl %ecx, 0x64(%rax)
movq 0xe8(%rbx), %rax
movl $0xb, 0x68(%rax)
movq 0xe8(%rbx), %rax
movl %ecx, 0x8c(%rax)
movq 0xe8(%rbx), %rax
movl $0xa, 0x90(%rax)
movq 0xe8(%rbx), %rax
movb $0x2, 0x50(%rax)
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movb $0x1, 0x48(%r13)
movq 0x10(%rsp), %rbx
movq 0xe8(%rbx), %r13
pushq $0xd
popq %rax
movq 0x8(%rsp), %r14
cmpq $0x21, %rax
je 0x5bccd
leaq 0x1(%rax), %rcx
cmpb $0x0, (%r13,%rax)
movq %rcx, %rax
jne 0x5bd52
movb $0x3, -0x1(%r13,%rcx)
movq 0xe8(%rbx), %r13
jmp 0x5bccd
|
/radare[P]capstone/arch/ARM/ARMInstPrinter.c
|
printImmPlusOneOperand
|
static void printImmPlusOneOperand(MCInst *MI, unsigned OpNum, SStream *O)
{
unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
if (Imm + 1 > HEX_THRESHOLD)
SStream_concat(O, "#0x%x", Imm + 1);
else
SStream_concat(O, "#%u", Imm + 1);
if (MI->csh->detail) {
MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM;
MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = Imm + 1;
MI->flat_insn->detail->arm.op_count++;
}
}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r15
movq %rdi, %rbx
callq 0x45587
movq %rax, %rdi
callq 0x455e2
movq %rax, %r14
incl %r14d
cmpl $0xa, %r14d
leaq 0x70adc(%rip), %rax # 0xd43ba
leaq 0x70add(%rip), %rsi # 0xd43c2
cmovaeq %rax, %rsi
movq %r15, %rdi
movl %r14d, %edx
xorl %eax, %eax
callq 0x456a6
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0(%rax)
je 0x63950
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x50(%rax), %ecx
imulq $0x28, %rcx, %rcx
movl $0x2, 0x64(%rax,%rcx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x50(%rax), %ecx
imulq $0x28, %rcx, %rcx
movl %r14d, 0x68(%rax,%rcx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
incb 0x50(%rax)
popq %rbx
popq %r14
popq %r15
retq
|
/radare[P]capstone/arch/ARM/ARMInstPrinter.c
|
ARM_insn_name
|
const char *ARM_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= ARM_INS_ENDING)
return NULL;
return insn_name_maps[id].name;
#else
return NULL;
#endif
}
|
cmpl $0x1b2, %esi # imm = 0x1B2
jbe 0x64703
xorl %eax, %eax
retq
movl %esi, %eax
shlq $0x4, %rax
leaq 0x130060(%rip), %rcx # 0x194770
movq 0x8(%rax,%rcx), %rax
retq
|
/radare[P]capstone/arch/ARM/ARMMapping.c
|
DecodeDDDDRegisterClass
|
static DecodeStatus DecodeDDDDRegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr,
void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = DDDDDecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x69add
pushq %rax
movl %esi, %eax
leaq 0x6be72(%rip), %rcx # 0xd5940
movl (%rcx,%rax,4), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
|
/radare[P]capstone/arch/AArch64/AArch64Disassembler.c
|
DecodeDDDRegisterClass
|
static DecodeStatus DecodeDDDRegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr, void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = DDDDecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x69b26
pushq %rax
movl %esi, %eax
leaq 0x6bf29(%rip), %rcx # 0xd5a40
movl (%rcx,%rax,4), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
|
/radare[P]capstone/arch/AArch64/AArch64Disassembler.c
|
DecodeGPR64RegisterClass
|
static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr,
void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = GPR64DecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x69c0d
pushq %rax
movl %esi, %eax
leaq 0x6bdc2(%rip), %rcx # 0xd59c0
movl (%rcx,%rax,4), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
|
/radare[P]capstone/arch/AArch64/AArch64Disassembler.c
|
DecodeFPR16RegisterClass
|
static DecodeStatus DecodeFPR16RegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr,
void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = FPR16DecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x69c4f
pushq %rax
movl %esi, %eax
leaq 0x6c100(%rip), %rcx # 0xd5d40
movl (%rcx,%rax,4), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
|
/radare[P]capstone/arch/AArch64/AArch64Disassembler.c
|
DecodeFPR32RegisterClass
|
static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr,
void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = FPR32DecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x69c91
pushq %rax
movl %esi, %eax
leaq 0x6c1be(%rip), %rcx # 0xd5e40
movl (%rcx,%rax,4), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
|
/radare[P]capstone/arch/AArch64/AArch64Disassembler.c
|
DecodeVectorRegisterClass
|
static DecodeStatus DecodeVectorRegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr,
void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = VectorDecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
}
|
cmpl $0x1f, %esi
jbe 0x69d08
retq
movl %esi, %eax
leaq 0x6c1af(%rip), %rcx # 0xd5ec0
movl (%rcx,%rax,4), %esi
jmp 0x4560d
|
/radare[P]capstone/arch/AArch64/AArch64Disassembler.c
|
getWRegFromXReg
|
inline static unsigned getWRegFromXReg(unsigned Reg)
{
switch (Reg) {
case ARM64_REG_X0: return ARM64_REG_W0;
case ARM64_REG_X1: return ARM64_REG_W1;
case ARM64_REG_X2: return ARM64_REG_W2;
case ARM64_REG_X3: return ARM64_REG_W3;
case ARM64_REG_X4: return ARM64_REG_W4;
case ARM64_REG_X5: return ARM64_REG_W5;
case ARM64_REG_X6: return ARM64_REG_W6;
case ARM64_REG_X7: return ARM64_REG_W7;
case ARM64_REG_X8: return ARM64_REG_W8;
case ARM64_REG_X9: return ARM64_REG_W9;
case ARM64_REG_X10: return ARM64_REG_W10;
case ARM64_REG_X11: return ARM64_REG_W11;
case ARM64_REG_X12: return ARM64_REG_W12;
case ARM64_REG_X13: return ARM64_REG_W13;
case ARM64_REG_X14: return ARM64_REG_W14;
case ARM64_REG_X15: return ARM64_REG_W15;
case ARM64_REG_X16: return ARM64_REG_W16;
case ARM64_REG_X17: return ARM64_REG_W17;
case ARM64_REG_X18: return ARM64_REG_W18;
case ARM64_REG_X19: return ARM64_REG_W19;
case ARM64_REG_X20: return ARM64_REG_W20;
case ARM64_REG_X21: return ARM64_REG_W21;
case ARM64_REG_X22: return ARM64_REG_W22;
case ARM64_REG_X23: return ARM64_REG_W23;
case ARM64_REG_X24: return ARM64_REG_W24;
case ARM64_REG_X25: return ARM64_REG_W25;
case ARM64_REG_X26: return ARM64_REG_W26;
case ARM64_REG_X27: return ARM64_REG_W27;
case ARM64_REG_X28: return ARM64_REG_W28;
case ARM64_REG_FP: return ARM64_REG_W29;
case ARM64_REG_LR: return ARM64_REG_W30;
case ARM64_REG_SP: return ARM64_REG_WSP;
case ARM64_REG_XZR: return ARM64_REG_WZR;
}
// For anything else, return it unchanged.
return Reg;
}
|
movl %edi, %eax
leal -0xc7(%rax), %ecx
cmpl $0x1c, %ecx
ja 0x6b199
leaq 0x6b13a(%rip), %rax # 0xd62c4
movslq (%rax,%rcx,4), %rcx
addq %rax, %rcx
jmpq *%rcx
movl $0xa8, %eax
retq
leal -0x1(%rax), %ecx
cmpl $0x6, %ecx
ja 0x6b198
leaq 0x6b100(%rip), %rdx # 0xd62a8
movslq (%rdx,%rcx,4), %rcx
addq %rdx, %rcx
jmpq *%rcx
movl $0xc5, %eax
retq
pushq $0x5
jmp 0x6b1c3
movl $0xc6, %eax
retq
pushq $0x6
popq %rax
retq
movl $0xc3, %eax
retq
movl $0xb8, %eax
retq
movl $0xb6, %eax
retq
movl $0xb3, %eax
retq
movl $0xac, %eax
retq
movl $0xb4, %eax
retq
movl $0xb1, %eax
retq
movl $0xc1, %eax
retq
movl $0xc0, %eax
retq
movl $0xaa, %eax
retq
movl $0xb7, %eax
retq
movl $0xab, %eax
retq
movl $0xaf, %eax
retq
movl $0xa9, %eax
retq
movl $0xb9, %eax
retq
movl $0xbc, %eax
retq
movl $0xad, %eax
retq
movl $0xbd, %eax
retq
movl $0xb5, %eax
retq
movl $0xae, %eax
retq
movl $0xba, %eax
retq
movl $0xb2, %eax
retq
movl $0xb0, %eax
retq
movl $0xbe, %eax
retq
movl $0xbb, %eax
retq
movl $0xbf, %eax
retq
movl $0xc4, %eax
retq
movl $0xc2, %eax
retq
|
/radare[P]capstone/arch/AArch64/AArch64BaseInfo.h
|
printOperand
|
static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
{
MCOperand *Op = MCInst_getOperand(MI, OpNo);
if (MCOperand_isReg(Op)) {
unsigned Reg = MCOperand_getReg(Op);
SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName));
if (MI->csh->detail) {
if (MI->csh->doing_mem) {
if (MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base == ARM64_REG_INVALID) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = Reg;
}
else if (MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index == ARM64_REG_INVALID) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = Reg;
}
} else {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
MI->flat_insn->detail->arm64.op_count++;
}
}
} else if (MCOperand_isImm(Op)) {
int64_t imm = MCOperand_getImm(Op);
if (MI->Opcode == AArch64_ADR) {
imm += MI->address;
printUInt64Bang(O, imm);
} else
printUInt64Bang(O, imm);
if (MI->csh->detail) {
if (MI->csh->doing_mem) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int32_t)imm;
} else {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm;
MI->flat_insn->detail->arm64.op_count++;
}
}
}
}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r14
movq %rdi, %rbx
callq 0x45587
movq %rax, %r15
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8381e
movq %r15, %rdi
callq 0x455da
movl %eax, %r15d
leal -0x1(%r15), %eax
leaq 0x58705(%rip), %rcx # 0xdbeb0
movl (%rcx,%rax,4), %eax
leaq 0x162bab(%rip), %rsi # 0x1e6360
addq %rax, %rsi
movq %r14, %rdi
callq 0x4565f
movq 0x320(%rbx), %rcx
cmpl $0x0, 0xe0(%rcx)
je 0x838fe
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %edx
addq $0x38, %rax
cmpb $0x1, 0xe8(%rcx)
jne 0x8388b
imulq $0x30, %rdx, %rcx
addq %rcx, %rax
addq $0x20, %rax
cmpl $0x0, (%rax)
je 0x83904
cmpl $0x0, 0x4(%rax)
jne 0x838fe
movl %r15d, 0x4(%rax)
jmp 0x838fe
movq %r15, %rdi
callq 0x455ca
testb %al, %al
je 0x838fe
movq %r15, %rdi
callq 0x455e2
movq %rax, %r15
cmpl $0x4f, 0x8(%rbx)
jne 0x83846
addq 0x318(%rbx), %r15
movq %r14, %rdi
movq %r15, %rsi
callq 0x45797
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0(%rax)
je 0x838fe
cmpb $0x1, 0xe8(%rax)
jne 0x838b4
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
movl %r15d, 0x60(%rax,%rcx)
jmp 0x838fe
imulq $0x30, %rdx, %rcx
movl $0x1, 0x18(%rax,%rcx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
movl %r15d, 0x58(%rax,%rcx)
jmp 0x838ed
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
movl $0x2, 0x50(%rax,%rcx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
movq %r15, 0x58(%rax,%rcx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
incb 0x36(%rax)
popq %rbx
popq %r14
popq %r15
retq
movl %r15d, (%rax)
jmp 0x838fe
|
/radare[P]capstone/arch/AArch64/AArch64InstPrinter.c
|
printAlignedLabel
|
static void printAlignedLabel(MCInst *MI, unsigned OpNum, SStream *O)
{
MCOperand *Op = MCInst_getOperand(MI, OpNum);
// If the label has already been resolved to an immediate offset (say, when
// we're running the disassembler), just print the immediate.
if (MCOperand_isImm(Op)) {
uint64_t imm = (MCOperand_getImm(Op) << 2) + MI->address;
printUInt64Bang(O, imm);
if (MI->csh->detail) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm;
MI->flat_insn->detail->arm64.op_count++;
}
return;
}
}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r14
movq %rdi, %rbx
callq 0x45587
movq %rax, %r15
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x839a3
movq %r15, %rdi
callq 0x455e2
movq %rax, %r15
shlq $0x2, %r15
addq 0x318(%rbx), %r15
movq %r14, %rdi
movq %r15, %rsi
callq 0x45797
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0(%rax)
je 0x839a3
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
movl $0x2, 0x50(%rax,%rcx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
movq %r15, 0x58(%rax,%rcx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
incb 0x36(%rax)
popq %rbx
popq %r14
popq %r15
retq
|
/radare[P]capstone/arch/AArch64/AArch64InstPrinter.c
|
printHexImm
|
static void printHexImm(MCInst *MI, unsigned OpNo, SStream *O)
{
MCOperand *Op = MCInst_getOperand(MI, OpNo);
SStream_concat(O, "#%#llx", MCOperand_getImm(Op));
if (MI->csh->detail) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op);
MI->flat_insn->detail->arm64.op_count++;
}
}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r15
movq %rdi, %rbx
callq 0x45587
movq %rax, %r14
movq %rax, %rdi
callq 0x455e2
leaq 0x59768(%rip), %rsi # 0xdd133
movq %r15, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq 0x456a6
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0(%rax)
je 0x83a3c
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
movl $0x2, 0x50(%rax,%rcx)
movq %r14, %rdi
callq 0x455e2
cltq
movq 0x310(%rbx), %rcx
movq 0xe8(%rcx), %rcx
movzbl 0x36(%rcx), %edx
imulq $0x30, %rdx, %rdx
movq %rax, 0x58(%rcx,%rdx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
incb 0x36(%rax)
popq %rbx
popq %r14
popq %r15
retq
|
/radare[P]capstone/arch/AArch64/AArch64InstPrinter.c
|
set_mem_access
|
static void set_mem_access(MCInst *MI, bool status)
{
if (MI->csh->detail != CS_OPT_ON)
return;
MI->csh->doing_mem = status;
if (status) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = ARM64_REG_INVALID;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = ARM64_REG_INVALID;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = 0;
} else {
// done, create the next operand slot
MI->flat_insn->detail->arm64.op_count++;
}
}
|
movq 0x320(%rdi), %rax
cmpl $0x3, 0xe0(%rax)
jne 0x83ecf
movb %sil, 0xe8(%rax)
movq 0x310(%rdi), %rax
movq 0xe8(%rax), %rax
testb %sil, %sil
je 0x83ecc
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
movl $0x3, 0x50(%rax,%rcx)
movq 0x310(%rdi), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
andl $0x0, 0x58(%rax,%rcx)
movq 0x310(%rdi), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
andl $0x0, 0x5c(%rax,%rcx)
movq 0x310(%rdi), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
andl $0x0, 0x60(%rax,%rcx)
retq
incb 0x36(%rax)
retq
|
/radare[P]capstone/arch/AArch64/AArch64InstPrinter.c
|
printSysCROperand
|
static void printSysCROperand(MCInst *MI, unsigned OpNo, SStream *O)
{
MCOperand *Op = MCInst_getOperand(MI, OpNo);
//assert(Op.isImm() && "System instruction C[nm] operands must be immediates!");
SStream_concat(O, "c%u", MCOperand_getImm(Op));
if (MI->csh->detail) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_CIMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op);
MI->flat_insn->detail->arm64.op_count++;
}
}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r15
movq %rdi, %rbx
callq 0x45587
movq %rax, %r14
movq %rax, %rdi
callq 0x455e2
leaq 0x5012f(%rip), %rsi # 0xd43a4
movq %r15, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq 0x456a6
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0(%rax)
je 0x842e6
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
movl $0x40, 0x50(%rax,%rcx)
movq %r14, %rdi
callq 0x455e2
cltq
movq 0x310(%rbx), %rcx
movq 0xe8(%rcx), %rcx
movzbl 0x36(%rcx), %edx
imulq $0x30, %rdx, %rdx
movq %rax, 0x58(%rcx,%rdx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
incb 0x36(%rax)
popq %rbx
popq %r14
popq %r15
retq
|
/radare[P]capstone/arch/AArch64/AArch64InstPrinter.c
|
AArch64_map_vregister
|
arm64_reg AArch64_map_vregister(unsigned int r)
{
// for some reasons different Arm64 can map different register number to
// the same register. this function handles the issue for exposing Mips
// operands by mapping internal registers to 'public' register.
unsigned int map[] = { 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, ARM64_REG_V0,
ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5,
ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10,
ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15,
ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20,
ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25,
ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30,
ARM64_REG_V31, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, ARM64_REG_V0, ARM64_REG_V1,
ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6,
ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11,
ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16,
ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21,
ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26,
ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2,
ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7,
ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12,
ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17,
ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22,
ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27,
ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0,
ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5,
ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10,
ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15,
ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20,
ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25,
ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30,
ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3,
ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8,
ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13,
ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18,
ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23,
ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28,
ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1,
ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6,
ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11,
ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16,
ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21,
ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26,
ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31,
ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4,
ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9,
ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14,
ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19,
ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24,
ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29,
ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2,
ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7,
ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12,
ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17,
ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22,
ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27,
ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, };
if (r < ARR_SIZE(map))
return map[r];
// cannot find this register
return 0;
}
|
xorl %eax, %eax
cmpl $0x1a3, %edi # imm = 0x1A3
ja 0x84d35
movl %edi, %eax
leaq 0x59a1e(%rip), %rcx # 0xde750
movl (%rcx,%rax,4), %eax
retq
|
/radare[P]capstone/arch/AArch64/AArch64Mapping.c
|
Mips_getInstruction
|
static DecodeStatus MipsDisassembler_getInstruction(int mode, MCInst *instr,
const uint8_t *code, size_t code_len,
uint16_t *Size,
uint64_t Address, bool isBigEndian, MCRegisterInfo *MRI)
{
uint32_t Insn;
DecodeStatus Result;
if (code_len < 4)
// not enough data
return MCDisassembler_Fail;
if (instr->flat_insn->detail) {
memset(instr->flat_insn->detail, 0, sizeof(cs_detail));
}
Result = readInstruction32((unsigned char*)code, &Insn, isBigEndian,
mode & CS_MODE_MICRO);
if (Result == MCDisassembler_Fail)
return MCDisassembler_Fail;
if (mode & CS_MODE_MICRO) {
// Calling the auto-generated decoder function.
Result = decodeInstruction(DecoderTableMicroMips32, instr, Insn, Address, MRI, mode);
if (Result != MCDisassembler_Fail) {
*Size = 4;
return Result;
}
return MCDisassembler_Fail;
}
#if 0
// TODO: properly handle this in the future with MIPS1/2 modes
if (((mode & CS_MODE_32) == 0) && ((mode & CS_MODE_MIPS3) == 0)) { // COP3
// DEBUG(dbgs() << "Trying COP3_ table (32-bit opcodes):\n");
Result = decodeInstruction(DecoderTableCOP3_32, instr, Insn, Address, MRI, mode);
if (Result != MCDisassembler_Fail) {
*Size = 4;
return Result;
}
}
#endif
if (((mode & CS_MODE_MIPS32R6) != 0) && ((mode & CS_MODE_MIPSGP64) != 0)) {
// DEBUG(dbgs() << "Trying Mips32r6_64r6 (GPR64) table (32-bit opcodes):\n");
Result = decodeInstruction(DecoderTableMips32r6_64r6_GP6432, instr, Insn,
Address, MRI, mode);
if (Result != MCDisassembler_Fail) {
*Size = 4;
return Result;
}
}
if ((mode & CS_MODE_MIPS32R6) != 0) {
// DEBUG(dbgs() << "Trying Mips32r6_64r6 table (32-bit opcodes):\n");
Result = decodeInstruction(DecoderTableMips32r6_64r632, instr, Insn,
Address, MRI, mode);
if (Result != MCDisassembler_Fail) {
*Size = 4;
return Result;
}
}
// Calling the auto-generated decoder function.
Result = decodeInstruction(DecoderTableMips32, instr, Insn, Address, MRI, mode);
if (Result != MCDisassembler_Fail) {
*Size = 4;
return Result;
}
return MCDisassembler_Fail;
}
|
cmpq $0x4, %rdx
jae 0x84eb9
xorl %eax, %eax
retq
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %r9, %r14
movq %rcx, %r15
movq %rsi, %r13
movq %r8, 0x10(%rsp)
movl 0x4(%rdi), %ebx
movb 0x28(%rdi), %r12b
movq 0x310(%rcx), %rax
movq 0xe8(%rax), %rdi
testq %rdi, %rdi
je 0x84efb
movl $0x5f8, %edx # imm = 0x5F8
xorl %esi, %esi
callq 0x440c0
movl %ebx, %ebp
andl $0x10, %ebp
movl %ebp, %ecx
shrl $0x4, %ecx
movzbl %r12b, %edx
leaq 0xc(%rsp), %rsi
movq %r13, %rdi
callq 0x85082
testl %ebp, %ebp
je 0x84f32
movl 0xc(%rsp), %edx
leaq 0x18103b(%rip), %rdi # 0x205f60
movq %r15, %rsi
movq %r14, %rcx
movq 0x50(%rsp), %r8
jmp 0x84fa1
movq 0x50(%rsp), %r12
movl %ebx, %eax
notl %eax
testb $-0x40, %al
jne 0x84f65
movl 0xc(%rsp), %r13d
leaq 0x1815d5(%rip), %rdi # 0x206520
movq %r15, %rsi
movl %r13d, %edx
movq %r14, %rcx
movq %r12, %r8
movl %ebx, %r9d
callq 0x850ac
testl %eax, %eax
jne 0x84fad
jmp 0x84f6f
movl 0xc(%rsp), %r13d
testb $0x40, %bl
je 0x84f8e
leaq 0x1815da(%rip), %rdi # 0x206550
movq %r15, %rsi
movl %r13d, %edx
movq %r14, %rcx
movq %r12, %r8
movl %ebx, %r9d
callq 0x850ac
testl %eax, %eax
jne 0x84fad
leaq 0x181cfb(%rip), %rdi # 0x206c90
movq %r15, %rsi
movl %r13d, %edx
movq %r14, %rcx
movq %r12, %r8
movl %ebx, %r9d
callq 0x850ac
testl %eax, %eax
je 0x84fbf
movq 0x10(%rsp), %rcx
movw $0x4, (%rcx)
cmpl $0x3, %eax
sete %al
jmp 0x84fc1
xorl %eax, %eax
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
Mips64_getInstruction
|
bool Mips64_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr,
uint16_t *size, uint64_t address, void *info)
{
cs_struct *handle = (cs_struct *)(uintptr_t)ud;
DecodeStatus status = Mips64Disassembler_getInstruction(handle->mode, instr,
code, code_len,
size,
address, handle->big_endian, (MCRegisterInfo *)info);
return status == MCDisassembler_Success;
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %r9, %r14
movq %r8, %rbx
movq %rcx, %r15
movq %rsi, %rax
movq 0x40(%rsp), %r12
movl 0x4(%rdi), %ebp
movzbl 0x28(%rdi), %edx
leaq 0x4(%rsp), %rsi
movq %rax, %rdi
xorl %ecx, %ecx
callq 0x85082
movq 0x310(%r15), %rax
movq 0xe8(%rax), %rdi
testq %rdi, %rdi
je 0x85021
movl $0x5f8, %edx # imm = 0x5F8
xorl %esi, %esi
callq 0x440c0
movl 0x4(%rsp), %r13d
leaq 0x185093(%rip), %rdi # 0x20a0c0
movq %r15, %rsi
movl %r13d, %edx
movq %r14, %rcx
movq %r12, %r8
movl %ebp, %r9d
callq 0x850ac
testl %eax, %eax
jne 0x85064
leaq 0x181c44(%rip), %rdi # 0x206c90
movq %r15, %rsi
movl %r13d, %edx
movq %r14, %rcx
movq %r12, %r8
movl %ebp, %r9d
callq 0x850ac
testl %eax, %eax
je 0x8507e
movw $0x4, (%rbx)
cmpl $0x3, %eax
sete %al
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
xorl %eax, %eax
jmp 0x8506f
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
readInstruction32
|
static DecodeStatus readInstruction32(unsigned char *code, uint32_t *insn, bool isBigEndian, bool isMicroMips)
{
// We want to read exactly 4 Bytes of data.
if (isBigEndian) {
// Encoded as a big-endian 32-bit word in the stream.
*insn = (code[3] << 0) |
(code[2] << 8) |
(code[1] << 16) |
(code[0] << 24);
} else {
// Encoded as a small-endian 32-bit word in the stream.
// Little-endian byte ordering:
// mips32r2: 4 | 3 | 2 | 1
// microMIPS: 2 | 1 | 4 | 3
if (isMicroMips) {
*insn = (code[2] << 0) |
(code[3] << 8) |
(code[0] << 16) |
(code[1] << 24);
} else {
*insn = (code[0] << 0) |
(code[1] << 8) |
(code[2] << 16) |
(code[3] << 24);
}
}
return MCDisassembler_Success;
}
|
testl %edx, %edx
je 0x8508c
movl (%rdi), %eax
bswapl %eax
jmp 0x850a9
testb %cl, %cl
je 0x850a7
movzwl 0x2(%rdi), %eax
movzbl (%rdi), %ecx
shll $0x10, %ecx
orl %eax, %ecx
movzbl 0x1(%rdi), %eax
shll $0x18, %eax
orl %ecx, %eax
jmp 0x850a9
movl (%rdi), %eax
movl %eax, (%rsi)
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
DecodeGPR32RegisterClass
|
static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_GPR32RegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x8908b
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x8
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
DecodeFCCRegisterClass
|
static DecodeStatus DecodeFCCRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 7)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_FCCRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x7, %esi
ja 0x8911a
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x11
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
DecodeACC64DSPRegisterClass
|
static DecodeStatus DecodeACC64DSPRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo >= 4)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_ACC64DSPRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x3, %esi
ja 0x89143
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x22
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
DecodeFGR32RegisterClass
|
static DecodeStatus DecodeFGR32RegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_FGR32RegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x89195
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x5
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
DecodeFGR64RegisterClass
|
static DecodeStatus DecodeFGR64RegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_FGR64RegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x891be
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x1b
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
DecodeCCRRegisterClass
|
static DecodeStatus DecodeCCRRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_CCRRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x891e7
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x1
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
DecodeMSA128HRegisterClass
|
static DecodeStatus DecodeMSA128HRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_MSA128HRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x8926d
pushq %rbx
movl %esi, %edx
movq %rdi, %rbx
pushq $0x2c
popq %rsi
movq %rcx, %rdi
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
DecodeMSA128WRegisterClass
|
static DecodeStatus DecodeMSA128WRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_MSA128WRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x89294
pushq %rbx
movl %esi, %edx
movq %rdi, %rbx
pushq $0x2d
popq %rsi
movq %rcx, %rdi
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
DecodeMSA128DRegisterClass
|
static DecodeStatus DecodeMSA128DRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_MSA128DRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x892bb
pushq %rbx
movl %esi, %edx
movq %rdi, %rbx
pushq $0x2b
popq %rsi
movq %rcx, %rdi
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
DecodeFGRCCRegisterClass
|
static DecodeStatus DecodeFGRCCRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_FGRCCRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x89323
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x6
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
DecodeCOP2RegisterClass
|
static DecodeStatus DecodeCOP2RegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_COP2RegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
|
xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x8934c
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x2
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
|
/radare[P]capstone/arch/Mips/MipsDisassembler.c
|
Mips_printInst
|
void Mips_printInst(MCInst *MI, SStream *O, void *info)
{
char *mnem;
switch (MCInst_getOpcode(MI)) {
default: break;
case Mips_Save16:
case Mips_SaveX16:
case Mips_Restore16:
case Mips_RestoreX16:
return;
}
// Try to print any aliases first.
mnem = printAliasInstr(MI, O, info);
if (!mnem) {
mnem = printAlias(MI, O);
if (!mnem) {
printInstruction(MI, O, NULL);
}
}
if (mnem) {
// fixup instruction id due to the change in alias instruction
MCInst_setOpcodePub(MI, Mips_map_insn(mnem));
cs_mem_free(mnem);
}
}
|
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %rdx, %r15
movq %rsi, %rbx
movq %rdi, %r14
callq 0x45580
leal -0x547(%rax), %ecx
cmpl $0x2, %ecx
jb 0x89390
addl $0xfffff9bf, %eax # imm = 0xFFFFF9BF
cmpl $0x2, %eax
jae 0x8939a
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
retq
movq %r14, %rdi
callq 0x45580
leal -0xa1(%rax), %ecx
cmpl $0x15, %ecx
jbe 0x8956d
cmpl $0x69e, %eax # imm = 0x69E
je 0x8a4ea
cmpl $0x11a, %eax # imm = 0x11A
je 0x8a1de
cmpl $0x20e, %eax # imm = 0x20E
je 0x8a01b
cmpl $0x21f, %eax # imm = 0x21F
je 0x8a539
cmpl $0x278, %eax # imm = 0x278
je 0x8a38d
cmpl $0x364, %eax # imm = 0x364
je 0x89f95
cmpl $0x366, %eax # imm = 0x366
je 0x89957
cmpl $0x36a, %eax # imm = 0x36A
je 0x89d33
cmpl $0x55c, %eax # imm = 0x55C
je 0x895b5
cmpl $0x55d, %eax # imm = 0x55D
je 0x895b5
cmpl $0x5a2, %eax # imm = 0x5A2
je 0x89b68
cmpl $0x5fc, %eax # imm = 0x5FC
je 0x899a7
cmpl $0x623, %eax # imm = 0x623
je 0x8a3c5
cmpl $0x638, %eax # imm = 0x638
je 0x89bf3
cmpl $0x63a, %eax # imm = 0x63A
je 0x8a498
cmpl $0x66c, %eax # imm = 0x66C
je 0x89ea7
cmpl $0x670, %eax # imm = 0x670
je 0x8a29f
cmpl $0x675, %eax # imm = 0x675
je 0x8a0f0
cmpl $0x680, %eax # imm = 0x680
je 0x89a7a
cmpl $0x684, %eax # imm = 0x684
je 0x89db9
cmpl $0x687, %eax # imm = 0x687
je 0x89c45
cmpl $0x45, %eax
jne 0x8a60d
movq %r14, %rdi
callq 0x45595
cmpl $0x3, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r12
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r12, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x15, %eax
je 0x8a0e4
jmp 0x8a60d
leaq 0x5686c(%rip), %rax # 0xdfde0
movslq (%rax,%rcx,4), %rcx
addq %rax, %rcx
jmpq *%rcx
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x592a8(%rip), %rdi # 0xe2858
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x1, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0x592fe(%rip), %rdi # 0xe2900
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x5929d(%rip), %rdi # 0xe28d7
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x9b, %eax
jne 0x8a60d
leaq 0x5920e(%rip), %rdi # 0xe2882
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x5921a(%rip), %rdi # 0xe28c6
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x5918d(%rip), %rdi # 0xe2871
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x59199(%rip), %rdi # 0xe28b5
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x59115(%rip), %rdi # 0xe2869
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x590d4(%rip), %rdi # 0xe2860
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x590e0(%rip), %rdi # 0xe28a4
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x590d3(%rip), %rdi # 0xe28cf
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x9b, %eax
jne 0x8a60d
leaq 0x5905d(%rip), %rdi # 0xe2893
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x9b, %eax
jne 0x8a60d
leaq 0x5900a(%rip), %rdi # 0xe287a
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x58ff4(%rip), %rdi # 0xe289c
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x9b, %eax
jne 0x8a60d
leaq 0x58fa9(%rip), %rdi # 0xe288b
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x58f93(%rip), %rdi # 0xe28ad
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x1f, %eax
jne 0x8a60d
leaq 0x58f6c(%rip), %rdi # 0xe28be
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x14b, %eax # imm = 0x14B
jne 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x1c
jmp 0x89fde
movq %r14, %rdi
callq 0x45595
cmpl $0x3, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r12
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r12, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x15, %eax
jne 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
leaq 0x54ba7(%rip), %rdi # 0xde61c
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x3, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r12
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r12, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0x58dd9(%rip), %rdi # 0xe293c
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x3, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x15, %eax
jne 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x15, %eax
jne 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0x58baa(%rip), %rdi # 0xe2798
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x1, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0x5ed9e(%rip), %rdi # 0xe89de
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x3, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r12
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r12, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0x58c25(%rip), %rdi # 0xe2953
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x13, %eax
jne 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
leaq 0x58b41(%rip), %rdi # 0xe28f5
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x3, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r12
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r12, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0x58aa5(%rip), %rdi # 0xe2947
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x3, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r12
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r12, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0x5898a(%rip), %rdi # 0xe291a
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x15, %eax
jne 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
leaq 0x588d9(%rip), %rdi # 0xe28ef
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x3, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x1c
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r12
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r12, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x1c
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x14b, %eax # imm = 0x14B
jne 0x8a60d
leaq 0x5cd58(%rip), %rdi # 0xe6e43
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x3, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r12
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r12, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0x58757(%rip), %rdi # 0xe2930
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a24b
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a24b
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a24b
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a24b
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
je 0x8ae95
movq %r14, %rdi
callq 0x45595
cmpl $0x2, %eax
jne 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0x5864c(%rip), %rdi # 0xe28e6
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x3, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r12
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r12, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0x5859d(%rip), %rdi # 0xe2925
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x1, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x15, %eax
jne 0x8a60d
leaq 0x5ea2b(%rip), %rdi # 0xe8deb
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x3, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r12
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r12, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
pushq $0x1
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x15, %eax
jne 0x8a60d
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8a60d
pushq $0x8
popq %rsi
movq %r15, %rdi
callq 0x48441
movq %rax, %r15
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455da
movq %r15, %rdi
movl %eax, %esi
callq 0x483ac
testb %al, %al
je 0x8a60d
leaq 0x58473(%rip), %rdi # 0xe2906
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x1, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0x5842d(%rip), %rdi # 0xe2912
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x1, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testq %rax, %rax
jne 0x8a60d
leaq 0xbd0aa(%rip), %rdi # 0x1475e1
jmp 0x8a56c
movq %r14, %rdi
callq 0x45595
cmpl $0x1, %eax
jne 0x8a60d
movq %r14, %rdi
xorl %esi, %esi
callq 0x45587
movq %rax, %rdi
callq 0x455da
cmpl $0x15, %eax
jne 0x8a60d
leaq 0x5e330(%rip), %rdi # 0xe889c
callq 0x4851f
movq %rax, %r15
movq %rax, %r13
movzbl (%r13), %eax
testl %eax, %eax
je 0x8a597
cmpl $0x20, %eax
je 0x8a58f
cmpl $0x9, %eax
je 0x8a58f
incq %r13
jmp 0x8a577
movb $0x0, (%r13)
incq %r13
movq %rbx, %rdi
movq %r15, %rsi
callq 0x4565f
cmpb $0x0, (%r13)
je 0x8a604
leaq 0x54114(%rip), %rsi # 0xde6c4
movq %rbx, %rdi
callq 0x4565f
leaq 0x52b82(%rip), %r12 # 0xdd141
movzbl (%r13), %eax
cmpl $0x24, %eax
je 0x8a5df
testl %eax, %eax
je 0x8a604
movsbl %al, %edx
movq %rbx, %rdi
movq %r12, %rsi
xorl %eax, %eax
callq 0x456a6
jmp 0x8a5ff
movsbl 0x1(%r13), %esi
cmpl $-0x1, %esi
je 0x8a5fb
incq %r13
decl %esi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
jmp 0x8a5ff
addq $0x3, %r13
incq %r13
jmp 0x8a5bf
testq %r15, %r15
jne 0x8a89d
movq %r14, %rdi
callq 0x45580
cmpl $0xa6, %eax
je 0x8a771
cmpl $0xaa, %eax
je 0x8a6f9
cmpl $0x4dd, %eax # imm = 0x4DD
je 0x8a7e3
cmpl $0xc0, %eax
je 0x8a753
cmpl $0xc2, %eax
je 0x8a71c
cmpl $0xcb, %eax
je 0x8a825
cmpl $0x101, %eax # imm = 0x101
je 0x8a763
cmpl $0x102, %eax # imm = 0x102
je 0x8a851
cmpl $0x10c, %eax # imm = 0x10C
je 0x8a7b5
cmpl $0x364, %eax # imm = 0x364
je 0x8a807
cmpl $0x366, %eax # imm = 0x366
je 0x8a7d7
cmpl $0x4d3, %eax # imm = 0x4D3
je 0x8a6eb
cmpl $0x4d4, %eax # imm = 0x4D4
je 0x8a794
cmpl $0x4d6, %eax # imm = 0x4D6
je 0x8a6eb
cmpl $0xbf, %eax
jne 0x8a8c4
pushq $0x15
popq %rdx
movq %r14, %rdi
xorl %esi, %esi
callq 0x8aea1
testb %al, %al
je 0x8a86e
pushq $0x1
popq %rsi
pushq $0x15
popq %rdx
movq %r14, %rdi
callq 0x8aea1
testb %al, %al
je 0x8a86e
leaq 0x5299a(%rip), %rdi # 0xdd07e
pushq $0x2
jmp 0x8a843
pushq $0x2
popq %rsi
pushq $0x15
popq %rdx
movq %r14, %rdi
jmp 0x8a79f
movq %r14, %rdi
xorl %esi, %esi
movl $0x9b, %edx
callq 0x8aea1
testb %al, %al
je 0x8a8c4
leaq 0x5803f(%rip), %rdi # 0xe2756
jmp 0x8a841
pushq $0x15
popq %rdx
movq %r14, %rdi
xorl %esi, %esi
callq 0x8aea1
testb %al, %al
je 0x8a8c4
pushq $0x1
popq %rsi
pushq $0x15
popq %rdx
movq %r14, %rdi
callq 0x8aea1
testb %al, %al
je 0x8a8c4
leaq 0x57ff7(%rip), %rdi # 0xe2745
jmp 0x8a887
pushq $0x1
popq %rsi
movq %r14, %rdi
movl $0x14b, %edx # imm = 0x14B
jmp 0x8a877
pushq $0x1
popq %rsi
pushq $0x15
popq %rdx
movq %r14, %rdi
jmp 0x8a85c
movq %r14, %rdi
xorl %esi, %esi
movl $0x9b, %edx
callq 0x8aea1
testb %al, %al
je 0x8a8c4
leaq 0x57fcc(%rip), %rdi # 0xe275b
jmp 0x8a841
pushq $0x2
popq %rsi
movq %r14, %rdi
movl $0x14b, %edx # imm = 0x14B
callq 0x8aea1
testb %al, %al
je 0x8a8c4
leaq 0xc4540(%rip), %rdi # 0x14ecf3
jmp 0x8a800
pushq $0x1
popq %rsi
pushq $0x15
popq %rdx
movq %r14, %rdi
callq 0x8aea1
testb %al, %al
je 0x8a8c4
leaq 0x57f7e(%rip), %rdi # 0xe2750
jmp 0x8a887
movq %r14, %rdi
xorl %esi, %esi
movl $0x115, %edx # imm = 0x115
jmp 0x8a80f
pushq $0x2
popq %rsi
pushq $0x15
popq %rdx
movq %r14, %rdi
callq 0x8aea1
testb %al, %al
je 0x8a8c4
leaq 0xbc862(%rip), %rdi # 0x147062
pushq $0x1
jmp 0x8a889
pushq $0x13
popq %rdx
movq %r14, %rdi
xorl %esi, %esi
callq 0x8aea1
testb %al, %al
je 0x8a8c4
leaq 0x57f3d(%rip), %rdi # 0xe2760
jmp 0x8a841
pushq $0x15
popq %rdx
movq %r14, %rdi
xorl %esi, %esi
callq 0x8aea1
testb %al, %al
je 0x8a8c4
leaq 0x54ad9(%rip), %rdi # 0xdf31a
pushq $0x1
popq %rdx
movq %r14, %rsi
movq %rbx, %rcx
callq 0x8aedd
jmp 0x8a895
pushq $0x1
popq %rsi
movq %r14, %rdi
movl $0x14b, %edx # imm = 0x14B
callq 0x8aea1
testb %al, %al
je 0x8a8c4
leaq 0x57edf(%rip), %rdi # 0xe274b
jmp 0x8a887
pushq $0x1
popq %rsi
pushq $0x15
popq %rdx
movq %r14, %rdi
callq 0x8aea1
testb %al, %al
je 0x8a8c4
leaq 0x57eb9(%rip), %rdi # 0xe2740
pushq $0x2
popq %rdx
movq %r14, %rsi
movq %rbx, %rcx
callq 0x8af22
movq %rax, %r15
testq %rax, %rax
je 0x8a8c4
movq %r15, %rdi
callq 0x8b65c
movq %r14, %rdi
movl %eax, %esi
callq 0x4557d
leaq 0x11a812(%rip), %rax # 0x1a50c8
movq %r15, %rdi
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
jmpq *(%rax)
movq %r14, %rdi
callq 0x45580
movl %eax, %eax
leaq 0x55c7b(%rip), %rcx # 0xe0550
movl (%rcx,%rax,4), %r12d
movq %r14, %rdi
callq 0x45580
movl %eax, %eax
leaq 0x57726(%rip), %rcx # 0xe2010
movzbl (%rax,%rcx), %r15d
movl %r12d, %eax
andl $0x3fff, %eax # imm = 0x3FFF
leaq 0x1802c2(%rip), %rcx # 0x20abc0
leaq (%rax,%rcx), %rsi
decq %rsi
movq %rbx, %rdi
callq 0x4565f
movl %r12d, %eax
shrl $0xe, %eax
andl $0x7, %eax
leaq 0x5551b(%rip), %rcx # 0xdfe38
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq %r14, %rdi
xorl %esi, %esi
movq %rbx, %rdx
callq 0x8af65
movl %r12d, %eax
shrl $0x11, %eax
andl $0xf, %eax
leaq 0x55515(%rip), %rcx # 0xdfe58
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
pushq $0x1
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
leaq 0x49965(%rip), %rsi # 0xd42c6
movq %rbx, %rdi
callq 0x4565f
movl %r12d, %eax
shrl $0x11, %eax
andl $0xf, %eax
leaq 0x554df(%rip), %rcx # 0xdfe58
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
pushq $0x2
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8b198
leaq 0x4992f(%rip), %rsi # 0xd42c6
movq %rbx, %rdi
callq 0x4565f
movq %r14, %rdi
xorl %esi, %esi
jmp 0x8ac2a
pushq $0x3
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
movl %r12d, %eax
shrl $0x11, %eax
andl $0xf, %eax
leaq 0x55491(%rip), %rcx # 0xdfe58
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
pushq $0x2
popq %rsi
movq %r14, %rdi
callq 0x45587
movq %rax, %rdi
callq 0x455e2
testl $0xffffffe0, %eax # imm = 0xFFFFFFE0
je 0x8aa15
xorl %esi, %esi
jmp 0x8aa26
pushq $0x2
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
leaq 0x498c3(%rip), %rsi # 0xd42c6
movq %rbx, %rdi
callq 0x4565f
movq %r14, %rdi
xorl %esi, %esi
jmp 0x8ab71
andl $0x1f, %eax
leaq 0x57ca1(%rip), %rcx # 0xe26c0
movslq (%rcx,%rax,4), %rsi
addq %rcx, %rsi
movq %rbx, %rdi
callq 0x4565f
movl %r12d, %eax
shrl $0x11, %eax
andl $0xf, %eax
leaq 0x5541a(%rip), %rcx # 0xdfe58
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
leaq 0x49878(%rip), %rsi # 0xd42c6
jmp 0x8aaea
pushq $0x2
jmp 0x8ac26
leaq 0x57d35(%rip), %rsi # 0xe2796
jmp 0x8ac90
leaq 0x57d20(%rip), %rsi # 0xe278d
jmp 0x8ac90
leaq 0x57d10(%rip), %rsi # 0xe2789
jmp 0x8ab47
leaq 0x57d3b(%rip), %rsi # 0xe27c0
movq %rbx, %rdi
callq 0x4565f
jmp 0x8ab1f
pushq $0x2
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
jmp 0x8aaf2
leaq 0x57cc4(%rip), %rsi # 0xe276d
jmp 0x8ab63
leaq 0x57ce7(%rip), %rsi # 0xe279c
movq %rbx, %rdi
callq 0x4565f
pushq $0x1
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
leaq 0x57cea(%rip), %rsi # 0xe27bc
jmp 0x8ac90
leaq 0x57c98(%rip), %rsi # 0xe2776
jmp 0x8ac90
leaq 0x5255d(%rip), %rsi # 0xdd047
movq %rbx, %rdi
callq 0x4565f
movl %r12d, %eax
shrl $0x15, %eax
andl $0xf, %eax
decq %rax
cmpq $0x9, %rax
ja 0x8ac52
leaq 0x55389(%rip), %rcx # 0xdfe98
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
pushq $0x2
jmp 0x8ac58
pushq $0x1
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
leaq 0x49792(%rip), %rsi # 0xd42c6
movq %rbx, %rdi
callq 0x4565f
pushq $0x2
jmp 0x8ab6d
leaq 0x57c3e(%rip), %rsi # 0xe2785
movq %rbx, %rdi
callq 0x4565f
movq %r14, %rdi
xorl %esi, %esi
movq %rbx, %rdx
callq 0x8af65
leaq 0x49763(%rip), %rsi # 0xd42c6
movq %rbx, %rdi
callq 0x4565f
pushq $0x1
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
jmp 0x8af65
pushq $0x2
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8b198
leaq 0x4974b(%rip), %rsi # 0xd42e2
movq %rbx, %rdi
callq 0x4565f
pushq $0x3
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
leaq 0x52493(%rip), %rsi # 0xdd047
movq %rbx, %rdi
callq 0x4565f
pushq $0x4
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8b198
leaq 0x5306d(%rip), %rsi # 0xddc3e
jmp 0x8ac90
leaq 0x57bfa(%rip), %rsi # 0xe27d7
movq %rbx, %rdi
callq 0x4565f
movq %r14, %rdi
xorl %esi, %esi
movq %rbx, %rdx
callq 0x8af65
leaq 0x57be6(%rip), %rsi # 0xe27df
jmp 0x8ac90
pushq $0x3
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8b198
leaq 0x496cf(%rip), %rsi # 0xd42e2
jmp 0x8ab34
leaq 0x57bb0(%rip), %rsi # 0xe27cf
jmp 0x8aa03
pushq $0x1
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
jmp 0x8b29a
pushq $0x1
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
jmp 0x8b198
pushq $0x1
jmp 0x8ac58
pushq $0x4
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
movl %r12d, %eax
shrl $0x19, %eax
andl $0xf, %eax
leaq 0x5524c(%rip), %rcx # 0xdfec0
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
leaq 0x49642(%rip), %rsi # 0xd42c6
jmp 0x8ad21
leaq 0x57ae5(%rip), %rsi # 0xe2775
movq %rbx, %rdi
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
jmp 0x4565f
leaq 0x57b79(%rip), %rsi # 0xe2821
jmp 0x8aa85
leaq 0x40353(%rip), %rsi # 0xcb007
movq %rbx, %rdi
callq 0x4565f
pushq $0x1
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
leaq 0xbb4ca(%rip), %rsi # 0x14619b
jmp 0x8ac90
leaq 0x57b3e(%rip), %rsi # 0xe2818
movq %rbx, %rdi
callq 0x4565f
pushq $0x1
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
leaq 0x57b25(%rip), %rsi # 0xe281c
jmp 0x8ac90
leaq 0x57b07(%rip), %rsi # 0xe2807
jmp 0x8ac90
leaq 0x57b2b(%rip), %rsi # 0xe2834
jmp 0x8aa85
leaq 0x57ae3(%rip), %rsi # 0xe27f8
jmp 0x8ac90
leaq 0x52326(%rip), %rsi # 0xdd047
movq %rbx, %rdi
callq 0x4565f
shrl $0x1d, %r12d
decq %r12
cmpq $0x3, %r12
ja 0x8ae50
leaq 0x551bf(%rip), %rax # 0xdff00
movslq (%rax,%r12,4), %rcx
addq %rax, %rcx
jmpq *%rcx
pushq $0x2
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8b2fa
movl %r15d, %eax
andl $0x3, %eax
leaq 0x551ab(%rip), %rcx # 0xdff10
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
leaq 0x57a70(%rip), %rsi # 0xe27e5
jmp 0x8ab34
leaq 0x5c1e0(%rip), %rsi # 0xe6f61
jmp 0x8ac90
leaq 0x57a61(%rip), %rsi # 0xe27ee
jmp 0x8ab34
leaq 0x57a73(%rip), %rsi # 0xe280c
movq %rbx, %rdi
callq 0x4565f
pushq $0x1
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
leaq 0x579b7(%rip), %rsi # 0xe276d
movq %rbx, %rdi
callq 0x4565f
pushq $0x3
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
leaq 0x57a42(%rip), %rsi # 0xe2815
jmp 0x8ac90
leaq 0x57a18(%rip), %rsi # 0xe27f7
jmp 0x8ac90
pushq $0x3
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8b2fa
movl %r15d, %eax
andl $0x3, %eax
leaq 0x55111(%rip), %rcx # 0xdff10
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
pushq $0x3
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
movl %r15d, %eax
andl $0x3, %eax
leaq 0x550ed(%rip), %rcx # 0xdff10
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
pushq $0x2
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8b198
movl %r15d, %eax
andl $0x3, %eax
leaq 0x550c9(%rip), %rcx # 0xdff10
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
pushq $0x2
popq %rsi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x8af65
movl %r15d, %eax
andl $0x3, %eax
leaq 0x550a5(%rip), %rcx # 0xdff10
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
leaq 0x4944b(%rip), %rsi # 0xd42c6
movq %rbx, %rdi
callq 0x4565f
pushq $0x3
popq %rsi
testb $0x4, %r15b
jne 0x8ab6e
jmp 0x8ac3e
leaq 0x57a44(%rip), %rdi # 0xe28e0
jmp 0x8a56c
|
/radare[P]capstone/arch/Mips/MipsInstPrinter.c
|
printOperand
|
static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
{
MCOperand *Op;
if (OpNo >= MI->size)
return;
Op = MCInst_getOperand(MI, OpNo);
if (MCOperand_isReg(Op)) {
unsigned int reg = MCOperand_getReg(Op);
printRegName(O, reg);
reg = Mips_map_register(reg);
if (MI->csh->detail) {
if (MI->csh->doing_mem) {
MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.base = reg;
} else {
MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_REG;
MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].reg = reg;
MI->flat_insn->detail->mips.op_count++;
}
}
} else if (MCOperand_isImm(Op)) {
int64_t imm = MCOperand_getImm(Op);
if (MI->csh->doing_mem) {
if (imm) { // only print Imm offset if it is not 0
if (imm >= 0) {
if (imm > HEX_THRESHOLD)
SStream_concat(O, "0x%"PRIx64, imm);
else
SStream_concat(O, "%"PRIu64, imm);
} else {
if (imm < -HEX_THRESHOLD)
SStream_concat(O, "-0x%"PRIx64, -imm);
else
SStream_concat(O, "-%"PRIu64, -imm);
}
}
if (MI->csh->detail)
MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.disp = imm;
} else {
if (imm >= 0) {
if (imm > HEX_THRESHOLD)
SStream_concat(O, "0x%"PRIx64, imm);
else
SStream_concat(O, "%"PRIu64, imm);
} else {
if (imm < -HEX_THRESHOLD)
SStream_concat(O, "-0x%"PRIx64, -imm);
else
SStream_concat(O, "-%"PRIu64, -imm);
}
if (MI->csh->detail) {
MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_IMM;
MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].imm = imm;
MI->flat_insn->detail->mips.op_count++;
}
}
}
}
|
movzbl 0x4(%rdi), %eax
cmpl %esi, %eax
jbe 0x8b197
pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r15
movq %rdi, %rbx
callq 0x45587
movq %rax, %r14
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8b00c
movq %r14, %rdi
callq 0x455da
movl %eax, %r14d
leal -0x1(%r14), %eax
leaq 0x54f7a(%rip), %rcx # 0xdff20
movl (%rcx,%rax,4), %eax
leaq 0x17f9f0(%rip), %rdx # 0x20a9a0
addq %rax, %rdx
leaq 0x577af(%rip), %rsi # 0xe2769
movq %r15, %rdi
xorl %eax, %eax
callq 0x456a6
movl %r14d, %edi
callq 0x8b67b
movq 0x320(%rbx), %rdx
cmpl $0x0, 0xe0(%rdx)
je 0x8b192
movq 0x310(%rbx), %rcx
movq 0xe8(%rcx), %rcx
movzbl 0x30(%rcx), %esi
addq $0x38, %rcx
cmpb $0x1, 0xe8(%rdx)
jne 0x8b058
imulq $0x18, %rsi, %rdx
movl %eax, 0x8(%rcx,%rdx)
jmp 0x8b192
movq %r14, %rdi
callq 0x455ca
testb %al, %al
je 0x8b192
movq %r14, %rdi
callq 0x455e2
movq %rax, %r14
movq 0x320(%rbx), %rax
cmpb $0x1, 0xe8(%rax)
jne 0x8b082
testq %r14, %r14
je 0x8b167
js 0x8b0ba
cmpq $0xa, %r14
jb 0x8b0d6
leaq 0xbb1b2(%rip), %rsi # 0x146205
jmp 0x8b0dd
imulq $0x18, %rsi, %rdx
movl $0x1, (%rcx,%rdx)
movq 0x310(%rbx), %rcx
movq 0xe8(%rcx), %rcx
movzbl 0x30(%rcx), %edx
imulq $0x18, %rdx, %rdx
movl %eax, 0x40(%rcx,%rdx)
jmp 0x8b143
testq %r14, %r14
js 0x8b096
cmpq $0xa, %r14
jb 0x8b0ab
leaq 0xbb171(%rip), %rsi # 0x146205
jmp 0x8b0b2
movq %r14, %rdx
negq %rdx
cmpq $-0xa, %r14
ja 0x8b0e5
leaq 0x363b6(%rip), %rsi # 0xc145f
jmp 0x8b0ec
leaq 0xbb15c(%rip), %rsi # 0x14620e
movq %r15, %rdi
movq %r14, %rdx
jmp 0x8b0ef
movq %r14, %rdx
negq %rdx
cmpq $-0xa, %r14
ja 0x8b156
leaq 0x3638e(%rip), %rsi # 0xc145f
jmp 0x8b15d
leaq 0xbb131(%rip), %rsi # 0x14620e
movq %r15, %rdi
movq %r14, %rdx
jmp 0x8b160
leaq 0x3637b(%rip), %rsi # 0xc1467
movq %r15, %rdi
xorl %eax, %eax
callq 0x456a6
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0(%rax)
je 0x8b192
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x30(%rax), %ecx
imulq $0x18, %rcx, %rcx
movl $0x2, 0x38(%rax,%rcx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x30(%rax), %ecx
imulq $0x18, %rcx, %rcx
movq %r14, 0x40(%rax,%rcx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
incb 0x30(%rax)
jmp 0x8b192
leaq 0x3630a(%rip), %rsi # 0xc1467
movq %r15, %rdi
xorl %eax, %eax
callq 0x456a6
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0(%rax)
je 0x8b192
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x30(%rax), %ecx
imulq $0x18, %rcx, %rcx
movq %r14, 0x48(%rax,%rcx)
popq %rbx
popq %r14
popq %r15
retq
|
/radare[P]capstone/arch/Mips/MipsInstPrinter.c
|
printUnsignedImm
|
static void printUnsignedImm(MCInst *MI, int opNum, SStream *O)
{
MCOperand *MO = MCInst_getOperand(MI, opNum);
if (MCOperand_isImm(MO)) {
int64_t imm = MCOperand_getImm(MO);
if (imm >= 0) {
if (imm > HEX_THRESHOLD)
SStream_concat(O, "0x%x", (unsigned short int)imm);
else
SStream_concat(O, "%u", (unsigned short int)imm);
} else {
if (imm < -HEX_THRESHOLD)
SStream_concat(O, "-0x%x", (short int)-imm);
else
SStream_concat(O, "-%u", (short int)-imm);
}
if (MI->csh->detail) {
MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_IMM;
MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].imm = (unsigned short int)imm;
MI->flat_insn->detail->mips.op_count++;
}
} else
printOperand(MI, opNum, O);
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rdx, %r15
movl %esi, %ebp
movq %rdi, %rbx
callq 0x45587
movq %rax, %r14
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8b1de
movq %r14, %rdi
callq 0x455e2
movq %rax, %r14
testq %rax, %rax
js 0x8b1f5
cmpq $0xa, %r14
jb 0x8b20c
movzwl %r14w, %edx
leaq 0x5b349(%rip), %rsi # 0xe6525
jmp 0x8b227
movq %rbx, %rdi
movl %ebp, %esi
movq %r15, %rdx
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
jmp 0x8af65
cmpq $-0xa, %r14
ja 0x8b21b
movl %r14d, %eax
negl %eax
movswl %ax, %edx
leaq 0x491a1(%rip), %rsi # 0xd43ab
jmp 0x8b227
leaq 0x3fd13(%rip), %rsi # 0xcaf26
movq %r15, %rdi
movl %r14d, %edx
jmp 0x8b22a
movl %r14d, %edx
negl %edx
leaq 0x4918d(%rip), %rsi # 0xd43b4
movq %r15, %rdi
xorl %eax, %eax
callq 0x456a6
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0(%rax)
je 0x8b28f
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x30(%rax), %ecx
imulq $0x18, %rcx, %rcx
movl $0x2, 0x38(%rax,%rcx)
movzwl %r14w, %eax
movq 0x310(%rbx), %rcx
movq 0xe8(%rcx), %rcx
movzbl 0x30(%rcx), %edx
imulq $0x18, %rdx, %rdx
movq %rax, 0x40(%rcx,%rdx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
incb 0x30(%rax)
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
|
/radare[P]capstone/arch/Mips/MipsInstPrinter.c
|
printMemOperand
|
static void printMemOperand(MCInst *MI, int opNum, SStream *O)
{
// Load/Store memory operands -- imm($reg)
// If PIC target the target is loaded as the
// pattern lw $25,%call16($28)
set_mem_access(MI, true);
printOperand(MI, opNum + 1, O);
SStream_concat0(O, "(");
printOperand(MI, opNum, O);
SStream_concat0(O, ")");
set_mem_access(MI, false);
}
|
pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r14
movl %esi, %r15d
movq %rdi, %rbx
pushq $0x1
popq %rsi
callq 0x8b3cf
leal 0x1(%r15), %esi
movq %rbx, %rdi
movq %r14, %rdx
callq 0x8af65
leaq 0x3fd41(%rip), %rsi # 0xcb007
movq %r14, %rdi
callq 0x4565f
movq %rbx, %rdi
movl %r15d, %esi
movq %r14, %rdx
callq 0x8af65
leaq 0xbaeb8(%rip), %rsi # 0x14619b
movq %r14, %rdi
callq 0x4565f
movq %rbx, %rdi
xorl %esi, %esi
popq %rbx
popq %r14
popq %r15
jmp 0x8b3cf
|
/radare[P]capstone/arch/Mips/MipsInstPrinter.c
|
printUnsignedImm8
|
static void printUnsignedImm8(MCInst *MI, int opNum, SStream *O)
{
MCOperand *MO = MCInst_getOperand(MI, opNum);
if (MCOperand_isImm(MO)) {
uint8_t imm = (uint8_t)MCOperand_getImm(MO);
if (imm > HEX_THRESHOLD)
SStream_concat(O, "0x%x", imm);
else
SStream_concat(O, "%u", imm);
if (MI->csh->detail) {
MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_IMM;
MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].imm = imm;
MI->flat_insn->detail->mips.op_count++;
}
} else
printOperand(MI, opNum, O);
}
|
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rdx, %r14
movl %esi, %ebp
movq %rdi, %rbx
callq 0x45587
movq %rax, %r15
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8b3b8
movq %r15, %rdi
callq 0x455e2
movq %rax, %r15
movzbl %r15b, %edx
cmpl $0xa, %edx
leaq 0x5b1eb(%rip), %rax # 0xe6525
leaq 0x3fbe5(%rip), %rsi # 0xcaf26
cmovaeq %rax, %rsi
movq %r14, %rdi
xorl %eax, %eax
callq 0x456a6
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0(%rax)
je 0x8b3ad
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
movzbl 0x30(%rax), %ecx
imulq $0x18, %rcx, %rcx
movl $0x2, 0x38(%rax,%rcx)
movzbl %r15b, %eax
movq 0x310(%rbx), %rcx
movq 0xe8(%rcx), %rcx
movzbl 0x30(%rcx), %edx
imulq $0x18, %rdx, %rdx
movq %rax, 0x40(%rcx,%rdx)
movq 0x310(%rbx), %rax
movq 0xe8(%rax), %rax
incb 0x30(%rax)
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movq %rbx, %rdi
movl %ebp, %esi
movq %r14, %rdx
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
jmp 0x8af65
|
/radare[P]capstone/arch/Mips/MipsInstPrinter.c
|
Mips_reg_name
|
const char *Mips_reg_name(csh handle, unsigned int reg)
{
#ifndef CAPSTONE_DIET
if (reg >= MIPS_REG_ENDING)
return NULL;
return reg_name_maps[reg].name;
#else
return NULL;
#endif
}
|
cmpl $0x87, %esi
jbe 0x8b453
xorl %eax, %eax
retq
movl %esi, %eax
shlq $0x4, %rax
leaq 0x10c0f0(%rip), %rcx # 0x197550
movq 0x8(%rax,%rcx), %rax
retq
|
/radare[P]capstone/arch/Mips/MipsMapping.c
|
Mips_insn_name
|
const char *Mips_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= MIPS_INS_ENDING)
return NULL;
return insn_name_maps[id].name;
#else
return NULL;
#endif
}
|
cmpl $0x249, %esi # imm = 0x249
jbe 0x8b616
xorl %eax, %eax
retq
movl %esi, %eax
shlq $0x4, %rax
leaq 0x1819fd(%rip), %rcx # 0x20d020
movq 0x8(%rax,%rcx), %rax
retq
|
/radare[P]capstone/arch/Mips/MipsMapping.c
|
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