IR_x86
stringlengths 592
249k
| IR_arm
stringlengths 558
250k
| filename
stringlengths 17
191
|
|---|---|---|
; ModuleID = 'AnghaBench/freebsd/usr.bin/m4/extr_gnum4.c_dopath.c'
source_filename = "AnghaBench/freebsd/usr.bin/m4/extr_gnum4.c_dopath.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.path_entry = type { ptr, ptr }
@PATH_MAX = dso_local local_unnamed_addr global i32 0, align 4
@first = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [6 x i8] c"%s/%s\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"r\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @dopath], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef ptr @dopath(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @PATH_MAX, align 4, !tbaa !5
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4, align 16
%6 = load ptr, ptr @first, align 8, !tbaa !9
%7 = icmp eq ptr %6, null
br i1 %7, label %20, label %12
8: ; preds = %12
%9 = getelementptr inbounds %struct.path_entry, ptr %13, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !9
%11 = icmp eq ptr %10, null
br i1 %11, label %20, label %12, !llvm.loop !11
12: ; preds = %2, %8
%13 = phi ptr [ %10, %8 ], [ %6, %2 ]
%14 = load ptr, ptr %13, align 8, !tbaa !13
%15 = call i32 @snprintf(ptr noundef nonnull %5, i32 noundef %3, ptr noundef nonnull @.str, ptr noundef %14, ptr noundef %1) #3
%16 = call ptr @fopen(ptr noundef nonnull %5, ptr noundef nonnull @.str.1)
%17 = icmp eq ptr %16, null
br i1 %17, label %8, label %18
18: ; preds = %12
%19 = call i32 @set_input(ptr noundef %0, ptr noundef nonnull %16, ptr noundef nonnull %5) #3
br label %20
20: ; preds = %8, %2, %18
%21 = phi ptr [ %0, %18 ], [ null, %2 ], [ null, %8 ]
ret ptr %21
}
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noalias noundef ptr @fopen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #2
declare i32 @set_input(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !10, i64 0}
!14 = !{!"path_entry", !10, i64 0, !10, i64 8}
|
; ModuleID = 'AnghaBench/freebsd/usr.bin/m4/extr_gnum4.c_dopath.c'
source_filename = "AnghaBench/freebsd/usr.bin/m4/extr_gnum4.c_dopath.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PATH_MAX = common local_unnamed_addr global i32 0, align 4
@first = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [6 x i8] c"%s/%s\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"r\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @dopath], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef ptr @dopath(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @PATH_MAX, align 4, !tbaa !6
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4, align 1
%6 = load ptr, ptr @first, align 8, !tbaa !10
%7 = icmp eq ptr %6, null
br i1 %7, label %20, label %12
8: ; preds = %12
%9 = getelementptr inbounds i8, ptr %13, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !10
%11 = icmp eq ptr %10, null
br i1 %11, label %20, label %12, !llvm.loop !12
12: ; preds = %2, %8
%13 = phi ptr [ %10, %8 ], [ %6, %2 ]
%14 = load ptr, ptr %13, align 8, !tbaa !14
%15 = call i32 @snprintf(ptr noundef nonnull %5, i32 noundef %3, ptr noundef nonnull @.str, ptr noundef %14, ptr noundef %1) #3
%16 = call ptr @fopen(ptr noundef nonnull %5, ptr noundef nonnull @.str.1)
%17 = icmp eq ptr %16, null
br i1 %17, label %8, label %18
18: ; preds = %12
%19 = call i32 @set_input(ptr noundef %0, ptr noundef nonnull %16, ptr noundef nonnull %5) #3
br label %20
20: ; preds = %8, %2, %18
%21 = phi ptr [ %0, %18 ], [ null, %2 ], [ null, %8 ]
ret ptr %21
}
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noalias noundef ptr @fopen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #2
declare i32 @set_input(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !11, i64 0}
!15 = !{!"path_entry", !11, i64 0, !11, i64 8}
|
freebsd_usr.bin_m4_extr_gnum4.c_dopath
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nv17_tv.c_nv17_tv_create_resources.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nv17_tv.c_nv17_tv_create_resources.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.drm_mode_config = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.nv17_tv_encoder = type { i32, i32, i32, i32, i32, i32, i32 }
@NUM_TV_NORMS = dso_local local_unnamed_addr global i32 0, align 4
@NUM_LD_TV_NORMS = dso_local local_unnamed_addr global i32 0, align 4
@nouveau_tv_norm = dso_local local_unnamed_addr global i64 0, align 8
@nv17_tv_norm_names = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [30 x i8] c"Invalid TV norm setting \22%s\22\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @nv17_tv_create_resources], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @nv17_tv_create_resources(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = tail call ptr @nouveau_drm(ptr noundef %3) #2
%5 = tail call ptr @to_tv_enc(ptr noundef nonnull %0) #2
%6 = tail call ptr @nouveau_encoder(ptr noundef nonnull %0) #2
%7 = load ptr, ptr %6, align 8, !tbaa !10
%8 = load i64, ptr %7, align 8, !tbaa !12
%9 = icmp eq i64 %8, 0
%10 = load i32, ptr @NUM_TV_NORMS, align 4
%11 = load i32, ptr @NUM_LD_TV_NORMS, align 4
%12 = select i1 %9, i32 %11, i32 %10
%13 = load i64, ptr @nouveau_tv_norm, align 8, !tbaa !16
%14 = icmp eq i64 %13, 0
br i1 %14, label %38, label %15
15: ; preds = %2
%16 = icmp sgt i32 %12, 0
br i1 %16, label %17, label %32
17: ; preds = %15
%18 = zext nneg i32 %12 to i64
br label %19
19: ; preds = %17, %29
%20 = phi i64 [ 0, %17 ], [ %30, %29 ]
%21 = load ptr, ptr @nv17_tv_norm_names, align 8, !tbaa !17
%22 = getelementptr inbounds i32, ptr %21, i64 %20
%23 = load i32, ptr %22, align 4, !tbaa !18
%24 = load i64, ptr @nouveau_tv_norm, align 8, !tbaa !16
%25 = tail call i32 @strcmp(i32 noundef %23, i64 noundef %24) #2
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %29
27: ; preds = %19
%28 = trunc i64 %20 to i32
store i32 %28, ptr %5, align 4, !tbaa !20
br label %32
29: ; preds = %19
%30 = add nuw nsw i64 %20, 1
%31 = icmp eq i64 %30, %18
br i1 %31, label %35, label %19, !llvm.loop !22
32: ; preds = %15, %27
%33 = phi i32 [ %28, %27 ], [ 0, %15 ]
%34 = icmp eq i32 %33, %12
br i1 %34, label %35, label %38
35: ; preds = %29, %32
%36 = load i64, ptr @nouveau_tv_norm, align 8, !tbaa !16
%37 = tail call i32 @NV_WARN(ptr noundef %4, ptr noundef nonnull @.str, i64 noundef %36) #2
br label %38
38: ; preds = %32, %35, %2
%39 = load ptr, ptr @nv17_tv_norm_names, align 8, !tbaa !17
%40 = tail call i32 @drm_mode_create_tv_properties(ptr noundef %3, i32 noundef %12, ptr noundef %39) #2
%41 = getelementptr inbounds %struct.drm_mode_config, ptr %3, i64 0, i32 6
%42 = load i32, ptr %41, align 4, !tbaa !24
%43 = getelementptr inbounds %struct.nv17_tv_encoder, ptr %5, i64 0, i32 1
%44 = load i32, ptr %43, align 4, !tbaa !26
%45 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %42, i32 noundef %44) #2
%46 = getelementptr inbounds %struct.drm_mode_config, ptr %3, i64 0, i32 5
%47 = load i32, ptr %46, align 4, !tbaa !27
%48 = getelementptr inbounds %struct.nv17_tv_encoder, ptr %5, i64 0, i32 2
%49 = load i32, ptr %48, align 4, !tbaa !28
%50 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %47, i32 noundef %49) #2
%51 = getelementptr inbounds %struct.drm_mode_config, ptr %3, i64 0, i32 4
%52 = load i32, ptr %51, align 4, !tbaa !29
%53 = load i32, ptr %5, align 4, !tbaa !20
%54 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %52, i32 noundef %53) #2
%55 = getelementptr inbounds %struct.drm_mode_config, ptr %3, i64 0, i32 3
%56 = load i32, ptr %55, align 4, !tbaa !30
%57 = getelementptr inbounds %struct.nv17_tv_encoder, ptr %5, i64 0, i32 3
%58 = load i32, ptr %57, align 4, !tbaa !31
%59 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %56, i32 noundef %58) #2
%60 = getelementptr inbounds %struct.drm_mode_config, ptr %3, i64 0, i32 2
%61 = load i32, ptr %60, align 4, !tbaa !32
%62 = getelementptr inbounds %struct.nv17_tv_encoder, ptr %5, i64 0, i32 4
%63 = load i32, ptr %62, align 4, !tbaa !33
%64 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %61, i32 noundef %63) #2
%65 = getelementptr inbounds %struct.drm_mode_config, ptr %3, i64 0, i32 1
%66 = load i32, ptr %65, align 4, !tbaa !34
%67 = getelementptr inbounds %struct.nv17_tv_encoder, ptr %5, i64 0, i32 5
%68 = load i32, ptr %67, align 4, !tbaa !35
%69 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %66, i32 noundef %68) #2
%70 = load i32, ptr %3, align 4, !tbaa !36
%71 = getelementptr inbounds %struct.nv17_tv_encoder, ptr %5, i64 0, i32 6
%72 = load i32, ptr %71, align 4, !tbaa !37
%73 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %70, i32 noundef %72) #2
ret i32 0
}
declare ptr @nouveau_drm(ptr noundef) local_unnamed_addr #1
declare ptr @to_tv_enc(ptr noundef) local_unnamed_addr #1
declare ptr @nouveau_encoder(ptr noundef) local_unnamed_addr #1
declare i32 @strcmp(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @NV_WARN(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @drm_mode_create_tv_properties(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @drm_object_attach_property(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"drm_encoder", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0}
!12 = !{!13, !15, i64 0}
!13 = !{!"dcb_output", !14, i64 0}
!14 = !{!"TYPE_3__", !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!7, !7, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"int", !8, i64 0}
!20 = !{!21, !19, i64 0}
!21 = !{!"nv17_tv_encoder", !19, i64 0, !19, i64 4, !19, i64 8, !19, i64 12, !19, i64 16, !19, i64 20, !19, i64 24}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!25, !19, i64 24}
!25 = !{!"drm_mode_config", !19, i64 0, !19, i64 4, !19, i64 8, !19, i64 12, !19, i64 16, !19, i64 20, !19, i64 24}
!26 = !{!21, !19, i64 4}
!27 = !{!25, !19, i64 20}
!28 = !{!21, !19, i64 8}
!29 = !{!25, !19, i64 16}
!30 = !{!25, !19, i64 12}
!31 = !{!21, !19, i64 12}
!32 = !{!25, !19, i64 8}
!33 = !{!21, !19, i64 16}
!34 = !{!25, !19, i64 4}
!35 = !{!21, !19, i64 20}
!36 = !{!25, !19, i64 0}
!37 = !{!21, !19, i64 24}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nv17_tv.c_nv17_tv_create_resources.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nv17_tv.c_nv17_tv_create_resources.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NUM_TV_NORMS = common local_unnamed_addr global i32 0, align 4
@NUM_LD_TV_NORMS = common local_unnamed_addr global i32 0, align 4
@nouveau_tv_norm = common local_unnamed_addr global i64 0, align 8
@nv17_tv_norm_names = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [30 x i8] c"Invalid TV norm setting \22%s\22\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @nv17_tv_create_resources], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @nv17_tv_create_resources(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = tail call ptr @nouveau_drm(ptr noundef %3) #2
%5 = tail call ptr @to_tv_enc(ptr noundef nonnull %0) #2
%6 = tail call ptr @nouveau_encoder(ptr noundef nonnull %0) #2
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = load i64, ptr %7, align 8, !tbaa !13
%9 = icmp eq i64 %8, 0
%10 = load i32, ptr @NUM_TV_NORMS, align 4
%11 = load i32, ptr @NUM_LD_TV_NORMS, align 4
%12 = select i1 %9, i32 %11, i32 %10
%13 = load i64, ptr @nouveau_tv_norm, align 8, !tbaa !17
%14 = icmp eq i64 %13, 0
br i1 %14, label %38, label %15
15: ; preds = %2
%16 = icmp sgt i32 %12, 0
br i1 %16, label %17, label %32
17: ; preds = %15
%18 = zext nneg i32 %12 to i64
br label %19
19: ; preds = %17, %29
%20 = phi i64 [ 0, %17 ], [ %30, %29 ]
%21 = load ptr, ptr @nv17_tv_norm_names, align 8, !tbaa !18
%22 = getelementptr inbounds i32, ptr %21, i64 %20
%23 = load i32, ptr %22, align 4, !tbaa !19
%24 = load i64, ptr @nouveau_tv_norm, align 8, !tbaa !17
%25 = tail call i32 @strcmp(i32 noundef %23, i64 noundef %24) #2
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %29
27: ; preds = %19
%28 = trunc nuw nsw i64 %20 to i32
store i32 %28, ptr %5, align 4, !tbaa !21
br label %32
29: ; preds = %19
%30 = add nuw nsw i64 %20, 1
%31 = icmp eq i64 %30, %18
br i1 %31, label %35, label %19, !llvm.loop !23
32: ; preds = %15, %27
%33 = phi i32 [ %28, %27 ], [ 0, %15 ]
%34 = icmp eq i32 %33, %12
br i1 %34, label %35, label %38
35: ; preds = %29, %32
%36 = load i64, ptr @nouveau_tv_norm, align 8, !tbaa !17
%37 = tail call i32 @NV_WARN(ptr noundef %4, ptr noundef nonnull @.str, i64 noundef %36) #2
br label %38
38: ; preds = %32, %35, %2
%39 = load ptr, ptr @nv17_tv_norm_names, align 8, !tbaa !18
%40 = tail call i32 @drm_mode_create_tv_properties(ptr noundef %3, i32 noundef %12, ptr noundef %39) #2
%41 = getelementptr inbounds i8, ptr %3, i64 24
%42 = load i32, ptr %41, align 4, !tbaa !25
%43 = getelementptr inbounds i8, ptr %5, i64 4
%44 = load i32, ptr %43, align 4, !tbaa !27
%45 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %42, i32 noundef %44) #2
%46 = getelementptr inbounds i8, ptr %3, i64 20
%47 = load i32, ptr %46, align 4, !tbaa !28
%48 = getelementptr inbounds i8, ptr %5, i64 8
%49 = load i32, ptr %48, align 4, !tbaa !29
%50 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %47, i32 noundef %49) #2
%51 = getelementptr inbounds i8, ptr %3, i64 16
%52 = load i32, ptr %51, align 4, !tbaa !30
%53 = load i32, ptr %5, align 4, !tbaa !21
%54 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %52, i32 noundef %53) #2
%55 = getelementptr inbounds i8, ptr %3, i64 12
%56 = load i32, ptr %55, align 4, !tbaa !31
%57 = getelementptr inbounds i8, ptr %5, i64 12
%58 = load i32, ptr %57, align 4, !tbaa !32
%59 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %56, i32 noundef %58) #2
%60 = getelementptr inbounds i8, ptr %3, i64 8
%61 = load i32, ptr %60, align 4, !tbaa !33
%62 = getelementptr inbounds i8, ptr %5, i64 16
%63 = load i32, ptr %62, align 4, !tbaa !34
%64 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %61, i32 noundef %63) #2
%65 = getelementptr inbounds i8, ptr %3, i64 4
%66 = load i32, ptr %65, align 4, !tbaa !35
%67 = getelementptr inbounds i8, ptr %5, i64 20
%68 = load i32, ptr %67, align 4, !tbaa !36
%69 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %66, i32 noundef %68) #2
%70 = load i32, ptr %3, align 4, !tbaa !37
%71 = getelementptr inbounds i8, ptr %5, i64 24
%72 = load i32, ptr %71, align 4, !tbaa !38
%73 = tail call i32 @drm_object_attach_property(ptr noundef %1, i32 noundef %70, i32 noundef %72) #2
ret i32 0
}
declare ptr @nouveau_drm(ptr noundef) local_unnamed_addr #1
declare ptr @to_tv_enc(ptr noundef) local_unnamed_addr #1
declare ptr @nouveau_encoder(ptr noundef) local_unnamed_addr #1
declare i32 @strcmp(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @NV_WARN(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @drm_mode_create_tv_properties(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @drm_object_attach_property(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"drm_encoder", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_4__", !8, i64 0}
!13 = !{!14, !16, i64 0}
!14 = !{!"dcb_output", !15, i64 0}
!15 = !{!"TYPE_3__", !16, i64 0}
!16 = !{!"long", !9, i64 0}
!17 = !{!16, !16, i64 0}
!18 = !{!8, !8, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"int", !9, i64 0}
!21 = !{!22, !20, i64 0}
!22 = !{!"nv17_tv_encoder", !20, i64 0, !20, i64 4, !20, i64 8, !20, i64 12, !20, i64 16, !20, i64 20, !20, i64 24}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!26, !20, i64 24}
!26 = !{!"drm_mode_config", !20, i64 0, !20, i64 4, !20, i64 8, !20, i64 12, !20, i64 16, !20, i64 20, !20, i64 24}
!27 = !{!22, !20, i64 4}
!28 = !{!26, !20, i64 20}
!29 = !{!22, !20, i64 8}
!30 = !{!26, !20, i64 16}
!31 = !{!26, !20, i64 12}
!32 = !{!22, !20, i64 12}
!33 = !{!26, !20, i64 8}
!34 = !{!22, !20, i64 16}
!35 = !{!26, !20, i64 4}
!36 = !{!22, !20, i64 20}
!37 = !{!26, !20, i64 0}
!38 = !{!22, !20, i64 24}
|
fastsocket_kernel_drivers_gpu_drm_nouveau_extr_nv17_tv.c_nv17_tv_create_resources
|
; ModuleID = 'AnghaBench/libuv/test/extr_test-fs-poll.c_close_cb.c'
source_filename = "AnghaBench/libuv/test/extr_test-fs-poll.c_close_cb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@close_cb_called = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @close_cb], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define internal void @close_cb(ptr nocapture readnone %0) #0 {
%2 = load i32, ptr @close_cb_called, align 4, !tbaa !5
%3 = add nsw i32 %2, 1
store i32 %3, ptr @close_cb_called, align 4, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/libuv/test/extr_test-fs-poll.c_close_cb.c'
source_filename = "AnghaBench/libuv/test/extr_test-fs-poll.c_close_cb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@close_cb_called = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @close_cb], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal void @close_cb(ptr nocapture readnone %0) #0 {
%2 = load i32, ptr @close_cb_called, align 4, !tbaa !6
%3 = add nsw i32 %2, 1
store i32 %3, ptr @close_cb_called, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
libuv_test_extr_test-fs-poll.c_close_cb
|
; ModuleID = 'AnghaBench/linux/drivers/clk/samsung/extr_clk-pll.c_samsung_pll35xx_mp_change.c'
source_filename = "AnghaBench/linux/drivers/clk/samsung/extr_clk-pll.c_samsung_pll35xx_mp_change.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.samsung_pll_rate_table = type { i32, i32 }
@PLL35XX_MDIV_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@PLL35XX_MDIV_MASK = dso_local local_unnamed_addr global i32 0, align 4
@PLL35XX_PDIV_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@PLL35XX_PDIV_MASK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @samsung_pll35xx_mp_change], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @samsung_pll35xx_mp_change(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr @PLL35XX_MDIV_SHIFT, align 4, !tbaa !5
%4 = ashr i32 %1, %3
%5 = load i32, ptr @PLL35XX_MDIV_MASK, align 4, !tbaa !5
%6 = and i32 %4, %5
%7 = load i32, ptr %0, align 4, !tbaa !9
%8 = icmp eq i32 %7, %6
br i1 %8, label %9, label %18
9: ; preds = %2
%10 = load i32, ptr @PLL35XX_PDIV_SHIFT, align 4, !tbaa !5
%11 = ashr i32 %1, %10
%12 = load i32, ptr @PLL35XX_PDIV_MASK, align 4, !tbaa !5
%13 = and i32 %11, %12
%14 = getelementptr inbounds %struct.samsung_pll_rate_table, ptr %0, i64 0, i32 1
%15 = load i32, ptr %14, align 4, !tbaa !11
%16 = icmp ne i32 %15, %13
%17 = zext i1 %16 to i32
br label %18
18: ; preds = %9, %2
%19 = phi i32 [ 1, %2 ], [ %17, %9 ]
ret i32 %19
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"samsung_pll_rate_table", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
|
; ModuleID = 'AnghaBench/linux/drivers/clk/samsung/extr_clk-pll.c_samsung_pll35xx_mp_change.c'
source_filename = "AnghaBench/linux/drivers/clk/samsung/extr_clk-pll.c_samsung_pll35xx_mp_change.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PLL35XX_MDIV_SHIFT = common local_unnamed_addr global i32 0, align 4
@PLL35XX_MDIV_MASK = common local_unnamed_addr global i32 0, align 4
@PLL35XX_PDIV_SHIFT = common local_unnamed_addr global i32 0, align 4
@PLL35XX_PDIV_MASK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @samsung_pll35xx_mp_change], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @samsung_pll35xx_mp_change(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr @PLL35XX_MDIV_SHIFT, align 4, !tbaa !6
%4 = ashr i32 %1, %3
%5 = load i32, ptr @PLL35XX_MDIV_MASK, align 4, !tbaa !6
%6 = and i32 %4, %5
%7 = load i32, ptr %0, align 4, !tbaa !10
%8 = icmp eq i32 %7, %6
br i1 %8, label %9, label %18
9: ; preds = %2
%10 = load i32, ptr @PLL35XX_PDIV_SHIFT, align 4, !tbaa !6
%11 = ashr i32 %1, %10
%12 = load i32, ptr @PLL35XX_PDIV_MASK, align 4, !tbaa !6
%13 = and i32 %11, %12
%14 = getelementptr inbounds i8, ptr %0, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !12
%16 = icmp ne i32 %15, %13
%17 = zext i1 %16 to i32
br label %18
18: ; preds = %9, %2
%19 = phi i32 [ 1, %2 ], [ %17, %9 ]
ret i32 %19
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"samsung_pll_rate_table", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 4}
|
linux_drivers_clk_samsung_extr_clk-pll.c_samsung_pll35xx_mp_change
|
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Virtual.c_CmpNativeNatTableForRecv.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Virtual.c_CmpNativeNatTableForRecv.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i64, i64, i64, i64, i64 }
@NAT_TCP = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @CmpNativeNatTableForRecv(ptr noundef readonly %0, ptr noundef readonly %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
%4 = icmp eq ptr %1, null
%5 = or i1 %3, %4
br i1 %5, label %50, label %6
6: ; preds = %2
%7 = load ptr, ptr %0, align 8, !tbaa !5
%8 = load ptr, ptr %1, align 8, !tbaa !5
%9 = icmp eq ptr %7, null
%10 = icmp eq ptr %8, null
%11 = select i1 %9, i1 true, i1 %10
br i1 %11, label %50, label %12
12: ; preds = %6
%13 = load i64, ptr %7, align 8, !tbaa !9
%14 = load i64, ptr %8, align 8, !tbaa !9
%15 = tail call i32 @COMPARE_RET(i64 noundef %13, i64 noundef %14) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %50
17: ; preds = %12
%18 = getelementptr inbounds %struct.TYPE_2__, ptr %7, i64 0, i32 1
%19 = load i64, ptr %18, align 8, !tbaa !12
%20 = getelementptr inbounds %struct.TYPE_2__, ptr %8, i64 0, i32 1
%21 = load i64, ptr %20, align 8, !tbaa !12
%22 = tail call i32 @COMPARE_RET(i64 noundef %19, i64 noundef %21) #2
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %50
24: ; preds = %17
%25 = getelementptr inbounds %struct.TYPE_2__, ptr %7, i64 0, i32 2
%26 = load i64, ptr %25, align 8, !tbaa !13
%27 = getelementptr inbounds %struct.TYPE_2__, ptr %8, i64 0, i32 2
%28 = load i64, ptr %27, align 8, !tbaa !13
%29 = tail call i32 @COMPARE_RET(i64 noundef %26, i64 noundef %28) #2
%30 = icmp eq i32 %29, 0
br i1 %30, label %31, label %50
31: ; preds = %24
%32 = load i64, ptr %7, align 8, !tbaa !9
%33 = load i64, ptr @NAT_TCP, align 8, !tbaa !14
%34 = icmp eq i64 %32, %33
br i1 %34, label %35, label %49
35: ; preds = %31
%36 = getelementptr inbounds %struct.TYPE_2__, ptr %7, i64 0, i32 3
%37 = load i64, ptr %36, align 8, !tbaa !15
%38 = getelementptr inbounds %struct.TYPE_2__, ptr %8, i64 0, i32 3
%39 = load i64, ptr %38, align 8, !tbaa !15
%40 = tail call i32 @COMPARE_RET(i64 noundef %37, i64 noundef %39) #2
%41 = icmp eq i32 %40, 0
br i1 %41, label %42, label %50
42: ; preds = %35
%43 = getelementptr inbounds %struct.TYPE_2__, ptr %7, i64 0, i32 4
%44 = load i64, ptr %43, align 8, !tbaa !16
%45 = getelementptr inbounds %struct.TYPE_2__, ptr %8, i64 0, i32 4
%46 = load i64, ptr %45, align 8, !tbaa !16
%47 = tail call i32 @COMPARE_RET(i64 noundef %44, i64 noundef %46) #2
%48 = icmp eq i32 %47, 0
br i1 %48, label %49, label %50
49: ; preds = %42, %31
br label %50
50: ; preds = %42, %35, %24, %17, %12, %6, %2, %49
%51 = phi i32 [ 0, %49 ], [ 0, %2 ], [ 0, %6 ], [ %15, %12 ], [ %22, %17 ], [ %29, %24 ], [ %40, %35 ], [ %47, %42 ]
ret i32 %51
}
declare i32 @COMPARE_RET(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_2__", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!10, !11, i64 16}
!14 = !{!11, !11, i64 0}
!15 = !{!10, !11, i64 24}
!16 = !{!10, !11, i64 32}
|
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Virtual.c_CmpNativeNatTableForRecv.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Virtual.c_CmpNativeNatTableForRecv.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NAT_TCP = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @CmpNativeNatTableForRecv(ptr noundef readonly %0, ptr noundef readonly %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
%4 = icmp eq ptr %1, null
%5 = or i1 %3, %4
br i1 %5, label %50, label %6
6: ; preds = %2
%7 = load ptr, ptr %0, align 8, !tbaa !6
%8 = load ptr, ptr %1, align 8, !tbaa !6
%9 = icmp eq ptr %7, null
%10 = icmp eq ptr %8, null
%11 = select i1 %9, i1 true, i1 %10
br i1 %11, label %50, label %12
12: ; preds = %6
%13 = load i64, ptr %7, align 8, !tbaa !10
%14 = load i64, ptr %8, align 8, !tbaa !10
%15 = tail call i32 @COMPARE_RET(i64 noundef %13, i64 noundef %14) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %50
17: ; preds = %12
%18 = getelementptr inbounds i8, ptr %7, i64 8
%19 = load i64, ptr %18, align 8, !tbaa !13
%20 = getelementptr inbounds i8, ptr %8, i64 8
%21 = load i64, ptr %20, align 8, !tbaa !13
%22 = tail call i32 @COMPARE_RET(i64 noundef %19, i64 noundef %21) #2
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %50
24: ; preds = %17
%25 = getelementptr inbounds i8, ptr %7, i64 16
%26 = load i64, ptr %25, align 8, !tbaa !14
%27 = getelementptr inbounds i8, ptr %8, i64 16
%28 = load i64, ptr %27, align 8, !tbaa !14
%29 = tail call i32 @COMPARE_RET(i64 noundef %26, i64 noundef %28) #2
%30 = icmp eq i32 %29, 0
br i1 %30, label %31, label %50
31: ; preds = %24
%32 = load i64, ptr %7, align 8, !tbaa !10
%33 = load i64, ptr @NAT_TCP, align 8, !tbaa !15
%34 = icmp eq i64 %32, %33
br i1 %34, label %35, label %49
35: ; preds = %31
%36 = getelementptr inbounds i8, ptr %7, i64 24
%37 = load i64, ptr %36, align 8, !tbaa !16
%38 = getelementptr inbounds i8, ptr %8, i64 24
%39 = load i64, ptr %38, align 8, !tbaa !16
%40 = tail call i32 @COMPARE_RET(i64 noundef %37, i64 noundef %39) #2
%41 = icmp eq i32 %40, 0
br i1 %41, label %42, label %50
42: ; preds = %35
%43 = getelementptr inbounds i8, ptr %7, i64 32
%44 = load i64, ptr %43, align 8, !tbaa !17
%45 = getelementptr inbounds i8, ptr %8, i64 32
%46 = load i64, ptr %45, align 8, !tbaa !17
%47 = tail call i32 @COMPARE_RET(i64 noundef %44, i64 noundef %46) #2
%48 = icmp eq i32 %47, 0
br i1 %48, label %49, label %50
49: ; preds = %42, %31
br label %50
50: ; preds = %42, %35, %24, %17, %12, %6, %2, %49
%51 = phi i32 [ 0, %49 ], [ 0, %2 ], [ 0, %6 ], [ %15, %12 ], [ %22, %17 ], [ %29, %24 ], [ %40, %35 ], [ %47, %42 ]
ret i32 %51
}
declare i32 @COMPARE_RET(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !12, i64 16}
!15 = !{!12, !12, i64 0}
!16 = !{!11, !12, i64 24}
!17 = !{!11, !12, i64 32}
|
SoftEtherVPN_src_Cedar_extr_Virtual.c_CmpNativeNatTableForRecv
|
; ModuleID = 'AnghaBench/fastsocket/kernel/block/extr_genhd.c_invalidate_partition.c'
source_filename = "AnghaBench/fastsocket/kernel/block/extr_genhd.c_invalidate_partition.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @invalidate_partition(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @bdget_disk(ptr noundef %0, i32 noundef %1) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @fsync_bdev(ptr noundef nonnull %3) #2
%7 = tail call i32 @__invalidate_device(ptr noundef nonnull %3, i32 noundef 1) #2
%8 = tail call i32 @bdput(ptr noundef nonnull %3) #2
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ %7, %5 ], [ 0, %2 ]
ret i32 %10
}
declare ptr @bdget_disk(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fsync_bdev(ptr noundef) local_unnamed_addr #1
declare i32 @__invalidate_device(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bdput(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/block/extr_genhd.c_invalidate_partition.c'
source_filename = "AnghaBench/fastsocket/kernel/block/extr_genhd.c_invalidate_partition.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @invalidate_partition(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @bdget_disk(ptr noundef %0, i32 noundef %1) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @fsync_bdev(ptr noundef nonnull %3) #2
%7 = tail call i32 @__invalidate_device(ptr noundef nonnull %3, i32 noundef 1) #2
%8 = tail call i32 @bdput(ptr noundef nonnull %3) #2
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ %7, %5 ], [ 0, %2 ]
ret i32 %10
}
declare ptr @bdget_disk(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fsync_bdev(ptr noundef) local_unnamed_addr #1
declare i32 @__invalidate_device(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bdput(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_block_extr_genhd.c_invalidate_partition
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap_mschapv2.c_eap_mschapv2_deinit.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap_mschapv2.c_eap_mschapv2_deinit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.eap_mschapv2_data = type { i32, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @eap_mschapv2_deinit], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @eap_mschapv2_deinit(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.eap_mschapv2_data, ptr %1, i64 0, i32 2
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i32 @os_free(i32 noundef %4) #2
%6 = getelementptr inbounds %struct.eap_mschapv2_data, ptr %1, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !10
%8 = tail call i32 @os_free(i32 noundef %7) #2
%9 = load i32, ptr %1, align 4, !tbaa !11
%10 = tail call i32 @wpabuf_free(i32 noundef %9) #2
%11 = tail call i32 @bin_clear_free(ptr noundef nonnull %1, i32 noundef 12) #2
ret void
}
declare i32 @os_free(i32 noundef) local_unnamed_addr #1
declare i32 @wpabuf_free(i32 noundef) local_unnamed_addr #1
declare i32 @bin_clear_free(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"eap_mschapv2_data", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap_mschapv2.c_eap_mschapv2_deinit.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap_mschapv2.c_eap_mschapv2_deinit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @eap_mschapv2_deinit], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @eap_mschapv2_deinit(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @os_free(i32 noundef %4) #2
%6 = getelementptr inbounds i8, ptr %1, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !11
%8 = tail call i32 @os_free(i32 noundef %7) #2
%9 = load i32, ptr %1, align 4, !tbaa !12
%10 = tail call i32 @wpabuf_free(i32 noundef %9) #2
%11 = tail call i32 @bin_clear_free(ptr noundef nonnull %1, i32 noundef 12) #2
ret void
}
declare i32 @os_free(i32 noundef) local_unnamed_addr #1
declare i32 @wpabuf_free(i32 noundef) local_unnamed_addr #1
declare i32 @bin_clear_free(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"eap_mschapv2_data", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!7, !8, i64 0}
|
freebsd_contrib_wpa_src_eap_peer_extr_eap_mschapv2.c_eap_mschapv2_deinit
|
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_on2avc.c_wtf_44.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_on2avc.c_wtf_44.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ff_on2avc_tab_10_1 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_4_10_1 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_10_2 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_4_10_2 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_20_1 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_9_20_1 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_20_2 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_9_20_2 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_84_1 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_20_84_1 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_84_2 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_20_84_2 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_84_3 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_20_84_3 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_84_4 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_20_84_4 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_40_1 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_19_40_1 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_40_2 = dso_local local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_19_40_2 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wtf_44], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @wtf_44(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = load ptr, ptr %0, align 8, !tbaa !5
%6 = getelementptr inbounds float, ptr %5, i64 1024
%7 = tail call i32 @memset(ptr noundef %5, i32 noundef 0, i32 noundef 4096) #2
%8 = tail call i32 @memset(ptr noundef nonnull %6, i32 noundef 0, i32 noundef 4096) #2
%9 = icmp eq i32 %3, 512
br i1 %9, label %10, label %116
10: ; preds = %4
%11 = load i32, ptr @ff_on2avc_tab_10_1, align 4, !tbaa !10
%12 = load i32, ptr @ff_on2avc_tabs_4_10_1, align 4, !tbaa !10
%13 = tail call i32 @twiddle(ptr noundef %2, ptr noundef %5, i32 noundef 16, i32 noundef %11, i32 noundef 10, i32 noundef 2, i32 noundef 1, i32 noundef 3, i32 noundef %12) #2
%14 = getelementptr inbounds float, ptr %2, i64 8
%15 = load i32, ptr @ff_on2avc_tab_10_2, align 4, !tbaa !10
%16 = load i32, ptr @ff_on2avc_tabs_4_10_2, align 4, !tbaa !10
%17 = tail call i32 @twiddle(ptr noundef nonnull %14, ptr noundef %5, i32 noundef 16, i32 noundef %15, i32 noundef 10, i32 noundef 2, i32 noundef 3, i32 noundef 1, i32 noundef %16) #2
%18 = getelementptr inbounds float, ptr %2, i64 16
%19 = getelementptr inbounds float, ptr %5, i64 16
%20 = load i32, ptr @ff_on2avc_tab_10_2, align 4, !tbaa !10
%21 = load i32, ptr @ff_on2avc_tabs_4_10_2, align 4, !tbaa !10
%22 = tail call i32 @twiddle(ptr noundef nonnull %18, ptr noundef nonnull %19, i32 noundef 16, i32 noundef %20, i32 noundef 10, i32 noundef 2, i32 noundef 3, i32 noundef 1, i32 noundef %21) #2
%23 = getelementptr inbounds float, ptr %2, i64 24
%24 = load i32, ptr @ff_on2avc_tab_10_1, align 4, !tbaa !10
%25 = load i32, ptr @ff_on2avc_tabs_4_10_1, align 4, !tbaa !10
%26 = tail call i32 @twiddle(ptr noundef nonnull %23, ptr noundef nonnull %19, i32 noundef 16, i32 noundef %24, i32 noundef 10, i32 noundef 2, i32 noundef 1, i32 noundef 3, i32 noundef %25) #2
%27 = getelementptr inbounds float, ptr %2, i64 32
%28 = getelementptr inbounds float, ptr %5, i64 32
%29 = load i32, ptr @ff_on2avc_tab_10_1, align 4, !tbaa !10
%30 = load i32, ptr @ff_on2avc_tabs_4_10_1, align 4, !tbaa !10
%31 = tail call i32 @twiddle(ptr noundef nonnull %27, ptr noundef nonnull %28, i32 noundef 16, i32 noundef %29, i32 noundef 10, i32 noundef 2, i32 noundef 1, i32 noundef 3, i32 noundef %30) #2
%32 = getelementptr inbounds float, ptr %2, i64 40
%33 = load i32, ptr @ff_on2avc_tab_10_2, align 4, !tbaa !10
%34 = load i32, ptr @ff_on2avc_tabs_4_10_2, align 4, !tbaa !10
%35 = tail call i32 @twiddle(ptr noundef nonnull %32, ptr noundef nonnull %28, i32 noundef 16, i32 noundef %33, i32 noundef 10, i32 noundef 2, i32 noundef 3, i32 noundef 1, i32 noundef %34) #2
%36 = getelementptr inbounds float, ptr %2, i64 48
%37 = getelementptr inbounds float, ptr %5, i64 48
%38 = load i32, ptr @ff_on2avc_tab_10_2, align 4, !tbaa !10
%39 = load i32, ptr @ff_on2avc_tabs_4_10_2, align 4, !tbaa !10
%40 = tail call i32 @twiddle(ptr noundef nonnull %36, ptr noundef nonnull %37, i32 noundef 16, i32 noundef %38, i32 noundef 10, i32 noundef 2, i32 noundef 3, i32 noundef 1, i32 noundef %39) #2
%41 = getelementptr inbounds float, ptr %2, i64 56
%42 = load i32, ptr @ff_on2avc_tab_10_1, align 4, !tbaa !10
%43 = load i32, ptr @ff_on2avc_tabs_4_10_1, align 4, !tbaa !10
%44 = tail call i32 @twiddle(ptr noundef nonnull %41, ptr noundef nonnull %37, i32 noundef 16, i32 noundef %42, i32 noundef 10, i32 noundef 2, i32 noundef 1, i32 noundef 3, i32 noundef %43) #2
%45 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !10
%46 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !10
%47 = tail call i32 @twiddle(ptr noundef %5, ptr noundef nonnull %6, i32 noundef 32, i32 noundef %45, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %46) #2
%48 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !10
%49 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !10
%50 = tail call i32 @twiddle(ptr noundef nonnull %19, ptr noundef nonnull %6, i32 noundef 32, i32 noundef %48, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %49) #2
%51 = getelementptr inbounds float, ptr %5, i64 1056
%52 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !10
%53 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !10
%54 = tail call i32 @twiddle(ptr noundef nonnull %28, ptr noundef nonnull %51, i32 noundef 32, i32 noundef %52, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %53) #2
%55 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !10
%56 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !10
%57 = tail call i32 @twiddle(ptr noundef nonnull %37, ptr noundef nonnull %51, i32 noundef 32, i32 noundef %55, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %56) #2
%58 = getelementptr inbounds float, ptr %2, i64 64
%59 = getelementptr inbounds float, ptr %5, i64 1088
%60 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !10
%61 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !10
%62 = tail call i32 @twiddle(ptr noundef nonnull %58, ptr noundef nonnull %59, i32 noundef 32, i32 noundef %60, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %61) #2
%63 = getelementptr inbounds float, ptr %2, i64 80
%64 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !10
%65 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !10
%66 = tail call i32 @twiddle(ptr noundef nonnull %63, ptr noundef nonnull %59, i32 noundef 32, i32 noundef %64, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %65) #2
%67 = getelementptr inbounds float, ptr %2, i64 96
%68 = getelementptr inbounds float, ptr %5, i64 1120
%69 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !10
%70 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !10
%71 = tail call i32 @twiddle(ptr noundef nonnull %67, ptr noundef nonnull %68, i32 noundef 32, i32 noundef %69, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %70) #2
%72 = getelementptr inbounds float, ptr %2, i64 112
%73 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !10
%74 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !10
%75 = tail call i32 @twiddle(ptr noundef nonnull %72, ptr noundef nonnull %68, i32 noundef 32, i32 noundef %73, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %74) #2
%76 = tail call i32 @memset(ptr noundef %5, i32 noundef 0, i32 noundef 256) #2
%77 = load i32, ptr @ff_on2avc_tab_84_1, align 4, !tbaa !10
%78 = load i32, ptr @ff_on2avc_tabs_20_84_1, align 4, !tbaa !10
%79 = tail call i32 @twiddle(ptr noundef nonnull %6, ptr noundef %5, i32 noundef 128, i32 noundef %77, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %78) #2
%80 = load i32, ptr @ff_on2avc_tab_84_2, align 4, !tbaa !10
%81 = load i32, ptr @ff_on2avc_tabs_20_84_2, align 4, !tbaa !10
%82 = tail call i32 @twiddle(ptr noundef nonnull %51, ptr noundef %5, i32 noundef 128, i32 noundef %80, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %81) #2
%83 = load i32, ptr @ff_on2avc_tab_84_3, align 4, !tbaa !10
%84 = load i32, ptr @ff_on2avc_tabs_20_84_3, align 4, !tbaa !10
%85 = tail call i32 @twiddle(ptr noundef nonnull %59, ptr noundef %5, i32 noundef 128, i32 noundef %83, i32 noundef 84, i32 noundef 4, i32 noundef 13, i32 noundef 7, i32 noundef %84) #2
%86 = load i32, ptr @ff_on2avc_tab_84_4, align 4, !tbaa !10
%87 = load i32, ptr @ff_on2avc_tabs_20_84_4, align 4, !tbaa !10
%88 = tail call i32 @twiddle(ptr noundef nonnull %68, ptr noundef %5, i32 noundef 128, i32 noundef %86, i32 noundef 84, i32 noundef 4, i32 noundef 15, i32 noundef 5, i32 noundef %87) #2
%89 = getelementptr inbounds float, ptr %2, i64 128
%90 = getelementptr inbounds float, ptr %5, i64 128
%91 = load i32, ptr @ff_on2avc_tab_84_4, align 4, !tbaa !10
%92 = load i32, ptr @ff_on2avc_tabs_20_84_4, align 4, !tbaa !10
%93 = tail call i32 @twiddle(ptr noundef nonnull %89, ptr noundef nonnull %90, i32 noundef 128, i32 noundef %91, i32 noundef 84, i32 noundef 4, i32 noundef 15, i32 noundef 5, i32 noundef %92) #2
%94 = getelementptr inbounds float, ptr %2, i64 160
%95 = load i32, ptr @ff_on2avc_tab_84_3, align 4, !tbaa !10
%96 = load i32, ptr @ff_on2avc_tabs_20_84_3, align 4, !tbaa !10
%97 = tail call i32 @twiddle(ptr noundef nonnull %94, ptr noundef nonnull %90, i32 noundef 128, i32 noundef %95, i32 noundef 84, i32 noundef 4, i32 noundef 13, i32 noundef 7, i32 noundef %96) #2
%98 = getelementptr inbounds float, ptr %2, i64 192
%99 = load i32, ptr @ff_on2avc_tab_84_2, align 4, !tbaa !10
%100 = load i32, ptr @ff_on2avc_tabs_20_84_2, align 4, !tbaa !10
%101 = tail call i32 @twiddle(ptr noundef nonnull %98, ptr noundef nonnull %90, i32 noundef 128, i32 noundef %99, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %100) #2
%102 = getelementptr inbounds float, ptr %2, i64 224
%103 = load i32, ptr @ff_on2avc_tab_84_1, align 4, !tbaa !10
%104 = load i32, ptr @ff_on2avc_tabs_20_84_1, align 4, !tbaa !10
%105 = tail call i32 @twiddle(ptr noundef nonnull %102, ptr noundef nonnull %90, i32 noundef 128, i32 noundef %103, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %104) #2
%106 = getelementptr inbounds float, ptr %2, i64 256
%107 = getelementptr inbounds float, ptr %5, i64 256
%108 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !10
%109 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !10
%110 = tail call i32 @twiddle(ptr noundef nonnull %106, ptr noundef nonnull %107, i32 noundef 128, i32 noundef %108, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %109) #2
%111 = getelementptr inbounds float, ptr %2, i64 320
%112 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !10
%113 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !10
%114 = tail call i32 @twiddle(ptr noundef nonnull %111, ptr noundef nonnull %107, i32 noundef 128, i32 noundef %112, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %113) #2
%115 = tail call i32 @wtf_end_512(ptr noundef nonnull %0, ptr noundef %1, ptr noundef %2, ptr noundef %5, ptr noundef nonnull %6) #2
br label %222
116: ; preds = %4
%117 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !10
%118 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !10
%119 = tail call i32 @twiddle(ptr noundef %2, ptr noundef %5, i32 noundef 32, i32 noundef %117, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %118) #2
%120 = getelementptr inbounds float, ptr %2, i64 16
%121 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !10
%122 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !10
%123 = tail call i32 @twiddle(ptr noundef nonnull %120, ptr noundef %5, i32 noundef 32, i32 noundef %121, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %122) #2
%124 = getelementptr inbounds float, ptr %2, i64 32
%125 = getelementptr inbounds float, ptr %5, i64 32
%126 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !10
%127 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !10
%128 = tail call i32 @twiddle(ptr noundef nonnull %124, ptr noundef nonnull %125, i32 noundef 32, i32 noundef %126, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %127) #2
%129 = getelementptr inbounds float, ptr %2, i64 48
%130 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !10
%131 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !10
%132 = tail call i32 @twiddle(ptr noundef nonnull %129, ptr noundef nonnull %125, i32 noundef 32, i32 noundef %130, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %131) #2
%133 = getelementptr inbounds float, ptr %2, i64 64
%134 = getelementptr inbounds float, ptr %5, i64 64
%135 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !10
%136 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !10
%137 = tail call i32 @twiddle(ptr noundef nonnull %133, ptr noundef nonnull %134, i32 noundef 32, i32 noundef %135, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %136) #2
%138 = getelementptr inbounds float, ptr %2, i64 80
%139 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !10
%140 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !10
%141 = tail call i32 @twiddle(ptr noundef nonnull %138, ptr noundef nonnull %134, i32 noundef 32, i32 noundef %139, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %140) #2
%142 = getelementptr inbounds float, ptr %2, i64 96
%143 = getelementptr inbounds float, ptr %5, i64 96
%144 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !10
%145 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !10
%146 = tail call i32 @twiddle(ptr noundef nonnull %142, ptr noundef nonnull %143, i32 noundef 32, i32 noundef %144, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %145) #2
%147 = getelementptr inbounds float, ptr %2, i64 112
%148 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !10
%149 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !10
%150 = tail call i32 @twiddle(ptr noundef nonnull %147, ptr noundef nonnull %143, i32 noundef 32, i32 noundef %148, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %149) #2
%151 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !10
%152 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !10
%153 = tail call i32 @twiddle(ptr noundef %5, ptr noundef nonnull %6, i32 noundef 64, i32 noundef %151, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %152) #2
%154 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !10
%155 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !10
%156 = tail call i32 @twiddle(ptr noundef nonnull %125, ptr noundef nonnull %6, i32 noundef 64, i32 noundef %154, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %155) #2
%157 = getelementptr inbounds float, ptr %5, i64 1088
%158 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !10
%159 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !10
%160 = tail call i32 @twiddle(ptr noundef nonnull %134, ptr noundef nonnull %157, i32 noundef 64, i32 noundef %158, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %159) #2
%161 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !10
%162 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !10
%163 = tail call i32 @twiddle(ptr noundef nonnull %143, ptr noundef nonnull %157, i32 noundef 64, i32 noundef %161, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %162) #2
%164 = getelementptr inbounds float, ptr %2, i64 128
%165 = getelementptr inbounds float, ptr %5, i64 1152
%166 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !10
%167 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !10
%168 = tail call i32 @twiddle(ptr noundef nonnull %164, ptr noundef nonnull %165, i32 noundef 64, i32 noundef %166, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %167) #2
%169 = getelementptr inbounds float, ptr %2, i64 160
%170 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !10
%171 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !10
%172 = tail call i32 @twiddle(ptr noundef nonnull %169, ptr noundef nonnull %165, i32 noundef 64, i32 noundef %170, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %171) #2
%173 = getelementptr inbounds float, ptr %2, i64 192
%174 = getelementptr inbounds float, ptr %5, i64 1216
%175 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !10
%176 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !10
%177 = tail call i32 @twiddle(ptr noundef nonnull %173, ptr noundef nonnull %174, i32 noundef 64, i32 noundef %175, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %176) #2
%178 = getelementptr inbounds float, ptr %2, i64 224
%179 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !10
%180 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !10
%181 = tail call i32 @twiddle(ptr noundef nonnull %178, ptr noundef nonnull %174, i32 noundef 64, i32 noundef %179, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %180) #2
%182 = tail call i32 @memset(ptr noundef %5, i32 noundef 0, i32 noundef 512) #2
%183 = load i32, ptr @ff_on2avc_tab_84_1, align 4, !tbaa !10
%184 = load i32, ptr @ff_on2avc_tabs_20_84_1, align 4, !tbaa !10
%185 = tail call i32 @twiddle(ptr noundef nonnull %6, ptr noundef %5, i32 noundef 256, i32 noundef %183, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %184) #2
%186 = load i32, ptr @ff_on2avc_tab_84_2, align 4, !tbaa !10
%187 = load i32, ptr @ff_on2avc_tabs_20_84_2, align 4, !tbaa !10
%188 = tail call i32 @twiddle(ptr noundef nonnull %157, ptr noundef %5, i32 noundef 256, i32 noundef %186, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %187) #2
%189 = load i32, ptr @ff_on2avc_tab_84_3, align 4, !tbaa !10
%190 = load i32, ptr @ff_on2avc_tabs_20_84_3, align 4, !tbaa !10
%191 = tail call i32 @twiddle(ptr noundef nonnull %165, ptr noundef %5, i32 noundef 256, i32 noundef %189, i32 noundef 84, i32 noundef 4, i32 noundef 13, i32 noundef 7, i32 noundef %190) #2
%192 = load i32, ptr @ff_on2avc_tab_84_4, align 4, !tbaa !10
%193 = load i32, ptr @ff_on2avc_tabs_20_84_4, align 4, !tbaa !10
%194 = tail call i32 @twiddle(ptr noundef nonnull %174, ptr noundef %5, i32 noundef 256, i32 noundef %192, i32 noundef 84, i32 noundef 4, i32 noundef 15, i32 noundef 5, i32 noundef %193) #2
%195 = getelementptr inbounds float, ptr %2, i64 256
%196 = getelementptr inbounds float, ptr %5, i64 256
%197 = load i32, ptr @ff_on2avc_tab_84_4, align 4, !tbaa !10
%198 = load i32, ptr @ff_on2avc_tabs_20_84_4, align 4, !tbaa !10
%199 = tail call i32 @twiddle(ptr noundef nonnull %195, ptr noundef nonnull %196, i32 noundef 256, i32 noundef %197, i32 noundef 84, i32 noundef 4, i32 noundef 15, i32 noundef 5, i32 noundef %198) #2
%200 = getelementptr inbounds float, ptr %2, i64 320
%201 = load i32, ptr @ff_on2avc_tab_84_3, align 4, !tbaa !10
%202 = load i32, ptr @ff_on2avc_tabs_20_84_3, align 4, !tbaa !10
%203 = tail call i32 @twiddle(ptr noundef nonnull %200, ptr noundef nonnull %196, i32 noundef 256, i32 noundef %201, i32 noundef 84, i32 noundef 4, i32 noundef 13, i32 noundef 7, i32 noundef %202) #2
%204 = getelementptr inbounds float, ptr %2, i64 384
%205 = load i32, ptr @ff_on2avc_tab_84_2, align 4, !tbaa !10
%206 = load i32, ptr @ff_on2avc_tabs_20_84_2, align 4, !tbaa !10
%207 = tail call i32 @twiddle(ptr noundef nonnull %204, ptr noundef nonnull %196, i32 noundef 256, i32 noundef %205, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %206) #2
%208 = getelementptr inbounds float, ptr %2, i64 448
%209 = load i32, ptr @ff_on2avc_tab_84_1, align 4, !tbaa !10
%210 = load i32, ptr @ff_on2avc_tabs_20_84_1, align 4, !tbaa !10
%211 = tail call i32 @twiddle(ptr noundef nonnull %208, ptr noundef nonnull %196, i32 noundef 256, i32 noundef %209, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %210) #2
%212 = getelementptr inbounds float, ptr %2, i64 512
%213 = getelementptr inbounds float, ptr %5, i64 512
%214 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !10
%215 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !10
%216 = tail call i32 @twiddle(ptr noundef nonnull %212, ptr noundef nonnull %213, i32 noundef 256, i32 noundef %214, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %215) #2
%217 = getelementptr inbounds float, ptr %2, i64 640
%218 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !10
%219 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !10
%220 = tail call i32 @twiddle(ptr noundef nonnull %217, ptr noundef nonnull %213, i32 noundef 256, i32 noundef %218, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %219) #2
%221 = tail call i32 @wtf_end_1024(ptr noundef nonnull %0, ptr noundef %1, ptr noundef %2, ptr noundef %5, ptr noundef nonnull %6) #2
br label %222
222: ; preds = %116, %10
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @twiddle(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wtf_end_512(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @wtf_end_1024(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_on2avc.c_wtf_44.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_on2avc.c_wtf_44.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ff_on2avc_tab_10_1 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_4_10_1 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_10_2 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_4_10_2 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_20_1 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_9_20_1 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_20_2 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_9_20_2 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_84_1 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_20_84_1 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_84_2 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_20_84_2 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_84_3 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_20_84_3 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_84_4 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_20_84_4 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_40_1 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_19_40_1 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tab_40_2 = common local_unnamed_addr global i32 0, align 4
@ff_on2avc_tabs_19_40_2 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wtf_44], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @wtf_44(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %5, i64 4096
%7 = tail call i32 @memset(ptr noundef %5, i32 noundef 0, i32 noundef 4096) #2
%8 = tail call i32 @memset(ptr noundef nonnull %6, i32 noundef 0, i32 noundef 4096) #2
%9 = icmp eq i32 %3, 512
br i1 %9, label %10, label %116
10: ; preds = %4
%11 = load i32, ptr @ff_on2avc_tab_10_1, align 4, !tbaa !11
%12 = load i32, ptr @ff_on2avc_tabs_4_10_1, align 4, !tbaa !11
%13 = tail call i32 @twiddle(ptr noundef %2, ptr noundef %5, i32 noundef 16, i32 noundef %11, i32 noundef 10, i32 noundef 2, i32 noundef 1, i32 noundef 3, i32 noundef %12) #2
%14 = getelementptr inbounds i8, ptr %2, i64 32
%15 = load i32, ptr @ff_on2avc_tab_10_2, align 4, !tbaa !11
%16 = load i32, ptr @ff_on2avc_tabs_4_10_2, align 4, !tbaa !11
%17 = tail call i32 @twiddle(ptr noundef nonnull %14, ptr noundef %5, i32 noundef 16, i32 noundef %15, i32 noundef 10, i32 noundef 2, i32 noundef 3, i32 noundef 1, i32 noundef %16) #2
%18 = getelementptr inbounds i8, ptr %2, i64 64
%19 = getelementptr inbounds i8, ptr %5, i64 64
%20 = load i32, ptr @ff_on2avc_tab_10_2, align 4, !tbaa !11
%21 = load i32, ptr @ff_on2avc_tabs_4_10_2, align 4, !tbaa !11
%22 = tail call i32 @twiddle(ptr noundef nonnull %18, ptr noundef nonnull %19, i32 noundef 16, i32 noundef %20, i32 noundef 10, i32 noundef 2, i32 noundef 3, i32 noundef 1, i32 noundef %21) #2
%23 = getelementptr inbounds i8, ptr %2, i64 96
%24 = load i32, ptr @ff_on2avc_tab_10_1, align 4, !tbaa !11
%25 = load i32, ptr @ff_on2avc_tabs_4_10_1, align 4, !tbaa !11
%26 = tail call i32 @twiddle(ptr noundef nonnull %23, ptr noundef nonnull %19, i32 noundef 16, i32 noundef %24, i32 noundef 10, i32 noundef 2, i32 noundef 1, i32 noundef 3, i32 noundef %25) #2
%27 = getelementptr inbounds i8, ptr %2, i64 128
%28 = getelementptr inbounds i8, ptr %5, i64 128
%29 = load i32, ptr @ff_on2avc_tab_10_1, align 4, !tbaa !11
%30 = load i32, ptr @ff_on2avc_tabs_4_10_1, align 4, !tbaa !11
%31 = tail call i32 @twiddle(ptr noundef nonnull %27, ptr noundef nonnull %28, i32 noundef 16, i32 noundef %29, i32 noundef 10, i32 noundef 2, i32 noundef 1, i32 noundef 3, i32 noundef %30) #2
%32 = getelementptr inbounds i8, ptr %2, i64 160
%33 = load i32, ptr @ff_on2avc_tab_10_2, align 4, !tbaa !11
%34 = load i32, ptr @ff_on2avc_tabs_4_10_2, align 4, !tbaa !11
%35 = tail call i32 @twiddle(ptr noundef nonnull %32, ptr noundef nonnull %28, i32 noundef 16, i32 noundef %33, i32 noundef 10, i32 noundef 2, i32 noundef 3, i32 noundef 1, i32 noundef %34) #2
%36 = getelementptr inbounds i8, ptr %2, i64 192
%37 = getelementptr inbounds i8, ptr %5, i64 192
%38 = load i32, ptr @ff_on2avc_tab_10_2, align 4, !tbaa !11
%39 = load i32, ptr @ff_on2avc_tabs_4_10_2, align 4, !tbaa !11
%40 = tail call i32 @twiddle(ptr noundef nonnull %36, ptr noundef nonnull %37, i32 noundef 16, i32 noundef %38, i32 noundef 10, i32 noundef 2, i32 noundef 3, i32 noundef 1, i32 noundef %39) #2
%41 = getelementptr inbounds i8, ptr %2, i64 224
%42 = load i32, ptr @ff_on2avc_tab_10_1, align 4, !tbaa !11
%43 = load i32, ptr @ff_on2avc_tabs_4_10_1, align 4, !tbaa !11
%44 = tail call i32 @twiddle(ptr noundef nonnull %41, ptr noundef nonnull %37, i32 noundef 16, i32 noundef %42, i32 noundef 10, i32 noundef 2, i32 noundef 1, i32 noundef 3, i32 noundef %43) #2
%45 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !11
%46 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !11
%47 = tail call i32 @twiddle(ptr noundef %5, ptr noundef nonnull %6, i32 noundef 32, i32 noundef %45, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %46) #2
%48 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !11
%49 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !11
%50 = tail call i32 @twiddle(ptr noundef nonnull %19, ptr noundef nonnull %6, i32 noundef 32, i32 noundef %48, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %49) #2
%51 = getelementptr inbounds i8, ptr %5, i64 4224
%52 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !11
%53 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !11
%54 = tail call i32 @twiddle(ptr noundef nonnull %28, ptr noundef nonnull %51, i32 noundef 32, i32 noundef %52, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %53) #2
%55 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !11
%56 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !11
%57 = tail call i32 @twiddle(ptr noundef nonnull %37, ptr noundef nonnull %51, i32 noundef 32, i32 noundef %55, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %56) #2
%58 = getelementptr inbounds i8, ptr %2, i64 256
%59 = getelementptr inbounds i8, ptr %5, i64 4352
%60 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !11
%61 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !11
%62 = tail call i32 @twiddle(ptr noundef nonnull %58, ptr noundef nonnull %59, i32 noundef 32, i32 noundef %60, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %61) #2
%63 = getelementptr inbounds i8, ptr %2, i64 320
%64 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !11
%65 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !11
%66 = tail call i32 @twiddle(ptr noundef nonnull %63, ptr noundef nonnull %59, i32 noundef 32, i32 noundef %64, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %65) #2
%67 = getelementptr inbounds i8, ptr %2, i64 384
%68 = getelementptr inbounds i8, ptr %5, i64 4480
%69 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !11
%70 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !11
%71 = tail call i32 @twiddle(ptr noundef nonnull %67, ptr noundef nonnull %68, i32 noundef 32, i32 noundef %69, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %70) #2
%72 = getelementptr inbounds i8, ptr %2, i64 448
%73 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !11
%74 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !11
%75 = tail call i32 @twiddle(ptr noundef nonnull %72, ptr noundef nonnull %68, i32 noundef 32, i32 noundef %73, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %74) #2
%76 = tail call i32 @memset(ptr noundef %5, i32 noundef 0, i32 noundef 256) #2
%77 = load i32, ptr @ff_on2avc_tab_84_1, align 4, !tbaa !11
%78 = load i32, ptr @ff_on2avc_tabs_20_84_1, align 4, !tbaa !11
%79 = tail call i32 @twiddle(ptr noundef nonnull %6, ptr noundef %5, i32 noundef 128, i32 noundef %77, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %78) #2
%80 = load i32, ptr @ff_on2avc_tab_84_2, align 4, !tbaa !11
%81 = load i32, ptr @ff_on2avc_tabs_20_84_2, align 4, !tbaa !11
%82 = tail call i32 @twiddle(ptr noundef nonnull %51, ptr noundef %5, i32 noundef 128, i32 noundef %80, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %81) #2
%83 = load i32, ptr @ff_on2avc_tab_84_3, align 4, !tbaa !11
%84 = load i32, ptr @ff_on2avc_tabs_20_84_3, align 4, !tbaa !11
%85 = tail call i32 @twiddle(ptr noundef nonnull %59, ptr noundef %5, i32 noundef 128, i32 noundef %83, i32 noundef 84, i32 noundef 4, i32 noundef 13, i32 noundef 7, i32 noundef %84) #2
%86 = load i32, ptr @ff_on2avc_tab_84_4, align 4, !tbaa !11
%87 = load i32, ptr @ff_on2avc_tabs_20_84_4, align 4, !tbaa !11
%88 = tail call i32 @twiddle(ptr noundef nonnull %68, ptr noundef %5, i32 noundef 128, i32 noundef %86, i32 noundef 84, i32 noundef 4, i32 noundef 15, i32 noundef 5, i32 noundef %87) #2
%89 = getelementptr inbounds i8, ptr %2, i64 512
%90 = getelementptr inbounds i8, ptr %5, i64 512
%91 = load i32, ptr @ff_on2avc_tab_84_4, align 4, !tbaa !11
%92 = load i32, ptr @ff_on2avc_tabs_20_84_4, align 4, !tbaa !11
%93 = tail call i32 @twiddle(ptr noundef nonnull %89, ptr noundef nonnull %90, i32 noundef 128, i32 noundef %91, i32 noundef 84, i32 noundef 4, i32 noundef 15, i32 noundef 5, i32 noundef %92) #2
%94 = getelementptr inbounds i8, ptr %2, i64 640
%95 = load i32, ptr @ff_on2avc_tab_84_3, align 4, !tbaa !11
%96 = load i32, ptr @ff_on2avc_tabs_20_84_3, align 4, !tbaa !11
%97 = tail call i32 @twiddle(ptr noundef nonnull %94, ptr noundef nonnull %90, i32 noundef 128, i32 noundef %95, i32 noundef 84, i32 noundef 4, i32 noundef 13, i32 noundef 7, i32 noundef %96) #2
%98 = getelementptr inbounds i8, ptr %2, i64 768
%99 = load i32, ptr @ff_on2avc_tab_84_2, align 4, !tbaa !11
%100 = load i32, ptr @ff_on2avc_tabs_20_84_2, align 4, !tbaa !11
%101 = tail call i32 @twiddle(ptr noundef nonnull %98, ptr noundef nonnull %90, i32 noundef 128, i32 noundef %99, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %100) #2
%102 = getelementptr inbounds i8, ptr %2, i64 896
%103 = load i32, ptr @ff_on2avc_tab_84_1, align 4, !tbaa !11
%104 = load i32, ptr @ff_on2avc_tabs_20_84_1, align 4, !tbaa !11
%105 = tail call i32 @twiddle(ptr noundef nonnull %102, ptr noundef nonnull %90, i32 noundef 128, i32 noundef %103, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %104) #2
%106 = getelementptr inbounds i8, ptr %2, i64 1024
%107 = getelementptr inbounds i8, ptr %5, i64 1024
%108 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !11
%109 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !11
%110 = tail call i32 @twiddle(ptr noundef nonnull %106, ptr noundef nonnull %107, i32 noundef 128, i32 noundef %108, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %109) #2
%111 = getelementptr inbounds i8, ptr %2, i64 1280
%112 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !11
%113 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !11
%114 = tail call i32 @twiddle(ptr noundef nonnull %111, ptr noundef nonnull %107, i32 noundef 128, i32 noundef %112, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %113) #2
%115 = tail call i32 @wtf_end_512(ptr noundef nonnull %0, ptr noundef %1, ptr noundef %2, ptr noundef %5, ptr noundef nonnull %6) #2
br label %222
116: ; preds = %4
%117 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !11
%118 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !11
%119 = tail call i32 @twiddle(ptr noundef %2, ptr noundef %5, i32 noundef 32, i32 noundef %117, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %118) #2
%120 = getelementptr inbounds i8, ptr %2, i64 64
%121 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !11
%122 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !11
%123 = tail call i32 @twiddle(ptr noundef nonnull %120, ptr noundef %5, i32 noundef 32, i32 noundef %121, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %122) #2
%124 = getelementptr inbounds i8, ptr %2, i64 128
%125 = getelementptr inbounds i8, ptr %5, i64 128
%126 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !11
%127 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !11
%128 = tail call i32 @twiddle(ptr noundef nonnull %124, ptr noundef nonnull %125, i32 noundef 32, i32 noundef %126, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %127) #2
%129 = getelementptr inbounds i8, ptr %2, i64 192
%130 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !11
%131 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !11
%132 = tail call i32 @twiddle(ptr noundef nonnull %129, ptr noundef nonnull %125, i32 noundef 32, i32 noundef %130, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %131) #2
%133 = getelementptr inbounds i8, ptr %2, i64 256
%134 = getelementptr inbounds i8, ptr %5, i64 256
%135 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !11
%136 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !11
%137 = tail call i32 @twiddle(ptr noundef nonnull %133, ptr noundef nonnull %134, i32 noundef 32, i32 noundef %135, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %136) #2
%138 = getelementptr inbounds i8, ptr %2, i64 320
%139 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !11
%140 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !11
%141 = tail call i32 @twiddle(ptr noundef nonnull %138, ptr noundef nonnull %134, i32 noundef 32, i32 noundef %139, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %140) #2
%142 = getelementptr inbounds i8, ptr %2, i64 384
%143 = getelementptr inbounds i8, ptr %5, i64 384
%144 = load i32, ptr @ff_on2avc_tab_20_2, align 4, !tbaa !11
%145 = load i32, ptr @ff_on2avc_tabs_9_20_2, align 4, !tbaa !11
%146 = tail call i32 @twiddle(ptr noundef nonnull %142, ptr noundef nonnull %143, i32 noundef 32, i32 noundef %144, i32 noundef 20, i32 noundef 2, i32 noundef 4, i32 noundef 5, i32 noundef %145) #2
%147 = getelementptr inbounds i8, ptr %2, i64 448
%148 = load i32, ptr @ff_on2avc_tab_20_1, align 4, !tbaa !11
%149 = load i32, ptr @ff_on2avc_tabs_9_20_1, align 4, !tbaa !11
%150 = tail call i32 @twiddle(ptr noundef nonnull %147, ptr noundef nonnull %143, i32 noundef 32, i32 noundef %148, i32 noundef 20, i32 noundef 2, i32 noundef 5, i32 noundef 4, i32 noundef %149) #2
%151 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !11
%152 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !11
%153 = tail call i32 @twiddle(ptr noundef %5, ptr noundef nonnull %6, i32 noundef 64, i32 noundef %151, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %152) #2
%154 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !11
%155 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !11
%156 = tail call i32 @twiddle(ptr noundef nonnull %125, ptr noundef nonnull %6, i32 noundef 64, i32 noundef %154, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %155) #2
%157 = getelementptr inbounds i8, ptr %5, i64 4352
%158 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !11
%159 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !11
%160 = tail call i32 @twiddle(ptr noundef nonnull %134, ptr noundef nonnull %157, i32 noundef 64, i32 noundef %158, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %159) #2
%161 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !11
%162 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !11
%163 = tail call i32 @twiddle(ptr noundef nonnull %143, ptr noundef nonnull %157, i32 noundef 64, i32 noundef %161, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %162) #2
%164 = getelementptr inbounds i8, ptr %2, i64 512
%165 = getelementptr inbounds i8, ptr %5, i64 4608
%166 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !11
%167 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !11
%168 = tail call i32 @twiddle(ptr noundef nonnull %164, ptr noundef nonnull %165, i32 noundef 64, i32 noundef %166, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %167) #2
%169 = getelementptr inbounds i8, ptr %2, i64 640
%170 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !11
%171 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !11
%172 = tail call i32 @twiddle(ptr noundef nonnull %169, ptr noundef nonnull %165, i32 noundef 64, i32 noundef %170, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %171) #2
%173 = getelementptr inbounds i8, ptr %2, i64 768
%174 = getelementptr inbounds i8, ptr %5, i64 4864
%175 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !11
%176 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !11
%177 = tail call i32 @twiddle(ptr noundef nonnull %173, ptr noundef nonnull %174, i32 noundef 64, i32 noundef %175, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %176) #2
%178 = getelementptr inbounds i8, ptr %2, i64 896
%179 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !11
%180 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !11
%181 = tail call i32 @twiddle(ptr noundef nonnull %178, ptr noundef nonnull %174, i32 noundef 64, i32 noundef %179, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %180) #2
%182 = tail call i32 @memset(ptr noundef %5, i32 noundef 0, i32 noundef 512) #2
%183 = load i32, ptr @ff_on2avc_tab_84_1, align 4, !tbaa !11
%184 = load i32, ptr @ff_on2avc_tabs_20_84_1, align 4, !tbaa !11
%185 = tail call i32 @twiddle(ptr noundef nonnull %6, ptr noundef %5, i32 noundef 256, i32 noundef %183, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %184) #2
%186 = load i32, ptr @ff_on2avc_tab_84_2, align 4, !tbaa !11
%187 = load i32, ptr @ff_on2avc_tabs_20_84_2, align 4, !tbaa !11
%188 = tail call i32 @twiddle(ptr noundef nonnull %157, ptr noundef %5, i32 noundef 256, i32 noundef %186, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %187) #2
%189 = load i32, ptr @ff_on2avc_tab_84_3, align 4, !tbaa !11
%190 = load i32, ptr @ff_on2avc_tabs_20_84_3, align 4, !tbaa !11
%191 = tail call i32 @twiddle(ptr noundef nonnull %165, ptr noundef %5, i32 noundef 256, i32 noundef %189, i32 noundef 84, i32 noundef 4, i32 noundef 13, i32 noundef 7, i32 noundef %190) #2
%192 = load i32, ptr @ff_on2avc_tab_84_4, align 4, !tbaa !11
%193 = load i32, ptr @ff_on2avc_tabs_20_84_4, align 4, !tbaa !11
%194 = tail call i32 @twiddle(ptr noundef nonnull %174, ptr noundef %5, i32 noundef 256, i32 noundef %192, i32 noundef 84, i32 noundef 4, i32 noundef 15, i32 noundef 5, i32 noundef %193) #2
%195 = getelementptr inbounds i8, ptr %2, i64 1024
%196 = getelementptr inbounds i8, ptr %5, i64 1024
%197 = load i32, ptr @ff_on2avc_tab_84_4, align 4, !tbaa !11
%198 = load i32, ptr @ff_on2avc_tabs_20_84_4, align 4, !tbaa !11
%199 = tail call i32 @twiddle(ptr noundef nonnull %195, ptr noundef nonnull %196, i32 noundef 256, i32 noundef %197, i32 noundef 84, i32 noundef 4, i32 noundef 15, i32 noundef 5, i32 noundef %198) #2
%200 = getelementptr inbounds i8, ptr %2, i64 1280
%201 = load i32, ptr @ff_on2avc_tab_84_3, align 4, !tbaa !11
%202 = load i32, ptr @ff_on2avc_tabs_20_84_3, align 4, !tbaa !11
%203 = tail call i32 @twiddle(ptr noundef nonnull %200, ptr noundef nonnull %196, i32 noundef 256, i32 noundef %201, i32 noundef 84, i32 noundef 4, i32 noundef 13, i32 noundef 7, i32 noundef %202) #2
%204 = getelementptr inbounds i8, ptr %2, i64 1536
%205 = load i32, ptr @ff_on2avc_tab_84_2, align 4, !tbaa !11
%206 = load i32, ptr @ff_on2avc_tabs_20_84_2, align 4, !tbaa !11
%207 = tail call i32 @twiddle(ptr noundef nonnull %204, ptr noundef nonnull %196, i32 noundef 256, i32 noundef %205, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %206) #2
%208 = getelementptr inbounds i8, ptr %2, i64 1792
%209 = load i32, ptr @ff_on2avc_tab_84_1, align 4, !tbaa !11
%210 = load i32, ptr @ff_on2avc_tabs_20_84_1, align 4, !tbaa !11
%211 = tail call i32 @twiddle(ptr noundef nonnull %208, ptr noundef nonnull %196, i32 noundef 256, i32 noundef %209, i32 noundef 84, i32 noundef 4, i32 noundef 16, i32 noundef 4, i32 noundef %210) #2
%212 = getelementptr inbounds i8, ptr %2, i64 2048
%213 = getelementptr inbounds i8, ptr %5, i64 2048
%214 = load i32, ptr @ff_on2avc_tab_40_1, align 4, !tbaa !11
%215 = load i32, ptr @ff_on2avc_tabs_19_40_1, align 4, !tbaa !11
%216 = tail call i32 @twiddle(ptr noundef nonnull %212, ptr noundef nonnull %213, i32 noundef 256, i32 noundef %214, i32 noundef 40, i32 noundef 2, i32 noundef 11, i32 noundef 8, i32 noundef %215) #2
%217 = getelementptr inbounds i8, ptr %2, i64 2560
%218 = load i32, ptr @ff_on2avc_tab_40_2, align 4, !tbaa !11
%219 = load i32, ptr @ff_on2avc_tabs_19_40_2, align 4, !tbaa !11
%220 = tail call i32 @twiddle(ptr noundef nonnull %217, ptr noundef nonnull %213, i32 noundef 256, i32 noundef %218, i32 noundef 40, i32 noundef 2, i32 noundef 8, i32 noundef 11, i32 noundef %219) #2
%221 = tail call i32 @wtf_end_1024(ptr noundef nonnull %0, ptr noundef %1, ptr noundef %2, ptr noundef %5, ptr noundef nonnull %6) #2
br label %222
222: ; preds = %116, %10
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @twiddle(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wtf_end_512(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @wtf_end_1024(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
|
FFmpeg_libavcodec_extr_on2avc.c_wtf_44
|
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/cocoa40/extr_cocoa40.c_process_record_kb.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/cocoa40/extr_cocoa40.c_process_record_kb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @process_record_kb(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @process_record_user(i32 noundef %0, ptr noundef %1) #2
ret i32 %3
}
declare i32 @process_record_user(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/cocoa40/extr_cocoa40.c_process_record_kb.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/cocoa40/extr_cocoa40.c_process_record_kb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @process_record_kb(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @process_record_user(i32 noundef %0, ptr noundef %1) #2
ret i32 %3
}
declare i32 @process_record_user(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
qmk_firmware_keyboards_cocoa40_extr_cocoa40.c_process_record_kb
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/input/mouse/extr_vsxxxaa.c_vsxxxaa_connect.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/input/mouse/extr_vsxxxaa.c_vsxxxaa_connect.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vsxxxaa = type { i32, i32, ptr, ptr }
%struct.input_dev = type { i32, i32, i32, %struct.TYPE_4__, %struct.TYPE_3__, i32, i32 }
%struct.TYPE_4__ = type { ptr }
%struct.TYPE_3__ = type { i32 }
%struct.serio = type { ptr, i32 }
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [45 x i8] c"DEC VSXXX-AA/-GA mouse or VSXXX-AB digitizer\00", align 1
@.str.1 = private unnamed_addr constant [10 x i8] c"%s/input0\00", align 1
@BUS_RS232 = dso_local local_unnamed_addr global i32 0, align 4
@EV_KEY = dso_local local_unnamed_addr global i32 0, align 4
@EV_REL = dso_local local_unnamed_addr global i32 0, align 4
@EV_ABS = dso_local local_unnamed_addr global i32 0, align 4
@BTN_LEFT = dso_local local_unnamed_addr global i32 0, align 4
@BTN_MIDDLE = dso_local local_unnamed_addr global i32 0, align 4
@BTN_RIGHT = dso_local local_unnamed_addr global i32 0, align 4
@BTN_TOUCH = dso_local local_unnamed_addr global i32 0, align 4
@REL_X = dso_local local_unnamed_addr global i32 0, align 4
@REL_Y = dso_local local_unnamed_addr global i32 0, align 4
@ABS_X = dso_local local_unnamed_addr global i32 0, align 4
@ABS_Y = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @vsxxxaa_connect], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @vsxxxaa_connect(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%4 = sub nsw i32 0, %3
%5 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%6 = tail call ptr @kzalloc(i32 noundef 24, i32 noundef %5) #2
%7 = tail call ptr (...) @input_allocate_device() #2
%8 = icmp ne ptr %6, null
%9 = icmp ne ptr %7, null
%10 = select i1 %8, i1 %9, i1 false
br i1 %10, label %11, label %71
11: ; preds = %2
%12 = getelementptr inbounds %struct.vsxxxaa, ptr %6, i64 0, i32 3
store ptr %7, ptr %12, align 8, !tbaa !9
%13 = getelementptr inbounds %struct.vsxxxaa, ptr %6, i64 0, i32 2
store ptr %0, ptr %13, align 8, !tbaa !12
%14 = getelementptr inbounds %struct.vsxxxaa, ptr %6, i64 0, i32 1
%15 = load i32, ptr %14, align 4, !tbaa !13
%16 = tail call i32 @strlcat(i32 noundef %15, ptr noundef nonnull @.str, i32 noundef 4) #2
%17 = load i32, ptr %6, align 8, !tbaa !14
%18 = load ptr, ptr %0, align 8, !tbaa !15
%19 = tail call i32 @snprintf(i32 noundef %17, i32 noundef 4, ptr noundef nonnull @.str.1, ptr noundef %18) #2
%20 = getelementptr inbounds %struct.input_dev, ptr %7, i64 0, i32 5
%21 = load <2 x i32>, ptr %6, align 8, !tbaa !5
store <2 x i32> %21, ptr %20, align 4, !tbaa !5
%22 = load i32, ptr @BUS_RS232, align 4, !tbaa !5
%23 = getelementptr inbounds %struct.input_dev, ptr %7, i64 0, i32 4
store i32 %22, ptr %23, align 8, !tbaa !17
%24 = getelementptr inbounds %struct.serio, ptr %0, i64 0, i32 1
%25 = getelementptr inbounds %struct.input_dev, ptr %7, i64 0, i32 3
store ptr %24, ptr %25, align 8, !tbaa !21
%26 = load i32, ptr @EV_KEY, align 4, !tbaa !5
%27 = getelementptr inbounds %struct.input_dev, ptr %7, i64 0, i32 2
%28 = load i32, ptr %27, align 8, !tbaa !22
%29 = tail call i32 @set_bit(i32 noundef %26, i32 noundef %28) #2
%30 = load i32, ptr @EV_REL, align 4, !tbaa !5
%31 = load i32, ptr %27, align 8, !tbaa !22
%32 = tail call i32 @set_bit(i32 noundef %30, i32 noundef %31) #2
%33 = load i32, ptr @EV_ABS, align 4, !tbaa !5
%34 = load i32, ptr %27, align 8, !tbaa !22
%35 = tail call i32 @set_bit(i32 noundef %33, i32 noundef %34) #2
%36 = load i32, ptr @BTN_LEFT, align 4, !tbaa !5
%37 = getelementptr inbounds %struct.input_dev, ptr %7, i64 0, i32 1
%38 = load i32, ptr %37, align 4, !tbaa !23
%39 = tail call i32 @set_bit(i32 noundef %36, i32 noundef %38) #2
%40 = load i32, ptr @BTN_MIDDLE, align 4, !tbaa !5
%41 = load i32, ptr %37, align 4, !tbaa !23
%42 = tail call i32 @set_bit(i32 noundef %40, i32 noundef %41) #2
%43 = load i32, ptr @BTN_RIGHT, align 4, !tbaa !5
%44 = load i32, ptr %37, align 4, !tbaa !23
%45 = tail call i32 @set_bit(i32 noundef %43, i32 noundef %44) #2
%46 = load i32, ptr @BTN_TOUCH, align 4, !tbaa !5
%47 = load i32, ptr %37, align 4, !tbaa !23
%48 = tail call i32 @set_bit(i32 noundef %46, i32 noundef %47) #2
%49 = load i32, ptr @REL_X, align 4, !tbaa !5
%50 = load i32, ptr %7, align 8, !tbaa !24
%51 = tail call i32 @set_bit(i32 noundef %49, i32 noundef %50) #2
%52 = load i32, ptr @REL_Y, align 4, !tbaa !5
%53 = load i32, ptr %7, align 8, !tbaa !24
%54 = tail call i32 @set_bit(i32 noundef %52, i32 noundef %53) #2
%55 = load i32, ptr @ABS_X, align 4, !tbaa !5
%56 = tail call i32 @input_set_abs_params(ptr noundef nonnull %7, i32 noundef %55, i32 noundef 0, i32 noundef 1023, i32 noundef 0, i32 noundef 0) #2
%57 = load i32, ptr @ABS_Y, align 4, !tbaa !5
%58 = tail call i32 @input_set_abs_params(ptr noundef nonnull %7, i32 noundef %57, i32 noundef 0, i32 noundef 1023, i32 noundef 0, i32 noundef 0) #2
%59 = tail call i32 @serio_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %6) #2
%60 = tail call i32 @serio_open(ptr noundef nonnull %0, ptr noundef %1) #2
%61 = icmp eq i32 %60, 0
br i1 %61, label %62, label %68
62: ; preds = %11
%63 = tail call i32 @serio_write(ptr noundef nonnull %0, i8 noundef signext 84) #2
%64 = tail call i32 @input_register_device(ptr noundef nonnull %7) #2
%65 = icmp eq i32 %64, 0
br i1 %65, label %75, label %66
66: ; preds = %62
%67 = tail call i32 @serio_close(ptr noundef nonnull %0) #2
br label %68
68: ; preds = %11, %66
%69 = phi i32 [ %60, %11 ], [ %64, %66 ]
%70 = tail call i32 @serio_set_drvdata(ptr noundef nonnull %0, ptr noundef null) #2
br label %71
71: ; preds = %2, %68
%72 = phi i32 [ %69, %68 ], [ %4, %2 ]
%73 = tail call i32 @input_free_device(ptr noundef %7) #2
%74 = tail call i32 @kfree(ptr noundef %6) #2
br label %75
75: ; preds = %62, %71
%76 = phi i32 [ %72, %71 ], [ 0, %62 ]
ret i32 %76
}
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @input_allocate_device(...) local_unnamed_addr #1
declare i32 @strlcat(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snprintf(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @set_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_set_abs_params(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @serio_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @serio_open(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @serio_write(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare i32 @input_register_device(ptr noundef) local_unnamed_addr #1
declare i32 @serio_close(ptr noundef) local_unnamed_addr #1
declare i32 @input_free_device(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 16}
!10 = !{!"vsxxxaa", !6, i64 0, !6, i64 4, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!10, !6, i64 4}
!14 = !{!10, !6, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"serio", !11, i64 0, !6, i64 8}
!17 = !{!18, !6, i64 24}
!18 = !{!"input_dev", !6, i64 0, !6, i64 4, !6, i64 8, !19, i64 16, !20, i64 24, !6, i64 28, !6, i64 32}
!19 = !{!"TYPE_4__", !11, i64 0}
!20 = !{!"TYPE_3__", !6, i64 0}
!21 = !{!18, !11, i64 16}
!22 = !{!18, !6, i64 8}
!23 = !{!18, !6, i64 4}
!24 = !{!18, !6, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/input/mouse/extr_vsxxxaa.c_vsxxxaa_connect.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/input/mouse/extr_vsxxxaa.c_vsxxxaa_connect.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [45 x i8] c"DEC VSXXX-AA/-GA mouse or VSXXX-AB digitizer\00", align 1
@.str.1 = private unnamed_addr constant [10 x i8] c"%s/input0\00", align 1
@BUS_RS232 = common local_unnamed_addr global i32 0, align 4
@EV_KEY = common local_unnamed_addr global i32 0, align 4
@EV_REL = common local_unnamed_addr global i32 0, align 4
@EV_ABS = common local_unnamed_addr global i32 0, align 4
@BTN_LEFT = common local_unnamed_addr global i32 0, align 4
@BTN_MIDDLE = common local_unnamed_addr global i32 0, align 4
@BTN_RIGHT = common local_unnamed_addr global i32 0, align 4
@BTN_TOUCH = common local_unnamed_addr global i32 0, align 4
@REL_X = common local_unnamed_addr global i32 0, align 4
@REL_Y = common local_unnamed_addr global i32 0, align 4
@ABS_X = common local_unnamed_addr global i32 0, align 4
@ABS_Y = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vsxxxaa_connect], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @vsxxxaa_connect(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%4 = sub nsw i32 0, %3
%5 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%6 = tail call ptr @kzalloc(i32 noundef 24, i32 noundef %5) #2
%7 = tail call ptr @input_allocate_device() #2
%8 = icmp ne ptr %6, null
%9 = icmp ne ptr %7, null
%10 = select i1 %8, i1 %9, i1 false
br i1 %10, label %11, label %71
11: ; preds = %2
%12 = getelementptr inbounds i8, ptr %6, i64 16
store ptr %7, ptr %12, align 8, !tbaa !10
%13 = getelementptr inbounds i8, ptr %6, i64 8
store ptr %0, ptr %13, align 8, !tbaa !13
%14 = getelementptr inbounds i8, ptr %6, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !14
%16 = tail call i32 @strlcat(i32 noundef %15, ptr noundef nonnull @.str, i32 noundef 4) #2
%17 = load i32, ptr %6, align 8, !tbaa !15
%18 = load ptr, ptr %0, align 8, !tbaa !16
%19 = tail call i32 @snprintf(i32 noundef %17, i32 noundef 4, ptr noundef nonnull @.str.1, ptr noundef %18) #2
%20 = getelementptr inbounds i8, ptr %7, i64 28
%21 = load <2 x i32>, ptr %6, align 8, !tbaa !6
store <2 x i32> %21, ptr %20, align 4, !tbaa !6
%22 = load i32, ptr @BUS_RS232, align 4, !tbaa !6
%23 = getelementptr inbounds i8, ptr %7, i64 24
store i32 %22, ptr %23, align 8, !tbaa !18
%24 = getelementptr inbounds i8, ptr %0, i64 8
%25 = getelementptr inbounds i8, ptr %7, i64 16
store ptr %24, ptr %25, align 8, !tbaa !22
%26 = load i32, ptr @EV_KEY, align 4, !tbaa !6
%27 = getelementptr inbounds i8, ptr %7, i64 8
%28 = load i32, ptr %27, align 8, !tbaa !23
%29 = tail call i32 @set_bit(i32 noundef %26, i32 noundef %28) #2
%30 = load i32, ptr @EV_REL, align 4, !tbaa !6
%31 = load i32, ptr %27, align 8, !tbaa !23
%32 = tail call i32 @set_bit(i32 noundef %30, i32 noundef %31) #2
%33 = load i32, ptr @EV_ABS, align 4, !tbaa !6
%34 = load i32, ptr %27, align 8, !tbaa !23
%35 = tail call i32 @set_bit(i32 noundef %33, i32 noundef %34) #2
%36 = load i32, ptr @BTN_LEFT, align 4, !tbaa !6
%37 = getelementptr inbounds i8, ptr %7, i64 4
%38 = load i32, ptr %37, align 4, !tbaa !24
%39 = tail call i32 @set_bit(i32 noundef %36, i32 noundef %38) #2
%40 = load i32, ptr @BTN_MIDDLE, align 4, !tbaa !6
%41 = load i32, ptr %37, align 4, !tbaa !24
%42 = tail call i32 @set_bit(i32 noundef %40, i32 noundef %41) #2
%43 = load i32, ptr @BTN_RIGHT, align 4, !tbaa !6
%44 = load i32, ptr %37, align 4, !tbaa !24
%45 = tail call i32 @set_bit(i32 noundef %43, i32 noundef %44) #2
%46 = load i32, ptr @BTN_TOUCH, align 4, !tbaa !6
%47 = load i32, ptr %37, align 4, !tbaa !24
%48 = tail call i32 @set_bit(i32 noundef %46, i32 noundef %47) #2
%49 = load i32, ptr @REL_X, align 4, !tbaa !6
%50 = load i32, ptr %7, align 8, !tbaa !25
%51 = tail call i32 @set_bit(i32 noundef %49, i32 noundef %50) #2
%52 = load i32, ptr @REL_Y, align 4, !tbaa !6
%53 = load i32, ptr %7, align 8, !tbaa !25
%54 = tail call i32 @set_bit(i32 noundef %52, i32 noundef %53) #2
%55 = load i32, ptr @ABS_X, align 4, !tbaa !6
%56 = tail call i32 @input_set_abs_params(ptr noundef nonnull %7, i32 noundef %55, i32 noundef 0, i32 noundef 1023, i32 noundef 0, i32 noundef 0) #2
%57 = load i32, ptr @ABS_Y, align 4, !tbaa !6
%58 = tail call i32 @input_set_abs_params(ptr noundef nonnull %7, i32 noundef %57, i32 noundef 0, i32 noundef 1023, i32 noundef 0, i32 noundef 0) #2
%59 = tail call i32 @serio_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %6) #2
%60 = tail call i32 @serio_open(ptr noundef nonnull %0, ptr noundef %1) #2
%61 = icmp eq i32 %60, 0
br i1 %61, label %62, label %68
62: ; preds = %11
%63 = tail call i32 @serio_write(ptr noundef nonnull %0, i8 noundef signext 84) #2
%64 = tail call i32 @input_register_device(ptr noundef nonnull %7) #2
%65 = icmp eq i32 %64, 0
br i1 %65, label %75, label %66
66: ; preds = %62
%67 = tail call i32 @serio_close(ptr noundef nonnull %0) #2
br label %68
68: ; preds = %11, %66
%69 = phi i32 [ %60, %11 ], [ %64, %66 ]
%70 = tail call i32 @serio_set_drvdata(ptr noundef nonnull %0, ptr noundef null) #2
br label %71
71: ; preds = %2, %68
%72 = phi i32 [ %69, %68 ], [ %4, %2 ]
%73 = tail call i32 @input_free_device(ptr noundef %7) #2
%74 = tail call i32 @kfree(ptr noundef %6) #2
br label %75
75: ; preds = %62, %71
%76 = phi i32 [ %72, %71 ], [ 0, %62 ]
ret i32 %76
}
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @input_allocate_device(...) local_unnamed_addr #1
declare i32 @strlcat(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snprintf(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @set_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_set_abs_params(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @serio_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @serio_open(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @serio_write(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare i32 @input_register_device(ptr noundef) local_unnamed_addr #1
declare i32 @serio_close(ptr noundef) local_unnamed_addr #1
declare i32 @input_free_device(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 16}
!11 = !{!"vsxxxaa", !7, i64 0, !7, i64 4, !12, i64 8, !12, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !7, i64 4}
!15 = !{!11, !7, i64 0}
!16 = !{!17, !12, i64 0}
!17 = !{!"serio", !12, i64 0, !7, i64 8}
!18 = !{!19, !7, i64 24}
!19 = !{!"input_dev", !7, i64 0, !7, i64 4, !7, i64 8, !20, i64 16, !21, i64 24, !7, i64 28, !7, i64 32}
!20 = !{!"TYPE_4__", !12, i64 0}
!21 = !{!"TYPE_3__", !7, i64 0}
!22 = !{!19, !12, i64 16}
!23 = !{!19, !7, i64 8}
!24 = !{!19, !7, i64 4}
!25 = !{!19, !7, i64 0}
|
fastsocket_kernel_drivers_input_mouse_extr_vsxxxaa.c_vsxxxaa_connect
|
; ModuleID = 'AnghaBench/radare2/libr/parse/p/extr_parse_m68k_pseudo.c_parse.c'
source_filename = "AnghaBench/radare2/libr/parse/p/extr_parse_m68k_pseudo.c_parse.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@WSZ = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"jr ra\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"ret\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c".l\00", align 1
@.str.3 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.4 = private unnamed_addr constant [3 x i8] c".w\00", align 1
@.str.5 = private unnamed_addr constant [3 x i8] c".d\00", align 1
@.str.6 = private unnamed_addr constant [3 x i8] c".b\00", align 1
@.str.7 = private unnamed_addr constant [4 x i8] c"+ =\00", align 1
@.str.8 = private unnamed_addr constant [4 x i8] c" +=\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @parse], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @parse(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca [5 x ptr], align 16
%5 = tail call i32 @strlen(ptr noundef %1) #4
%6 = load i32, ptr @WSZ, align 4, !tbaa !5
%7 = zext i32 %6 to i64
%8 = alloca i8, i64 %7, align 16
%9 = alloca i8, i64 %7, align 16
%10 = alloca i8, i64 %7, align 16
%11 = alloca i8, i64 %7, align 16
%12 = alloca i8, i64 %7, align 16
%13 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(6) @.str)
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %3
%16 = tail call i32 @strcpy(ptr noundef %2, ptr noundef nonnull @.str.1) #4
br label %127
17: ; preds = %3
%18 = add nsw i32 %5, 1
%19 = tail call ptr @malloc(i32 noundef %18) #4
%20 = icmp eq ptr %19, null
br i1 %20, label %127, label %21
21: ; preds = %17
%22 = tail call i32 @memcpy(ptr noundef nonnull %19, ptr noundef %1, i32 noundef %18) #4
%23 = tail call i32 @r_str_replace_in(ptr noundef nonnull %19, i32 noundef %18, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef 1) #4
%24 = tail call i32 @r_str_replace_in(ptr noundef nonnull %19, i32 noundef %18, ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.3, i32 noundef 1) #4
%25 = tail call i32 @r_str_replace_in(ptr noundef nonnull %19, i32 noundef %18, ptr noundef nonnull @.str.5, ptr noundef nonnull @.str.3, i32 noundef 1) #4
%26 = tail call i32 @r_str_replace_in(ptr noundef nonnull %19, i32 noundef %18, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.3, i32 noundef 1) #4
%27 = tail call i32 @r_str_trim(ptr noundef nonnull %19) #4
%28 = load i8, ptr %19, align 1, !tbaa !9
%29 = icmp eq i8 %28, 0
br i1 %29, label %125, label %30
30: ; preds = %21
store i8 0, ptr %8, align 16, !tbaa !9
store i8 0, ptr %9, align 16, !tbaa !9
store i8 0, ptr %10, align 16, !tbaa !9
store i8 0, ptr %11, align 16, !tbaa !9
store i8 0, ptr %12, align 16, !tbaa !9
%31 = tail call ptr @strchr(ptr noundef nonnull %19, i8 noundef signext 32) #4
%32 = icmp eq ptr %31, null
br i1 %32, label %33, label %36
33: ; preds = %30
%34 = tail call ptr @strchr(ptr noundef nonnull %19, i8 noundef signext 9) #4
%35 = icmp eq ptr %34, null
br i1 %35, label %95, label %36
36: ; preds = %30, %33
%37 = phi ptr [ %34, %33 ], [ %31, %30 ]
store i8 0, ptr %37, align 1, !tbaa !9
br label %38
38: ; preds = %38, %36
%39 = phi ptr [ %37, %36 ], [ %40, %38 ]
%40 = getelementptr inbounds i8, ptr %39, i64 1
%41 = load i8, ptr %40, align 1, !tbaa !9
%42 = icmp eq i8 %41, 32
br i1 %42, label %38, label %43, !llvm.loop !10
43: ; preds = %38
%44 = load i32, ptr @WSZ, align 4, !tbaa !5
%45 = add nsw i32 %44, -1
%46 = call i32 @strncpy(ptr noundef nonnull %8, ptr noundef nonnull %19, i32 noundef %45) #4
%47 = load i32, ptr @WSZ, align 4, !tbaa !5
%48 = add nsw i32 %47, -1
%49 = call i32 @strncpy(ptr noundef nonnull %9, ptr noundef nonnull %40, i32 noundef %48) #4
%50 = call ptr @strchr(ptr noundef nonnull %40, i8 noundef signext 44) #4
%51 = icmp eq ptr %50, null
br i1 %51, label %95, label %52
52: ; preds = %43
store i8 0, ptr %50, align 1, !tbaa !9
br label %53
53: ; preds = %53, %52
%54 = phi ptr [ %50, %52 ], [ %55, %53 ]
%55 = getelementptr inbounds i8, ptr %54, i64 1
%56 = load i8, ptr %55, align 1, !tbaa !9
%57 = icmp eq i8 %56, 32
br i1 %57, label %53, label %58, !llvm.loop !12
58: ; preds = %53
%59 = load i32, ptr @WSZ, align 4, !tbaa !5
%60 = add nsw i32 %59, -1
%61 = call i32 @strncpy(ptr noundef nonnull %9, ptr noundef nonnull %40, i32 noundef %60) #4
%62 = load i32, ptr @WSZ, align 4, !tbaa !5
%63 = add nsw i32 %62, -1
%64 = call i32 @strncpy(ptr noundef nonnull %10, ptr noundef nonnull %55, i32 noundef %63) #4
%65 = call ptr @strchr(ptr noundef nonnull %55, i8 noundef signext 44) #4
%66 = icmp eq ptr %65, null
br i1 %66, label %95, label %67
67: ; preds = %58
store i8 0, ptr %65, align 1, !tbaa !9
br label %68
68: ; preds = %68, %67
%69 = phi ptr [ %65, %67 ], [ %70, %68 ]
%70 = getelementptr inbounds i8, ptr %69, i64 1
%71 = load i8, ptr %70, align 1, !tbaa !9
%72 = icmp eq i8 %71, 32
br i1 %72, label %68, label %73, !llvm.loop !13
73: ; preds = %68
%74 = load i32, ptr @WSZ, align 4, !tbaa !5
%75 = add nsw i32 %74, -1
%76 = call i32 @strncpy(ptr noundef nonnull %10, ptr noundef nonnull %55, i32 noundef %75) #4
%77 = load i32, ptr @WSZ, align 4, !tbaa !5
%78 = add nsw i32 %77, -1
%79 = call i32 @strncpy(ptr noundef nonnull %11, ptr noundef nonnull %70, i32 noundef %78) #4
%80 = call ptr @strchr(ptr noundef nonnull %70, i8 noundef signext 44) #4
%81 = icmp eq ptr %80, null
br i1 %81, label %95, label %82
82: ; preds = %73
store i8 0, ptr %80, align 1, !tbaa !9
br label %83
83: ; preds = %83, %82
%84 = phi ptr [ %80, %82 ], [ %85, %83 ]
%85 = getelementptr inbounds i8, ptr %84, i64 1
%86 = load i8, ptr %85, align 1, !tbaa !9
%87 = icmp eq i8 %86, 32
br i1 %87, label %83, label %88, !llvm.loop !14
88: ; preds = %83
%89 = load i32, ptr @WSZ, align 4, !tbaa !5
%90 = add nsw i32 %89, -1
%91 = call i32 @strncpy(ptr noundef nonnull %11, ptr noundef nonnull %70, i32 noundef %90) #4
%92 = load i32, ptr @WSZ, align 4, !tbaa !5
%93 = add nsw i32 %92, -1
%94 = call i32 @strncpy(ptr noundef nonnull %12, ptr noundef nonnull %85, i32 noundef %93) #4
br label %95
95: ; preds = %43, %73, %88, %58, %33
call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %4) #4
store ptr %8, ptr %4, align 16, !tbaa !15
%96 = getelementptr inbounds ptr, ptr %4, i64 1
store ptr %9, ptr %96, align 8, !tbaa !15
%97 = getelementptr inbounds ptr, ptr %4, i64 2
store ptr %10, ptr %97, align 16, !tbaa !15
%98 = getelementptr inbounds ptr, ptr %4, i64 3
store ptr %11, ptr %98, align 8, !tbaa !15
%99 = getelementptr inbounds ptr, ptr %4, i64 4
store ptr %12, ptr %99, align 16, !tbaa !15
%100 = load i8, ptr %8, align 16, !tbaa !9
%101 = icmp ne i8 %100, 0
%102 = zext i1 %101 to i32
%103 = load i8, ptr %9, align 16, !tbaa !9
%104 = icmp ne i8 %103, 0
%105 = zext i1 %104 to i32
%106 = add nuw nsw i32 %102, %105
%107 = load i8, ptr %10, align 16, !tbaa !9
%108 = icmp ne i8 %107, 0
%109 = zext i1 %108 to i32
%110 = add nuw nsw i32 %106, %109
%111 = load i8, ptr %11, align 16, !tbaa !9
%112 = icmp ne i8 %111, 0
%113 = zext i1 %112 to i32
%114 = add nuw nsw i32 %110, %113
%115 = load i8, ptr %12, align 16, !tbaa !9
%116 = icmp ne i8 %115, 0
%117 = zext i1 %116 to i32
%118 = add nuw nsw i32 %114, %117
%119 = call i32 @replace(i32 noundef %118, ptr noundef nonnull %4, ptr noundef %2) #4
%120 = call ptr @strstr(ptr noundef nonnull dereferenceable(1) %2, ptr noundef nonnull dereferenceable(1) @.str.7)
%121 = icmp eq ptr %120, null
br i1 %121, label %124, label %122
122: ; preds = %95
%123 = call i32 @memcpy(ptr noundef nonnull %120, ptr noundef nonnull @.str.8, i32 noundef 3) #4
br label %124
124: ; preds = %122, %95
call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %4) #4
br label %125
125: ; preds = %124, %21
%126 = call i32 @free(ptr noundef nonnull %19) #4
br label %127
127: ; preds = %17, %125, %15
%128 = phi i32 [ 1, %125 ], [ 1, %15 ], [ 0, %17 ]
ret i32 %128
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @strlen(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #3
declare i32 @strcpy(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @malloc(i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @r_str_replace_in(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @r_str_trim(ptr noundef) local_unnamed_addr #2
declare ptr @strchr(ptr noundef, i8 noundef signext) local_unnamed_addr #2
declare i32 @strncpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @replace(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare ptr @strstr(ptr noundef, ptr nocapture noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @free(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}
!14 = distinct !{!14, !11}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !7, i64 0}
|
; ModuleID = 'AnghaBench/radare2/libr/parse/p/extr_parse_m68k_pseudo.c_parse.c'
source_filename = "AnghaBench/radare2/libr/parse/p/extr_parse_m68k_pseudo.c_parse.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@WSZ = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"jr ra\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"ret\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c".l\00", align 1
@.str.3 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.4 = private unnamed_addr constant [3 x i8] c".w\00", align 1
@.str.5 = private unnamed_addr constant [3 x i8] c".d\00", align 1
@.str.6 = private unnamed_addr constant [3 x i8] c".b\00", align 1
@.str.7 = private unnamed_addr constant [4 x i8] c"+ =\00", align 1
@.str.8 = private unnamed_addr constant [4 x i8] c" +=\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @parse], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @parse(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca [5 x ptr], align 8
%5 = tail call i32 @strlen(ptr noundef %1) #4
%6 = load i32, ptr @WSZ, align 4, !tbaa !6
%7 = zext i32 %6 to i64
%8 = alloca i8, i64 %7, align 1
%9 = alloca i8, i64 %7, align 1
%10 = alloca i8, i64 %7, align 1
%11 = alloca i8, i64 %7, align 1
%12 = alloca i8, i64 %7, align 1
%13 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(6) @.str)
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %3
%16 = tail call i32 @strcpy(ptr noundef %2, ptr noundef nonnull @.str.1) #4
br label %127
17: ; preds = %3
%18 = add nsw i32 %5, 1
%19 = tail call ptr @malloc(i32 noundef %18) #4
%20 = icmp eq ptr %19, null
br i1 %20, label %127, label %21
21: ; preds = %17
%22 = tail call i32 @memcpy(ptr noundef nonnull %19, ptr noundef %1, i32 noundef %18) #4
%23 = tail call i32 @r_str_replace_in(ptr noundef nonnull %19, i32 noundef %18, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef 1) #4
%24 = tail call i32 @r_str_replace_in(ptr noundef nonnull %19, i32 noundef %18, ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.3, i32 noundef 1) #4
%25 = tail call i32 @r_str_replace_in(ptr noundef nonnull %19, i32 noundef %18, ptr noundef nonnull @.str.5, ptr noundef nonnull @.str.3, i32 noundef 1) #4
%26 = tail call i32 @r_str_replace_in(ptr noundef nonnull %19, i32 noundef %18, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.3, i32 noundef 1) #4
%27 = tail call i32 @r_str_trim(ptr noundef nonnull %19) #4
%28 = load i8, ptr %19, align 1, !tbaa !10
%29 = icmp eq i8 %28, 0
br i1 %29, label %125, label %30
30: ; preds = %21
store i8 0, ptr %8, align 1, !tbaa !10
store i8 0, ptr %9, align 1, !tbaa !10
store i8 0, ptr %10, align 1, !tbaa !10
store i8 0, ptr %11, align 1, !tbaa !10
store i8 0, ptr %12, align 1, !tbaa !10
%31 = tail call ptr @strchr(ptr noundef nonnull %19, i8 noundef signext 32) #4
%32 = icmp eq ptr %31, null
br i1 %32, label %33, label %36
33: ; preds = %30
%34 = tail call ptr @strchr(ptr noundef nonnull %19, i8 noundef signext 9) #4
%35 = icmp eq ptr %34, null
br i1 %35, label %95, label %36
36: ; preds = %30, %33
%37 = phi ptr [ %34, %33 ], [ %31, %30 ]
store i8 0, ptr %37, align 1, !tbaa !10
br label %38
38: ; preds = %38, %36
%39 = phi ptr [ %37, %36 ], [ %40, %38 ]
%40 = getelementptr inbounds i8, ptr %39, i64 1
%41 = load i8, ptr %40, align 1, !tbaa !10
%42 = icmp eq i8 %41, 32
br i1 %42, label %38, label %43, !llvm.loop !11
43: ; preds = %38
%44 = load i32, ptr @WSZ, align 4, !tbaa !6
%45 = add nsw i32 %44, -1
%46 = call i32 @strncpy(ptr noundef nonnull %8, ptr noundef nonnull %19, i32 noundef %45) #4
%47 = load i32, ptr @WSZ, align 4, !tbaa !6
%48 = add nsw i32 %47, -1
%49 = call i32 @strncpy(ptr noundef nonnull %9, ptr noundef nonnull %40, i32 noundef %48) #4
%50 = call ptr @strchr(ptr noundef nonnull %40, i8 noundef signext 44) #4
%51 = icmp eq ptr %50, null
br i1 %51, label %95, label %52
52: ; preds = %43
store i8 0, ptr %50, align 1, !tbaa !10
br label %53
53: ; preds = %53, %52
%54 = phi ptr [ %50, %52 ], [ %55, %53 ]
%55 = getelementptr inbounds i8, ptr %54, i64 1
%56 = load i8, ptr %55, align 1, !tbaa !10
%57 = icmp eq i8 %56, 32
br i1 %57, label %53, label %58, !llvm.loop !13
58: ; preds = %53
%59 = load i32, ptr @WSZ, align 4, !tbaa !6
%60 = add nsw i32 %59, -1
%61 = call i32 @strncpy(ptr noundef nonnull %9, ptr noundef nonnull %40, i32 noundef %60) #4
%62 = load i32, ptr @WSZ, align 4, !tbaa !6
%63 = add nsw i32 %62, -1
%64 = call i32 @strncpy(ptr noundef nonnull %10, ptr noundef nonnull %55, i32 noundef %63) #4
%65 = call ptr @strchr(ptr noundef nonnull %55, i8 noundef signext 44) #4
%66 = icmp eq ptr %65, null
br i1 %66, label %95, label %67
67: ; preds = %58
store i8 0, ptr %65, align 1, !tbaa !10
br label %68
68: ; preds = %68, %67
%69 = phi ptr [ %65, %67 ], [ %70, %68 ]
%70 = getelementptr inbounds i8, ptr %69, i64 1
%71 = load i8, ptr %70, align 1, !tbaa !10
%72 = icmp eq i8 %71, 32
br i1 %72, label %68, label %73, !llvm.loop !14
73: ; preds = %68
%74 = load i32, ptr @WSZ, align 4, !tbaa !6
%75 = add nsw i32 %74, -1
%76 = call i32 @strncpy(ptr noundef nonnull %10, ptr noundef nonnull %55, i32 noundef %75) #4
%77 = load i32, ptr @WSZ, align 4, !tbaa !6
%78 = add nsw i32 %77, -1
%79 = call i32 @strncpy(ptr noundef nonnull %11, ptr noundef nonnull %70, i32 noundef %78) #4
%80 = call ptr @strchr(ptr noundef nonnull %70, i8 noundef signext 44) #4
%81 = icmp eq ptr %80, null
br i1 %81, label %95, label %82
82: ; preds = %73
store i8 0, ptr %80, align 1, !tbaa !10
br label %83
83: ; preds = %83, %82
%84 = phi ptr [ %80, %82 ], [ %85, %83 ]
%85 = getelementptr inbounds i8, ptr %84, i64 1
%86 = load i8, ptr %85, align 1, !tbaa !10
%87 = icmp eq i8 %86, 32
br i1 %87, label %83, label %88, !llvm.loop !15
88: ; preds = %83
%89 = load i32, ptr @WSZ, align 4, !tbaa !6
%90 = add nsw i32 %89, -1
%91 = call i32 @strncpy(ptr noundef nonnull %11, ptr noundef nonnull %70, i32 noundef %90) #4
%92 = load i32, ptr @WSZ, align 4, !tbaa !6
%93 = add nsw i32 %92, -1
%94 = call i32 @strncpy(ptr noundef nonnull %12, ptr noundef nonnull %85, i32 noundef %93) #4
br label %95
95: ; preds = %43, %73, %88, %58, %33
call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %4) #4
store ptr %8, ptr %4, align 8, !tbaa !16
%96 = getelementptr inbounds i8, ptr %4, i64 8
store ptr %9, ptr %96, align 8, !tbaa !16
%97 = getelementptr inbounds i8, ptr %4, i64 16
store ptr %10, ptr %97, align 8, !tbaa !16
%98 = getelementptr inbounds i8, ptr %4, i64 24
store ptr %11, ptr %98, align 8, !tbaa !16
%99 = getelementptr inbounds i8, ptr %4, i64 32
store ptr %12, ptr %99, align 8, !tbaa !16
%100 = load i8, ptr %8, align 1, !tbaa !10
%101 = icmp ne i8 %100, 0
%102 = zext i1 %101 to i32
%103 = load i8, ptr %9, align 1, !tbaa !10
%104 = icmp ne i8 %103, 0
%105 = zext i1 %104 to i32
%106 = add nuw nsw i32 %102, %105
%107 = load i8, ptr %10, align 1, !tbaa !10
%108 = icmp ne i8 %107, 0
%109 = zext i1 %108 to i32
%110 = add nuw nsw i32 %106, %109
%111 = load i8, ptr %11, align 1, !tbaa !10
%112 = icmp ne i8 %111, 0
%113 = zext i1 %112 to i32
%114 = add nuw nsw i32 %110, %113
%115 = load i8, ptr %12, align 1, !tbaa !10
%116 = icmp ne i8 %115, 0
%117 = zext i1 %116 to i32
%118 = add nuw nsw i32 %114, %117
%119 = call i32 @replace(i32 noundef %118, ptr noundef nonnull %4, ptr noundef %2) #4
%120 = call ptr @strstr(ptr noundef nonnull dereferenceable(1) %2, ptr noundef nonnull dereferenceable(1) @.str.7)
%121 = icmp eq ptr %120, null
br i1 %121, label %124, label %122
122: ; preds = %95
%123 = call i32 @memcpy(ptr noundef nonnull %120, ptr noundef nonnull @.str.8, i32 noundef 3) #4
br label %124
124: ; preds = %122, %95
call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %4) #4
br label %125
125: ; preds = %124, %21
%126 = call i32 @free(ptr noundef nonnull %19) #4
br label %127
127: ; preds = %17, %125, %15
%128 = phi i32 [ 1, %125 ], [ 1, %15 ], [ 0, %17 ]
ret i32 %128
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @strlen(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #3
declare i32 @strcpy(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @malloc(i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @r_str_replace_in(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @r_str_trim(ptr noundef) local_unnamed_addr #2
declare ptr @strchr(ptr noundef, i8 noundef signext) local_unnamed_addr #2
declare i32 @strncpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @replace(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare ptr @strstr(ptr noundef, ptr nocapture noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @free(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = !{!17, !17, i64 0}
!17 = !{!"any pointer", !8, i64 0}
|
radare2_libr_parse_p_extr_parse_m68k_pseudo.c_parse
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_language.c_show_range_command.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_language.c_show_range_command.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@range_check = dso_local local_unnamed_addr global i64 0, align 8
@current_language = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [71 x i8] c"Warning: the current range check setting does not match the language.\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @show_range_command], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @show_range_command(ptr nocapture readnone %0, i32 %1) #0 {
%3 = load i64, ptr @range_check, align 8, !tbaa !5
%4 = load ptr, ptr @current_language, align 8, !tbaa !9
%5 = load i64, ptr %4, align 8, !tbaa !11
%6 = icmp eq i64 %3, %5
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @printf_unfiltered(ptr noundef nonnull @.str) #2
br label %9
9: ; preds = %7, %2
ret void
}
declare i32 @printf_unfiltered(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"TYPE_2__", !6, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_language.c_show_range_command.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_language.c_show_range_command.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@range_check = common local_unnamed_addr global i64 0, align 8
@current_language = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [71 x i8] c"Warning: the current range check setting does not match the language.\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @show_range_command], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @show_range_command(ptr nocapture readnone %0, i32 %1) #0 {
%3 = load i64, ptr @range_check, align 8, !tbaa !6
%4 = load ptr, ptr @current_language, align 8, !tbaa !10
%5 = load i64, ptr %4, align 8, !tbaa !12
%6 = icmp eq i64 %3, %5
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @printf_unfiltered(ptr noundef nonnull @.str) #2
br label %9
9: ; preds = %7, %2
ret void
}
declare i32 @printf_unfiltered(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_2__", !7, i64 0}
|
freebsd_contrib_gdb_gdb_extr_language.c_show_range_command
|
; ModuleID = 'AnghaBench/linux/fs/ceph/extr_caps.c_ceph_unreserve_caps.c'
source_filename = "AnghaBench/linux/fs/ceph/extr_caps.c_ceph_unreserve_caps.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ceph_cap_reservation = type { i32, i64 }
%struct.ceph_mds_client = type { i64, i64, i32 }
@.str = private unnamed_addr constant [32 x i8] c"unreserve caps ctx=%p count=%d\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @ceph_unreserve_caps(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.ceph_cap_reservation, ptr %1, i64 0, i32 1
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %24, label %6
6: ; preds = %2
%7 = tail call i32 @dout(ptr noundef nonnull @.str, ptr noundef nonnull %1, i64 noundef %4) #2
%8 = getelementptr inbounds %struct.ceph_mds_client, ptr %0, i64 0, i32 2
%9 = tail call i32 @spin_lock(ptr noundef nonnull %8) #2
%10 = load i64, ptr %3, align 8, !tbaa !5
%11 = tail call i32 @__ceph_unreserve_caps(ptr noundef %0, i64 noundef %10) #2
store i64 0, ptr %3, align 8, !tbaa !5
%12 = load i64, ptr %0, align 8, !tbaa !11
%13 = icmp sgt i64 %12, 0
br i1 %13, label %14, label %22
14: ; preds = %6
%15 = getelementptr inbounds %struct.ceph_mds_client, ptr %0, i64 0, i32 1
%16 = load i64, ptr %15, align 8, !tbaa !13
%17 = icmp sgt i64 %16, %12
%18 = tail call i32 @spin_unlock(ptr noundef nonnull %8) #2
br i1 %17, label %19, label %24
19: ; preds = %14
%20 = load i32, ptr %1, align 8, !tbaa !14
%21 = tail call i32 @ceph_reclaim_caps_nr(ptr noundef nonnull %0, i32 noundef %20) #2
br label %24
22: ; preds = %6
%23 = tail call i32 @spin_unlock(ptr noundef nonnull %8) #2
br label %24
24: ; preds = %14, %19, %22, %2
ret void
}
declare i32 @dout(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @__ceph_unreserve_caps(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @ceph_reclaim_caps_nr(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"ceph_cap_reservation", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"ceph_mds_client", !10, i64 0, !10, i64 8, !7, i64 16}
!13 = !{!12, !10, i64 8}
!14 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/fs/ceph/extr_caps.c_ceph_unreserve_caps.c'
source_filename = "AnghaBench/linux/fs/ceph/extr_caps.c_ceph_unreserve_caps.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [32 x i8] c"unreserve caps ctx=%p count=%d\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @ceph_unreserve_caps(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %24, label %6
6: ; preds = %2
%7 = tail call i32 @dout(ptr noundef nonnull @.str, ptr noundef nonnull %1, i64 noundef %4) #2
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = tail call i32 @spin_lock(ptr noundef nonnull %8) #2
%10 = load i64, ptr %3, align 8, !tbaa !6
%11 = tail call i32 @__ceph_unreserve_caps(ptr noundef %0, i64 noundef %10) #2
store i64 0, ptr %3, align 8, !tbaa !6
%12 = load i64, ptr %0, align 8, !tbaa !12
%13 = icmp sgt i64 %12, 0
br i1 %13, label %14, label %22
14: ; preds = %6
%15 = getelementptr inbounds i8, ptr %0, i64 8
%16 = load i64, ptr %15, align 8, !tbaa !14
%17 = icmp sgt i64 %16, %12
%18 = tail call i32 @spin_unlock(ptr noundef nonnull %8) #2
br i1 %17, label %19, label %24
19: ; preds = %14
%20 = load i32, ptr %1, align 8, !tbaa !15
%21 = tail call i32 @ceph_reclaim_caps_nr(ptr noundef nonnull %0, i32 noundef %20) #2
br label %24
22: ; preds = %6
%23 = tail call i32 @spin_unlock(ptr noundef nonnull %8) #2
br label %24
24: ; preds = %14, %19, %22, %2
ret void
}
declare i32 @dout(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @__ceph_unreserve_caps(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @ceph_reclaim_caps_nr(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"ceph_cap_reservation", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"ceph_mds_client", !11, i64 0, !11, i64 8, !8, i64 16}
!14 = !{!13, !11, i64 8}
!15 = !{!7, !8, i64 0}
|
linux_fs_ceph_extr_caps.c_ceph_unreserve_caps
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/dccp/extr_feat.c_dccp_feat_push_confirm.c'
source_filename = "AnghaBench/fastsocket/kernel/net/dccp/extr_feat.c_dccp_feat_push_confirm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dccp_feat_entry = type { i32, i64, %struct.TYPE_3__, i32, i32, ptr, ptr }
%struct.TYPE_3__ = type { i64 }
@DCCP_RESET_CODE_TOO_BUSY = dso_local local_unnamed_addr global i32 0, align 4
@FEAT_STABLE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dccp_feat_push_confirm], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dccp_feat_push_confirm(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef readonly %3) #0 {
%5 = tail call ptr @dccp_feat_entry_new(ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = load i32, ptr @DCCP_RESET_CODE_TOO_BUSY, align 4, !tbaa !5
br label %22
9: ; preds = %4
%10 = getelementptr inbounds %struct.dccp_feat_entry, ptr %5, i64 0, i32 6
store ptr %1, ptr %10, align 8, !tbaa !9
%11 = getelementptr inbounds %struct.dccp_feat_entry, ptr %5, i64 0, i32 5
store ptr %2, ptr %11, align 8, !tbaa !14
%12 = load i32, ptr @FEAT_STABLE, align 4, !tbaa !5
%13 = getelementptr inbounds %struct.dccp_feat_entry, ptr %5, i64 0, i32 4
store i32 %12, ptr %13, align 4, !tbaa !15
store i32 1, ptr %5, align 8, !tbaa !16
%14 = icmp eq ptr %3, null
%15 = zext i1 %14 to i32
%16 = getelementptr inbounds %struct.dccp_feat_entry, ptr %5, i64 0, i32 3
store i32 %15, ptr %16, align 8, !tbaa !17
%17 = getelementptr inbounds %struct.dccp_feat_entry, ptr %5, i64 0, i32 2
store i64 0, ptr %17, align 8, !tbaa !18
br i1 %14, label %20, label %18
18: ; preds = %9
%19 = load i64, ptr %3, align 8, !tbaa !19
store i64 %19, ptr %17, align 8, !tbaa !19
br label %20
20: ; preds = %18, %9
%21 = getelementptr inbounds %struct.dccp_feat_entry, ptr %5, i64 0, i32 1
store i64 0, ptr %21, align 8, !tbaa !20
br label %22
22: ; preds = %20, %7
%23 = phi i32 [ %8, %7 ], [ 0, %20 ]
ret i32 %23
}
declare ptr @dccp_feat_entry_new(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 40}
!10 = !{!"dccp_feat_entry", !6, i64 0, !11, i64 8, !12, i64 16, !6, i64 24, !6, i64 28, !13, i64 32, !13, i64 40}
!11 = !{!"long", !7, i64 0}
!12 = !{!"TYPE_3__", !11, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!10, !13, i64 32}
!15 = !{!10, !6, i64 28}
!16 = !{!10, !6, i64 0}
!17 = !{!10, !6, i64 24}
!18 = !{!10, !11, i64 16}
!19 = !{!11, !11, i64 0}
!20 = !{!10, !11, i64 8}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/dccp/extr_feat.c_dccp_feat_push_confirm.c'
source_filename = "AnghaBench/fastsocket/kernel/net/dccp/extr_feat.c_dccp_feat_push_confirm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DCCP_RESET_CODE_TOO_BUSY = common local_unnamed_addr global i32 0, align 4
@FEAT_STABLE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dccp_feat_push_confirm], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @dccp_feat_push_confirm(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef readonly %3) #0 {
%5 = tail call ptr @dccp_feat_entry_new(ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = load i32, ptr @DCCP_RESET_CODE_TOO_BUSY, align 4, !tbaa !6
br label %22
9: ; preds = %4
%10 = getelementptr inbounds i8, ptr %5, i64 40
store ptr %1, ptr %10, align 8, !tbaa !10
%11 = getelementptr inbounds i8, ptr %5, i64 32
store ptr %2, ptr %11, align 8, !tbaa !15
%12 = load i32, ptr @FEAT_STABLE, align 4, !tbaa !6
%13 = getelementptr inbounds i8, ptr %5, i64 28
store i32 %12, ptr %13, align 4, !tbaa !16
store i32 1, ptr %5, align 8, !tbaa !17
%14 = icmp eq ptr %3, null
%15 = zext i1 %14 to i32
%16 = getelementptr inbounds i8, ptr %5, i64 24
store i32 %15, ptr %16, align 8, !tbaa !18
%17 = getelementptr inbounds i8, ptr %5, i64 16
store i64 0, ptr %17, align 8, !tbaa !19
br i1 %14, label %20, label %18
18: ; preds = %9
%19 = load i64, ptr %3, align 8, !tbaa !20
store i64 %19, ptr %17, align 8, !tbaa !20
br label %20
20: ; preds = %18, %9
%21 = getelementptr inbounds i8, ptr %5, i64 8
store i64 0, ptr %21, align 8, !tbaa !21
br label %22
22: ; preds = %20, %7
%23 = phi i32 [ %8, %7 ], [ 0, %20 ]
ret i32 %23
}
declare ptr @dccp_feat_entry_new(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !14, i64 40}
!11 = !{!"dccp_feat_entry", !7, i64 0, !12, i64 8, !13, i64 16, !7, i64 24, !7, i64 28, !14, i64 32, !14, i64 40}
!12 = !{!"long", !8, i64 0}
!13 = !{!"TYPE_3__", !12, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!11, !14, i64 32}
!16 = !{!11, !7, i64 28}
!17 = !{!11, !7, i64 0}
!18 = !{!11, !7, i64 24}
!19 = !{!11, !12, i64 16}
!20 = !{!12, !12, i64 0}
!21 = !{!11, !12, i64 8}
|
fastsocket_kernel_net_dccp_extr_feat.c_dccp_feat_push_confirm
|
; ModuleID = 'AnghaBench/vlc/src/text/extr_strings.c_vlc_strftime.c'
source_filename = "AnghaBench/vlc/src/text/extr_strings.c_vlc_strftime.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.tm = type { i32 }
@.str = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
; Function Attrs: nounwind uwtable
define dso_local noundef ptr @vlc_strftime(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca i32, align 4
%3 = alloca %struct.tm, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #6
%4 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str) #6
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call dereferenceable_or_null(1) ptr @strdup(ptr noundef nonnull @.str)
br label %31
8: ; preds = %1
%9 = call i32 @time(ptr noundef nonnull %2) #6
%10 = call i32 @localtime_r(ptr noundef nonnull %2, ptr noundef nonnull %3) #6
%11 = call i32 @strlen(ptr noundef %0) #6
%12 = add nsw i32 %11, 32
%13 = sext i32 %12 to i64
%14 = call ptr @malloc(i64 noundef %13)
%15 = icmp eq ptr %14, null
br i1 %15, label %31, label %16
16: ; preds = %8, %26
%17 = phi ptr [ %29, %26 ], [ %14, %8 ]
%18 = phi i64 [ %28, %26 ], [ %13, %8 ]
%19 = call i64 @strftime(ptr noundef nonnull %17, i64 noundef %18, ptr noundef %0, ptr noundef nonnull %3) #6
%20 = icmp eq i64 %19, 0
br i1 %20, label %26, label %21
21: ; preds = %16
%22 = add i64 %19, 1
%23 = call ptr @realloc(ptr noundef nonnull %17, i64 noundef %22)
%24 = icmp eq ptr %23, null
%25 = select i1 %24, ptr %17, ptr %23
br label %31
26: ; preds = %16
%27 = call i32 @free(ptr noundef nonnull %17) #6
%28 = add i64 %18, 32
%29 = call ptr @malloc(i64 noundef %28)
%30 = icmp eq ptr %29, null
br i1 %30, label %31, label %16
31: ; preds = %26, %8, %21, %6
%32 = phi ptr [ %7, %6 ], [ %25, %21 ], [ null, %8 ], [ null, %26 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #6
ret ptr %32
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias ptr @strdup(ptr nocapture noundef readonly) local_unnamed_addr #3
declare i32 @time(ptr noundef) local_unnamed_addr #2
declare i32 @localtime_r(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strlen(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #4
declare i64 @strftime(ptr noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nounwind willreturn allockind("realloc") allocsize(1) memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias noundef ptr @realloc(ptr allocptr nocapture noundef, i64 noundef) local_unnamed_addr #5
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @free(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind willreturn allockind("realloc") allocsize(1) memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/vlc/src/text/extr_strings.c_vlc_strftime.c'
source_filename = "AnghaBench/vlc/src/text/extr_strings.c_vlc_strftime.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.tm = type { i32 }
@.str = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @vlc_strftime(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca i32, align 4
%3 = alloca %struct.tm, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #6
%4 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str) #6
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call dereferenceable_or_null(1) ptr @strdup(ptr noundef nonnull @.str)
br label %31
8: ; preds = %1
%9 = call i32 @time(ptr noundef nonnull %2) #6
%10 = call i32 @localtime_r(ptr noundef nonnull %2, ptr noundef nonnull %3) #6
%11 = call i32 @strlen(ptr noundef %0) #6
%12 = add nsw i32 %11, 32
%13 = sext i32 %12 to i64
%14 = call ptr @malloc(i64 noundef %13)
%15 = icmp eq ptr %14, null
br i1 %15, label %31, label %16
16: ; preds = %8, %26
%17 = phi ptr [ %29, %26 ], [ %14, %8 ]
%18 = phi i64 [ %28, %26 ], [ %13, %8 ]
%19 = call i64 @strftime(ptr noundef nonnull %17, i64 noundef %18, ptr noundef %0, ptr noundef nonnull %3) #6
%20 = icmp eq i64 %19, 0
br i1 %20, label %26, label %21
21: ; preds = %16
%22 = add i64 %19, 1
%23 = call ptr @realloc(ptr noundef nonnull %17, i64 noundef %22)
%24 = icmp eq ptr %23, null
%25 = select i1 %24, ptr %17, ptr %23
br label %31
26: ; preds = %16
%27 = call i32 @free(ptr noundef nonnull %17) #6
%28 = add i64 %18, 32
%29 = call ptr @malloc(i64 noundef %28)
%30 = icmp eq ptr %29, null
br i1 %30, label %31, label %16
31: ; preds = %26, %8, %21, %6
%32 = phi ptr [ %7, %6 ], [ %25, %21 ], [ null, %8 ], [ null, %26 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #6
ret ptr %32
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias ptr @strdup(ptr nocapture noundef readonly) local_unnamed_addr #3
declare i32 @time(ptr noundef) local_unnamed_addr #2
declare i32 @localtime_r(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strlen(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #4
declare i64 @strftime(ptr noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nounwind willreturn allockind("realloc") allocsize(1) memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias noundef ptr @realloc(ptr allocptr nocapture noundef, i64 noundef) local_unnamed_addr #5
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @free(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #5 = { mustprogress nounwind willreturn allockind("realloc") allocsize(1) memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #6 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
vlc_src_text_extr_strings.c_vlc_strftime
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/ti/extr_cpsw.c_cpsw_ndo_open.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/ti/extr_cpsw.c_cpsw_ndo_open.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ethtool_coalesce = type { i64 }
%struct.cpsw_priv = type { i32, i32, i64, ptr, i32, i32, i32, i32, ptr, i32, i32, ptr, %struct.TYPE_3__, i32, i32, i32, i32, ptr }
%struct.TYPE_3__ = type { i32, i32 }
%struct.cpsw_common = type { i32, i32, i64, ptr, i32, i32, i32, i32, ptr, i32, i32, ptr, %struct.TYPE_3__, i32, i32, i32, i32, ptr }
%struct.TYPE_4__ = type { i32, i32, i32 }
@.str = private unnamed_addr constant [37 x i8] c"cannot set real number of tx queues\0A\00", align 1
@.str.1 = private unnamed_addr constant [37 x i8] c"cannot set real number of rx queues\0A\00", align 1
@.str.2 = private unnamed_addr constant [38 x i8] c"initializing cpsw version %d.%d (%d)\0A\00", align 1
@cpsw_slave_open = dso_local local_unnamed_addr global i32 0, align 4
@ALE_ALL_PORTS = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [31 x i8] c"error registering cpts device\0A\00", align 1
@cpsw_slave_stop = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cpsw_ndo_open], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @cpsw_ndo_open(ptr noundef %0) #0 {
%2 = alloca %struct.ethtool_coalesce, align 8
%3 = tail call ptr @netdev_priv(ptr noundef %0) #3
%4 = getelementptr inbounds %struct.cpsw_priv, ptr %3, i64 0, i32 17
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 4
%7 = load i32, ptr %6, align 8, !tbaa !13
%8 = tail call i32 @pm_runtime_get_sync(i32 noundef %7) #3
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i32, ptr %6, align 8, !tbaa !13
%12 = tail call i32 @pm_runtime_put_noidle(i32 noundef %11) #3
br label %139
13: ; preds = %1
%14 = tail call i32 @netif_carrier_off(ptr noundef %0) #3
%15 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 16
%16 = load i32, ptr %15, align 4, !tbaa !15
%17 = tail call i32 @netif_set_real_num_tx_queues(ptr noundef %0, i32 noundef %16) #3
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %115
19: ; preds = %13
%20 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 15
%21 = load i32, ptr %20, align 8, !tbaa !16
%22 = tail call i32 @netif_set_real_num_rx_queues(ptr noundef %0, i32 noundef %21) #3
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %115
24: ; preds = %19
%25 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 14
%26 = load i32, ptr %25, align 4, !tbaa !17
%27 = getelementptr inbounds %struct.cpsw_priv, ptr %3, i64 0, i32 4
%28 = load i32, ptr %27, align 8, !tbaa !18
%29 = tail call i32 @CPSW_MAJOR_VERSION(i32 noundef %26) #3
%30 = tail call i32 @CPSW_MINOR_VERSION(i32 noundef %26) #3
%31 = tail call i32 @CPSW_RTL_VERSION(i32 noundef %26) #3
%32 = tail call i32 @dev_info(i32 noundef %28, ptr noundef nonnull @.str.2, i32 noundef %29, i32 noundef %30, i32 noundef %31) #3
%33 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 6
%34 = load i32, ptr %33, align 8, !tbaa !19
%35 = icmp eq i32 %34, 0
br i1 %35, label %36, label %38
36: ; preds = %24
%37 = tail call i32 @cpsw_init_host_port(ptr noundef nonnull %3) #3
br label %38
38: ; preds = %36, %24
%39 = load i32, ptr @cpsw_slave_open, align 4, !tbaa !20
%40 = tail call i32 @for_each_slave(ptr noundef nonnull %3, i32 noundef %39, ptr noundef nonnull %3) #3
%41 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 12, i32 1
%42 = load i32, ptr %41, align 4, !tbaa !21
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %46
44: ; preds = %38
%45 = tail call i32 @cpsw_add_default_vlan(ptr noundef nonnull %3) #3
br label %53
46: ; preds = %38
%47 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 12
%48 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 13
%49 = load i32, ptr %48, align 8, !tbaa !22
%50 = load i32, ptr %47, align 8, !tbaa !23
%51 = load i32, ptr @ALE_ALL_PORTS, align 4, !tbaa !20
%52 = tail call i32 @cpsw_ale_add_vlan(i32 noundef %49, i32 noundef %50, i32 noundef %51, i32 noundef %51, i32 noundef 0, i32 noundef 0) #3
br label %53
53: ; preds = %46, %44
%54 = load i32, ptr %33, align 8, !tbaa !19
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %101
56: ; preds = %53
%57 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 11
%58 = load ptr, ptr %57, align 8, !tbaa !24
%59 = getelementptr inbounds %struct.TYPE_4__, ptr %58, i64 0, i32 2
%60 = tail call i32 @writel_relaxed(i32 noundef 0, ptr noundef nonnull %59) #3
%61 = load ptr, ptr %57, align 8, !tbaa !24
%62 = getelementptr inbounds %struct.TYPE_4__, ptr %61, i64 0, i32 1
%63 = tail call i32 @writel_relaxed(i32 noundef 7, ptr noundef nonnull %62) #3
%64 = load ptr, ptr %57, align 8, !tbaa !24
%65 = tail call i32 @writel(i32 noundef 7, ptr noundef %64) #3
%66 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 10
%67 = tail call i32 @napi_enable(ptr noundef nonnull %66) #3
%68 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 9
%69 = tail call i32 @napi_enable(ptr noundef nonnull %68) #3
%70 = load i32, ptr %5, align 8, !tbaa !25
%71 = icmp eq i32 %70, 0
br i1 %71, label %78, label %72
72: ; preds = %56
store i32 0, ptr %5, align 8, !tbaa !25
%73 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 8
%74 = load ptr, ptr %73, align 8, !tbaa !26
%75 = getelementptr inbounds i32, ptr %74, i64 1
%76 = load i32, ptr %75, align 4, !tbaa !20
%77 = tail call i32 @enable_irq(i32 noundef %76) #3
br label %78
78: ; preds = %72, %56
%79 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 1
%80 = load i32, ptr %79, align 4, !tbaa !27
%81 = icmp eq i32 %80, 0
br i1 %81, label %87, label %82
82: ; preds = %78
store i32 0, ptr %79, align 4, !tbaa !27
%83 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 8
%84 = load ptr, ptr %83, align 8, !tbaa !26
%85 = load i32, ptr %84, align 4, !tbaa !20
%86 = tail call i32 @enable_irq(i32 noundef %85) #3
br label %87
87: ; preds = %82, %78
%88 = tail call i32 @cpsw_create_xdp_rxqs(ptr noundef nonnull %5) #3
%89 = icmp slt i32 %88, 0
br i1 %89, label %121, label %90
90: ; preds = %87
%91 = tail call i32 @cpsw_fill_rx_channels(ptr noundef nonnull %3) #3
%92 = icmp slt i32 %91, 0
br i1 %92, label %121, label %93
93: ; preds = %90
%94 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 7
%95 = load i32, ptr %94, align 4, !tbaa !28
%96 = tail call i64 @cpts_register(i32 noundef %95) #3
%97 = icmp eq i64 %96, 0
br i1 %97, label %101, label %98
98: ; preds = %93
%99 = load i32, ptr %27, align 8, !tbaa !18
%100 = tail call i32 @dev_err(i32 noundef %99, ptr noundef nonnull @.str.3) #3
br label %101
101: ; preds = %93, %98, %53
%102 = tail call i32 @cpsw_restore(ptr noundef nonnull %3) #3
%103 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 2
%104 = load i64, ptr %103, align 8, !tbaa !29
%105 = icmp eq i64 %104, 0
br i1 %105, label %108, label %106
106: ; preds = %101
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
store i64 %104, ptr %2, align 8, !tbaa !30
%107 = call i32 @cpsw_set_coalesce(ptr noundef %0, ptr noundef nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
br label %108
108: ; preds = %106, %101
%109 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 5
%110 = load i32, ptr %109, align 4, !tbaa !32
%111 = call i32 @cpdma_ctlr_start(i32 noundef %110) #3
%112 = call i32 @cpsw_intr_enable(ptr noundef nonnull %5) #3
%113 = load i32, ptr %33, align 8, !tbaa !19
%114 = add nsw i32 %113, 1
store i32 %114, ptr %33, align 8, !tbaa !19
br label %139
115: ; preds = %19, %13
%116 = phi ptr [ @.str, %13 ], [ @.str.1, %19 ]
%117 = phi i32 [ %17, %13 ], [ %22, %19 ]
%118 = getelementptr inbounds %struct.cpsw_priv, ptr %3, i64 0, i32 4
%119 = load i32, ptr %118, align 8, !tbaa !18
%120 = tail call i32 @dev_err(i32 noundef %119, ptr noundef nonnull %116) #3
br label %121
121: ; preds = %115, %90, %87
%122 = phi i32 [ %88, %87 ], [ %91, %90 ], [ %117, %115 ]
%123 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 6
%124 = load i32, ptr %123, align 8, !tbaa !19
%125 = icmp eq i32 %124, 0
br i1 %125, label %126, label %131
126: ; preds = %121
%127 = getelementptr inbounds %struct.cpsw_common, ptr %5, i64 0, i32 5
%128 = load i32, ptr %127, align 4, !tbaa !32
%129 = tail call i32 @cpdma_ctlr_stop(i32 noundef %128) #3
%130 = tail call i32 @cpsw_destroy_xdp_rxqs(ptr noundef nonnull %5) #3
br label %131
131: ; preds = %126, %121
%132 = load i32, ptr @cpsw_slave_stop, align 4, !tbaa !20
%133 = tail call i32 @for_each_slave(ptr noundef nonnull %3, i32 noundef %132, ptr noundef nonnull %5) #3
%134 = load i32, ptr %6, align 8, !tbaa !13
%135 = tail call i32 @pm_runtime_put_sync(i32 noundef %134) #3
%136 = getelementptr inbounds %struct.cpsw_priv, ptr %3, i64 0, i32 3
%137 = load ptr, ptr %136, align 8, !tbaa !33
%138 = tail call i32 @netif_carrier_off(ptr noundef %137) #3
br label %139
139: ; preds = %131, %108, %10
%140 = phi i32 [ %8, %10 ], [ %122, %131 ], [ 0, %108 ]
ret i32 %140
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #2
declare i32 @pm_runtime_get_sync(i32 noundef) local_unnamed_addr #2
declare i32 @pm_runtime_put_noidle(i32 noundef) local_unnamed_addr #2
declare i32 @netif_carrier_off(ptr noundef) local_unnamed_addr #2
declare i32 @netif_set_real_num_tx_queues(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @netif_set_real_num_rx_queues(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_info(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @CPSW_MAJOR_VERSION(i32 noundef) local_unnamed_addr #2
declare i32 @CPSW_MINOR_VERSION(i32 noundef) local_unnamed_addr #2
declare i32 @CPSW_RTL_VERSION(i32 noundef) local_unnamed_addr #2
declare i32 @cpsw_init_host_port(ptr noundef) local_unnamed_addr #2
declare i32 @for_each_slave(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cpsw_add_default_vlan(ptr noundef) local_unnamed_addr #2
declare i32 @cpsw_ale_add_vlan(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @writel_relaxed(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @writel(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @napi_enable(ptr noundef) local_unnamed_addr #2
declare i32 @enable_irq(i32 noundef) local_unnamed_addr #2
declare i32 @cpsw_create_xdp_rxqs(ptr noundef) local_unnamed_addr #2
declare i32 @cpsw_fill_rx_channels(ptr noundef) local_unnamed_addr #2
declare i64 @cpts_register(i32 noundef) local_unnamed_addr #2
declare i32 @cpsw_restore(ptr noundef) local_unnamed_addr #2
declare i32 @cpsw_set_coalesce(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @cpdma_ctlr_start(i32 noundef) local_unnamed_addr #2
declare i32 @cpsw_intr_enable(ptr noundef) local_unnamed_addr #2
declare i32 @cpdma_ctlr_stop(i32 noundef) local_unnamed_addr #2
declare i32 @cpsw_destroy_xdp_rxqs(ptr noundef) local_unnamed_addr #2
declare i32 @pm_runtime_put_sync(i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 88}
!6 = !{!"cpsw_priv", !7, i64 0, !7, i64 4, !10, i64 8, !11, i64 16, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !11, i64 40, !7, i64 48, !7, i64 52, !11, i64 56, !12, i64 64, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !11, i64 88}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"TYPE_3__", !7, i64 0, !7, i64 4}
!13 = !{!14, !7, i64 24}
!14 = !{!"cpsw_common", !7, i64 0, !7, i64 4, !10, i64 8, !11, i64 16, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !11, i64 40, !7, i64 48, !7, i64 52, !11, i64 56, !12, i64 64, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !11, i64 88}
!15 = !{!14, !7, i64 84}
!16 = !{!14, !7, i64 80}
!17 = !{!14, !7, i64 76}
!18 = !{!6, !7, i64 24}
!19 = !{!14, !7, i64 32}
!20 = !{!7, !7, i64 0}
!21 = !{!14, !7, i64 68}
!22 = !{!14, !7, i64 72}
!23 = !{!14, !7, i64 64}
!24 = !{!14, !11, i64 56}
!25 = !{!14, !7, i64 0}
!26 = !{!14, !11, i64 40}
!27 = !{!14, !7, i64 4}
!28 = !{!14, !7, i64 36}
!29 = !{!14, !10, i64 8}
!30 = !{!31, !10, i64 0}
!31 = !{!"ethtool_coalesce", !10, i64 0}
!32 = !{!14, !7, i64 28}
!33 = !{!6, !11, i64 16}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/ti/extr_cpsw.c_cpsw_ndo_open.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/ti/extr_cpsw.c_cpsw_ndo_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.ethtool_coalesce = type { i64 }
@.str = private unnamed_addr constant [37 x i8] c"cannot set real number of tx queues\0A\00", align 1
@.str.1 = private unnamed_addr constant [37 x i8] c"cannot set real number of rx queues\0A\00", align 1
@.str.2 = private unnamed_addr constant [38 x i8] c"initializing cpsw version %d.%d (%d)\0A\00", align 1
@cpsw_slave_open = common local_unnamed_addr global i32 0, align 4
@ALE_ALL_PORTS = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [31 x i8] c"error registering cpts device\0A\00", align 1
@cpsw_slave_stop = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cpsw_ndo_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @cpsw_ndo_open(ptr noundef %0) #0 {
%2 = alloca %struct.ethtool_coalesce, align 8
%3 = tail call ptr @netdev_priv(ptr noundef %0) #3
%4 = getelementptr inbounds i8, ptr %3, i64 88
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %5, i64 24
%7 = load i32, ptr %6, align 8, !tbaa !14
%8 = tail call i32 @pm_runtime_get_sync(i32 noundef %7) #3
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i32, ptr %6, align 8, !tbaa !14
%12 = tail call i32 @pm_runtime_put_noidle(i32 noundef %11) #3
br label %139
13: ; preds = %1
%14 = tail call i32 @netif_carrier_off(ptr noundef %0) #3
%15 = getelementptr inbounds i8, ptr %5, i64 84
%16 = load i32, ptr %15, align 4, !tbaa !16
%17 = tail call i32 @netif_set_real_num_tx_queues(ptr noundef %0, i32 noundef %16) #3
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %115
19: ; preds = %13
%20 = getelementptr inbounds i8, ptr %5, i64 80
%21 = load i32, ptr %20, align 8, !tbaa !17
%22 = tail call i32 @netif_set_real_num_rx_queues(ptr noundef %0, i32 noundef %21) #3
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %115
24: ; preds = %19
%25 = getelementptr inbounds i8, ptr %5, i64 76
%26 = load i32, ptr %25, align 4, !tbaa !18
%27 = getelementptr inbounds i8, ptr %3, i64 24
%28 = load i32, ptr %27, align 8, !tbaa !19
%29 = tail call i32 @CPSW_MAJOR_VERSION(i32 noundef %26) #3
%30 = tail call i32 @CPSW_MINOR_VERSION(i32 noundef %26) #3
%31 = tail call i32 @CPSW_RTL_VERSION(i32 noundef %26) #3
%32 = tail call i32 @dev_info(i32 noundef %28, ptr noundef nonnull @.str.2, i32 noundef %29, i32 noundef %30, i32 noundef %31) #3
%33 = getelementptr inbounds i8, ptr %5, i64 32
%34 = load i32, ptr %33, align 8, !tbaa !20
%35 = icmp eq i32 %34, 0
br i1 %35, label %36, label %38
36: ; preds = %24
%37 = tail call i32 @cpsw_init_host_port(ptr noundef nonnull %3) #3
br label %38
38: ; preds = %36, %24
%39 = load i32, ptr @cpsw_slave_open, align 4, !tbaa !21
%40 = tail call i32 @for_each_slave(ptr noundef nonnull %3, i32 noundef %39, ptr noundef nonnull %3) #3
%41 = getelementptr inbounds i8, ptr %5, i64 68
%42 = load i32, ptr %41, align 4, !tbaa !22
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %46
44: ; preds = %38
%45 = tail call i32 @cpsw_add_default_vlan(ptr noundef nonnull %3) #3
br label %53
46: ; preds = %38
%47 = getelementptr inbounds i8, ptr %5, i64 64
%48 = getelementptr inbounds i8, ptr %5, i64 72
%49 = load i32, ptr %48, align 8, !tbaa !23
%50 = load i32, ptr %47, align 8, !tbaa !24
%51 = load i32, ptr @ALE_ALL_PORTS, align 4, !tbaa !21
%52 = tail call i32 @cpsw_ale_add_vlan(i32 noundef %49, i32 noundef %50, i32 noundef %51, i32 noundef %51, i32 noundef 0, i32 noundef 0) #3
br label %53
53: ; preds = %46, %44
%54 = load i32, ptr %33, align 8, !tbaa !20
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %101
56: ; preds = %53
%57 = getelementptr inbounds i8, ptr %5, i64 56
%58 = load ptr, ptr %57, align 8, !tbaa !25
%59 = getelementptr inbounds i8, ptr %58, i64 8
%60 = tail call i32 @writel_relaxed(i32 noundef 0, ptr noundef nonnull %59) #3
%61 = load ptr, ptr %57, align 8, !tbaa !25
%62 = getelementptr inbounds i8, ptr %61, i64 4
%63 = tail call i32 @writel_relaxed(i32 noundef 7, ptr noundef nonnull %62) #3
%64 = load ptr, ptr %57, align 8, !tbaa !25
%65 = tail call i32 @writel(i32 noundef 7, ptr noundef %64) #3
%66 = getelementptr inbounds i8, ptr %5, i64 52
%67 = tail call i32 @napi_enable(ptr noundef nonnull %66) #3
%68 = getelementptr inbounds i8, ptr %5, i64 48
%69 = tail call i32 @napi_enable(ptr noundef nonnull %68) #3
%70 = load i32, ptr %5, align 8, !tbaa !26
%71 = icmp eq i32 %70, 0
br i1 %71, label %78, label %72
72: ; preds = %56
store i32 0, ptr %5, align 8, !tbaa !26
%73 = getelementptr inbounds i8, ptr %5, i64 40
%74 = load ptr, ptr %73, align 8, !tbaa !27
%75 = getelementptr inbounds i8, ptr %74, i64 4
%76 = load i32, ptr %75, align 4, !tbaa !21
%77 = tail call i32 @enable_irq(i32 noundef %76) #3
br label %78
78: ; preds = %72, %56
%79 = getelementptr inbounds i8, ptr %5, i64 4
%80 = load i32, ptr %79, align 4, !tbaa !28
%81 = icmp eq i32 %80, 0
br i1 %81, label %87, label %82
82: ; preds = %78
store i32 0, ptr %79, align 4, !tbaa !28
%83 = getelementptr inbounds i8, ptr %5, i64 40
%84 = load ptr, ptr %83, align 8, !tbaa !27
%85 = load i32, ptr %84, align 4, !tbaa !21
%86 = tail call i32 @enable_irq(i32 noundef %85) #3
br label %87
87: ; preds = %82, %78
%88 = tail call i32 @cpsw_create_xdp_rxqs(ptr noundef nonnull %5) #3
%89 = icmp slt i32 %88, 0
br i1 %89, label %121, label %90
90: ; preds = %87
%91 = tail call i32 @cpsw_fill_rx_channels(ptr noundef nonnull %3) #3
%92 = icmp slt i32 %91, 0
br i1 %92, label %121, label %93
93: ; preds = %90
%94 = getelementptr inbounds i8, ptr %5, i64 36
%95 = load i32, ptr %94, align 4, !tbaa !29
%96 = tail call i64 @cpts_register(i32 noundef %95) #3
%97 = icmp eq i64 %96, 0
br i1 %97, label %101, label %98
98: ; preds = %93
%99 = load i32, ptr %27, align 8, !tbaa !19
%100 = tail call i32 @dev_err(i32 noundef %99, ptr noundef nonnull @.str.3) #3
br label %101
101: ; preds = %93, %98, %53
%102 = tail call i32 @cpsw_restore(ptr noundef nonnull %3) #3
%103 = getelementptr inbounds i8, ptr %5, i64 8
%104 = load i64, ptr %103, align 8, !tbaa !30
%105 = icmp eq i64 %104, 0
br i1 %105, label %108, label %106
106: ; preds = %101
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
store i64 %104, ptr %2, align 8, !tbaa !31
%107 = call i32 @cpsw_set_coalesce(ptr noundef %0, ptr noundef nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
br label %108
108: ; preds = %106, %101
%109 = getelementptr inbounds i8, ptr %5, i64 28
%110 = load i32, ptr %109, align 4, !tbaa !33
%111 = call i32 @cpdma_ctlr_start(i32 noundef %110) #3
%112 = call i32 @cpsw_intr_enable(ptr noundef nonnull %5) #3
%113 = load i32, ptr %33, align 8, !tbaa !20
%114 = add nsw i32 %113, 1
store i32 %114, ptr %33, align 8, !tbaa !20
br label %139
115: ; preds = %19, %13
%116 = phi ptr [ @.str, %13 ], [ @.str.1, %19 ]
%117 = phi i32 [ %17, %13 ], [ %22, %19 ]
%118 = getelementptr inbounds i8, ptr %3, i64 24
%119 = load i32, ptr %118, align 8, !tbaa !19
%120 = tail call i32 @dev_err(i32 noundef %119, ptr noundef nonnull %116) #3
br label %121
121: ; preds = %115, %90, %87
%122 = phi i32 [ %88, %87 ], [ %91, %90 ], [ %117, %115 ]
%123 = getelementptr inbounds i8, ptr %5, i64 32
%124 = load i32, ptr %123, align 8, !tbaa !20
%125 = icmp eq i32 %124, 0
br i1 %125, label %126, label %131
126: ; preds = %121
%127 = getelementptr inbounds i8, ptr %5, i64 28
%128 = load i32, ptr %127, align 4, !tbaa !33
%129 = tail call i32 @cpdma_ctlr_stop(i32 noundef %128) #3
%130 = tail call i32 @cpsw_destroy_xdp_rxqs(ptr noundef nonnull %5) #3
br label %131
131: ; preds = %126, %121
%132 = load i32, ptr @cpsw_slave_stop, align 4, !tbaa !21
%133 = tail call i32 @for_each_slave(ptr noundef nonnull %3, i32 noundef %132, ptr noundef nonnull %5) #3
%134 = load i32, ptr %6, align 8, !tbaa !14
%135 = tail call i32 @pm_runtime_put_sync(i32 noundef %134) #3
%136 = getelementptr inbounds i8, ptr %3, i64 16
%137 = load ptr, ptr %136, align 8, !tbaa !34
%138 = tail call i32 @netif_carrier_off(ptr noundef %137) #3
br label %139
139: ; preds = %131, %108, %10
%140 = phi i32 [ %8, %10 ], [ %122, %131 ], [ 0, %108 ]
ret i32 %140
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #2
declare i32 @pm_runtime_get_sync(i32 noundef) local_unnamed_addr #2
declare i32 @pm_runtime_put_noidle(i32 noundef) local_unnamed_addr #2
declare i32 @netif_carrier_off(ptr noundef) local_unnamed_addr #2
declare i32 @netif_set_real_num_tx_queues(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @netif_set_real_num_rx_queues(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_info(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @CPSW_MAJOR_VERSION(i32 noundef) local_unnamed_addr #2
declare i32 @CPSW_MINOR_VERSION(i32 noundef) local_unnamed_addr #2
declare i32 @CPSW_RTL_VERSION(i32 noundef) local_unnamed_addr #2
declare i32 @cpsw_init_host_port(ptr noundef) local_unnamed_addr #2
declare i32 @for_each_slave(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cpsw_add_default_vlan(ptr noundef) local_unnamed_addr #2
declare i32 @cpsw_ale_add_vlan(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @writel_relaxed(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @writel(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @napi_enable(ptr noundef) local_unnamed_addr #2
declare i32 @enable_irq(i32 noundef) local_unnamed_addr #2
declare i32 @cpsw_create_xdp_rxqs(ptr noundef) local_unnamed_addr #2
declare i32 @cpsw_fill_rx_channels(ptr noundef) local_unnamed_addr #2
declare i64 @cpts_register(i32 noundef) local_unnamed_addr #2
declare i32 @cpsw_restore(ptr noundef) local_unnamed_addr #2
declare i32 @cpsw_set_coalesce(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @cpdma_ctlr_start(i32 noundef) local_unnamed_addr #2
declare i32 @cpsw_intr_enable(ptr noundef) local_unnamed_addr #2
declare i32 @cpdma_ctlr_stop(i32 noundef) local_unnamed_addr #2
declare i32 @cpsw_destroy_xdp_rxqs(ptr noundef) local_unnamed_addr #2
declare i32 @pm_runtime_put_sync(i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 88}
!7 = !{!"cpsw_priv", !8, i64 0, !8, i64 4, !11, i64 8, !12, i64 16, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36, !12, i64 40, !8, i64 48, !8, i64 52, !12, i64 56, !13, i64 64, !8, i64 72, !8, i64 76, !8, i64 80, !8, i64 84, !12, i64 88}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"TYPE_3__", !8, i64 0, !8, i64 4}
!14 = !{!15, !8, i64 24}
!15 = !{!"cpsw_common", !8, i64 0, !8, i64 4, !11, i64 8, !12, i64 16, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36, !12, i64 40, !8, i64 48, !8, i64 52, !12, i64 56, !13, i64 64, !8, i64 72, !8, i64 76, !8, i64 80, !8, i64 84, !12, i64 88}
!16 = !{!15, !8, i64 84}
!17 = !{!15, !8, i64 80}
!18 = !{!15, !8, i64 76}
!19 = !{!7, !8, i64 24}
!20 = !{!15, !8, i64 32}
!21 = !{!8, !8, i64 0}
!22 = !{!15, !8, i64 68}
!23 = !{!15, !8, i64 72}
!24 = !{!15, !8, i64 64}
!25 = !{!15, !12, i64 56}
!26 = !{!15, !8, i64 0}
!27 = !{!15, !12, i64 40}
!28 = !{!15, !8, i64 4}
!29 = !{!15, !8, i64 36}
!30 = !{!15, !11, i64 8}
!31 = !{!32, !11, i64 0}
!32 = !{!"ethtool_coalesce", !11, i64 0}
!33 = !{!15, !8, i64 28}
!34 = !{!7, !12, i64 16}
|
linux_drivers_net_ethernet_ti_extr_cpsw.c_cpsw_ndo_open
|
; ModuleID = 'AnghaBench/linux/sound/pci/hda/extr_patch_realtek.c_alc269_fixup_hp_gpio_mic1_led.c'
source_filename = "AnghaBench/linux/sound/pci/hda/extr_patch_realtek.c_alc269_fixup_hp_gpio_mic1_led.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hda_codec = type { i32, ptr }
%struct.alc_spec = type { i32, i32, i32 }
@HDA_FIXUP_ACT_PRE_PROBE = dso_local local_unnamed_addr global i32 0, align 4
@alc_cap_micmute_update = dso_local local_unnamed_addr global i32 0, align 4
@led_power_filter = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @alc269_fixup_hp_gpio_mic1_led], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @alc269_fixup_hp_gpio_mic1_led(ptr noundef %0, ptr nocapture readnone %1, i32 noundef %2) #0 {
%4 = getelementptr inbounds %struct.hda_codec, ptr %0, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = tail call i32 @alc_fixup_hp_gpio_led(ptr noundef %0, i32 noundef %2, i32 noundef 8, i32 noundef 0) #2
%7 = load i32, ptr @HDA_FIXUP_ACT_PRE_PROBE, align 4, !tbaa !11
%8 = icmp eq i32 %7, %2
br i1 %8, label %9, label %16
9: ; preds = %3
%10 = load <2 x i32>, ptr %5, align 4, !tbaa !11
%11 = or <2 x i32> %10, <i32 16, i32 16>
store <2 x i32> %11, ptr %5, align 4, !tbaa !11
%12 = getelementptr inbounds %struct.alc_spec, ptr %5, i64 0, i32 2
store i32 24, ptr %12, align 4, !tbaa !12
%13 = load i32, ptr @alc_cap_micmute_update, align 4, !tbaa !11
%14 = tail call i32 @snd_hda_gen_add_micmute_led(ptr noundef nonnull %0, i32 noundef %13) #2
%15 = load i32, ptr @led_power_filter, align 4, !tbaa !11
store i32 %15, ptr %0, align 8, !tbaa !14
br label %16
16: ; preds = %9, %3
ret void
}
declare i32 @alc_fixup_hp_gpio_led(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_hda_gen_add_micmute_led(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"hda_codec", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !7, i64 8}
!13 = !{!"alc_spec", !7, i64 0, !7, i64 4, !7, i64 8}
!14 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/sound/pci/hda/extr_patch_realtek.c_alc269_fixup_hp_gpio_mic1_led.c'
source_filename = "AnghaBench/linux/sound/pci/hda/extr_patch_realtek.c_alc269_fixup_hp_gpio_mic1_led.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HDA_FIXUP_ACT_PRE_PROBE = common local_unnamed_addr global i32 0, align 4
@alc_cap_micmute_update = common local_unnamed_addr global i32 0, align 4
@led_power_filter = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @alc269_fixup_hp_gpio_mic1_led], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @alc269_fixup_hp_gpio_mic1_led(ptr noundef %0, ptr nocapture readnone %1, i32 noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = tail call i32 @alc_fixup_hp_gpio_led(ptr noundef %0, i32 noundef %2, i32 noundef 8, i32 noundef 0) #2
%7 = load i32, ptr @HDA_FIXUP_ACT_PRE_PROBE, align 4, !tbaa !12
%8 = icmp eq i32 %7, %2
br i1 %8, label %9, label %16
9: ; preds = %3
%10 = load <2 x i32>, ptr %5, align 4, !tbaa !12
%11 = or <2 x i32> %10, <i32 16, i32 16>
store <2 x i32> %11, ptr %5, align 4, !tbaa !12
%12 = getelementptr inbounds i8, ptr %5, i64 8
store i32 24, ptr %12, align 4, !tbaa !13
%13 = load i32, ptr @alc_cap_micmute_update, align 4, !tbaa !12
%14 = tail call i32 @snd_hda_gen_add_micmute_led(ptr noundef nonnull %0, i32 noundef %13) #2
%15 = load i32, ptr @led_power_filter, align 4, !tbaa !12
store i32 %15, ptr %0, align 8, !tbaa !15
br label %16
16: ; preds = %9, %3
ret void
}
declare i32 @alc_fixup_hp_gpio_led(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_hda_gen_add_micmute_led(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"hda_codec", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !8, i64 8}
!14 = !{!"alc_spec", !8, i64 0, !8, i64 4, !8, i64 8}
!15 = !{!7, !8, i64 0}
|
linux_sound_pci_hda_extr_patch_realtek.c_alc269_fixup_hp_gpio_mic1_led
|
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/bfd/extr_elf.c__bfd_elf_link_hash_copy_indirect.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/bfd/extr_elf.c__bfd_elf_link_hash_copy_indirect.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.elf_link_hash_entry = type { i32, i64, %struct.TYPE_9__, %struct.TYPE_7__, %struct.TYPE_6__, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_9__ = type { i64 }
%struct.TYPE_7__ = type { i64 }
%struct.TYPE_6__ = type { i64 }
%struct.elf_link_hash_table = type { i32, %struct.TYPE_10__, %struct.TYPE_8__ }
%struct.TYPE_10__ = type { i64 }
%struct.TYPE_8__ = type { i64 }
@bfd_link_hash_indirect = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @_bfd_elf_link_hash_copy_indirect(ptr noundef %0, ptr nocapture noundef %1, ptr nocapture noundef %2) local_unnamed_addr #0 {
%4 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %2, i64 0, i32 9
%5 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %1, i64 0, i32 9
%6 = load <2 x i32>, ptr %4, align 8, !tbaa !5
%7 = load <2 x i32>, ptr %5, align 8, !tbaa !5
%8 = or <2 x i32> %7, %6
store <2 x i32> %8, ptr %5, align 8, !tbaa !5
%9 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %2, i64 0, i32 5
%10 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %1, i64 0, i32 5
%11 = load <4 x i32>, ptr %9, align 8, !tbaa !5
%12 = load <4 x i32>, ptr %10, align 8, !tbaa !5
%13 = or <4 x i32> %12, %11
store <4 x i32> %13, ptr %10, align 8, !tbaa !5
%14 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %2, i64 0, i32 4
%15 = load i64, ptr %14, align 8, !tbaa !9
%16 = load i64, ptr @bfd_link_hash_indirect, align 8, !tbaa !15
%17 = icmp eq i64 %15, %16
br i1 %17, label %18, label %68
18: ; preds = %3
%19 = tail call ptr @elf_hash_table(ptr noundef %0) #2
%20 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %2, i64 0, i32 3
%21 = load i64, ptr %20, align 8, !tbaa !16
%22 = getelementptr inbounds %struct.elf_link_hash_table, ptr %19, i64 0, i32 2
%23 = load i64, ptr %22, align 8, !tbaa !17
%24 = icmp sgt i64 %21, %23
br i1 %24, label %25, label %35
25: ; preds = %18
%26 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %1, i64 0, i32 3
%27 = load i64, ptr %26, align 8, !tbaa !16
%28 = icmp slt i64 %27, 0
br i1 %28, label %29, label %31
29: ; preds = %25
store i64 0, ptr %26, align 8, !tbaa !16
%30 = load i64, ptr %20, align 8, !tbaa !16
br label %31
31: ; preds = %29, %25
%32 = phi i64 [ 0, %29 ], [ %27, %25 ]
%33 = phi i64 [ %30, %29 ], [ %21, %25 ]
%34 = add nsw i64 %32, %33
store i64 %34, ptr %26, align 8, !tbaa !16
store i64 %23, ptr %20, align 8, !tbaa !16
br label %35
35: ; preds = %31, %18
%36 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %2, i64 0, i32 2
%37 = load i64, ptr %36, align 8, !tbaa !21
%38 = getelementptr inbounds %struct.elf_link_hash_table, ptr %19, i64 0, i32 1
%39 = load i64, ptr %38, align 8, !tbaa !22
%40 = icmp sgt i64 %37, %39
br i1 %40, label %41, label %51
41: ; preds = %35
%42 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %1, i64 0, i32 2
%43 = load i64, ptr %42, align 8, !tbaa !21
%44 = icmp slt i64 %43, 0
br i1 %44, label %45, label %47
45: ; preds = %41
store i64 0, ptr %42, align 8, !tbaa !21
%46 = load i64, ptr %36, align 8, !tbaa !21
br label %47
47: ; preds = %45, %41
%48 = phi i64 [ 0, %45 ], [ %43, %41 ]
%49 = phi i64 [ %46, %45 ], [ %37, %41 ]
%50 = add nsw i64 %48, %49
store i64 %50, ptr %42, align 8, !tbaa !21
store i64 %39, ptr %36, align 8, !tbaa !21
br label %51
51: ; preds = %47, %35
%52 = load i32, ptr %2, align 8, !tbaa !23
%53 = icmp eq i32 %52, -1
br i1 %53, label %68, label %54
54: ; preds = %51
%55 = load i32, ptr %1, align 8, !tbaa !23
%56 = icmp eq i32 %55, -1
br i1 %56, label %63, label %57
57: ; preds = %54
%58 = load i32, ptr %19, align 8, !tbaa !24
%59 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %1, i64 0, i32 1
%60 = load i64, ptr %59, align 8, !tbaa !25
%61 = tail call i32 @_bfd_elf_strtab_delref(i32 noundef %58, i64 noundef %60) #2
%62 = load i32, ptr %2, align 8, !tbaa !23
br label %63
63: ; preds = %57, %54
%64 = phi i32 [ %62, %57 ], [ %52, %54 ]
store i32 %64, ptr %1, align 8, !tbaa !23
%65 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %2, i64 0, i32 1
%66 = load i64, ptr %65, align 8, !tbaa !25
%67 = getelementptr inbounds %struct.elf_link_hash_entry, ptr %1, i64 0, i32 1
store i64 %66, ptr %67, align 8, !tbaa !25
store i32 -1, ptr %2, align 8, !tbaa !23
store i64 0, ptr %65, align 8, !tbaa !25
br label %68
68: ; preds = %51, %63, %3
ret void
}
declare ptr @elf_hash_table(ptr noundef) local_unnamed_addr #1
declare i32 @_bfd_elf_strtab_delref(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 32}
!10 = !{!"elf_link_hash_entry", !6, i64 0, !11, i64 8, !12, i64 16, !13, i64 24, !14, i64 32, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60}
!11 = !{!"long", !7, i64 0}
!12 = !{!"TYPE_9__", !11, i64 0}
!13 = !{!"TYPE_7__", !11, i64 0}
!14 = !{!"TYPE_6__", !11, i64 0}
!15 = !{!11, !11, i64 0}
!16 = !{!10, !11, i64 24}
!17 = !{!18, !11, i64 16}
!18 = !{!"elf_link_hash_table", !6, i64 0, !19, i64 8, !20, i64 16}
!19 = !{!"TYPE_10__", !11, i64 0}
!20 = !{!"TYPE_8__", !11, i64 0}
!21 = !{!10, !11, i64 16}
!22 = !{!18, !11, i64 8}
!23 = !{!10, !6, i64 0}
!24 = !{!18, !6, i64 0}
!25 = !{!10, !11, i64 8}
|
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/bfd/extr_elf.c__bfd_elf_link_hash_copy_indirect.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/bfd/extr_elf.c__bfd_elf_link_hash_copy_indirect.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@bfd_link_hash_indirect = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @_bfd_elf_link_hash_copy_indirect(ptr noundef %0, ptr nocapture noundef %1, ptr nocapture noundef %2) local_unnamed_addr #0 {
%4 = getelementptr inbounds i8, ptr %2, i64 56
%5 = getelementptr inbounds i8, ptr %1, i64 56
%6 = load <2 x i32>, ptr %4, align 8, !tbaa !6
%7 = load <2 x i32>, ptr %5, align 8, !tbaa !6
%8 = or <2 x i32> %7, %6
store <2 x i32> %8, ptr %5, align 8, !tbaa !6
%9 = getelementptr inbounds i8, ptr %2, i64 40
%10 = getelementptr inbounds i8, ptr %1, i64 40
%11 = load <4 x i32>, ptr %9, align 8, !tbaa !6
%12 = load <4 x i32>, ptr %10, align 8, !tbaa !6
%13 = or <4 x i32> %12, %11
store <4 x i32> %13, ptr %10, align 8, !tbaa !6
%14 = getelementptr inbounds i8, ptr %2, i64 32
%15 = load i64, ptr %14, align 8, !tbaa !10
%16 = load i64, ptr @bfd_link_hash_indirect, align 8, !tbaa !16
%17 = icmp eq i64 %15, %16
br i1 %17, label %18, label %68
18: ; preds = %3
%19 = tail call ptr @elf_hash_table(ptr noundef %0) #2
%20 = getelementptr inbounds i8, ptr %2, i64 24
%21 = load i64, ptr %20, align 8, !tbaa !17
%22 = getelementptr inbounds i8, ptr %19, i64 16
%23 = load i64, ptr %22, align 8, !tbaa !18
%24 = icmp sgt i64 %21, %23
br i1 %24, label %25, label %35
25: ; preds = %18
%26 = getelementptr inbounds i8, ptr %1, i64 24
%27 = load i64, ptr %26, align 8, !tbaa !17
%28 = icmp slt i64 %27, 0
br i1 %28, label %29, label %31
29: ; preds = %25
store i64 0, ptr %26, align 8, !tbaa !17
%30 = load i64, ptr %20, align 8, !tbaa !17
br label %31
31: ; preds = %29, %25
%32 = phi i64 [ 0, %29 ], [ %27, %25 ]
%33 = phi i64 [ %30, %29 ], [ %21, %25 ]
%34 = add nsw i64 %32, %33
store i64 %34, ptr %26, align 8, !tbaa !17
store i64 %23, ptr %20, align 8, !tbaa !17
br label %35
35: ; preds = %31, %18
%36 = getelementptr inbounds i8, ptr %2, i64 16
%37 = load i64, ptr %36, align 8, !tbaa !22
%38 = getelementptr inbounds i8, ptr %19, i64 8
%39 = load i64, ptr %38, align 8, !tbaa !23
%40 = icmp sgt i64 %37, %39
br i1 %40, label %41, label %51
41: ; preds = %35
%42 = getelementptr inbounds i8, ptr %1, i64 16
%43 = load i64, ptr %42, align 8, !tbaa !22
%44 = icmp slt i64 %43, 0
br i1 %44, label %45, label %47
45: ; preds = %41
store i64 0, ptr %42, align 8, !tbaa !22
%46 = load i64, ptr %36, align 8, !tbaa !22
br label %47
47: ; preds = %45, %41
%48 = phi i64 [ 0, %45 ], [ %43, %41 ]
%49 = phi i64 [ %46, %45 ], [ %37, %41 ]
%50 = add nsw i64 %48, %49
store i64 %50, ptr %42, align 8, !tbaa !22
store i64 %39, ptr %36, align 8, !tbaa !22
br label %51
51: ; preds = %47, %35
%52 = load i32, ptr %2, align 8, !tbaa !24
%53 = icmp eq i32 %52, -1
br i1 %53, label %68, label %54
54: ; preds = %51
%55 = load i32, ptr %1, align 8, !tbaa !24
%56 = icmp eq i32 %55, -1
br i1 %56, label %63, label %57
57: ; preds = %54
%58 = load i32, ptr %19, align 8, !tbaa !25
%59 = getelementptr inbounds i8, ptr %1, i64 8
%60 = load i64, ptr %59, align 8, !tbaa !26
%61 = tail call i32 @_bfd_elf_strtab_delref(i32 noundef %58, i64 noundef %60) #2
%62 = load i32, ptr %2, align 8, !tbaa !24
br label %63
63: ; preds = %57, %54
%64 = phi i32 [ %62, %57 ], [ %52, %54 ]
store i32 %64, ptr %1, align 8, !tbaa !24
%65 = getelementptr inbounds i8, ptr %2, i64 8
%66 = load i64, ptr %65, align 8, !tbaa !26
%67 = getelementptr inbounds i8, ptr %1, i64 8
store i64 %66, ptr %67, align 8, !tbaa !26
store i32 -1, ptr %2, align 8, !tbaa !24
store i64 0, ptr %65, align 8, !tbaa !26
br label %68
68: ; preds = %51, %63, %3
ret void
}
declare ptr @elf_hash_table(ptr noundef) local_unnamed_addr #1
declare i32 @_bfd_elf_strtab_delref(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 32}
!11 = !{!"elf_link_hash_entry", !7, i64 0, !12, i64 8, !13, i64 16, !14, i64 24, !15, i64 32, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60}
!12 = !{!"long", !8, i64 0}
!13 = !{!"TYPE_9__", !12, i64 0}
!14 = !{!"TYPE_7__", !12, i64 0}
!15 = !{!"TYPE_6__", !12, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!11, !12, i64 24}
!18 = !{!19, !12, i64 16}
!19 = !{!"elf_link_hash_table", !7, i64 0, !20, i64 8, !21, i64 16}
!20 = !{!"TYPE_10__", !12, i64 0}
!21 = !{!"TYPE_8__", !12, i64 0}
!22 = !{!11, !12, i64 16}
!23 = !{!19, !12, i64 8}
!24 = !{!11, !7, i64 0}
!25 = !{!19, !7, i64 0}
!26 = !{!11, !12, i64 8}
|
freebsd_contrib_binutils_bfd_extr_elf.c__bfd_elf_link_hash_copy_indirect
|
; ModuleID = 'AnghaBench/linux/drivers/scsi/isci/extr_port.c_sci_port_get_protocols.c'
source_filename = "AnghaBench/linux/drivers/scsi/isci/extr_port.c_sci_port_get_protocols.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SCI_MAX_PHYS = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @sci_port_get_protocols], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sci_port_get_protocols(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
store i64 0, ptr %1, align 8, !tbaa !5
%3 = load i64, ptr @SCI_MAX_PHYS, align 8, !tbaa !10
%4 = icmp eq i64 %3, 0
br i1 %4, label %19, label %5
5: ; preds = %2, %15
%6 = phi i64 [ %16, %15 ], [ %3, %2 ]
%7 = phi i64 [ %17, %15 ], [ 0, %2 ]
%8 = load ptr, ptr %0, align 8, !tbaa !11
%9 = getelementptr inbounds ptr, ptr %8, i64 %7
%10 = load ptr, ptr %9, align 8, !tbaa !14
%11 = icmp eq ptr %10, null
br i1 %11, label %15, label %12
12: ; preds = %5
%13 = tail call i32 @sci_phy_get_protocols(ptr noundef nonnull %10, ptr noundef nonnull %1) #2
%14 = load i64, ptr @SCI_MAX_PHYS, align 8, !tbaa !10
br label %15
15: ; preds = %5, %12
%16 = phi i64 [ %6, %5 ], [ %14, %12 ]
%17 = add nuw i64 %7, 1
%18 = icmp ult i64 %17, %16
br i1 %18, label %5, label %19, !llvm.loop !15
19: ; preds = %15, %2
ret void
}
declare i32 @sci_phy_get_protocols(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sci_phy_proto", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"isci_port", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!13, !13, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/scsi/isci/extr_port.c_sci_port_get_protocols.c'
source_filename = "AnghaBench/linux/drivers/scsi/isci/extr_port.c_sci_port_get_protocols.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SCI_MAX_PHYS = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @sci_port_get_protocols], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sci_port_get_protocols(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
store i64 0, ptr %1, align 8, !tbaa !6
%3 = load i64, ptr @SCI_MAX_PHYS, align 8, !tbaa !11
%4 = icmp eq i64 %3, 0
br i1 %4, label %19, label %5
5: ; preds = %2, %15
%6 = phi i64 [ %16, %15 ], [ %3, %2 ]
%7 = phi i64 [ %17, %15 ], [ 0, %2 ]
%8 = load ptr, ptr %0, align 8, !tbaa !12
%9 = getelementptr inbounds ptr, ptr %8, i64 %7
%10 = load ptr, ptr %9, align 8, !tbaa !15
%11 = icmp eq ptr %10, null
br i1 %11, label %15, label %12
12: ; preds = %5
%13 = tail call i32 @sci_phy_get_protocols(ptr noundef nonnull %10, ptr noundef nonnull %1) #2
%14 = load i64, ptr @SCI_MAX_PHYS, align 8, !tbaa !11
br label %15
15: ; preds = %5, %12
%16 = phi i64 [ %6, %5 ], [ %14, %12 ]
%17 = add nuw i64 %7, 1
%18 = icmp ult i64 %17, %16
br i1 %18, label %5, label %19, !llvm.loop !16
19: ; preds = %15, %2
ret void
}
declare i32 @sci_phy_get_protocols(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sci_phy_proto", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"isci_port", !14, i64 0}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!14, !14, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_scsi_isci_extr_port.c_sci_port_get_protocols
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_txrx.h_ring_uses_build_skb.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_txrx.h_ring_uses_build_skb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@I40E_RXR_FLAGS_BUILD_SKB_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ring_uses_build_skb], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @ring_uses_build_skb(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = load i32, ptr @I40E_RXR_FLAGS_BUILD_SKB_ENABLED, align 4, !tbaa !10
%4 = and i32 %3, %2
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"i40e_ring", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_txrx.h_ring_uses_build_skb.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_txrx.h_ring_uses_build_skb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@I40E_RXR_FLAGS_BUILD_SKB_ENABLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ring_uses_build_skb], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @ring_uses_build_skb(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = load i32, ptr @I40E_RXR_FLAGS_BUILD_SKB_ENABLED, align 4, !tbaa !11
%4 = and i32 %3, %2
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"i40e_ring", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
linux_drivers_net_ethernet_intel_i40e_extr_i40e_txrx.h_ring_uses_build_skb
|
; ModuleID = 'AnghaBench/freebsd/contrib/bearssl/src/ec/extr_ec_c25519_m15.c_f255_mul_a24.c'
source_filename = "AnghaBench/freebsd/contrib/bearssl/src/ec/extr_ec_c25519_m15.c_f255_mul_a24.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @f255_mul_a24], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @f255_mul_a24(ptr nocapture noundef %0, ptr nocapture noundef readonly %1) #0 {
br label %3
3: ; preds = %2, %3
%4 = phi i64 [ 0, %2 ], [ %13, %3 ]
%5 = phi i32 [ 0, %2 ], [ %12, %3 ]
%6 = getelementptr inbounds i32, ptr %1, i64 %4
%7 = load i32, ptr %6, align 4, !tbaa !5
%8 = tail call i32 @MUL15(i32 noundef %7, i32 noundef 121665) #2
%9 = add nsw i32 %8, %5
%10 = and i32 %9, 8191
%11 = getelementptr inbounds i32, ptr %0, i64 %4
store i32 %10, ptr %11, align 4, !tbaa !5
%12 = ashr i32 %9, 13
%13 = add nuw nsw i64 %4, 1
%14 = icmp eq i64 %13, 20
br i1 %14, label %15, label %3, !llvm.loop !9
15: ; preds = %3
%16 = ashr i32 %9, 8
%17 = tail call i32 @MUL15(i32 noundef %16, i32 noundef 19) #2
%18 = getelementptr inbounds i32, ptr %0, i64 19
%19 = load i32, ptr %18, align 4, !tbaa !5
%20 = and i32 %19, 255
store i32 %20, ptr %18, align 4, !tbaa !5
%21 = load i32, ptr %0, align 4, !tbaa !5
%22 = add nsw i32 %21, %17
%23 = and i32 %22, 8191
store i32 %23, ptr %0, align 4, !tbaa !5
%24 = ashr i32 %22, 13
%25 = getelementptr inbounds i32, ptr %0, i64 1
%26 = load i32, ptr %25, align 4, !tbaa !5
%27 = add nsw i32 %26, %24
%28 = and i32 %27, 8191
store i32 %28, ptr %25, align 4, !tbaa !5
%29 = ashr i32 %27, 13
%30 = getelementptr inbounds i32, ptr %0, i64 2
%31 = load i32, ptr %30, align 4, !tbaa !5
%32 = add nsw i32 %31, %29
%33 = and i32 %32, 8191
store i32 %33, ptr %30, align 4, !tbaa !5
%34 = ashr i32 %32, 13
%35 = getelementptr inbounds i32, ptr %0, i64 3
%36 = load i32, ptr %35, align 4, !tbaa !5
%37 = add nsw i32 %36, %34
%38 = and i32 %37, 8191
store i32 %38, ptr %35, align 4, !tbaa !5
%39 = ashr i32 %37, 13
%40 = getelementptr inbounds i32, ptr %0, i64 4
%41 = load i32, ptr %40, align 4, !tbaa !5
%42 = add nsw i32 %41, %39
%43 = and i32 %42, 8191
store i32 %43, ptr %40, align 4, !tbaa !5
%44 = ashr i32 %42, 13
%45 = getelementptr inbounds i32, ptr %0, i64 5
%46 = load i32, ptr %45, align 4, !tbaa !5
%47 = add nsw i32 %46, %44
%48 = and i32 %47, 8191
store i32 %48, ptr %45, align 4, !tbaa !5
%49 = ashr i32 %47, 13
%50 = getelementptr inbounds i32, ptr %0, i64 6
%51 = load i32, ptr %50, align 4, !tbaa !5
%52 = add nsw i32 %51, %49
%53 = and i32 %52, 8191
store i32 %53, ptr %50, align 4, !tbaa !5
%54 = ashr i32 %52, 13
%55 = getelementptr inbounds i32, ptr %0, i64 7
%56 = load i32, ptr %55, align 4, !tbaa !5
%57 = add nsw i32 %56, %54
%58 = and i32 %57, 8191
store i32 %58, ptr %55, align 4, !tbaa !5
%59 = ashr i32 %57, 13
%60 = getelementptr inbounds i32, ptr %0, i64 8
%61 = load i32, ptr %60, align 4, !tbaa !5
%62 = add nsw i32 %61, %59
%63 = and i32 %62, 8191
store i32 %63, ptr %60, align 4, !tbaa !5
%64 = ashr i32 %62, 13
%65 = getelementptr inbounds i32, ptr %0, i64 9
%66 = load i32, ptr %65, align 4, !tbaa !5
%67 = add nsw i32 %66, %64
%68 = and i32 %67, 8191
store i32 %68, ptr %65, align 4, !tbaa !5
%69 = ashr i32 %67, 13
%70 = getelementptr inbounds i32, ptr %0, i64 10
%71 = load i32, ptr %70, align 4, !tbaa !5
%72 = add nsw i32 %71, %69
%73 = and i32 %72, 8191
store i32 %73, ptr %70, align 4, !tbaa !5
%74 = ashr i32 %72, 13
%75 = getelementptr inbounds i32, ptr %0, i64 11
%76 = load i32, ptr %75, align 4, !tbaa !5
%77 = add nsw i32 %76, %74
%78 = and i32 %77, 8191
store i32 %78, ptr %75, align 4, !tbaa !5
%79 = ashr i32 %77, 13
%80 = getelementptr inbounds i32, ptr %0, i64 12
%81 = load i32, ptr %80, align 4, !tbaa !5
%82 = add nsw i32 %81, %79
%83 = and i32 %82, 8191
store i32 %83, ptr %80, align 4, !tbaa !5
%84 = ashr i32 %82, 13
%85 = getelementptr inbounds i32, ptr %0, i64 13
%86 = load i32, ptr %85, align 4, !tbaa !5
%87 = add nsw i32 %86, %84
%88 = and i32 %87, 8191
store i32 %88, ptr %85, align 4, !tbaa !5
%89 = ashr i32 %87, 13
%90 = getelementptr inbounds i32, ptr %0, i64 14
%91 = load i32, ptr %90, align 4, !tbaa !5
%92 = add nsw i32 %91, %89
%93 = and i32 %92, 8191
store i32 %93, ptr %90, align 4, !tbaa !5
%94 = ashr i32 %92, 13
%95 = getelementptr inbounds i32, ptr %0, i64 15
%96 = load i32, ptr %95, align 4, !tbaa !5
%97 = add nsw i32 %96, %94
%98 = and i32 %97, 8191
store i32 %98, ptr %95, align 4, !tbaa !5
%99 = ashr i32 %97, 13
%100 = getelementptr inbounds i32, ptr %0, i64 16
%101 = load i32, ptr %100, align 4, !tbaa !5
%102 = add nsw i32 %101, %99
%103 = and i32 %102, 8191
store i32 %103, ptr %100, align 4, !tbaa !5
%104 = ashr i32 %102, 13
%105 = getelementptr inbounds i32, ptr %0, i64 17
%106 = load i32, ptr %105, align 4, !tbaa !5
%107 = add nsw i32 %106, %104
%108 = and i32 %107, 8191
store i32 %108, ptr %105, align 4, !tbaa !5
%109 = ashr i32 %107, 13
%110 = getelementptr inbounds i32, ptr %0, i64 18
%111 = load i32, ptr %110, align 4, !tbaa !5
%112 = add nsw i32 %111, %109
%113 = and i32 %112, 8191
store i32 %113, ptr %110, align 4, !tbaa !5
%114 = lshr i32 %112, 13
%115 = load i32, ptr %18, align 4, !tbaa !5
%116 = add i32 %115, %114
%117 = and i32 %116, 8191
store i32 %117, ptr %18, align 4, !tbaa !5
ret void
}
declare i32 @MUL15(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/bearssl/src/ec/extr_ec_c25519_m15.c_f255_mul_a24.c'
source_filename = "AnghaBench/freebsd/contrib/bearssl/src/ec/extr_ec_c25519_m15.c_f255_mul_a24.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @f255_mul_a24], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @f255_mul_a24(ptr nocapture noundef %0, ptr nocapture noundef readonly %1) #0 {
br label %3
3: ; preds = %2, %3
%4 = phi i64 [ 0, %2 ], [ %13, %3 ]
%5 = phi i32 [ 0, %2 ], [ %12, %3 ]
%6 = getelementptr inbounds i32, ptr %1, i64 %4
%7 = load i32, ptr %6, align 4, !tbaa !6
%8 = tail call i32 @MUL15(i32 noundef %7, i32 noundef 121665) #2
%9 = add nsw i32 %8, %5
%10 = and i32 %9, 8191
%11 = getelementptr inbounds i32, ptr %0, i64 %4
store i32 %10, ptr %11, align 4, !tbaa !6
%12 = ashr i32 %9, 13
%13 = add nuw nsw i64 %4, 1
%14 = icmp eq i64 %13, 20
br i1 %14, label %15, label %3, !llvm.loop !10
15: ; preds = %3
%16 = ashr i32 %9, 8
%17 = tail call i32 @MUL15(i32 noundef %16, i32 noundef 19) #2
%18 = getelementptr inbounds i8, ptr %0, i64 76
%19 = load i32, ptr %18, align 4, !tbaa !6
%20 = and i32 %19, 255
store i32 %20, ptr %18, align 4, !tbaa !6
%21 = load i32, ptr %0, align 4, !tbaa !6
%22 = add nsw i32 %21, %17
%23 = and i32 %22, 8191
store i32 %23, ptr %0, align 4, !tbaa !6
%24 = ashr i32 %22, 13
%25 = getelementptr inbounds i8, ptr %0, i64 4
%26 = load i32, ptr %25, align 4, !tbaa !6
%27 = add nsw i32 %26, %24
%28 = and i32 %27, 8191
store i32 %28, ptr %25, align 4, !tbaa !6
%29 = ashr i32 %27, 13
%30 = getelementptr inbounds i8, ptr %0, i64 8
%31 = load i32, ptr %30, align 4, !tbaa !6
%32 = add nsw i32 %31, %29
%33 = and i32 %32, 8191
store i32 %33, ptr %30, align 4, !tbaa !6
%34 = ashr i32 %32, 13
%35 = getelementptr inbounds i8, ptr %0, i64 12
%36 = load i32, ptr %35, align 4, !tbaa !6
%37 = add nsw i32 %36, %34
%38 = and i32 %37, 8191
store i32 %38, ptr %35, align 4, !tbaa !6
%39 = ashr i32 %37, 13
%40 = getelementptr inbounds i8, ptr %0, i64 16
%41 = load i32, ptr %40, align 4, !tbaa !6
%42 = add nsw i32 %41, %39
%43 = and i32 %42, 8191
store i32 %43, ptr %40, align 4, !tbaa !6
%44 = ashr i32 %42, 13
%45 = getelementptr inbounds i8, ptr %0, i64 20
%46 = load i32, ptr %45, align 4, !tbaa !6
%47 = add nsw i32 %46, %44
%48 = and i32 %47, 8191
store i32 %48, ptr %45, align 4, !tbaa !6
%49 = ashr i32 %47, 13
%50 = getelementptr inbounds i8, ptr %0, i64 24
%51 = load i32, ptr %50, align 4, !tbaa !6
%52 = add nsw i32 %51, %49
%53 = and i32 %52, 8191
store i32 %53, ptr %50, align 4, !tbaa !6
%54 = ashr i32 %52, 13
%55 = getelementptr inbounds i8, ptr %0, i64 28
%56 = load i32, ptr %55, align 4, !tbaa !6
%57 = add nsw i32 %56, %54
%58 = and i32 %57, 8191
store i32 %58, ptr %55, align 4, !tbaa !6
%59 = ashr i32 %57, 13
%60 = getelementptr inbounds i8, ptr %0, i64 32
%61 = load i32, ptr %60, align 4, !tbaa !6
%62 = add nsw i32 %61, %59
%63 = and i32 %62, 8191
store i32 %63, ptr %60, align 4, !tbaa !6
%64 = ashr i32 %62, 13
%65 = getelementptr inbounds i8, ptr %0, i64 36
%66 = load i32, ptr %65, align 4, !tbaa !6
%67 = add nsw i32 %66, %64
%68 = and i32 %67, 8191
store i32 %68, ptr %65, align 4, !tbaa !6
%69 = ashr i32 %67, 13
%70 = getelementptr inbounds i8, ptr %0, i64 40
%71 = load i32, ptr %70, align 4, !tbaa !6
%72 = add nsw i32 %71, %69
%73 = and i32 %72, 8191
store i32 %73, ptr %70, align 4, !tbaa !6
%74 = ashr i32 %72, 13
%75 = getelementptr inbounds i8, ptr %0, i64 44
%76 = load i32, ptr %75, align 4, !tbaa !6
%77 = add nsw i32 %76, %74
%78 = and i32 %77, 8191
store i32 %78, ptr %75, align 4, !tbaa !6
%79 = ashr i32 %77, 13
%80 = getelementptr inbounds i8, ptr %0, i64 48
%81 = load i32, ptr %80, align 4, !tbaa !6
%82 = add nsw i32 %81, %79
%83 = and i32 %82, 8191
store i32 %83, ptr %80, align 4, !tbaa !6
%84 = ashr i32 %82, 13
%85 = getelementptr inbounds i8, ptr %0, i64 52
%86 = load i32, ptr %85, align 4, !tbaa !6
%87 = add nsw i32 %86, %84
%88 = and i32 %87, 8191
store i32 %88, ptr %85, align 4, !tbaa !6
%89 = ashr i32 %87, 13
%90 = getelementptr inbounds i8, ptr %0, i64 56
%91 = load i32, ptr %90, align 4, !tbaa !6
%92 = add nsw i32 %91, %89
%93 = and i32 %92, 8191
store i32 %93, ptr %90, align 4, !tbaa !6
%94 = ashr i32 %92, 13
%95 = getelementptr inbounds i8, ptr %0, i64 60
%96 = load i32, ptr %95, align 4, !tbaa !6
%97 = add nsw i32 %96, %94
%98 = and i32 %97, 8191
store i32 %98, ptr %95, align 4, !tbaa !6
%99 = ashr i32 %97, 13
%100 = getelementptr inbounds i8, ptr %0, i64 64
%101 = load i32, ptr %100, align 4, !tbaa !6
%102 = add nsw i32 %101, %99
%103 = and i32 %102, 8191
store i32 %103, ptr %100, align 4, !tbaa !6
%104 = ashr i32 %102, 13
%105 = getelementptr inbounds i8, ptr %0, i64 68
%106 = load i32, ptr %105, align 4, !tbaa !6
%107 = add nsw i32 %106, %104
%108 = and i32 %107, 8191
store i32 %108, ptr %105, align 4, !tbaa !6
%109 = ashr i32 %107, 13
%110 = getelementptr inbounds i8, ptr %0, i64 72
%111 = load i32, ptr %110, align 4, !tbaa !6
%112 = add nsw i32 %111, %109
%113 = and i32 %112, 8191
store i32 %113, ptr %110, align 4, !tbaa !6
%114 = lshr i32 %112, 13
%115 = load i32, ptr %18, align 4, !tbaa !6
%116 = add i32 %115, %114
%117 = and i32 %116, 8191
store i32 %117, ptr %18, align 4, !tbaa !6
ret void
}
declare i32 @MUL15(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
|
freebsd_contrib_bearssl_src_ec_extr_ec_c25519_m15.c_f255_mul_a24
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_drv.c_amdgpu_pmops_restore.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_drv.c_amdgpu_pmops_restore.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @amdgpu_pmops_restore], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @amdgpu_pmops_restore(ptr noundef %0) #0 {
%2 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%3 = tail call i32 @amdgpu_device_resume(ptr noundef %2, i32 noundef 0, i32 noundef 1) #2
ret i32 %3
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @amdgpu_device_resume(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_drv.c_amdgpu_pmops_restore.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_drv.c_amdgpu_pmops_restore.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @amdgpu_pmops_restore], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @amdgpu_pmops_restore(ptr noundef %0) #0 {
%2 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%3 = tail call i32 @amdgpu_device_resume(ptr noundef %2, i32 noundef 0, i32 noundef 1) #2
ret i32 %3
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @amdgpu_device_resume(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_gpu_drm_amd_amdgpu_extr_amdgpu_drv.c_amdgpu_pmops_restore
|
; ModuleID = 'AnghaBench/linux/fs/unicode/extr_mkutf8data.c_file_fail.c'
source_filename = "AnghaBench/linux/fs/unicode/extr_mkutf8data.c_file_fail.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [18 x i8] c"Error parsing %s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @file_fail], section "llvm.metadata"
; Function Attrs: noreturn nounwind uwtable
define internal void @file_fail(ptr noundef %0) #0 {
%2 = tail call i32 @printf(ptr noundef nonnull @.str, ptr noundef %0) #3
%3 = tail call i32 @exit(i32 noundef 1) #4
unreachable
}
declare i32 @printf(ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/fs/unicode/extr_mkutf8data.c_file_fail.c'
source_filename = "AnghaBench/linux/fs/unicode/extr_mkutf8data.c_file_fail.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [18 x i8] c"Error parsing %s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @file_fail], section "llvm.metadata"
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define internal void @file_fail(ptr noundef %0) #0 {
%2 = tail call i32 @printf(ptr noundef nonnull @.str, ptr noundef %0) #3
%3 = tail call i32 @exit(i32 noundef 1) #4
unreachable
}
declare i32 @printf(ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_fs_unicode_extr_mkutf8data.c_file_fail
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/md/extr_md.c_kern_mddetach.c'
source_filename = "AnghaBench/freebsd/sys/dev/md/extr_md.c_kern_mddetach.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@md_sx = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @kern_mddetach], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @kern_mddetach(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @sx_xlock(ptr noundef nonnull @md_sx) #2
%4 = tail call i32 @kern_mddetach_locked(ptr noundef %0, ptr noundef %1) #2
%5 = tail call i32 @sx_xunlock(ptr noundef nonnull @md_sx) #2
ret i32 %4
}
declare i32 @sx_xlock(ptr noundef) local_unnamed_addr #1
declare i32 @kern_mddetach_locked(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sx_xunlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/md/extr_md.c_kern_mddetach.c'
source_filename = "AnghaBench/freebsd/sys/dev/md/extr_md.c_kern_mddetach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@md_sx = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @kern_mddetach], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @kern_mddetach(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @sx_xlock(ptr noundef nonnull @md_sx) #2
%4 = tail call i32 @kern_mddetach_locked(ptr noundef %0, ptr noundef %1) #2
%5 = tail call i32 @sx_xunlock(ptr noundef nonnull @md_sx) #2
ret i32 %4
}
declare i32 @sx_xlock(ptr noundef) local_unnamed_addr #1
declare i32 @kern_mddetach_locked(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sx_xunlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_sys_dev_md_extr_md.c_kern_mddetach
|
; ModuleID = 'AnghaBench/mjolnir/Mjolnir/lua/extr_lparser.c_singlevaraux.c'
source_filename = "AnghaBench/mjolnir/Mjolnir/lua/extr_lparser.c_singlevaraux.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@VVOID = dso_local local_unnamed_addr global i64 0, align 8
@VLOCAL = dso_local local_unnamed_addr global i64 0, align 8
@VUPVAL = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @singlevaraux], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @singlevaraux(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = icmp eq ptr %0, null
br i1 %5, label %6, label %9
6: ; preds = %4
%7 = load i64, ptr @VVOID, align 8, !tbaa !5
%8 = tail call i32 @init_exp(ptr noundef %2, i64 noundef %7, i32 noundef 0) #2
br label %32
9: ; preds = %4
%10 = tail call i32 @searchvar(ptr noundef nonnull %0, ptr noundef %1) #2
%11 = icmp sgt i32 %10, -1
br i1 %11, label %12, label %18
12: ; preds = %9
%13 = load i64, ptr @VLOCAL, align 8, !tbaa !5
%14 = tail call i32 @init_exp(ptr noundef %2, i64 noundef %13, i32 noundef %10) #2
%15 = icmp eq i32 %3, 0
br i1 %15, label %16, label %32
16: ; preds = %12
%17 = tail call i32 @markupval(ptr noundef nonnull %0, i32 noundef %10) #2
br label %32
18: ; preds = %9
%19 = tail call i32 @searchupvalue(ptr noundef nonnull %0, ptr noundef %1) #2
%20 = icmp slt i32 %19, 0
br i1 %20, label %21, label %28
21: ; preds = %18
%22 = load ptr, ptr %0, align 8, !tbaa !9
tail call void @singlevaraux(ptr noundef %22, ptr noundef %1, ptr noundef %2, i32 noundef 0)
%23 = load i64, ptr %2, align 8, !tbaa !12
%24 = load i64, ptr @VVOID, align 8, !tbaa !5
%25 = icmp eq i64 %23, %24
br i1 %25, label %32, label %26
26: ; preds = %21
%27 = tail call i32 @newupvalue(ptr noundef nonnull %0, ptr noundef %1, ptr noundef nonnull %2) #2
br label %28
28: ; preds = %26, %18
%29 = phi i32 [ %27, %26 ], [ %19, %18 ]
%30 = load i64, ptr @VUPVAL, align 8, !tbaa !5
%31 = tail call i32 @init_exp(ptr noundef %2, i64 noundef %30, i32 noundef %29) #2
br label %32
32: ; preds = %21, %28, %12, %16, %6
ret void
}
declare i32 @init_exp(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @searchvar(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @markupval(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @searchupvalue(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @newupvalue(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_12__", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"TYPE_11__", !6, i64 0}
|
; ModuleID = 'AnghaBench/mjolnir/Mjolnir/lua/extr_lparser.c_singlevaraux.c'
source_filename = "AnghaBench/mjolnir/Mjolnir/lua/extr_lparser.c_singlevaraux.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VVOID = common local_unnamed_addr global i64 0, align 8
@VLOCAL = common local_unnamed_addr global i64 0, align 8
@VUPVAL = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @singlevaraux], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @singlevaraux(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = icmp eq ptr %0, null
br i1 %5, label %6, label %9
6: ; preds = %4
%7 = load i64, ptr @VVOID, align 8, !tbaa !6
%8 = tail call i32 @init_exp(ptr noundef %2, i64 noundef %7, i32 noundef 0) #2
br label %32
9: ; preds = %4
%10 = tail call i32 @searchvar(ptr noundef nonnull %0, ptr noundef %1) #2
%11 = icmp sgt i32 %10, -1
br i1 %11, label %12, label %18
12: ; preds = %9
%13 = load i64, ptr @VLOCAL, align 8, !tbaa !6
%14 = tail call i32 @init_exp(ptr noundef %2, i64 noundef %13, i32 noundef %10) #2
%15 = icmp eq i32 %3, 0
br i1 %15, label %16, label %32
16: ; preds = %12
%17 = tail call i32 @markupval(ptr noundef nonnull %0, i32 noundef %10) #2
br label %32
18: ; preds = %9
%19 = tail call i32 @searchupvalue(ptr noundef nonnull %0, ptr noundef %1) #2
%20 = icmp slt i32 %19, 0
br i1 %20, label %21, label %28
21: ; preds = %18
%22 = load ptr, ptr %0, align 8, !tbaa !10
tail call void @singlevaraux(ptr noundef %22, ptr noundef %1, ptr noundef %2, i32 noundef 0)
%23 = load i64, ptr %2, align 8, !tbaa !13
%24 = load i64, ptr @VVOID, align 8, !tbaa !6
%25 = icmp eq i64 %23, %24
br i1 %25, label %32, label %26
26: ; preds = %21
%27 = tail call i32 @newupvalue(ptr noundef nonnull %0, ptr noundef %1, ptr noundef nonnull %2) #2
br label %28
28: ; preds = %26, %18
%29 = phi i32 [ %27, %26 ], [ %19, %18 ]
%30 = load i64, ptr @VUPVAL, align 8, !tbaa !6
%31 = tail call i32 @init_exp(ptr noundef %2, i64 noundef %30, i32 noundef %29) #2
br label %32
32: ; preds = %21, %28, %12, %16, %6
ret void
}
declare i32 @init_exp(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @searchvar(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @markupval(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @searchupvalue(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @newupvalue(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_12__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_11__", !7, i64 0}
|
mjolnir_Mjolnir_lua_extr_lparser.c_singlevaraux
|
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/libiberty/extr_cp-demangle.c_cplus_demangle_mangled_name.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/libiberty/extr_cp-demangle.c_cplus_demangle_mangled_name.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local ptr @cplus_demangle_mangled_name(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @d_check_char(ptr noundef %0, i8 noundef signext 95) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = tail call i32 @d_check_char(ptr noundef %0, i8 noundef signext 90) #2
%7 = icmp eq i32 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call ptr @d_encoding(ptr noundef %0, i32 noundef %1) #2
br label %10
10: ; preds = %5, %2, %8
%11 = phi ptr [ %9, %8 ], [ null, %2 ], [ null, %5 ]
ret ptr %11
}
declare i32 @d_check_char(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare ptr @d_encoding(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/libiberty/extr_cp-demangle.c_cplus_demangle_mangled_name.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/libiberty/extr_cp-demangle.c_cplus_demangle_mangled_name.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @cplus_demangle_mangled_name(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @d_check_char(ptr noundef %0, i8 noundef signext 95) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = tail call i32 @d_check_char(ptr noundef %0, i8 noundef signext 90) #2
%7 = icmp eq i32 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call ptr @d_encoding(ptr noundef %0, i32 noundef %1) #2
br label %10
10: ; preds = %5, %2, %8
%11 = phi ptr [ %9, %8 ], [ null, %2 ], [ null, %5 ]
ret ptr %11
}
declare i32 @d_check_char(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare ptr @d_encoding(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_contrib_binutils_libiberty_extr_cp-demangle.c_cplus_demangle_mangled_name
|
; ModuleID = 'AnghaBench/linux/drivers/rtc/extr_rtc-ds1305.c_ds1305_alarm_irq_enable.c'
source_filename = "AnghaBench/linux/drivers/rtc/extr_rtc-ds1305.c_ds1305_alarm_irq_enable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ds1305 = type { ptr, i32 }
@EINVAL = dso_local local_unnamed_addr global i64 0, align 8
@DS1305_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@DS1305_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@DS1305_AEI0 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ds1305_alarm_irq_enable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ds1305_alarm_irq_enable(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca [2 x i32], align 4
%4 = tail call ptr @dev_get_drvdata(ptr noundef %0) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%5 = load i64, ptr @EINVAL, align 8, !tbaa !5
%6 = sub nsw i64 0, %5
%7 = load i32, ptr @DS1305_WRITE, align 4, !tbaa !9
%8 = load i32, ptr @DS1305_CONTROL, align 4, !tbaa !9
%9 = or i32 %8, %7
store i32 %9, ptr %3, align 4, !tbaa !9
%10 = load ptr, ptr %4, align 8, !tbaa !11
%11 = load i32, ptr %10, align 4, !tbaa !9
%12 = getelementptr inbounds [2 x i32], ptr %3, i64 0, i64 1
%13 = icmp eq i32 %1, 0
%14 = load i32, ptr @DS1305_AEI0, align 4, !tbaa !9
%15 = and i32 %14, %11
%16 = icmp eq i32 %15, 0
br i1 %13, label %20, label %17
17: ; preds = %2
br i1 %16, label %18, label %33
18: ; preds = %17
%19 = or i32 %14, %11
br label %24
20: ; preds = %2
br i1 %16, label %33, label %21
21: ; preds = %20
%22 = xor i32 %14, -1
%23 = and i32 %11, %22
br label %24
24: ; preds = %21, %18
%25 = phi i32 [ %23, %21 ], [ %19, %18 ]
store i32 %25, ptr %12, align 4, !tbaa !9
%26 = getelementptr inbounds %struct.ds1305, ptr %4, i64 0, i32 1
%27 = load i32, ptr %26, align 8, !tbaa !14
%28 = call i64 @spi_write_then_read(i32 noundef %27, ptr noundef nonnull %3, i32 noundef 8, ptr noundef null, i32 noundef 0) #3
%29 = icmp sgt i64 %28, -1
br i1 %29, label %30, label %33
30: ; preds = %24
%31 = load i32, ptr %12, align 4, !tbaa !9
%32 = load ptr, ptr %4, align 8, !tbaa !11
store i32 %31, ptr %32, align 4, !tbaa !9
br label %33
33: ; preds = %24, %30, %20, %17
%34 = phi i64 [ %6, %17 ], [ %28, %30 ], [ %28, %24 ], [ %6, %20 ]
%35 = trunc i64 %34 to i32
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %35
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #2
declare i64 @spi_write_then_read(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"ds1305", !13, i64 0, !10, i64 8}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!12, !10, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/rtc/extr_rtc-ds1305.c_ds1305_alarm_irq_enable.c'
source_filename = "AnghaBench/linux/drivers/rtc/extr_rtc-ds1305.c_ds1305_alarm_irq_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i64 0, align 8
@DS1305_WRITE = common local_unnamed_addr global i32 0, align 4
@DS1305_CONTROL = common local_unnamed_addr global i32 0, align 4
@DS1305_AEI0 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ds1305_alarm_irq_enable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ds1305_alarm_irq_enable(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca [2 x i32], align 4
%4 = tail call ptr @dev_get_drvdata(ptr noundef %0) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%5 = load i64, ptr @EINVAL, align 8, !tbaa !6
%6 = sub nsw i64 0, %5
%7 = load i32, ptr @DS1305_WRITE, align 4, !tbaa !10
%8 = load i32, ptr @DS1305_CONTROL, align 4, !tbaa !10
%9 = or i32 %8, %7
store i32 %9, ptr %3, align 4, !tbaa !10
%10 = load ptr, ptr %4, align 8, !tbaa !12
%11 = load i32, ptr %10, align 4, !tbaa !10
%12 = getelementptr inbounds i8, ptr %3, i64 4
%13 = icmp eq i32 %1, 0
%14 = load i32, ptr @DS1305_AEI0, align 4, !tbaa !10
%15 = and i32 %14, %11
%16 = icmp eq i32 %15, 0
br i1 %13, label %20, label %17
17: ; preds = %2
br i1 %16, label %18, label %33
18: ; preds = %17
%19 = or i32 %14, %11
br label %24
20: ; preds = %2
br i1 %16, label %33, label %21
21: ; preds = %20
%22 = xor i32 %14, -1
%23 = and i32 %11, %22
br label %24
24: ; preds = %21, %18
%25 = phi i32 [ %23, %21 ], [ %19, %18 ]
store i32 %25, ptr %12, align 4, !tbaa !10
%26 = getelementptr inbounds i8, ptr %4, i64 8
%27 = load i32, ptr %26, align 8, !tbaa !15
%28 = call i64 @spi_write_then_read(i32 noundef %27, ptr noundef nonnull %3, i32 noundef 8, ptr noundef null, i32 noundef 0) #3
%29 = icmp sgt i64 %28, -1
br i1 %29, label %30, label %33
30: ; preds = %24
%31 = load i32, ptr %12, align 4, !tbaa !10
%32 = load ptr, ptr %4, align 8, !tbaa !12
store i32 %31, ptr %32, align 4, !tbaa !10
br label %33
33: ; preds = %24, %30, %20, %17
%34 = phi i64 [ %6, %17 ], [ %28, %30 ], [ %28, %24 ], [ %6, %20 ]
%35 = trunc i64 %34 to i32
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %35
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #2
declare i64 @spi_write_then_read(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"ds1305", !14, i64 0, !11, i64 8}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!13, !11, i64 8}
|
linux_drivers_rtc_extr_rtc-ds1305.c_ds1305_alarm_irq_enable
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/netmap/extr_netmap_mem2.c_nm_isset.c'
source_filename = "AnghaBench/freebsd/sys/dev/netmap/extr_netmap_mem2.c_nm_isset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @nm_isset], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal i32 @nm_isset(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = ashr i32 %1, 5
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, ptr %0, i64 %4
%6 = load i32, ptr %5, align 4, !tbaa !5
%7 = and i32 %1, 31
%8 = shl nuw i32 1, %7
%9 = and i32 %6, %8
ret i32 %9
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/netmap/extr_netmap_mem2.c_nm_isset.c'
source_filename = "AnghaBench/freebsd/sys/dev/netmap/extr_netmap_mem2.c_nm_isset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @nm_isset], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 0, -2147483647) i32 @nm_isset(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = ashr i32 %1, 5
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, ptr %0, i64 %4
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = and i32 %1, 31
%8 = shl nuw i32 1, %7
%9 = and i32 %6, %8
ret i32 %9
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_sys_dev_netmap_extr_netmap_mem2.c_nm_isset
|
; ModuleID = 'AnghaBench/xLua/build/lua-5.3.3/src/extr_ldo.c_unroll.c'
source_filename = "AnghaBench/xLua/build/lua-5.3.3/src/extr_ldo.c_unroll.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { ptr, i32 }
@LUA_YIELD = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @unroll], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @unroll(ptr noundef %0, ptr noundef readonly %1) #0 {
%3 = icmp eq ptr %1, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = load i32, ptr %1, align 4, !tbaa !5
%6 = tail call i32 @finishCcall(ptr noundef %0, i32 noundef %5) #2
br label %7
7: ; preds = %4, %2
%8 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
%9 = load ptr, ptr %0, align 8, !tbaa !9
%10 = icmp eq ptr %9, %8
br i1 %10, label %24, label %11
11: ; preds = %7, %21
%12 = phi ptr [ %22, %21 ], [ %9, %7 ]
%13 = tail call i32 @isLua(ptr noundef %12) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, ptr @LUA_YIELD, align 4, !tbaa !5
%17 = tail call i32 @finishCcall(ptr noundef nonnull %0, i32 noundef %16) #2
br label %21
18: ; preds = %11
%19 = tail call i32 @luaV_finishOp(ptr noundef nonnull %0) #2
%20 = tail call i32 @luaV_execute(ptr noundef nonnull %0) #2
br label %21
21: ; preds = %18, %15
%22 = load ptr, ptr %0, align 8, !tbaa !9
%23 = icmp eq ptr %22, %8
br i1 %23, label %24, label %11, !llvm.loop !12
24: ; preds = %21, %7
ret void
}
declare i32 @finishCcall(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @isLua(ptr noundef) local_unnamed_addr #1
declare i32 @luaV_finishOp(ptr noundef) local_unnamed_addr #1
declare i32 @luaV_execute(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_6__", !11, i64 0, !6, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/xLua/build/lua-5.3.3/src/extr_ldo.c_unroll.c'
source_filename = "AnghaBench/xLua/build/lua-5.3.3/src/extr_ldo.c_unroll.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LUA_YIELD = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @unroll], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @unroll(ptr noundef %0, ptr noundef readonly %1) #0 {
%3 = icmp eq ptr %1, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = load i32, ptr %1, align 4, !tbaa !6
%6 = tail call i32 @finishCcall(ptr noundef %0, i32 noundef %5) #2
br label %7
7: ; preds = %4, %2
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = load ptr, ptr %0, align 8, !tbaa !10
%10 = icmp eq ptr %9, %8
br i1 %10, label %24, label %11
11: ; preds = %7, %21
%12 = phi ptr [ %22, %21 ], [ %9, %7 ]
%13 = tail call i32 @isLua(ptr noundef %12) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, ptr @LUA_YIELD, align 4, !tbaa !6
%17 = tail call i32 @finishCcall(ptr noundef nonnull %0, i32 noundef %16) #2
br label %21
18: ; preds = %11
%19 = tail call i32 @luaV_finishOp(ptr noundef nonnull %0) #2
%20 = tail call i32 @luaV_execute(ptr noundef nonnull %0) #2
br label %21
21: ; preds = %18, %15
%22 = load ptr, ptr %0, align 8, !tbaa !10
%23 = icmp eq ptr %22, %8
br i1 %23, label %24, label %11, !llvm.loop !13
24: ; preds = %21, %7
ret void
}
declare i32 @finishCcall(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @isLua(ptr noundef) local_unnamed_addr #1
declare i32 @luaV_finishOp(ptr noundef) local_unnamed_addr #1
declare i32 @luaV_execute(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_6__", !12, i64 0, !7, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
|
xLua_build_lua-5.3.3_src_extr_ldo.c_unroll
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qualcomm/emac/extr_emac.c_emac_clks_phase2_init.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/qualcomm/emac/extr_emac.c_emac_clks_phase2_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EMAC_CLK_TX = dso_local local_unnamed_addr global i64 0, align 8
@EMAC_CLK_HIGH_SPEED = dso_local local_unnamed_addr global i64 0, align 8
@EMAC_CLK_MDIO = dso_local local_unnamed_addr global i64 0, align 8
@EMAC_CLK_RX = dso_local local_unnamed_addr global i64 0, align 8
@EMAC_CLK_SYS = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @emac_clks_phase2_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @emac_clks_phase2_init(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call i64 @has_acpi_companion(ptr noundef %0) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %53
5: ; preds = %2
%6 = load ptr, ptr %1, align 8, !tbaa !5
%7 = load i64, ptr @EMAC_CLK_TX, align 8, !tbaa !10
%8 = getelementptr inbounds i32, ptr %6, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !12
%10 = tail call i32 @clk_set_rate(i32 noundef %9, i32 noundef 125000000) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %53
12: ; preds = %5
%13 = load ptr, ptr %1, align 8, !tbaa !5
%14 = load i64, ptr @EMAC_CLK_TX, align 8, !tbaa !10
%15 = getelementptr inbounds i32, ptr %13, i64 %14
%16 = load i32, ptr %15, align 4, !tbaa !12
%17 = tail call i32 @clk_prepare_enable(i32 noundef %16) #2
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %53
19: ; preds = %12
%20 = load ptr, ptr %1, align 8, !tbaa !5
%21 = load i64, ptr @EMAC_CLK_HIGH_SPEED, align 8, !tbaa !10
%22 = getelementptr inbounds i32, ptr %20, i64 %21
%23 = load i32, ptr %22, align 4, !tbaa !12
%24 = tail call i32 @clk_set_rate(i32 noundef %23, i32 noundef 125000000) #2
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %53
26: ; preds = %19
%27 = load ptr, ptr %1, align 8, !tbaa !5
%28 = load i64, ptr @EMAC_CLK_MDIO, align 8, !tbaa !10
%29 = getelementptr inbounds i32, ptr %27, i64 %28
%30 = load i32, ptr %29, align 4, !tbaa !12
%31 = tail call i32 @clk_set_rate(i32 noundef %30, i32 noundef 25000000) #2
%32 = icmp eq i32 %31, 0
br i1 %32, label %33, label %53
33: ; preds = %26
%34 = load ptr, ptr %1, align 8, !tbaa !5
%35 = load i64, ptr @EMAC_CLK_MDIO, align 8, !tbaa !10
%36 = getelementptr inbounds i32, ptr %34, i64 %35
%37 = load i32, ptr %36, align 4, !tbaa !12
%38 = tail call i32 @clk_prepare_enable(i32 noundef %37) #2
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %53
40: ; preds = %33
%41 = load ptr, ptr %1, align 8, !tbaa !5
%42 = load i64, ptr @EMAC_CLK_RX, align 8, !tbaa !10
%43 = getelementptr inbounds i32, ptr %41, i64 %42
%44 = load i32, ptr %43, align 4, !tbaa !12
%45 = tail call i32 @clk_prepare_enable(i32 noundef %44) #2
%46 = icmp eq i32 %45, 0
br i1 %46, label %47, label %53
47: ; preds = %40
%48 = load ptr, ptr %1, align 8, !tbaa !5
%49 = load i64, ptr @EMAC_CLK_SYS, align 8, !tbaa !10
%50 = getelementptr inbounds i32, ptr %48, i64 %49
%51 = load i32, ptr %50, align 4, !tbaa !12
%52 = tail call i32 @clk_prepare_enable(i32 noundef %51) #2
br label %53
53: ; preds = %40, %33, %26, %19, %12, %5, %2, %47
%54 = phi i32 [ %52, %47 ], [ 0, %2 ], [ %10, %5 ], [ %17, %12 ], [ %24, %19 ], [ %31, %26 ], [ %38, %33 ], [ %45, %40 ]
ret i32 %54
}
declare i64 @has_acpi_companion(ptr noundef) local_unnamed_addr #1
declare i32 @clk_set_rate(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @clk_prepare_enable(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"emac_adapter", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qualcomm/emac/extr_emac.c_emac_clks_phase2_init.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/qualcomm/emac/extr_emac.c_emac_clks_phase2_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EMAC_CLK_TX = common local_unnamed_addr global i64 0, align 8
@EMAC_CLK_HIGH_SPEED = common local_unnamed_addr global i64 0, align 8
@EMAC_CLK_MDIO = common local_unnamed_addr global i64 0, align 8
@EMAC_CLK_RX = common local_unnamed_addr global i64 0, align 8
@EMAC_CLK_SYS = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @emac_clks_phase2_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @emac_clks_phase2_init(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call i64 @has_acpi_companion(ptr noundef %0) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %53
5: ; preds = %2
%6 = load ptr, ptr %1, align 8, !tbaa !6
%7 = load i64, ptr @EMAC_CLK_TX, align 8, !tbaa !11
%8 = getelementptr inbounds i32, ptr %6, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !13
%10 = tail call i32 @clk_set_rate(i32 noundef %9, i32 noundef 125000000) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %53
12: ; preds = %5
%13 = load ptr, ptr %1, align 8, !tbaa !6
%14 = load i64, ptr @EMAC_CLK_TX, align 8, !tbaa !11
%15 = getelementptr inbounds i32, ptr %13, i64 %14
%16 = load i32, ptr %15, align 4, !tbaa !13
%17 = tail call i32 @clk_prepare_enable(i32 noundef %16) #2
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %53
19: ; preds = %12
%20 = load ptr, ptr %1, align 8, !tbaa !6
%21 = load i64, ptr @EMAC_CLK_HIGH_SPEED, align 8, !tbaa !11
%22 = getelementptr inbounds i32, ptr %20, i64 %21
%23 = load i32, ptr %22, align 4, !tbaa !13
%24 = tail call i32 @clk_set_rate(i32 noundef %23, i32 noundef 125000000) #2
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %53
26: ; preds = %19
%27 = load ptr, ptr %1, align 8, !tbaa !6
%28 = load i64, ptr @EMAC_CLK_MDIO, align 8, !tbaa !11
%29 = getelementptr inbounds i32, ptr %27, i64 %28
%30 = load i32, ptr %29, align 4, !tbaa !13
%31 = tail call i32 @clk_set_rate(i32 noundef %30, i32 noundef 25000000) #2
%32 = icmp eq i32 %31, 0
br i1 %32, label %33, label %53
33: ; preds = %26
%34 = load ptr, ptr %1, align 8, !tbaa !6
%35 = load i64, ptr @EMAC_CLK_MDIO, align 8, !tbaa !11
%36 = getelementptr inbounds i32, ptr %34, i64 %35
%37 = load i32, ptr %36, align 4, !tbaa !13
%38 = tail call i32 @clk_prepare_enable(i32 noundef %37) #2
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %53
40: ; preds = %33
%41 = load ptr, ptr %1, align 8, !tbaa !6
%42 = load i64, ptr @EMAC_CLK_RX, align 8, !tbaa !11
%43 = getelementptr inbounds i32, ptr %41, i64 %42
%44 = load i32, ptr %43, align 4, !tbaa !13
%45 = tail call i32 @clk_prepare_enable(i32 noundef %44) #2
%46 = icmp eq i32 %45, 0
br i1 %46, label %47, label %53
47: ; preds = %40
%48 = load ptr, ptr %1, align 8, !tbaa !6
%49 = load i64, ptr @EMAC_CLK_SYS, align 8, !tbaa !11
%50 = getelementptr inbounds i32, ptr %48, i64 %49
%51 = load i32, ptr %50, align 4, !tbaa !13
%52 = tail call i32 @clk_prepare_enable(i32 noundef %51) #2
br label %53
53: ; preds = %40, %33, %26, %19, %12, %5, %2, %47
%54 = phi i32 [ %52, %47 ], [ 0, %2 ], [ %10, %5 ], [ %17, %12 ], [ %24, %19 ], [ %31, %26 ], [ %38, %33 ], [ %45, %40 ]
ret i32 %54
}
declare i64 @has_acpi_companion(ptr noundef) local_unnamed_addr #1
declare i32 @clk_set_rate(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @clk_prepare_enable(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"emac_adapter", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
|
linux_drivers_net_ethernet_qualcomm_emac_extr_emac.c_emac_clks_phase2_init
|
; ModuleID = 'AnghaBench/linux/fs/lockd/extr_svclock.c_nlmsvc_grant_release.c'
source_filename = "AnghaBench/linux/fs/lockd/extr_svclock.c_nlmsvc_grant_release.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @nlmsvc_grant_release], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @nlmsvc_grant_release(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = tail call i32 @nlmsvc_release_block(i32 noundef %2) #2
ret void
}
declare i32 @nlmsvc_release_block(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"nlm_rqst", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/fs/lockd/extr_svclock.c_nlmsvc_grant_release.c'
source_filename = "AnghaBench/linux/fs/lockd/extr_svclock.c_nlmsvc_grant_release.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @nlmsvc_grant_release], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @nlmsvc_grant_release(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call i32 @nlmsvc_release_block(i32 noundef %2) #2
ret void
}
declare i32 @nlmsvc_release_block(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"nlm_rqst", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
linux_fs_lockd_extr_svclock.c_nlmsvc_grant_release
|
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/musashi/extr_m68kopac.c_m68k_op_and_16_er_pi.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/musashi/extr_m68kopac.c_m68k_op_and_16_er_pi.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DX = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_Z = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_N = dso_local local_unnamed_addr global i32 0, align 4
@CFLAG_CLEAR = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_C = dso_local local_unnamed_addr global i32 0, align 4
@VFLAG_CLEAR = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_V = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @m68k_op_and_16_er_pi() local_unnamed_addr #0 {
%1 = tail call i32 (...) @OPER_AY_PI_16() #2
%2 = or i32 %1, -65536
%3 = load i32, ptr @DX, align 4, !tbaa !5
%4 = and i32 %3, %2
store i32 %4, ptr @DX, align 4, !tbaa !5
%5 = tail call i32 @MASK_OUT_ABOVE_16(i32 noundef %4) #2
store i32 %5, ptr @FLAG_Z, align 4, !tbaa !5
%6 = tail call i32 @NFLAG_16(i32 noundef %5) #2
store i32 %6, ptr @FLAG_N, align 4, !tbaa !5
%7 = load i32, ptr @CFLAG_CLEAR, align 4, !tbaa !5
store i32 %7, ptr @FLAG_C, align 4, !tbaa !5
%8 = load i32, ptr @VFLAG_CLEAR, align 4, !tbaa !5
store i32 %8, ptr @FLAG_V, align 4, !tbaa !5
ret void
}
declare i32 @MASK_OUT_ABOVE_16(i32 noundef) local_unnamed_addr #1
declare i32 @OPER_AY_PI_16(...) local_unnamed_addr #1
declare i32 @NFLAG_16(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/musashi/extr_m68kopac.c_m68k_op_and_16_er_pi.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/musashi/extr_m68kopac.c_m68k_op_and_16_er_pi.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DX = common local_unnamed_addr global i32 0, align 4
@FLAG_Z = common local_unnamed_addr global i32 0, align 4
@FLAG_N = common local_unnamed_addr global i32 0, align 4
@CFLAG_CLEAR = common local_unnamed_addr global i32 0, align 4
@FLAG_C = common local_unnamed_addr global i32 0, align 4
@VFLAG_CLEAR = common local_unnamed_addr global i32 0, align 4
@FLAG_V = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @m68k_op_and_16_er_pi() local_unnamed_addr #0 {
%1 = tail call i32 @OPER_AY_PI_16() #2
%2 = or i32 %1, -65536
%3 = load i32, ptr @DX, align 4, !tbaa !6
%4 = and i32 %3, %2
store i32 %4, ptr @DX, align 4, !tbaa !6
%5 = tail call i32 @MASK_OUT_ABOVE_16(i32 noundef %4) #2
store i32 %5, ptr @FLAG_Z, align 4, !tbaa !6
%6 = tail call i32 @NFLAG_16(i32 noundef %5) #2
store i32 %6, ptr @FLAG_N, align 4, !tbaa !6
%7 = load i32, ptr @CFLAG_CLEAR, align 4, !tbaa !6
store i32 %7, ptr @FLAG_C, align 4, !tbaa !6
%8 = load i32, ptr @VFLAG_CLEAR, align 4, !tbaa !6
store i32 %8, ptr @FLAG_V, align 4, !tbaa !6
ret void
}
declare i32 @MASK_OUT_ABOVE_16(i32 noundef) local_unnamed_addr #1
declare i32 @OPER_AY_PI_16(...) local_unnamed_addr #1
declare i32 @NFLAG_16(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
Provenance_Cores_Yabause_yabause_src_musashi_extr_m68kopac.c_m68k_op_and_16_er_pi
|
; ModuleID = 'AnghaBench/darwin-xnu/bsd/dev/arm64/extr_disassembler.c_arm_syscall_coproc.c'
source_filename = "AnghaBench/darwin-xnu/bsd/dev/arm64/extr_disassembler.c_arm_syscall_coproc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@FASTTRAP_T_INV = dso_local local_unnamed_addr global i32 0, align 4
@FASTTRAP_T_COMMON = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @arm_syscall_coproc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @arm_syscall_coproc(i32 noundef %0) #0 {
%2 = tail call i32 @BITS(i32 noundef %0, i32 noundef 20, i32 noundef 63) #2
%3 = tail call i32 @BITS(i32 noundef %0, i32 noundef 8, i32 noundef 15) #2
%4 = tail call i32 @BITS(i32 noundef %0, i32 noundef 4, i32 noundef 1) #2
%5 = and i32 %2, 62
%6 = icmp eq i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = and i32 %2, 48
%9 = icmp eq i32 %8, 48
br i1 %9, label %10, label %12
10: ; preds = %7, %1
%11 = load i32, ptr @FASTTRAP_T_INV, align 4, !tbaa !5
br label %37
12: ; preds = %7
%13 = and i32 %3, 14
%14 = icmp eq i32 %13, 10
br i1 %14, label %15, label %35
15: ; preds = %12
%16 = and i32 %2, 32
%17 = icmp ne i32 %16, 0
%18 = and i32 %2, 26
%19 = icmp eq i32 %18, 0
%20 = or i1 %17, %19
br i1 %20, label %23, label %21
21: ; preds = %15
%22 = tail call i32 @vfp_loadstore(i32 noundef %0) #2
br label %37
23: ; preds = %15
%24 = icmp eq i32 %5, 4
br i1 %24, label %25, label %27
25: ; preds = %23
%26 = tail call i32 @vfp_64transfer(i32 noundef %0) #2
br label %37
27: ; preds = %23
%28 = icmp eq i32 %8, 32
br i1 %28, label %29, label %35
29: ; preds = %27
%30 = icmp eq i32 %4, 0
br i1 %30, label %31, label %33
31: ; preds = %29
%32 = load i32, ptr @FASTTRAP_T_COMMON, align 4, !tbaa !5
br label %37
33: ; preds = %29
%34 = tail call i32 @vfp_transfer(i32 noundef %0) #2
br label %37
35: ; preds = %27, %12
%36 = load i32, ptr @FASTTRAP_T_INV, align 4, !tbaa !5
br label %37
37: ; preds = %35, %33, %31, %25, %21, %10
%38 = phi i32 [ %11, %10 ], [ %22, %21 ], [ %26, %25 ], [ %32, %31 ], [ %34, %33 ], [ %36, %35 ]
ret i32 %38
}
declare i32 @BITS(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vfp_loadstore(i32 noundef) local_unnamed_addr #1
declare i32 @vfp_64transfer(i32 noundef) local_unnamed_addr #1
declare i32 @vfp_transfer(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/darwin-xnu/bsd/dev/arm64/extr_disassembler.c_arm_syscall_coproc.c'
source_filename = "AnghaBench/darwin-xnu/bsd/dev/arm64/extr_disassembler.c_arm_syscall_coproc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FASTTRAP_T_INV = common local_unnamed_addr global i32 0, align 4
@FASTTRAP_T_COMMON = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @arm_syscall_coproc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @arm_syscall_coproc(i32 noundef %0) #0 {
%2 = tail call i32 @BITS(i32 noundef %0, i32 noundef 20, i32 noundef 63) #2
%3 = tail call i32 @BITS(i32 noundef %0, i32 noundef 8, i32 noundef 15) #2
%4 = tail call i32 @BITS(i32 noundef %0, i32 noundef 4, i32 noundef 1) #2
%5 = and i32 %2, 62
%6 = icmp eq i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = and i32 %2, 48
%9 = icmp eq i32 %8, 48
br i1 %9, label %10, label %12
10: ; preds = %7, %1
%11 = load i32, ptr @FASTTRAP_T_INV, align 4, !tbaa !6
br label %37
12: ; preds = %7
%13 = and i32 %3, 14
%14 = icmp eq i32 %13, 10
br i1 %14, label %15, label %35
15: ; preds = %12
%16 = and i32 %2, 32
%17 = icmp ne i32 %16, 0
%18 = and i32 %2, 26
%19 = icmp eq i32 %18, 0
%20 = or i1 %17, %19
br i1 %20, label %23, label %21
21: ; preds = %15
%22 = tail call i32 @vfp_loadstore(i32 noundef %0) #2
br label %37
23: ; preds = %15
%24 = icmp eq i32 %5, 4
br i1 %24, label %25, label %27
25: ; preds = %23
%26 = tail call i32 @vfp_64transfer(i32 noundef %0) #2
br label %37
27: ; preds = %23
%28 = icmp eq i32 %8, 32
br i1 %28, label %29, label %35
29: ; preds = %27
%30 = icmp eq i32 %4, 0
br i1 %30, label %31, label %33
31: ; preds = %29
%32 = load i32, ptr @FASTTRAP_T_COMMON, align 4, !tbaa !6
br label %37
33: ; preds = %29
%34 = tail call i32 @vfp_transfer(i32 noundef %0) #2
br label %37
35: ; preds = %27, %12
%36 = load i32, ptr @FASTTRAP_T_INV, align 4, !tbaa !6
br label %37
37: ; preds = %35, %33, %31, %25, %21, %10
%38 = phi i32 [ %11, %10 ], [ %22, %21 ], [ %26, %25 ], [ %32, %31 ], [ %34, %33 ], [ %36, %35 ]
ret i32 %38
}
declare i32 @BITS(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vfp_loadstore(i32 noundef) local_unnamed_addr #1
declare i32 @vfp_64transfer(i32 noundef) local_unnamed_addr #1
declare i32 @vfp_transfer(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
darwin-xnu_bsd_dev_arm64_extr_disassembler.c_arm_syscall_coproc
|
; ModuleID = 'AnghaBench/linux/drivers/of/extr_device.c_of_device_unregister.c'
source_filename = "AnghaBench/linux/drivers/of/extr_device.c_of_device_unregister.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @of_device_unregister(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @device_unregister(ptr noundef %0) #2
ret void
}
declare i32 @device_unregister(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/of/extr_device.c_of_device_unregister.c'
source_filename = "AnghaBench/linux/drivers/of/extr_device.c_of_device_unregister.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @of_device_unregister(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @device_unregister(ptr noundef %0) #2
ret void
}
declare i32 @device_unregister(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_of_extr_device.c_of_device_unregister
|
; ModuleID = 'AnghaBench/linux/drivers/mfd/extr_wm831x-core.c_wm831x_write.c'
source_filename = "AnghaBench/linux/drivers/mfd/extr_wm831x-core.c_wm831x_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wm831x = type { i32, i32 }
@EPERM = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"Write %04x to R%d(0x%x)\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @wm831x_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @wm831x_write(ptr noundef %0, i16 noundef zeroext %1, i32 noundef %2, ptr nocapture noundef readonly %3) #0 {
%5 = srem i32 %2, 2
%6 = tail call i32 @BUG_ON(i32 noundef %5) #2
%7 = icmp slt i32 %2, 1
%8 = zext i1 %7 to i32
%9 = tail call i32 @BUG_ON(i32 noundef %8) #2
%10 = icmp sgt i32 %2, 1
br i1 %10, label %11, label %36
11: ; preds = %4
%12 = lshr i32 %2, 1
%13 = getelementptr inbounds %struct.wm831x, ptr %0, i64 0, i32 1
%14 = zext nneg i32 %12 to i64
br label %18
15: ; preds = %25
%16 = add nuw nsw i64 %19, 1
%17 = icmp eq i64 %16, %14
br i1 %17, label %36, label %18, !llvm.loop !5
18: ; preds = %11, %15
%19 = phi i64 [ 0, %11 ], [ %16, %15 ]
%20 = tail call i64 @wm831x_reg_locked(ptr noundef %0, i16 noundef zeroext %1) #2
%21 = icmp eq i64 %20, 0
br i1 %21, label %25, label %22
22: ; preds = %18
%23 = load i32, ptr @EPERM, align 4, !tbaa !7
%24 = sub nsw i32 0, %23
br label %36
25: ; preds = %18
%26 = load i32, ptr %13, align 4, !tbaa !11
%27 = getelementptr inbounds i32, ptr %3, i64 %19
%28 = load i32, ptr %27, align 4, !tbaa !7
%29 = trunc i64 %19 to i16
%30 = add i16 %29, %1
%31 = tail call i32 @dev_vdbg(i32 noundef %26, ptr noundef nonnull @.str, i32 noundef %28, i16 noundef zeroext %30, i16 noundef zeroext %30) #2
%32 = load i32, ptr %0, align 4, !tbaa !13
%33 = load i32, ptr %27, align 4, !tbaa !7
%34 = tail call i32 @regmap_write(i32 noundef %32, i16 noundef zeroext %30, i32 noundef %33) #2
%35 = icmp eq i32 %34, 0
br i1 %35, label %15, label %36
36: ; preds = %25, %15, %4, %22
%37 = phi i32 [ %24, %22 ], [ 0, %4 ], [ %34, %25 ], [ 0, %15 ]
ret i32 %37
}
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
declare i64 @wm831x_reg_locked(ptr noundef, i16 noundef zeroext) local_unnamed_addr #1
declare i32 @dev_vdbg(i32 noundef, ptr noundef, i32 noundef, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #1
declare i32 @regmap_write(i32 noundef, i16 noundef zeroext, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 4}
!12 = !{!"wm831x", !8, i64 0, !8, i64 4}
!13 = !{!12, !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/mfd/extr_wm831x-core.c_wm831x_write.c'
source_filename = "AnghaBench/linux/drivers/mfd/extr_wm831x-core.c_wm831x_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EPERM = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"Write %04x to R%d(0x%x)\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @wm831x_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @wm831x_write(ptr noundef %0, i16 noundef zeroext %1, i32 noundef %2, ptr nocapture noundef readonly %3) #0 {
%5 = srem i32 %2, 2
%6 = tail call i32 @BUG_ON(i32 noundef %5) #2
%7 = icmp slt i32 %2, 1
%8 = zext i1 %7 to i32
%9 = tail call i32 @BUG_ON(i32 noundef %8) #2
%10 = icmp sgt i32 %2, 1
br i1 %10, label %11, label %36
11: ; preds = %4
%12 = lshr i32 %2, 1
%13 = getelementptr inbounds i8, ptr %0, i64 4
%14 = zext nneg i32 %12 to i64
br label %18
15: ; preds = %25
%16 = add nuw nsw i64 %19, 1
%17 = icmp eq i64 %16, %14
br i1 %17, label %36, label %18, !llvm.loop !6
18: ; preds = %11, %15
%19 = phi i64 [ 0, %11 ], [ %16, %15 ]
%20 = tail call i64 @wm831x_reg_locked(ptr noundef %0, i16 noundef zeroext %1) #2
%21 = icmp eq i64 %20, 0
br i1 %21, label %25, label %22
22: ; preds = %18
%23 = load i32, ptr @EPERM, align 4, !tbaa !8
%24 = sub nsw i32 0, %23
br label %36
25: ; preds = %18
%26 = load i32, ptr %13, align 4, !tbaa !12
%27 = getelementptr inbounds i32, ptr %3, i64 %19
%28 = load i32, ptr %27, align 4, !tbaa !8
%29 = trunc i64 %19 to i16
%30 = add i16 %29, %1
%31 = tail call i32 @dev_vdbg(i32 noundef %26, ptr noundef nonnull @.str, i32 noundef %28, i16 noundef zeroext %30, i16 noundef zeroext %30) #2
%32 = load i32, ptr %0, align 4, !tbaa !14
%33 = load i32, ptr %27, align 4, !tbaa !8
%34 = tail call i32 @regmap_write(i32 noundef %32, i16 noundef zeroext %30, i32 noundef %33) #2
%35 = icmp eq i32 %34, 0
br i1 %35, label %15, label %36
36: ; preds = %25, %15, %4, %22
%37 = phi i32 [ %24, %22 ], [ 0, %4 ], [ %34, %25 ], [ 0, %15 ]
ret i32 %37
}
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
declare i64 @wm831x_reg_locked(ptr noundef, i16 noundef zeroext) local_unnamed_addr #1
declare i32 @dev_vdbg(i32 noundef, ptr noundef, i32 noundef, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #1
declare i32 @regmap_write(i32 noundef, i16 noundef zeroext, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !9, i64 4}
!13 = !{!"wm831x", !9, i64 0, !9, i64 4}
!14 = !{!13, !9, i64 0}
|
linux_drivers_mfd_extr_wm831x-core.c_wm831x_write
|
; ModuleID = 'AnghaBench/linux/net/ceph/extr_auth_x.c_have_key.c'
source_filename = "AnghaBench/linux/net/ceph/extr_auth_x.c_have_key.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ceph_x_ticket_handler = type { i32, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @have_key], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @have_key(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = icmp eq i32 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1
%5 = tail call i64 (...) @ktime_get_real_seconds() #2
%6 = getelementptr inbounds %struct.ceph_x_ticket_handler, ptr %0, i64 0, i32 1
%7 = load i64, ptr %6, align 8, !tbaa !11
%8 = icmp slt i64 %5, %7
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = load i32, ptr %0, align 8, !tbaa !5
br label %12
11: ; preds = %4
store i32 0, ptr %0, align 8, !tbaa !5
br label %12
12: ; preds = %9, %11, %1
%13 = phi i32 [ %10, %9 ], [ 0, %11 ], [ 0, %1 ]
ret i32 %13
}
declare i64 @ktime_get_real_seconds(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ceph_x_ticket_handler", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !10, i64 8}
|
; ModuleID = 'AnghaBench/linux/net/ceph/extr_auth_x.c_have_key.c'
source_filename = "AnghaBench/linux/net/ceph/extr_auth_x.c_have_key.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @have_key], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @have_key(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1
%5 = tail call i64 @ktime_get_real_seconds() #2
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i64, ptr %6, align 8, !tbaa !12
%8 = icmp slt i64 %5, %7
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = load i32, ptr %0, align 8, !tbaa !6
br label %12
11: ; preds = %4
store i32 0, ptr %0, align 8, !tbaa !6
br label %12
12: ; preds = %9, %11, %1
%13 = phi i32 [ %10, %9 ], [ 0, %11 ], [ 0, %1 ]
ret i32 %13
}
declare i64 @ktime_get_real_seconds(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ceph_x_ticket_handler", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 8}
|
linux_net_ceph_extr_auth_x.c_have_key
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-ixp4xx/extr_common-pci.c_abort_handler.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-ixp4xx/extr_common-pci.c_abort_handler.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PCI_ISR = dso_local local_unnamed_addr global ptr null, align 8
@PCI_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [57 x i8] c"PCI: abort_handler addr = %#lx, isr = %#x, status = %#x\0A\00", align 1
@PCI_ISR_PFE = dso_local local_unnamed_addr global i32 0, align 4
@PCI_STATUS_REC_MASTER_ABORT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @abort_handler], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @abort_handler(i64 noundef %0, i32 noundef %1, ptr nocapture noundef %2) #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = load ptr, ptr @PCI_ISR, align 8, !tbaa !5
%6 = load i32, ptr %5, align 4, !tbaa !9
%7 = load i32, ptr @PCI_STATUS, align 4, !tbaa !9
%8 = call i32 @local_read_config(i32 noundef %7, i32 noundef 2, ptr noundef nonnull %4) #3
%9 = load i32, ptr %4, align 4, !tbaa !9
%10 = call i32 @pr_debug(ptr noundef nonnull @.str, i64 noundef %0, i32 noundef %6, i32 noundef %9) #3
%11 = load i32, ptr @PCI_ISR_PFE, align 4, !tbaa !9
%12 = load ptr, ptr @PCI_ISR, align 8, !tbaa !5
store i32 %11, ptr %12, align 4, !tbaa !9
%13 = load i32, ptr @PCI_STATUS_REC_MASTER_ABORT, align 4, !tbaa !9
%14 = load i32, ptr %4, align 4, !tbaa !9
%15 = or i32 %14, %13
store i32 %15, ptr %4, align 4, !tbaa !9
%16 = load i32, ptr @PCI_STATUS, align 4, !tbaa !9
%17 = call i32 @local_write_config(i32 noundef %16, i32 noundef 2, i32 noundef %15) #3
%18 = and i32 %1, 1024
%19 = icmp eq i32 %18, 0
br i1 %19, label %23, label %20
20: ; preds = %3
%21 = load i32, ptr %2, align 4, !tbaa !11
%22 = add nsw i32 %21, 4
store i32 %22, ptr %2, align 4, !tbaa !11
br label %23
23: ; preds = %20, %3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @local_read_config(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @pr_debug(ptr noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @local_write_config(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"pt_regs", !10, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-ixp4xx/extr_common-pci.c_abort_handler.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-ixp4xx/extr_common-pci.c_abort_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PCI_ISR = common local_unnamed_addr global ptr null, align 8
@PCI_STATUS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [57 x i8] c"PCI: abort_handler addr = %#lx, isr = %#x, status = %#x\0A\00", align 1
@PCI_ISR_PFE = common local_unnamed_addr global i32 0, align 4
@PCI_STATUS_REC_MASTER_ABORT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @abort_handler], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @abort_handler(i64 noundef %0, i32 noundef %1, ptr nocapture noundef %2) #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = load ptr, ptr @PCI_ISR, align 8, !tbaa !6
%6 = load i32, ptr %5, align 4, !tbaa !10
%7 = load i32, ptr @PCI_STATUS, align 4, !tbaa !10
%8 = call i32 @local_read_config(i32 noundef %7, i32 noundef 2, ptr noundef nonnull %4) #3
%9 = load i32, ptr %4, align 4, !tbaa !10
%10 = call i32 @pr_debug(ptr noundef nonnull @.str, i64 noundef %0, i32 noundef %6, i32 noundef %9) #3
%11 = load i32, ptr @PCI_ISR_PFE, align 4, !tbaa !10
%12 = load ptr, ptr @PCI_ISR, align 8, !tbaa !6
store i32 %11, ptr %12, align 4, !tbaa !10
%13 = load i32, ptr @PCI_STATUS_REC_MASTER_ABORT, align 4, !tbaa !10
%14 = load i32, ptr %4, align 4, !tbaa !10
%15 = or i32 %14, %13
store i32 %15, ptr %4, align 4, !tbaa !10
%16 = load i32, ptr @PCI_STATUS, align 4, !tbaa !10
%17 = call i32 @local_write_config(i32 noundef %16, i32 noundef 2, i32 noundef %15) #3
%18 = and i32 %1, 1024
%19 = icmp eq i32 %18, 0
br i1 %19, label %23, label %20
20: ; preds = %3
%21 = load i32, ptr %2, align 4, !tbaa !12
%22 = add nsw i32 %21, 4
store i32 %22, ptr %2, align 4, !tbaa !12
br label %23
23: ; preds = %20, %3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @local_read_config(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @pr_debug(ptr noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @local_write_config(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"pt_regs", !11, i64 0}
|
fastsocket_kernel_arch_arm_mach-ixp4xx_extr_common-pci.c_abort_handler
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/8390/extr_lib8390.c_ax__alloc_ei_netdev.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/8390/extr_lib8390.c_ax__alloc_ei_netdev.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [6 x i8] c"eth%d\00", align 1
@NET_NAME_UNKNOWN = dso_local local_unnamed_addr global i32 0, align 4
@ethdev_setup = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @____alloc_ei_netdev], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @____alloc_ei_netdev(i32 noundef %0) #0 {
%2 = add i32 %0, 4
%3 = load i32, ptr @NET_NAME_UNKNOWN, align 4, !tbaa !5
%4 = load i32, ptr @ethdev_setup, align 4, !tbaa !5
%5 = tail call ptr @alloc_netdev(i32 noundef %2, ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %4) #2
ret ptr %5
}
declare ptr @alloc_netdev(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/8390/extr_lib8390.c_ax__alloc_ei_netdev.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/8390/extr_lib8390.c_ax__alloc_ei_netdev.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [6 x i8] c"eth%d\00", align 1
@NET_NAME_UNKNOWN = common local_unnamed_addr global i32 0, align 4
@ethdev_setup = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @____alloc_ei_netdev], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @____alloc_ei_netdev(i32 noundef %0) #0 {
%2 = add i32 %0, 4
%3 = load i32, ptr @NET_NAME_UNKNOWN, align 4, !tbaa !6
%4 = load i32, ptr @ethdev_setup, align 4, !tbaa !6
%5 = tail call ptr @alloc_netdev(i32 noundef %2, ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %4) #2
ret ptr %5
}
declare ptr @alloc_netdev(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_net_ethernet_8390_extr_lib8390.c_ax__alloc_ei_netdev
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/controller/extr_atmegadci.c_atmegadci_interrupt.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/controller/extr_atmegadci.c_atmegadci_interrupt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.atmegadci_softc = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32, i32, i32, i32 }
@ATMEGA_UDINT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [14 x i8] c"UDINT=0x%02x\0A\00", align 1
@ATMEGA_UDINT_EORSTI = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [14 x i8] c"end of reset\0A\00", align 1
@ATMEGA_UDIEN = dso_local local_unnamed_addr global i32 0, align 4
@ATMEGA_UDINT_SUSPE = dso_local local_unnamed_addr global i32 0, align 4
@ATMEGA_UDINT_EORSTE = dso_local local_unnamed_addr global i32 0, align 4
@ATMEGA_UDINT_WAKEUPI = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [18 x i8] c"resume interrupt\0A\00", align 1
@ATMEGA_UDINT_SUSPI = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [19 x i8] c"suspend interrupt\0A\00", align 1
@ATMEGA_UDINT_WAKEUPE = dso_local local_unnamed_addr global i32 0, align 4
@ATMEGA_USBINT = dso_local local_unnamed_addr global i32 0, align 4
@ATMEGA_USBINT_VBUSTI = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [15 x i8] c"USBINT=0x%02x\0A\00", align 1
@ATMEGA_USBSTA = dso_local local_unnamed_addr global i32 0, align 4
@ATMEGA_USBSTA_VBUS = dso_local local_unnamed_addr global i32 0, align 4
@ATMEGA_UEINT = dso_local local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [38 x i8] c"real endpoint interrupt UEINT=0x%02x\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @atmegadci_interrupt(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @USB_BUS_LOCK(ptr noundef %0) #2
%3 = load i32, ptr @ATMEGA_UDINT, align 4, !tbaa !5
%4 = tail call i32 @ATMEGA_READ_1(ptr noundef %0, i32 noundef %3) #2
%5 = load i32, ptr @ATMEGA_UDINT, align 4, !tbaa !5
%6 = and i32 %4, 125
%7 = xor i32 %6, 125
%8 = tail call i32 @ATMEGA_WRITE_1(ptr noundef %0, i32 noundef %5, i32 noundef %7) #2
%9 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 14, ptr noundef nonnull @.str, i32 noundef %4) #2
%10 = load i32, ptr @ATMEGA_UDINT_EORSTI, align 4, !tbaa !5
%11 = and i32 %10, %4
%12 = icmp eq i32 %11, 0
br i1 %12, label %22, label %13
13: ; preds = %1
%14 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 5, ptr noundef nonnull @.str.1) #2
%15 = getelementptr inbounds %struct.atmegadci_softc, ptr %0, i64 0, i32 1
store <4 x i32> <i32 1, i32 0, i32 0, i32 1>, ptr %15, align 4, !tbaa !5
%16 = load i32, ptr @ATMEGA_UDIEN, align 4, !tbaa !5
%17 = load i32, ptr @ATMEGA_UDINT_SUSPE, align 4, !tbaa !5
%18 = load i32, ptr @ATMEGA_UDINT_EORSTE, align 4, !tbaa !5
%19 = or i32 %18, %17
%20 = tail call i32 @ATMEGA_WRITE_1(ptr noundef %0, i32 noundef %16, i32 noundef %19) #2
%21 = tail call i32 @atmegadci_root_intr(ptr noundef %0) #2
br label %22
22: ; preds = %13, %1
%23 = load i32, ptr @ATMEGA_UDINT_WAKEUPI, align 4, !tbaa !5
%24 = and i32 %23, %4
%25 = icmp eq i32 %24, 0
br i1 %25, label %32, label %26
26: ; preds = %22
%27 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 5, ptr noundef nonnull @.str.2) #2
%28 = getelementptr inbounds %struct.atmegadci_softc, ptr %0, i64 0, i32 1, i32 1
%29 = load i32, ptr %28, align 4, !tbaa !9
%30 = icmp eq i32 %29, 0
br i1 %30, label %51, label %31
31: ; preds = %26
store i32 0, ptr %28, align 4, !tbaa !9
br label %42
32: ; preds = %22
%33 = load i32, ptr @ATMEGA_UDINT_SUSPI, align 4, !tbaa !5
%34 = and i32 %33, %4
%35 = icmp eq i32 %34, 0
br i1 %35, label %51, label %36
36: ; preds = %32
%37 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 5, ptr noundef nonnull @.str.3) #2
%38 = getelementptr inbounds %struct.atmegadci_softc, ptr %0, i64 0, i32 1, i32 1
%39 = load i32, ptr %38, align 4, !tbaa !9
%40 = icmp eq i32 %39, 0
br i1 %40, label %41, label %51
41: ; preds = %36
store i32 1, ptr %38, align 4, !tbaa !9
br label %42
42: ; preds = %31, %41
%43 = phi ptr [ @ATMEGA_UDINT_WAKEUPE, %41 ], [ @ATMEGA_UDINT_SUSPE, %31 ]
%44 = getelementptr inbounds %struct.atmegadci_softc, ptr %0, i64 0, i32 1, i32 2
store i32 1, ptr %44, align 4, !tbaa !12
%45 = load i32, ptr @ATMEGA_UDIEN, align 4, !tbaa !5
%46 = load i32, ptr %43, align 4, !tbaa !5
%47 = load i32, ptr @ATMEGA_UDINT_EORSTE, align 4, !tbaa !5
%48 = or i32 %47, %46
%49 = tail call i32 @ATMEGA_WRITE_1(ptr noundef nonnull %0, i32 noundef %45, i32 noundef %48) #2
%50 = tail call i32 @atmegadci_root_intr(ptr noundef nonnull %0) #2
br label %51
51: ; preds = %42, %32, %36, %26
%52 = load i32, ptr @ATMEGA_USBINT, align 4, !tbaa !5
%53 = tail call i32 @ATMEGA_READ_1(ptr noundef %0, i32 noundef %52) #2
%54 = load i32, ptr @ATMEGA_USBINT, align 4, !tbaa !5
%55 = and i32 %53, 3
%56 = xor i32 %55, 3
%57 = tail call i32 @ATMEGA_WRITE_1(ptr noundef %0, i32 noundef %54, i32 noundef %56) #2
%58 = load i32, ptr @ATMEGA_USBINT_VBUSTI, align 4, !tbaa !5
%59 = and i32 %58, %53
%60 = icmp eq i32 %59, 0
br i1 %60, label %68, label %61
61: ; preds = %51
%62 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 5, ptr noundef nonnull @.str.4, i32 noundef %53) #2
%63 = load i32, ptr @ATMEGA_USBSTA, align 4, !tbaa !5
%64 = tail call i32 @ATMEGA_READ_1(ptr noundef %0, i32 noundef %63) #2
%65 = load i32, ptr @ATMEGA_USBSTA_VBUS, align 4, !tbaa !5
%66 = and i32 %65, %64
%67 = tail call i32 @atmegadci_vbus_interrupt(ptr noundef %0, i32 noundef %66) #2
br label %68
68: ; preds = %61, %51
%69 = load i32, ptr @ATMEGA_UEINT, align 4, !tbaa !5
%70 = tail call i32 @ATMEGA_READ_1(ptr noundef %0, i32 noundef %69) #2
%71 = icmp eq i32 %70, 0
br i1 %71, label %75, label %72
72: ; preds = %68
%73 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 5, ptr noundef nonnull @.str.5, i32 noundef %70) #2
%74 = tail call i32 @atmegadci_interrupt_poll(ptr noundef %0) #2
br label %75
75: ; preds = %72, %68
%76 = tail call i32 @USB_BUS_UNLOCK(ptr noundef %0) #2
ret void
}
declare i32 @USB_BUS_LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @ATMEGA_READ_1(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ATMEGA_WRITE_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DPRINTFN(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @atmegadci_root_intr(ptr noundef) local_unnamed_addr #1
declare i32 @atmegadci_vbus_interrupt(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @atmegadci_interrupt_poll(ptr noundef) local_unnamed_addr #1
declare i32 @USB_BUS_UNLOCK(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"atmegadci_softc", !6, i64 0, !11, i64 4}
!11 = !{!"TYPE_2__", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!12 = !{!10, !6, i64 12}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/controller/extr_atmegadci.c_atmegadci_interrupt.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/controller/extr_atmegadci.c_atmegadci_interrupt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ATMEGA_UDINT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [14 x i8] c"UDINT=0x%02x\0A\00", align 1
@ATMEGA_UDINT_EORSTI = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [14 x i8] c"end of reset\0A\00", align 1
@ATMEGA_UDIEN = common local_unnamed_addr global i32 0, align 4
@ATMEGA_UDINT_SUSPE = common local_unnamed_addr global i32 0, align 4
@ATMEGA_UDINT_EORSTE = common local_unnamed_addr global i32 0, align 4
@ATMEGA_UDINT_WAKEUPI = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [18 x i8] c"resume interrupt\0A\00", align 1
@ATMEGA_UDINT_SUSPI = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [19 x i8] c"suspend interrupt\0A\00", align 1
@ATMEGA_UDINT_WAKEUPE = common local_unnamed_addr global i32 0, align 4
@ATMEGA_USBINT = common local_unnamed_addr global i32 0, align 4
@ATMEGA_USBINT_VBUSTI = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [15 x i8] c"USBINT=0x%02x\0A\00", align 1
@ATMEGA_USBSTA = common local_unnamed_addr global i32 0, align 4
@ATMEGA_USBSTA_VBUS = common local_unnamed_addr global i32 0, align 4
@ATMEGA_UEINT = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [38 x i8] c"real endpoint interrupt UEINT=0x%02x\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @atmegadci_interrupt(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @USB_BUS_LOCK(ptr noundef %0) #2
%3 = load i32, ptr @ATMEGA_UDINT, align 4, !tbaa !6
%4 = tail call i32 @ATMEGA_READ_1(ptr noundef %0, i32 noundef %3) #2
%5 = load i32, ptr @ATMEGA_UDINT, align 4, !tbaa !6
%6 = and i32 %4, 125
%7 = xor i32 %6, 125
%8 = tail call i32 @ATMEGA_WRITE_1(ptr noundef %0, i32 noundef %5, i32 noundef %7) #2
%9 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 14, ptr noundef nonnull @.str, i32 noundef %4) #2
%10 = load i32, ptr @ATMEGA_UDINT_EORSTI, align 4, !tbaa !6
%11 = and i32 %10, %4
%12 = icmp eq i32 %11, 0
br i1 %12, label %22, label %13
13: ; preds = %1
%14 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 5, ptr noundef nonnull @.str.1) #2
%15 = getelementptr inbounds i8, ptr %0, i64 4
store <4 x i32> <i32 1, i32 0, i32 0, i32 1>, ptr %15, align 4, !tbaa !6
%16 = load i32, ptr @ATMEGA_UDIEN, align 4, !tbaa !6
%17 = load i32, ptr @ATMEGA_UDINT_SUSPE, align 4, !tbaa !6
%18 = load i32, ptr @ATMEGA_UDINT_EORSTE, align 4, !tbaa !6
%19 = or i32 %18, %17
%20 = tail call i32 @ATMEGA_WRITE_1(ptr noundef %0, i32 noundef %16, i32 noundef %19) #2
%21 = tail call i32 @atmegadci_root_intr(ptr noundef %0) #2
br label %22
22: ; preds = %13, %1
%23 = load i32, ptr @ATMEGA_UDINT_WAKEUPI, align 4, !tbaa !6
%24 = and i32 %23, %4
%25 = icmp eq i32 %24, 0
br i1 %25, label %32, label %26
26: ; preds = %22
%27 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 5, ptr noundef nonnull @.str.2) #2
%28 = getelementptr inbounds i8, ptr %0, i64 8
%29 = load i32, ptr %28, align 4, !tbaa !10
%30 = icmp eq i32 %29, 0
br i1 %30, label %51, label %31
31: ; preds = %26
store i32 0, ptr %28, align 4, !tbaa !10
br label %42
32: ; preds = %22
%33 = load i32, ptr @ATMEGA_UDINT_SUSPI, align 4, !tbaa !6
%34 = and i32 %33, %4
%35 = icmp eq i32 %34, 0
br i1 %35, label %51, label %36
36: ; preds = %32
%37 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 5, ptr noundef nonnull @.str.3) #2
%38 = getelementptr inbounds i8, ptr %0, i64 8
%39 = load i32, ptr %38, align 4, !tbaa !10
%40 = icmp eq i32 %39, 0
br i1 %40, label %41, label %51
41: ; preds = %36
store i32 1, ptr %38, align 4, !tbaa !10
br label %42
42: ; preds = %31, %41
%43 = phi ptr [ @ATMEGA_UDINT_WAKEUPE, %41 ], [ @ATMEGA_UDINT_SUSPE, %31 ]
%44 = getelementptr inbounds i8, ptr %0, i64 12
store i32 1, ptr %44, align 4, !tbaa !13
%45 = load i32, ptr @ATMEGA_UDIEN, align 4, !tbaa !6
%46 = load i32, ptr %43, align 4, !tbaa !6
%47 = load i32, ptr @ATMEGA_UDINT_EORSTE, align 4, !tbaa !6
%48 = or i32 %47, %46
%49 = tail call i32 @ATMEGA_WRITE_1(ptr noundef nonnull %0, i32 noundef %45, i32 noundef %48) #2
%50 = tail call i32 @atmegadci_root_intr(ptr noundef nonnull %0) #2
br label %51
51: ; preds = %42, %32, %36, %26
%52 = load i32, ptr @ATMEGA_USBINT, align 4, !tbaa !6
%53 = tail call i32 @ATMEGA_READ_1(ptr noundef %0, i32 noundef %52) #2
%54 = load i32, ptr @ATMEGA_USBINT, align 4, !tbaa !6
%55 = and i32 %53, 3
%56 = xor i32 %55, 3
%57 = tail call i32 @ATMEGA_WRITE_1(ptr noundef %0, i32 noundef %54, i32 noundef %56) #2
%58 = load i32, ptr @ATMEGA_USBINT_VBUSTI, align 4, !tbaa !6
%59 = and i32 %58, %53
%60 = icmp eq i32 %59, 0
br i1 %60, label %68, label %61
61: ; preds = %51
%62 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 5, ptr noundef nonnull @.str.4, i32 noundef %53) #2
%63 = load i32, ptr @ATMEGA_USBSTA, align 4, !tbaa !6
%64 = tail call i32 @ATMEGA_READ_1(ptr noundef %0, i32 noundef %63) #2
%65 = load i32, ptr @ATMEGA_USBSTA_VBUS, align 4, !tbaa !6
%66 = and i32 %65, %64
%67 = tail call i32 @atmegadci_vbus_interrupt(ptr noundef %0, i32 noundef %66) #2
br label %68
68: ; preds = %61, %51
%69 = load i32, ptr @ATMEGA_UEINT, align 4, !tbaa !6
%70 = tail call i32 @ATMEGA_READ_1(ptr noundef %0, i32 noundef %69) #2
%71 = icmp eq i32 %70, 0
br i1 %71, label %75, label %72
72: ; preds = %68
%73 = tail call i32 (i32, ptr, ...) @DPRINTFN(i32 noundef 5, ptr noundef nonnull @.str.5, i32 noundef %70) #2
%74 = tail call i32 @atmegadci_interrupt_poll(ptr noundef %0) #2
br label %75
75: ; preds = %72, %68
%76 = tail call i32 @USB_BUS_UNLOCK(ptr noundef %0) #2
ret void
}
declare i32 @USB_BUS_LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @ATMEGA_READ_1(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ATMEGA_WRITE_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DPRINTFN(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @atmegadci_root_intr(ptr noundef) local_unnamed_addr #1
declare i32 @atmegadci_vbus_interrupt(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @atmegadci_interrupt_poll(ptr noundef) local_unnamed_addr #1
declare i32 @USB_BUS_UNLOCK(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"atmegadci_softc", !7, i64 0, !12, i64 4}
!12 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!13 = !{!11, !7, i64 12}
|
freebsd_sys_dev_usb_controller_extr_atmegadci.c_atmegadci_interrupt
|
; ModuleID = 'AnghaBench/linux/drivers/iio/light/extr_vl6180.c_vl6180_init.c'
source_filename = "AnghaBench/linux/drivers/iio/light/extr_vl6180.c_vl6180_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vl6180_data = type { i32, i32, ptr }
@VL6180_MODEL_ID = dso_local local_unnamed_addr global i32 0, align 4
@VL6180_MODEL_ID_VAL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [23 x i8] c"invalid model ID %02x\0A\00", align 1
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@VL6180_OUT_OF_RESET = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [34 x i8] c"device is not fresh out of reset\0A\00", align 1
@VL6180_INTR_CONFIG = dso_local local_unnamed_addr global i32 0, align 4
@VL6180_ALS_READY = dso_local local_unnamed_addr global i32 0, align 4
@VL6180_RANGE_READY = dso_local local_unnamed_addr global i32 0, align 4
@VL6180_ALS_IT = dso_local local_unnamed_addr global i32 0, align 4
@VL6180_ALS_IT_100 = dso_local local_unnamed_addr global i32 0, align 4
@VL6180_ALS_GAIN = dso_local local_unnamed_addr global i32 0, align 4
@VL6180_ALS_GAIN_1 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @vl6180_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @vl6180_init(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.vl6180_data, ptr %0, i64 0, i32 2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i32, ptr @VL6180_MODEL_ID, align 4, !tbaa !11
%5 = tail call i32 @vl6180_read_byte(ptr noundef %3, i32 noundef %4) #2
%6 = icmp slt i32 %5, 0
br i1 %6, label %49, label %7
7: ; preds = %1
%8 = load i32, ptr @VL6180_MODEL_ID_VAL, align 4, !tbaa !11
%9 = icmp eq i32 %5, %8
br i1 %9, label %14, label %10
10: ; preds = %7
%11 = tail call i32 @dev_err(ptr noundef %3, ptr noundef nonnull @.str, i32 noundef %5) #2
%12 = load i32, ptr @ENODEV, align 4, !tbaa !11
%13 = sub nsw i32 0, %12
br label %49
14: ; preds = %7
%15 = tail call i32 @vl6180_hold(ptr noundef nonnull %0, i32 noundef 1) #2
%16 = icmp slt i32 %15, 0
br i1 %16, label %49, label %17
17: ; preds = %14
%18 = load i32, ptr @VL6180_OUT_OF_RESET, align 4, !tbaa !11
%19 = tail call i32 @vl6180_read_byte(ptr noundef %3, i32 noundef %18) #2
%20 = icmp slt i32 %19, 0
br i1 %20, label %49, label %21
21: ; preds = %17
%22 = icmp eq i32 %19, 1
br i1 %22, label %25, label %23
23: ; preds = %21
%24 = tail call i32 @dev_info(ptr noundef %3, ptr noundef nonnull @.str.1) #2
br label %25
25: ; preds = %23, %21
%26 = load i32, ptr @VL6180_INTR_CONFIG, align 4, !tbaa !11
%27 = load i32, ptr @VL6180_ALS_READY, align 4, !tbaa !11
%28 = load i32, ptr @VL6180_RANGE_READY, align 4, !tbaa !11
%29 = or i32 %28, %27
%30 = tail call i32 @vl6180_write_byte(ptr noundef %3, i32 noundef %26, i32 noundef %29) #2
%31 = icmp slt i32 %30, 0
br i1 %31, label %49, label %32
32: ; preds = %25
store i32 100, ptr %0, align 8, !tbaa !12
%33 = load i32, ptr @VL6180_ALS_IT, align 4, !tbaa !11
%34 = load i32, ptr @VL6180_ALS_IT_100, align 4, !tbaa !11
%35 = tail call i32 @vl6180_write_word(ptr noundef %3, i32 noundef %33, i32 noundef %34) #2
%36 = icmp slt i32 %35, 0
br i1 %36, label %49, label %37
37: ; preds = %32
%38 = getelementptr inbounds %struct.vl6180_data, ptr %0, i64 0, i32 1
store i32 1000, ptr %38, align 4, !tbaa !13
%39 = load i32, ptr @VL6180_ALS_GAIN, align 4, !tbaa !11
%40 = load i32, ptr @VL6180_ALS_GAIN_1, align 4, !tbaa !11
%41 = tail call i32 @vl6180_write_byte(ptr noundef %3, i32 noundef %39, i32 noundef %40) #2
%42 = icmp slt i32 %41, 0
br i1 %42, label %49, label %43
43: ; preds = %37
%44 = load i32, ptr @VL6180_OUT_OF_RESET, align 4, !tbaa !11
%45 = tail call i32 @vl6180_write_byte(ptr noundef %3, i32 noundef %44, i32 noundef 0) #2
%46 = icmp slt i32 %45, 0
br i1 %46, label %49, label %47
47: ; preds = %43
%48 = tail call i32 @vl6180_hold(ptr noundef nonnull %0, i32 noundef 0) #2
br label %49
49: ; preds = %43, %37, %32, %25, %17, %14, %1, %47, %10
%50 = phi i32 [ %13, %10 ], [ %48, %47 ], [ %5, %1 ], [ %15, %14 ], [ %19, %17 ], [ %30, %25 ], [ %35, %32 ], [ %41, %37 ], [ %45, %43 ]
ret i32 %50
}
declare i32 @vl6180_read_byte(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vl6180_hold(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_info(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vl6180_write_byte(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vl6180_write_word(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"vl6180_data", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!6, !7, i64 4}
|
; ModuleID = 'AnghaBench/linux/drivers/iio/light/extr_vl6180.c_vl6180_init.c'
source_filename = "AnghaBench/linux/drivers/iio/light/extr_vl6180.c_vl6180_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VL6180_MODEL_ID = common local_unnamed_addr global i32 0, align 4
@VL6180_MODEL_ID_VAL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [23 x i8] c"invalid model ID %02x\0A\00", align 1
@ENODEV = common local_unnamed_addr global i32 0, align 4
@VL6180_OUT_OF_RESET = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [34 x i8] c"device is not fresh out of reset\0A\00", align 1
@VL6180_INTR_CONFIG = common local_unnamed_addr global i32 0, align 4
@VL6180_ALS_READY = common local_unnamed_addr global i32 0, align 4
@VL6180_RANGE_READY = common local_unnamed_addr global i32 0, align 4
@VL6180_ALS_IT = common local_unnamed_addr global i32 0, align 4
@VL6180_ALS_IT_100 = common local_unnamed_addr global i32 0, align 4
@VL6180_ALS_GAIN = common local_unnamed_addr global i32 0, align 4
@VL6180_ALS_GAIN_1 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vl6180_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @vl6180_init(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i32, ptr @VL6180_MODEL_ID, align 4, !tbaa !12
%5 = tail call i32 @vl6180_read_byte(ptr noundef %3, i32 noundef %4) #2
%6 = icmp slt i32 %5, 0
br i1 %6, label %49, label %7
7: ; preds = %1
%8 = load i32, ptr @VL6180_MODEL_ID_VAL, align 4, !tbaa !12
%9 = icmp eq i32 %5, %8
br i1 %9, label %14, label %10
10: ; preds = %7
%11 = tail call i32 @dev_err(ptr noundef %3, ptr noundef nonnull @.str, i32 noundef %5) #2
%12 = load i32, ptr @ENODEV, align 4, !tbaa !12
%13 = sub nsw i32 0, %12
br label %49
14: ; preds = %7
%15 = tail call i32 @vl6180_hold(ptr noundef nonnull %0, i32 noundef 1) #2
%16 = icmp slt i32 %15, 0
br i1 %16, label %49, label %17
17: ; preds = %14
%18 = load i32, ptr @VL6180_OUT_OF_RESET, align 4, !tbaa !12
%19 = tail call i32 @vl6180_read_byte(ptr noundef %3, i32 noundef %18) #2
%20 = icmp slt i32 %19, 0
br i1 %20, label %49, label %21
21: ; preds = %17
%22 = icmp eq i32 %19, 1
br i1 %22, label %25, label %23
23: ; preds = %21
%24 = tail call i32 @dev_info(ptr noundef %3, ptr noundef nonnull @.str.1) #2
br label %25
25: ; preds = %23, %21
%26 = load i32, ptr @VL6180_INTR_CONFIG, align 4, !tbaa !12
%27 = load i32, ptr @VL6180_ALS_READY, align 4, !tbaa !12
%28 = load i32, ptr @VL6180_RANGE_READY, align 4, !tbaa !12
%29 = or i32 %28, %27
%30 = tail call i32 @vl6180_write_byte(ptr noundef %3, i32 noundef %26, i32 noundef %29) #2
%31 = icmp slt i32 %30, 0
br i1 %31, label %49, label %32
32: ; preds = %25
store i32 100, ptr %0, align 8, !tbaa !13
%33 = load i32, ptr @VL6180_ALS_IT, align 4, !tbaa !12
%34 = load i32, ptr @VL6180_ALS_IT_100, align 4, !tbaa !12
%35 = tail call i32 @vl6180_write_word(ptr noundef %3, i32 noundef %33, i32 noundef %34) #2
%36 = icmp slt i32 %35, 0
br i1 %36, label %49, label %37
37: ; preds = %32
%38 = getelementptr inbounds i8, ptr %0, i64 4
store i32 1000, ptr %38, align 4, !tbaa !14
%39 = load i32, ptr @VL6180_ALS_GAIN, align 4, !tbaa !12
%40 = load i32, ptr @VL6180_ALS_GAIN_1, align 4, !tbaa !12
%41 = tail call i32 @vl6180_write_byte(ptr noundef %3, i32 noundef %39, i32 noundef %40) #2
%42 = icmp slt i32 %41, 0
br i1 %42, label %49, label %43
43: ; preds = %37
%44 = load i32, ptr @VL6180_OUT_OF_RESET, align 4, !tbaa !12
%45 = tail call i32 @vl6180_write_byte(ptr noundef %3, i32 noundef %44, i32 noundef 0) #2
%46 = icmp slt i32 %45, 0
br i1 %46, label %49, label %47
47: ; preds = %43
%48 = tail call i32 @vl6180_hold(ptr noundef nonnull %0, i32 noundef 0) #2
br label %49
49: ; preds = %43, %37, %32, %25, %17, %14, %1, %47, %10
%50 = phi i32 [ %13, %10 ], [ %48, %47 ], [ %5, %1 ], [ %15, %14 ], [ %19, %17 ], [ %30, %25 ], [ %35, %32 ], [ %41, %37 ], [ %45, %43 ]
ret i32 %50
}
declare i32 @vl6180_read_byte(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vl6180_hold(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_info(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vl6180_write_byte(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vl6180_write_word(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"vl6180_data", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!7, !8, i64 4}
|
linux_drivers_iio_light_extr_vl6180.c_vl6180_init
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxr/extr_qlnxr_verbs.c_qlnxr_populate_phys_mem_pbls.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxr/extr_qlnxr_verbs.c_qlnxr_populate_phys_mem_pbls.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.qlnxr_pbl_info = type { i32, i32, i64 }
%struct.qlnxr_pbl = type { i64 }
%struct.ib_phys_buf = type { i32, i32 }
%struct.regpair = type { ptr, ptr }
@.str = private unnamed_addr constant [7 x i8] c"enter\0A\00", align 1
@.str.1 = private unnamed_addr constant [26 x i8] c"PBL_INFO not initialized\0A\00", align 1
@.str.2 = private unnamed_addr constant [25 x i8] c"pbl_info->num_pbes == 0\0A\00", align 1
@.str.3 = private unnamed_addr constant [13 x i8] c"pbe is NULL\0A\00", align 1
@PAGE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [80 x i8] c"Populate pbl table: pbe->addr=0x%x:0x%x pbe_cnt = %d total_num_pbes=%d pbe=%p\0A\00", align 1
@.str.5 = private unnamed_addr constant [6 x i8] c"exit\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @qlnxr_populate_phys_mem_pbls], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @qlnxr_populate_phys_mem_pbls(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr nocapture noundef readonly %3, ptr noundef readonly %4) #0 {
%6 = load ptr, ptr %0, align 8, !tbaa !5
%7 = tail call i32 (ptr, ptr, ...) @QL_DPRINT12(ptr noundef %6, ptr noundef nonnull @.str) #2
%8 = icmp eq ptr %4, null
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = tail call i32 @QL_DPRINT11(ptr noundef %6, ptr noundef nonnull @.str.1) #2
br label %90
11: ; preds = %5
%12 = load i32, ptr %4, align 8, !tbaa !10
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = tail call i32 @QL_DPRINT11(ptr noundef %6, ptr noundef nonnull @.str.2) #2
br label %90
16: ; preds = %11
%17 = getelementptr inbounds %struct.qlnxr_pbl_info, ptr %4, i64 0, i32 2
%18 = load i64, ptr %17, align 8, !tbaa !14
%19 = icmp ne i64 %18, 0
%20 = zext i1 %19 to i64
%21 = getelementptr inbounds %struct.qlnxr_pbl, ptr %3, i64 %20
%22 = load i64, ptr %21, align 8, !tbaa !15
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %16
%25 = tail call i32 (ptr, ptr, ...) @QL_DPRINT12(ptr noundef %6, ptr noundef nonnull @.str.3) #2
br label %90
26: ; preds = %16
%27 = icmp sgt i32 %2, 0
br i1 %27, label %28, label %88
28: ; preds = %26
%29 = inttoptr i64 %22 to ptr
%30 = getelementptr inbounds %struct.qlnxr_pbl_info, ptr %4, i64 0, i32 1
br label %31
31: ; preds = %28, %80
%32 = phi ptr [ %1, %28 ], [ %85, %80 ]
%33 = phi i32 [ 0, %28 ], [ %86, %80 ]
%34 = phi ptr [ %29, %28 ], [ %84, %80 ]
%35 = phi i32 [ 0, %28 ], [ %83, %80 ]
%36 = phi i32 [ 0, %28 ], [ %82, %80 ]
%37 = phi ptr [ %21, %28 ], [ %81, %80 ]
%38 = load i32, ptr %32, align 4, !tbaa !17
%39 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !19
%40 = ashr i32 %38, %39
%41 = icmp sgt i32 %40, 0
br i1 %41, label %42, label %80
42: ; preds = %31
%43 = getelementptr inbounds %struct.ib_phys_buf, ptr %32, i64 0, i32 1
br label %44
44: ; preds = %42, %74
%45 = phi ptr [ %34, %42 ], [ %77, %74 ]
%46 = phi i32 [ %35, %42 ], [ %59, %74 ]
%47 = phi i32 [ %36, %42 ], [ %76, %74 ]
%48 = phi ptr [ %37, %42 ], [ %75, %74 ]
%49 = phi i32 [ 0, %42 ], [ %78, %74 ]
%50 = load i32, ptr %43, align 4, !tbaa !20
%51 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !19
%52 = mul nsw i32 %51, %49
%53 = add nsw i32 %52, %50
%54 = tail call ptr @cpu_to_le32(i32 noundef %53) #2
%55 = getelementptr inbounds %struct.regpair, ptr %45, i64 0, i32 1
store ptr %54, ptr %55, align 8, !tbaa !21
%56 = tail call ptr @cpu_to_le32(i32 noundef poison) #2
store ptr %56, ptr %45, align 8, !tbaa !23
%57 = load ptr, ptr %55, align 8, !tbaa !21
%58 = tail call i32 (ptr, ptr, ...) @QL_DPRINT12(ptr noundef %6, ptr noundef nonnull @.str.4, ptr noundef %57, ptr noundef %56, i32 noundef %47, i32 noundef %46, ptr noundef nonnull %45) #2
%59 = add nsw i32 %46, 1
%60 = load i32, ptr %4, align 8, !tbaa !10
%61 = icmp eq i32 %59, %60
br i1 %61, label %90, label %62
62: ; preds = %44
%63 = getelementptr inbounds %struct.regpair, ptr %45, i64 1
%64 = add nsw i32 %47, 1
%65 = sext i32 %64 to i64
%66 = load i32, ptr %30, align 4, !tbaa !24
%67 = sext i32 %66 to i64
%68 = lshr i64 %67, 2
%69 = icmp eq i64 %68, %65
br i1 %69, label %70, label %74
70: ; preds = %62
%71 = getelementptr inbounds %struct.qlnxr_pbl, ptr %48, i64 1
%72 = load i64, ptr %71, align 8, !tbaa !15
%73 = inttoptr i64 %72 to ptr
br label %74
74: ; preds = %62, %70
%75 = phi ptr [ %71, %70 ], [ %48, %62 ]
%76 = phi i32 [ 0, %70 ], [ %64, %62 ]
%77 = phi ptr [ %73, %70 ], [ %63, %62 ]
%78 = add nuw nsw i32 %49, 1
%79 = icmp eq i32 %78, %40
br i1 %79, label %80, label %44, !llvm.loop !25
80: ; preds = %74, %31
%81 = phi ptr [ %37, %31 ], [ %75, %74 ]
%82 = phi i32 [ %36, %31 ], [ %76, %74 ]
%83 = phi i32 [ %35, %31 ], [ %59, %74 ]
%84 = phi ptr [ %34, %31 ], [ %77, %74 ]
%85 = getelementptr inbounds %struct.ib_phys_buf, ptr %32, i64 1
%86 = add nuw nsw i32 %33, 1
%87 = icmp eq i32 %86, %2
br i1 %87, label %88, label %31, !llvm.loop !27
88: ; preds = %80, %26
%89 = tail call i32 (ptr, ptr, ...) @QL_DPRINT12(ptr noundef %6, ptr noundef nonnull @.str.5) #2
br label %90
90: ; preds = %44, %88, %24, %14, %9
ret void
}
declare i32 @QL_DPRINT12(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @QL_DPRINT11(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @cpu_to_le32(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"qlnxr_dev", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"qlnxr_pbl_info", !12, i64 0, !12, i64 4, !13, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !13, i64 8}
!15 = !{!16, !13, i64 0}
!16 = !{!"qlnxr_pbl", !13, i64 0}
!17 = !{!18, !12, i64 0}
!18 = !{!"ib_phys_buf", !12, i64 0, !12, i64 4}
!19 = !{!12, !12, i64 0}
!20 = !{!18, !12, i64 4}
!21 = !{!22, !7, i64 8}
!22 = !{!"regpair", !7, i64 0, !7, i64 8}
!23 = !{!22, !7, i64 0}
!24 = !{!11, !12, i64 4}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = distinct !{!27, !26}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxr/extr_qlnxr_verbs.c_qlnxr_populate_phys_mem_pbls.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxr/extr_qlnxr_verbs.c_qlnxr_populate_phys_mem_pbls.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [7 x i8] c"enter\0A\00", align 1
@.str.1 = private unnamed_addr constant [26 x i8] c"PBL_INFO not initialized\0A\00", align 1
@.str.2 = private unnamed_addr constant [25 x i8] c"pbl_info->num_pbes == 0\0A\00", align 1
@.str.3 = private unnamed_addr constant [13 x i8] c"pbe is NULL\0A\00", align 1
@PAGE_SHIFT = common local_unnamed_addr global i32 0, align 4
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [80 x i8] c"Populate pbl table: pbe->addr=0x%x:0x%x pbe_cnt = %d total_num_pbes=%d pbe=%p\0A\00", align 1
@.str.5 = private unnamed_addr constant [6 x i8] c"exit\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @qlnxr_populate_phys_mem_pbls], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @qlnxr_populate_phys_mem_pbls(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr nocapture noundef readonly %3, ptr noundef readonly %4) #0 {
%6 = load ptr, ptr %0, align 8, !tbaa !6
%7 = tail call i32 (ptr, ptr, ...) @QL_DPRINT12(ptr noundef %6, ptr noundef nonnull @.str) #2
%8 = icmp eq ptr %4, null
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = tail call i32 @QL_DPRINT11(ptr noundef %6, ptr noundef nonnull @.str.1) #2
br label %90
11: ; preds = %5
%12 = load i32, ptr %4, align 8, !tbaa !11
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = tail call i32 @QL_DPRINT11(ptr noundef %6, ptr noundef nonnull @.str.2) #2
br label %90
16: ; preds = %11
%17 = getelementptr inbounds i8, ptr %4, i64 8
%18 = load i64, ptr %17, align 8, !tbaa !15
%19 = icmp eq i64 %18, 0
%20 = select i1 %19, i64 0, i64 8
%21 = getelementptr inbounds i8, ptr %3, i64 %20
%22 = load i64, ptr %21, align 8, !tbaa !16
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %16
%25 = tail call i32 (ptr, ptr, ...) @QL_DPRINT12(ptr noundef %6, ptr noundef nonnull @.str.3) #2
br label %90
26: ; preds = %16
%27 = icmp sgt i32 %2, 0
br i1 %27, label %28, label %88
28: ; preds = %26
%29 = inttoptr i64 %22 to ptr
%30 = getelementptr inbounds i8, ptr %4, i64 4
br label %31
31: ; preds = %28, %80
%32 = phi ptr [ %1, %28 ], [ %85, %80 ]
%33 = phi i32 [ 0, %28 ], [ %86, %80 ]
%34 = phi ptr [ %29, %28 ], [ %84, %80 ]
%35 = phi i32 [ 0, %28 ], [ %83, %80 ]
%36 = phi i32 [ 0, %28 ], [ %82, %80 ]
%37 = phi ptr [ %21, %28 ], [ %81, %80 ]
%38 = load i32, ptr %32, align 4, !tbaa !18
%39 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !20
%40 = ashr i32 %38, %39
%41 = icmp sgt i32 %40, 0
br i1 %41, label %42, label %80
42: ; preds = %31
%43 = getelementptr inbounds i8, ptr %32, i64 4
br label %44
44: ; preds = %42, %74
%45 = phi ptr [ %34, %42 ], [ %77, %74 ]
%46 = phi i32 [ %35, %42 ], [ %59, %74 ]
%47 = phi i32 [ %36, %42 ], [ %76, %74 ]
%48 = phi ptr [ %37, %42 ], [ %75, %74 ]
%49 = phi i32 [ 0, %42 ], [ %78, %74 ]
%50 = load i32, ptr %43, align 4, !tbaa !21
%51 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !20
%52 = mul nsw i32 %51, %49
%53 = add nsw i32 %52, %50
%54 = tail call ptr @cpu_to_le32(i32 noundef %53) #2
%55 = getelementptr inbounds i8, ptr %45, i64 8
store ptr %54, ptr %55, align 8, !tbaa !22
%56 = tail call ptr @cpu_to_le32(i32 noundef poison) #2
store ptr %56, ptr %45, align 8, !tbaa !24
%57 = load ptr, ptr %55, align 8, !tbaa !22
%58 = tail call i32 (ptr, ptr, ...) @QL_DPRINT12(ptr noundef %6, ptr noundef nonnull @.str.4, ptr noundef %57, ptr noundef %56, i32 noundef %47, i32 noundef %46, ptr noundef nonnull %45) #2
%59 = add nsw i32 %46, 1
%60 = load i32, ptr %4, align 8, !tbaa !11
%61 = icmp eq i32 %59, %60
br i1 %61, label %90, label %62
62: ; preds = %44
%63 = getelementptr inbounds i8, ptr %45, i64 16
%64 = add nsw i32 %47, 1
%65 = sext i32 %64 to i64
%66 = load i32, ptr %30, align 4, !tbaa !25
%67 = sext i32 %66 to i64
%68 = lshr i64 %67, 2
%69 = icmp eq i64 %68, %65
br i1 %69, label %70, label %74
70: ; preds = %62
%71 = getelementptr inbounds i8, ptr %48, i64 8
%72 = load i64, ptr %71, align 8, !tbaa !16
%73 = inttoptr i64 %72 to ptr
br label %74
74: ; preds = %62, %70
%75 = phi ptr [ %71, %70 ], [ %48, %62 ]
%76 = phi i32 [ 0, %70 ], [ %64, %62 ]
%77 = phi ptr [ %73, %70 ], [ %63, %62 ]
%78 = add nuw nsw i32 %49, 1
%79 = icmp eq i32 %78, %40
br i1 %79, label %80, label %44, !llvm.loop !26
80: ; preds = %74, %31
%81 = phi ptr [ %37, %31 ], [ %75, %74 ]
%82 = phi i32 [ %36, %31 ], [ %76, %74 ]
%83 = phi i32 [ %35, %31 ], [ %59, %74 ]
%84 = phi ptr [ %34, %31 ], [ %77, %74 ]
%85 = getelementptr inbounds i8, ptr %32, i64 8
%86 = add nuw nsw i32 %33, 1
%87 = icmp eq i32 %86, %2
br i1 %87, label %88, label %31, !llvm.loop !28
88: ; preds = %80, %26
%89 = tail call i32 (ptr, ptr, ...) @QL_DPRINT12(ptr noundef %6, ptr noundef nonnull @.str.5) #2
br label %90
90: ; preds = %44, %88, %24, %14, %9
ret void
}
declare i32 @QL_DPRINT12(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @QL_DPRINT11(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @cpu_to_le32(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"qlnxr_dev", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"qlnxr_pbl_info", !13, i64 0, !13, i64 4, !14, i64 8}
!13 = !{!"int", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!12, !14, i64 8}
!16 = !{!17, !14, i64 0}
!17 = !{!"qlnxr_pbl", !14, i64 0}
!18 = !{!19, !13, i64 0}
!19 = !{!"ib_phys_buf", !13, i64 0, !13, i64 4}
!20 = !{!13, !13, i64 0}
!21 = !{!19, !13, i64 4}
!22 = !{!23, !8, i64 8}
!23 = !{!"regpair", !8, i64 0, !8, i64 8}
!24 = !{!23, !8, i64 0}
!25 = !{!12, !13, i64 4}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = distinct !{!28, !27}
|
freebsd_sys_dev_qlnx_qlnxr_extr_qlnxr_verbs.c_qlnxr_populate_phys_mem_pbls
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/hptrr/extr_hptrr_os_bsd.c_os_pci_readb.c'
source_filename = "AnghaBench/freebsd/sys/dev/hptrr/extr_hptrr_os_bsd.c_os_pci_readb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @os_pci_readb(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call i32 @pci_read_config(i32 noundef %3, i32 noundef %1, i32 noundef 1) #2
ret i32 %4
}
declare i32 @pci_read_config(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/hptrr/extr_hptrr_os_bsd.c_os_pci_readb.c'
source_filename = "AnghaBench/freebsd/sys/dev/hptrr/extr_hptrr_os_bsd.c_os_pci_readb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @os_pci_readb(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call i32 @pci_read_config(i32 noundef %3, i32 noundef %1, i32 noundef 1) #2
ret i32 %4
}
declare i32 @pci_read_config(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
freebsd_sys_dev_hptrr_extr_hptrr_os_bsd.c_os_pci_readb
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_qlnx_ioctl.c_qlnx_eioctl.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_qlnx_ioctl.c_qlnx_eioctl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_22__ = type { ptr, i32, ptr }
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @qlnx_eioctl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @qlnx_eioctl(ptr nocapture noundef readonly %0, i32 noundef %1, i64 noundef %2, i32 %3, ptr nocapture readnone %4) #0 {
%6 = load i64, ptr %0, align 8, !tbaa !5
%7 = inttoptr i64 %6 to ptr
%8 = icmp eq i64 %6, 0
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = load i32, ptr @ENXIO, align 4, !tbaa !10
br label %86
11: ; preds = %5
switch i32 %1, label %84 [
i32 138, label %12
i32 139, label %15
i32 136, label %18
i32 137, label %21
i32 141, label %24
i32 142, label %27
i32 140, label %30
i32 134, label %33
i32 132, label %36
i32 133, label %39
i32 135, label %42
i32 130, label %45
i32 128, label %48
i32 129, label %51
]
12: ; preds = %11
%13 = inttoptr i64 %2 to ptr
%14 = tail call i32 @qlnx_get_grc_dump_size(ptr noundef nonnull %7, ptr noundef %13) #2
br label %86
15: ; preds = %11
%16 = inttoptr i64 %2 to ptr
%17 = tail call i32 @qlnx_get_grc_dump(ptr noundef nonnull %7, ptr noundef %16) #2
br label %86
18: ; preds = %11
%19 = inttoptr i64 %2 to ptr
%20 = tail call i32 @qlnx_get_idle_chk_size(ptr noundef nonnull %7, ptr noundef %19) #2
br label %86
21: ; preds = %11
%22 = inttoptr i64 %2 to ptr
%23 = tail call i32 @qlnx_get_idle_chk(ptr noundef nonnull %7, ptr noundef %22) #2
br label %86
24: ; preds = %11
%25 = inttoptr i64 %2 to ptr
%26 = tail call i32 @qlnx_drv_info(ptr noundef nonnull %7, ptr noundef %25) #2
br label %86
27: ; preds = %11
%28 = inttoptr i64 %2 to ptr
%29 = tail call i32 @qlnx_dev_settings(ptr noundef nonnull %7, ptr noundef %28) #2
br label %86
30: ; preds = %11
%31 = inttoptr i64 %2 to ptr
%32 = tail call i32 @qlnx_get_regs(ptr noundef nonnull %7, ptr noundef %31) #2
br label %86
33: ; preds = %11
%34 = inttoptr i64 %2 to ptr
%35 = tail call i32 @qlnx_nvram(ptr noundef nonnull %7, ptr noundef %34) #2
br label %86
36: ; preds = %11
%37 = inttoptr i64 %2 to ptr
%38 = tail call i32 @qlnx_reg_rd_wr(ptr noundef nonnull %7, ptr noundef %37) #2
br label %86
39: ; preds = %11
%40 = inttoptr i64 %2 to ptr
%41 = tail call i32 @qlnx_rd_wr_pci_config(ptr noundef nonnull %7, ptr noundef %40) #2
br label %86
42: ; preds = %11
%43 = inttoptr i64 %2 to ptr
%44 = tail call i32 @qlnx_mac_addr(ptr noundef nonnull %7, ptr noundef %43) #2
br label %86
45: ; preds = %11
%46 = inttoptr i64 %2 to ptr
%47 = tail call i32 @qlnx_storm_stats(ptr noundef nonnull %7, ptr noundef %46) #2
br label %86
48: ; preds = %11
%49 = inttoptr i64 %2 to ptr
%50 = tail call i32 @qlnx_get_trace_size(ptr noundef nonnull %7, ptr noundef %49) #2
br label %86
51: ; preds = %11
%52 = inttoptr i64 %2 to ptr
%53 = load i32, ptr %7, align 8, !tbaa !12
%54 = icmp sgt i32 %53, 0
br i1 %54, label %55, label %86
55: ; preds = %51
%56 = getelementptr inbounds %struct.TYPE_22__, ptr %52, i64 0, i32 2
%57 = getelementptr inbounds %struct.TYPE_22__, ptr %52, i64 0, i32 1
br label %58
58: ; preds = %55, %79
%59 = phi i32 [ %53, %55 ], [ %80, %79 ]
%60 = phi i64 [ 0, %55 ], [ %81, %79 ]
%61 = load ptr, ptr %56, align 8, !tbaa !16
%62 = getelementptr inbounds i32, ptr %61, i64 %60
%63 = load i32, ptr %62, align 4, !tbaa !10
%64 = icmp eq i32 %63, 0
br i1 %64, label %79, label %65
65: ; preds = %58
%66 = load i32, ptr %57, align 8, !tbaa !18
%67 = icmp eq i32 %66, 0
br i1 %67, label %79, label %68
68: ; preds = %65
%69 = load ptr, ptr %52, align 8, !tbaa !19
%70 = getelementptr inbounds i32, ptr %69, i64 %60
%71 = load i32, ptr %70, align 4, !tbaa !10
%72 = icmp eq i32 %71, 0
br i1 %72, label %79, label %73
73: ; preds = %68
%74 = trunc i64 %60 to i32
%75 = tail call i32 @qlnx_get_trace(ptr noundef nonnull %7, i32 noundef %74, ptr noundef nonnull %52) #2
%76 = icmp eq i32 %75, 0
br i1 %76, label %77, label %86
77: ; preds = %73
%78 = load i32, ptr %7, align 8, !tbaa !12
br label %79
79: ; preds = %77, %58, %65, %68
%80 = phi i32 [ %78, %77 ], [ %59, %58 ], [ %59, %65 ], [ %59, %68 ]
%81 = add nuw nsw i64 %60, 1
%82 = sext i32 %80 to i64
%83 = icmp slt i64 %81, %82
br i1 %83, label %58, label %86, !llvm.loop !20
84: ; preds = %11
%85 = load i32, ptr @EINVAL, align 4, !tbaa !10
br label %86
86: ; preds = %79, %73, %51, %12, %15, %18, %21, %24, %27, %30, %33, %36, %39, %42, %45, %48, %84, %9
%87 = phi i32 [ %10, %9 ], [ %85, %84 ], [ 0, %48 ], [ 0, %45 ], [ 0, %42 ], [ %41, %39 ], [ %38, %36 ], [ %35, %33 ], [ %32, %30 ], [ %29, %27 ], [ %26, %24 ], [ %23, %21 ], [ 0, %18 ], [ %17, %15 ], [ 0, %12 ], [ 0, %51 ], [ 0, %79 ], [ %75, %73 ]
ret i32 %87
}
declare i32 @qlnx_get_grc_dump_size(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_grc_dump(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_idle_chk_size(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_idle_chk(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_drv_info(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_dev_settings(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_regs(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_nvram(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_reg_rd_wr(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_rd_wr_pci_config(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_mac_addr(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_storm_stats(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_trace_size(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_trace(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cdev", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_23__", !14, i64 0, !15, i64 8}
!14 = !{!"TYPE_21__", !11, i64 0}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!17, !15, i64 16}
!17 = !{!"TYPE_22__", !15, i64 0, !11, i64 8, !15, i64 16}
!18 = !{!17, !11, i64 8}
!19 = !{!17, !15, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_qlnx_ioctl.c_qlnx_eioctl.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_qlnx_ioctl.c_qlnx_eioctl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENXIO = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @qlnx_eioctl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @qlnx_eioctl(ptr nocapture noundef readonly %0, i32 noundef %1, i64 noundef %2, i32 %3, ptr nocapture readnone %4) #0 {
%6 = load i64, ptr %0, align 8, !tbaa !6
%7 = inttoptr i64 %6 to ptr
%8 = icmp eq i64 %6, 0
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = load i32, ptr @ENXIO, align 4, !tbaa !11
br label %86
11: ; preds = %5
switch i32 %1, label %84 [
i32 138, label %12
i32 139, label %15
i32 136, label %18
i32 137, label %21
i32 141, label %24
i32 142, label %27
i32 140, label %30
i32 134, label %33
i32 132, label %36
i32 133, label %39
i32 135, label %42
i32 130, label %45
i32 128, label %48
i32 129, label %51
]
12: ; preds = %11
%13 = inttoptr i64 %2 to ptr
%14 = tail call i32 @qlnx_get_grc_dump_size(ptr noundef nonnull %7, ptr noundef %13) #2
br label %86
15: ; preds = %11
%16 = inttoptr i64 %2 to ptr
%17 = tail call i32 @qlnx_get_grc_dump(ptr noundef nonnull %7, ptr noundef %16) #2
br label %86
18: ; preds = %11
%19 = inttoptr i64 %2 to ptr
%20 = tail call i32 @qlnx_get_idle_chk_size(ptr noundef nonnull %7, ptr noundef %19) #2
br label %86
21: ; preds = %11
%22 = inttoptr i64 %2 to ptr
%23 = tail call i32 @qlnx_get_idle_chk(ptr noundef nonnull %7, ptr noundef %22) #2
br label %86
24: ; preds = %11
%25 = inttoptr i64 %2 to ptr
%26 = tail call i32 @qlnx_drv_info(ptr noundef nonnull %7, ptr noundef %25) #2
br label %86
27: ; preds = %11
%28 = inttoptr i64 %2 to ptr
%29 = tail call i32 @qlnx_dev_settings(ptr noundef nonnull %7, ptr noundef %28) #2
br label %86
30: ; preds = %11
%31 = inttoptr i64 %2 to ptr
%32 = tail call i32 @qlnx_get_regs(ptr noundef nonnull %7, ptr noundef %31) #2
br label %86
33: ; preds = %11
%34 = inttoptr i64 %2 to ptr
%35 = tail call i32 @qlnx_nvram(ptr noundef nonnull %7, ptr noundef %34) #2
br label %86
36: ; preds = %11
%37 = inttoptr i64 %2 to ptr
%38 = tail call i32 @qlnx_reg_rd_wr(ptr noundef nonnull %7, ptr noundef %37) #2
br label %86
39: ; preds = %11
%40 = inttoptr i64 %2 to ptr
%41 = tail call i32 @qlnx_rd_wr_pci_config(ptr noundef nonnull %7, ptr noundef %40) #2
br label %86
42: ; preds = %11
%43 = inttoptr i64 %2 to ptr
%44 = tail call i32 @qlnx_mac_addr(ptr noundef nonnull %7, ptr noundef %43) #2
br label %86
45: ; preds = %11
%46 = inttoptr i64 %2 to ptr
%47 = tail call i32 @qlnx_storm_stats(ptr noundef nonnull %7, ptr noundef %46) #2
br label %86
48: ; preds = %11
%49 = inttoptr i64 %2 to ptr
%50 = tail call i32 @qlnx_get_trace_size(ptr noundef nonnull %7, ptr noundef %49) #2
br label %86
51: ; preds = %11
%52 = inttoptr i64 %2 to ptr
%53 = load i32, ptr %7, align 8, !tbaa !13
%54 = icmp sgt i32 %53, 0
br i1 %54, label %55, label %86
55: ; preds = %51
%56 = getelementptr inbounds i8, ptr %52, i64 16
%57 = getelementptr inbounds i8, ptr %52, i64 8
br label %58
58: ; preds = %55, %79
%59 = phi i32 [ %53, %55 ], [ %80, %79 ]
%60 = phi i64 [ 0, %55 ], [ %81, %79 ]
%61 = load ptr, ptr %56, align 8, !tbaa !17
%62 = getelementptr inbounds i32, ptr %61, i64 %60
%63 = load i32, ptr %62, align 4, !tbaa !11
%64 = icmp eq i32 %63, 0
br i1 %64, label %79, label %65
65: ; preds = %58
%66 = load i32, ptr %57, align 8, !tbaa !19
%67 = icmp eq i32 %66, 0
br i1 %67, label %79, label %68
68: ; preds = %65
%69 = load ptr, ptr %52, align 8, !tbaa !20
%70 = getelementptr inbounds i32, ptr %69, i64 %60
%71 = load i32, ptr %70, align 4, !tbaa !11
%72 = icmp eq i32 %71, 0
br i1 %72, label %79, label %73
73: ; preds = %68
%74 = trunc nuw nsw i64 %60 to i32
%75 = tail call i32 @qlnx_get_trace(ptr noundef nonnull %7, i32 noundef %74, ptr noundef nonnull %52) #2
%76 = icmp eq i32 %75, 0
br i1 %76, label %77, label %86
77: ; preds = %73
%78 = load i32, ptr %7, align 8, !tbaa !13
br label %79
79: ; preds = %77, %58, %65, %68
%80 = phi i32 [ %78, %77 ], [ %59, %58 ], [ %59, %65 ], [ %59, %68 ]
%81 = add nuw nsw i64 %60, 1
%82 = sext i32 %80 to i64
%83 = icmp slt i64 %81, %82
br i1 %83, label %58, label %86, !llvm.loop !21
84: ; preds = %11
%85 = load i32, ptr @EINVAL, align 4, !tbaa !11
br label %86
86: ; preds = %79, %73, %51, %12, %15, %18, %21, %24, %27, %30, %33, %36, %39, %42, %45, %48, %84, %9
%87 = phi i32 [ %10, %9 ], [ %85, %84 ], [ 0, %48 ], [ 0, %45 ], [ 0, %42 ], [ %41, %39 ], [ %38, %36 ], [ %35, %33 ], [ %32, %30 ], [ %29, %27 ], [ %26, %24 ], [ %23, %21 ], [ 0, %18 ], [ %17, %15 ], [ 0, %12 ], [ 0, %51 ], [ 0, %79 ], [ %75, %73 ]
ret i32 %87
}
declare i32 @qlnx_get_grc_dump_size(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_grc_dump(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_idle_chk_size(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_idle_chk(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_drv_info(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_dev_settings(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_regs(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_nvram(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_reg_rd_wr(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_rd_wr_pci_config(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_mac_addr(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_storm_stats(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_trace_size(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qlnx_get_trace(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cdev", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_23__", !15, i64 0, !16, i64 8}
!15 = !{!"TYPE_21__", !12, i64 0}
!16 = !{!"any pointer", !9, i64 0}
!17 = !{!18, !16, i64 16}
!18 = !{!"TYPE_22__", !16, i64 0, !12, i64 8, !16, i64 16}
!19 = !{!18, !12, i64 8}
!20 = !{!18, !16, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
|
freebsd_sys_dev_qlnx_qlnxe_extr_qlnx_ioctl.c_qlnx_eioctl
|
; ModuleID = 'AnghaBench/postgres/src/backend/utils/adt/extr_windowfuncs.c_rank_up.c'
source_filename = "AnghaBench/postgres/src/backend/utils/adt/extr_windowfuncs.c_rank_up.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @rank_up], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @rank_up(i32 noundef %0) #0 {
%2 = tail call i64 @WinGetCurrentPosition(i32 noundef %0) #2
%3 = tail call i64 @WinGetPartitionLocalMemory(i32 noundef %0, i32 noundef 4) #2
%4 = inttoptr i64 %3 to ptr
%5 = load i32, ptr %4, align 4, !tbaa !5
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = icmp eq i64 %2, 0
%9 = zext i1 %8 to i32
%10 = tail call i32 @Assert(i32 noundef %9) #2
store i32 1, ptr %4, align 4, !tbaa !5
br label %19
11: ; preds = %1
%12 = icmp sgt i64 %2, 0
%13 = zext i1 %12 to i32
%14 = tail call i32 @Assert(i32 noundef %13) #2
%15 = add nsw i64 %2, -1
%16 = tail call i32 @WinRowsArePeers(i32 noundef %0, i64 noundef %15, i64 noundef %2) #2
%17 = icmp eq i32 %16, 0
%18 = zext i1 %17 to i32
br label %19
19: ; preds = %11, %7
%20 = phi i32 [ 0, %7 ], [ %18, %11 ]
%21 = tail call i32 @WinSetMarkPosition(i32 noundef %0, i64 noundef %2) #2
ret i32 %20
}
declare i64 @WinGetCurrentPosition(i32 noundef) local_unnamed_addr #1
declare i64 @WinGetPartitionLocalMemory(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @Assert(i32 noundef) local_unnamed_addr #1
declare i32 @WinRowsArePeers(i32 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @WinSetMarkPosition(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/postgres/src/backend/utils/adt/extr_windowfuncs.c_rank_up.c'
source_filename = "AnghaBench/postgres/src/backend/utils/adt/extr_windowfuncs.c_rank_up.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rank_up], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @rank_up(i32 noundef %0) #0 {
%2 = tail call i64 @WinGetCurrentPosition(i32 noundef %0) #2
%3 = tail call i64 @WinGetPartitionLocalMemory(i32 noundef %0, i32 noundef 4) #2
%4 = inttoptr i64 %3 to ptr
%5 = load i32, ptr %4, align 4, !tbaa !6
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = icmp eq i64 %2, 0
%9 = zext i1 %8 to i32
%10 = tail call i32 @Assert(i32 noundef %9) #2
store i32 1, ptr %4, align 4, !tbaa !6
br label %19
11: ; preds = %1
%12 = icmp sgt i64 %2, 0
%13 = zext i1 %12 to i32
%14 = tail call i32 @Assert(i32 noundef %13) #2
%15 = add nsw i64 %2, -1
%16 = tail call i32 @WinRowsArePeers(i32 noundef %0, i64 noundef %15, i64 noundef %2) #2
%17 = icmp eq i32 %16, 0
%18 = zext i1 %17 to i32
br label %19
19: ; preds = %11, %7
%20 = phi i32 [ 0, %7 ], [ %18, %11 ]
%21 = tail call i32 @WinSetMarkPosition(i32 noundef %0, i64 noundef %2) #2
ret i32 %20
}
declare i64 @WinGetCurrentPosition(i32 noundef) local_unnamed_addr #1
declare i64 @WinGetPartitionLocalMemory(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @Assert(i32 noundef) local_unnamed_addr #1
declare i32 @WinRowsArePeers(i32 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @WinSetMarkPosition(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
postgres_src_backend_utils_adt_extr_windowfuncs.c_rank_up
|
; ModuleID = 'AnghaBench/linux/net/rxrpc/extr_peer_object.c_rxrpc_create_peer.c'
source_filename = "AnghaBench/linux/net/rxrpc/extr_peer_object.c_rxrpc_create_peer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.1 = private unnamed_addr constant [6 x i8] c" = %p\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @rxrpc_create_peer], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @rxrpc_create_peer(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, i32 noundef %4) #0 {
%6 = tail call i32 @_enter(ptr noundef nonnull @.str) #2
%7 = tail call ptr @rxrpc_alloc_peer(ptr noundef %1, i32 noundef %4) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %12, label %9
9: ; preds = %5
%10 = tail call i32 @memcpy(ptr noundef nonnull %7, ptr noundef %2, i32 noundef 4) #2
%11 = tail call i32 @rxrpc_init_peer(ptr noundef %0, ptr noundef nonnull %7, i64 noundef %3) #2
br label %12
12: ; preds = %9, %5
%13 = tail call i32 @_leave(ptr noundef nonnull @.str.1, ptr noundef %7) #2
ret ptr %7
}
declare i32 @_enter(ptr noundef) local_unnamed_addr #1
declare ptr @rxrpc_alloc_peer(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rxrpc_init_peer(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @_leave(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/net/rxrpc/extr_peer_object.c_rxrpc_create_peer.c'
source_filename = "AnghaBench/linux/net/rxrpc/extr_peer_object.c_rxrpc_create_peer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.1 = private unnamed_addr constant [6 x i8] c" = %p\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @rxrpc_create_peer], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @rxrpc_create_peer(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, i32 noundef %4) #0 {
%6 = tail call i32 @_enter(ptr noundef nonnull @.str) #2
%7 = tail call ptr @rxrpc_alloc_peer(ptr noundef %1, i32 noundef %4) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %12, label %9
9: ; preds = %5
%10 = tail call i32 @memcpy(ptr noundef nonnull %7, ptr noundef %2, i32 noundef 4) #2
%11 = tail call i32 @rxrpc_init_peer(ptr noundef %0, ptr noundef nonnull %7, i64 noundef %3) #2
br label %12
12: ; preds = %9, %5
%13 = tail call i32 @_leave(ptr noundef nonnull @.str.1, ptr noundef %7) #2
ret ptr %7
}
declare i32 @_enter(ptr noundef) local_unnamed_addr #1
declare ptr @rxrpc_alloc_peer(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rxrpc_init_peer(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @_leave(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_net_rxrpc_extr_peer_object.c_rxrpc_create_peer
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_gdbarch_inner_than.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_gdbarch_inner_than.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@gdbarch_debug = dso_local local_unnamed_addr global i32 0, align 4
@gdb_stdlog = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [27 x i8] c"gdbarch_inner_than called\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @gdbarch_inner_than(ptr noundef readonly %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = icmp ne ptr %0, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @gdb_assert(i32 noundef %5) #2
%7 = load ptr, ptr %0, align 8, !tbaa !5
%8 = icmp ne ptr %7, null
%9 = zext i1 %8 to i32
%10 = tail call i32 @gdb_assert(i32 noundef %9) #2
%11 = load i32, ptr @gdbarch_debug, align 4, !tbaa !10
%12 = icmp sgt i32 %11, 1
br i1 %12, label %13, label %16
13: ; preds = %3
%14 = load i32, ptr @gdb_stdlog, align 4, !tbaa !10
%15 = tail call i32 @fprintf_unfiltered(i32 noundef %14, ptr noundef nonnull @.str) #2
br label %16
16: ; preds = %13, %3
%17 = load ptr, ptr %0, align 8, !tbaa !5
%18 = tail call i32 %17(i32 noundef %1, i32 noundef %2) #2
ret i32 %18
}
declare i32 @gdb_assert(i32 noundef) local_unnamed_addr #1
declare i32 @fprintf_unfiltered(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"gdbarch", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_gdbarch_inner_than.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_gdbarch_inner_than.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@gdbarch_debug = common local_unnamed_addr global i32 0, align 4
@gdb_stdlog = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [27 x i8] c"gdbarch_inner_than called\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @gdbarch_inner_than(ptr noundef readonly %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = icmp ne ptr %0, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @gdb_assert(i32 noundef %5) #2
%7 = load ptr, ptr %0, align 8, !tbaa !6
%8 = icmp ne ptr %7, null
%9 = zext i1 %8 to i32
%10 = tail call i32 @gdb_assert(i32 noundef %9) #2
%11 = load i32, ptr @gdbarch_debug, align 4, !tbaa !11
%12 = icmp sgt i32 %11, 1
br i1 %12, label %13, label %16
13: ; preds = %3
%14 = load i32, ptr @gdb_stdlog, align 4, !tbaa !11
%15 = tail call i32 @fprintf_unfiltered(i32 noundef %14, ptr noundef nonnull @.str) #2
br label %16
16: ; preds = %13, %3
%17 = load ptr, ptr %0, align 8, !tbaa !6
%18 = tail call i32 %17(i32 noundef %1, i32 noundef %2) #2
ret i32 %18
}
declare i32 @gdb_assert(i32 noundef) local_unnamed_addr #1
declare i32 @fprintf_unfiltered(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"gdbarch", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
|
freebsd_contrib_gdb_gdb_extr_gdbarch.c_gdbarch_inner_than
|
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_gl518sm.c_fan_min_show.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_gl518sm.c_fan_min_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.gl518_data = type { ptr, ptr }
@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @fan_min_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @fan_min_show(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @to_sensor_dev_attr(ptr noundef %1) #2
%5 = load i32, ptr %4, align 4, !tbaa !5
%6 = tail call ptr @gl518_update_device(ptr noundef %0) #2
%7 = getelementptr inbounds %struct.gl518_data, ptr %6, i64 0, i32 1
%8 = load ptr, ptr %7, align 8, !tbaa !10
%9 = sext i32 %5 to i64
%10 = getelementptr inbounds i32, ptr %8, i64 %9
%11 = load i32, ptr %10, align 4, !tbaa !13
%12 = load ptr, ptr %6, align 8, !tbaa !14
%13 = getelementptr inbounds i32, ptr %12, i64 %9
%14 = load i32, ptr %13, align 4, !tbaa !13
%15 = tail call i32 @DIV_FROM_REG(i32 noundef %14) #2
%16 = tail call i32 @FAN_FROM_REG(i32 noundef %11, i32 noundef %15) #2
%17 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %16) #2
ret i32 %17
}
declare ptr @to_sensor_dev_attr(ptr noundef) local_unnamed_addr #1
declare ptr @gl518_update_device(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @FAN_FROM_REG(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DIV_FROM_REG(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"gl518_data", !12, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!11, !12, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_gl518sm.c_fan_min_show.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_gl518sm.c_fan_min_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @fan_min_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @fan_min_show(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @to_sensor_dev_attr(ptr noundef %1) #2
%5 = load i32, ptr %4, align 4, !tbaa !6
%6 = tail call ptr @gl518_update_device(ptr noundef %0) #2
%7 = getelementptr inbounds i8, ptr %6, i64 8
%8 = load ptr, ptr %7, align 8, !tbaa !11
%9 = sext i32 %5 to i64
%10 = getelementptr inbounds i32, ptr %8, i64 %9
%11 = load i32, ptr %10, align 4, !tbaa !14
%12 = load ptr, ptr %6, align 8, !tbaa !15
%13 = getelementptr inbounds i32, ptr %12, i64 %9
%14 = load i32, ptr %13, align 4, !tbaa !14
%15 = tail call i32 @DIV_FROM_REG(i32 noundef %14) #2
%16 = tail call i32 @FAN_FROM_REG(i32 noundef %11, i32 noundef %15) #2
%17 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %16) #2
ret i32 %17
}
declare ptr @to_sensor_dev_attr(ptr noundef) local_unnamed_addr #1
declare ptr @gl518_update_device(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @FAN_FROM_REG(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DIV_FROM_REG(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 8}
!12 = !{!"gl518_data", !13, i64 0, !13, i64 8}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!12, !13, i64 0}
|
linux_drivers_hwmon_extr_gl518sm.c_fan_min_show
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_wa.c_b43_wa_crs_reset.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_wa.c_b43_wa_crs_reset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @b43_wa_crs_reset], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @b43_wa_crs_reset(ptr noundef %0) #0 {
%2 = tail call i32 @b43_phy_write(ptr noundef %0, i32 noundef 44, i32 noundef 100) #2
ret void
}
declare i32 @b43_phy_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_wa.c_b43_wa_crs_reset.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_wa.c_b43_wa_crs_reset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @b43_wa_crs_reset], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @b43_wa_crs_reset(ptr noundef %0) #0 {
%2 = tail call i32 @b43_phy_write(ptr noundef %0, i32 noundef 44, i32 noundef 100) #2
ret void
}
declare i32 @b43_phy_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_drivers_net_wireless_b43_extr_wa.c_b43_wa_crs_reset
|
; ModuleID = 'AnghaBench/linux/drivers/counter/extr_104-quad-8.c_quad8_probe.c'
source_filename = "AnghaBench/linux/drivers/counter/extr_104-quad-8.c_quad8_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.iio_dev = type { %struct.TYPE_3__, ptr, ptr, ptr, i32, ptr }
%struct.TYPE_3__ = type { ptr }
%struct.quad8_iio = type { i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
@base = dso_local local_unnamed_addr global ptr null, align 8
@QUAD8_EXTENT = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [43 x i8] c"Unable to lock port addresses (0x%X-0x%X)\0A\00", align 1
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@quad8_info = dso_local global i32 0, align 4
@INDIO_DIRECT_MODE = dso_local local_unnamed_addr global i32 0, align 4
@quad8_channels = dso_local local_unnamed_addr global ptr null, align 8
@quad8_ops = dso_local global i32 0, align 4
@quad8_counts = dso_local local_unnamed_addr global ptr null, align 8
@quad8_signals = dso_local local_unnamed_addr global ptr null, align 8
@QUAD8_CHAN_OP_RESET_COUNTERS = dso_local local_unnamed_addr global i32 0, align 4
@QUAD8_REG_CHAN_OP = dso_local local_unnamed_addr global i32 0, align 4
@QUAD8_NUM_COUNTERS = dso_local local_unnamed_addr global i32 0, align 4
@QUAD8_CTR_RLD = dso_local local_unnamed_addr global i32 0, align 4
@QUAD8_RLD_RESET_BP = dso_local local_unnamed_addr global i32 0, align 4
@QUAD8_RLD_RESET_FLAGS = dso_local local_unnamed_addr global i32 0, align 4
@QUAD8_RLD_RESET_E = dso_local local_unnamed_addr global i32 0, align 4
@QUAD8_CTR_CMR = dso_local local_unnamed_addr global i32 0, align 4
@QUAD8_CTR_IOR = dso_local local_unnamed_addr global i32 0, align 4
@QUAD8_CTR_IDR = dso_local local_unnamed_addr global i32 0, align 4
@QUAD8_CHAN_OP_ENABLE_COUNTERS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @quad8_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @quad8_probe(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr @base, align 8, !tbaa !5
%4 = zext i32 %1 to i64
%5 = getelementptr inbounds i32, ptr %3, i64 %4
%6 = load i32, ptr %5, align 4, !tbaa !9
%7 = load i64, ptr @QUAD8_EXTENT, align 8, !tbaa !11
%8 = tail call ptr @dev_name(ptr noundef %0) #2
%9 = tail call i32 @devm_request_region(ptr noundef %0, i32 noundef %6, i64 noundef %7, ptr noundef %8) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %2
%12 = load ptr, ptr @base, align 8, !tbaa !5
%13 = getelementptr inbounds i32, ptr %12, i64 %4
%14 = load i32, ptr %13, align 4, !tbaa !9
%15 = sext i32 %14 to i64
%16 = load i64, ptr @QUAD8_EXTENT, align 8, !tbaa !11
%17 = add nsw i64 %16, %15
%18 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %14, i64 noundef %17) #2
%19 = load i32, ptr @EBUSY, align 4, !tbaa !9
%20 = sub nsw i32 0, %19
br label %105
21: ; preds = %2
%22 = tail call ptr @devm_iio_device_alloc(ptr noundef %0, i32 noundef 72) #2
%23 = icmp eq ptr %22, null
br i1 %23, label %24, label %27
24: ; preds = %21
%25 = load i32, ptr @ENOMEM, align 4, !tbaa !9
%26 = sub nsw i32 0, %25
br label %105
27: ; preds = %21
%28 = getelementptr inbounds %struct.iio_dev, ptr %22, i64 0, i32 5
store ptr @quad8_info, ptr %28, align 8, !tbaa !13
%29 = load i32, ptr @INDIO_DIRECT_MODE, align 4, !tbaa !9
%30 = getelementptr inbounds %struct.iio_dev, ptr %22, i64 0, i32 4
store i32 %29, ptr %30, align 8, !tbaa !16
%31 = load ptr, ptr @quad8_channels, align 8, !tbaa !5
%32 = tail call ptr @ARRAY_SIZE(ptr noundef %31) #2
%33 = getelementptr inbounds %struct.iio_dev, ptr %22, i64 0, i32 3
store ptr %32, ptr %33, align 8, !tbaa !17
%34 = load ptr, ptr @quad8_channels, align 8, !tbaa !5
%35 = getelementptr inbounds %struct.iio_dev, ptr %22, i64 0, i32 2
store ptr %34, ptr %35, align 8, !tbaa !18
%36 = tail call ptr @dev_name(ptr noundef %0) #2
%37 = getelementptr inbounds %struct.iio_dev, ptr %22, i64 0, i32 1
store ptr %36, ptr %37, align 8, !tbaa !19
store ptr %0, ptr %22, align 8, !tbaa !20
%38 = tail call ptr @iio_priv(ptr noundef nonnull %22) #2
%39 = tail call ptr @dev_name(ptr noundef %0) #2
%40 = getelementptr inbounds %struct.quad8_iio, ptr %38, i64 0, i32 1
%41 = getelementptr inbounds %struct.quad8_iio, ptr %38, i64 0, i32 1, i32 7
store ptr %39, ptr %41, align 8, !tbaa !21
%42 = getelementptr inbounds %struct.quad8_iio, ptr %38, i64 0, i32 1, i32 6
store ptr %0, ptr %42, align 8, !tbaa !24
%43 = getelementptr inbounds %struct.quad8_iio, ptr %38, i64 0, i32 1, i32 5
store ptr @quad8_ops, ptr %43, align 8, !tbaa !25
%44 = load ptr, ptr @quad8_counts, align 8, !tbaa !5
%45 = getelementptr inbounds %struct.quad8_iio, ptr %38, i64 0, i32 1, i32 4
store ptr %44, ptr %45, align 8, !tbaa !26
%46 = tail call ptr @ARRAY_SIZE(ptr noundef %44) #2
%47 = getelementptr inbounds %struct.quad8_iio, ptr %38, i64 0, i32 1, i32 3
store ptr %46, ptr %47, align 8, !tbaa !27
%48 = load ptr, ptr @quad8_signals, align 8, !tbaa !5
%49 = getelementptr inbounds %struct.quad8_iio, ptr %38, i64 0, i32 1, i32 2
store ptr %48, ptr %49, align 8, !tbaa !28
%50 = tail call ptr @ARRAY_SIZE(ptr noundef %48) #2
%51 = getelementptr inbounds %struct.quad8_iio, ptr %38, i64 0, i32 1, i32 1
store ptr %50, ptr %51, align 8, !tbaa !29
store ptr %38, ptr %40, align 8, !tbaa !30
%52 = load ptr, ptr @base, align 8, !tbaa !5
%53 = getelementptr inbounds i32, ptr %52, i64 %4
%54 = load i32, ptr %53, align 4, !tbaa !9
store i32 %54, ptr %38, align 8, !tbaa !31
%55 = load i32, ptr @QUAD8_CHAN_OP_RESET_COUNTERS, align 4, !tbaa !9
%56 = load i32, ptr @QUAD8_REG_CHAN_OP, align 4, !tbaa !9
%57 = add nsw i32 %56, %54
%58 = tail call i32 @outb(i32 noundef %55, i32 noundef %57) #2
%59 = load i32, ptr @QUAD8_NUM_COUNTERS, align 4, !tbaa !9
%60 = icmp sgt i32 %59, 0
br i1 %60, label %61, label %93
61: ; preds = %27, %61
%62 = phi i32 [ %90, %61 ], [ 0, %27 ]
%63 = load ptr, ptr @base, align 8, !tbaa !5
%64 = getelementptr inbounds i32, ptr %63, i64 %4
%65 = load i32, ptr %64, align 4, !tbaa !9
%66 = shl nuw nsw i32 %62, 1
%67 = add nsw i32 %65, %66
%68 = load i32, ptr @QUAD8_CTR_RLD, align 4, !tbaa !9
%69 = load i32, ptr @QUAD8_RLD_RESET_BP, align 4, !tbaa !9
%70 = or i32 %69, %68
%71 = add i32 %67, 1
%72 = tail call i32 @outb(i32 noundef %70, i32 noundef %71) #2
%73 = tail call i32 @outb(i32 noundef 0, i32 noundef %67) #2
%74 = tail call i32 @outb(i32 noundef 0, i32 noundef %67) #2
%75 = tail call i32 @outb(i32 noundef 0, i32 noundef %67) #2
%76 = load i32, ptr @QUAD8_CTR_RLD, align 4, !tbaa !9
%77 = load i32, ptr @QUAD8_RLD_RESET_FLAGS, align 4, !tbaa !9
%78 = or i32 %77, %76
%79 = tail call i32 @outb(i32 noundef %78, i32 noundef %71) #2
%80 = load i32, ptr @QUAD8_CTR_RLD, align 4, !tbaa !9
%81 = load i32, ptr @QUAD8_RLD_RESET_E, align 4, !tbaa !9
%82 = or i32 %81, %80
%83 = tail call i32 @outb(i32 noundef %82, i32 noundef %71) #2
%84 = load i32, ptr @QUAD8_CTR_CMR, align 4, !tbaa !9
%85 = tail call i32 @outb(i32 noundef %84, i32 noundef %71) #2
%86 = load i32, ptr @QUAD8_CTR_IOR, align 4, !tbaa !9
%87 = tail call i32 @outb(i32 noundef %86, i32 noundef %71) #2
%88 = load i32, ptr @QUAD8_CTR_IDR, align 4, !tbaa !9
%89 = tail call i32 @outb(i32 noundef %88, i32 noundef %71) #2
%90 = add nuw nsw i32 %62, 1
%91 = load i32, ptr @QUAD8_NUM_COUNTERS, align 4, !tbaa !9
%92 = icmp slt i32 %90, %91
br i1 %92, label %61, label %93, !llvm.loop !32
93: ; preds = %61, %27
%94 = load i32, ptr @QUAD8_CHAN_OP_ENABLE_COUNTERS, align 4, !tbaa !9
%95 = load ptr, ptr @base, align 8, !tbaa !5
%96 = getelementptr inbounds i32, ptr %95, i64 %4
%97 = load i32, ptr %96, align 4, !tbaa !9
%98 = load i32, ptr @QUAD8_REG_CHAN_OP, align 4, !tbaa !9
%99 = add nsw i32 %98, %97
%100 = tail call i32 @outb(i32 noundef %94, i32 noundef %99) #2
%101 = tail call i32 @devm_iio_device_register(ptr noundef %0, ptr noundef nonnull %22) #2
%102 = icmp eq i32 %101, 0
br i1 %102, label %103, label %105
103: ; preds = %93
%104 = tail call i32 @devm_counter_register(ptr noundef %0, ptr noundef nonnull %40) #2
br label %105
105: ; preds = %93, %103, %24, %11
%106 = phi i32 [ %104, %103 ], [ %26, %24 ], [ %20, %11 ], [ %101, %93 ]
ret i32 %106
}
declare i32 @devm_request_region(ptr noundef, i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @dev_name(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare ptr @devm_iio_device_alloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare ptr @iio_priv(ptr noundef) local_unnamed_addr #1
declare i32 @outb(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @devm_iio_device_register(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @devm_counter_register(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !6, i64 40}
!14 = !{!"iio_dev", !15, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !10, i64 32, !6, i64 40}
!15 = !{!"TYPE_3__", !6, i64 0}
!16 = !{!14, !10, i64 32}
!17 = !{!14, !6, i64 24}
!18 = !{!14, !6, i64 16}
!19 = !{!14, !6, i64 8}
!20 = !{!14, !6, i64 0}
!21 = !{!22, !6, i64 64}
!22 = !{!"quad8_iio", !10, i64 0, !23, i64 8}
!23 = !{!"TYPE_4__", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56}
!24 = !{!22, !6, i64 56}
!25 = !{!22, !6, i64 48}
!26 = !{!22, !6, i64 40}
!27 = !{!22, !6, i64 32}
!28 = !{!22, !6, i64 24}
!29 = !{!22, !6, i64 16}
!30 = !{!22, !6, i64 8}
!31 = !{!22, !10, i64 0}
!32 = distinct !{!32, !33}
!33 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/counter/extr_104-quad-8.c_quad8_probe.c'
source_filename = "AnghaBench/linux/drivers/counter/extr_104-quad-8.c_quad8_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@base = common local_unnamed_addr global ptr null, align 8
@QUAD8_EXTENT = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [43 x i8] c"Unable to lock port addresses (0x%X-0x%X)\0A\00", align 1
@EBUSY = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@quad8_info = common global i32 0, align 4
@INDIO_DIRECT_MODE = common local_unnamed_addr global i32 0, align 4
@quad8_channels = common local_unnamed_addr global ptr null, align 8
@quad8_ops = common global i32 0, align 4
@quad8_counts = common local_unnamed_addr global ptr null, align 8
@quad8_signals = common local_unnamed_addr global ptr null, align 8
@QUAD8_CHAN_OP_RESET_COUNTERS = common local_unnamed_addr global i32 0, align 4
@QUAD8_REG_CHAN_OP = common local_unnamed_addr global i32 0, align 4
@QUAD8_NUM_COUNTERS = common local_unnamed_addr global i32 0, align 4
@QUAD8_CTR_RLD = common local_unnamed_addr global i32 0, align 4
@QUAD8_RLD_RESET_BP = common local_unnamed_addr global i32 0, align 4
@QUAD8_RLD_RESET_FLAGS = common local_unnamed_addr global i32 0, align 4
@QUAD8_RLD_RESET_E = common local_unnamed_addr global i32 0, align 4
@QUAD8_CTR_CMR = common local_unnamed_addr global i32 0, align 4
@QUAD8_CTR_IOR = common local_unnamed_addr global i32 0, align 4
@QUAD8_CTR_IDR = common local_unnamed_addr global i32 0, align 4
@QUAD8_CHAN_OP_ENABLE_COUNTERS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @quad8_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @quad8_probe(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr @base, align 8, !tbaa !6
%4 = zext i32 %1 to i64
%5 = getelementptr inbounds i32, ptr %3, i64 %4
%6 = load i32, ptr %5, align 4, !tbaa !10
%7 = load i64, ptr @QUAD8_EXTENT, align 8, !tbaa !12
%8 = tail call ptr @dev_name(ptr noundef %0) #2
%9 = tail call i32 @devm_request_region(ptr noundef %0, i32 noundef %6, i64 noundef %7, ptr noundef %8) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %2
%12 = load ptr, ptr @base, align 8, !tbaa !6
%13 = getelementptr inbounds i32, ptr %12, i64 %4
%14 = load i32, ptr %13, align 4, !tbaa !10
%15 = sext i32 %14 to i64
%16 = load i64, ptr @QUAD8_EXTENT, align 8, !tbaa !12
%17 = add nsw i64 %16, %15
%18 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %14, i64 noundef %17) #2
%19 = load i32, ptr @EBUSY, align 4, !tbaa !10
%20 = sub nsw i32 0, %19
br label %105
21: ; preds = %2
%22 = tail call ptr @devm_iio_device_alloc(ptr noundef %0, i32 noundef 72) #2
%23 = icmp eq ptr %22, null
br i1 %23, label %24, label %27
24: ; preds = %21
%25 = load i32, ptr @ENOMEM, align 4, !tbaa !10
%26 = sub nsw i32 0, %25
br label %105
27: ; preds = %21
%28 = getelementptr inbounds i8, ptr %22, i64 40
store ptr @quad8_info, ptr %28, align 8, !tbaa !14
%29 = load i32, ptr @INDIO_DIRECT_MODE, align 4, !tbaa !10
%30 = getelementptr inbounds i8, ptr %22, i64 32
store i32 %29, ptr %30, align 8, !tbaa !17
%31 = load ptr, ptr @quad8_channels, align 8, !tbaa !6
%32 = tail call ptr @ARRAY_SIZE(ptr noundef %31) #2
%33 = getelementptr inbounds i8, ptr %22, i64 24
store ptr %32, ptr %33, align 8, !tbaa !18
%34 = load ptr, ptr @quad8_channels, align 8, !tbaa !6
%35 = getelementptr inbounds i8, ptr %22, i64 16
store ptr %34, ptr %35, align 8, !tbaa !19
%36 = tail call ptr @dev_name(ptr noundef %0) #2
%37 = getelementptr inbounds i8, ptr %22, i64 8
store ptr %36, ptr %37, align 8, !tbaa !20
store ptr %0, ptr %22, align 8, !tbaa !21
%38 = tail call ptr @iio_priv(ptr noundef nonnull %22) #2
%39 = tail call ptr @dev_name(ptr noundef %0) #2
%40 = getelementptr inbounds i8, ptr %38, i64 8
%41 = getelementptr inbounds i8, ptr %38, i64 64
store ptr %39, ptr %41, align 8, !tbaa !22
%42 = getelementptr inbounds i8, ptr %38, i64 56
store ptr %0, ptr %42, align 8, !tbaa !25
%43 = getelementptr inbounds i8, ptr %38, i64 48
store ptr @quad8_ops, ptr %43, align 8, !tbaa !26
%44 = load ptr, ptr @quad8_counts, align 8, !tbaa !6
%45 = getelementptr inbounds i8, ptr %38, i64 40
store ptr %44, ptr %45, align 8, !tbaa !27
%46 = tail call ptr @ARRAY_SIZE(ptr noundef %44) #2
%47 = getelementptr inbounds i8, ptr %38, i64 32
store ptr %46, ptr %47, align 8, !tbaa !28
%48 = load ptr, ptr @quad8_signals, align 8, !tbaa !6
%49 = getelementptr inbounds i8, ptr %38, i64 24
store ptr %48, ptr %49, align 8, !tbaa !29
%50 = tail call ptr @ARRAY_SIZE(ptr noundef %48) #2
%51 = getelementptr inbounds i8, ptr %38, i64 16
store ptr %50, ptr %51, align 8, !tbaa !30
store ptr %38, ptr %40, align 8, !tbaa !31
%52 = load ptr, ptr @base, align 8, !tbaa !6
%53 = getelementptr inbounds i32, ptr %52, i64 %4
%54 = load i32, ptr %53, align 4, !tbaa !10
store i32 %54, ptr %38, align 8, !tbaa !32
%55 = load i32, ptr @QUAD8_CHAN_OP_RESET_COUNTERS, align 4, !tbaa !10
%56 = load i32, ptr @QUAD8_REG_CHAN_OP, align 4, !tbaa !10
%57 = add nsw i32 %56, %54
%58 = tail call i32 @outb(i32 noundef %55, i32 noundef %57) #2
%59 = load i32, ptr @QUAD8_NUM_COUNTERS, align 4, !tbaa !10
%60 = icmp sgt i32 %59, 0
br i1 %60, label %61, label %93
61: ; preds = %27, %61
%62 = phi i32 [ %90, %61 ], [ 0, %27 ]
%63 = load ptr, ptr @base, align 8, !tbaa !6
%64 = getelementptr inbounds i32, ptr %63, i64 %4
%65 = load i32, ptr %64, align 4, !tbaa !10
%66 = shl nuw nsw i32 %62, 1
%67 = add nsw i32 %65, %66
%68 = load i32, ptr @QUAD8_CTR_RLD, align 4, !tbaa !10
%69 = load i32, ptr @QUAD8_RLD_RESET_BP, align 4, !tbaa !10
%70 = or i32 %69, %68
%71 = add i32 %67, 1
%72 = tail call i32 @outb(i32 noundef %70, i32 noundef %71) #2
%73 = tail call i32 @outb(i32 noundef 0, i32 noundef %67) #2
%74 = tail call i32 @outb(i32 noundef 0, i32 noundef %67) #2
%75 = tail call i32 @outb(i32 noundef 0, i32 noundef %67) #2
%76 = load i32, ptr @QUAD8_CTR_RLD, align 4, !tbaa !10
%77 = load i32, ptr @QUAD8_RLD_RESET_FLAGS, align 4, !tbaa !10
%78 = or i32 %77, %76
%79 = tail call i32 @outb(i32 noundef %78, i32 noundef %71) #2
%80 = load i32, ptr @QUAD8_CTR_RLD, align 4, !tbaa !10
%81 = load i32, ptr @QUAD8_RLD_RESET_E, align 4, !tbaa !10
%82 = or i32 %81, %80
%83 = tail call i32 @outb(i32 noundef %82, i32 noundef %71) #2
%84 = load i32, ptr @QUAD8_CTR_CMR, align 4, !tbaa !10
%85 = tail call i32 @outb(i32 noundef %84, i32 noundef %71) #2
%86 = load i32, ptr @QUAD8_CTR_IOR, align 4, !tbaa !10
%87 = tail call i32 @outb(i32 noundef %86, i32 noundef %71) #2
%88 = load i32, ptr @QUAD8_CTR_IDR, align 4, !tbaa !10
%89 = tail call i32 @outb(i32 noundef %88, i32 noundef %71) #2
%90 = add nuw nsw i32 %62, 1
%91 = load i32, ptr @QUAD8_NUM_COUNTERS, align 4, !tbaa !10
%92 = icmp slt i32 %90, %91
br i1 %92, label %61, label %93, !llvm.loop !33
93: ; preds = %61, %27
%94 = load i32, ptr @QUAD8_CHAN_OP_ENABLE_COUNTERS, align 4, !tbaa !10
%95 = load ptr, ptr @base, align 8, !tbaa !6
%96 = getelementptr inbounds i32, ptr %95, i64 %4
%97 = load i32, ptr %96, align 4, !tbaa !10
%98 = load i32, ptr @QUAD8_REG_CHAN_OP, align 4, !tbaa !10
%99 = add nsw i32 %98, %97
%100 = tail call i32 @outb(i32 noundef %94, i32 noundef %99) #2
%101 = tail call i32 @devm_iio_device_register(ptr noundef %0, ptr noundef nonnull %22) #2
%102 = icmp eq i32 %101, 0
br i1 %102, label %103, label %105
103: ; preds = %93
%104 = tail call i32 @devm_counter_register(ptr noundef %0, ptr noundef nonnull %40) #2
br label %105
105: ; preds = %93, %103, %24, %11
%106 = phi i32 [ %104, %103 ], [ %26, %24 ], [ %20, %11 ], [ %101, %93 ]
ret i32 %106
}
declare i32 @devm_request_region(ptr noundef, i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @dev_name(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare ptr @devm_iio_device_alloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare ptr @iio_priv(ptr noundef) local_unnamed_addr #1
declare i32 @outb(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @devm_iio_device_register(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @devm_counter_register(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !7, i64 40}
!15 = !{!"iio_dev", !16, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !11, i64 32, !7, i64 40}
!16 = !{!"TYPE_3__", !7, i64 0}
!17 = !{!15, !11, i64 32}
!18 = !{!15, !7, i64 24}
!19 = !{!15, !7, i64 16}
!20 = !{!15, !7, i64 8}
!21 = !{!15, !7, i64 0}
!22 = !{!23, !7, i64 64}
!23 = !{!"quad8_iio", !11, i64 0, !24, i64 8}
!24 = !{!"TYPE_4__", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56}
!25 = !{!23, !7, i64 56}
!26 = !{!23, !7, i64 48}
!27 = !{!23, !7, i64 40}
!28 = !{!23, !7, i64 32}
!29 = !{!23, !7, i64 24}
!30 = !{!23, !7, i64 16}
!31 = !{!23, !7, i64 8}
!32 = !{!23, !11, i64 0}
!33 = distinct !{!33, !34}
!34 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_counter_extr_104-quad-8.c_quad8_probe
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/rtl8192su/ieee80211/extr_rtl819x_HTProc.c_HTConstructRT2RTAggElement.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/rtl8192su/ieee80211/extr_rtl819x_HTProc.c_HTConstructRT2RTAggElement.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@IEEE80211_DL_ERR = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [59 x i8] c"posRT2RTAgg can't be null in HTConstructRT2RTAggElement()\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @HTConstructRT2RTAggElement(ptr nocapture noundef readonly %0, ptr noundef %1, ptr nocapture noundef %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %1, null
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = load i32, ptr @IEEE80211_DL_ERR, align 4, !tbaa !5
%7 = tail call i32 @IEEE80211_DEBUG(i32 noundef %6, ptr noundef nonnull @.str) #2
br label %16
8: ; preds = %3
%9 = load i32, ptr %2, align 4, !tbaa !5
%10 = tail call i32 @memset(ptr noundef nonnull %1, i32 noundef 0, i32 noundef %9) #2
%11 = getelementptr inbounds i32, ptr %1, i64 4
store <4 x i32> <i32 0, i32 224, i32 76, i32 2>, ptr %1, align 4, !tbaa !5
%12 = getelementptr inbounds i32, ptr %1, i64 5
store i32 1, ptr %11, align 4, !tbaa !5
%13 = load i64, ptr %0, align 8, !tbaa !9
%14 = icmp eq i64 %13, 0
%15 = select i1 %14, i32 16, i32 24
store i32 %15, ptr %12, align 4
store i32 8, ptr %2, align 4, !tbaa !5
br label %16
16: ; preds = %8, %5
ret void
}
declare i32 @IEEE80211_DEBUG(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"ieee80211_device", !11, i64 0}
!11 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/rtl8192su/ieee80211/extr_rtl819x_HTProc.c_HTConstructRT2RTAggElement.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/rtl8192su/ieee80211/extr_rtl819x_HTProc.c_HTConstructRT2RTAggElement.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IEEE80211_DL_ERR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [59 x i8] c"posRT2RTAgg can't be null in HTConstructRT2RTAggElement()\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @HTConstructRT2RTAggElement(ptr nocapture noundef readonly %0, ptr noundef %1, ptr nocapture noundef %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %1, null
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = load i32, ptr @IEEE80211_DL_ERR, align 4, !tbaa !6
%7 = tail call i32 @IEEE80211_DEBUG(i32 noundef %6, ptr noundef nonnull @.str) #2
br label %16
8: ; preds = %3
%9 = load i32, ptr %2, align 4, !tbaa !6
%10 = tail call i32 @memset(ptr noundef nonnull %1, i32 noundef 0, i32 noundef %9) #2
%11 = getelementptr inbounds i8, ptr %1, i64 16
store <4 x i32> <i32 0, i32 224, i32 76, i32 2>, ptr %1, align 4, !tbaa !6
%12 = getelementptr inbounds i8, ptr %1, i64 20
store i32 1, ptr %11, align 4, !tbaa !6
%13 = load i64, ptr %0, align 8, !tbaa !10
%14 = icmp eq i64 %13, 0
%15 = select i1 %14, i32 16, i32 24
store i32 %15, ptr %12, align 4
store i32 8, ptr %2, align 4, !tbaa !6
br label %16
16: ; preds = %8, %5
ret void
}
declare i32 @IEEE80211_DEBUG(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"ieee80211_device", !12, i64 0}
!12 = !{!"long", !8, i64 0}
|
fastsocket_kernel_drivers_staging_rtl8192su_ieee80211_extr_rtl819x_HTProc.c_HTConstructRT2RTAggElement
|
; ModuleID = 'AnghaBench/linux/drivers/target/extr_target_core_stat.c_target_stat_auth_row_status_show.c'
source_filename = "AnghaBench/linux/drivers/target/extr_target_core_stat.c_target_stat_auth_row_status_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.se_lun_acl = type { i32, ptr }
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [7 x i8] c"Ready\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @target_stat_auth_row_status_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @target_stat_auth_row_status_show(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @auth_to_lacl(ptr noundef %0) #2
%4 = getelementptr inbounds %struct.se_lun_acl, ptr %3, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = tail call i32 (...) @rcu_read_lock() #2
%7 = load i32, ptr %3, align 8, !tbaa !11
%8 = tail call ptr @target_nacl_find_deve(ptr noundef %5, i32 noundef %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = tail call i32 (...) @rcu_read_unlock() #2
%12 = load i32, ptr @ENODEV, align 4, !tbaa !12
%13 = sub nsw i32 0, %12
br label %18
14: ; preds = %2
%15 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !12
%16 = tail call i32 @snprintf(ptr noundef %1, i32 noundef %15, ptr noundef nonnull @.str) #2
%17 = tail call i32 (...) @rcu_read_unlock() #2
br label %18
18: ; preds = %14, %10
%19 = phi i32 [ %16, %14 ], [ %13, %10 ]
ret i32 %19
}
declare ptr @auth_to_lacl(ptr noundef) local_unnamed_addr #1
declare i32 @rcu_read_lock(...) local_unnamed_addr #1
declare ptr @target_nacl_find_deve(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rcu_read_unlock(...) local_unnamed_addr #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"se_lun_acl", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/target/extr_target_core_stat.c_target_stat_auth_row_status_show.c'
source_filename = "AnghaBench/linux/drivers/target/extr_target_core_stat.c_target_stat_auth_row_status_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENODEV = common local_unnamed_addr global i32 0, align 4
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [7 x i8] c"Ready\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @target_stat_auth_row_status_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @target_stat_auth_row_status_show(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @auth_to_lacl(ptr noundef %0) #2
%4 = getelementptr inbounds i8, ptr %3, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = tail call i32 @rcu_read_lock() #2
%7 = load i32, ptr %3, align 8, !tbaa !12
%8 = tail call ptr @target_nacl_find_deve(ptr noundef %5, i32 noundef %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = tail call i32 @rcu_read_unlock() #2
%12 = load i32, ptr @ENODEV, align 4, !tbaa !13
%13 = sub nsw i32 0, %12
br label %18
14: ; preds = %2
%15 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !13
%16 = tail call i32 @snprintf(ptr noundef %1, i32 noundef %15, ptr noundef nonnull @.str) #2
%17 = tail call i32 @rcu_read_unlock() #2
br label %18
18: ; preds = %14, %10
%19 = phi i32 [ %16, %14 ], [ %13, %10 ]
ret i32 %19
}
declare ptr @auth_to_lacl(ptr noundef) local_unnamed_addr #1
declare i32 @rcu_read_lock(...) local_unnamed_addr #1
declare ptr @target_nacl_find_deve(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rcu_read_unlock(...) local_unnamed_addr #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"se_lun_acl", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!8, !8, i64 0}
|
linux_drivers_target_extr_target_core_stat.c_target_stat_auth_row_status_show
|
; ModuleID = 'AnghaBench/linux/fs/fuse/extr_dev.c_fuse_simple_background.c'
source_filename = "AnghaBench/linux/fs/fuse/extr_dev.c_fuse_simple_background.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fuse_args = type { i32, i64 }
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@FR_BACKGROUND = dso_local local_unnamed_addr global i32 0, align 4
@ENOTCONN = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @fuse_simple_background(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = getelementptr inbounds %struct.fuse_args, ptr %1, i64 0, i32 1
%5 = load i64, ptr %4, align 8, !tbaa !5
%6 = icmp eq i64 %5, 0
%7 = load i32, ptr %1, align 8, !tbaa !11
br i1 %6, label %20, label %8
8: ; preds = %3
%9 = icmp eq i32 %7, 0
%10 = zext i1 %9 to i32
%11 = tail call i32 @WARN_ON(i32 noundef %10) #2
%12 = tail call ptr @fuse_request_alloc(i32 noundef %2) #2
%13 = icmp eq ptr %12, null
br i1 %13, label %14, label %17
14: ; preds = %8
%15 = load i32, ptr @ENOMEM, align 4, !tbaa !12
%16 = sub nsw i32 0, %15
br label %36
17: ; preds = %8
%18 = load i32, ptr @FR_BACKGROUND, align 4, !tbaa !12
%19 = tail call i32 @__set_bit(i32 noundef %18, ptr noundef nonnull %12) #2
br label %27
20: ; preds = %3
%21 = tail call i32 @WARN_ON(i32 noundef %7) #2
%22 = tail call ptr @fuse_get_req(ptr noundef %0, i32 noundef 1) #2
%23 = tail call i64 @IS_ERR(ptr noundef %22) #2
%24 = icmp eq i64 %23, 0
br i1 %24, label %27, label %25
25: ; preds = %20
%26 = tail call i32 @PTR_ERR(ptr noundef %22) #2
br label %36
27: ; preds = %20, %17
%28 = phi ptr [ %12, %17 ], [ %22, %20 ]
%29 = tail call i32 @fuse_args_to_req(ptr noundef %28, ptr noundef nonnull %1) #2
%30 = tail call i32 @fuse_request_queue_background(ptr noundef %0, ptr noundef %28) #2
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %36
32: ; preds = %27
%33 = tail call i32 @fuse_put_request(ptr noundef %0, ptr noundef %28) #2
%34 = load i32, ptr @ENOTCONN, align 4, !tbaa !12
%35 = sub nsw i32 0, %34
br label %36
36: ; preds = %27, %32, %25, %14
%37 = phi i32 [ %35, %32 ], [ %16, %14 ], [ %26, %25 ], [ 0, %27 ]
ret i32 %37
}
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare ptr @fuse_request_alloc(i32 noundef) local_unnamed_addr #1
declare i32 @__set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @fuse_get_req(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @fuse_args_to_req(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fuse_request_queue_background(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fuse_put_request(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"fuse_args", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/fs/fuse/extr_dev.c_fuse_simple_background.c'
source_filename = "AnghaBench/linux/fs/fuse/extr_dev.c_fuse_simple_background.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@FR_BACKGROUND = common local_unnamed_addr global i32 0, align 4
@ENOTCONN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @fuse_simple_background(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = getelementptr inbounds i8, ptr %1, i64 8
%5 = load i64, ptr %4, align 8, !tbaa !6
%6 = icmp eq i64 %5, 0
%7 = load i32, ptr %1, align 8, !tbaa !12
br i1 %6, label %20, label %8
8: ; preds = %3
%9 = icmp eq i32 %7, 0
%10 = zext i1 %9 to i32
%11 = tail call i32 @WARN_ON(i32 noundef %10) #2
%12 = tail call ptr @fuse_request_alloc(i32 noundef %2) #2
%13 = icmp eq ptr %12, null
br i1 %13, label %14, label %17
14: ; preds = %8
%15 = load i32, ptr @ENOMEM, align 4, !tbaa !13
%16 = sub nsw i32 0, %15
br label %36
17: ; preds = %8
%18 = load i32, ptr @FR_BACKGROUND, align 4, !tbaa !13
%19 = tail call i32 @__set_bit(i32 noundef %18, ptr noundef nonnull %12) #2
br label %27
20: ; preds = %3
%21 = tail call i32 @WARN_ON(i32 noundef %7) #2
%22 = tail call ptr @fuse_get_req(ptr noundef %0, i32 noundef 1) #2
%23 = tail call i64 @IS_ERR(ptr noundef %22) #2
%24 = icmp eq i64 %23, 0
br i1 %24, label %27, label %25
25: ; preds = %20
%26 = tail call i32 @PTR_ERR(ptr noundef %22) #2
br label %36
27: ; preds = %20, %17
%28 = phi ptr [ %12, %17 ], [ %22, %20 ]
%29 = tail call i32 @fuse_args_to_req(ptr noundef %28, ptr noundef nonnull %1) #2
%30 = tail call i32 @fuse_request_queue_background(ptr noundef %0, ptr noundef %28) #2
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %36
32: ; preds = %27
%33 = tail call i32 @fuse_put_request(ptr noundef %0, ptr noundef %28) #2
%34 = load i32, ptr @ENOTCONN, align 4, !tbaa !13
%35 = sub nsw i32 0, %34
br label %36
36: ; preds = %27, %32, %25, %14
%37 = phi i32 [ %35, %32 ], [ %16, %14 ], [ %26, %25 ], [ 0, %27 ]
ret i32 %37
}
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare ptr @fuse_request_alloc(i32 noundef) local_unnamed_addr #1
declare i32 @__set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @fuse_get_req(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @fuse_args_to_req(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fuse_request_queue_background(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fuse_put_request(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"fuse_args", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!8, !8, i64 0}
|
linux_fs_fuse_extr_dev.c_fuse_simple_background
|
; ModuleID = 'AnghaBench/esp-idf/tools/kconfig/extr_gconf.c_store_filename.c'
source_filename = "AnghaBench/esp-idf/tools/kconfig/extr_gconf.c_store_filename.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [6 x i8] c"Error\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"Unable to save configuration !\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @store_filename], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @store_filename(ptr nocapture readnone %0, i32 noundef %1) #0 {
%3 = tail call i32 @GTK_FILE_SELECTION(i32 noundef %1) #2
%4 = tail call ptr @gtk_file_selection_get_filename(i32 noundef %3) #2
%5 = tail call i64 @conf_write(ptr noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = tail call i32 @_(ptr noundef nonnull @.str) #2
%9 = tail call i32 @_(ptr noundef nonnull @.str.1) #2
%10 = tail call i32 @text_insert_msg(i32 noundef %8, i32 noundef %9) #2
br label %11
11: ; preds = %7, %2
%12 = tail call i32 @GTK_WIDGET(i32 noundef %1) #2
%13 = tail call i32 @gtk_widget_destroy(i32 noundef %12) #2
ret void
}
declare ptr @gtk_file_selection_get_filename(i32 noundef) local_unnamed_addr #1
declare i32 @GTK_FILE_SELECTION(i32 noundef) local_unnamed_addr #1
declare i64 @conf_write(ptr noundef) local_unnamed_addr #1
declare i32 @text_insert_msg(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @_(ptr noundef) local_unnamed_addr #1
declare i32 @gtk_widget_destroy(i32 noundef) local_unnamed_addr #1
declare i32 @GTK_WIDGET(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/esp-idf/tools/kconfig/extr_gconf.c_store_filename.c'
source_filename = "AnghaBench/esp-idf/tools/kconfig/extr_gconf.c_store_filename.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [6 x i8] c"Error\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"Unable to save configuration !\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @store_filename], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @store_filename(ptr nocapture readnone %0, i32 noundef %1) #0 {
%3 = tail call i32 @GTK_FILE_SELECTION(i32 noundef %1) #2
%4 = tail call ptr @gtk_file_selection_get_filename(i32 noundef %3) #2
%5 = tail call i64 @conf_write(ptr noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = tail call i32 @_(ptr noundef nonnull @.str) #2
%9 = tail call i32 @_(ptr noundef nonnull @.str.1) #2
%10 = tail call i32 @text_insert_msg(i32 noundef %8, i32 noundef %9) #2
br label %11
11: ; preds = %7, %2
%12 = tail call i32 @GTK_WIDGET(i32 noundef %1) #2
%13 = tail call i32 @gtk_widget_destroy(i32 noundef %12) #2
ret void
}
declare ptr @gtk_file_selection_get_filename(i32 noundef) local_unnamed_addr #1
declare i32 @GTK_FILE_SELECTION(i32 noundef) local_unnamed_addr #1
declare i64 @conf_write(ptr noundef) local_unnamed_addr #1
declare i32 @text_insert_msg(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @_(ptr noundef) local_unnamed_addr #1
declare i32 @gtk_widget_destroy(i32 noundef) local_unnamed_addr #1
declare i32 @GTK_WIDGET(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
esp-idf_tools_kconfig_extr_gconf.c_store_filename
|
; ModuleID = 'AnghaBench/linux/drivers/hwmon/pmbus/extr_pmbus_core.c_pmbus_add_limit_attrs.c'
source_filename = "AnghaBench/linux/drivers/hwmon/pmbus/extr_pmbus_core.c_pmbus_add_limit_attrs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pmbus_sensor_attr = type { i32, i32, i64, i64, i64, i32, ptr }
%struct.pmbus_limit_attr = type { i64, i64, i32, i64, i32, i32 }
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pmbus_add_limit_attrs], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pmbus_add_limit_attrs(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6, ptr nocapture noundef readonly %7) #0 {
%9 = load i32, ptr %7, align 8, !tbaa !5
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %80
11: ; preds = %8
%12 = getelementptr inbounds %struct.pmbus_sensor_attr, ptr %7, i64 0, i32 6
%13 = load ptr, ptr %12, align 8, !tbaa !12
%14 = getelementptr inbounds %struct.pmbus_sensor_attr, ptr %7, i64 0, i32 5
%15 = getelementptr inbounds %struct.pmbus_sensor_attr, ptr %7, i64 0, i32 4
%16 = sext i32 %5 to i64
%17 = getelementptr inbounds %struct.pmbus_sensor_attr, ptr %7, i64 0, i32 1
%18 = getelementptr inbounds %struct.pmbus_sensor_attr, ptr %7, i64 0, i32 3
%19 = getelementptr inbounds %struct.pmbus_sensor_attr, ptr %7, i64 0, i32 2
br label %20
20: ; preds = %11, %75
%21 = phi ptr [ %13, %11 ], [ %77, %75 ]
%22 = phi i32 [ 0, %11 ], [ %78, %75 ]
%23 = phi i32 [ 0, %11 ], [ %76, %75 ]
%24 = getelementptr inbounds %struct.pmbus_limit_attr, ptr %21, i64 0, i32 4
%25 = load i32, ptr %24, align 8, !tbaa !13
%26 = tail call i64 @pmbus_check_word_register(ptr noundef %0, i32 noundef %5, i32 noundef %25) #2
%27 = icmp eq i64 %26, 0
br i1 %27, label %75, label %28
28: ; preds = %20
%29 = getelementptr inbounds %struct.pmbus_limit_attr, ptr %21, i64 0, i32 5
%30 = load i32, ptr %29, align 4, !tbaa !15
%31 = load i32, ptr %24, align 8, !tbaa !13
%32 = load i32, ptr %14, align 8, !tbaa !16
%33 = load i64, ptr %15, align 8, !tbaa !17
%34 = icmp eq i64 %33, 0
br i1 %34, label %35, label %39
35: ; preds = %28
%36 = getelementptr inbounds %struct.pmbus_limit_attr, ptr %21, i64 0, i32 3
%37 = load i64, ptr %36, align 8, !tbaa !18
%38 = icmp ne i64 %37, 0
br label %39
39: ; preds = %35, %28
%40 = phi i1 [ true, %28 ], [ %38, %35 ]
%41 = zext i1 %40 to i32
%42 = tail call ptr @pmbus_add_sensor(ptr noundef %1, ptr noundef %3, i32 noundef %30, i32 noundef %4, i32 noundef %5, i32 noundef %31, i32 noundef %32, i32 noundef %41, i32 noundef 0, i32 noundef 1) #2
%43 = icmp eq ptr %42, null
br i1 %43, label %44, label %47
44: ; preds = %39
%45 = load i32, ptr @ENOMEM, align 4, !tbaa !19
%46 = sub nsw i32 0, %45
br label %80
47: ; preds = %39
%48 = load i64, ptr %21, align 8, !tbaa !20
%49 = icmp eq i64 %48, 0
br i1 %49, label %75, label %50
50: ; preds = %47
%51 = load ptr, ptr %2, align 8, !tbaa !21
%52 = getelementptr inbounds i32, ptr %51, i64 %16
%53 = load i32, ptr %52, align 4, !tbaa !19
%54 = load i32, ptr %17, align 4, !tbaa !23
%55 = and i32 %54, %53
%56 = icmp eq i32 %55, 0
br i1 %56, label %75, label %57
57: ; preds = %50
%58 = getelementptr inbounds %struct.pmbus_limit_attr, ptr %21, i64 0, i32 2
%59 = load i32, ptr %58, align 8, !tbaa !24
%60 = load i64, ptr %18, align 8, !tbaa !25
%61 = icmp eq i64 %60, 0
br i1 %61, label %68, label %62
62: ; preds = %57
%63 = getelementptr inbounds %struct.pmbus_limit_attr, ptr %21, i64 0, i32 1
%64 = load i64, ptr %63, align 8, !tbaa !26
%65 = icmp eq i64 %64, 0
%66 = select i1 %65, ptr %6, ptr %42
%67 = select i1 %65, ptr %42, ptr %6
br label %68
68: ; preds = %57, %62
%69 = phi ptr [ %66, %62 ], [ null, %57 ]
%70 = phi ptr [ %67, %62 ], [ null, %57 ]
%71 = load i64, ptr %19, align 8, !tbaa !27
%72 = add nsw i64 %71, %16
%73 = tail call i32 @pmbus_add_boolean(ptr noundef %1, ptr noundef %3, i32 noundef %59, i32 noundef %4, ptr noundef %69, ptr noundef %70, i64 noundef %72, i64 noundef %48) #2
%74 = icmp eq i32 %73, 0
br i1 %74, label %75, label %80
75: ; preds = %68, %47, %50, %20
%76 = phi i32 [ %23, %50 ], [ %23, %47 ], [ %23, %20 ], [ 1, %68 ]
%77 = getelementptr inbounds %struct.pmbus_limit_attr, ptr %21, i64 1
%78 = add nuw nsw i32 %22, 1
%79 = icmp eq i32 %78, %9
br i1 %79, label %80, label %20, !llvm.loop !28
80: ; preds = %68, %75, %8, %44
%81 = phi i32 [ %46, %44 ], [ 0, %8 ], [ %73, %68 ], [ %76, %75 ]
ret i32 %81
}
declare i64 @pmbus_check_word_register(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @pmbus_add_sensor(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pmbus_add_boolean(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pmbus_sensor_attr", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16, !10, i64 24, !7, i64 32, !11, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !11, i64 40}
!13 = !{!14, !7, i64 32}
!14 = !{!"pmbus_limit_attr", !10, i64 0, !10, i64 8, !7, i64 16, !10, i64 24, !7, i64 32, !7, i64 36}
!15 = !{!14, !7, i64 36}
!16 = !{!6, !7, i64 32}
!17 = !{!6, !10, i64 24}
!18 = !{!14, !10, i64 24}
!19 = !{!7, !7, i64 0}
!20 = !{!14, !10, i64 0}
!21 = !{!22, !11, i64 0}
!22 = !{!"pmbus_driver_info", !11, i64 0}
!23 = !{!6, !7, i64 4}
!24 = !{!14, !7, i64 16}
!25 = !{!6, !10, i64 16}
!26 = !{!14, !10, i64 8}
!27 = !{!6, !10, i64 8}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/hwmon/pmbus/extr_pmbus_core.c_pmbus_add_limit_attrs.c'
source_filename = "AnghaBench/linux/drivers/hwmon/pmbus/extr_pmbus_core.c_pmbus_add_limit_attrs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pmbus_add_limit_attrs], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pmbus_add_limit_attrs(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6, ptr nocapture noundef readonly %7) #0 {
%9 = load i32, ptr %7, align 8, !tbaa !6
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %80
11: ; preds = %8
%12 = getelementptr inbounds i8, ptr %7, i64 40
%13 = load ptr, ptr %12, align 8, !tbaa !13
%14 = getelementptr inbounds i8, ptr %7, i64 32
%15 = getelementptr inbounds i8, ptr %7, i64 24
%16 = sext i32 %5 to i64
%17 = getelementptr inbounds i8, ptr %7, i64 4
%18 = getelementptr inbounds i8, ptr %7, i64 16
%19 = getelementptr inbounds i8, ptr %7, i64 8
br label %20
20: ; preds = %11, %75
%21 = phi ptr [ %13, %11 ], [ %77, %75 ]
%22 = phi i32 [ 0, %11 ], [ %78, %75 ]
%23 = phi i32 [ 0, %11 ], [ %76, %75 ]
%24 = getelementptr inbounds i8, ptr %21, i64 32
%25 = load i32, ptr %24, align 8, !tbaa !14
%26 = tail call i64 @pmbus_check_word_register(ptr noundef %0, i32 noundef %5, i32 noundef %25) #2
%27 = icmp eq i64 %26, 0
br i1 %27, label %75, label %28
28: ; preds = %20
%29 = getelementptr inbounds i8, ptr %21, i64 36
%30 = load i32, ptr %29, align 4, !tbaa !16
%31 = load i32, ptr %24, align 8, !tbaa !14
%32 = load i32, ptr %14, align 8, !tbaa !17
%33 = load i64, ptr %15, align 8, !tbaa !18
%34 = icmp eq i64 %33, 0
br i1 %34, label %35, label %39
35: ; preds = %28
%36 = getelementptr inbounds i8, ptr %21, i64 24
%37 = load i64, ptr %36, align 8, !tbaa !19
%38 = icmp ne i64 %37, 0
br label %39
39: ; preds = %35, %28
%40 = phi i1 [ true, %28 ], [ %38, %35 ]
%41 = zext i1 %40 to i32
%42 = tail call ptr @pmbus_add_sensor(ptr noundef %1, ptr noundef %3, i32 noundef %30, i32 noundef %4, i32 noundef %5, i32 noundef %31, i32 noundef %32, i32 noundef %41, i32 noundef 0, i32 noundef 1) #2
%43 = icmp eq ptr %42, null
br i1 %43, label %44, label %47
44: ; preds = %39
%45 = load i32, ptr @ENOMEM, align 4, !tbaa !20
%46 = sub nsw i32 0, %45
br label %80
47: ; preds = %39
%48 = load i64, ptr %21, align 8, !tbaa !21
%49 = icmp eq i64 %48, 0
br i1 %49, label %75, label %50
50: ; preds = %47
%51 = load ptr, ptr %2, align 8, !tbaa !22
%52 = getelementptr inbounds i32, ptr %51, i64 %16
%53 = load i32, ptr %52, align 4, !tbaa !20
%54 = load i32, ptr %17, align 4, !tbaa !24
%55 = and i32 %54, %53
%56 = icmp eq i32 %55, 0
br i1 %56, label %75, label %57
57: ; preds = %50
%58 = getelementptr inbounds i8, ptr %21, i64 16
%59 = load i32, ptr %58, align 8, !tbaa !25
%60 = load i64, ptr %18, align 8, !tbaa !26
%61 = icmp eq i64 %60, 0
br i1 %61, label %68, label %62
62: ; preds = %57
%63 = getelementptr inbounds i8, ptr %21, i64 8
%64 = load i64, ptr %63, align 8, !tbaa !27
%65 = icmp eq i64 %64, 0
%66 = select i1 %65, ptr %6, ptr %42
%67 = select i1 %65, ptr %42, ptr %6
br label %68
68: ; preds = %57, %62
%69 = phi ptr [ %66, %62 ], [ null, %57 ]
%70 = phi ptr [ %67, %62 ], [ null, %57 ]
%71 = load i64, ptr %19, align 8, !tbaa !28
%72 = add nsw i64 %71, %16
%73 = tail call i32 @pmbus_add_boolean(ptr noundef %1, ptr noundef %3, i32 noundef %59, i32 noundef %4, ptr noundef %69, ptr noundef %70, i64 noundef %72, i64 noundef %48) #2
%74 = icmp eq i32 %73, 0
br i1 %74, label %75, label %80
75: ; preds = %68, %47, %50, %20
%76 = phi i32 [ %23, %50 ], [ %23, %47 ], [ %23, %20 ], [ 1, %68 ]
%77 = getelementptr inbounds i8, ptr %21, i64 40
%78 = add nuw nsw i32 %22, 1
%79 = icmp eq i32 %78, %9
br i1 %79, label %80, label %20, !llvm.loop !29
80: ; preds = %68, %75, %8, %44
%81 = phi i32 [ %46, %44 ], [ 0, %8 ], [ %73, %68 ], [ %76, %75 ]
ret i32 %81
}
declare i64 @pmbus_check_word_register(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @pmbus_add_sensor(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pmbus_add_boolean(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pmbus_sensor_attr", !8, i64 0, !8, i64 4, !11, i64 8, !11, i64 16, !11, i64 24, !8, i64 32, !12, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !12, i64 40}
!14 = !{!15, !8, i64 32}
!15 = !{!"pmbus_limit_attr", !11, i64 0, !11, i64 8, !8, i64 16, !11, i64 24, !8, i64 32, !8, i64 36}
!16 = !{!15, !8, i64 36}
!17 = !{!7, !8, i64 32}
!18 = !{!7, !11, i64 24}
!19 = !{!15, !11, i64 24}
!20 = !{!8, !8, i64 0}
!21 = !{!15, !11, i64 0}
!22 = !{!23, !12, i64 0}
!23 = !{!"pmbus_driver_info", !12, i64 0}
!24 = !{!7, !8, i64 4}
!25 = !{!15, !8, i64 16}
!26 = !{!7, !11, i64 16}
!27 = !{!15, !11, i64 8}
!28 = !{!7, !11, i64 8}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_hwmon_pmbus_extr_pmbus_core.c_pmbus_add_limit_attrs
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/xen/xenbus/extr_xenbus_xs.c_xenbus_read.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/xen/xenbus/extr_xenbus_xs.c_xenbus_read.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@XS_READ = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @xenbus_read(i32 %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @join(ptr noundef %1, ptr noundef %2) #2
%6 = tail call i64 @IS_ERR(ptr noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %4
%9 = load i32, ptr @XS_READ, align 4, !tbaa !5
%10 = tail call ptr @xs_single(i32 %0, i32 noundef %9, ptr noundef %5, ptr noundef %3) #2
%11 = tail call i32 @kfree(ptr noundef %5) #2
br label %12
12: ; preds = %4, %8
%13 = phi ptr [ %10, %8 ], [ %5, %4 ]
ret ptr %13
}
declare ptr @join(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare ptr @xs_single(i32, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/xen/xenbus/extr_xenbus_xs.c_xenbus_read.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/xen/xenbus/extr_xenbus_xs.c_xenbus_read.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@XS_READ = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @xenbus_read(i64 %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @join(ptr noundef %1, ptr noundef %2) #2
%6 = tail call i64 @IS_ERR(ptr noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = load i32, ptr @XS_READ, align 4, !tbaa !6
%10 = and i64 %0, 4294967295
%11 = tail call ptr @xs_single(i64 %10, i32 noundef %9, ptr noundef %5, ptr noundef %3) #2
%12 = tail call i32 @kfree(ptr noundef %5) #2
br label %13
13: ; preds = %4, %8
%14 = phi ptr [ %11, %8 ], [ %5, %4 ]
ret ptr %14
}
declare ptr @join(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare ptr @xs_single(i64, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_drivers_xen_xenbus_extr_xenbus_xs.c_xenbus_read
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pcmcia/extr_socket_sysfs.c_pccard_store_card_pm_state.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pcmcia/extr_socket_sysfs.c_pccard_store_card_pm_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i64 0, align 8
@SOCKET_SUSPEND = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"off\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"on\00", align 1
@ENODEV = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @pccard_store_card_pm_state], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @pccard_store_card_pm_state(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = load i64, ptr @EINVAL, align 8, !tbaa !5
%6 = sub i64 0, %5
%7 = tail call ptr @to_socket(ptr noundef %0) #2
%8 = icmp eq i64 %3, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i64, ptr @EINVAL, align 8, !tbaa !5
%11 = sub i64 0, %10
br label %38
12: ; preds = %4
%13 = load i32, ptr %7, align 4, !tbaa !9
%14 = load i32, ptr @SOCKET_SUSPEND, align 4, !tbaa !12
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %27
17: ; preds = %12
%18 = tail call i32 @strncmp(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef 3) #2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %17
%21 = tail call i64 @pcmcia_suspend_card(ptr noundef nonnull %7) #2
br label %32
22: ; preds = %17
%23 = load i32, ptr %7, align 4, !tbaa !9
%24 = load i32, ptr @SOCKET_SUSPEND, align 4, !tbaa !12
%25 = and i32 %24, %23
%26 = icmp eq i32 %25, 0
br i1 %26, label %32, label %27
27: ; preds = %12, %22
%28 = tail call i32 @strncmp(ptr noundef %2, ptr noundef nonnull @.str.1, i32 noundef 2) #2
%29 = icmp eq i32 %28, 0
br i1 %29, label %30, label %32
30: ; preds = %27
%31 = tail call i64 @pcmcia_resume_card(ptr noundef nonnull %7) #2
br label %32
32: ; preds = %22, %27, %30, %20
%33 = phi i64 [ %6, %27 ], [ %31, %30 ], [ %6, %22 ], [ %21, %20 ]
%34 = icmp eq i64 %33, 0
%35 = load i64, ptr @ENODEV, align 8
%36 = sub i64 0, %35
%37 = select i1 %34, i64 %3, i64 %36
br label %38
38: ; preds = %32, %9
%39 = phi i64 [ %37, %32 ], [ %11, %9 ]
ret i64 %39
}
declare ptr @to_socket(ptr noundef) local_unnamed_addr #1
declare i32 @strncmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pcmcia_suspend_card(ptr noundef) local_unnamed_addr #1
declare i64 @pcmcia_resume_card(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"pcmcia_socket", !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pcmcia/extr_socket_sysfs.c_pccard_store_card_pm_state.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pcmcia/extr_socket_sysfs.c_pccard_store_card_pm_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i64 0, align 8
@SOCKET_SUSPEND = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"off\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"on\00", align 1
@ENODEV = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @pccard_store_card_pm_state], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @pccard_store_card_pm_state(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = load i64, ptr @EINVAL, align 8, !tbaa !6
%6 = sub i64 0, %5
%7 = tail call ptr @to_socket(ptr noundef %0) #2
%8 = icmp eq i64 %3, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i64, ptr @EINVAL, align 8, !tbaa !6
%11 = sub i64 0, %10
br label %38
12: ; preds = %4
%13 = load i32, ptr %7, align 4, !tbaa !10
%14 = load i32, ptr @SOCKET_SUSPEND, align 4, !tbaa !13
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %27
17: ; preds = %12
%18 = tail call i32 @strncmp(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef 3) #2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %17
%21 = tail call i64 @pcmcia_suspend_card(ptr noundef nonnull %7) #2
br label %32
22: ; preds = %17
%23 = load i32, ptr %7, align 4, !tbaa !10
%24 = load i32, ptr @SOCKET_SUSPEND, align 4, !tbaa !13
%25 = and i32 %24, %23
%26 = icmp eq i32 %25, 0
br i1 %26, label %32, label %27
27: ; preds = %12, %22
%28 = tail call i32 @strncmp(ptr noundef %2, ptr noundef nonnull @.str.1, i32 noundef 2) #2
%29 = icmp eq i32 %28, 0
br i1 %29, label %30, label %32
30: ; preds = %27
%31 = tail call i64 @pcmcia_resume_card(ptr noundef nonnull %7) #2
br label %32
32: ; preds = %22, %27, %30, %20
%33 = phi i64 [ %6, %27 ], [ %31, %30 ], [ %6, %22 ], [ %21, %20 ]
%34 = icmp eq i64 %33, 0
%35 = load i64, ptr @ENODEV, align 8
%36 = sub i64 0, %35
%37 = select i1 %34, i64 %3, i64 %36
br label %38
38: ; preds = %32, %9
%39 = phi i64 [ %37, %32 ], [ %11, %9 ]
ret i64 %39
}
declare ptr @to_socket(ptr noundef) local_unnamed_addr #1
declare i32 @strncmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pcmcia_suspend_card(ptr noundef) local_unnamed_addr #1
declare i64 @pcmcia_resume_card(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"pcmcia_socket", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
|
fastsocket_kernel_drivers_pcmcia_extr_socket_sysfs.c_pccard_store_card_pm_state
|
; ModuleID = 'AnghaBench/freebsd/contrib/libevent/test/extr_regress_http.c_http_large_delay_cb.c'
source_filename = "AnghaBench/freebsd/contrib/libevent/test/extr_regress_http.c_http_large_delay_cb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.timeval = type { i32 }
@EV_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@http_delay_reply = dso_local local_unnamed_addr global i32 0, align 4
@delayed_client = dso_local local_unnamed_addr global i32 0, align 4
@EVREQ_HTTP_EOF = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @http_large_delay_cb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @http_large_delay_cb(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca %struct.timeval, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = call i32 @evutil_timerclear(ptr noundef nonnull %3) #3
store i32 500000, ptr %3, align 4, !tbaa !5
%5 = load i32, ptr @EV_TIMEOUT, align 4, !tbaa !10
%6 = load i32, ptr @http_delay_reply, align 4, !tbaa !10
%7 = call i32 @event_base_once(ptr noundef %1, i32 noundef -1, i32 noundef %5, i32 noundef %6, ptr noundef %0, ptr noundef nonnull %3) #3
%8 = load i32, ptr @delayed_client, align 4, !tbaa !10
%9 = load i32, ptr @EVREQ_HTTP_EOF, align 4, !tbaa !10
%10 = call i32 @evhttp_connection_fail_(i32 noundef %8, i32 noundef %9) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @evutil_timerclear(ptr noundef) local_unnamed_addr #2
declare i32 @event_base_once(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @evhttp_connection_fail_(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"timeval", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/libevent/test/extr_regress_http.c_http_large_delay_cb.c'
source_filename = "AnghaBench/freebsd/contrib/libevent/test/extr_regress_http.c_http_large_delay_cb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.timeval = type { i32 }
@EV_TIMEOUT = common local_unnamed_addr global i32 0, align 4
@http_delay_reply = common local_unnamed_addr global i32 0, align 4
@delayed_client = common local_unnamed_addr global i32 0, align 4
@EVREQ_HTTP_EOF = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @http_large_delay_cb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @http_large_delay_cb(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca %struct.timeval, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = call i32 @evutil_timerclear(ptr noundef nonnull %3) #3
store i32 500000, ptr %3, align 4, !tbaa !6
%5 = load i32, ptr @EV_TIMEOUT, align 4, !tbaa !11
%6 = load i32, ptr @http_delay_reply, align 4, !tbaa !11
%7 = call i32 @event_base_once(ptr noundef %1, i32 noundef -1, i32 noundef %5, i32 noundef %6, ptr noundef %0, ptr noundef nonnull %3) #3
%8 = load i32, ptr @delayed_client, align 4, !tbaa !11
%9 = load i32, ptr @EVREQ_HTTP_EOF, align 4, !tbaa !11
%10 = call i32 @evhttp_connection_fail_(i32 noundef %8, i32 noundef %9) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @evutil_timerclear(ptr noundef) local_unnamed_addr #2
declare i32 @event_base_once(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @evhttp_connection_fail_(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"timeval", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
freebsd_contrib_libevent_test_extr_regress_http.c_http_large_delay_cb
|
; ModuleID = 'AnghaBench/linux/drivers/usb/chipidea/extr_usbmisc_imx.c_usbmisc_imx6q_set_wakeup.c'
source_filename = "AnghaBench/linux/drivers/usb/chipidea/extr_usbmisc_imx.c_usbmisc_imx6q_set_wakeup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.imx_usbmisc_data = type { i32, i32 }
%struct.imx_usbmisc = type { i32, i64 }
@MX6_BM_WAKEUP_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@MX6_BM_VBUS_WAKEUP = dso_local local_unnamed_addr global i32 0, align 4
@MX6_BM_ID_WAKEUP = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@MX6_BM_WAKEUP_INTR = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"wakeup int at ci_hdrc.%d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @usbmisc_imx6q_set_wakeup], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @usbmisc_imx6q_set_wakeup(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds %struct.imx_usbmisc_data, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call ptr @dev_get_drvdata(i32 noundef %4) #2
%6 = load i32, ptr @MX6_BM_WAKEUP_ENABLE, align 4, !tbaa !10
%7 = load i32, ptr @MX6_BM_VBUS_WAKEUP, align 4, !tbaa !10
%8 = or i32 %7, %6
%9 = load i32, ptr @MX6_BM_ID_WAKEUP, align 4, !tbaa !10
%10 = or i32 %8, %9
%11 = load i32, ptr %0, align 4, !tbaa !11
%12 = icmp sgt i32 %11, 3
br i1 %12, label %13, label %16
13: ; preds = %2
%14 = load i32, ptr @EINVAL, align 4, !tbaa !10
%15 = sub nsw i32 0, %14
br label %47
16: ; preds = %2
%17 = tail call i32 @spin_lock_irqsave(ptr noundef %5, i64 noundef undef) #2
%18 = getelementptr inbounds %struct.imx_usbmisc, ptr %5, i64 0, i32 1
%19 = load i64, ptr %18, align 8, !tbaa !12
%20 = load i32, ptr %0, align 4, !tbaa !11
%21 = shl nsw i32 %20, 2
%22 = sext i32 %21 to i64
%23 = add nsw i64 %19, %22
%24 = tail call i32 @readl(i64 noundef %23) #2
%25 = icmp eq i32 %1, 0
br i1 %25, label %28, label %26
26: ; preds = %16
%27 = or i32 %24, %10
br label %38
28: ; preds = %16
%29 = load i32, ptr @MX6_BM_WAKEUP_INTR, align 4, !tbaa !10
%30 = and i32 %29, %24
%31 = icmp eq i32 %30, 0
br i1 %31, label %35, label %32
32: ; preds = %28
%33 = load i32, ptr %0, align 4, !tbaa !11
%34 = tail call i32 @pr_debug(ptr noundef nonnull @.str, i32 noundef %33) #2
br label %35
35: ; preds = %32, %28
%36 = xor i32 %10, -1
%37 = and i32 %24, %36
br label %38
38: ; preds = %35, %26
%39 = phi i32 [ %27, %26 ], [ %37, %35 ]
%40 = load i64, ptr %18, align 8, !tbaa !12
%41 = load i32, ptr %0, align 4, !tbaa !11
%42 = shl nsw i32 %41, 2
%43 = sext i32 %42 to i64
%44 = add nsw i64 %40, %43
%45 = tail call i32 @writel(i32 noundef %39, i64 noundef %44) #2
%46 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
br label %47
47: ; preds = %38, %13
%48 = phi i32 [ %15, %13 ], [ 0, %38 ]
ret i32 %48
}
declare ptr @dev_get_drvdata(i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i32 @pr_debug(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"imx_usbmisc_data", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!13, !14, i64 8}
!13 = !{!"imx_usbmisc", !7, i64 0, !14, i64 8}
!14 = !{!"long", !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/usb/chipidea/extr_usbmisc_imx.c_usbmisc_imx6q_set_wakeup.c'
source_filename = "AnghaBench/linux/drivers/usb/chipidea/extr_usbmisc_imx.c_usbmisc_imx6q_set_wakeup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MX6_BM_WAKEUP_ENABLE = common local_unnamed_addr global i32 0, align 4
@MX6_BM_VBUS_WAKEUP = common local_unnamed_addr global i32 0, align 4
@MX6_BM_ID_WAKEUP = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@MX6_BM_WAKEUP_INTR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"wakeup int at ci_hdrc.%d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @usbmisc_imx6q_set_wakeup], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @usbmisc_imx6q_set_wakeup(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call ptr @dev_get_drvdata(i32 noundef %4) #2
%6 = load i32, ptr @MX6_BM_WAKEUP_ENABLE, align 4, !tbaa !11
%7 = load i32, ptr @MX6_BM_VBUS_WAKEUP, align 4, !tbaa !11
%8 = or i32 %7, %6
%9 = load i32, ptr @MX6_BM_ID_WAKEUP, align 4, !tbaa !11
%10 = or i32 %8, %9
%11 = load i32, ptr %0, align 4, !tbaa !12
%12 = icmp sgt i32 %11, 3
br i1 %12, label %13, label %16
13: ; preds = %2
%14 = load i32, ptr @EINVAL, align 4, !tbaa !11
%15 = sub nsw i32 0, %14
br label %47
16: ; preds = %2
%17 = tail call i32 @spin_lock_irqsave(ptr noundef %5, i64 noundef undef) #2
%18 = getelementptr inbounds i8, ptr %5, i64 8
%19 = load i64, ptr %18, align 8, !tbaa !13
%20 = load i32, ptr %0, align 4, !tbaa !12
%21 = shl nsw i32 %20, 2
%22 = sext i32 %21 to i64
%23 = add nsw i64 %19, %22
%24 = tail call i32 @readl(i64 noundef %23) #2
%25 = icmp eq i32 %1, 0
br i1 %25, label %28, label %26
26: ; preds = %16
%27 = or i32 %24, %10
br label %38
28: ; preds = %16
%29 = load i32, ptr @MX6_BM_WAKEUP_INTR, align 4, !tbaa !11
%30 = and i32 %29, %24
%31 = icmp eq i32 %30, 0
br i1 %31, label %35, label %32
32: ; preds = %28
%33 = load i32, ptr %0, align 4, !tbaa !12
%34 = tail call i32 @pr_debug(ptr noundef nonnull @.str, i32 noundef %33) #2
br label %35
35: ; preds = %32, %28
%36 = xor i32 %10, -1
%37 = and i32 %24, %36
br label %38
38: ; preds = %35, %26
%39 = phi i32 [ %27, %26 ], [ %37, %35 ]
%40 = load i64, ptr %18, align 8, !tbaa !13
%41 = load i32, ptr %0, align 4, !tbaa !12
%42 = shl nsw i32 %41, 2
%43 = sext i32 %42 to i64
%44 = add nsw i64 %40, %43
%45 = tail call i32 @writel(i32 noundef %39, i64 noundef %44) #2
%46 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
br label %47
47: ; preds = %38, %13
%48 = phi i32 [ %15, %13 ], [ 0, %38 ]
ret i32 %48
}
declare ptr @dev_get_drvdata(i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i32 @pr_debug(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"imx_usbmisc_data", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!14, !15, i64 8}
!14 = !{!"imx_usbmisc", !8, i64 0, !15, i64 8}
!15 = !{!"long", !9, i64 0}
|
linux_drivers_usb_chipidea_extr_usbmisc_imx.c_usbmisc_imx6q_set_wakeup
|
; ModuleID = 'AnghaBench/linux/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_ao_cmd.c'
source_filename = "AnghaBench/linux/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_ao_cmd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, %struct.comedi_cmd }
%struct.comedi_cmd = type { i32 }
%struct.pcidas64_private = type { i32, i64, i64 }
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@DAC_CONTROL0_REG = dso_local local_unnamed_addr global i64 0, align 8
@PLX_DMADPR_DESCPCI = dso_local local_unnamed_addr global i32 0, align 4
@PLX_DMADPR_TCINTR = dso_local local_unnamed_addr global i32 0, align 4
@ao_inttrig = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ao_cmd], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ao_cmd(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %1, align 8, !tbaa !10
%5 = tail call i64 @external_ai_queue_in_use(ptr noundef nonnull %0) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = tail call i32 @warn_external_queue(ptr noundef nonnull %0) #2
%9 = load i32, ptr @EBUSY, align 4, !tbaa !12
%10 = sub nsw i32 0, %9
br label %30
11: ; preds = %2
%12 = getelementptr inbounds %struct.TYPE_2__, ptr %4, i64 0, i32 1
%13 = getelementptr inbounds %struct.pcidas64_private, ptr %3, i64 0, i32 2
%14 = load i64, ptr %13, align 8, !tbaa !14
%15 = load i64, ptr @DAC_CONTROL0_REG, align 8, !tbaa !17
%16 = add nsw i64 %15, %14
%17 = tail call i32 @writew(i32 noundef 0, i64 noundef %16) #2
%18 = getelementptr inbounds %struct.pcidas64_private, ptr %3, i64 0, i32 1
store i64 0, ptr %18, align 8, !tbaa !18
%19 = tail call i32 @set_dac_select_reg(ptr noundef nonnull %0, ptr noundef nonnull %12) #2
%20 = tail call i32 @set_dac_interval_regs(ptr noundef nonnull %0, ptr noundef nonnull %12) #2
%21 = load i32, ptr %3, align 8, !tbaa !19
%22 = load i32, ptr @PLX_DMADPR_DESCPCI, align 4, !tbaa !12
%23 = or i32 %22, %21
%24 = load i32, ptr @PLX_DMADPR_TCINTR, align 4, !tbaa !12
%25 = or i32 %23, %24
%26 = tail call i32 @load_first_dma_descriptor(ptr noundef nonnull %0, i32 noundef 0, i32 noundef %25) #2
%27 = tail call i32 @set_dac_control1_reg(ptr noundef nonnull %0, ptr noundef nonnull %12) #2
%28 = load i32, ptr @ao_inttrig, align 4, !tbaa !12
%29 = load ptr, ptr %1, align 8, !tbaa !10
store i32 %28, ptr %29, align 4, !tbaa !20
br label %30
30: ; preds = %11, %7
%31 = phi i32 [ %10, %7 ], [ 0, %11 ]
ret i32 %31
}
declare i64 @external_ai_queue_in_use(ptr noundef) local_unnamed_addr #1
declare i32 @warn_external_queue(ptr noundef) local_unnamed_addr #1
declare i32 @writew(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @set_dac_select_reg(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @set_dac_interval_regs(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @load_first_dma_descriptor(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_dac_control1_reg(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"comedi_device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"comedi_subdevice", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !16, i64 16}
!15 = !{!"pcidas64_private", !13, i64 0, !16, i64 8, !16, i64 16}
!16 = !{!"long", !8, i64 0}
!17 = !{!16, !16, i64 0}
!18 = !{!15, !16, i64 8}
!19 = !{!15, !13, i64 0}
!20 = !{!21, !13, i64 0}
!21 = !{!"TYPE_2__", !13, i64 0, !22, i64 4}
!22 = !{!"comedi_cmd", !13, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_ao_cmd.c'
source_filename = "AnghaBench/linux/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_ao_cmd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EBUSY = common local_unnamed_addr global i32 0, align 4
@DAC_CONTROL0_REG = common local_unnamed_addr global i64 0, align 8
@PLX_DMADPR_DESCPCI = common local_unnamed_addr global i32 0, align 4
@PLX_DMADPR_TCINTR = common local_unnamed_addr global i32 0, align 4
@ao_inttrig = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ao_cmd], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @ao_cmd(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %1, align 8, !tbaa !11
%5 = tail call i64 @external_ai_queue_in_use(ptr noundef nonnull %0) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = tail call i32 @warn_external_queue(ptr noundef nonnull %0) #2
%9 = load i32, ptr @EBUSY, align 4, !tbaa !13
%10 = sub nsw i32 0, %9
br label %30
11: ; preds = %2
%12 = getelementptr inbounds i8, ptr %4, i64 4
%13 = getelementptr inbounds i8, ptr %3, i64 16
%14 = load i64, ptr %13, align 8, !tbaa !15
%15 = load i64, ptr @DAC_CONTROL0_REG, align 8, !tbaa !18
%16 = add nsw i64 %15, %14
%17 = tail call i32 @writew(i32 noundef 0, i64 noundef %16) #2
%18 = getelementptr inbounds i8, ptr %3, i64 8
store i64 0, ptr %18, align 8, !tbaa !19
%19 = tail call i32 @set_dac_select_reg(ptr noundef nonnull %0, ptr noundef nonnull %12) #2
%20 = tail call i32 @set_dac_interval_regs(ptr noundef nonnull %0, ptr noundef nonnull %12) #2
%21 = load i32, ptr %3, align 8, !tbaa !20
%22 = load i32, ptr @PLX_DMADPR_DESCPCI, align 4, !tbaa !13
%23 = or i32 %22, %21
%24 = load i32, ptr @PLX_DMADPR_TCINTR, align 4, !tbaa !13
%25 = or i32 %23, %24
%26 = tail call i32 @load_first_dma_descriptor(ptr noundef nonnull %0, i32 noundef 0, i32 noundef %25) #2
%27 = tail call i32 @set_dac_control1_reg(ptr noundef nonnull %0, ptr noundef nonnull %12) #2
%28 = load i32, ptr @ao_inttrig, align 4, !tbaa !13
%29 = load ptr, ptr %1, align 8, !tbaa !11
store i32 %28, ptr %29, align 4, !tbaa !21
br label %30
30: ; preds = %11, %7
%31 = phi i32 [ %10, %7 ], [ 0, %11 ]
ret i32 %31
}
declare i64 @external_ai_queue_in_use(ptr noundef) local_unnamed_addr #1
declare i32 @warn_external_queue(ptr noundef) local_unnamed_addr #1
declare i32 @writew(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @set_dac_select_reg(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @set_dac_interval_regs(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @load_first_dma_descriptor(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_dac_control1_reg(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"comedi_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"comedi_subdevice", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!16, !17, i64 16}
!16 = !{!"pcidas64_private", !14, i64 0, !17, i64 8, !17, i64 16}
!17 = !{!"long", !9, i64 0}
!18 = !{!17, !17, i64 0}
!19 = !{!16, !17, i64 8}
!20 = !{!16, !14, i64 0}
!21 = !{!22, !14, i64 0}
!22 = !{!"TYPE_2__", !14, i64 0, !23, i64 4}
!23 = !{!"comedi_cmd", !14, i64 0}
|
linux_drivers_staging_comedi_drivers_extr_cb_pcidas64.c_ao_cmd
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_amplc_pci230.c_pci230_ao_inttrig_start.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_amplc_pci230.c_pci230_ao_inttrig_start.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@NULLFUNC = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pci230_ao_inttrig_start], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pci230_ao_inttrig_start(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = icmp eq i32 %2, 0
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = load i32, ptr @EINVAL, align 4, !tbaa !5
%7 = sub nsw i32 0, %6
br label %12
8: ; preds = %3
%9 = load i32, ptr @NULLFUNC, align 4, !tbaa !5
%10 = load ptr, ptr %1, align 8, !tbaa !9
store i32 %9, ptr %10, align 4, !tbaa !12
%11 = tail call i32 @pci230_ao_start(ptr noundef %0, ptr noundef nonnull %1) #2
br label %12
12: ; preds = %8, %5
%13 = phi i32 [ %7, %5 ], [ 1, %8 ]
ret i32 %13
}
declare i32 @pci230_ao_start(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"comedi_subdevice", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"TYPE_2__", !6, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_amplc_pci230.c_pci230_ao_inttrig_start.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_amplc_pci230.c_pci230_ao_inttrig_start.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@NULLFUNC = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pci230_ao_inttrig_start], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @pci230_ao_inttrig_start(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = icmp eq i32 %2, 0
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = load i32, ptr @EINVAL, align 4, !tbaa !6
%7 = sub nsw i32 0, %6
br label %12
8: ; preds = %3
%9 = load i32, ptr @NULLFUNC, align 4, !tbaa !6
%10 = load ptr, ptr %1, align 8, !tbaa !10
store i32 %9, ptr %10, align 4, !tbaa !13
%11 = tail call i32 @pci230_ao_start(ptr noundef %0, ptr noundef nonnull %1) #2
br label %12
12: ; preds = %8, %5
%13 = phi i32 [ %7, %5 ], [ 1, %8 ]
ret i32 %13
}
declare i32 @pci230_ao_start(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"comedi_subdevice", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_2__", !7, i64 0}
|
fastsocket_kernel_drivers_staging_comedi_drivers_extr_amplc_pci230.c_pci230_ao_inttrig_start
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/lpfc/extr_lpfc_attr.c_lpfc_npiv_info_show.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/lpfc/extr_lpfc_attr.c_lpfc_npiv_info_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.lpfc_vport = type { i64, i32, ptr }
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [20 x i8] c"NPIV Not Supported\0A\00", align 1
@LPFC_PHYSICAL_PORT = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [15 x i8] c"NPIV Physical\0A\00", align 1
@.str.2 = private unnamed_addr constant [23 x i8] c"NPIV Virtual (VPI %d)\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @lpfc_npiv_info_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @lpfc_npiv_info_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @class_to_shost(ptr noundef %0) #2
%5 = load i64, ptr %4, align 8, !tbaa !5
%6 = inttoptr i64 %5 to ptr
%7 = getelementptr inbounds %struct.lpfc_vport, ptr %6, i64 0, i32 2
%8 = load ptr, ptr %7, align 8, !tbaa !10
%9 = load i32, ptr %8, align 4, !tbaa !14
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !16
%13 = tail call i32 (ptr, i32, ptr, ...) @snprintf(ptr noundef %2, i32 noundef %12, ptr noundef nonnull @.str) #2
br label %25
14: ; preds = %3
%15 = load i64, ptr %6, align 8, !tbaa !17
%16 = load i64, ptr @LPFC_PHYSICAL_PORT, align 8, !tbaa !18
%17 = icmp eq i64 %15, %16
%18 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !16
br i1 %17, label %19, label %21
19: ; preds = %14
%20 = tail call i32 (ptr, i32, ptr, ...) @snprintf(ptr noundef %2, i32 noundef %18, ptr noundef nonnull @.str.1) #2
br label %25
21: ; preds = %14
%22 = getelementptr inbounds %struct.lpfc_vport, ptr %6, i64 0, i32 1
%23 = load i32, ptr %22, align 8, !tbaa !19
%24 = tail call i32 (ptr, i32, ptr, ...) @snprintf(ptr noundef %2, i32 noundef %18, ptr noundef nonnull @.str.2, i32 noundef %23) #2
br label %25
25: ; preds = %21, %19, %11
%26 = phi i32 [ %20, %19 ], [ %24, %21 ], [ %13, %11 ]
ret i32 %26
}
declare ptr @class_to_shost(ptr noundef) local_unnamed_addr #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"Scsi_Host", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 16}
!11 = !{!"lpfc_vport", !7, i64 0, !12, i64 8, !13, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"lpfc_hba", !12, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!11, !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!11, !12, i64 8}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/lpfc/extr_lpfc_attr.c_lpfc_npiv_info_show.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/lpfc/extr_lpfc_attr.c_lpfc_npiv_info_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [20 x i8] c"NPIV Not Supported\0A\00", align 1
@LPFC_PHYSICAL_PORT = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [15 x i8] c"NPIV Physical\0A\00", align 1
@.str.2 = private unnamed_addr constant [23 x i8] c"NPIV Virtual (VPI %d)\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @lpfc_npiv_info_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @lpfc_npiv_info_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @class_to_shost(ptr noundef %0) #2
%5 = load i64, ptr %4, align 8, !tbaa !6
%6 = inttoptr i64 %5 to ptr
%7 = getelementptr inbounds i8, ptr %6, i64 16
%8 = load ptr, ptr %7, align 8, !tbaa !11
%9 = load i32, ptr %8, align 4, !tbaa !15
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !17
%13 = tail call i32 (ptr, i32, ptr, ...) @snprintf(ptr noundef %2, i32 noundef %12, ptr noundef nonnull @.str) #2
br label %25
14: ; preds = %3
%15 = load i64, ptr %6, align 8, !tbaa !18
%16 = load i64, ptr @LPFC_PHYSICAL_PORT, align 8, !tbaa !19
%17 = icmp eq i64 %15, %16
%18 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !17
br i1 %17, label %19, label %21
19: ; preds = %14
%20 = tail call i32 (ptr, i32, ptr, ...) @snprintf(ptr noundef %2, i32 noundef %18, ptr noundef nonnull @.str.1) #2
br label %25
21: ; preds = %14
%22 = getelementptr inbounds i8, ptr %6, i64 8
%23 = load i32, ptr %22, align 8, !tbaa !20
%24 = tail call i32 (ptr, i32, ptr, ...) @snprintf(ptr noundef %2, i32 noundef %18, ptr noundef nonnull @.str.2, i32 noundef %23) #2
br label %25
25: ; preds = %21, %19, %11
%26 = phi i32 [ %20, %19 ], [ %24, %21 ], [ %13, %11 ]
ret i32 %26
}
declare ptr @class_to_shost(ptr noundef) local_unnamed_addr #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"Scsi_Host", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !14, i64 16}
!12 = !{!"lpfc_vport", !8, i64 0, !13, i64 8, !14, i64 16}
!13 = !{!"int", !9, i64 0}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!16, !13, i64 0}
!16 = !{!"lpfc_hba", !13, i64 0}
!17 = !{!13, !13, i64 0}
!18 = !{!12, !8, i64 0}
!19 = !{!8, !8, i64 0}
!20 = !{!12, !13, i64 8}
|
fastsocket_kernel_drivers_scsi_lpfc_extr_lpfc_attr.c_lpfc_npiv_info_show
|
; ModuleID = 'AnghaBench/redis/src/extr_debug.c_disableWatchdog.c'
source_filename = "AnghaBench/redis/src/extr_debug.c_disableWatchdog.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i64 }
%struct.sigaction = type { i32, i64, i32 }
@server = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@SIG_IGN = dso_local local_unnamed_addr global i32 0, align 4
@SIGALRM = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @disableWatchdog() local_unnamed_addr #0 {
%1 = alloca %struct.sigaction, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %1) #3
%2 = load i64, ptr @server, align 8, !tbaa !5
%3 = icmp eq i64 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %0
%5 = tail call i32 @watchdogScheduleSignal(i32 noundef 0) #3
%6 = getelementptr inbounds %struct.sigaction, ptr %1, i64 0, i32 2
%7 = call i32 @sigemptyset(ptr noundef nonnull %6) #3
%8 = getelementptr inbounds %struct.sigaction, ptr %1, i64 0, i32 1
store i64 0, ptr %8, align 8, !tbaa !10
%9 = load i32, ptr @SIG_IGN, align 4, !tbaa !13
store i32 %9, ptr %1, align 8, !tbaa !14
%10 = load i32, ptr @SIGALRM, align 4, !tbaa !13
%11 = call i32 @sigaction(i32 noundef %10, ptr noundef nonnull %1, ptr noundef null) #3
store i64 0, ptr @server, align 8, !tbaa !5
br label %12
12: ; preds = %0, %4
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @watchdogScheduleSignal(i32 noundef) local_unnamed_addr #2
declare i32 @sigemptyset(ptr noundef) local_unnamed_addr #2
declare i32 @sigaction(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"sigaction", !12, i64 0, !7, i64 8, !12, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!11, !12, i64 0}
|
; ModuleID = 'AnghaBench/redis/src/extr_debug.c_disableWatchdog.c'
source_filename = "AnghaBench/redis/src/extr_debug.c_disableWatchdog.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i64 }
%struct.sigaction = type { i32, i64, i32 }
@server = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@SIG_IGN = common local_unnamed_addr global i32 0, align 4
@SIGALRM = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @disableWatchdog() local_unnamed_addr #0 {
%1 = alloca %struct.sigaction, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %1) #3
%2 = load i64, ptr @server, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %0
%5 = tail call i32 @watchdogScheduleSignal(i32 noundef 0) #3
%6 = getelementptr inbounds i8, ptr %1, i64 16
%7 = call i32 @sigemptyset(ptr noundef nonnull %6) #3
%8 = getelementptr inbounds i8, ptr %1, i64 8
store i64 0, ptr %8, align 8, !tbaa !11
%9 = load i32, ptr @SIG_IGN, align 4, !tbaa !14
store i32 %9, ptr %1, align 8, !tbaa !15
%10 = load i32, ptr @SIGALRM, align 4, !tbaa !14
%11 = call i32 @sigaction(i32 noundef %10, ptr noundef nonnull %1, ptr noundef null) #3
store i64 0, ptr @server, align 8, !tbaa !6
br label %12
12: ; preds = %0, %4
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @watchdogScheduleSignal(i32 noundef) local_unnamed_addr #2
declare i32 @sigemptyset(ptr noundef) local_unnamed_addr #2
declare i32 @sigaction(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"sigaction", !13, i64 0, !8, i64 8, !13, i64 16}
!13 = !{!"int", !9, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!12, !13, i64 0}
|
redis_src_extr_debug.c_disableWatchdog
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/renesas/extr_ravb_main.c_ravb_get_stats.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/renesas/extr_ravb_main.c_ravb_get_stats.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ravb_private = type { i64, ptr }
%struct.net_device_stats = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
@RAVB_BE = dso_local local_unnamed_addr global i64 0, align 8
@RAVB_NC = dso_local local_unnamed_addr global i64 0, align 8
@RCAR_GEN3 = dso_local local_unnamed_addr global i64 0, align 8
@TROCR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ravb_get_stats], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef ptr @ravb_get_stats(ptr noundef returned %0) #0 {
%2 = tail call ptr @netdev_priv(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.ravb_private, ptr %2, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load i64, ptr @RAVB_BE, align 8, !tbaa !11
%6 = load i64, ptr @RAVB_NC, align 8, !tbaa !11
%7 = load i64, ptr %2, align 8, !tbaa !12
%8 = load i64, ptr @RCAR_GEN3, align 8, !tbaa !11
%9 = icmp eq i64 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %1
%11 = load i32, ptr @TROCR, align 4, !tbaa !13
%12 = tail call i64 @ravb_read(ptr noundef %0, i32 noundef %11) #2
%13 = getelementptr inbounds %struct.net_device_stats, ptr %0, i64 0, i32 11
%14 = load i32, ptr %13, align 8, !tbaa !15
%15 = trunc i64 %12 to i32
%16 = add i32 %14, %15
store i32 %16, ptr %13, align 8, !tbaa !15
%17 = load i32, ptr @TROCR, align 4, !tbaa !13
%18 = tail call i32 @ravb_write(ptr noundef %0, i32 noundef 0, i32 noundef %17) #2
br label %19
19: ; preds = %10, %1
%20 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %6
%21 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %5
%22 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %5, i32 10
%23 = load i64, ptr %22, align 8, !tbaa !17
%24 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %6, i32 10
%25 = load i64, ptr %24, align 8, !tbaa !17
%26 = add nsw i64 %25, %23
%27 = getelementptr inbounds %struct.net_device_stats, ptr %0, i64 0, i32 10
store i64 %26, ptr %27, align 8, !tbaa !17
%28 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %5, i32 8
%29 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %6, i32 8
%30 = getelementptr inbounds %struct.net_device_stats, ptr %0, i64 0, i32 8
%31 = load <2 x i64>, ptr %28, align 8, !tbaa !11
%32 = load <2 x i64>, ptr %29, align 8, !tbaa !11
%33 = add nsw <2 x i64> %32, %31
store <2 x i64> %33, ptr %30, align 8, !tbaa !11
%34 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %5, i32 6
%35 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %6, i32 6
%36 = getelementptr inbounds %struct.net_device_stats, ptr %0, i64 0, i32 6
%37 = load <2 x i64>, ptr %34, align 8, !tbaa !11
%38 = load <2 x i64>, ptr %35, align 8, !tbaa !11
%39 = add nsw <2 x i64> %38, %37
store <2 x i64> %39, ptr %36, align 8, !tbaa !11
%40 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %5, i32 4
%41 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %6, i32 4
%42 = getelementptr inbounds %struct.net_device_stats, ptr %0, i64 0, i32 4
%43 = load <2 x i64>, ptr %40, align 8, !tbaa !11
%44 = load <2 x i64>, ptr %41, align 8, !tbaa !11
%45 = add nsw <2 x i64> %44, %43
store <2 x i64> %45, ptr %42, align 8, !tbaa !11
%46 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %5, i32 2
%47 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %6, i32 2
%48 = getelementptr inbounds %struct.net_device_stats, ptr %0, i64 0, i32 2
%49 = load <2 x i64>, ptr %46, align 8, !tbaa !11
%50 = load <2 x i64>, ptr %47, align 8, !tbaa !11
%51 = add nsw <2 x i64> %50, %49
store <2 x i64> %51, ptr %48, align 8, !tbaa !11
%52 = load <2 x i64>, ptr %21, align 8, !tbaa !11
%53 = load <2 x i64>, ptr %20, align 8, !tbaa !11
%54 = add nsw <2 x i64> %53, %52
store <2 x i64> %54, ptr %0, align 8, !tbaa !11
ret ptr %0
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i64 @ravb_read(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ravb_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"ravb_private", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
!15 = !{!16, !14, i64 88}
!16 = !{!"net_device_stats", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !14, i64 88}
!17 = !{!16, !7, i64 80}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/renesas/extr_ravb_main.c_ravb_get_stats.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/renesas/extr_ravb_main.c_ravb_get_stats.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.net_device_stats = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
@RAVB_BE = common local_unnamed_addr global i64 0, align 8
@RAVB_NC = common local_unnamed_addr global i64 0, align 8
@RCAR_GEN3 = common local_unnamed_addr global i64 0, align 8
@TROCR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ravb_get_stats], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef ptr @ravb_get_stats(ptr noundef returned %0) #0 {
%2 = tail call ptr @netdev_priv(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load i64, ptr @RAVB_BE, align 8, !tbaa !12
%6 = load i64, ptr @RAVB_NC, align 8, !tbaa !12
%7 = load i64, ptr %2, align 8, !tbaa !13
%8 = load i64, ptr @RCAR_GEN3, align 8, !tbaa !12
%9 = icmp eq i64 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %1
%11 = load i32, ptr @TROCR, align 4, !tbaa !14
%12 = tail call i64 @ravb_read(ptr noundef %0, i32 noundef %11) #2
%13 = getelementptr inbounds i8, ptr %0, i64 88
%14 = load i32, ptr %13, align 8, !tbaa !16
%15 = trunc i64 %12 to i32
%16 = add i32 %14, %15
store i32 %16, ptr %13, align 8, !tbaa !16
%17 = load i32, ptr @TROCR, align 4, !tbaa !14
%18 = tail call i32 @ravb_write(ptr noundef %0, i32 noundef 0, i32 noundef %17) #2
br label %19
19: ; preds = %10, %1
%20 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %6
%21 = getelementptr inbounds %struct.net_device_stats, ptr %4, i64 %5
%22 = getelementptr inbounds i8, ptr %21, i64 80
%23 = load i64, ptr %22, align 8, !tbaa !18
%24 = getelementptr inbounds i8, ptr %20, i64 80
%25 = load i64, ptr %24, align 8, !tbaa !18
%26 = add nsw i64 %25, %23
%27 = getelementptr inbounds i8, ptr %0, i64 80
store i64 %26, ptr %27, align 8, !tbaa !18
%28 = getelementptr inbounds i8, ptr %21, i64 64
%29 = getelementptr inbounds i8, ptr %20, i64 64
%30 = getelementptr inbounds i8, ptr %0, i64 64
%31 = load <2 x i64>, ptr %28, align 8, !tbaa !12
%32 = load <2 x i64>, ptr %29, align 8, !tbaa !12
%33 = add nsw <2 x i64> %32, %31
store <2 x i64> %33, ptr %30, align 8, !tbaa !12
%34 = getelementptr inbounds i8, ptr %21, i64 48
%35 = getelementptr inbounds i8, ptr %20, i64 48
%36 = getelementptr inbounds i8, ptr %0, i64 48
%37 = load <2 x i64>, ptr %34, align 8, !tbaa !12
%38 = load <2 x i64>, ptr %35, align 8, !tbaa !12
%39 = add nsw <2 x i64> %38, %37
store <2 x i64> %39, ptr %36, align 8, !tbaa !12
%40 = getelementptr inbounds i8, ptr %21, i64 32
%41 = getelementptr inbounds i8, ptr %20, i64 32
%42 = getelementptr inbounds i8, ptr %0, i64 32
%43 = load <2 x i64>, ptr %40, align 8, !tbaa !12
%44 = load <2 x i64>, ptr %41, align 8, !tbaa !12
%45 = add nsw <2 x i64> %44, %43
store <2 x i64> %45, ptr %42, align 8, !tbaa !12
%46 = getelementptr inbounds i8, ptr %21, i64 16
%47 = getelementptr inbounds i8, ptr %20, i64 16
%48 = getelementptr inbounds i8, ptr %0, i64 16
%49 = load <2 x i64>, ptr %46, align 8, !tbaa !12
%50 = load <2 x i64>, ptr %47, align 8, !tbaa !12
%51 = add nsw <2 x i64> %50, %49
store <2 x i64> %51, ptr %48, align 8, !tbaa !12
%52 = load <2 x i64>, ptr %21, align 8, !tbaa !12
%53 = load <2 x i64>, ptr %20, align 8, !tbaa !12
%54 = add nsw <2 x i64> %53, %52
store <2 x i64> %54, ptr %0, align 8, !tbaa !12
ret ptr %0
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i64 @ravb_read(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ravb_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"ravb_private", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !9, i64 0}
!16 = !{!17, !15, i64 88}
!17 = !{!"net_device_stats", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !8, i64 32, !8, i64 40, !8, i64 48, !8, i64 56, !8, i64 64, !8, i64 72, !8, i64 80, !15, i64 88}
!18 = !{!17, !8, i64 80}
|
linux_drivers_net_ethernet_renesas_extr_ravb_main.c_ravb_get_stats
|
; ModuleID = 'AnghaBench/freebsd/lib/libc/net/extr_ntoh.c_htonl.c'
source_filename = "AnghaBench/freebsd/lib/libc/net/extr_ntoh.c_htonl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @htonl(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @__htonl(i32 noundef %0) #2
ret i32 %2
}
declare i32 @__htonl(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/lib/libc/net/extr_ntoh.c_htonl.c'
source_filename = "AnghaBench/freebsd/lib/libc/net/extr_ntoh.c_htonl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @htonl(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @__htonl(i32 noundef %0) #2
ret i32 %2
}
declare i32 @__htonl(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_lib_libc_net_extr_ntoh.c_htonl
|
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/x86_64/extr_loose_ends.c_ffs.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/x86_64/extr_loose_ends.c_ffs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local i32 @ffs(i32 noundef %0) local_unnamed_addr #0 {
%2 = icmp eq i32 %0, 0
%3 = tail call i32 @llvm.cttz.i32(i32 %0, i1 true), !range !5
%4 = add nuw nsw i32 %3, 1
%5 = select i1 %2, i32 0, i32 %4
ret i32 %5
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.cttz.i32(i32, i1 immarg) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{i32 0, i32 33}
|
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/x86_64/extr_loose_ends.c_ffs.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/x86_64/extr_loose_ends.c_ffs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define range(i32 0, 33) i32 @ffs(i32 noundef %0) local_unnamed_addr #0 {
%2 = icmp eq i32 %0, 0
%3 = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 %0, i1 true)
%4 = add nuw nsw i32 %3, 1
%5 = select i1 %2, i32 0, i32 %4
ret i32 %5
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.cttz.i32(i32, i1 immarg) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
darwin-xnu_osfmk_x86_64_extr_loose_ends.c_ffs
|
; ModuleID = 'AnghaBench/linux/samples/vfio-mdev/extr_mtty.c_sample_mdev_dev_show.c'
source_filename = "AnghaBench/linux/samples/vfio-mdev/extr_mtty.c_sample_mdev_dev_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [17 x i8] c"This is MDEV %s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @sample_mdev_dev_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @sample_mdev_dev_show(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef writeonly %2) #0 {
%4 = tail call i64 @mdev_from_dev(ptr noundef %0) #3
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = tail call ptr @dev_name(ptr noundef %0) #3
%8 = tail call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %2, ptr noundef nonnull dereferenceable(1) @.str, ptr noundef %7)
br label %10
9: ; preds = %3
store i16 10, ptr %2, align 1
br label %10
10: ; preds = %9, %6
%11 = phi i32 [ %8, %6 ], [ 1, %9 ]
ret i32 %11
}
declare i64 @mdev_from_dev(ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @sprintf(ptr noalias nocapture noundef writeonly, ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare ptr @dev_name(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/samples/vfio-mdev/extr_mtty.c_sample_mdev_dev_show.c'
source_filename = "AnghaBench/linux/samples/vfio-mdev/extr_mtty.c_sample_mdev_dev_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [17 x i8] c"This is MDEV %s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @sample_mdev_dev_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @sample_mdev_dev_show(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef writeonly %2) #0 {
%4 = tail call i64 @mdev_from_dev(ptr noundef %0) #3
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = tail call ptr @dev_name(ptr noundef %0) #3
%8 = tail call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %2, ptr noundef nonnull dereferenceable(1) @.str, ptr noundef %7)
br label %10
9: ; preds = %3
store i16 10, ptr %2, align 1
br label %10
10: ; preds = %9, %6
%11 = phi i32 [ %8, %6 ], [ 1, %9 ]
ret i32 %11
}
declare i64 @mdev_from_dev(ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @sprintf(ptr noalias nocapture noundef writeonly, ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare ptr @dev_name(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_samples_vfio-mdev_extr_mtty.c_sample_mdev_dev_show
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_quirks.c_pci_fixup_device.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_quirks.c_pci_fixup_device.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local void @pci_fixup_device(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_quirks.c_pci_fixup_device.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_quirks.c_pci_fixup_device.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @pci_fixup_device(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_drivers_pci_extr_quirks.c_pci_fixup_device
|
; ModuleID = 'AnghaBench/linux/sound/core/extr_pcm_lib.c__snd_pcm_hw_param_last.c'
source_filename = "AnghaBench/linux/sound/core/extr_pcm_lib.c__snd_pcm_hw_param_last.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @_snd_pcm_hw_param_last], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @_snd_pcm_hw_param_last(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i64 @hw_is_mask(i32 noundef %1) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @hw_param_mask(ptr noundef %0, i32 noundef %1) #2
%7 = tail call i32 @snd_mask_refine_last(i32 noundef %6) #2
br label %17
8: ; preds = %2
%9 = tail call i64 @hw_is_interval(i32 noundef %1) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = tail call i32 @hw_param_interval(ptr noundef %0, i32 noundef %1) #2
%13 = tail call i32 @snd_interval_refine_last(i32 noundef %12) #2
br label %17
14: ; preds = %8
%15 = load i32, ptr @EINVAL, align 4, !tbaa !5
%16 = sub nsw i32 0, %15
br label %26
17: ; preds = %11, %5
%18 = phi i32 [ %7, %5 ], [ %13, %11 ]
%19 = icmp sgt i32 %18, 0
br i1 %19, label %20, label %26
20: ; preds = %17
%21 = shl nuw i32 1, %1
%22 = load <2 x i32>, ptr %0, align 4, !tbaa !5
%23 = insertelement <2 x i32> poison, i32 %21, i64 0
%24 = shufflevector <2 x i32> %23, <2 x i32> poison, <2 x i32> zeroinitializer
%25 = or <2 x i32> %22, %24
store <2 x i32> %25, ptr %0, align 4, !tbaa !5
br label %26
26: ; preds = %17, %20, %14
%27 = phi i32 [ %16, %14 ], [ %18, %20 ], [ %18, %17 ]
ret i32 %27
}
declare i64 @hw_is_mask(i32 noundef) local_unnamed_addr #1
declare i32 @snd_mask_refine_last(i32 noundef) local_unnamed_addr #1
declare i32 @hw_param_mask(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @hw_is_interval(i32 noundef) local_unnamed_addr #1
declare i32 @snd_interval_refine_last(i32 noundef) local_unnamed_addr #1
declare i32 @hw_param_interval(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/sound/core/extr_pcm_lib.c__snd_pcm_hw_param_last.c'
source_filename = "AnghaBench/linux/sound/core/extr_pcm_lib.c__snd_pcm_hw_param_last.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @_snd_pcm_hw_param_last], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @_snd_pcm_hw_param_last(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i64 @hw_is_mask(i32 noundef %1) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @hw_param_mask(ptr noundef %0, i32 noundef %1) #2
%7 = tail call i32 @snd_mask_refine_last(i32 noundef %6) #2
br label %17
8: ; preds = %2
%9 = tail call i64 @hw_is_interval(i32 noundef %1) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = tail call i32 @hw_param_interval(ptr noundef %0, i32 noundef %1) #2
%13 = tail call i32 @snd_interval_refine_last(i32 noundef %12) #2
br label %17
14: ; preds = %8
%15 = load i32, ptr @EINVAL, align 4, !tbaa !6
%16 = sub nsw i32 0, %15
br label %26
17: ; preds = %11, %5
%18 = phi i32 [ %7, %5 ], [ %13, %11 ]
%19 = icmp sgt i32 %18, 0
br i1 %19, label %20, label %26
20: ; preds = %17
%21 = shl nuw i32 1, %1
%22 = load <2 x i32>, ptr %0, align 4, !tbaa !6
%23 = insertelement <2 x i32> poison, i32 %21, i64 0
%24 = shufflevector <2 x i32> %23, <2 x i32> poison, <2 x i32> zeroinitializer
%25 = or <2 x i32> %22, %24
store <2 x i32> %25, ptr %0, align 4, !tbaa !6
br label %26
26: ; preds = %17, %20, %14
%27 = phi i32 [ %16, %14 ], [ %18, %20 ], [ %18, %17 ]
ret i32 %27
}
declare i64 @hw_is_mask(i32 noundef) local_unnamed_addr #1
declare i32 @snd_mask_refine_last(i32 noundef) local_unnamed_addr #1
declare i32 @hw_param_mask(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @hw_is_interval(i32 noundef) local_unnamed_addr #1
declare i32 @snd_interval_refine_last(i32 noundef) local_unnamed_addr #1
declare i32 @hw_param_interval(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_sound_core_extr_pcm_lib.c__snd_pcm_hw_param_last
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_alphabsd-nat.c_store_inferior_registers.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_alphabsd-nat.c_store_inferior_registers.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.reg = type { i32 }
%struct.fpreg = type { i32 }
@PT_GETREGS = dso_local local_unnamed_addr global i32 0, align 4
@inferior_ptid = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [23 x i8] c"Couldn't get registers\00", align 1
@PT_SETREGS = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [25 x i8] c"Couldn't write registers\00", align 1
@FP0_REGNUM = dso_local local_unnamed_addr global i32 0, align 4
@PT_GETFPREGS = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [35 x i8] c"Couldn't get floating point status\00", align 1
@PT_SETFPREGS = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [37 x i8] c"Couldn't write floating point status\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @store_inferior_registers(i32 noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.reg, align 4
%3 = alloca %struct.fpreg, align 4
%4 = icmp eq i32 %0, -1
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = tail call i64 @getregs_supplies(i32 noundef %0) #3
%7 = icmp eq i64 %6, 0
br i1 %7, label %29, label %8
8: ; preds = %5, %1
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%9 = load i32, ptr @PT_GETREGS, align 4, !tbaa !5
%10 = load i32, ptr @inferior_ptid, align 4, !tbaa !5
%11 = tail call i32 @PIDGET(i32 noundef %10) #3
%12 = ptrtoint ptr %2 to i64
%13 = trunc i64 %12 to i32
%14 = call i32 @ptrace(i32 noundef %9, i32 noundef %11, i32 noundef %13, i32 noundef 0) #3
%15 = icmp eq i32 %14, -1
br i1 %15, label %16, label %18
16: ; preds = %8
%17 = call i32 @perror_with_name(ptr noundef nonnull @.str) #3
br label %18
18: ; preds = %16, %8
%19 = call i32 @alphabsd_fill_reg(ptr noundef nonnull %2, i32 noundef %0) #3
%20 = load i32, ptr @PT_SETREGS, align 4, !tbaa !5
%21 = load i32, ptr @inferior_ptid, align 4, !tbaa !5
%22 = call i32 @PIDGET(i32 noundef %21) #3
%23 = call i32 @ptrace(i32 noundef %20, i32 noundef %22, i32 noundef %13, i32 noundef 0) #3
%24 = icmp eq i32 %23, -1
br i1 %24, label %25, label %27
25: ; preds = %18
%26 = call i32 @perror_with_name(ptr noundef nonnull @.str.1) #3
br label %27
27: ; preds = %25, %18
%28 = icmp eq i32 %0, -1
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br i1 %28, label %32, label %52
29: ; preds = %5
%30 = load i32, ptr @FP0_REGNUM, align 4
%31 = icmp sgt i32 %30, %0
br i1 %31, label %52, label %32
32: ; preds = %27, %29
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%33 = load i32, ptr @PT_GETFPREGS, align 4, !tbaa !5
%34 = load i32, ptr @inferior_ptid, align 4, !tbaa !5
%35 = call i32 @PIDGET(i32 noundef %34) #3
%36 = ptrtoint ptr %3 to i64
%37 = trunc i64 %36 to i32
%38 = call i32 @ptrace(i32 noundef %33, i32 noundef %35, i32 noundef %37, i32 noundef 0) #3
%39 = icmp eq i32 %38, -1
br i1 %39, label %40, label %42
40: ; preds = %32
%41 = call i32 @perror_with_name(ptr noundef nonnull @.str.2) #3
br label %42
42: ; preds = %40, %32
%43 = call i32 @alphabsd_fill_fpreg(ptr noundef nonnull %3, i32 noundef %0) #3
%44 = load i32, ptr @PT_SETFPREGS, align 4, !tbaa !5
%45 = load i32, ptr @inferior_ptid, align 4, !tbaa !5
%46 = call i32 @PIDGET(i32 noundef %45) #3
%47 = call i32 @ptrace(i32 noundef %44, i32 noundef %46, i32 noundef %37, i32 noundef 0) #3
%48 = icmp eq i32 %47, -1
br i1 %48, label %49, label %51
49: ; preds = %42
%50 = call i32 @perror_with_name(ptr noundef nonnull @.str.3) #3
br label %51
51: ; preds = %49, %42
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
br label %52
52: ; preds = %27, %29, %51
ret void
}
declare i64 @getregs_supplies(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2
declare i32 @ptrace(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PIDGET(i32 noundef) local_unnamed_addr #1
declare i32 @perror_with_name(ptr noundef) local_unnamed_addr #1
declare i32 @alphabsd_fill_reg(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2
declare i32 @alphabsd_fill_fpreg(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_alphabsd-nat.c_store_inferior_registers.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_alphabsd-nat.c_store_inferior_registers.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.reg = type { i32 }
%struct.fpreg = type { i32 }
@PT_GETREGS = common local_unnamed_addr global i32 0, align 4
@inferior_ptid = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [23 x i8] c"Couldn't get registers\00", align 1
@PT_SETREGS = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [25 x i8] c"Couldn't write registers\00", align 1
@FP0_REGNUM = common local_unnamed_addr global i32 0, align 4
@PT_GETFPREGS = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [35 x i8] c"Couldn't get floating point status\00", align 1
@PT_SETFPREGS = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [37 x i8] c"Couldn't write floating point status\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @store_inferior_registers(i32 noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.reg, align 4
%3 = alloca %struct.fpreg, align 4
%4 = icmp eq i32 %0, -1
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = tail call i64 @getregs_supplies(i32 noundef %0) #3
%7 = icmp eq i64 %6, 0
br i1 %7, label %28, label %8
8: ; preds = %5, %1
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%9 = load i32, ptr @PT_GETREGS, align 4, !tbaa !6
%10 = load i32, ptr @inferior_ptid, align 4, !tbaa !6
%11 = tail call i32 @PIDGET(i32 noundef %10) #3
%12 = ptrtoint ptr %2 to i64
%13 = trunc i64 %12 to i32
%14 = call i32 @ptrace(i32 noundef %9, i32 noundef %11, i32 noundef %13, i32 noundef 0) #3
%15 = icmp eq i32 %14, -1
br i1 %15, label %16, label %18
16: ; preds = %8
%17 = call i32 @perror_with_name(ptr noundef nonnull @.str) #3
br label %18
18: ; preds = %16, %8
%19 = call i32 @alphabsd_fill_reg(ptr noundef nonnull %2, i32 noundef %0) #3
%20 = load i32, ptr @PT_SETREGS, align 4, !tbaa !6
%21 = load i32, ptr @inferior_ptid, align 4, !tbaa !6
%22 = call i32 @PIDGET(i32 noundef %21) #3
%23 = call i32 @ptrace(i32 noundef %20, i32 noundef %22, i32 noundef %13, i32 noundef 0) #3
%24 = icmp eq i32 %23, -1
br i1 %24, label %25, label %27
25: ; preds = %18
%26 = call i32 @perror_with_name(ptr noundef nonnull @.str.1) #3
br label %27
27: ; preds = %25, %18
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br i1 %4, label %31, label %51
28: ; preds = %5
%29 = load i32, ptr @FP0_REGNUM, align 4
%30 = icmp sgt i32 %29, %0
br i1 %30, label %51, label %31
31: ; preds = %27, %28
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%32 = load i32, ptr @PT_GETFPREGS, align 4, !tbaa !6
%33 = load i32, ptr @inferior_ptid, align 4, !tbaa !6
%34 = call i32 @PIDGET(i32 noundef %33) #3
%35 = ptrtoint ptr %3 to i64
%36 = trunc i64 %35 to i32
%37 = call i32 @ptrace(i32 noundef %32, i32 noundef %34, i32 noundef %36, i32 noundef 0) #3
%38 = icmp eq i32 %37, -1
br i1 %38, label %39, label %41
39: ; preds = %31
%40 = call i32 @perror_with_name(ptr noundef nonnull @.str.2) #3
br label %41
41: ; preds = %39, %31
%42 = call i32 @alphabsd_fill_fpreg(ptr noundef nonnull %3, i32 noundef %0) #3
%43 = load i32, ptr @PT_SETFPREGS, align 4, !tbaa !6
%44 = load i32, ptr @inferior_ptid, align 4, !tbaa !6
%45 = call i32 @PIDGET(i32 noundef %44) #3
%46 = call i32 @ptrace(i32 noundef %43, i32 noundef %45, i32 noundef %36, i32 noundef 0) #3
%47 = icmp eq i32 %46, -1
br i1 %47, label %48, label %50
48: ; preds = %41
%49 = call i32 @perror_with_name(ptr noundef nonnull @.str.3) #3
br label %50
50: ; preds = %48, %41
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
br label %51
51: ; preds = %27, %28, %50
ret void
}
declare i64 @getregs_supplies(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2
declare i32 @ptrace(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PIDGET(i32 noundef) local_unnamed_addr #1
declare i32 @perror_with_name(ptr noundef) local_unnamed_addr #1
declare i32 @alphabsd_fill_reg(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2
declare i32 @alphabsd_fill_fpreg(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_contrib_gdb_gdb_extr_alphabsd-nat.c_store_inferior_registers
|
; ModuleID = 'AnghaBench/ish/fs/extr_pty.c_pty_master_cleanup.c'
source_filename = "AnghaBench/ish/fs/extr_pty.c_pty_master_cleanup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
%struct.tty = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { %struct.tty* }
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (void (%struct.tty*)* @pty_master_cleanup to i8*)], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @pty_master_cleanup(%struct.tty* nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.tty, %struct.tty* %0, i64 0, i32 1, i32 0
%3 = load %struct.tty*, %struct.tty** %2, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.tty, %struct.tty* %3, i64 0, i32 1, i32 0
store %struct.tty* null, %struct.tty** %4, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.tty, %struct.tty* %3, i64 0, i32 0
%6 = tail call i32 @lock(i32* noundef %5) #2
%7 = tail call i32 @tty_hangup(%struct.tty* noundef %3) #2
%8 = tail call i32 @unlock(i32* noundef %5) #2
%9 = tail call i32 @tty_release(%struct.tty* noundef %3) #2
ret void
}
declare i32 @lock(i32* noundef) local_unnamed_addr #1
declare i32 @tty_hangup(%struct.tty* noundef) local_unnamed_addr #1
declare i32 @unlock(i32* noundef) local_unnamed_addr #1
declare i32 @tty_release(%struct.tty* noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"}
!5 = !{!6, !11, i64 8}
!6 = !{!"tty", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
|
; ModuleID = 'AnghaBench/ish/fs/extr_pty.c_pty_master_cleanup.c'
source_filename = "AnghaBench/ish/fs/extr_pty.c_pty_master_cleanup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pty_master_cleanup], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @pty_master_cleanup(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %3, i64 8
store ptr null, ptr %4, align 8, !tbaa !6
%5 = tail call i32 @lock(ptr noundef %3) #2
%6 = tail call i32 @tty_hangup(ptr noundef %3) #2
%7 = tail call i32 @unlock(ptr noundef %3) #2
%8 = tail call i32 @tty_release(ptr noundef %3) #2
ret void
}
declare i32 @lock(ptr noundef) local_unnamed_addr #1
declare i32 @tty_hangup(ptr noundef) local_unnamed_addr #1
declare i32 @unlock(ptr noundef) local_unnamed_addr #1
declare i32 @tty_release(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"tty", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
|
ish_fs_extr_pty.c_pty_master_cleanup
|
; ModuleID = 'AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_write_set_format_7zip.c_compression_end.c'
source_filename = "AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_write_set_format_7zip.c_compression_end.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.la_zstream = type { ptr, ptr, i64, i64 }
@ARCHIVE_OK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @compression_end], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @compression_end(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.la_zstream, ptr %1, i64 0, i32 3
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %13, label %6
6: ; preds = %2
%7 = getelementptr inbounds %struct.la_zstream, ptr %1, i64 0, i32 2
store i64 0, ptr %7, align 8, !tbaa !11
%8 = getelementptr inbounds %struct.la_zstream, ptr %1, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = tail call i32 @free(ptr noundef %9) #2
store ptr null, ptr %8, align 8, !tbaa !12
%11 = load ptr, ptr %1, align 8, !tbaa !13
%12 = tail call i32 %11(ptr noundef %0, ptr noundef nonnull %1) #2
br label %15
13: ; preds = %2
%14 = load i32, ptr @ARCHIVE_OK, align 4, !tbaa !14
br label %15
15: ; preds = %13, %6
%16 = phi i32 [ %12, %6 ], [ %14, %13 ]
ret i32 %16
}
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"la_zstream", !7, i64 0, !7, i64 8, !10, i64 16, !10, i64 24}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !10, i64 16}
!12 = !{!6, !7, i64 8}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_write_set_format_7zip.c_compression_end.c'
source_filename = "AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_write_set_format_7zip.c_compression_end.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ARCHIVE_OK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @compression_end], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @compression_end(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 24
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %13, label %6
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %1, i64 16
store i64 0, ptr %7, align 8, !tbaa !12
%8 = getelementptr inbounds i8, ptr %1, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !13
%10 = tail call i32 @free(ptr noundef %9) #2
store ptr null, ptr %8, align 8, !tbaa !13
%11 = load ptr, ptr %1, align 8, !tbaa !14
%12 = tail call i32 %11(ptr noundef %0, ptr noundef nonnull %1) #2
br label %15
13: ; preds = %2
%14 = load i32, ptr @ARCHIVE_OK, align 4, !tbaa !15
br label %15
15: ; preds = %13, %6
%16 = phi i32 [ %12, %6 ], [ %14, %13 ]
ret i32 %16
}
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 24}
!7 = !{!"la_zstream", !8, i64 0, !8, i64 8, !11, i64 16, !11, i64 24}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 16}
!13 = !{!7, !8, i64 8}
!14 = !{!7, !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !9, i64 0}
|
freebsd_contrib_libarchive_libarchive_extr_archive_write_set_format_7zip.c_compression_end
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_common.h_il_free_pages.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_common.h_il_free_pages.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.il_priv = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @il_free_pages], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @il_free_pages(ptr nocapture noundef %0, i64 noundef %1) #0 {
%3 = getelementptr inbounds %struct.il_priv, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i32 @free_pages(i64 noundef %1, i32 noundef %4) #2
%6 = load i32, ptr %0, align 4, !tbaa !11
%7 = add nsw i32 %6, -1
store i32 %7, ptr %0, align 4, !tbaa !11
ret void
}
declare i32 @free_pages(i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"il_priv", !7, i64 0, !10, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !7, i64 0}
!11 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_common.h_il_free_pages.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_common.h_il_free_pages.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @il_free_pages], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @il_free_pages(ptr nocapture noundef %0, i64 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @free_pages(i64 noundef %1, i32 noundef %4) #2
%6 = load i32, ptr %0, align 4, !tbaa !12
%7 = add nsw i32 %6, -1
store i32 %7, ptr %0, align 4, !tbaa !12
ret void
}
declare i32 @free_pages(i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"il_priv", !8, i64 0, !11, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !8, i64 0}
!12 = !{!7, !8, i64 0}
|
linux_drivers_net_wireless_intel_iwlegacy_extr_common.h_il_free_pages
|
; ModuleID = 'AnghaBench/h2o/deps/picotls/deps/cifra/shitlisp/extr_sl-cifra.c_aes_block_encrypt.c'
source_filename = "AnghaBench/h2o/deps/picotls/deps/cifra/shitlisp/extr_sl-cifra.c_aes_block_encrypt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@cf_aes_encrypt = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @aes_block_encrypt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @aes_block_encrypt(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load i32, ptr @cf_aes_encrypt, align 4, !tbaa !5
%5 = tail call ptr @aes_block_fn(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %4) #2
ret ptr %5
}
declare ptr @aes_block_fn(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/h2o/deps/picotls/deps/cifra/shitlisp/extr_sl-cifra.c_aes_block_encrypt.c'
source_filename = "AnghaBench/h2o/deps/picotls/deps/cifra/shitlisp/extr_sl-cifra.c_aes_block_encrypt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cf_aes_encrypt = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @aes_block_encrypt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @aes_block_encrypt(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load i32, ptr @cf_aes_encrypt, align 4, !tbaa !6
%5 = tail call ptr @aes_block_fn(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %4) #2
ret ptr %5
}
declare ptr @aes_block_fn(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
h2o_deps_picotls_deps_cifra_shitlisp_extr_sl-cifra.c_aes_block_encrypt
|
; ModuleID = 'AnghaBench/reactos/base/shell/cmd/extr_strtoclr.c_txt_clr.c'
source_filename = "AnghaBench/reactos/base/shell/cmd/extr_strtoclr.c_txt_clr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, ptr }
@clrtable = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @txt_clr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @txt_clr(i32 noundef %0) #0 {
%2 = load ptr, ptr @clrtable, align 8, !tbaa !5
%3 = getelementptr inbounds %struct.TYPE_2__, ptr %2, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !9
%5 = load i64, ptr %4, align 8, !tbaa !12
%6 = icmp eq i64 %5, 0
br i1 %6, label %24, label %7
7: ; preds = %1, %17
%8 = phi ptr [ %21, %17 ], [ %4, %1 ]
%9 = phi i64 [ %18, %17 ], [ 0, %1 ]
%10 = tail call i32 @_tcslen(ptr noundef nonnull %8) #2
%11 = tail call i64 @_tcsnicmp(i32 noundef %0, ptr noundef nonnull %8, i32 noundef %10) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %7
%14 = load ptr, ptr @clrtable, align 8, !tbaa !5
%15 = getelementptr inbounds %struct.TYPE_2__, ptr %14, i64 %9
%16 = load i32, ptr %15, align 8, !tbaa !14
br label %24
17: ; preds = %7
%18 = add i64 %9, 1
%19 = load ptr, ptr @clrtable, align 8, !tbaa !5
%20 = getelementptr inbounds %struct.TYPE_2__, ptr %19, i64 %18, i32 1
%21 = load ptr, ptr %20, align 8, !tbaa !9
%22 = load i64, ptr %21, align 8, !tbaa !12
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %7, !llvm.loop !15
24: ; preds = %17, %1, %13
%25 = phi i32 [ %16, %13 ], [ -1, %1 ], [ -1, %17 ]
ret i32 %25
}
declare i64 @_tcsnicmp(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @_tcslen(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"TYPE_2__", !11, i64 0, !6, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!10, !11, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/reactos/base/shell/cmd/extr_strtoclr.c_txt_clr.c'
source_filename = "AnghaBench/reactos/base/shell/cmd/extr_strtoclr.c_txt_clr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, ptr }
@clrtable = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @txt_clr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @txt_clr(i32 noundef %0) #0 {
%2 = load ptr, ptr @clrtable, align 8, !tbaa !6
%3 = getelementptr inbounds i8, ptr %2, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = load i64, ptr %4, align 8, !tbaa !13
%6 = icmp eq i64 %5, 0
br i1 %6, label %24, label %7
7: ; preds = %1, %17
%8 = phi ptr [ %21, %17 ], [ %4, %1 ]
%9 = phi i64 [ %18, %17 ], [ 0, %1 ]
%10 = tail call i32 @_tcslen(ptr noundef nonnull %8) #2
%11 = tail call i64 @_tcsnicmp(i32 noundef %0, ptr noundef nonnull %8, i32 noundef %10) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %7
%14 = load ptr, ptr @clrtable, align 8, !tbaa !6
%15 = getelementptr inbounds %struct.TYPE_2__, ptr %14, i64 %9
%16 = load i32, ptr %15, align 8, !tbaa !15
br label %24
17: ; preds = %7
%18 = add i64 %9, 1
%19 = load ptr, ptr @clrtable, align 8, !tbaa !6
%20 = getelementptr inbounds %struct.TYPE_2__, ptr %19, i64 %18, i32 1
%21 = load ptr, ptr %20, align 8, !tbaa !10
%22 = load i64, ptr %21, align 8, !tbaa !13
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %7, !llvm.loop !16
24: ; preds = %17, %1, %13
%25 = phi i32 [ %16, %13 ], [ -1, %1 ], [ -1, %17 ]
ret i32 %25
}
declare i64 @_tcsnicmp(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @_tcslen(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"TYPE_2__", !12, i64 0, !7, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!11, !12, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
|
reactos_base_shell_cmd_extr_strtoclr.c_txt_clr
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-pxa/extr_poodle.c_poodle_poweroff.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-pxa/extr_poodle.c_poodle_poweroff.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @poodle_poweroff], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @poodle_poweroff() #0 {
%1 = tail call i32 @arm_machine_restart(i8 noundef signext 104, ptr noundef null) #2
ret void
}
declare i32 @arm_machine_restart(i8 noundef signext, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-pxa/extr_poodle.c_poodle_poweroff.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-pxa/extr_poodle.c_poodle_poweroff.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @poodle_poweroff], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @poodle_poweroff() #0 {
%1 = tail call i32 @arm_machine_restart(i8 noundef signext 104, ptr noundef null) #2
ret void
}
declare i32 @arm_machine_restart(i8 noundef signext, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_arch_arm_mach-pxa_extr_poodle.c_poodle_poweroff
|
; ModuleID = 'AnghaBench/sumatrapdf/ext/lcms2/testbed/extr_testcms2.c_CheckOne4D.c'
source_filename = "AnghaBench/sumatrapdf/ext/lcms2/testbed/extr_testcms2.c_CheckOne4D.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [10 x i8] c"Channel 1\00", align 1
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [10 x i8] c"Channel 2\00", align 1
@.str.2 = private unnamed_addr constant [10 x i8] c"Channel 3\00", align 1
@TRUE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @CheckOne4D], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @CheckOne4D(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = alloca [4 x i32], align 16
%7 = alloca [3 x i32], align 4
%8 = alloca [3 x i32], align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %8) #3
store i32 %1, ptr %6, align 16, !tbaa !5
%9 = getelementptr inbounds [4 x i32], ptr %6, i64 0, i64 1
store i32 %2, ptr %9, align 4, !tbaa !5
%10 = getelementptr inbounds [4 x i32], ptr %6, i64 0, i64 2
store i32 %3, ptr %10, align 8, !tbaa !5
%11 = getelementptr inbounds [4 x i32], ptr %6, i64 0, i64 3
store i32 %4, ptr %11, align 4, !tbaa !5
%12 = tail call i32 (...) @DbgThread() #3
%13 = call i32 @cmsPipelineEval16(i32 noundef %12, ptr noundef nonnull %6, ptr noundef nonnull %7, ptr noundef %0) #3
%14 = call i32 (...) @DbgThread() #3
%15 = call i32 @Sampler4D(i32 noundef %14, ptr noundef nonnull %6, ptr noundef nonnull %8, ptr noundef null) #3
%16 = load i32, ptr %7, align 4, !tbaa !5
%17 = load i32, ptr %8, align 4, !tbaa !5
%18 = call i32 @IsGoodWordPrec(ptr noundef nonnull @.str, i32 noundef %16, i32 noundef %17, i32 noundef 2) #3
%19 = icmp eq i32 %18, 0
br i1 %19, label %35, label %20
20: ; preds = %5
%21 = getelementptr inbounds [3 x i32], ptr %7, i64 0, i64 1
%22 = load i32, ptr %21, align 4, !tbaa !5
%23 = getelementptr inbounds [3 x i32], ptr %8, i64 0, i64 1
%24 = load i32, ptr %23, align 4, !tbaa !5
%25 = call i32 @IsGoodWordPrec(ptr noundef nonnull @.str.1, i32 noundef %22, i32 noundef %24, i32 noundef 2) #3
%26 = icmp eq i32 %25, 0
br i1 %26, label %35, label %27
27: ; preds = %20
%28 = getelementptr inbounds [3 x i32], ptr %7, i64 0, i64 2
%29 = load i32, ptr %28, align 4, !tbaa !5
%30 = getelementptr inbounds [3 x i32], ptr %8, i64 0, i64 2
%31 = load i32, ptr %30, align 4, !tbaa !5
%32 = call i32 @IsGoodWordPrec(ptr noundef nonnull @.str.2, i32 noundef %29, i32 noundef %31, i32 noundef 2) #3
%33 = icmp eq i32 %32, 0
%34 = select i1 %33, ptr @FALSE, ptr @TRUE
br label %35
35: ; preds = %27, %20, %5
%36 = phi ptr [ @FALSE, %5 ], [ @FALSE, %20 ], [ %34, %27 ]
%37 = load i32, ptr %36, align 4, !tbaa !5
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #3
ret i32 %37
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cmsPipelineEval16(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @DbgThread(...) local_unnamed_addr #2
declare i32 @Sampler4D(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @IsGoodWordPrec(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/sumatrapdf/ext/lcms2/testbed/extr_testcms2.c_CheckOne4D.c'
source_filename = "AnghaBench/sumatrapdf/ext/lcms2/testbed/extr_testcms2.c_CheckOne4D.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [10 x i8] c"Channel 1\00", align 1
@FALSE = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [10 x i8] c"Channel 2\00", align 1
@.str.2 = private unnamed_addr constant [10 x i8] c"Channel 3\00", align 1
@TRUE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @CheckOne4D], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @CheckOne4D(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = alloca [4 x i32], align 4
%7 = alloca [3 x i32], align 4
%8 = alloca [3 x i32], align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %8) #3
store i32 %1, ptr %6, align 4, !tbaa !6
%9 = getelementptr inbounds i8, ptr %6, i64 4
store i32 %2, ptr %9, align 4, !tbaa !6
%10 = getelementptr inbounds i8, ptr %6, i64 8
store i32 %3, ptr %10, align 4, !tbaa !6
%11 = getelementptr inbounds i8, ptr %6, i64 12
store i32 %4, ptr %11, align 4, !tbaa !6
%12 = tail call i32 @DbgThread() #3
%13 = call i32 @cmsPipelineEval16(i32 noundef %12, ptr noundef nonnull %6, ptr noundef nonnull %7, ptr noundef %0) #3
%14 = call i32 @DbgThread() #3
%15 = call i32 @Sampler4D(i32 noundef %14, ptr noundef nonnull %6, ptr noundef nonnull %8, ptr noundef null) #3
%16 = load i32, ptr %7, align 4, !tbaa !6
%17 = load i32, ptr %8, align 4, !tbaa !6
%18 = call i32 @IsGoodWordPrec(ptr noundef nonnull @.str, i32 noundef %16, i32 noundef %17, i32 noundef 2) #3
%19 = icmp eq i32 %18, 0
br i1 %19, label %35, label %20
20: ; preds = %5
%21 = getelementptr inbounds i8, ptr %7, i64 4
%22 = load i32, ptr %21, align 4, !tbaa !6
%23 = getelementptr inbounds i8, ptr %8, i64 4
%24 = load i32, ptr %23, align 4, !tbaa !6
%25 = call i32 @IsGoodWordPrec(ptr noundef nonnull @.str.1, i32 noundef %22, i32 noundef %24, i32 noundef 2) #3
%26 = icmp eq i32 %25, 0
br i1 %26, label %35, label %27
27: ; preds = %20
%28 = getelementptr inbounds i8, ptr %7, i64 8
%29 = load i32, ptr %28, align 4, !tbaa !6
%30 = getelementptr inbounds i8, ptr %8, i64 8
%31 = load i32, ptr %30, align 4, !tbaa !6
%32 = call i32 @IsGoodWordPrec(ptr noundef nonnull @.str.2, i32 noundef %29, i32 noundef %31, i32 noundef 2) #3
%33 = icmp eq i32 %32, 0
%34 = select i1 %33, ptr @FALSE, ptr @TRUE
br label %35
35: ; preds = %27, %20, %5
%36 = phi ptr [ @FALSE, %5 ], [ @FALSE, %20 ], [ %34, %27 ]
%37 = load i32, ptr %36, align 4, !tbaa !6
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #3
ret i32 %37
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cmsPipelineEval16(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @DbgThread(...) local_unnamed_addr #2
declare i32 @Sampler4D(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @IsGoodWordPrec(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
sumatrapdf_ext_lcms2_testbed_extr_testcms2.c_CheckOne4D
|
; ModuleID = 'AnghaBench/RetroArch/menu/cbs/extr_menu_cbs_ok.c_menu_input_wifi_cb.c'
source_filename = "AnghaBench/RetroArch/menu/cbs/extr_menu_cbs_ok.c_menu_input_wifi_cb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @menu_input_wifi_cb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @menu_input_wifi_cb(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = tail call i32 (...) @menu_input_dialog_get_kb_idx() #2
%4 = tail call i32 @driver_wifi_connect_ssid(i32 noundef %3, ptr noundef %1) #2
%5 = tail call i32 (...) @menu_input_dialog_end() #2
ret void
}
declare i32 @menu_input_dialog_get_kb_idx(...) local_unnamed_addr #1
declare i32 @driver_wifi_connect_ssid(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @menu_input_dialog_end(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/RetroArch/menu/cbs/extr_menu_cbs_ok.c_menu_input_wifi_cb.c'
source_filename = "AnghaBench/RetroArch/menu/cbs/extr_menu_cbs_ok.c_menu_input_wifi_cb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @menu_input_wifi_cb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @menu_input_wifi_cb(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = tail call i32 @menu_input_dialog_get_kb_idx() #2
%4 = tail call i32 @driver_wifi_connect_ssid(i32 noundef %3, ptr noundef %1) #2
%5 = tail call i32 @menu_input_dialog_end() #2
ret void
}
declare i32 @menu_input_dialog_get_kb_idx(...) local_unnamed_addr #1
declare i32 @driver_wifi_connect_ssid(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @menu_input_dialog_end(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
RetroArch_menu_cbs_extr_menu_cbs_ok.c_menu_input_wifi_cb
|
; ModuleID = 'AnghaBench/lede/target/linux/oxnas/files/drivers/ata/extr_sata_oxnas.c_sata_oxnas_reset_core.c'
source_filename = "AnghaBench/lede/target/linux/oxnas/files/drivers/ata/extr_sata_oxnas.c_sata_oxnas_reset_core.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ata_host = type { ptr, ptr }
%struct.sata_oxnas_host_priv = type { i32, i32, i32, i32, i32 }
@.str = private unnamed_addr constant [7 x i8] c"ENTER\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @sata_oxnas_reset_core], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sata_oxnas_reset_core(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.ata_host, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call i32 @DPRINTK(ptr noundef nonnull @.str) #2
%5 = getelementptr inbounds %struct.sata_oxnas_host_priv, ptr %3, i64 0, i32 4
%6 = load i32, ptr %5, align 4, !tbaa !10
%7 = tail call i32 @clk_prepare_enable(i32 noundef %6) #2
%8 = getelementptr inbounds %struct.sata_oxnas_host_priv, ptr %3, i64 0, i32 2
%9 = load i32, ptr %8, align 4, !tbaa !13
%10 = tail call i32 @reset_control_assert(i32 noundef %9) #2
%11 = getelementptr inbounds %struct.sata_oxnas_host_priv, ptr %3, i64 0, i32 1
%12 = load i32, ptr %11, align 4, !tbaa !14
%13 = tail call i32 @reset_control_assert(i32 noundef %12) #2
%14 = getelementptr inbounds %struct.sata_oxnas_host_priv, ptr %3, i64 0, i32 3
%15 = load i32, ptr %14, align 4, !tbaa !15
%16 = tail call i32 @reset_control_assert(i32 noundef %15) #2
%17 = tail call i32 @udelay(i32 noundef 50) #2
%18 = load i32, ptr %14, align 4, !tbaa !15
%19 = tail call i32 @reset_control_deassert(i32 noundef %18) #2
%20 = tail call i32 @udelay(i32 noundef 50) #2
%21 = load i32, ptr %8, align 4, !tbaa !13
%22 = tail call i32 @reset_control_deassert(i32 noundef %21) #2
%23 = load i32, ptr %11, align 4, !tbaa !14
%24 = tail call i32 @reset_control_deassert(i32 noundef %23) #2
%25 = tail call i32 @udelay(i32 noundef 50) #2
%26 = tail call i32 @workaround5458(ptr noundef %0) #2
%27 = load ptr, ptr %0, align 8, !tbaa !16
%28 = load i32, ptr %27, align 4, !tbaa !17
%29 = tail call i32 @sata_oxnas_link_write(i32 noundef %28, i32 noundef 96, i32 noundef 10632) #2
%30 = load i32, ptr %3, align 4, !tbaa !18
%31 = icmp sgt i32 %30, 0
br i1 %31, label %32, label %42
32: ; preds = %1, %32
%33 = phi i64 [ %38, %32 ], [ 0, %1 ]
%34 = load ptr, ptr %0, align 8, !tbaa !16
%35 = getelementptr inbounds i32, ptr %34, i64 %33
%36 = load i32, ptr %35, align 4, !tbaa !17
%37 = tail call i32 @sata_oxnas_link_write(i32 noundef %36, i32 noundef 112, i32 noundef 349737) #2
%38 = add nuw nsw i64 %33, 1
%39 = load i32, ptr %3, align 4, !tbaa !18
%40 = sext i32 %39 to i64
%41 = icmp slt i64 %38, %40
br i1 %41, label %32, label %42, !llvm.loop !19
42: ; preds = %32, %1
%43 = tail call i32 @udelay(i32 noundef 50) #2
ret void
}
declare i32 @DPRINTK(ptr noundef) local_unnamed_addr #1
declare i32 @clk_prepare_enable(i32 noundef) local_unnamed_addr #1
declare i32 @reset_control_assert(i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @reset_control_deassert(i32 noundef) local_unnamed_addr #1
declare i32 @workaround5458(ptr noundef) local_unnamed_addr #1
declare i32 @sata_oxnas_link_write(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"ata_host", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 16}
!11 = !{!"sata_oxnas_host_priv", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !12, i64 4}
!15 = !{!11, !12, i64 12}
!16 = !{!6, !7, i64 0}
!17 = !{!12, !12, i64 0}
!18 = !{!11, !12, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/lede/target/linux/oxnas/files/drivers/ata/extr_sata_oxnas.c_sata_oxnas_reset_core.c'
source_filename = "AnghaBench/lede/target/linux/oxnas/files/drivers/ata/extr_sata_oxnas.c_sata_oxnas_reset_core.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [7 x i8] c"ENTER\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @sata_oxnas_reset_core], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sata_oxnas_reset_core(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call i32 @DPRINTK(ptr noundef nonnull @.str) #2
%5 = getelementptr inbounds i8, ptr %3, i64 16
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = tail call i32 @clk_prepare_enable(i32 noundef %6) #2
%8 = getelementptr inbounds i8, ptr %3, i64 8
%9 = load i32, ptr %8, align 4, !tbaa !14
%10 = tail call i32 @reset_control_assert(i32 noundef %9) #2
%11 = getelementptr inbounds i8, ptr %3, i64 4
%12 = load i32, ptr %11, align 4, !tbaa !15
%13 = tail call i32 @reset_control_assert(i32 noundef %12) #2
%14 = getelementptr inbounds i8, ptr %3, i64 12
%15 = load i32, ptr %14, align 4, !tbaa !16
%16 = tail call i32 @reset_control_assert(i32 noundef %15) #2
%17 = tail call i32 @udelay(i32 noundef 50) #2
%18 = load i32, ptr %14, align 4, !tbaa !16
%19 = tail call i32 @reset_control_deassert(i32 noundef %18) #2
%20 = tail call i32 @udelay(i32 noundef 50) #2
%21 = load i32, ptr %8, align 4, !tbaa !14
%22 = tail call i32 @reset_control_deassert(i32 noundef %21) #2
%23 = load i32, ptr %11, align 4, !tbaa !15
%24 = tail call i32 @reset_control_deassert(i32 noundef %23) #2
%25 = tail call i32 @udelay(i32 noundef 50) #2
%26 = tail call i32 @workaround5458(ptr noundef %0) #2
%27 = load ptr, ptr %0, align 8, !tbaa !17
%28 = load i32, ptr %27, align 4, !tbaa !18
%29 = tail call i32 @sata_oxnas_link_write(i32 noundef %28, i32 noundef 96, i32 noundef 10632) #2
%30 = load i32, ptr %3, align 4, !tbaa !19
%31 = icmp sgt i32 %30, 0
br i1 %31, label %32, label %42
32: ; preds = %1, %32
%33 = phi i64 [ %38, %32 ], [ 0, %1 ]
%34 = load ptr, ptr %0, align 8, !tbaa !17
%35 = getelementptr inbounds i32, ptr %34, i64 %33
%36 = load i32, ptr %35, align 4, !tbaa !18
%37 = tail call i32 @sata_oxnas_link_write(i32 noundef %36, i32 noundef 112, i32 noundef 349737) #2
%38 = add nuw nsw i64 %33, 1
%39 = load i32, ptr %3, align 4, !tbaa !19
%40 = sext i32 %39 to i64
%41 = icmp slt i64 %38, %40
br i1 %41, label %32, label %42, !llvm.loop !20
42: ; preds = %32, %1
%43 = tail call i32 @udelay(i32 noundef 50) #2
ret void
}
declare i32 @DPRINTK(ptr noundef) local_unnamed_addr #1
declare i32 @clk_prepare_enable(i32 noundef) local_unnamed_addr #1
declare i32 @reset_control_assert(i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @reset_control_deassert(i32 noundef) local_unnamed_addr #1
declare i32 @workaround5458(ptr noundef) local_unnamed_addr #1
declare i32 @sata_oxnas_link_write(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"ata_host", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 16}
!12 = !{!"sata_oxnas_host_priv", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16}
!13 = !{!"int", !9, i64 0}
!14 = !{!12, !13, i64 8}
!15 = !{!12, !13, i64 4}
!16 = !{!12, !13, i64 12}
!17 = !{!7, !8, i64 0}
!18 = !{!13, !13, i64 0}
!19 = !{!12, !13, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
|
lede_target_linux_oxnas_files_drivers_ata_extr_sata_oxnas.c_sata_oxnas_reset_core
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_sdio.c_b43_sdio_probe.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_sdio.c_b43_sdio_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sdio_func = type { i32, ptr }
%struct.sdio_func_tuple = type { i32, ptr, i32, ptr }
@.str = private unnamed_addr constant [19 x i8] c"Chip ID %04x:%04x\0A\00", align 1
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@B43_SDIO_BLOCK_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [48 x i8] c"failed to set block size to %u bytes, error %d\0A\00", align 1
@.str.2 = private unnamed_addr constant [33 x i8] c"failed to enable func, error %d\0A\00", align 1
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [28 x i8] c"failed to allocate ssb bus\0A\00", align 1
@.str.4 = private unnamed_addr constant [43 x i8] c"failed to register ssb sdio bus, error %d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @b43_sdio_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @b43_sdio_probe(ptr noundef %0, ptr nocapture readnone %1) #0 {
%3 = getelementptr inbounds %struct.sdio_func, ptr %0, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %45, label %6
6: ; preds = %2, %35
%7 = phi ptr [ %39, %35 ], [ %4, %2 ]
%8 = phi i32 [ %37, %35 ], [ 0, %2 ]
%9 = phi i32 [ %36, %35 ], [ 0, %2 ]
%10 = load i32, ptr %7, align 8, !tbaa !9
%11 = icmp eq i32 %10, 128
br i1 %11, label %12, label %35
12: ; preds = %6
%13 = getelementptr inbounds %struct.sdio_func_tuple, ptr %7, i64 0, i32 1
%14 = load ptr, ptr %13, align 8, !tbaa !12
%15 = load i32, ptr %14, align 4, !tbaa !13
%16 = icmp eq i32 %15, 128
br i1 %16, label %17, label %35
17: ; preds = %12
%18 = getelementptr inbounds %struct.sdio_func_tuple, ptr %7, i64 0, i32 2
%19 = load i32, ptr %18, align 8, !tbaa !14
%20 = icmp eq i32 %19, 5
br i1 %20, label %21, label %35
21: ; preds = %17
%22 = getelementptr inbounds i32, ptr %14, i64 1
%23 = load i32, ptr %22, align 4, !tbaa !13
%24 = getelementptr inbounds i32, ptr %14, i64 2
%25 = load i32, ptr %24, align 4, !tbaa !13
%26 = shl i32 %25, 8
%27 = or i32 %26, %23
%28 = getelementptr inbounds i32, ptr %14, i64 3
%29 = load i32, ptr %28, align 4, !tbaa !13
%30 = getelementptr inbounds i32, ptr %14, i64 4
%31 = load i32, ptr %30, align 4, !tbaa !13
%32 = shl i32 %31, 8
%33 = or i32 %32, %29
%34 = tail call i32 @dev_info(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %27, i32 noundef %33) #2
br label %35
35: ; preds = %6, %21, %17, %12
%36 = phi i32 [ %9, %17 ], [ %27, %21 ], [ %9, %12 ], [ %9, %6 ]
%37 = phi i32 [ %8, %17 ], [ %33, %21 ], [ %8, %12 ], [ %8, %6 ]
%38 = getelementptr inbounds %struct.sdio_func_tuple, ptr %7, i64 0, i32 3
%39 = load ptr, ptr %38, align 8, !tbaa !5
%40 = icmp eq ptr %39, null
br i1 %40, label %41, label %6, !llvm.loop !15
41: ; preds = %35
%42 = icmp ne i32 %36, 0
%43 = icmp ne i32 %37, 0
%44 = select i1 %42, i1 %43, i1 false
br i1 %44, label %48, label %45
45: ; preds = %2, %41
%46 = load i32, ptr @ENODEV, align 4, !tbaa !13
%47 = sub nsw i32 0, %46
br label %86
48: ; preds = %41
%49 = tail call i32 @sdio_claim_host(ptr noundef %0) #2
%50 = load i32, ptr @B43_SDIO_BLOCK_SIZE, align 4, !tbaa !13
%51 = tail call i32 @sdio_set_block_size(ptr noundef %0, i32 noundef %50) #2
%52 = icmp eq i32 %51, 0
br i1 %52, label %56, label %53
53: ; preds = %48
%54 = load i32, ptr @B43_SDIO_BLOCK_SIZE, align 4, !tbaa !13
%55 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %54, i32 noundef %51) #2
br label %83
56: ; preds = %48
%57 = tail call i32 @sdio_enable_func(ptr noundef %0) #2
%58 = icmp eq i32 %57, 0
br i1 %58, label %61, label %59
59: ; preds = %56
%60 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.2, i32 noundef %57) #2
br label %83
61: ; preds = %56
%62 = tail call i32 @sdio_release_host(ptr noundef %0) #2
%63 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !13
%64 = tail call ptr @kzalloc(i32 noundef 4, i32 noundef %63) #2
%65 = icmp eq ptr %64, null
br i1 %65, label %66, label %70
66: ; preds = %61
%67 = load i32, ptr @ENOMEM, align 4, !tbaa !13
%68 = sub nsw i32 0, %67
%69 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.3) #2
br label %79
70: ; preds = %61
%71 = tail call i32 @b43_sdio_get_quirks(i32 noundef %36, i32 noundef %37) #2
%72 = tail call i32 @ssb_bus_sdiobus_register(ptr noundef nonnull %64, ptr noundef %0, i32 noundef %71) #2
%73 = icmp eq i32 %72, 0
br i1 %73, label %77, label %74
74: ; preds = %70
%75 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.4, i32 noundef %72) #2
%76 = tail call i32 @kfree(ptr noundef nonnull %64) #2
br label %79
77: ; preds = %70
%78 = tail call i32 @sdio_set_drvdata(ptr noundef %0, ptr noundef nonnull %64) #2
br label %86
79: ; preds = %74, %66
%80 = phi i32 [ %72, %74 ], [ %68, %66 ]
%81 = tail call i32 @sdio_claim_host(ptr noundef %0) #2
%82 = tail call i32 @sdio_disable_func(ptr noundef %0) #2
br label %83
83: ; preds = %79, %59, %53
%84 = phi i32 [ %51, %53 ], [ %57, %59 ], [ %80, %79 ]
%85 = tail call i32 @sdio_release_host(ptr noundef %0) #2
br label %86
86: ; preds = %45, %83, %77
%87 = phi i32 [ 0, %77 ], [ %84, %83 ], [ %47, %45 ]
ret i32 %87
}
declare i32 @dev_info(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sdio_claim_host(ptr noundef) local_unnamed_addr #1
declare i32 @sdio_set_block_size(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @sdio_enable_func(ptr noundef) local_unnamed_addr #1
declare i32 @sdio_release_host(ptr noundef) local_unnamed_addr #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ssb_bus_sdiobus_register(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43_sdio_get_quirks(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sdio_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @sdio_disable_func(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"sdio_func_tuple", !11, i64 0, !6, i64 8, !11, i64 16, !6, i64 24}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !6, i64 8}
!13 = !{!11, !11, i64 0}
!14 = !{!10, !11, i64 16}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_sdio.c_b43_sdio_probe.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_sdio.c_b43_sdio_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [19 x i8] c"Chip ID %04x:%04x\0A\00", align 1
@ENODEV = common local_unnamed_addr global i32 0, align 4
@B43_SDIO_BLOCK_SIZE = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [48 x i8] c"failed to set block size to %u bytes, error %d\0A\00", align 1
@.str.2 = private unnamed_addr constant [33 x i8] c"failed to enable func, error %d\0A\00", align 1
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [28 x i8] c"failed to allocate ssb bus\0A\00", align 1
@.str.4 = private unnamed_addr constant [43 x i8] c"failed to register ssb sdio bus, error %d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @b43_sdio_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @b43_sdio_probe(ptr noundef %0, ptr nocapture readnone %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %45, label %6
6: ; preds = %2, %35
%7 = phi ptr [ %39, %35 ], [ %4, %2 ]
%8 = phi i32 [ %37, %35 ], [ 0, %2 ]
%9 = phi i32 [ %36, %35 ], [ 0, %2 ]
%10 = load i32, ptr %7, align 8, !tbaa !10
%11 = icmp eq i32 %10, 128
br i1 %11, label %12, label %35
12: ; preds = %6
%13 = getelementptr inbounds i8, ptr %7, i64 8
%14 = load ptr, ptr %13, align 8, !tbaa !13
%15 = load i32, ptr %14, align 4, !tbaa !14
%16 = icmp eq i32 %15, 128
br i1 %16, label %17, label %35
17: ; preds = %12
%18 = getelementptr inbounds i8, ptr %7, i64 16
%19 = load i32, ptr %18, align 8, !tbaa !15
%20 = icmp eq i32 %19, 5
br i1 %20, label %21, label %35
21: ; preds = %17
%22 = getelementptr inbounds i8, ptr %14, i64 4
%23 = load i32, ptr %22, align 4, !tbaa !14
%24 = getelementptr inbounds i8, ptr %14, i64 8
%25 = load i32, ptr %24, align 4, !tbaa !14
%26 = shl i32 %25, 8
%27 = or i32 %26, %23
%28 = getelementptr inbounds i8, ptr %14, i64 12
%29 = load i32, ptr %28, align 4, !tbaa !14
%30 = getelementptr inbounds i8, ptr %14, i64 16
%31 = load i32, ptr %30, align 4, !tbaa !14
%32 = shl i32 %31, 8
%33 = or i32 %32, %29
%34 = tail call i32 @dev_info(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %27, i32 noundef %33) #2
br label %35
35: ; preds = %6, %21, %17, %12
%36 = phi i32 [ %9, %17 ], [ %27, %21 ], [ %9, %12 ], [ %9, %6 ]
%37 = phi i32 [ %8, %17 ], [ %33, %21 ], [ %8, %12 ], [ %8, %6 ]
%38 = getelementptr inbounds i8, ptr %7, i64 24
%39 = load ptr, ptr %38, align 8, !tbaa !6
%40 = icmp eq ptr %39, null
br i1 %40, label %41, label %6, !llvm.loop !16
41: ; preds = %35
%42 = icmp ne i32 %36, 0
%43 = icmp ne i32 %37, 0
%44 = select i1 %42, i1 %43, i1 false
br i1 %44, label %48, label %45
45: ; preds = %2, %41
%46 = load i32, ptr @ENODEV, align 4, !tbaa !14
%47 = sub nsw i32 0, %46
br label %86
48: ; preds = %41
%49 = tail call i32 @sdio_claim_host(ptr noundef %0) #2
%50 = load i32, ptr @B43_SDIO_BLOCK_SIZE, align 4, !tbaa !14
%51 = tail call i32 @sdio_set_block_size(ptr noundef %0, i32 noundef %50) #2
%52 = icmp eq i32 %51, 0
br i1 %52, label %56, label %53
53: ; preds = %48
%54 = load i32, ptr @B43_SDIO_BLOCK_SIZE, align 4, !tbaa !14
%55 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %54, i32 noundef %51) #2
br label %83
56: ; preds = %48
%57 = tail call i32 @sdio_enable_func(ptr noundef %0) #2
%58 = icmp eq i32 %57, 0
br i1 %58, label %61, label %59
59: ; preds = %56
%60 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.2, i32 noundef %57) #2
br label %83
61: ; preds = %56
%62 = tail call i32 @sdio_release_host(ptr noundef %0) #2
%63 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !14
%64 = tail call ptr @kzalloc(i32 noundef 4, i32 noundef %63) #2
%65 = icmp eq ptr %64, null
br i1 %65, label %66, label %70
66: ; preds = %61
%67 = load i32, ptr @ENOMEM, align 4, !tbaa !14
%68 = sub nsw i32 0, %67
%69 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.3) #2
br label %79
70: ; preds = %61
%71 = tail call i32 @b43_sdio_get_quirks(i32 noundef %36, i32 noundef %37) #2
%72 = tail call i32 @ssb_bus_sdiobus_register(ptr noundef nonnull %64, ptr noundef %0, i32 noundef %71) #2
%73 = icmp eq i32 %72, 0
br i1 %73, label %77, label %74
74: ; preds = %70
%75 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.4, i32 noundef %72) #2
%76 = tail call i32 @kfree(ptr noundef nonnull %64) #2
br label %79
77: ; preds = %70
%78 = tail call i32 @sdio_set_drvdata(ptr noundef %0, ptr noundef nonnull %64) #2
br label %86
79: ; preds = %74, %66
%80 = phi i32 [ %72, %74 ], [ %68, %66 ]
%81 = tail call i32 @sdio_claim_host(ptr noundef %0) #2
%82 = tail call i32 @sdio_disable_func(ptr noundef %0) #2
br label %83
83: ; preds = %79, %59, %53
%84 = phi i32 [ %51, %53 ], [ %57, %59 ], [ %80, %79 ]
%85 = tail call i32 @sdio_release_host(ptr noundef %0) #2
br label %86
86: ; preds = %45, %83, %77
%87 = phi i32 [ 0, %77 ], [ %84, %83 ], [ %47, %45 ]
ret i32 %87
}
declare i32 @dev_info(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sdio_claim_host(ptr noundef) local_unnamed_addr #1
declare i32 @sdio_set_block_size(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @sdio_enable_func(ptr noundef) local_unnamed_addr #1
declare i32 @sdio_release_host(ptr noundef) local_unnamed_addr #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ssb_bus_sdiobus_register(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43_sdio_get_quirks(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sdio_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @sdio_disable_func(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"sdio_func_tuple", !12, i64 0, !7, i64 8, !12, i64 16, !7, i64 24}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !7, i64 8}
!14 = !{!12, !12, i64 0}
!15 = !{!11, !12, i64 16}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
|
fastsocket_kernel_drivers_net_wireless_b43_extr_sdio.c_b43_sdio_probe
|
; ModuleID = 'AnghaBench/postgres/src/backend/utils/mmgr/extr_generation.c_GenerationGetChunkSpace.c'
source_filename = "AnghaBench/postgres/src/backend/utils/mmgr/extr_generation.c_GenerationGetChunkSpace.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@GENERATIONCHUNK_PRIVATE_LEN = dso_local local_unnamed_addr global i32 0, align 4
@Generation_CHUNKHDRSZ = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @GenerationGetChunkSpace], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @GenerationGetChunkSpace(i32 %0, ptr noundef %1) #0 {
%3 = tail call ptr @GenerationPointerGetChunk(ptr noundef %1) #2
%4 = load i32, ptr @GENERATIONCHUNK_PRIVATE_LEN, align 4, !tbaa !5
%5 = tail call i32 @VALGRIND_MAKE_MEM_DEFINED(ptr noundef %3, i32 noundef %4) #2
%6 = load i64, ptr %3, align 8, !tbaa !9
%7 = load i64, ptr @Generation_CHUNKHDRSZ, align 8, !tbaa !12
%8 = add nsw i64 %7, %6
%9 = load i32, ptr @GENERATIONCHUNK_PRIVATE_LEN, align 4, !tbaa !5
%10 = tail call i32 @VALGRIND_MAKE_MEM_NOACCESS(ptr noundef nonnull %3, i32 noundef %9) #2
ret i64 %8
}
declare ptr @GenerationPointerGetChunk(ptr noundef) local_unnamed_addr #1
declare i32 @VALGRIND_MAKE_MEM_DEFINED(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VALGRIND_MAKE_MEM_NOACCESS(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_5__", !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!11, !11, i64 0}
|
; ModuleID = 'AnghaBench/postgres/src/backend/utils/mmgr/extr_generation.c_GenerationGetChunkSpace.c'
source_filename = "AnghaBench/postgres/src/backend/utils/mmgr/extr_generation.c_GenerationGetChunkSpace.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GENERATIONCHUNK_PRIVATE_LEN = common local_unnamed_addr global i32 0, align 4
@Generation_CHUNKHDRSZ = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @GenerationGetChunkSpace], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @GenerationGetChunkSpace(i32 %0, ptr noundef %1) #0 {
%3 = tail call ptr @GenerationPointerGetChunk(ptr noundef %1) #2
%4 = load i32, ptr @GENERATIONCHUNK_PRIVATE_LEN, align 4, !tbaa !6
%5 = tail call i32 @VALGRIND_MAKE_MEM_DEFINED(ptr noundef %3, i32 noundef %4) #2
%6 = load i64, ptr %3, align 8, !tbaa !10
%7 = load i64, ptr @Generation_CHUNKHDRSZ, align 8, !tbaa !13
%8 = add nsw i64 %7, %6
%9 = load i32, ptr @GENERATIONCHUNK_PRIVATE_LEN, align 4, !tbaa !6
%10 = tail call i32 @VALGRIND_MAKE_MEM_NOACCESS(ptr noundef nonnull %3, i32 noundef %9) #2
ret i64 %8
}
declare ptr @GenerationPointerGetChunk(ptr noundef) local_unnamed_addr #1
declare i32 @VALGRIND_MAKE_MEM_DEFINED(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VALGRIND_MAKE_MEM_NOACCESS(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_5__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
|
postgres_src_backend_utils_mmgr_extr_generation.c_GenerationGetChunkSpace
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qlogic/qed/extr_qed_ooo.c_qed_ooo_add_new_buffer.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/qlogic/qed/extr_qed_ooo.c_qed_ooo_add_new_buffer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [30 x i8] c"Isle %d is not found(cid %d)\0A\00", align 1
@QED_OOO_LEFT_BUF = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @qed_ooo_add_new_buffer(ptr noundef %0, ptr noundef %1, i32 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5) local_unnamed_addr #0 {
%7 = tail call ptr @qed_ooo_seek_isle(ptr noundef %0, ptr noundef %1, i32 noundef %2, i64 noundef %3) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = tail call i32 @DP_NOTICE(ptr noundef %0, ptr noundef nonnull @.str, i64 noundef %3, i32 noundef %2) #2
br label %18
11: ; preds = %6
%12 = load i64, ptr @QED_OOO_LEFT_BUF, align 8, !tbaa !5
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = tail call i32 @list_add(ptr noundef %4, ptr noundef nonnull %7) #2
br label %18
16: ; preds = %11
%17 = tail call i32 @list_add_tail(ptr noundef %4, ptr noundef nonnull %7) #2
br label %18
18: ; preds = %14, %16, %9
ret void
}
declare ptr @qed_ooo_seek_isle(ptr noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @DP_NOTICE(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qlogic/qed/extr_qed_ooo.c_qed_ooo_add_new_buffer.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/qlogic/qed/extr_qed_ooo.c_qed_ooo_add_new_buffer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [30 x i8] c"Isle %d is not found(cid %d)\0A\00", align 1
@QED_OOO_LEFT_BUF = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @qed_ooo_add_new_buffer(ptr noundef %0, ptr noundef %1, i32 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5) local_unnamed_addr #0 {
%7 = tail call ptr @qed_ooo_seek_isle(ptr noundef %0, ptr noundef %1, i32 noundef %2, i64 noundef %3) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = tail call i32 @DP_NOTICE(ptr noundef %0, ptr noundef nonnull @.str, i64 noundef %3, i32 noundef %2) #2
br label %18
11: ; preds = %6
%12 = load i64, ptr @QED_OOO_LEFT_BUF, align 8, !tbaa !6
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = tail call i32 @list_add(ptr noundef %4, ptr noundef nonnull %7) #2
br label %18
16: ; preds = %11
%17 = tail call i32 @list_add_tail(ptr noundef %4, ptr noundef nonnull %7) #2
br label %18
18: ; preds = %14, %16, %9
ret void
}
declare ptr @qed_ooo_seek_isle(ptr noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @DP_NOTICE(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_net_ethernet_qlogic_qed_extr_qed_ooo.c_qed_ooo_add_new_buffer
|
; ModuleID = 'AnghaBench/freebsd/usr.bin/hexdump/extr_parse.c_badnoconv.c'
source_filename = "AnghaBench/freebsd/usr.bin/hexdump/extr_parse.c_badnoconv.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [29 x i8] c"missing conversion character\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @badnoconv() local_unnamed_addr #0 {
%1 = tail call i32 @errx(i32 noundef 1, ptr noundef nonnull @.str) #2
ret void
}
declare i32 @errx(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/usr.bin/hexdump/extr_parse.c_badnoconv.c'
source_filename = "AnghaBench/freebsd/usr.bin/hexdump/extr_parse.c_badnoconv.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [29 x i8] c"missing conversion character\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @badnoconv() local_unnamed_addr #0 {
%1 = tail call i32 @errx(i32 noundef 1, ptr noundef nonnull @.str) #2
ret void
}
declare i32 @errx(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_usr.bin_hexdump_extr_parse.c_badnoconv
|
; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8192e/extr_rtllib_tx.c_rtllib_query_protectionmode.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8192e/extr_rtllib_tx.c_rtllib_query_protectionmode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cb_desc = type { i32, i32, i32, i32, i32, i32, i64, ptr, i64, i64, i64 }
%struct.sk_buff = type { i64, i64 }
%struct.rtllib_device = type { i64, i64, i64, %struct.TYPE_2__, ptr }
%struct.TYPE_2__ = type { i32, i64 }
%struct.rt_hi_throughput = type { i32, i32, i64, i64, i64 }
@IEEE_N_24G = dso_local local_unnamed_addr global i64 0, align 8
@MGN_24M = dso_local local_unnamed_addr global ptr null, align 8
@HT_IOT_ACT_FORCED_CTS2SELF = dso_local local_unnamed_addr global i32 0, align 4
@HT_IOT_ACT_FORCED_RTS = dso_local local_unnamed_addr global i32 0, align 4
@HT_IOT_ACT_PURE_N_MODE = dso_local local_unnamed_addr global i32 0, align 4
@WLAN_CAPABILITY_SHORT_PREAMBLE = dso_local local_unnamed_addr global i32 0, align 4
@IW_MODE_MASTER = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @rtllib_query_protectionmode], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @rtllib_query_protectionmode(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 2
%5 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 6
store i64 0, ptr %5, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 3
%7 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 10
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %1, i8 0, i64 16, i1 false)
%8 = load i64, ptr %7, align 8, !tbaa !12
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %127
10: ; preds = %3
%11 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 9
%12 = load i64, ptr %11, align 8, !tbaa !13
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %127
14: ; preds = %10
%15 = getelementptr inbounds %struct.sk_buff, ptr %2, i64 0, i32 1
%16 = load i64, ptr %15, align 8, !tbaa !14
%17 = add nsw i64 %16, 16
%18 = tail call i64 @is_broadcast_ether_addr(i64 noundef %17) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %127
20: ; preds = %14
%21 = load i64, ptr %0, align 8, !tbaa !16
%22 = load i64, ptr @IEEE_N_24G, align 8, !tbaa !19
%23 = icmp slt i64 %21, %22
br i1 %23, label %24, label %41
24: ; preds = %20
%25 = load i64, ptr %2, align 8, !tbaa !20
%26 = getelementptr inbounds %struct.rtllib_device, ptr %0, i64 0, i32 1
%27 = load i64, ptr %26, align 8, !tbaa !21
%28 = icmp sgt i64 %25, %27
br i1 %28, label %29, label %33
29: ; preds = %24
%30 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 4
store i32 1, ptr %30, align 8, !tbaa !22
%31 = load ptr, ptr @MGN_24M, align 8, !tbaa !23
%32 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 7
store ptr %31, ptr %32, align 8, !tbaa !24
br label %127
33: ; preds = %24
%34 = getelementptr inbounds %struct.rtllib_device, ptr %0, i64 0, i32 3, i32 1
%35 = load i64, ptr %34, align 8, !tbaa !25
%36 = icmp eq i64 %35, 0
br i1 %36, label %127, label %37
37: ; preds = %33
%38 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 4
store i32 1, ptr %38, align 8, !tbaa !22
store i32 1, ptr %4, align 8, !tbaa !26
%39 = load ptr, ptr @MGN_24M, align 8, !tbaa !23
%40 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 7
store ptr %39, ptr %40, align 8, !tbaa !24
br label %127
41: ; preds = %20
%42 = getelementptr inbounds %struct.rtllib_device, ptr %0, i64 0, i32 4
%43 = load ptr, ptr %42, align 8, !tbaa !27
%44 = load i32, ptr %43, align 8, !tbaa !28
%45 = load i32, ptr @HT_IOT_ACT_FORCED_CTS2SELF, align 4, !tbaa !30
%46 = and i32 %45, %44
%47 = icmp eq i32 %46, 0
br i1 %47, label %52, label %48
48: ; preds = %41
store i32 1, ptr %4, align 8, !tbaa !26
%49 = load ptr, ptr @MGN_24M, align 8, !tbaa !23
%50 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 7
store ptr %49, ptr %50, align 8, !tbaa !24
%51 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 4
store i32 1, ptr %51, align 8, !tbaa !22
br label %112
52: ; preds = %41
%53 = load i32, ptr @HT_IOT_ACT_FORCED_RTS, align 4, !tbaa !30
%54 = load i32, ptr @HT_IOT_ACT_PURE_N_MODE, align 4, !tbaa !30
%55 = or i32 %54, %53
%56 = and i32 %55, %44
%57 = icmp eq i32 %56, 0
br i1 %57, label %62, label %58
58: ; preds = %52
%59 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 4
store i32 1, ptr %59, align 8, !tbaa !22
%60 = load ptr, ptr @MGN_24M, align 8, !tbaa !23
%61 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 7
store ptr %60, ptr %61, align 8, !tbaa !24
br label %112
62: ; preds = %52
%63 = getelementptr inbounds %struct.rtllib_device, ptr %0, i64 0, i32 3, i32 1
%64 = load i64, ptr %63, align 8, !tbaa !25
%65 = icmp eq i64 %64, 0
br i1 %65, label %70, label %66
66: ; preds = %62
%67 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 4
store i32 1, ptr %67, align 8, !tbaa !22
store i32 1, ptr %4, align 8, !tbaa !26
%68 = load ptr, ptr @MGN_24M, align 8, !tbaa !23
%69 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 7
store ptr %68, ptr %69, align 8, !tbaa !24
br label %112
70: ; preds = %62
%71 = getelementptr inbounds %struct.rt_hi_throughput, ptr %43, i64 0, i32 4
%72 = load i64, ptr %71, align 8, !tbaa !31
%73 = icmp eq i64 %72, 0
br i1 %73, label %95, label %74
74: ; preds = %70
%75 = getelementptr inbounds %struct.rt_hi_throughput, ptr %43, i64 0, i32 3
%76 = load i64, ptr %75, align 8, !tbaa !32
%77 = icmp eq i64 %76, 0
br i1 %77, label %95, label %78
78: ; preds = %74
%79 = getelementptr inbounds %struct.rt_hi_throughput, ptr %43, i64 0, i32 1
%80 = load i32, ptr %79, align 4, !tbaa !33
%81 = getelementptr inbounds %struct.rt_hi_throughput, ptr %43, i64 0, i32 2
%82 = load i64, ptr %81, align 8, !tbaa !34
%83 = icmp ne i64 %82, 0
%84 = and i32 %80, -2
%85 = icmp eq i32 %84, 2
%86 = select i1 %83, i1 %85, i1 false
br i1 %86, label %91, label %87
87: ; preds = %78
%88 = icmp eq i64 %82, 0
%89 = icmp eq i32 %80, 3
%90 = select i1 %88, i1 %89, i1 false
br i1 %90, label %91, label %95
91: ; preds = %87, %78
%92 = load ptr, ptr @MGN_24M, align 8, !tbaa !23
%93 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 7
store ptr %92, ptr %93, align 8, !tbaa !24
%94 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 4
store i32 1, ptr %94, align 8, !tbaa !22
br label %112
95: ; preds = %87, %74, %70
%96 = load i64, ptr %2, align 8, !tbaa !20
%97 = getelementptr inbounds %struct.rtllib_device, ptr %0, i64 0, i32 1
%98 = load i64, ptr %97, align 8, !tbaa !21
%99 = icmp sgt i64 %96, %98
br i1 %99, label %100, label %104
100: ; preds = %95
%101 = load ptr, ptr @MGN_24M, align 8, !tbaa !23
%102 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 7
store ptr %101, ptr %102, align 8, !tbaa !24
%103 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 4
store i32 1, ptr %103, align 8, !tbaa !22
br label %112
104: ; preds = %95
%105 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 8
%106 = load i64, ptr %105, align 8, !tbaa !35
%107 = icmp eq i64 %106, 0
br i1 %107, label %125, label %108
108: ; preds = %104
%109 = load ptr, ptr @MGN_24M, align 8, !tbaa !23
%110 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 7
store ptr %109, ptr %110, align 8, !tbaa !24
%111 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 4
store i32 0, ptr %111, align 8, !tbaa !22
br label %112
112: ; preds = %91, %108, %100, %66, %58, %48
%113 = getelementptr inbounds %struct.rtllib_device, ptr %0, i64 0, i32 3
%114 = load i32, ptr %113, align 8, !tbaa !36
%115 = load i32, ptr @WLAN_CAPABILITY_SHORT_PREAMBLE, align 4, !tbaa !30
%116 = and i32 %115, %114
%117 = icmp eq i32 %116, 0
br i1 %117, label %120, label %118
118: ; preds = %112
%119 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 5
store i32 1, ptr %119, align 4, !tbaa !37
br label %120
120: ; preds = %118, %112
%121 = getelementptr inbounds %struct.rtllib_device, ptr %0, i64 0, i32 2
%122 = load i64, ptr %121, align 8, !tbaa !38
%123 = load i64, ptr @IW_MODE_MASTER, align 8, !tbaa !19
%124 = icmp eq i64 %122, %123
br i1 %124, label %125, label %127
125: ; preds = %120, %104
%126 = getelementptr inbounds %struct.cb_desc, ptr %1, i64 0, i32 4
store i32 0, ptr %126, align 8, !tbaa !22
store i32 0, ptr %4, align 8, !tbaa !26
store i32 0, ptr %6, align 4, !tbaa !39
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %5, i8 0, i64 16, i1 false)
br label %127
127: ; preds = %120, %29, %37, %33, %14, %3, %10, %125
ret void
}
declare i64 @is_broadcast_ether_addr(i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"cb_desc", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !10, i64 24, !11, i64 32, !10, i64 40, !10, i64 48, !10, i64 56}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !10, i64 56}
!13 = !{!6, !10, i64 48}
!14 = !{!15, !10, i64 8}
!15 = !{!"sk_buff", !10, i64 0, !10, i64 8}
!16 = !{!17, !10, i64 0}
!17 = !{!"rtllib_device", !10, i64 0, !10, i64 8, !10, i64 16, !18, i64 24, !11, i64 40}
!18 = !{!"TYPE_2__", !7, i64 0, !10, i64 8}
!19 = !{!10, !10, i64 0}
!20 = !{!15, !10, i64 0}
!21 = !{!17, !10, i64 8}
!22 = !{!6, !7, i64 16}
!23 = !{!11, !11, i64 0}
!24 = !{!6, !11, i64 32}
!25 = !{!17, !10, i64 32}
!26 = !{!6, !7, i64 8}
!27 = !{!17, !11, i64 40}
!28 = !{!29, !7, i64 0}
!29 = !{!"rt_hi_throughput", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16, !10, i64 24}
!30 = !{!7, !7, i64 0}
!31 = !{!29, !10, i64 24}
!32 = !{!29, !10, i64 16}
!33 = !{!29, !7, i64 4}
!34 = !{!29, !10, i64 8}
!35 = !{!6, !10, i64 40}
!36 = !{!17, !7, i64 24}
!37 = !{!6, !7, i64 20}
!38 = !{!17, !10, i64 16}
!39 = !{!6, !7, i64 12}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8192e/extr_rtllib_tx.c_rtllib_query_protectionmode.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8192e/extr_rtllib_tx.c_rtllib_query_protectionmode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IEEE_N_24G = common local_unnamed_addr global i64 0, align 8
@MGN_24M = common local_unnamed_addr global ptr null, align 8
@HT_IOT_ACT_FORCED_CTS2SELF = common local_unnamed_addr global i32 0, align 4
@HT_IOT_ACT_FORCED_RTS = common local_unnamed_addr global i32 0, align 4
@HT_IOT_ACT_PURE_N_MODE = common local_unnamed_addr global i32 0, align 4
@WLAN_CAPABILITY_SHORT_PREAMBLE = common local_unnamed_addr global i32 0, align 4
@IW_MODE_MASTER = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @rtllib_query_protectionmode], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @rtllib_query_protectionmode(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = getelementptr inbounds i8, ptr %1, i64 8
%5 = getelementptr inbounds i8, ptr %1, i64 24
store i64 0, ptr %5, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %1, i64 56
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %1, i8 0, i64 16, i1 false)
%7 = load i64, ptr %6, align 8, !tbaa !13
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %126
9: ; preds = %3
%10 = getelementptr inbounds i8, ptr %1, i64 48
%11 = load i64, ptr %10, align 8, !tbaa !14
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %126
13: ; preds = %9
%14 = getelementptr inbounds i8, ptr %2, i64 8
%15 = load i64, ptr %14, align 8, !tbaa !15
%16 = add nsw i64 %15, 16
%17 = tail call i64 @is_broadcast_ether_addr(i64 noundef %16) #3
%18 = icmp eq i64 %17, 0
br i1 %18, label %19, label %126
19: ; preds = %13
%20 = load i64, ptr %0, align 8, !tbaa !17
%21 = load i64, ptr @IEEE_N_24G, align 8, !tbaa !20
%22 = icmp slt i64 %20, %21
br i1 %22, label %23, label %40
23: ; preds = %19
%24 = load i64, ptr %2, align 8, !tbaa !21
%25 = getelementptr inbounds i8, ptr %0, i64 8
%26 = load i64, ptr %25, align 8, !tbaa !22
%27 = icmp sgt i64 %24, %26
br i1 %27, label %28, label %32
28: ; preds = %23
%29 = getelementptr inbounds i8, ptr %1, i64 16
store i32 1, ptr %29, align 8, !tbaa !23
%30 = load ptr, ptr @MGN_24M, align 8, !tbaa !24
%31 = getelementptr inbounds i8, ptr %1, i64 32
store ptr %30, ptr %31, align 8, !tbaa !25
br label %126
32: ; preds = %23
%33 = getelementptr inbounds i8, ptr %0, i64 32
%34 = load i64, ptr %33, align 8, !tbaa !26
%35 = icmp eq i64 %34, 0
br i1 %35, label %126, label %36
36: ; preds = %32
%37 = getelementptr inbounds i8, ptr %1, i64 16
store i32 1, ptr %37, align 8, !tbaa !23
store i32 1, ptr %4, align 8, !tbaa !27
%38 = load ptr, ptr @MGN_24M, align 8, !tbaa !24
%39 = getelementptr inbounds i8, ptr %1, i64 32
store ptr %38, ptr %39, align 8, !tbaa !25
br label %126
40: ; preds = %19
%41 = getelementptr inbounds i8, ptr %0, i64 40
%42 = load ptr, ptr %41, align 8, !tbaa !28
%43 = load i32, ptr %42, align 8, !tbaa !29
%44 = load i32, ptr @HT_IOT_ACT_FORCED_CTS2SELF, align 4, !tbaa !31
%45 = and i32 %44, %43
%46 = icmp eq i32 %45, 0
br i1 %46, label %51, label %47
47: ; preds = %40
store i32 1, ptr %4, align 8, !tbaa !27
%48 = load ptr, ptr @MGN_24M, align 8, !tbaa !24
%49 = getelementptr inbounds i8, ptr %1, i64 32
store ptr %48, ptr %49, align 8, !tbaa !25
%50 = getelementptr inbounds i8, ptr %1, i64 16
store i32 1, ptr %50, align 8, !tbaa !23
br label %111
51: ; preds = %40
%52 = load i32, ptr @HT_IOT_ACT_FORCED_RTS, align 4, !tbaa !31
%53 = load i32, ptr @HT_IOT_ACT_PURE_N_MODE, align 4, !tbaa !31
%54 = or i32 %53, %52
%55 = and i32 %54, %43
%56 = icmp eq i32 %55, 0
br i1 %56, label %61, label %57
57: ; preds = %51
%58 = getelementptr inbounds i8, ptr %1, i64 16
store i32 1, ptr %58, align 8, !tbaa !23
%59 = load ptr, ptr @MGN_24M, align 8, !tbaa !24
%60 = getelementptr inbounds i8, ptr %1, i64 32
store ptr %59, ptr %60, align 8, !tbaa !25
br label %111
61: ; preds = %51
%62 = getelementptr inbounds i8, ptr %0, i64 32
%63 = load i64, ptr %62, align 8, !tbaa !26
%64 = icmp eq i64 %63, 0
br i1 %64, label %69, label %65
65: ; preds = %61
%66 = getelementptr inbounds i8, ptr %1, i64 16
store i32 1, ptr %66, align 8, !tbaa !23
store i32 1, ptr %4, align 8, !tbaa !27
%67 = load ptr, ptr @MGN_24M, align 8, !tbaa !24
%68 = getelementptr inbounds i8, ptr %1, i64 32
store ptr %67, ptr %68, align 8, !tbaa !25
br label %111
69: ; preds = %61
%70 = getelementptr inbounds i8, ptr %42, i64 24
%71 = load i64, ptr %70, align 8, !tbaa !32
%72 = icmp eq i64 %71, 0
br i1 %72, label %94, label %73
73: ; preds = %69
%74 = getelementptr inbounds i8, ptr %42, i64 16
%75 = load i64, ptr %74, align 8, !tbaa !33
%76 = icmp eq i64 %75, 0
br i1 %76, label %94, label %77
77: ; preds = %73
%78 = getelementptr inbounds i8, ptr %42, i64 4
%79 = load i32, ptr %78, align 4, !tbaa !34
%80 = getelementptr inbounds i8, ptr %42, i64 8
%81 = load i64, ptr %80, align 8, !tbaa !35
%82 = icmp ne i64 %81, 0
%83 = and i32 %79, -2
%84 = icmp eq i32 %83, 2
%85 = select i1 %82, i1 %84, i1 false
br i1 %85, label %90, label %86
86: ; preds = %77
%87 = icmp eq i64 %81, 0
%88 = icmp eq i32 %79, 3
%89 = select i1 %87, i1 %88, i1 false
br i1 %89, label %90, label %94
90: ; preds = %86, %77
%91 = load ptr, ptr @MGN_24M, align 8, !tbaa !24
%92 = getelementptr inbounds i8, ptr %1, i64 32
store ptr %91, ptr %92, align 8, !tbaa !25
%93 = getelementptr inbounds i8, ptr %1, i64 16
store i32 1, ptr %93, align 8, !tbaa !23
br label %111
94: ; preds = %86, %73, %69
%95 = load i64, ptr %2, align 8, !tbaa !21
%96 = getelementptr inbounds i8, ptr %0, i64 8
%97 = load i64, ptr %96, align 8, !tbaa !22
%98 = icmp sgt i64 %95, %97
br i1 %98, label %99, label %103
99: ; preds = %94
%100 = load ptr, ptr @MGN_24M, align 8, !tbaa !24
%101 = getelementptr inbounds i8, ptr %1, i64 32
store ptr %100, ptr %101, align 8, !tbaa !25
%102 = getelementptr inbounds i8, ptr %1, i64 16
store i32 1, ptr %102, align 8, !tbaa !23
br label %111
103: ; preds = %94
%104 = getelementptr inbounds i8, ptr %1, i64 40
%105 = load i64, ptr %104, align 8, !tbaa !36
%106 = icmp eq i64 %105, 0
br i1 %106, label %124, label %107
107: ; preds = %103
%108 = load ptr, ptr @MGN_24M, align 8, !tbaa !24
%109 = getelementptr inbounds i8, ptr %1, i64 32
store ptr %108, ptr %109, align 8, !tbaa !25
%110 = getelementptr inbounds i8, ptr %1, i64 16
store i32 0, ptr %110, align 8, !tbaa !23
br label %111
111: ; preds = %90, %107, %99, %65, %57, %47
%112 = getelementptr inbounds i8, ptr %0, i64 24
%113 = load i32, ptr %112, align 8, !tbaa !37
%114 = load i32, ptr @WLAN_CAPABILITY_SHORT_PREAMBLE, align 4, !tbaa !31
%115 = and i32 %114, %113
%116 = icmp eq i32 %115, 0
br i1 %116, label %119, label %117
117: ; preds = %111
%118 = getelementptr inbounds i8, ptr %1, i64 20
store i32 1, ptr %118, align 4, !tbaa !38
br label %119
119: ; preds = %117, %111
%120 = getelementptr inbounds i8, ptr %0, i64 16
%121 = load i64, ptr %120, align 8, !tbaa !39
%122 = load i64, ptr @IW_MODE_MASTER, align 8, !tbaa !20
%123 = icmp eq i64 %121, %122
br i1 %123, label %124, label %126
124: ; preds = %119, %103
%125 = getelementptr inbounds i8, ptr %1, i64 16
store i32 0, ptr %125, align 8, !tbaa !23
store <2 x i32> zeroinitializer, ptr %4, align 8, !tbaa !31
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %5, i8 0, i64 16, i1 false)
br label %126
126: ; preds = %119, %28, %36, %32, %13, %3, %9, %124
ret void
}
declare i64 @is_broadcast_ether_addr(i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 24}
!7 = !{!"cb_desc", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !11, i64 24, !12, i64 32, !11, i64 40, !11, i64 48, !11, i64 56}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !11, i64 56}
!14 = !{!7, !11, i64 48}
!15 = !{!16, !11, i64 8}
!16 = !{!"sk_buff", !11, i64 0, !11, i64 8}
!17 = !{!18, !11, i64 0}
!18 = !{!"rtllib_device", !11, i64 0, !11, i64 8, !11, i64 16, !19, i64 24, !12, i64 40}
!19 = !{!"TYPE_2__", !8, i64 0, !11, i64 8}
!20 = !{!11, !11, i64 0}
!21 = !{!16, !11, i64 0}
!22 = !{!18, !11, i64 8}
!23 = !{!7, !8, i64 16}
!24 = !{!12, !12, i64 0}
!25 = !{!7, !12, i64 32}
!26 = !{!18, !11, i64 32}
!27 = !{!7, !8, i64 8}
!28 = !{!18, !12, i64 40}
!29 = !{!30, !8, i64 0}
!30 = !{!"rt_hi_throughput", !8, i64 0, !8, i64 4, !11, i64 8, !11, i64 16, !11, i64 24}
!31 = !{!8, !8, i64 0}
!32 = !{!30, !11, i64 24}
!33 = !{!30, !11, i64 16}
!34 = !{!30, !8, i64 4}
!35 = !{!30, !11, i64 8}
!36 = !{!7, !11, i64 40}
!37 = !{!18, !8, i64 24}
!38 = !{!7, !8, i64 20}
!39 = !{!18, !11, i64 16}
|
linux_drivers_staging_rtl8192e_extr_rtllib_tx.c_rtllib_query_protectionmode
|
; ModuleID = 'AnghaBench/freebsd/sys/net80211/extr_ieee80211_regdomain.c_sort_channels.c'
source_filename = "AnghaBench/freebsd/sys/net80211/extr_ieee80211_regdomain.c_sort_channels.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [12 x i8] c"no channels\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @sort_channels], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sort_channels(ptr noundef %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = icmp ne i64 %1, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @KASSERT(i32 noundef %5, ptr noundef nonnull @.str) #2
%7 = add i64 %1, -1
%8 = icmp eq i64 %7, 0
br i1 %8, label %27, label %9
9: ; preds = %3
%10 = sub i64 0, %2
br label %11
11: ; preds = %9, %24
%12 = phi i64 [ %7, %9 ], [ %25, %24 ]
%13 = phi ptr [ %0, %9 ], [ %14, %24 ]
%14 = getelementptr inbounds i32, ptr %13, i64 %2
%15 = icmp ugt ptr %14, %0
br i1 %15, label %16, label %24
16: ; preds = %11, %21
%17 = phi ptr [ %18, %21 ], [ %14, %11 ]
%18 = getelementptr inbounds i32, ptr %17, i64 %10
%19 = tail call i64 @chancompar(ptr noundef nonnull %18, ptr noundef nonnull %17) #2
%20 = icmp slt i64 %19, 1
br i1 %20, label %24, label %21
21: ; preds = %16
%22 = tail call i32 @swap(ptr noundef nonnull %18, ptr noundef nonnull %17, i64 noundef %2) #2
%23 = icmp ugt ptr %18, %0
br i1 %23, label %16, label %24, !llvm.loop !5
24: ; preds = %21, %16, %11
%25 = add i64 %12, -1
%26 = icmp eq i64 %25, 0
br i1 %26, label %27, label %11, !llvm.loop !7
27: ; preds = %24, %3
ret void
}
declare i32 @KASSERT(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @chancompar(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @swap(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
|
; ModuleID = 'AnghaBench/freebsd/sys/net80211/extr_ieee80211_regdomain.c_sort_channels.c'
source_filename = "AnghaBench/freebsd/sys/net80211/extr_ieee80211_regdomain.c_sort_channels.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [12 x i8] c"no channels\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @sort_channels], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sort_channels(ptr noundef %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = icmp ne i64 %1, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @KASSERT(i32 noundef %5, ptr noundef nonnull @.str) #2
%7 = add i64 %1, -1
%8 = icmp eq i64 %7, 0
br i1 %8, label %27, label %9
9: ; preds = %3
%10 = sub i64 0, %2
br label %11
11: ; preds = %9, %24
%12 = phi i64 [ %7, %9 ], [ %25, %24 ]
%13 = phi ptr [ %0, %9 ], [ %14, %24 ]
%14 = getelementptr inbounds i32, ptr %13, i64 %2
%15 = icmp ugt ptr %14, %0
br i1 %15, label %16, label %24
16: ; preds = %11, %21
%17 = phi ptr [ %18, %21 ], [ %14, %11 ]
%18 = getelementptr inbounds i32, ptr %17, i64 %10
%19 = tail call i64 @chancompar(ptr noundef nonnull %18, ptr noundef nonnull %17) #2
%20 = icmp slt i64 %19, 1
br i1 %20, label %24, label %21
21: ; preds = %16
%22 = tail call i32 @swap(ptr noundef nonnull %18, ptr noundef nonnull %17, i64 noundef %2) #2
%23 = icmp ugt ptr %18, %0
br i1 %23, label %16, label %24, !llvm.loop !6
24: ; preds = %21, %16, %11
%25 = add i64 %12, -1
%26 = icmp eq i64 %25, 0
br i1 %26, label %27, label %11, !llvm.loop !8
27: ; preds = %24, %3
ret void
}
declare i32 @KASSERT(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @chancompar(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @swap(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
!8 = distinct !{!8, !7}
|
freebsd_sys_net80211_extr_ieee80211_regdomain.c_sort_channels
|
; ModuleID = 'AnghaBench/freebsd/sys/vm/extr_sg_pager.c_sg_pager_dealloc.c'
source_filename = "AnghaBench/freebsd/sys/vm/extr_sg_pager.c_sg_pager_dealloc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { i32 }
%struct.TYPE_8__ = type { i32, ptr, %struct.TYPE_7__ }
%struct.TYPE_7__ = type { %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i32 }
@plinks = dso_local local_unnamed_addr global %struct.TYPE_9__ zeroinitializer, align 4
@OBJT_DEAD = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sg_pager_dealloc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sg_pager_dealloc(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 2
%3 = tail call i32 @TAILQ_FIRST(ptr noundef nonnull %2) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %1, %5
%6 = phi i32 [ %10, %5 ], [ %3, %1 ]
%7 = load i32, ptr @plinks, align 4, !tbaa !5
%8 = tail call i32 @TAILQ_REMOVE(ptr noundef nonnull %2, i32 noundef %6, i32 noundef %7) #2
%9 = tail call i32 @vm_page_putfake(i32 noundef %6) #2
%10 = tail call i32 @TAILQ_FIRST(ptr noundef nonnull %2) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %5, !llvm.loop !10
12: ; preds = %5, %1
%13 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%14 = load ptr, ptr %13, align 8, !tbaa !12
%15 = tail call i32 @sglist_free(ptr noundef %14) #2
store ptr null, ptr %13, align 8, !tbaa !12
%16 = load i32, ptr @OBJT_DEAD, align 4, !tbaa !17
store i32 %16, ptr %0, align 8, !tbaa !18
ret void
}
declare i32 @TAILQ_FIRST(ptr noundef) local_unnamed_addr #1
declare i32 @TAILQ_REMOVE(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vm_page_putfake(i32 noundef) local_unnamed_addr #1
declare i32 @sglist_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_9__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !14, i64 8}
!13 = !{!"TYPE_8__", !7, i64 0, !14, i64 8, !15, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"TYPE_7__", !16, i64 0}
!16 = !{!"TYPE_6__", !7, i64 0}
!17 = !{!7, !7, i64 0}
!18 = !{!13, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/vm/extr_sg_pager.c_sg_pager_dealloc.c'
source_filename = "AnghaBench/freebsd/sys/vm/extr_sg_pager.c_sg_pager_dealloc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_9__ = type { i32 }
@plinks = common local_unnamed_addr global %struct.TYPE_9__ zeroinitializer, align 4
@OBJT_DEAD = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sg_pager_dealloc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sg_pager_dealloc(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = tail call i32 @TAILQ_FIRST(ptr noundef nonnull %2) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %1, %5
%6 = phi i32 [ %10, %5 ], [ %3, %1 ]
%7 = load i32, ptr @plinks, align 4, !tbaa !6
%8 = tail call i32 @TAILQ_REMOVE(ptr noundef nonnull %2, i32 noundef %6, i32 noundef %7) #2
%9 = tail call i32 @vm_page_putfake(i32 noundef %6) #2
%10 = tail call i32 @TAILQ_FIRST(ptr noundef nonnull %2) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %5, !llvm.loop !11
12: ; preds = %5, %1
%13 = getelementptr inbounds i8, ptr %0, i64 8
%14 = load ptr, ptr %13, align 8, !tbaa !13
%15 = tail call i32 @sglist_free(ptr noundef %14) #2
store ptr null, ptr %13, align 8, !tbaa !13
%16 = load i32, ptr @OBJT_DEAD, align 4, !tbaa !18
store i32 %16, ptr %0, align 8, !tbaa !19
ret void
}
declare i32 @TAILQ_FIRST(ptr noundef) local_unnamed_addr #1
declare i32 @TAILQ_REMOVE(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vm_page_putfake(i32 noundef) local_unnamed_addr #1
declare i32 @sglist_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_9__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !15, i64 8}
!14 = !{!"TYPE_8__", !8, i64 0, !15, i64 8, !16, i64 16}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!"TYPE_7__", !17, i64 0}
!17 = !{!"TYPE_6__", !8, i64 0}
!18 = !{!8, !8, i64 0}
!19 = !{!14, !8, i64 0}
|
freebsd_sys_vm_extr_sg_pager.c_sg_pager_dealloc
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_i915_irq.c_ironlake_irq_uninstall.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_i915_irq.c_ironlake_irq_uninstall.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@HWSTAM = dso_local local_unnamed_addr global i32 0, align 4
@DEIMR = dso_local local_unnamed_addr global i32 0, align 4
@DEIER = dso_local local_unnamed_addr global i32 0, align 4
@DEIIR = dso_local local_unnamed_addr global i32 0, align 4
@GTIMR = dso_local local_unnamed_addr global i32 0, align 4
@GTIER = dso_local local_unnamed_addr global i32 0, align 4
@GTIIR = dso_local local_unnamed_addr global i32 0, align 4
@SDEIMR = dso_local local_unnamed_addr global i32 0, align 4
@SDEIER = dso_local local_unnamed_addr global i32 0, align 4
@SDEIIR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ironlake_irq_uninstall], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ironlake_irq_uninstall(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = icmp eq i64 %2, 0
br i1 %3, label %28, label %4
4: ; preds = %1
%5 = load i32, ptr @HWSTAM, align 4, !tbaa !10
%6 = tail call i32 @I915_WRITE(i32 noundef %5, i32 noundef -1) #2
%7 = load i32, ptr @DEIMR, align 4, !tbaa !10
%8 = tail call i32 @I915_WRITE(i32 noundef %7, i32 noundef -1) #2
%9 = load i32, ptr @DEIER, align 4, !tbaa !10
%10 = tail call i32 @I915_WRITE(i32 noundef %9, i32 noundef 0) #2
%11 = load i32, ptr @DEIIR, align 4, !tbaa !10
%12 = tail call i32 @I915_READ(i32 noundef %11) #2
%13 = tail call i32 @I915_WRITE(i32 noundef %11, i32 noundef %12) #2
%14 = load i32, ptr @GTIMR, align 4, !tbaa !10
%15 = tail call i32 @I915_WRITE(i32 noundef %14, i32 noundef -1) #2
%16 = load i32, ptr @GTIER, align 4, !tbaa !10
%17 = tail call i32 @I915_WRITE(i32 noundef %16, i32 noundef 0) #2
%18 = load i32, ptr @GTIIR, align 4, !tbaa !10
%19 = tail call i32 @I915_READ(i32 noundef %18) #2
%20 = tail call i32 @I915_WRITE(i32 noundef %18, i32 noundef %19) #2
%21 = load i32, ptr @SDEIMR, align 4, !tbaa !10
%22 = tail call i32 @I915_WRITE(i32 noundef %21, i32 noundef -1) #2
%23 = load i32, ptr @SDEIER, align 4, !tbaa !10
%24 = tail call i32 @I915_WRITE(i32 noundef %23, i32 noundef 0) #2
%25 = load i32, ptr @SDEIIR, align 4, !tbaa !10
%26 = tail call i32 @I915_READ(i32 noundef %25) #2
%27 = tail call i32 @I915_WRITE(i32 noundef %25, i32 noundef %26) #2
br label %28
28: ; preds = %1, %4
ret void
}
declare i32 @I915_WRITE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @I915_READ(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"drm_device", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_i915_irq.c_ironlake_irq_uninstall.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_i915_irq.c_ironlake_irq_uninstall.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HWSTAM = common local_unnamed_addr global i32 0, align 4
@DEIMR = common local_unnamed_addr global i32 0, align 4
@DEIER = common local_unnamed_addr global i32 0, align 4
@DEIIR = common local_unnamed_addr global i32 0, align 4
@GTIMR = common local_unnamed_addr global i32 0, align 4
@GTIER = common local_unnamed_addr global i32 0, align 4
@GTIIR = common local_unnamed_addr global i32 0, align 4
@SDEIMR = common local_unnamed_addr global i32 0, align 4
@SDEIER = common local_unnamed_addr global i32 0, align 4
@SDEIIR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ironlake_irq_uninstall], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ironlake_irq_uninstall(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %28, label %4
4: ; preds = %1
%5 = load i32, ptr @HWSTAM, align 4, !tbaa !11
%6 = tail call i32 @I915_WRITE(i32 noundef %5, i32 noundef -1) #2
%7 = load i32, ptr @DEIMR, align 4, !tbaa !11
%8 = tail call i32 @I915_WRITE(i32 noundef %7, i32 noundef -1) #2
%9 = load i32, ptr @DEIER, align 4, !tbaa !11
%10 = tail call i32 @I915_WRITE(i32 noundef %9, i32 noundef 0) #2
%11 = load i32, ptr @DEIIR, align 4, !tbaa !11
%12 = tail call i32 @I915_READ(i32 noundef %11) #2
%13 = tail call i32 @I915_WRITE(i32 noundef %11, i32 noundef %12) #2
%14 = load i32, ptr @GTIMR, align 4, !tbaa !11
%15 = tail call i32 @I915_WRITE(i32 noundef %14, i32 noundef -1) #2
%16 = load i32, ptr @GTIER, align 4, !tbaa !11
%17 = tail call i32 @I915_WRITE(i32 noundef %16, i32 noundef 0) #2
%18 = load i32, ptr @GTIIR, align 4, !tbaa !11
%19 = tail call i32 @I915_READ(i32 noundef %18) #2
%20 = tail call i32 @I915_WRITE(i32 noundef %18, i32 noundef %19) #2
%21 = load i32, ptr @SDEIMR, align 4, !tbaa !11
%22 = tail call i32 @I915_WRITE(i32 noundef %21, i32 noundef -1) #2
%23 = load i32, ptr @SDEIER, align 4, !tbaa !11
%24 = tail call i32 @I915_WRITE(i32 noundef %23, i32 noundef 0) #2
%25 = load i32, ptr @SDEIIR, align 4, !tbaa !11
%26 = tail call i32 @I915_READ(i32 noundef %25) #2
%27 = tail call i32 @I915_WRITE(i32 noundef %25, i32 noundef %26) #2
br label %28
28: ; preds = %1, %4
ret void
}
declare i32 @I915_WRITE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @I915_READ(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"drm_device", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
|
fastsocket_kernel_drivers_gpu_drm_i915_extr_i915_irq.c_ironlake_irq_uninstall
|
; ModuleID = 'AnghaBench/linux/drivers/scsi/qla2xxx/extr_qla_nx.c_qla82xx_pci_mem_write_2M.c'
source_filename = "AnghaBench/linux/drivers/scsi/qla2xxx/extr_qla_nx.c_qla82xx_pci_mem_write_2M.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@QLA82XX_ADDR_QDR_NET = dso_local local_unnamed_addr global i32 0, align 4
@QLA82XX_P3_ADDR_QDR_NET_MAX = dso_local local_unnamed_addr global i32 0, align 4
@QLA82XX_CRB_QDR_NET = dso_local local_unnamed_addr global i32 0, align 4
@QLA82XX_CRB_DDR_NET = dso_local local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_ADDR_LO = dso_local local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_ADDR_HI = dso_local local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_WRDATA_LO = dso_local local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_WRDATA_HI = dso_local local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_WRDATA_UPPER_LO = dso_local local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_WRDATA_UPPER_HI = dso_local local_unnamed_addr global i32 0, align 4
@MIU_TA_CTL_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@MIU_TA_CTL_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@MIU_TA_CTL_START = dso_local local_unnamed_addr global i32 0, align 4
@MAX_CTL_CHECK = dso_local local_unnamed_addr global i32 0, align 4
@MIU_TA_CTL_BUSY = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"failed to write through agent.\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @qla82xx_pci_mem_write_2M], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @qla82xx_pci_mem_write_2M(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = alloca [2 x i32], align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
store i64 0, ptr %5, align 8
%6 = load i32, ptr @QLA82XX_ADDR_QDR_NET, align 4, !tbaa !5
%7 = icmp sgt i32 %6, %1
%8 = load i32, ptr @QLA82XX_P3_ADDR_QDR_NET_MAX, align 4
%9 = icmp slt i32 %8, %1
%10 = select i1 %7, i1 true, i1 %9
br i1 %10, label %13, label %11
11: ; preds = %4
%12 = load i32, ptr @QLA82XX_CRB_QDR_NET, align 4, !tbaa !5
br label %19
13: ; preds = %4
%14 = load i32, ptr @QLA82XX_CRB_DDR_NET, align 4, !tbaa !5
%15 = tail call i64 @qla82xx_pci_mem_bound_check(ptr noundef %0, i32 noundef %1, i32 noundef %3) #4
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = tail call i32 @qla82xx_pci_mem_write_direct(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #4
br label %159
19: ; preds = %13, %11
%20 = phi i32 [ %12, %11 ], [ %14, %13 ]
%21 = and i32 %1, 7
%22 = sub nuw nsw i32 8, %21
%23 = tail call i32 @llvm.smin.i32(i32 %22, i32 %3)
%24 = sub nsw i32 %3, %23
%25 = and i32 %1, -16
%26 = and i32 %1, 15
%27 = add nsw i32 %26, -1
%28 = add i32 %27, %3
%29 = ashr i32 %28, 4
%30 = lshr i32 %26, 3
%31 = icmp slt i32 %29, 0
br i1 %31, label %47, label %32
32: ; preds = %19
%33 = add nuw nsw i32 %29, 1
%34 = zext nneg i32 %33 to i64
br label %38
35: ; preds = %38
%36 = add nuw nsw i64 %39, 1
%37 = icmp eq i64 %36, %34
br i1 %37, label %47, label %38, !llvm.loop !9
38: ; preds = %32, %35
%39 = phi i64 [ 0, %32 ], [ %36, %35 ]
%40 = shl nuw nsw i64 %39, 1
%41 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %40
%42 = trunc i64 %39 to i32
%43 = shl i32 %42, 4
%44 = add i32 %43, %25
%45 = call i64 @qla82xx_pci_mem_read_2M(ptr noundef %0, i32 noundef %44, ptr noundef nonnull %41, i32 noundef 8) #4
%46 = icmp eq i64 %45, 0
br i1 %46, label %35, label %159
47: ; preds = %35, %19
%48 = load i32, ptr %2, align 4, !tbaa !5
%49 = icmp eq i32 %23, 8
br i1 %49, label %50, label %53
50: ; preds = %47
%51 = zext nneg i32 %30 to i64
%52 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %51
store i32 %48, ptr %52, align 4, !tbaa !5
br label %69
53: ; preds = %47
%54 = shl nsw i32 %23, 3
%55 = zext nneg i32 %54 to i64
%56 = shl nsw i64 -1, %55
%57 = xor i64 %56, -1
%58 = shl nuw nsw i32 %21, 3
%59 = zext nneg i32 %58 to i64
%60 = shl i64 %57, %59
%61 = zext nneg i32 %30 to i64
%62 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %61
%63 = load i32, ptr %62, align 4, !tbaa !5
%64 = trunc i64 %60 to i32
%65 = xor i32 %64, -1
%66 = and i32 %63, %65
%67 = shl i32 %48, %58
%68 = or i32 %66, %67
store i32 %68, ptr %62, align 4, !tbaa !5
br label %69
69: ; preds = %53, %50
%70 = icmp slt i32 %22, %3
br i1 %70, label %71, label %85
71: ; preds = %69
%72 = shl nsw i32 %24, 3
%73 = zext nneg i32 %72 to i64
%74 = shl nsw i64 -1, %73
%75 = add nuw nsw i32 %30, 1
%76 = zext nneg i32 %75 to i64
%77 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %76
%78 = load i32, ptr %77, align 4, !tbaa !5
%79 = trunc i64 %74 to i32
%80 = xor i32 %79, -1
%81 = and i32 %78, %80
%82 = shl nsw i32 %23, 3
%83 = ashr i32 %48, %82
%84 = or i32 %81, %83
store i32 %84, ptr %77, align 4, !tbaa !5
br label %85
85: ; preds = %71, %69
br i1 %31, label %159, label %86
86: ; preds = %85
%87 = add nuw nsw i32 %29, 1
%88 = zext nneg i32 %87 to i64
br label %92
89: ; preds = %149
%90 = add nuw nsw i64 %93, 1
%91 = icmp eq i64 %90, %88
br i1 %91, label %159, label %92, !llvm.loop !11
92: ; preds = %86, %89
%93 = phi i64 [ 0, %86 ], [ %90, %89 ]
%94 = load i32, ptr @MIU_TEST_AGT_ADDR_LO, align 4, !tbaa !5
%95 = add nsw i32 %94, %20
%96 = trunc i64 %93 to i32
%97 = shl i32 %96, 4
%98 = add i32 %97, %25
%99 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %95, i32 noundef %98) #4
%100 = load i32, ptr @MIU_TEST_AGT_ADDR_HI, align 4, !tbaa !5
%101 = add nsw i32 %100, %20
%102 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %101, i32 noundef 0) #4
%103 = shl nuw nsw i64 %93, 1
%104 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %103
%105 = load i32, ptr %104, align 8, !tbaa !5
%106 = load i32, ptr @MIU_TEST_AGT_WRDATA_LO, align 4, !tbaa !5
%107 = add nsw i32 %106, %20
%108 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %107, i32 noundef %105) #4
%109 = load i32, ptr @MIU_TEST_AGT_WRDATA_HI, align 4, !tbaa !5
%110 = add nsw i32 %109, %20
%111 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %110, i32 noundef poison) #4
%112 = or disjoint i64 %103, 1
%113 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %112
%114 = load i32, ptr %113, align 4, !tbaa !5
%115 = load i32, ptr @MIU_TEST_AGT_WRDATA_UPPER_LO, align 4, !tbaa !5
%116 = add nsw i32 %115, %20
%117 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %116, i32 noundef %114) #4
%118 = load i32, ptr @MIU_TEST_AGT_WRDATA_UPPER_HI, align 4, !tbaa !5
%119 = add nsw i32 %118, %20
%120 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %119, i32 noundef poison) #4
%121 = load i32, ptr @MIU_TA_CTL_ENABLE, align 4, !tbaa !5
%122 = load i32, ptr @MIU_TA_CTL_WRITE, align 4, !tbaa !5
%123 = or i32 %122, %121
%124 = load i32, ptr @MIU_TEST_AGT_CTRL, align 4, !tbaa !5
%125 = add nsw i32 %124, %20
%126 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %125, i32 noundef %123) #4
%127 = load i32, ptr @MIU_TA_CTL_START, align 4, !tbaa !5
%128 = load i32, ptr @MIU_TA_CTL_ENABLE, align 4, !tbaa !5
%129 = or i32 %128, %127
%130 = load i32, ptr @MIU_TA_CTL_WRITE, align 4, !tbaa !5
%131 = or i32 %129, %130
%132 = load i32, ptr @MIU_TEST_AGT_CTRL, align 4, !tbaa !5
%133 = add nsw i32 %132, %20
%134 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %133, i32 noundef %131) #4
%135 = load i32, ptr @MAX_CTL_CHECK, align 4, !tbaa !5
%136 = icmp sgt i32 %135, 0
br i1 %136, label %137, label %149
137: ; preds = %92, %146
%138 = phi i32 [ %147, %146 ], [ 0, %92 ]
%139 = load i32, ptr @MIU_TEST_AGT_CTRL, align 4, !tbaa !5
%140 = add nsw i32 %139, %20
%141 = call i32 @qla82xx_rd_32(ptr noundef %0, i32 noundef %140) #4
%142 = load i32, ptr @MIU_TA_CTL_BUSY, align 4, !tbaa !5
%143 = and i32 %142, %141
%144 = icmp eq i32 %143, 0
%145 = load i32, ptr @MAX_CTL_CHECK, align 4, !tbaa !5
br i1 %144, label %149, label %146
146: ; preds = %137
%147 = add nuw nsw i32 %138, 1
%148 = icmp slt i32 %147, %145
br i1 %148, label %137, label %149, !llvm.loop !12
149: ; preds = %146, %137, %92
%150 = phi i32 [ %135, %92 ], [ %145, %137 ], [ %145, %146 ]
%151 = phi i32 [ 0, %92 ], [ %147, %146 ], [ %138, %137 ]
%152 = icmp slt i32 %151, %150
br i1 %152, label %89, label %153
153: ; preds = %149
%154 = call i64 (...) @printk_ratelimit() #4
%155 = icmp eq i64 %154, 0
br i1 %155, label %159, label %156
156: ; preds = %153
%157 = load ptr, ptr %0, align 8, !tbaa !13
%158 = call i32 @dev_err(ptr noundef %157, ptr noundef nonnull @.str) #4
br label %159
159: ; preds = %38, %89, %85, %156, %153, %17
%160 = phi i32 [ %18, %17 ], [ -1, %156 ], [ -1, %153 ], [ 0, %85 ], [ 0, %89 ], [ -1, %38 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
ret i32 %160
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @qla82xx_pci_mem_bound_check(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @qla82xx_pci_mem_write_direct(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @qla82xx_pci_mem_read_2M(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @qla82xx_wr_32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @qla82xx_rd_32(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @printk_ratelimit(...) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = !{!14, !15, i64 0}
!14 = !{!"qla_hw_data", !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/scsi/qla2xxx/extr_qla_nx.c_qla82xx_pci_mem_write_2M.c'
source_filename = "AnghaBench/linux/drivers/scsi/qla2xxx/extr_qla_nx.c_qla82xx_pci_mem_write_2M.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@QLA82XX_ADDR_QDR_NET = common local_unnamed_addr global i32 0, align 4
@QLA82XX_P3_ADDR_QDR_NET_MAX = common local_unnamed_addr global i32 0, align 4
@QLA82XX_CRB_QDR_NET = common local_unnamed_addr global i32 0, align 4
@QLA82XX_CRB_DDR_NET = common local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_ADDR_LO = common local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_ADDR_HI = common local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_WRDATA_LO = common local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_WRDATA_HI = common local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_WRDATA_UPPER_LO = common local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_WRDATA_UPPER_HI = common local_unnamed_addr global i32 0, align 4
@MIU_TA_CTL_ENABLE = common local_unnamed_addr global i32 0, align 4
@MIU_TA_CTL_WRITE = common local_unnamed_addr global i32 0, align 4
@MIU_TEST_AGT_CTRL = common local_unnamed_addr global i32 0, align 4
@MIU_TA_CTL_START = common local_unnamed_addr global i32 0, align 4
@MAX_CTL_CHECK = common local_unnamed_addr global i32 0, align 4
@MIU_TA_CTL_BUSY = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"failed to write through agent.\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @qla82xx_pci_mem_write_2M], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @qla82xx_pci_mem_write_2M(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = alloca [2 x i32], align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
store i64 0, ptr %5, align 8
%6 = load i32, ptr @QLA82XX_ADDR_QDR_NET, align 4, !tbaa !6
%7 = icmp sgt i32 %6, %1
%8 = load i32, ptr @QLA82XX_P3_ADDR_QDR_NET_MAX, align 4
%9 = icmp slt i32 %8, %1
%10 = select i1 %7, i1 true, i1 %9
br i1 %10, label %13, label %11
11: ; preds = %4
%12 = load i32, ptr @QLA82XX_CRB_QDR_NET, align 4, !tbaa !6
br label %19
13: ; preds = %4
%14 = load i32, ptr @QLA82XX_CRB_DDR_NET, align 4, !tbaa !6
%15 = tail call i64 @qla82xx_pci_mem_bound_check(ptr noundef %0, i32 noundef %1, i32 noundef %3) #4
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = tail call i32 @qla82xx_pci_mem_write_direct(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #4
br label %159
19: ; preds = %13, %11
%20 = phi i32 [ %12, %11 ], [ %14, %13 ]
%21 = and i32 %1, 7
%22 = sub nuw nsw i32 8, %21
%23 = tail call i32 @llvm.smin.i32(i32 %22, i32 %3)
%24 = sub nsw i32 %3, %23
%25 = and i32 %1, -16
%26 = and i32 %1, 15
%27 = add nsw i32 %26, -1
%28 = add i32 %27, %3
%29 = ashr i32 %28, 4
%30 = lshr i32 %26, 3
%31 = icmp slt i32 %29, 0
br i1 %31, label %47, label %32
32: ; preds = %19
%33 = add nuw nsw i32 %29, 1
%34 = zext nneg i32 %33 to i64
br label %38
35: ; preds = %38
%36 = add nuw nsw i64 %39, 1
%37 = icmp eq i64 %36, %34
br i1 %37, label %47, label %38, !llvm.loop !10
38: ; preds = %32, %35
%39 = phi i64 [ 0, %32 ], [ %36, %35 ]
%40 = shl nuw nsw i64 %39, 1
%41 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %40
%42 = trunc i64 %39 to i32
%43 = shl i32 %42, 4
%44 = add i32 %43, %25
%45 = call i64 @qla82xx_pci_mem_read_2M(ptr noundef %0, i32 noundef %44, ptr noundef nonnull %41, i32 noundef 8) #4
%46 = icmp eq i64 %45, 0
br i1 %46, label %35, label %159
47: ; preds = %35, %19
%48 = load i32, ptr %2, align 4, !tbaa !6
%49 = icmp eq i32 %23, 8
br i1 %49, label %50, label %53
50: ; preds = %47
%51 = zext nneg i32 %30 to i64
%52 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %51
store i32 %48, ptr %52, align 4, !tbaa !6
br label %69
53: ; preds = %47
%54 = shl nsw i32 %23, 3
%55 = zext nneg i32 %54 to i64
%56 = shl nsw i64 -1, %55
%57 = xor i64 %56, -1
%58 = shl nuw nsw i32 %21, 3
%59 = zext nneg i32 %58 to i64
%60 = shl i64 %57, %59
%61 = zext nneg i32 %30 to i64
%62 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %61
%63 = load i32, ptr %62, align 4, !tbaa !6
%64 = trunc i64 %60 to i32
%65 = xor i32 %64, -1
%66 = and i32 %63, %65
%67 = shl i32 %48, %58
%68 = or i32 %66, %67
store i32 %68, ptr %62, align 4, !tbaa !6
br label %69
69: ; preds = %53, %50
%70 = icmp slt i32 %22, %3
br i1 %70, label %71, label %85
71: ; preds = %69
%72 = shl nsw i32 %24, 3
%73 = zext nneg i32 %72 to i64
%74 = shl nsw i64 -1, %73
%75 = add nuw nsw i32 %30, 1
%76 = zext nneg i32 %75 to i64
%77 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %76
%78 = load i32, ptr %77, align 4, !tbaa !6
%79 = trunc i64 %74 to i32
%80 = xor i32 %79, -1
%81 = and i32 %78, %80
%82 = shl nsw i32 %23, 3
%83 = ashr i32 %48, %82
%84 = or i32 %81, %83
store i32 %84, ptr %77, align 4, !tbaa !6
br label %85
85: ; preds = %71, %69
br i1 %31, label %159, label %86
86: ; preds = %85
%87 = add nuw nsw i32 %29, 1
%88 = zext nneg i32 %87 to i64
br label %92
89: ; preds = %149
%90 = add nuw nsw i64 %93, 1
%91 = icmp eq i64 %90, %88
br i1 %91, label %159, label %92, !llvm.loop !12
92: ; preds = %86, %89
%93 = phi i64 [ 0, %86 ], [ %90, %89 ]
%94 = load i32, ptr @MIU_TEST_AGT_ADDR_LO, align 4, !tbaa !6
%95 = add nsw i32 %94, %20
%96 = trunc i64 %93 to i32
%97 = shl i32 %96, 4
%98 = add i32 %97, %25
%99 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %95, i32 noundef %98) #4
%100 = load i32, ptr @MIU_TEST_AGT_ADDR_HI, align 4, !tbaa !6
%101 = add nsw i32 %100, %20
%102 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %101, i32 noundef 0) #4
%103 = shl nuw nsw i64 %93, 1
%104 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %103
%105 = load i32, ptr %104, align 8, !tbaa !6
%106 = load i32, ptr @MIU_TEST_AGT_WRDATA_LO, align 4, !tbaa !6
%107 = add nsw i32 %106, %20
%108 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %107, i32 noundef %105) #4
%109 = load i32, ptr @MIU_TEST_AGT_WRDATA_HI, align 4, !tbaa !6
%110 = add nsw i32 %109, %20
%111 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %110, i32 noundef poison) #4
%112 = or disjoint i64 %103, 1
%113 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 %112
%114 = load i32, ptr %113, align 4, !tbaa !6
%115 = load i32, ptr @MIU_TEST_AGT_WRDATA_UPPER_LO, align 4, !tbaa !6
%116 = add nsw i32 %115, %20
%117 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %116, i32 noundef %114) #4
%118 = load i32, ptr @MIU_TEST_AGT_WRDATA_UPPER_HI, align 4, !tbaa !6
%119 = add nsw i32 %118, %20
%120 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %119, i32 noundef poison) #4
%121 = load i32, ptr @MIU_TA_CTL_ENABLE, align 4, !tbaa !6
%122 = load i32, ptr @MIU_TA_CTL_WRITE, align 4, !tbaa !6
%123 = or i32 %122, %121
%124 = load i32, ptr @MIU_TEST_AGT_CTRL, align 4, !tbaa !6
%125 = add nsw i32 %124, %20
%126 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %125, i32 noundef %123) #4
%127 = load i32, ptr @MIU_TA_CTL_START, align 4, !tbaa !6
%128 = load i32, ptr @MIU_TA_CTL_ENABLE, align 4, !tbaa !6
%129 = or i32 %128, %127
%130 = load i32, ptr @MIU_TA_CTL_WRITE, align 4, !tbaa !6
%131 = or i32 %129, %130
%132 = load i32, ptr @MIU_TEST_AGT_CTRL, align 4, !tbaa !6
%133 = add nsw i32 %132, %20
%134 = call i32 @qla82xx_wr_32(ptr noundef %0, i32 noundef %133, i32 noundef %131) #4
%135 = load i32, ptr @MAX_CTL_CHECK, align 4, !tbaa !6
%136 = icmp sgt i32 %135, 0
br i1 %136, label %137, label %149
137: ; preds = %92, %146
%138 = phi i32 [ %147, %146 ], [ 0, %92 ]
%139 = load i32, ptr @MIU_TEST_AGT_CTRL, align 4, !tbaa !6
%140 = add nsw i32 %139, %20
%141 = call i32 @qla82xx_rd_32(ptr noundef %0, i32 noundef %140) #4
%142 = load i32, ptr @MIU_TA_CTL_BUSY, align 4, !tbaa !6
%143 = and i32 %142, %141
%144 = icmp eq i32 %143, 0
%145 = load i32, ptr @MAX_CTL_CHECK, align 4, !tbaa !6
br i1 %144, label %149, label %146
146: ; preds = %137
%147 = add nuw nsw i32 %138, 1
%148 = icmp slt i32 %147, %145
br i1 %148, label %137, label %149, !llvm.loop !13
149: ; preds = %146, %137, %92
%150 = phi i32 [ %135, %92 ], [ %145, %137 ], [ %145, %146 ]
%151 = phi i32 [ 0, %92 ], [ %147, %146 ], [ %138, %137 ]
%152 = icmp slt i32 %151, %150
br i1 %152, label %89, label %153
153: ; preds = %149
%154 = call i64 @printk_ratelimit() #4
%155 = icmp eq i64 %154, 0
br i1 %155, label %159, label %156
156: ; preds = %153
%157 = load ptr, ptr %0, align 8, !tbaa !14
%158 = call i32 @dev_err(ptr noundef %157, ptr noundef nonnull @.str) #4
br label %159
159: ; preds = %38, %89, %85, %156, %153, %17
%160 = phi i32 [ %18, %17 ], [ -1, %156 ], [ -1, %153 ], [ 0, %85 ], [ 0, %89 ], [ -1, %38 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
ret i32 %160
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @qla82xx_pci_mem_bound_check(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @qla82xx_pci_mem_write_direct(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @qla82xx_pci_mem_read_2M(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @qla82xx_wr_32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @qla82xx_rd_32(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @printk_ratelimit(...) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}
!14 = !{!15, !16, i64 0}
!15 = !{!"qla_hw_data", !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
|
linux_drivers_scsi_qla2xxx_extr_qla_nx.c_qla82xx_pci_mem_write_2M
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/sysv/extr_inode.c_sysv_remount.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/sysv/extr_inode.c_sysv_remount.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MS_RDONLY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sysv_remount], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @sysv_remount(ptr noundef %0, ptr nocapture noundef %1, ptr nocapture readnone %2) #0 {
%4 = tail call ptr @SYSV_SB(ptr noundef %0) #2
%5 = tail call i32 @lock_super(ptr noundef %0) #2
%6 = load i64, ptr %4, align 8, !tbaa !5
%7 = icmp eq i64 %6, 0
%8 = load i32, ptr %1, align 4, !tbaa !10
br i1 %7, label %12, label %9
9: ; preds = %3
%10 = load i32, ptr @MS_RDONLY, align 4, !tbaa !10
%11 = or i32 %8, %10
store i32 %11, ptr %1, align 4, !tbaa !10
br label %12
12: ; preds = %9, %3
%13 = phi i32 [ %11, %9 ], [ %8, %3 ]
%14 = load i32, ptr @MS_RDONLY, align 4, !tbaa !10
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %12
store i32 1, ptr %0, align 4, !tbaa !12
br label %18
18: ; preds = %17, %12
%19 = tail call i32 @unlock_super(ptr noundef %0) #2
ret i32 0
}
declare ptr @SYSV_SB(ptr noundef) local_unnamed_addr #1
declare i32 @lock_super(ptr noundef) local_unnamed_addr #1
declare i32 @unlock_super(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sysv_sb_info", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"super_block", !11, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/sysv/extr_inode.c_sysv_remount.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/sysv/extr_inode.c_sysv_remount.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MS_RDONLY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sysv_remount], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @sysv_remount(ptr noundef %0, ptr nocapture noundef %1, ptr nocapture readnone %2) #0 {
%4 = tail call ptr @SYSV_SB(ptr noundef %0) #2
%5 = tail call i32 @lock_super(ptr noundef %0) #2
%6 = load i64, ptr %4, align 8, !tbaa !6
%7 = icmp eq i64 %6, 0
%8 = load i32, ptr %1, align 4, !tbaa !11
br i1 %7, label %12, label %9
9: ; preds = %3
%10 = load i32, ptr @MS_RDONLY, align 4, !tbaa !11
%11 = or i32 %8, %10
store i32 %11, ptr %1, align 4, !tbaa !11
br label %12
12: ; preds = %9, %3
%13 = phi i32 [ %11, %9 ], [ %8, %3 ]
%14 = load i32, ptr @MS_RDONLY, align 4, !tbaa !11
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %12
store i32 1, ptr %0, align 4, !tbaa !13
br label %18
18: ; preds = %17, %12
%19 = tail call i32 @unlock_super(ptr noundef %0) #2
ret i32 0
}
declare ptr @SYSV_SB(ptr noundef) local_unnamed_addr #1
declare i32 @lock_super(ptr noundef) local_unnamed_addr #1
declare i32 @unlock_super(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sysv_sb_info", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"super_block", !12, i64 0}
|
fastsocket_kernel_fs_sysv_extr_inode.c_sysv_remount
|
; ModuleID = 'AnghaBench/linux/drivers/dma/qcom/extr_hidma_ll.c_hidma_ll_tre_complete.c'
source_filename = "AnghaBench/linux/drivers/dma/qcom/extr_hidma_ll.c_hidma_ll_tre_complete.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hidma_tre = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @hidma_ll_tre_complete], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @hidma_ll_tre_complete(i64 noundef %0) #0 {
%2 = alloca ptr, align 8
%3 = inttoptr i64 %0 to ptr
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%4 = call i64 @kfifo_out(ptr noundef %3, ptr noundef nonnull %2, i32 noundef 1) #3
%5 = icmp eq i64 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %1, %14
%7 = load ptr, ptr %2, align 8, !tbaa !5
%8 = getelementptr inbounds %struct.hidma_tre, ptr %7, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !9
%10 = icmp eq ptr %9, null
br i1 %10, label %14, label %11
11: ; preds = %6
%12 = load i32, ptr %7, align 8, !tbaa !12
%13 = call i32 %9(i32 noundef %12) #3
br label %14
14: ; preds = %11, %6
%15 = call i64 @kfifo_out(ptr noundef %3, ptr noundef nonnull %2, i32 noundef 1) #3
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %6, !llvm.loop !13
17: ; preds = %14, %1
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @kfifo_out(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"hidma_tre", !11, i64 0, !6, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/dma/qcom/extr_hidma_ll.c_hidma_ll_tre_complete.c'
source_filename = "AnghaBench/linux/drivers/dma/qcom/extr_hidma_ll.c_hidma_ll_tre_complete.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @hidma_ll_tre_complete], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @hidma_ll_tre_complete(i64 noundef %0) #0 {
%2 = alloca ptr, align 8
%3 = inttoptr i64 %0 to ptr
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%4 = call i64 @kfifo_out(ptr noundef %3, ptr noundef nonnull %2, i32 noundef 1) #3
%5 = icmp eq i64 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %1, %14
%7 = load ptr, ptr %2, align 8, !tbaa !6
%8 = getelementptr inbounds i8, ptr %7, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !10
%10 = icmp eq ptr %9, null
br i1 %10, label %14, label %11
11: ; preds = %6
%12 = load i32, ptr %7, align 8, !tbaa !13
%13 = call i32 %9(i32 noundef %12) #3
br label %14
14: ; preds = %11, %6
%15 = call i64 @kfifo_out(ptr noundef %3, ptr noundef nonnull %2, i32 noundef 1) #3
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %6, !llvm.loop !14
17: ; preds = %14, %1
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @kfifo_out(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"hidma_tre", !12, i64 0, !7, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_dma_qcom_extr_hidma_ll.c_hidma_ll_tre_complete
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_inftarg.c_child_get_current_exception_event.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_inftarg.c_child_get_current_exception_event.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noalias noundef ptr @child_get_current_exception_event() local_unnamed_addr #0 {
ret ptr null
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_inftarg.c_child_get_current_exception_event.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_inftarg.c_child_get_current_exception_event.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noalias noundef ptr @child_get_current_exception_event() local_unnamed_addr #0 {
ret ptr null
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_contrib_gdb_gdb_extr_inftarg.c_child_get_current_exception_event
|
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/apps/raspicam/extr_RaspiStillYUV.c_default_status.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/apps/raspicam/extr_RaspiStillYUV.c_default_status.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32, i32, i64, i64, i32, i64, ptr, i64, i32 }
@FRAME_NEXT_SINGLE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @default_status], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @default_status(ptr noundef %0) #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @vcos_assert(i32 noundef 0) #3
br label %17
5: ; preds = %1
%6 = tail call i32 @memset(ptr noundef nonnull %0, i32 noundef 0, i32 noundef 72) #3
%7 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 9
%8 = tail call i32 @raspicommonsettings_set_defaults(ptr noundef nonnull %7) #3
store i32 -1, ptr %0, align 8, !tbaa !5
%9 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 6
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %9, i8 0, i64 24, i1 false)
%10 = load i32, ptr @FRAME_NEXT_SINGLE, align 4, !tbaa !12
%11 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 5
store i32 %10, ptr %11, align 8, !tbaa !13
%12 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 3
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 2
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %12, i8 0, i64 16, i1 false)
%14 = tail call i32 @raspipreview_set_defaults(ptr noundef nonnull %13) #3
%15 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%16 = tail call i32 @raspicamcontrol_set_defaults(ptr noundef nonnull %15) #3
br label %17
17: ; preds = %5, %3
ret void
}
declare i32 @vcos_assert(i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @raspicommonsettings_set_defaults(ptr noundef) local_unnamed_addr #1
declare i32 @raspipreview_set_defaults(ptr noundef) local_unnamed_addr #1
declare i32 @raspicamcontrol_set_defaults(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !10, i64 24, !7, i64 32, !10, i64 40, !11, i64 48, !10, i64 56, !7, i64 64}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 32}
|
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/apps/raspicam/extr_RaspiStillYUV.c_default_status.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/apps/raspicam/extr_RaspiStillYUV.c_default_status.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FRAME_NEXT_SINGLE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @default_status], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @default_status(ptr noundef %0) #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @vcos_assert(i32 noundef 0) #3
br label %17
5: ; preds = %1
%6 = tail call i32 @memset(ptr noundef nonnull %0, i32 noundef 0, i32 noundef 72) #3
%7 = getelementptr inbounds i8, ptr %0, i64 64
%8 = tail call i32 @raspicommonsettings_set_defaults(ptr noundef nonnull %7) #3
store i32 -1, ptr %0, align 8, !tbaa !6
%9 = getelementptr inbounds i8, ptr %0, i64 40
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %9, i8 0, i64 24, i1 false)
%10 = load i32, ptr @FRAME_NEXT_SINGLE, align 4, !tbaa !13
%11 = getelementptr inbounds i8, ptr %0, i64 32
store i32 %10, ptr %11, align 8, !tbaa !14
%12 = getelementptr inbounds i8, ptr %0, i64 16
%13 = getelementptr inbounds i8, ptr %0, i64 8
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %12, i8 0, i64 16, i1 false)
%14 = tail call i32 @raspipreview_set_defaults(ptr noundef nonnull %13) #3
%15 = getelementptr inbounds i8, ptr %0, i64 4
%16 = tail call i32 @raspicamcontrol_set_defaults(ptr noundef nonnull %15) #3
br label %17
17: ; preds = %5, %3
ret void
}
declare i32 @vcos_assert(i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @raspicommonsettings_set_defaults(ptr noundef) local_unnamed_addr #1
declare i32 @raspipreview_set_defaults(ptr noundef) local_unnamed_addr #1
declare i32 @raspicamcontrol_set_defaults(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16, !11, i64 24, !8, i64 32, !11, i64 40, !12, i64 48, !11, i64 56, !8, i64 64}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !8, i64 32}
|
RetroArch_gfx_include_userland_host_applications_linux_apps_raspicam_extr_RaspiStillYUV.c_default_status
|
; ModuleID = 'AnghaBench/qmk_firmware/users/yet-another-developer/extr_yet-another-developer.c_keyboard_post_init_user.c'
source_filename = "AnghaBench/qmk_firmware/users/yet-another-developer/extr_yet-another-developer.c_keyboard_post_init_user.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @keyboard_post_init_user() local_unnamed_addr #0 {
%1 = tail call i32 (...) @keyboard_post_init_keymap() #2
ret void
}
declare i32 @keyboard_post_init_keymap(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/qmk_firmware/users/yet-another-developer/extr_yet-another-developer.c_keyboard_post_init_user.c'
source_filename = "AnghaBench/qmk_firmware/users/yet-another-developer/extr_yet-another-developer.c_keyboard_post_init_user.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @keyboard_post_init_user() local_unnamed_addr #0 {
%1 = tail call i32 @keyboard_post_init_keymap() #2
ret void
}
declare i32 @keyboard_post_init_keymap(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
qmk_firmware_users_yet-another-developer_extr_yet-another-developer.c_keyboard_post_init_user
|
; ModuleID = 'AnghaBench/openssl/crypto/bio/extr_b_addr.c_BIO_lookup.c'
source_filename = "AnghaBench/openssl/crypto/bio/extr_b_addr.c_BIO_lookup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @BIO_lookup(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5) local_unnamed_addr #0 {
%7 = tail call i32 @BIO_lookup_ex(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef 0, ptr noundef %5) #2
ret i32 %7
}
declare i32 @BIO_lookup_ex(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/openssl/crypto/bio/extr_b_addr.c_BIO_lookup.c'
source_filename = "AnghaBench/openssl/crypto/bio/extr_b_addr.c_BIO_lookup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @BIO_lookup(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5) local_unnamed_addr #0 {
%7 = tail call i32 @BIO_lookup_ex(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef 0, ptr noundef %5) #2
ret i32 %7
}
declare i32 @BIO_lookup_ex(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
openssl_crypto_bio_extr_b_addr.c_BIO_lookup
|
; ModuleID = 'AnghaBench/FFmpeg/fftools/extr_ffplay.c_packet_queue_flush.c'
source_filename = "AnghaBench/FFmpeg/fftools/extr_ffplay.c_packet_queue_flush.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i64, i64, i64, ptr, ptr }
%struct.TYPE_6__ = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @packet_queue_flush], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @packet_queue_flush(ptr nocapture noundef %0) #0 {
%2 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
%3 = load i32, ptr %0, align 8, !tbaa !5
%4 = tail call i32 @SDL_LockMutex(i32 noundef %3) #4
%5 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 4
%6 = load ptr, ptr %5, align 8, !tbaa !12
store ptr %6, ptr %2, align 8, !tbaa !13
%7 = icmp eq ptr %6, null
br i1 %7, label %15, label %8
8: ; preds = %1, %8
%9 = phi ptr [ %11, %8 ], [ %6, %1 ]
%10 = getelementptr inbounds %struct.TYPE_6__, ptr %9, i64 0, i32 1
%11 = load ptr, ptr %10, align 8, !tbaa !14
%12 = call i32 @av_packet_unref(ptr noundef nonnull %9) #4
%13 = call i32 @av_freep(ptr noundef nonnull %2) #4
store ptr %11, ptr %2, align 8, !tbaa !13
%14 = icmp eq ptr %11, null
br i1 %14, label %15, label %8, !llvm.loop !16
15: ; preds = %8, %1
%16 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(40) %16, i8 0, i64 40, i1 false)
%17 = load i32, ptr %0, align 8, !tbaa !5
%18 = call i32 @SDL_UnlockMutex(i32 noundef %17) #4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SDL_LockMutex(i32 noundef) local_unnamed_addr #2
declare i32 @av_packet_unref(ptr noundef) local_unnamed_addr #2
declare i32 @av_freep(ptr noundef) local_unnamed_addr #2
declare i32 @SDL_UnlockMutex(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !11, i64 32, !11, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !11, i64 32}
!13 = !{!11, !11, i64 0}
!14 = !{!15, !11, i64 8}
!15 = !{!"TYPE_6__", !7, i64 0, !11, i64 8}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/FFmpeg/fftools/extr_ffplay.c_packet_queue_flush.c'
source_filename = "AnghaBench/FFmpeg/fftools/extr_ffplay.c_packet_queue_flush.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @packet_queue_flush], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @packet_queue_flush(ptr nocapture noundef %0) #0 {
%2 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
%3 = load i32, ptr %0, align 8, !tbaa !6
%4 = tail call i32 @SDL_LockMutex(i32 noundef %3) #4
%5 = getelementptr inbounds i8, ptr %0, i64 32
%6 = load ptr, ptr %5, align 8, !tbaa !13
store ptr %6, ptr %2, align 8, !tbaa !14
%7 = icmp eq ptr %6, null
br i1 %7, label %15, label %8
8: ; preds = %1, %8
%9 = phi ptr [ %11, %8 ], [ %6, %1 ]
%10 = getelementptr inbounds i8, ptr %9, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !15
%12 = call i32 @av_packet_unref(ptr noundef nonnull %9) #4
%13 = call i32 @av_freep(ptr noundef nonnull %2) #4
store ptr %11, ptr %2, align 8, !tbaa !14
%14 = icmp eq ptr %11, null
br i1 %14, label %15, label %8, !llvm.loop !17
15: ; preds = %8, %1
%16 = getelementptr inbounds i8, ptr %0, i64 8
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(40) %16, i8 0, i64 40, i1 false)
%17 = load i32, ptr %0, align 8, !tbaa !6
%18 = call i32 @SDL_UnlockMutex(i32 noundef %17) #4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SDL_LockMutex(i32 noundef) local_unnamed_addr #2
declare i32 @av_packet_unref(ptr noundef) local_unnamed_addr #2
declare i32 @av_freep(ptr noundef) local_unnamed_addr #2
declare i32 @SDL_UnlockMutex(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !12, i64 32, !12, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !12, i64 32}
!14 = !{!12, !12, i64 0}
!15 = !{!16, !12, i64 8}
!16 = !{!"TYPE_6__", !8, i64 0, !12, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
|
FFmpeg_fftools_extr_ffplay.c_packet_queue_flush
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/mlx4/mlx4_core/extr_mlx4_cmd.c_mlx4_cmd_init.c'
source_filename = "AnghaBench/freebsd/sys/dev/mlx4/mlx4_core/extr_mlx4_cmd.c_mlx4_cmd_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, i32, i64, i64, i64, i32, i32, i32, i32 }
%struct.mlx4_priv = type { %struct.TYPE_8__, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i64, i32 }
@MLX4_CMD_CLEANUP_STRUCT = dso_local local_unnamed_addr global i32 0, align 4
@MLX4_HCR_BASE = dso_local local_unnamed_addr global i64 0, align 8
@MLX4_HCR_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"Couldn't map command register\0A\00", align 1
@MLX4_CMD_CLEANUP_HCR = dso_local local_unnamed_addr global i32 0, align 4
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@MLX4_CMD_CLEANUP_VHCR = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [9 x i8] c"mlx4_cmd\00", align 1
@MLX4_MAILBOX_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@MLX4_CMD_CLEANUP_POOL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @mlx4_cmd_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @mlx4_priv(ptr noundef %0) #2
%3 = load i32, ptr %2, align 8, !tbaa !5
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %17
5: ; preds = %1
%6 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 0, i32 8
%7 = tail call i32 @init_rwsem(ptr noundef nonnull %6) #2
%8 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 0, i32 7
%9 = tail call i32 @mutex_init(ptr noundef nonnull %8) #2
%10 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 0, i32 6
%11 = tail call i32 @sema_init(ptr noundef nonnull %10, i32 noundef 1) #2
%12 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 0, i32 5
%13 = tail call i32 @sema_init(ptr noundef nonnull %12, i32 noundef 0) #2
%14 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 0, i32 4
store i64 0, ptr %14, align 8, !tbaa !13
%15 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 0, i32 1
store i32 1, ptr %15, align 4, !tbaa !14
store i32 1, ptr %2, align 8, !tbaa !5
%16 = load i32, ptr @MLX4_CMD_CLEANUP_STRUCT, align 4, !tbaa !15
br label %17
17: ; preds = %5, %1
%18 = phi i32 [ 0, %1 ], [ %16, %5 ]
%19 = tail call i32 @mlx4_is_slave(ptr noundef %0) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %39
21: ; preds = %17
%22 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 0, i32 3
%23 = load i64, ptr %22, align 8, !tbaa !16
%24 = icmp eq i64 %23, 0
br i1 %24, label %25, label %39
25: ; preds = %21
%26 = load ptr, ptr %0, align 8, !tbaa !17
%27 = load ptr, ptr %26, align 8, !tbaa !20
%28 = tail call i64 @pci_resource_start(ptr noundef %27, i32 noundef 0) #2
%29 = load i64, ptr @MLX4_HCR_BASE, align 8, !tbaa !22
%30 = add nsw i64 %29, %28
%31 = load i32, ptr @MLX4_HCR_SIZE, align 4, !tbaa !15
%32 = tail call i64 @ioremap(i64 noundef %30, i32 noundef %31) #2
store i64 %32, ptr %22, align 8, !tbaa !16
%33 = icmp eq i64 %32, 0
br i1 %33, label %34, label %36
34: ; preds = %25
%35 = tail call i32 @mlx4_err(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
br label %69
36: ; preds = %25
%37 = load i32, ptr @MLX4_CMD_CLEANUP_HCR, align 4, !tbaa !15
%38 = or i32 %37, %18
br label %39
39: ; preds = %36, %21, %17
%40 = phi i32 [ %18, %17 ], [ %18, %21 ], [ %38, %36 ]
%41 = tail call i64 @mlx4_is_mfunc(ptr noundef %0) #2
%42 = icmp eq i64 %41, 0
br i1 %42, label %58, label %43
43: ; preds = %39
%44 = getelementptr inbounds %struct.mlx4_priv, ptr %2, i64 0, i32 1
%45 = load i64, ptr %44, align 8, !tbaa !23
%46 = icmp eq i64 %45, 0
br i1 %46, label %47, label %58
47: ; preds = %43
%48 = load ptr, ptr %0, align 8, !tbaa !17
%49 = load ptr, ptr %48, align 8, !tbaa !20
%50 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !15
%51 = getelementptr inbounds %struct.mlx4_priv, ptr %2, i64 0, i32 1, i32 1
%52 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !15
%53 = tail call i64 @dma_alloc_coherent(ptr noundef %49, i32 noundef %50, ptr noundef nonnull %51, i32 noundef %52) #2
store i64 %53, ptr %44, align 8, !tbaa !23
%54 = icmp eq i64 %53, 0
br i1 %54, label %69, label %55
55: ; preds = %47
%56 = load i32, ptr @MLX4_CMD_CLEANUP_VHCR, align 4, !tbaa !15
%57 = or i32 %56, %40
br label %58
58: ; preds = %55, %43, %39
%59 = phi i32 [ %40, %43 ], [ %57, %55 ], [ %40, %39 ]
%60 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 0, i32 2
%61 = load i64, ptr %60, align 8, !tbaa !24
%62 = icmp eq i64 %61, 0
br i1 %62, label %63, label %74
63: ; preds = %58
%64 = load ptr, ptr %0, align 8, !tbaa !17
%65 = load ptr, ptr %64, align 8, !tbaa !20
%66 = load i32, ptr @MLX4_MAILBOX_SIZE, align 4, !tbaa !15
%67 = tail call i64 @pci_pool_create(ptr noundef nonnull @.str.1, ptr noundef %65, i32 noundef %66, i32 noundef %66, i32 noundef 0) #2
store i64 %67, ptr %60, align 8, !tbaa !24
%68 = icmp eq i64 %67, 0
br i1 %68, label %69, label %74
69: ; preds = %63, %47, %34
%70 = phi i32 [ %59, %63 ], [ %40, %47 ], [ %18, %34 ]
%71 = tail call i32 @mlx4_cmd_cleanup(ptr noundef nonnull %0, i32 noundef %70) #2
%72 = load i32, ptr @ENOMEM, align 4, !tbaa !15
%73 = sub nsw i32 0, %72
br label %74
74: ; preds = %58, %63, %69
%75 = phi i32 [ %73, %69 ], [ 0, %63 ], [ 0, %58 ]
ret i32 %75
}
declare ptr @mlx4_priv(ptr noundef) local_unnamed_addr #1
declare i32 @init_rwsem(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_init(ptr noundef) local_unnamed_addr #1
declare i32 @sema_init(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlx4_is_slave(ptr noundef) local_unnamed_addr #1
declare i64 @ioremap(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pci_resource_start(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlx4_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @mlx4_is_mfunc(ptr noundef) local_unnamed_addr #1
declare i64 @dma_alloc_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pci_pool_create(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlx4_cmd_cleanup(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"mlx4_priv", !7, i64 0, !12, i64 48}
!7 = !{!"TYPE_8__", !8, i64 0, !8, i64 4, !11, i64 8, !11, i64 16, !11, i64 24, !8, i64 32, !8, i64 36, !8, i64 40, !8, i64 44}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"TYPE_6__", !11, i64 0, !8, i64 8}
!13 = !{!6, !11, i64 24}
!14 = !{!6, !8, i64 4}
!15 = !{!8, !8, i64 0}
!16 = !{!6, !11, i64 16}
!17 = !{!18, !19, i64 0}
!18 = !{!"mlx4_dev", !19, i64 0}
!19 = !{!"any pointer", !9, i64 0}
!20 = !{!21, !19, i64 0}
!21 = !{!"TYPE_7__", !19, i64 0}
!22 = !{!11, !11, i64 0}
!23 = !{!6, !11, i64 48}
!24 = !{!6, !11, i64 8}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/mlx4/mlx4_core/extr_mlx4_cmd.c_mlx4_cmd_init.c'
source_filename = "AnghaBench/freebsd/sys/dev/mlx4/mlx4_core/extr_mlx4_cmd.c_mlx4_cmd_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MLX4_CMD_CLEANUP_STRUCT = common local_unnamed_addr global i32 0, align 4
@MLX4_HCR_BASE = common local_unnamed_addr global i64 0, align 8
@MLX4_HCR_SIZE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"Couldn't map command register\0A\00", align 1
@MLX4_CMD_CLEANUP_HCR = common local_unnamed_addr global i32 0, align 4
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@MLX4_CMD_CLEANUP_VHCR = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [9 x i8] c"mlx4_cmd\00", align 1
@MLX4_MAILBOX_SIZE = common local_unnamed_addr global i32 0, align 4
@MLX4_CMD_CLEANUP_POOL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @mlx4_cmd_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @mlx4_priv(ptr noundef %0) #2
%3 = load i32, ptr %2, align 8, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %16
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %2, i64 44
%7 = tail call i32 @init_rwsem(ptr noundef nonnull %6) #2
%8 = getelementptr inbounds i8, ptr %2, i64 40
%9 = tail call i32 @mutex_init(ptr noundef nonnull %8) #2
%10 = getelementptr inbounds i8, ptr %2, i64 36
%11 = tail call i32 @sema_init(ptr noundef nonnull %10, i32 noundef 1) #2
%12 = getelementptr inbounds i8, ptr %2, i64 32
%13 = tail call i32 @sema_init(ptr noundef nonnull %12, i32 noundef 0) #2
%14 = getelementptr inbounds i8, ptr %2, i64 24
store i64 0, ptr %14, align 8, !tbaa !14
store <2 x i32> <i32 1, i32 1>, ptr %2, align 8, !tbaa !15
%15 = load i32, ptr @MLX4_CMD_CLEANUP_STRUCT, align 4, !tbaa !15
br label %16
16: ; preds = %5, %1
%17 = phi i32 [ 0, %1 ], [ %15, %5 ]
%18 = tail call i32 @mlx4_is_slave(ptr noundef %0) #2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %38
20: ; preds = %16
%21 = getelementptr inbounds i8, ptr %2, i64 16
%22 = load i64, ptr %21, align 8, !tbaa !16
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %38
24: ; preds = %20
%25 = load ptr, ptr %0, align 8, !tbaa !17
%26 = load ptr, ptr %25, align 8, !tbaa !20
%27 = tail call i64 @pci_resource_start(ptr noundef %26, i32 noundef 0) #2
%28 = load i64, ptr @MLX4_HCR_BASE, align 8, !tbaa !22
%29 = add nsw i64 %28, %27
%30 = load i32, ptr @MLX4_HCR_SIZE, align 4, !tbaa !15
%31 = tail call i64 @ioremap(i64 noundef %29, i32 noundef %30) #2
store i64 %31, ptr %21, align 8, !tbaa !16
%32 = icmp eq i64 %31, 0
br i1 %32, label %33, label %35
33: ; preds = %24
%34 = tail call i32 @mlx4_err(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
br label %68
35: ; preds = %24
%36 = load i32, ptr @MLX4_CMD_CLEANUP_HCR, align 4, !tbaa !15
%37 = or i32 %36, %17
br label %38
38: ; preds = %35, %20, %16
%39 = phi i32 [ %17, %16 ], [ %17, %20 ], [ %37, %35 ]
%40 = tail call i64 @mlx4_is_mfunc(ptr noundef %0) #2
%41 = icmp eq i64 %40, 0
br i1 %41, label %57, label %42
42: ; preds = %38
%43 = getelementptr inbounds i8, ptr %2, i64 48
%44 = load i64, ptr %43, align 8, !tbaa !23
%45 = icmp eq i64 %44, 0
br i1 %45, label %46, label %57
46: ; preds = %42
%47 = load ptr, ptr %0, align 8, !tbaa !17
%48 = load ptr, ptr %47, align 8, !tbaa !20
%49 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !15
%50 = getelementptr inbounds i8, ptr %2, i64 56
%51 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !15
%52 = tail call i64 @dma_alloc_coherent(ptr noundef %48, i32 noundef %49, ptr noundef nonnull %50, i32 noundef %51) #2
store i64 %52, ptr %43, align 8, !tbaa !23
%53 = icmp eq i64 %52, 0
br i1 %53, label %68, label %54
54: ; preds = %46
%55 = load i32, ptr @MLX4_CMD_CLEANUP_VHCR, align 4, !tbaa !15
%56 = or i32 %55, %39
br label %57
57: ; preds = %54, %42, %38
%58 = phi i32 [ %39, %42 ], [ %56, %54 ], [ %39, %38 ]
%59 = getelementptr inbounds i8, ptr %2, i64 8
%60 = load i64, ptr %59, align 8, !tbaa !24
%61 = icmp eq i64 %60, 0
br i1 %61, label %62, label %73
62: ; preds = %57
%63 = load ptr, ptr %0, align 8, !tbaa !17
%64 = load ptr, ptr %63, align 8, !tbaa !20
%65 = load i32, ptr @MLX4_MAILBOX_SIZE, align 4, !tbaa !15
%66 = tail call i64 @pci_pool_create(ptr noundef nonnull @.str.1, ptr noundef %64, i32 noundef %65, i32 noundef %65, i32 noundef 0) #2
store i64 %66, ptr %59, align 8, !tbaa !24
%67 = icmp eq i64 %66, 0
br i1 %67, label %68, label %73
68: ; preds = %62, %46, %33
%69 = phi i32 [ %58, %62 ], [ %39, %46 ], [ %17, %33 ]
%70 = tail call i32 @mlx4_cmd_cleanup(ptr noundef nonnull %0, i32 noundef %69) #2
%71 = load i32, ptr @ENOMEM, align 4, !tbaa !15
%72 = sub nsw i32 0, %71
br label %73
73: ; preds = %57, %62, %68
%74 = phi i32 [ %72, %68 ], [ 0, %62 ], [ 0, %57 ]
ret i32 %74
}
declare ptr @mlx4_priv(ptr noundef) local_unnamed_addr #1
declare i32 @init_rwsem(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_init(ptr noundef) local_unnamed_addr #1
declare i32 @sema_init(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlx4_is_slave(ptr noundef) local_unnamed_addr #1
declare i64 @ioremap(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pci_resource_start(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlx4_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @mlx4_is_mfunc(ptr noundef) local_unnamed_addr #1
declare i64 @dma_alloc_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pci_pool_create(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlx4_cmd_cleanup(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"mlx4_priv", !8, i64 0, !13, i64 48}
!8 = !{!"TYPE_8__", !9, i64 0, !9, i64 4, !12, i64 8, !12, i64 16, !12, i64 24, !9, i64 32, !9, i64 36, !9, i64 40, !9, i64 44}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!"TYPE_6__", !12, i64 0, !9, i64 8}
!14 = !{!7, !12, i64 24}
!15 = !{!9, !9, i64 0}
!16 = !{!7, !12, i64 16}
!17 = !{!18, !19, i64 0}
!18 = !{!"mlx4_dev", !19, i64 0}
!19 = !{!"any pointer", !10, i64 0}
!20 = !{!21, !19, i64 0}
!21 = !{!"TYPE_7__", !19, i64 0}
!22 = !{!12, !12, i64 0}
!23 = !{!7, !12, i64 48}
!24 = !{!7, !12, i64 8}
|
freebsd_sys_dev_mlx4_mlx4_core_extr_mlx4_cmd.c_mlx4_cmd_init
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/pci/extr_pci-ip32.c_macepci_error.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/pci/extr_pci-ip32.c_macepci_error.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
@mace = dso_local local_unnamed_addr global ptr null, align 8
@MACEPCI_ERROR_MEMORY_ADDR = dso_local local_unnamed_addr global i32 0, align 4
@MACEPCI_ERROR_CONFIG_ADDR = dso_local local_unnamed_addr global i32 0, align 4
@MACEPCI_ERROR_MASTER_ABORT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [38 x i8] c"MACEPCI: Master abort at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_TARGET_ABORT = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [38 x i8] c"MACEPCI: Target abort at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_DATA_PARITY_ERR = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [43 x i8] c"MACEPCI: Data parity error at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_RETRY_ERR = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [37 x i8] c"MACEPCI: Retry error at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_ILLEGAL_CMD = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [41 x i8] c"MACEPCI: Illegal command at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_SYSTEM_ERR = dso_local local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [38 x i8] c"MACEPCI: System error at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_PARITY_ERR = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [38 x i8] c"MACEPCI: Parity error at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_OVERRUN = dso_local local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [39 x i8] c"MACEPCI: Overrun error at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_SIG_TABORT = dso_local local_unnamed_addr global i32 0, align 4
@.str.8 = private unnamed_addr constant [43 x i8] c"MACEPCI: Signaled target abort (clearing)\0A\00", align 1
@MACEPCI_ERROR_INTERRUPT_TEST = dso_local local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [46 x i8] c"MACEPCI: Interrupt test triggered (clearing)\0A\00", align 1
@IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @macepci_error], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @macepci_error(i32 %0, ptr nocapture readnone %1) #0 {
%3 = load ptr, ptr @mace, align 8, !tbaa !5
%4 = load i32, ptr %3, align 4, !tbaa !9
%5 = getelementptr inbounds %struct.TYPE_3__, ptr %3, i64 0, i32 1
%6 = load i32, ptr %5, align 4, !tbaa !13
%7 = load i32, ptr @MACEPCI_ERROR_MEMORY_ADDR, align 4, !tbaa !14
%8 = and i32 %7, %4
%9 = icmp eq i32 %8, 0
%10 = load i32, ptr @MACEPCI_ERROR_CONFIG_ADDR, align 4
%11 = and i32 %10, %4
%12 = icmp eq i32 %11, 0
%13 = select i1 %12, i32 88, i32 67
%14 = select i1 %9, i32 %13, i32 77
%15 = load i32, ptr @MACEPCI_ERROR_MASTER_ABORT, align 4, !tbaa !14
%16 = and i32 %15, %4
%17 = icmp eq i32 %16, 0
br i1 %17, label %23, label %18
18: ; preds = %2
%19 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str, i32 noundef %6, i32 noundef %14) #2
%20 = load i32, ptr @MACEPCI_ERROR_MASTER_ABORT, align 4, !tbaa !14
%21 = xor i32 %20, -1
%22 = and i32 %4, %21
br label %23
23: ; preds = %18, %2
%24 = phi i32 [ %22, %18 ], [ %4, %2 ]
%25 = load i32, ptr @MACEPCI_ERROR_TARGET_ABORT, align 4, !tbaa !14
%26 = and i32 %25, %24
%27 = icmp eq i32 %26, 0
br i1 %27, label %33, label %28
28: ; preds = %23
%29 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.1, i32 noundef %6, i32 noundef %14) #2
%30 = load i32, ptr @MACEPCI_ERROR_TARGET_ABORT, align 4, !tbaa !14
%31 = xor i32 %30, -1
%32 = and i32 %24, %31
br label %33
33: ; preds = %28, %23
%34 = phi i32 [ %32, %28 ], [ %24, %23 ]
%35 = load i32, ptr @MACEPCI_ERROR_DATA_PARITY_ERR, align 4, !tbaa !14
%36 = and i32 %35, %34
%37 = icmp eq i32 %36, 0
br i1 %37, label %43, label %38
38: ; preds = %33
%39 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.2, i32 noundef %6, i32 noundef %14) #2
%40 = load i32, ptr @MACEPCI_ERROR_DATA_PARITY_ERR, align 4, !tbaa !14
%41 = xor i32 %40, -1
%42 = and i32 %34, %41
br label %43
43: ; preds = %38, %33
%44 = phi i32 [ %42, %38 ], [ %34, %33 ]
%45 = load i32, ptr @MACEPCI_ERROR_RETRY_ERR, align 4, !tbaa !14
%46 = and i32 %45, %44
%47 = icmp eq i32 %46, 0
br i1 %47, label %53, label %48
48: ; preds = %43
%49 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.3, i32 noundef %6, i32 noundef %14) #2
%50 = load i32, ptr @MACEPCI_ERROR_RETRY_ERR, align 4, !tbaa !14
%51 = xor i32 %50, -1
%52 = and i32 %44, %51
br label %53
53: ; preds = %48, %43
%54 = phi i32 [ %52, %48 ], [ %44, %43 ]
%55 = load i32, ptr @MACEPCI_ERROR_ILLEGAL_CMD, align 4, !tbaa !14
%56 = and i32 %55, %54
%57 = icmp eq i32 %56, 0
br i1 %57, label %63, label %58
58: ; preds = %53
%59 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.4, i32 noundef %6, i32 noundef %14) #2
%60 = load i32, ptr @MACEPCI_ERROR_ILLEGAL_CMD, align 4, !tbaa !14
%61 = xor i32 %60, -1
%62 = and i32 %54, %61
br label %63
63: ; preds = %58, %53
%64 = phi i32 [ %62, %58 ], [ %54, %53 ]
%65 = load i32, ptr @MACEPCI_ERROR_SYSTEM_ERR, align 4, !tbaa !14
%66 = and i32 %65, %64
%67 = icmp eq i32 %66, 0
br i1 %67, label %73, label %68
68: ; preds = %63
%69 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.5, i32 noundef %6, i32 noundef %14) #2
%70 = load i32, ptr @MACEPCI_ERROR_SYSTEM_ERR, align 4, !tbaa !14
%71 = xor i32 %70, -1
%72 = and i32 %64, %71
br label %73
73: ; preds = %68, %63
%74 = phi i32 [ %72, %68 ], [ %64, %63 ]
%75 = load i32, ptr @MACEPCI_ERROR_PARITY_ERR, align 4, !tbaa !14
%76 = and i32 %75, %74
%77 = icmp eq i32 %76, 0
br i1 %77, label %83, label %78
78: ; preds = %73
%79 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.6, i32 noundef %6, i32 noundef %14) #2
%80 = load i32, ptr @MACEPCI_ERROR_PARITY_ERR, align 4, !tbaa !14
%81 = xor i32 %80, -1
%82 = and i32 %74, %81
br label %83
83: ; preds = %78, %73
%84 = phi i32 [ %82, %78 ], [ %74, %73 ]
%85 = load i32, ptr @MACEPCI_ERROR_OVERRUN, align 4, !tbaa !14
%86 = and i32 %85, %84
%87 = icmp eq i32 %86, 0
br i1 %87, label %93, label %88
88: ; preds = %83
%89 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.7, i32 noundef %6, i32 noundef %14) #2
%90 = load i32, ptr @MACEPCI_ERROR_OVERRUN, align 4, !tbaa !14
%91 = xor i32 %90, -1
%92 = and i32 %84, %91
br label %93
93: ; preds = %88, %83
%94 = phi i32 [ %92, %88 ], [ %84, %83 ]
%95 = load i32, ptr @MACEPCI_ERROR_SIG_TABORT, align 4, !tbaa !14
%96 = and i32 %95, %94
%97 = icmp eq i32 %96, 0
br i1 %97, label %103, label %98
98: ; preds = %93
%99 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.8) #2
%100 = load i32, ptr @MACEPCI_ERROR_SIG_TABORT, align 4, !tbaa !14
%101 = xor i32 %100, -1
%102 = and i32 %94, %101
br label %103
103: ; preds = %98, %93
%104 = phi i32 [ %102, %98 ], [ %94, %93 ]
%105 = load i32, ptr @MACEPCI_ERROR_INTERRUPT_TEST, align 4, !tbaa !14
%106 = and i32 %105, %104
%107 = icmp eq i32 %106, 0
br i1 %107, label %113, label %108
108: ; preds = %103
%109 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.9) #2
%110 = load i32, ptr @MACEPCI_ERROR_INTERRUPT_TEST, align 4, !tbaa !14
%111 = xor i32 %110, -1
%112 = and i32 %104, %111
br label %113
113: ; preds = %108, %103
%114 = phi i32 [ %112, %108 ], [ %104, %103 ]
%115 = load ptr, ptr @mace, align 8, !tbaa !5
store i32 %114, ptr %115, align 4, !tbaa !9
%116 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !14
ret i32 %116
}
declare i32 @printk(ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 0}
!10 = !{!"TYPE_4__", !11, i64 0}
!11 = !{!"TYPE_3__", !12, i64 0, !12, i64 4}
!12 = !{!"int", !7, i64 0}
!13 = !{!10, !12, i64 4}
!14 = !{!12, !12, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/pci/extr_pci-ip32.c_macepci_error.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/pci/extr_pci-ip32.c_macepci_error.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@mace = common local_unnamed_addr global ptr null, align 8
@MACEPCI_ERROR_MEMORY_ADDR = common local_unnamed_addr global i32 0, align 4
@MACEPCI_ERROR_CONFIG_ADDR = common local_unnamed_addr global i32 0, align 4
@MACEPCI_ERROR_MASTER_ABORT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [38 x i8] c"MACEPCI: Master abort at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_TARGET_ABORT = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [38 x i8] c"MACEPCI: Target abort at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_DATA_PARITY_ERR = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [43 x i8] c"MACEPCI: Data parity error at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_RETRY_ERR = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [37 x i8] c"MACEPCI: Retry error at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_ILLEGAL_CMD = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [41 x i8] c"MACEPCI: Illegal command at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_SYSTEM_ERR = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [38 x i8] c"MACEPCI: System error at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_PARITY_ERR = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [38 x i8] c"MACEPCI: Parity error at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_OVERRUN = common local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [39 x i8] c"MACEPCI: Overrun error at 0x%08x (%c)\0A\00", align 1
@MACEPCI_ERROR_SIG_TABORT = common local_unnamed_addr global i32 0, align 4
@.str.8 = private unnamed_addr constant [43 x i8] c"MACEPCI: Signaled target abort (clearing)\0A\00", align 1
@MACEPCI_ERROR_INTERRUPT_TEST = common local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [46 x i8] c"MACEPCI: Interrupt test triggered (clearing)\0A\00", align 1
@IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @macepci_error], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @macepci_error(i32 %0, ptr nocapture readnone %1) #0 {
%3 = load ptr, ptr @mace, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !10
%5 = getelementptr inbounds i8, ptr %3, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !14
%7 = load i32, ptr @MACEPCI_ERROR_MEMORY_ADDR, align 4, !tbaa !15
%8 = and i32 %7, %4
%9 = icmp eq i32 %8, 0
%10 = load i32, ptr @MACEPCI_ERROR_CONFIG_ADDR, align 4
%11 = and i32 %10, %4
%12 = icmp eq i32 %11, 0
%13 = select i1 %12, i32 88, i32 67
%14 = select i1 %9, i32 %13, i32 77
%15 = load i32, ptr @MACEPCI_ERROR_MASTER_ABORT, align 4, !tbaa !15
%16 = and i32 %15, %4
%17 = icmp eq i32 %16, 0
br i1 %17, label %23, label %18
18: ; preds = %2
%19 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str, i32 noundef %6, i32 noundef %14) #2
%20 = load i32, ptr @MACEPCI_ERROR_MASTER_ABORT, align 4, !tbaa !15
%21 = xor i32 %20, -1
%22 = and i32 %4, %21
br label %23
23: ; preds = %18, %2
%24 = phi i32 [ %22, %18 ], [ %4, %2 ]
%25 = load i32, ptr @MACEPCI_ERROR_TARGET_ABORT, align 4, !tbaa !15
%26 = and i32 %25, %24
%27 = icmp eq i32 %26, 0
br i1 %27, label %33, label %28
28: ; preds = %23
%29 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.1, i32 noundef %6, i32 noundef %14) #2
%30 = load i32, ptr @MACEPCI_ERROR_TARGET_ABORT, align 4, !tbaa !15
%31 = xor i32 %30, -1
%32 = and i32 %24, %31
br label %33
33: ; preds = %28, %23
%34 = phi i32 [ %32, %28 ], [ %24, %23 ]
%35 = load i32, ptr @MACEPCI_ERROR_DATA_PARITY_ERR, align 4, !tbaa !15
%36 = and i32 %35, %34
%37 = icmp eq i32 %36, 0
br i1 %37, label %43, label %38
38: ; preds = %33
%39 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.2, i32 noundef %6, i32 noundef %14) #2
%40 = load i32, ptr @MACEPCI_ERROR_DATA_PARITY_ERR, align 4, !tbaa !15
%41 = xor i32 %40, -1
%42 = and i32 %34, %41
br label %43
43: ; preds = %38, %33
%44 = phi i32 [ %42, %38 ], [ %34, %33 ]
%45 = load i32, ptr @MACEPCI_ERROR_RETRY_ERR, align 4, !tbaa !15
%46 = and i32 %45, %44
%47 = icmp eq i32 %46, 0
br i1 %47, label %53, label %48
48: ; preds = %43
%49 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.3, i32 noundef %6, i32 noundef %14) #2
%50 = load i32, ptr @MACEPCI_ERROR_RETRY_ERR, align 4, !tbaa !15
%51 = xor i32 %50, -1
%52 = and i32 %44, %51
br label %53
53: ; preds = %48, %43
%54 = phi i32 [ %52, %48 ], [ %44, %43 ]
%55 = load i32, ptr @MACEPCI_ERROR_ILLEGAL_CMD, align 4, !tbaa !15
%56 = and i32 %55, %54
%57 = icmp eq i32 %56, 0
br i1 %57, label %63, label %58
58: ; preds = %53
%59 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.4, i32 noundef %6, i32 noundef %14) #2
%60 = load i32, ptr @MACEPCI_ERROR_ILLEGAL_CMD, align 4, !tbaa !15
%61 = xor i32 %60, -1
%62 = and i32 %54, %61
br label %63
63: ; preds = %58, %53
%64 = phi i32 [ %62, %58 ], [ %54, %53 ]
%65 = load i32, ptr @MACEPCI_ERROR_SYSTEM_ERR, align 4, !tbaa !15
%66 = and i32 %65, %64
%67 = icmp eq i32 %66, 0
br i1 %67, label %73, label %68
68: ; preds = %63
%69 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.5, i32 noundef %6, i32 noundef %14) #2
%70 = load i32, ptr @MACEPCI_ERROR_SYSTEM_ERR, align 4, !tbaa !15
%71 = xor i32 %70, -1
%72 = and i32 %64, %71
br label %73
73: ; preds = %68, %63
%74 = phi i32 [ %72, %68 ], [ %64, %63 ]
%75 = load i32, ptr @MACEPCI_ERROR_PARITY_ERR, align 4, !tbaa !15
%76 = and i32 %75, %74
%77 = icmp eq i32 %76, 0
br i1 %77, label %83, label %78
78: ; preds = %73
%79 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.6, i32 noundef %6, i32 noundef %14) #2
%80 = load i32, ptr @MACEPCI_ERROR_PARITY_ERR, align 4, !tbaa !15
%81 = xor i32 %80, -1
%82 = and i32 %74, %81
br label %83
83: ; preds = %78, %73
%84 = phi i32 [ %82, %78 ], [ %74, %73 ]
%85 = load i32, ptr @MACEPCI_ERROR_OVERRUN, align 4, !tbaa !15
%86 = and i32 %85, %84
%87 = icmp eq i32 %86, 0
br i1 %87, label %93, label %88
88: ; preds = %83
%89 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.7, i32 noundef %6, i32 noundef %14) #2
%90 = load i32, ptr @MACEPCI_ERROR_OVERRUN, align 4, !tbaa !15
%91 = xor i32 %90, -1
%92 = and i32 %84, %91
br label %93
93: ; preds = %88, %83
%94 = phi i32 [ %92, %88 ], [ %84, %83 ]
%95 = load i32, ptr @MACEPCI_ERROR_SIG_TABORT, align 4, !tbaa !15
%96 = and i32 %95, %94
%97 = icmp eq i32 %96, 0
br i1 %97, label %103, label %98
98: ; preds = %93
%99 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.8) #2
%100 = load i32, ptr @MACEPCI_ERROR_SIG_TABORT, align 4, !tbaa !15
%101 = xor i32 %100, -1
%102 = and i32 %94, %101
br label %103
103: ; preds = %98, %93
%104 = phi i32 [ %102, %98 ], [ %94, %93 ]
%105 = load i32, ptr @MACEPCI_ERROR_INTERRUPT_TEST, align 4, !tbaa !15
%106 = and i32 %105, %104
%107 = icmp eq i32 %106, 0
br i1 %107, label %113, label %108
108: ; preds = %103
%109 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.9) #2
%110 = load i32, ptr @MACEPCI_ERROR_INTERRUPT_TEST, align 4, !tbaa !15
%111 = xor i32 %110, -1
%112 = and i32 %104, %111
br label %113
113: ; preds = %108, %103
%114 = phi i32 [ %112, %108 ], [ %104, %103 ]
%115 = load ptr, ptr @mace, align 8, !tbaa !6
store i32 %114, ptr %115, align 4, !tbaa !10
%116 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !15
ret i32 %116
}
declare i32 @printk(ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !13, i64 0, !13, i64 4}
!13 = !{!"int", !8, i64 0}
!14 = !{!11, !13, i64 4}
!15 = !{!13, !13, i64 0}
|
fastsocket_kernel_arch_mips_pci_extr_pci-ip32.c_macepci_error
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/gma500/extr_psb_intel_modes.c_psb_intel_ddc_get_modes.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/gma500/extr_psb_intel_modes.c_psb_intel_ddc_get_modes.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @psb_intel_ddc_get_modes(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @drm_get_edid(ptr noundef %0, ptr noundef %1) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @drm_connector_update_edid_property(ptr noundef %0, ptr noundef nonnull %3) #2
%7 = tail call i32 @drm_add_edid_modes(ptr noundef %0, ptr noundef nonnull %3) #2
%8 = tail call i32 @kfree(ptr noundef nonnull %3) #2
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ %7, %5 ], [ 0, %2 ]
ret i32 %10
}
declare ptr @drm_get_edid(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @drm_connector_update_edid_property(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @drm_add_edid_modes(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/gma500/extr_psb_intel_modes.c_psb_intel_ddc_get_modes.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/gma500/extr_psb_intel_modes.c_psb_intel_ddc_get_modes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @psb_intel_ddc_get_modes(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @drm_get_edid(ptr noundef %0, ptr noundef %1) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @drm_connector_update_edid_property(ptr noundef %0, ptr noundef nonnull %3) #2
%7 = tail call i32 @drm_add_edid_modes(ptr noundef %0, ptr noundef nonnull %3) #2
%8 = tail call i32 @kfree(ptr noundef nonnull %3) #2
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ %7, %5 ], [ 0, %2 ]
ret i32 %10
}
declare ptr @drm_get_edid(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @drm_connector_update_edid_property(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @drm_add_edid_modes(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_gpu_drm_gma500_extr_psb_intel_modes.c_psb_intel_ddc_get_modes
|
; ModuleID = 'AnghaBench/linux/drivers/staging/media/tegra-vde/extr_iommu.c_tegra_vde_iommu_unmap.c'
source_filename = "AnghaBench/linux/drivers/staging/media/tegra-vde/extr_iommu.c_tegra_vde_iommu_unmap.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.tegra_vde = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @tegra_vde_iommu_unmap(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i64 @iova_shift(ptr noundef %0) #2
%4 = tail call i64 @iova_size(ptr noundef %1) #2
%5 = shl i64 %4, %3
%6 = tail call i32 @iova_dma_addr(ptr noundef %0, ptr noundef %1) #2
%7 = getelementptr inbounds %struct.tegra_vde, ptr %0, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !5
%9 = tail call i32 @iommu_unmap(i32 noundef %8, i32 noundef %6, i64 noundef %5) #2
%10 = tail call i32 @__free_iova(ptr noundef %0, ptr noundef %1) #2
ret void
}
declare i64 @iova_shift(ptr noundef) local_unnamed_addr #1
declare i64 @iova_size(ptr noundef) local_unnamed_addr #1
declare i32 @iova_dma_addr(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @iommu_unmap(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @__free_iova(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"tegra_vde", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/media/tegra-vde/extr_iommu.c_tegra_vde_iommu_unmap.c'
source_filename = "AnghaBench/linux/drivers/staging/media/tegra-vde/extr_iommu.c_tegra_vde_iommu_unmap.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @tegra_vde_iommu_unmap(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i64 @iova_shift(ptr noundef %0) #2
%4 = tail call i64 @iova_size(ptr noundef %1) #2
%5 = shl i64 %4, %3
%6 = tail call i32 @iova_dma_addr(ptr noundef %0, ptr noundef %1) #2
%7 = getelementptr inbounds i8, ptr %0, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !6
%9 = tail call i32 @iommu_unmap(i32 noundef %8, i32 noundef %6, i64 noundef %5) #2
%10 = tail call i32 @__free_iova(ptr noundef %0, ptr noundef %1) #2
ret void
}
declare i64 @iova_shift(ptr noundef) local_unnamed_addr #1
declare i64 @iova_size(ptr noundef) local_unnamed_addr #1
declare i32 @iova_dma_addr(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @iommu_unmap(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @__free_iova(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"tegra_vde", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_staging_media_tegra-vde_extr_iommu.c_tegra_vde_iommu_unmap
|
; ModuleID = 'AnghaBench/linux/net/sched/extr_cls_flower.c_fl_mask_fits_tmplt.c'
source_filename = "AnghaBench/linux/net/sched/extr_cls_flower.c_fl_mask_fits_tmplt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @fl_mask_fits_tmplt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @fl_mask_fits_tmplt(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @fl_key_get_start(ptr noundef %1, ptr noundef %1) #2
%4 = icmp eq ptr %0, null
br i1 %4, label %24, label %5
5: ; preds = %2
%6 = tail call ptr @fl_key_get_start(ptr noundef nonnull %0, ptr noundef %1) #2
%7 = tail call i32 @fl_mask_range(ptr noundef %1) #2
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %24
9: ; preds = %5, %18
%10 = phi i32 [ %21, %18 ], [ 0, %5 ]
%11 = phi ptr [ %20, %18 ], [ %6, %5 ]
%12 = phi ptr [ %19, %18 ], [ %3, %5 ]
%13 = load i64, ptr %11, align 8, !tbaa !5
%14 = xor i64 %13, -1
%15 = load i64, ptr %12, align 8, !tbaa !5
%16 = and i64 %15, %14
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %24
18: ; preds = %9
%19 = getelementptr inbounds i64, ptr %12, i64 1
%20 = getelementptr inbounds i64, ptr %11, i64 1
%21 = add i32 %10, 8
%22 = tail call i32 @fl_mask_range(ptr noundef %1) #2
%23 = icmp slt i32 %21, %22
br i1 %23, label %9, label %24, !llvm.loop !9
24: ; preds = %9, %18, %5, %2
%25 = phi i32 [ 1, %2 ], [ 1, %5 ], [ 0, %9 ], [ 1, %18 ]
ret i32 %25
}
declare ptr @fl_key_get_start(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fl_mask_range(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/net/sched/extr_cls_flower.c_fl_mask_fits_tmplt.c'
source_filename = "AnghaBench/linux/net/sched/extr_cls_flower.c_fl_mask_fits_tmplt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @fl_mask_fits_tmplt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @fl_mask_fits_tmplt(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @fl_key_get_start(ptr noundef %1, ptr noundef %1) #2
%4 = icmp eq ptr %0, null
br i1 %4, label %24, label %5
5: ; preds = %2
%6 = tail call ptr @fl_key_get_start(ptr noundef nonnull %0, ptr noundef %1) #2
%7 = tail call i32 @fl_mask_range(ptr noundef %1) #2
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %24
9: ; preds = %5, %18
%10 = phi i32 [ %21, %18 ], [ 0, %5 ]
%11 = phi ptr [ %20, %18 ], [ %6, %5 ]
%12 = phi ptr [ %19, %18 ], [ %3, %5 ]
%13 = load i64, ptr %11, align 8, !tbaa !6
%14 = xor i64 %13, -1
%15 = load i64, ptr %12, align 8, !tbaa !6
%16 = and i64 %15, %14
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %24
18: ; preds = %9
%19 = getelementptr inbounds i8, ptr %12, i64 8
%20 = getelementptr inbounds i8, ptr %11, i64 8
%21 = add i32 %10, 8
%22 = tail call i32 @fl_mask_range(ptr noundef %1) #2
%23 = icmp slt i32 %21, %22
br i1 %23, label %9, label %24, !llvm.loop !10
24: ; preds = %9, %18, %5, %2
%25 = phi i32 [ 1, %2 ], [ 1, %5 ], [ 0, %9 ], [ 1, %18 ]
ret i32 %25
}
declare ptr @fl_key_get_start(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fl_mask_range(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
|
linux_net_sched_extr_cls_flower.c_fl_mask_fits_tmplt
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/sh/kernel/cpu/sh4/extr_sq.c_sq_sysfs_show.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/sh/kernel/cpu/sh4/extr_sq.c_sq_sysfs_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sq_sysfs_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @sq_sysfs_show(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @to_sq_sysfs_attr(ptr noundef %1) #2
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = tail call i64 @likely(ptr noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %3
%9 = load ptr, ptr %4, align 8, !tbaa !5
%10 = tail call i32 %9(ptr noundef %2) #2
br label %14
11: ; preds = %3
%12 = load i32, ptr @EIO, align 4, !tbaa !10
%13 = sub nsw i32 0, %12
br label %14
14: ; preds = %11, %8
%15 = phi i32 [ %10, %8 ], [ %13, %11 ]
ret i32 %15
}
declare ptr @to_sq_sysfs_attr(ptr noundef) local_unnamed_addr #1
declare i64 @likely(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sq_sysfs_attr", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/sh/kernel/cpu/sh4/extr_sq.c_sq_sysfs_show.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/sh/kernel/cpu/sh4/extr_sq.c_sq_sysfs_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sq_sysfs_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @sq_sysfs_show(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @to_sq_sysfs_attr(ptr noundef %1) #2
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = tail call i64 @likely(ptr noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %3
%9 = load ptr, ptr %4, align 8, !tbaa !6
%10 = tail call i32 %9(ptr noundef %2) #2
br label %14
11: ; preds = %3
%12 = load i32, ptr @EIO, align 4, !tbaa !11
%13 = sub nsw i32 0, %12
br label %14
14: ; preds = %11, %8
%15 = phi i32 [ %10, %8 ], [ %13, %11 ]
ret i32 %15
}
declare ptr @to_sq_sysfs_attr(ptr noundef) local_unnamed_addr #1
declare i64 @likely(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sq_sysfs_attr", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
|
fastsocket_kernel_arch_sh_kernel_cpu_sh4_extr_sq.c_sq_sysfs_show
|
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.