IR_x86
stringlengths
592
249k
IR_arm
stringlengths
558
250k
filename
stringlengths
17
191
; ModuleID = 'AnghaBench/freebsd/sys/dev/bnxt/extr_if_bnxt.c_bnxt_do_disable_intr.c' source_filename = "AnghaBench/freebsd/sys/dev/bnxt/extr_if_bnxt.c_bnxt_do_disable_intr.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @HWRM_NA_SIGNATURE = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @bnxt_do_disable_intr], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal void @bnxt_do_disable_intr(ptr noundef %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !5 %3 = load i64, ptr @HWRM_NA_SIGNATURE, align 8, !tbaa !11 %4 = icmp eq i64 %2, %3 br i1 %4, label %7, label %5 5: ; preds = %1 %6 = tail call i32 @BNXT_CP_DISABLE_DB(ptr noundef nonnull %0) #2 br label %7 7: ; preds = %5, %1 ret void } declare i32 @BNXT_CP_DISABLE_DB(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"bnxt_cp_ring", !7, i64 0} !7 = !{!"TYPE_2__", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0}
; ModuleID = 'AnghaBench/freebsd/sys/dev/bnxt/extr_if_bnxt.c_bnxt_do_disable_intr.c' source_filename = "AnghaBench/freebsd/sys/dev/bnxt/extr_if_bnxt.c_bnxt_do_disable_intr.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @HWRM_NA_SIGNATURE = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @bnxt_do_disable_intr], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal void @bnxt_do_disable_intr(ptr noundef %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !6 %3 = load i64, ptr @HWRM_NA_SIGNATURE, align 8, !tbaa !12 %4 = icmp eq i64 %2, %3 br i1 %4, label %7, label %5 5: ; preds = %1 %6 = tail call i32 @BNXT_CP_DISABLE_DB(ptr noundef nonnull %0) #2 br label %7 7: ; preds = %5, %1 ret void } declare i32 @BNXT_CP_DISABLE_DB(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"bnxt_cp_ring", !8, i64 0} !8 = !{!"TYPE_2__", !9, i64 0} !9 = !{!"long", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!9, !9, i64 0}
freebsd_sys_dev_bnxt_extr_if_bnxt.c_bnxt_do_disable_intr
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/atm/extr_cxacru.c_cxacru_unbind.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/atm/extr_cxacru.c_cxacru_unbind.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.cxacru_data = type { i64, i64, i64, i32, i32, i32, i32 } @.str = private unnamed_addr constant [22 x i8] c"cxacru_unbind entered\00", align 1 @.str.1 = private unnamed_addr constant [30 x i8] c"cxacru_unbind: NULL instance!\00", align 1 @CXPOLL_SHUTDOWN = dso_local local_unnamed_addr global i64 0, align 8 @CXPOLL_STOPPED = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @cxacru_unbind], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @cxacru_unbind(ptr nocapture noundef %0, ptr nocapture readnone %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = tail call i32 @dbg(ptr noundef nonnull @.str) #2 %5 = icmp eq ptr %3, null br i1 %5, label %6, label %8 6: ; preds = %2 %7 = tail call i32 @dbg(ptr noundef nonnull @.str.1) #2 br label %42 8: ; preds = %2 %9 = getelementptr inbounds %struct.cxacru_data, ptr %3, i64 0, i32 6 %10 = tail call i32 @mutex_lock(ptr noundef nonnull %9) #2 %11 = load i64, ptr %3, align 8, !tbaa !10 %12 = load i64, ptr @CXPOLL_SHUTDOWN, align 8, !tbaa !14 %13 = icmp eq i64 %11, %12 %14 = zext i1 %13 to i32 %15 = tail call i32 @BUG_ON(i32 noundef %14) #2 %16 = load i64, ptr %3, align 8, !tbaa !10 %17 = load i64, ptr @CXPOLL_STOPPED, align 8, !tbaa !14 %18 = icmp eq i64 %16, %17 %19 = load i64, ptr @CXPOLL_SHUTDOWN, align 8, !tbaa !14 store i64 %19, ptr %3, align 8, !tbaa !10 %20 = tail call i32 @mutex_unlock(ptr noundef nonnull %9) #2 br i1 %18, label %24, label %21 21: ; preds = %8 %22 = getelementptr inbounds %struct.cxacru_data, ptr %3, i64 0, i32 5 %23 = tail call i32 @cancel_rearming_delayed_work(ptr noundef nonnull %22) #2 br label %24 24: ; preds = %21, %8 %25 = getelementptr inbounds %struct.cxacru_data, ptr %3, i64 0, i32 4 %26 = load i32, ptr %25, align 4, !tbaa !15 %27 = tail call i32 @usb_kill_urb(i32 noundef %26) #2 %28 = getelementptr inbounds %struct.cxacru_data, ptr %3, i64 0, i32 3 %29 = load i32, ptr %28, align 8, !tbaa !16 %30 = tail call i32 @usb_kill_urb(i32 noundef %29) #2 %31 = load i32, ptr %25, align 4, !tbaa !15 %32 = tail call i32 @usb_free_urb(i32 noundef %31) #2 %33 = load i32, ptr %28, align 8, !tbaa !16 %34 = tail call i32 @usb_free_urb(i32 noundef %33) #2 %35 = getelementptr inbounds %struct.cxacru_data, ptr %3, i64 0, i32 2 %36 = load i64, ptr %35, align 8, !tbaa !17 %37 = tail call i32 @free_page(i64 noundef %36) #2 %38 = getelementptr inbounds %struct.cxacru_data, ptr %3, i64 0, i32 1 %39 = load i64, ptr %38, align 8, !tbaa !18 %40 = tail call i32 @free_page(i64 noundef %39) #2 %41 = tail call i32 @kfree(ptr noundef nonnull %3) #2 store ptr null, ptr %0, align 8, !tbaa !5 br label %42 42: ; preds = %24, %6 ret void } declare i32 @dbg(ptr noundef) local_unnamed_addr #1 declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1 declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1 declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1 declare i32 @cancel_rearming_delayed_work(ptr noundef) local_unnamed_addr #1 declare i32 @usb_kill_urb(i32 noundef) local_unnamed_addr #1 declare i32 @usb_free_urb(i32 noundef) local_unnamed_addr #1 declare i32 @free_page(i64 noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"usbatm_data", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"cxacru_data", !12, i64 0, !12, i64 8, !12, i64 16, !13, i64 24, !13, i64 28, !13, i64 32, !13, i64 36} !12 = !{!"long", !8, i64 0} !13 = !{!"int", !8, i64 0} !14 = !{!12, !12, i64 0} !15 = !{!11, !13, i64 28} !16 = !{!11, !13, i64 24} !17 = !{!11, !12, i64 16} !18 = !{!11, !12, i64 8}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/atm/extr_cxacru.c_cxacru_unbind.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/atm/extr_cxacru.c_cxacru_unbind.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [22 x i8] c"cxacru_unbind entered\00", align 1 @.str.1 = private unnamed_addr constant [30 x i8] c"cxacru_unbind: NULL instance!\00", align 1 @CXPOLL_SHUTDOWN = common local_unnamed_addr global i64 0, align 8 @CXPOLL_STOPPED = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @cxacru_unbind], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @cxacru_unbind(ptr nocapture noundef %0, ptr nocapture readnone %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = tail call i32 @dbg(ptr noundef nonnull @.str) #2 %5 = icmp eq ptr %3, null br i1 %5, label %6, label %8 6: ; preds = %2 %7 = tail call i32 @dbg(ptr noundef nonnull @.str.1) #2 br label %42 8: ; preds = %2 %9 = getelementptr inbounds i8, ptr %3, i64 36 %10 = tail call i32 @mutex_lock(ptr noundef nonnull %9) #2 %11 = load i64, ptr %3, align 8, !tbaa !11 %12 = load i64, ptr @CXPOLL_SHUTDOWN, align 8, !tbaa !15 %13 = icmp eq i64 %11, %12 %14 = zext i1 %13 to i32 %15 = tail call i32 @BUG_ON(i32 noundef %14) #2 %16 = load i64, ptr %3, align 8, !tbaa !11 %17 = load i64, ptr @CXPOLL_STOPPED, align 8, !tbaa !15 %18 = icmp eq i64 %16, %17 %19 = load i64, ptr @CXPOLL_SHUTDOWN, align 8, !tbaa !15 store i64 %19, ptr %3, align 8, !tbaa !11 %20 = tail call i32 @mutex_unlock(ptr noundef nonnull %9) #2 br i1 %18, label %24, label %21 21: ; preds = %8 %22 = getelementptr inbounds i8, ptr %3, i64 32 %23 = tail call i32 @cancel_rearming_delayed_work(ptr noundef nonnull %22) #2 br label %24 24: ; preds = %21, %8 %25 = getelementptr inbounds i8, ptr %3, i64 28 %26 = load i32, ptr %25, align 4, !tbaa !16 %27 = tail call i32 @usb_kill_urb(i32 noundef %26) #2 %28 = getelementptr inbounds i8, ptr %3, i64 24 %29 = load i32, ptr %28, align 8, !tbaa !17 %30 = tail call i32 @usb_kill_urb(i32 noundef %29) #2 %31 = load i32, ptr %25, align 4, !tbaa !16 %32 = tail call i32 @usb_free_urb(i32 noundef %31) #2 %33 = load i32, ptr %28, align 8, !tbaa !17 %34 = tail call i32 @usb_free_urb(i32 noundef %33) #2 %35 = getelementptr inbounds i8, ptr %3, i64 16 %36 = load i64, ptr %35, align 8, !tbaa !18 %37 = tail call i32 @free_page(i64 noundef %36) #2 %38 = getelementptr inbounds i8, ptr %3, i64 8 %39 = load i64, ptr %38, align 8, !tbaa !19 %40 = tail call i32 @free_page(i64 noundef %39) #2 %41 = tail call i32 @kfree(ptr noundef nonnull %3) #2 store ptr null, ptr %0, align 8, !tbaa !6 br label %42 42: ; preds = %24, %6 ret void } declare i32 @dbg(ptr noundef) local_unnamed_addr #1 declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1 declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1 declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1 declare i32 @cancel_rearming_delayed_work(ptr noundef) local_unnamed_addr #1 declare i32 @usb_kill_urb(i32 noundef) local_unnamed_addr #1 declare i32 @usb_free_urb(i32 noundef) local_unnamed_addr #1 declare i32 @free_page(i64 noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"usbatm_data", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !13, i64 0} !12 = !{!"cxacru_data", !13, i64 0, !13, i64 8, !13, i64 16, !14, i64 24, !14, i64 28, !14, i64 32, !14, i64 36} !13 = !{!"long", !9, i64 0} !14 = !{!"int", !9, i64 0} !15 = !{!13, !13, i64 0} !16 = !{!12, !14, i64 28} !17 = !{!12, !14, i64 24} !18 = !{!12, !13, i64 16} !19 = !{!12, !13, i64 8}
fastsocket_kernel_drivers_usb_atm_extr_cxacru.c_cxacru_unbind
; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_cs42l52.c_cs42l52_get_clk.c' source_filename = "AnghaBench/linux/sound/soc/codecs/extr_cs42l52.c_cs42l52_get_clk.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i32, i64 } @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @clk_map_table = dso_local local_unnamed_addr global ptr null, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @cs42l52_get_clk], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @cs42l52_get_clk(i32 noundef %0, i32 noundef %1) #0 { %3 = load i32, ptr @EINVAL, align 4, !tbaa !5 %4 = sub nsw i32 0, %3 %5 = load ptr, ptr @clk_map_table, align 8, !tbaa !9 %6 = tail call i32 @ARRAY_SIZE(ptr noundef %5) #2 %7 = icmp sgt i32 %6, 0 br i1 %7, label %8, label %38 8: ; preds = %2 %9 = sext i32 %0 to i64 br label %10 10: ; preds = %8, %30 %11 = phi i64 [ 0, %8 ], [ %34, %30 ] %12 = phi i64 [ 0, %8 ], [ %33, %30 ] %13 = phi i32 [ %4, %8 ], [ %32, %30 ] %14 = load ptr, ptr @clk_map_table, align 8, !tbaa !9 %15 = getelementptr inbounds %struct.TYPE_3__, ptr %14, i64 %11 %16 = load i32, ptr %15, align 8, !tbaa !11 %17 = icmp eq i32 %16, %1 br i1 %17, label %18, label %30 18: ; preds = %10 %19 = getelementptr inbounds %struct.TYPE_3__, ptr %14, i64 %11, i32 1 %20 = load i64, ptr %19, align 8, !tbaa !14 %21 = sub nsw i64 %9, %20 %22 = tail call i64 @abs(i64 noundef %21) #2 %23 = sub nsw i64 %9, %12 %24 = tail call i64 @abs(i64 noundef %23) #2 %25 = icmp slt i64 %22, %24 %26 = trunc i64 %11 to i32 %27 = select i1 %25, i32 %26, i32 %13 %28 = select i1 %25, i64 %20, i64 %12 %29 = load ptr, ptr @clk_map_table, align 8, !tbaa !9 br label %30 30: ; preds = %18, %10 %31 = phi ptr [ %14, %10 ], [ %29, %18 ] %32 = phi i32 [ %13, %10 ], [ %27, %18 ] %33 = phi i64 [ %12, %10 ], [ %28, %18 ] %34 = add nuw nsw i64 %11, 1 %35 = tail call i32 @ARRAY_SIZE(ptr noundef %31) #2 %36 = sext i32 %35 to i64 %37 = icmp slt i64 %34, %36 br i1 %37, label %10, label %38, !llvm.loop !15 38: ; preds = %30, %2 %39 = phi i32 [ %4, %2 ], [ %32, %30 ] ret i32 %39 } declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1 declare i64 @abs(i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"any pointer", !7, i64 0} !11 = !{!12, !6, i64 0} !12 = !{!"TYPE_3__", !6, i64 0, !13, i64 8} !13 = !{!"long", !7, i64 0} !14 = !{!12, !13, i64 8} !15 = distinct !{!15, !16} !16 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_cs42l52.c_cs42l52_get_clk.c' source_filename = "AnghaBench/linux/sound/soc/codecs/extr_cs42l52.c_cs42l52_get_clk.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_3__ = type { i32, i64 } @EINVAL = common local_unnamed_addr global i32 0, align 4 @clk_map_table = common local_unnamed_addr global ptr null, align 8 @llvm.used = appending global [1 x ptr] [ptr @cs42l52_get_clk], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @cs42l52_get_clk(i32 noundef %0, i32 noundef %1) #0 { %3 = load i32, ptr @EINVAL, align 4, !tbaa !6 %4 = sub nsw i32 0, %3 %5 = load ptr, ptr @clk_map_table, align 8, !tbaa !10 %6 = tail call i32 @ARRAY_SIZE(ptr noundef %5) #2 %7 = icmp sgt i32 %6, 0 br i1 %7, label %8, label %38 8: ; preds = %2 %9 = sext i32 %0 to i64 br label %10 10: ; preds = %8, %30 %11 = phi i64 [ 0, %8 ], [ %34, %30 ] %12 = phi i64 [ 0, %8 ], [ %33, %30 ] %13 = phi i32 [ %4, %8 ], [ %32, %30 ] %14 = load ptr, ptr @clk_map_table, align 8, !tbaa !10 %15 = getelementptr inbounds %struct.TYPE_3__, ptr %14, i64 %11 %16 = load i32, ptr %15, align 8, !tbaa !12 %17 = icmp eq i32 %16, %1 br i1 %17, label %18, label %30 18: ; preds = %10 %19 = getelementptr inbounds i8, ptr %15, i64 8 %20 = load i64, ptr %19, align 8, !tbaa !15 %21 = sub nsw i64 %9, %20 %22 = tail call i64 @abs(i64 noundef %21) #2 %23 = sub nsw i64 %9, %12 %24 = tail call i64 @abs(i64 noundef %23) #2 %25 = icmp slt i64 %22, %24 %26 = trunc nuw nsw i64 %11 to i32 %27 = select i1 %25, i32 %26, i32 %13 %28 = select i1 %25, i64 %20, i64 %12 %29 = load ptr, ptr @clk_map_table, align 8, !tbaa !10 br label %30 30: ; preds = %18, %10 %31 = phi ptr [ %14, %10 ], [ %29, %18 ] %32 = phi i32 [ %13, %10 ], [ %27, %18 ] %33 = phi i64 [ %12, %10 ], [ %28, %18 ] %34 = add nuw nsw i64 %11, 1 %35 = tail call i32 @ARRAY_SIZE(ptr noundef %31) #2 %36 = sext i32 %35 to i64 %37 = icmp slt i64 %34, %36 br i1 %37, label %10, label %38, !llvm.loop !16 38: ; preds = %30, %2 %39 = phi i32 [ %4, %2 ], [ %32, %30 ] ret i32 %39 } declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1 declare i64 @abs(i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!13, !7, i64 0} !13 = !{!"TYPE_3__", !7, i64 0, !14, i64 8} !14 = !{!"long", !8, i64 0} !15 = !{!13, !14, i64 8} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"}
linux_sound_soc_codecs_extr_cs42l52.c_cs42l52_get_clk
; ModuleID = 'AnghaBench/redis/src/extr_hyperloglog.c_pfaddCommand.c' source_filename = "AnghaBench/redis/src/extr_hyperloglog.c_pfaddCommand.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_30__ = type { i32 } %struct.TYPE_29__ = type { i32, i32 } %struct.TYPE_26__ = type { i32, ptr, ptr } @C_OK = dso_local local_unnamed_addr global i64 0, align 8 @invalid_hll_err = dso_local local_unnamed_addr global i32 0, align 4 @NOTIFY_STRING = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [6 x i8] c"pfadd\00", align 1 @server = dso_local local_unnamed_addr global %struct.TYPE_30__ zeroinitializer, align 4 @shared = dso_local local_unnamed_addr global %struct.TYPE_29__ zeroinitializer, align 4 ; Function Attrs: nounwind uwtable define dso_local void @pfaddCommand(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds %struct.TYPE_26__, ptr %0, i64 0, i32 1 %3 = load ptr, ptr %2, align 8, !tbaa !5 %4 = getelementptr inbounds %struct.TYPE_26__, ptr %0, i64 0, i32 2 %5 = load ptr, ptr %4, align 8, !tbaa !11 %6 = getelementptr inbounds ptr, ptr %5, i64 1 %7 = load ptr, ptr %6, align 8, !tbaa !12 %8 = tail call ptr @lookupKeyWrite(ptr noundef %3, ptr noundef %7) #2 %9 = icmp eq ptr %8, null br i1 %9, label %10, label %17 10: ; preds = %1 %11 = tail call ptr (...) @createHLLObject() #2 %12 = load ptr, ptr %2, align 8, !tbaa !5 %13 = load ptr, ptr %4, align 8, !tbaa !11 %14 = getelementptr inbounds ptr, ptr %13, i64 1 %15 = load ptr, ptr %14, align 8, !tbaa !12 %16 = tail call i32 @dbAdd(ptr noundef %12, ptr noundef %15, ptr noundef %11) #2 br label %27 17: ; preds = %1 %18 = tail call i64 @isHLLObjectOrReply(ptr noundef nonnull %0, ptr noundef nonnull %8) #2 %19 = load i64, ptr @C_OK, align 8, !tbaa !13 %20 = icmp eq i64 %18, %19 br i1 %20, label %21, label %79 21: ; preds = %17 %22 = load ptr, ptr %2, align 8, !tbaa !5 %23 = load ptr, ptr %4, align 8, !tbaa !11 %24 = getelementptr inbounds ptr, ptr %23, i64 1 %25 = load ptr, ptr %24, align 8, !tbaa !12 %26 = tail call ptr @dbUnshareStringValue(ptr noundef %22, ptr noundef %25, ptr noundef nonnull %8) #2 br label %27 27: ; preds = %21, %10 %28 = phi i32 [ 1, %10 ], [ 0, %21 ] %29 = phi ptr [ %11, %10 ], [ %26, %21 ] %30 = load i32, ptr %0, align 8, !tbaa !15 %31 = icmp sgt i32 %30, 2 br i1 %31, label %32, label %54 32: ; preds = %27, %48 %33 = phi i64 [ %50, %48 ], [ 2, %27 ] %34 = phi i32 [ %49, %48 ], [ %28, %27 ] %35 = load ptr, ptr %4, align 8, !tbaa !11 %36 = getelementptr inbounds ptr, ptr %35, i64 %33 %37 = load ptr, ptr %36, align 8, !tbaa !12 %38 = load i64, ptr %37, align 8, !tbaa !16 %39 = inttoptr i64 %38 to ptr %40 = tail call i32 @sdslen(i64 noundef %38) #2 %41 = tail call i32 @hllAdd(ptr noundef %29, ptr noundef %39, i32 noundef %40) #2 switch i32 %41, label %48 [ i32 1, label %42 i32 -1, label %44 ] 42: ; preds = %32 %43 = add nsw i32 %34, 1 br label %48 44: ; preds = %32 %45 = load i32, ptr @invalid_hll_err, align 4, !tbaa !18 %46 = tail call i32 @sdsnew(i32 noundef %45) #2 %47 = tail call i32 @addReplySds(ptr noundef nonnull %0, i32 noundef %46) #2 br label %79 48: ; preds = %32, %42 %49 = phi i32 [ %43, %42 ], [ %34, %32 ] %50 = add nuw nsw i64 %33, 1 %51 = load i32, ptr %0, align 8, !tbaa !15 %52 = sext i32 %51 to i64 %53 = icmp slt i64 %50, %52 br i1 %53, label %32, label %54, !llvm.loop !19 54: ; preds = %48, %27 %55 = phi i32 [ %28, %27 ], [ %49, %48 ] %56 = icmp eq i32 %55, 0 br i1 %56, label %74, label %57 57: ; preds = %54 %58 = load ptr, ptr %29, align 8, !tbaa !21 %59 = load ptr, ptr %2, align 8, !tbaa !5 %60 = load ptr, ptr %4, align 8, !tbaa !11 %61 = getelementptr inbounds ptr, ptr %60, i64 1 %62 = load ptr, ptr %61, align 8, !tbaa !12 %63 = tail call i32 @signalModifiedKey(ptr noundef %59, ptr noundef %62) #2 %64 = load i32, ptr @NOTIFY_STRING, align 4, !tbaa !18 %65 = load ptr, ptr %4, align 8, !tbaa !11 %66 = getelementptr inbounds ptr, ptr %65, i64 1 %67 = load ptr, ptr %66, align 8, !tbaa !12 %68 = load ptr, ptr %2, align 8, !tbaa !5 %69 = load i32, ptr %68, align 4, !tbaa !23 %70 = tail call i32 @notifyKeyspaceEvent(i32 noundef %64, ptr noundef nonnull @.str, ptr noundef %67, i32 noundef %69) #2 %71 = load i32, ptr @server, align 4, !tbaa !25 %72 = add nsw i32 %71, 1 store i32 %72, ptr @server, align 4, !tbaa !25 %73 = tail call i32 @HLL_INVALIDATE_CACHE(ptr noundef %58) #2 br label %74 74: ; preds = %57, %54 %75 = load i32, ptr getelementptr inbounds (%struct.TYPE_29__, ptr @shared, i64 0, i32 1), align 4 %76 = load i32, ptr @shared, align 4 %77 = select i1 %56, i32 %76, i32 %75 %78 = tail call i32 @addReply(ptr noundef nonnull %0, i32 noundef %77) #2 br label %79 79: ; preds = %44, %17, %74 ret void } declare ptr @lookupKeyWrite(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @createHLLObject(...) local_unnamed_addr #1 declare i32 @dbAdd(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @isHLLObjectOrReply(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @dbUnshareStringValue(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @hllAdd(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdslen(i64 noundef) local_unnamed_addr #1 declare i32 @addReplySds(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdsnew(i32 noundef) local_unnamed_addr #1 declare i32 @signalModifiedKey(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @notifyKeyspaceEvent(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @HLL_INVALIDATE_CACHE(ptr noundef) local_unnamed_addr #1 declare i32 @addReply(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"TYPE_26__", !7, i64 0, !10, i64 8, !10, i64 16} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !10, i64 16} !12 = !{!10, !10, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"long", !8, i64 0} !15 = !{!6, !7, i64 0} !16 = !{!17, !14, i64 0} !17 = !{!"TYPE_28__", !14, i64 0} !18 = !{!7, !7, i64 0} !19 = distinct !{!19, !20} !20 = !{!"llvm.loop.mustprogress"} !21 = !{!22, !10, i64 0} !22 = !{!"TYPE_25__", !10, i64 0} !23 = !{!24, !7, i64 0} !24 = !{!"TYPE_27__", !7, i64 0} !25 = !{!26, !7, i64 0} !26 = !{!"TYPE_30__", !7, i64 0}
; ModuleID = 'AnghaBench/redis/src/extr_hyperloglog.c_pfaddCommand.c' source_filename = "AnghaBench/redis/src/extr_hyperloglog.c_pfaddCommand.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_30__ = type { i32 } %struct.TYPE_29__ = type { i32, i32 } @C_OK = common local_unnamed_addr global i64 0, align 8 @invalid_hll_err = common local_unnamed_addr global i32 0, align 4 @NOTIFY_STRING = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [6 x i8] c"pfadd\00", align 1 @server = common local_unnamed_addr global %struct.TYPE_30__ zeroinitializer, align 4 @shared = common local_unnamed_addr global %struct.TYPE_29__ zeroinitializer, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @pfaddCommand(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds i8, ptr %0, i64 8 %3 = load ptr, ptr %2, align 8, !tbaa !6 %4 = getelementptr inbounds i8, ptr %0, i64 16 %5 = load ptr, ptr %4, align 8, !tbaa !12 %6 = getelementptr inbounds i8, ptr %5, i64 8 %7 = load ptr, ptr %6, align 8, !tbaa !13 %8 = tail call ptr @lookupKeyWrite(ptr noundef %3, ptr noundef %7) #2 %9 = icmp eq ptr %8, null br i1 %9, label %10, label %17 10: ; preds = %1 %11 = tail call ptr @createHLLObject() #2 %12 = load ptr, ptr %2, align 8, !tbaa !6 %13 = load ptr, ptr %4, align 8, !tbaa !12 %14 = getelementptr inbounds i8, ptr %13, i64 8 %15 = load ptr, ptr %14, align 8, !tbaa !13 %16 = tail call i32 @dbAdd(ptr noundef %12, ptr noundef %15, ptr noundef %11) #2 br label %27 17: ; preds = %1 %18 = tail call i64 @isHLLObjectOrReply(ptr noundef nonnull %0, ptr noundef nonnull %8) #2 %19 = load i64, ptr @C_OK, align 8, !tbaa !14 %20 = icmp eq i64 %18, %19 br i1 %20, label %21, label %79 21: ; preds = %17 %22 = load ptr, ptr %2, align 8, !tbaa !6 %23 = load ptr, ptr %4, align 8, !tbaa !12 %24 = getelementptr inbounds i8, ptr %23, i64 8 %25 = load ptr, ptr %24, align 8, !tbaa !13 %26 = tail call ptr @dbUnshareStringValue(ptr noundef %22, ptr noundef %25, ptr noundef nonnull %8) #2 br label %27 27: ; preds = %21, %10 %28 = phi i32 [ 1, %10 ], [ 0, %21 ] %29 = phi ptr [ %11, %10 ], [ %26, %21 ] %30 = load i32, ptr %0, align 8, !tbaa !16 %31 = icmp sgt i32 %30, 2 br i1 %31, label %32, label %54 32: ; preds = %27, %48 %33 = phi i64 [ %50, %48 ], [ 2, %27 ] %34 = phi i32 [ %49, %48 ], [ %28, %27 ] %35 = load ptr, ptr %4, align 8, !tbaa !12 %36 = getelementptr inbounds ptr, ptr %35, i64 %33 %37 = load ptr, ptr %36, align 8, !tbaa !13 %38 = load i64, ptr %37, align 8, !tbaa !17 %39 = inttoptr i64 %38 to ptr %40 = tail call i32 @sdslen(i64 noundef %38) #2 %41 = tail call i32 @hllAdd(ptr noundef %29, ptr noundef %39, i32 noundef %40) #2 switch i32 %41, label %48 [ i32 1, label %42 i32 -1, label %44 ] 42: ; preds = %32 %43 = add nsw i32 %34, 1 br label %48 44: ; preds = %32 %45 = load i32, ptr @invalid_hll_err, align 4, !tbaa !19 %46 = tail call i32 @sdsnew(i32 noundef %45) #2 %47 = tail call i32 @addReplySds(ptr noundef nonnull %0, i32 noundef %46) #2 br label %79 48: ; preds = %32, %42 %49 = phi i32 [ %43, %42 ], [ %34, %32 ] %50 = add nuw nsw i64 %33, 1 %51 = load i32, ptr %0, align 8, !tbaa !16 %52 = sext i32 %51 to i64 %53 = icmp slt i64 %50, %52 br i1 %53, label %32, label %54, !llvm.loop !20 54: ; preds = %48, %27 %55 = phi i32 [ %28, %27 ], [ %49, %48 ] %56 = icmp eq i32 %55, 0 br i1 %56, label %74, label %57 57: ; preds = %54 %58 = load ptr, ptr %29, align 8, !tbaa !22 %59 = load ptr, ptr %2, align 8, !tbaa !6 %60 = load ptr, ptr %4, align 8, !tbaa !12 %61 = getelementptr inbounds i8, ptr %60, i64 8 %62 = load ptr, ptr %61, align 8, !tbaa !13 %63 = tail call i32 @signalModifiedKey(ptr noundef %59, ptr noundef %62) #2 %64 = load i32, ptr @NOTIFY_STRING, align 4, !tbaa !19 %65 = load ptr, ptr %4, align 8, !tbaa !12 %66 = getelementptr inbounds i8, ptr %65, i64 8 %67 = load ptr, ptr %66, align 8, !tbaa !13 %68 = load ptr, ptr %2, align 8, !tbaa !6 %69 = load i32, ptr %68, align 4, !tbaa !24 %70 = tail call i32 @notifyKeyspaceEvent(i32 noundef %64, ptr noundef nonnull @.str, ptr noundef %67, i32 noundef %69) #2 %71 = load i32, ptr @server, align 4, !tbaa !26 %72 = add nsw i32 %71, 1 store i32 %72, ptr @server, align 4, !tbaa !26 %73 = tail call i32 @HLL_INVALIDATE_CACHE(ptr noundef %58) #2 br label %74 74: ; preds = %57, %54 %75 = load i32, ptr getelementptr inbounds (i8, ptr @shared, i64 4), align 4 %76 = load i32, ptr @shared, align 4 %77 = select i1 %56, i32 %76, i32 %75 %78 = tail call i32 @addReply(ptr noundef nonnull %0, i32 noundef %77) #2 br label %79 79: ; preds = %44, %17, %74 ret void } declare ptr @lookupKeyWrite(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @createHLLObject(...) local_unnamed_addr #1 declare i32 @dbAdd(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @isHLLObjectOrReply(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @dbUnshareStringValue(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @hllAdd(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdslen(i64 noundef) local_unnamed_addr #1 declare i32 @addReplySds(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdsnew(i32 noundef) local_unnamed_addr #1 declare i32 @signalModifiedKey(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @notifyKeyspaceEvent(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @HLL_INVALIDATE_CACHE(ptr noundef) local_unnamed_addr #1 declare i32 @addReply(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"TYPE_26__", !8, i64 0, !11, i64 8, !11, i64 16} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !11, i64 16} !13 = !{!11, !11, i64 0} !14 = !{!15, !15, i64 0} !15 = !{!"long", !9, i64 0} !16 = !{!7, !8, i64 0} !17 = !{!18, !15, i64 0} !18 = !{!"TYPE_28__", !15, i64 0} !19 = !{!8, !8, i64 0} !20 = distinct !{!20, !21} !21 = !{!"llvm.loop.mustprogress"} !22 = !{!23, !11, i64 0} !23 = !{!"TYPE_25__", !11, i64 0} !24 = !{!25, !8, i64 0} !25 = !{!"TYPE_27__", !8, i64 0} !26 = !{!27, !8, i64 0} !27 = !{!"TYPE_30__", !8, i64 0}
redis_src_extr_hyperloglog.c_pfaddCommand
; ModuleID = 'AnghaBench/linux/fs/jfs/extr_jfs_incore.h_jfs_dirtable_inline.c' source_filename = "AnghaBench/linux/fs/jfs/extr_jfs_incore.h_jfs_dirtable_inline.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @MAX_INLINE_DIRTABLE_ENTRY = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @jfs_dirtable_inline], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal i32 @jfs_dirtable_inline(ptr noundef %0) #0 { %2 = tail call ptr @JFS_IP(ptr noundef %0) #2 %3 = load i64, ptr %2, align 8, !tbaa !5 %4 = load i64, ptr @MAX_INLINE_DIRTABLE_ENTRY, align 8, !tbaa !10 %5 = add nsw i64 %4, 1 %6 = icmp sle i64 %3, %5 %7 = zext i1 %6 to i32 ret i32 %7 } declare ptr @JFS_IP(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_2__", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/linux/fs/jfs/extr_jfs_incore.h_jfs_dirtable_inline.c' source_filename = "AnghaBench/linux/fs/jfs/extr_jfs_incore.h_jfs_dirtable_inline.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @MAX_INLINE_DIRTABLE_ENTRY = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @jfs_dirtable_inline], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @jfs_dirtable_inline(ptr noundef %0) #0 { %2 = tail call ptr @JFS_IP(ptr noundef %0) #2 %3 = load i64, ptr %2, align 8, !tbaa !6 %4 = load i64, ptr @MAX_INLINE_DIRTABLE_ENTRY, align 8, !tbaa !11 %5 = add nsw i64 %4, 1 %6 = icmp sle i64 %3, %5 %7 = zext i1 %6 to i32 ret i32 %7 } declare ptr @JFS_IP(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_2__", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0}
linux_fs_jfs_extr_jfs_incore.h_jfs_dirtable_inline
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_phy_n.c_b43_nphy_calc_rx_iq_comp.c' source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_phy_n.c_b43_nphy_calc_rx_iq_comp.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.nphy_iq_est = type { i32, i32, i32, i32, i32, i32 } %struct.b43_phy_n_iq_comp = type { i32, i32, i32, i32 } @llvm.compiler.used = appending global [1 x ptr] [ptr @b43_nphy_calc_rx_iq_comp], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @b43_nphy_calc_rx_iq_comp(ptr noundef %0, i32 noundef %1) #0 { %3 = alloca %struct.nphy_iq_est, align 4 %4 = alloca %struct.b43_phy_n_iq_comp, align 4 %5 = alloca %struct.b43_phy_n_iq_comp, align 4 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #6 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #6 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #6 call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %5, i8 0, i64 16, i1 false) %6 = icmp eq i32 %1, 0 br i1 %6, label %105, label %7 7: ; preds = %2 %8 = call i32 @b43_nphy_rx_iq_coeffs(ptr noundef %0, i32 noundef 0, ptr noundef nonnull %4) #6 %9 = call i32 @b43_nphy_rx_iq_coeffs(ptr noundef %0, i32 noundef 1, ptr noundef nonnull %5) #6 %10 = call i32 @b43_nphy_rx_iq_est(ptr noundef %0, ptr noundef nonnull %3, i32 noundef 16384, i32 noundef 32, i32 noundef 0) #6 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %5, ptr noundef nonnull align 4 dereferenceable(16) %4, i64 16, i1 false), !tbaa.struct !5 %11 = and i32 %1, 1 %12 = icmp eq i32 %11, 0 %13 = getelementptr inbounds %struct.nphy_iq_est, ptr %3, i64 0, i32 1 %14 = getelementptr inbounds %struct.nphy_iq_est, ptr %3, i64 0, i32 2 %15 = and i32 %1, 2 %16 = icmp eq i32 %15, 0 %17 = getelementptr inbounds %struct.nphy_iq_est, ptr %3, i64 0, i32 3 %18 = getelementptr inbounds %struct.nphy_iq_est, ptr %3, i64 0, i32 4 %19 = getelementptr inbounds %struct.nphy_iq_est, ptr %3, i64 0, i32 5 %20 = getelementptr inbounds %struct.b43_phy_n_iq_comp, ptr %5, i64 0, i32 1 %21 = getelementptr inbounds %struct.b43_phy_n_iq_comp, ptr %5, i64 0, i32 2 %22 = getelementptr inbounds %struct.b43_phy_n_iq_comp, ptr %5, i64 0, i32 3 br label %23 23: ; preds = %7, %101 %24 = phi i1 [ false, %7 ], [ true, %101 ] %25 = phi i1 [ true, %7 ], [ false, %101 ] %26 = or i1 %12, %24 br i1 %26, label %29, label %27 27: ; preds = %23 %28 = load i32, ptr %3, align 4, !tbaa !10 br label %33 29: ; preds = %23 %30 = or i1 %16, %25 br i1 %30, label %101, label %31 31: ; preds = %29 %32 = load i32, ptr %17, align 4, !tbaa !12 br label %33 33: ; preds = %31, %27 %34 = phi ptr [ %18, %31 ], [ %13, %27 ] %35 = phi ptr [ %19, %31 ], [ %14, %27 ] %36 = phi i32 [ %32, %31 ], [ %28, %27 ] %37 = load i32, ptr %34, align 4, !tbaa !6 %38 = load i32, ptr %35, align 4, !tbaa !6 %39 = add nsw i32 %37, %38 %40 = icmp slt i32 %39, 2 br i1 %40, label %102, label %41 41: ; preds = %33 %42 = call i32 @llvm.abs.i32(i32 %36, i1 true) %43 = call i32 @fls(i32 noundef %42) #6 %44 = call i32 @fls(i32 noundef %38) #6 %45 = icmp sgt i32 %43, 19 br i1 %45, label %46, label %54 46: ; preds = %41 %47 = add nsw i32 %43, -20 %48 = sub nsw i32 30, %43 %49 = shl i32 %36, %48 %50 = add nsw i32 %43, -19 %51 = ashr i32 %37, %50 %52 = add nsw i32 %49, %51 %53 = ashr i32 %37, %47 br label %62 54: ; preds = %41 %55 = sub nsw i32 30, %43 %56 = shl i32 %36, %55 %57 = sub nsw i32 19, %43 %58 = shl i32 %37, %57 %59 = add nsw i32 %56, %58 %60 = sub nsw i32 20, %43 %61 = shl i32 %37, %60 br label %62 62: ; preds = %54, %46 %63 = phi i32 [ %53, %46 ], [ %61, %54 ] %64 = phi i32 [ %52, %46 ], [ %59, %54 ] %65 = icmp eq i32 %63, 0 br i1 %65, label %102, label %66 66: ; preds = %62 %67 = sdiv i32 %64, %63 %68 = sub nsw i32 0, %67 %69 = icmp sgt i32 %44, 10 %70 = add nsw i32 %44, -11 %71 = ashr i32 %37, %70 %72 = sub nsw i32 11, %44 %73 = shl i32 %37, %72 %74 = select i1 %69, i32 %71, i32 %73 %75 = icmp eq i32 %74, 0 br i1 %75, label %102, label %76 76: ; preds = %66 %77 = sub nsw i32 31, %44 %78 = shl i32 %38, %77 %79 = sdiv i32 %78, %74 %80 = mul nsw i32 %67, %67 %81 = sub nsw i32 %79, %80 %82 = call i32 @int_sqrt(i32 noundef %81) #6 br i1 %26, label %90, label %83 83: ; preds = %76 %84 = load i32, ptr %0, align 4, !tbaa !13 %85 = icmp sgt i32 %84, 2 %86 = select i1 %85, i32 %68, i32 %82 %87 = select i1 %85, i32 %82, i32 %68 %88 = and i32 %86, 1023 store i32 %88, ptr %5, align 4, !tbaa !16 %89 = and i32 %87, 1023 store i32 %89, ptr %20, align 4, !tbaa !18 br label %101 90: ; preds = %76 %91 = or i1 %16, %25 br i1 %91, label %101, label %92 92: ; preds = %90 %93 = load i32, ptr %0, align 4, !tbaa !13 %94 = icmp sgt i32 %93, 2 br i1 %94, label %95, label %98 95: ; preds = %92 %96 = and i32 %68, 1023 store i32 %96, ptr %21, align 4, !tbaa !19 %97 = and i32 %82, 1023 store i32 %97, ptr %22, align 4, !tbaa !20 br label %103 98: ; preds = %92 %99 = and i32 %82, 1023 store i32 %99, ptr %21, align 4, !tbaa !19 %100 = and i32 %68, 1023 store i32 %100, ptr %22, align 4, !tbaa !20 br label %103 101: ; preds = %83, %90, %29 br i1 %25, label %23, label %103, !llvm.loop !21 102: ; preds = %33, %62, %66 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %5, ptr noundef nonnull align 4 dereferenceable(16) %4, i64 16, i1 false), !tbaa.struct !5 br label %103 103: ; preds = %101, %98, %95, %102 %104 = call i32 @b43_nphy_rx_iq_coeffs(ptr noundef %0, i32 noundef 1, ptr noundef nonnull %5) #6 br label %105 105: ; preds = %2, %103 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #6 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #6 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #6 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 declare i32 @b43_nphy_rx_iq_coeffs(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3 declare i32 @b43_nphy_rx_iq_est(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4 declare i32 @fls(i32 noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.abs.i32(i32, i1 immarg) #5 declare i32 @int_sqrt(i32 noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) } attributes #5 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #6 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{i64 0, i64 4, !6, i64 4, i64 4, !6, i64 8, i64 4, !6, i64 12, i64 4, !6} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"nphy_iq_est", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20} !12 = !{!11, !7, i64 12} !13 = !{!14, !7, i64 0} !14 = !{!"b43_wldev", !15, i64 0} !15 = !{!"TYPE_2__", !7, i64 0} !16 = !{!17, !7, i64 0} !17 = !{!"b43_phy_n_iq_comp", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12} !18 = !{!17, !7, i64 4} !19 = !{!17, !7, i64 8} !20 = !{!17, !7, i64 12} !21 = distinct !{!21, !22} !22 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_phy_n.c_b43_nphy_calc_rx_iq_comp.c' source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_phy_n.c_b43_nphy_calc_rx_iq_comp.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.nphy_iq_est = type { i32, i32, i32, i32, i32, i32 } %struct.b43_phy_n_iq_comp = type { i32, i32, i32, i32 } @llvm.used = appending global [1 x ptr] [ptr @b43_nphy_calc_rx_iq_comp], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @b43_nphy_calc_rx_iq_comp(ptr noundef %0, i32 noundef %1) #0 { %3 = alloca %struct.nphy_iq_est, align 4 %4 = alloca %struct.b43_phy_n_iq_comp, align 4 %5 = alloca %struct.b43_phy_n_iq_comp, align 4 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #6 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #6 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #6 call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %5, i8 0, i64 16, i1 false) %6 = icmp eq i32 %1, 0 br i1 %6, label %105, label %7 7: ; preds = %2 %8 = call i32 @b43_nphy_rx_iq_coeffs(ptr noundef %0, i32 noundef 0, ptr noundef nonnull %4) #6 %9 = call i32 @b43_nphy_rx_iq_coeffs(ptr noundef %0, i32 noundef 1, ptr noundef nonnull %5) #6 %10 = call i32 @b43_nphy_rx_iq_est(ptr noundef %0, ptr noundef nonnull %3, i32 noundef 16384, i32 noundef 32, i32 noundef 0) #6 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %5, ptr noundef nonnull align 4 dereferenceable(16) %4, i64 16, i1 false), !tbaa.struct !6 %11 = and i32 %1, 1 %12 = icmp eq i32 %11, 0 %13 = getelementptr inbounds i8, ptr %3, i64 4 %14 = getelementptr inbounds i8, ptr %3, i64 8 %15 = and i32 %1, 2 %16 = icmp eq i32 %15, 0 %17 = getelementptr inbounds i8, ptr %3, i64 12 %18 = getelementptr inbounds i8, ptr %3, i64 16 %19 = getelementptr inbounds i8, ptr %3, i64 20 %20 = getelementptr inbounds i8, ptr %5, i64 4 %21 = getelementptr inbounds i8, ptr %5, i64 8 %22 = getelementptr inbounds i8, ptr %5, i64 12 br label %23 23: ; preds = %7, %101 %24 = phi i1 [ false, %7 ], [ true, %101 ] %25 = phi i1 [ true, %7 ], [ false, %101 ] %26 = or i1 %12, %24 br i1 %26, label %29, label %27 27: ; preds = %23 %28 = load i32, ptr %3, align 4, !tbaa !11 br label %33 29: ; preds = %23 %30 = or i1 %16, %25 br i1 %30, label %101, label %31 31: ; preds = %29 %32 = load i32, ptr %17, align 4, !tbaa !13 br label %33 33: ; preds = %31, %27 %34 = phi ptr [ %18, %31 ], [ %13, %27 ] %35 = phi ptr [ %19, %31 ], [ %14, %27 ] %36 = phi i32 [ %32, %31 ], [ %28, %27 ] %37 = load i32, ptr %34, align 4, !tbaa !7 %38 = load i32, ptr %35, align 4, !tbaa !7 %39 = add nsw i32 %37, %38 %40 = icmp slt i32 %39, 2 br i1 %40, label %102, label %41 41: ; preds = %33 %42 = call i32 @llvm.abs.i32(i32 %36, i1 true) %43 = call i32 @fls(i32 noundef %42) #6 %44 = call i32 @fls(i32 noundef %38) #6 %45 = icmp sgt i32 %43, 19 br i1 %45, label %46, label %54 46: ; preds = %41 %47 = add nsw i32 %43, -20 %48 = sub nsw i32 30, %43 %49 = shl i32 %36, %48 %50 = add nsw i32 %43, -19 %51 = ashr i32 %37, %50 %52 = add nsw i32 %49, %51 %53 = ashr i32 %37, %47 br label %62 54: ; preds = %41 %55 = sub nsw i32 30, %43 %56 = shl i32 %36, %55 %57 = sub nsw i32 19, %43 %58 = shl i32 %37, %57 %59 = add nsw i32 %56, %58 %60 = sub nsw i32 20, %43 %61 = shl i32 %37, %60 br label %62 62: ; preds = %54, %46 %63 = phi i32 [ %53, %46 ], [ %61, %54 ] %64 = phi i32 [ %52, %46 ], [ %59, %54 ] %65 = icmp eq i32 %63, 0 br i1 %65, label %102, label %66 66: ; preds = %62 %67 = sdiv i32 %64, %63 %68 = sub nsw i32 0, %67 %69 = icmp sgt i32 %44, 10 %70 = add nsw i32 %44, -11 %71 = ashr i32 %37, %70 %72 = sub nsw i32 11, %44 %73 = shl i32 %37, %72 %74 = select i1 %69, i32 %71, i32 %73 %75 = icmp eq i32 %74, 0 br i1 %75, label %102, label %76 76: ; preds = %66 %77 = sub nsw i32 31, %44 %78 = shl i32 %38, %77 %79 = sdiv i32 %78, %74 %80 = mul nsw i32 %67, %67 %81 = sub nsw i32 %79, %80 %82 = call i32 @int_sqrt(i32 noundef %81) #6 br i1 %26, label %90, label %83 83: ; preds = %76 %84 = load i32, ptr %0, align 4, !tbaa !14 %85 = icmp sgt i32 %84, 2 %86 = select i1 %85, i32 %68, i32 %82 %87 = select i1 %85, i32 %82, i32 %68 %88 = and i32 %86, 1023 store i32 %88, ptr %5, align 4, !tbaa !17 %89 = and i32 %87, 1023 store i32 %89, ptr %20, align 4, !tbaa !19 br label %101 90: ; preds = %76 %91 = or i1 %16, %25 br i1 %91, label %101, label %92 92: ; preds = %90 %93 = load i32, ptr %0, align 4, !tbaa !14 %94 = icmp sgt i32 %93, 2 br i1 %94, label %95, label %98 95: ; preds = %92 %96 = and i32 %68, 1023 store i32 %96, ptr %21, align 4, !tbaa !20 %97 = and i32 %82, 1023 store i32 %97, ptr %22, align 4, !tbaa !21 br label %103 98: ; preds = %92 %99 = and i32 %82, 1023 store i32 %99, ptr %21, align 4, !tbaa !20 %100 = and i32 %68, 1023 store i32 %100, ptr %22, align 4, !tbaa !21 br label %103 101: ; preds = %83, %90, %29 br i1 %25, label %23, label %103, !llvm.loop !22 102: ; preds = %33, %62, %66 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %5, ptr noundef nonnull align 4 dereferenceable(16) %4, i64 16, i1 false), !tbaa.struct !6 br label %103 103: ; preds = %101, %98, %95, %102 %104 = call i32 @b43_nphy_rx_iq_coeffs(ptr noundef %0, i32 noundef 1, ptr noundef nonnull %5) #6 br label %105 105: ; preds = %2, %103 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #6 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #6 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #6 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 declare i32 @b43_nphy_rx_iq_coeffs(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3 declare i32 @b43_nphy_rx_iq_est(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4 declare i32 @fls(i32 noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.abs.i32(i32, i1 immarg) #5 declare i32 @int_sqrt(i32 noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) } attributes #5 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #6 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{i64 0, i64 4, !7, i64 4, i64 4, !7, i64 8, i64 4, !7, i64 12, i64 4, !7} !7 = !{!8, !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 0} !12 = !{!"nphy_iq_est", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20} !13 = !{!12, !8, i64 12} !14 = !{!15, !8, i64 0} !15 = !{!"b43_wldev", !16, i64 0} !16 = !{!"TYPE_2__", !8, i64 0} !17 = !{!18, !8, i64 0} !18 = !{!"b43_phy_n_iq_comp", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12} !19 = !{!18, !8, i64 4} !20 = !{!18, !8, i64 8} !21 = !{!18, !8, i64 12} !22 = distinct !{!22, !23} !23 = !{!"llvm.loop.mustprogress"}
linux_drivers_net_wireless_broadcom_b43_extr_phy_n.c_b43_nphy_calc_rx_iq_comp
; ModuleID = 'AnghaBench/linux/drivers/input/serio/extr_hil_mlc.c_hilse_take_idd.c' source_filename = "AnghaBench/linux/drivers/input/serio/extr_hil_mlc.c_hilse_take_idd.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_5__ = type { ptr, i32, %struct.TYPE_4__ } %struct.TYPE_4__ = type { ptr } @HIL_PKT_CMD = dso_local local_unnamed_addr global i32 0, align 4 @HIL_PKT_ADDR_MASK = dso_local local_unnamed_addr global i32 0, align 4 @HIL_PKT_DATA_MASK = dso_local local_unnamed_addr global i32 0, align 4 @HIL_CMD_IDD = dso_local local_unnamed_addr global i32 0, align 4 @HIL_IDD_HEADER_RSC = dso_local local_unnamed_addr global i32 0, align 4 @HILSEN_NEXT = dso_local local_unnamed_addr global i32 0, align 4 @HIL_IDD_HEADER_EXD = dso_local local_unnamed_addr global i32 0, align 4 @HILSEN_DOWN = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @hilse_take_idd], section "llvm.metadata" ; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable define internal i32 @hilse_take_idd(ptr nocapture noundef %0, i32 %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = load i32, ptr %3, align 4, !tbaa !12 %5 = load i32, ptr @HIL_PKT_CMD, align 4, !tbaa !12 %6 = and i32 %5, %4 %7 = icmp eq i32 %6, 0 br i1 %7, label %8, label %129 8: ; preds = %2 %9 = load i32, ptr @HIL_PKT_ADDR_MASK, align 4, !tbaa !12 %10 = load i32, ptr @HIL_PKT_DATA_MASK, align 4 %11 = load i32, ptr @HIL_CMD_IDD, align 4 br label %12 12: ; preds = %42, %8 %13 = phi i64 [ 1, %8 ], [ %43, %42 ] %14 = getelementptr inbounds i32, ptr %3, i64 %13 %15 = load i32, ptr %14, align 4, !tbaa !12 %16 = xor i32 %15, %4 %17 = and i32 %16, %9 %18 = icmp eq i32 %17, 0 %19 = and i32 %15, %5 %20 = icmp ne i32 %19, 0 %21 = and i1 %20, %18 %22 = and i32 %10, %15 %23 = icmp eq i32 %22, %11 %24 = select i1 %21, i1 %23, i1 false br i1 %24, label %25, label %27 25: ; preds = %30, %12 %26 = phi i64 [ %13, %12 ], [ %28, %30 ] br label %44 27: ; preds = %12 %28 = add nuw nsw i64 %13, 1 %29 = icmp eq i64 %28, 16 br i1 %29, label %129, label %30, !llvm.loop !13 30: ; preds = %27 %31 = getelementptr inbounds i32, ptr %3, i64 %28 %32 = load i32, ptr %31, align 4, !tbaa !12 %33 = xor i32 %32, %4 %34 = and i32 %33, %9 %35 = icmp eq i32 %34, 0 %36 = and i32 %32, %5 %37 = icmp ne i32 %36, 0 %38 = and i1 %37, %35 %39 = and i32 %10, %32 %40 = icmp eq i32 %39, %11 %41 = select i1 %38, i1 %40, i1 false br i1 %41, label %25, label %42 42: ; preds = %30 %43 = add nuw nsw i64 %13, 2 br label %12 44: ; preds = %25, %115 %45 = phi i64 [ %116, %115 ], [ %26, %25 ] %46 = icmp eq i64 %45, 15 br i1 %46, label %47, label %115 47: ; preds = %44 %48 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2 %49 = load ptr, ptr %48, align 8, !tbaa !15 %50 = and i32 %10, %4 store i32 %50, ptr %49, align 4, !tbaa !12 %51 = getelementptr inbounds i32, ptr %3, i64 1 %52 = load i32, ptr %51, align 4, !tbaa !12 %53 = load i32, ptr @HIL_PKT_DATA_MASK, align 4, !tbaa !12 %54 = and i32 %53, %52 %55 = getelementptr inbounds i32, ptr %49, i64 1 store i32 %54, ptr %55, align 4, !tbaa !12 %56 = getelementptr inbounds i32, ptr %3, i64 2 %57 = load i32, ptr %56, align 4, !tbaa !12 %58 = and i32 %53, %57 %59 = getelementptr inbounds i32, ptr %49, i64 2 store i32 %58, ptr %59, align 4, !tbaa !12 %60 = getelementptr inbounds i32, ptr %3, i64 3 %61 = load i32, ptr %60, align 4, !tbaa !12 %62 = and i32 %53, %61 %63 = getelementptr inbounds i32, ptr %49, i64 3 store i32 %62, ptr %63, align 4, !tbaa !12 %64 = getelementptr inbounds i32, ptr %3, i64 4 %65 = load i32, ptr %64, align 4, !tbaa !12 %66 = and i32 %53, %65 %67 = getelementptr inbounds i32, ptr %49, i64 4 store i32 %66, ptr %67, align 4, !tbaa !12 %68 = getelementptr inbounds i32, ptr %3, i64 5 %69 = load i32, ptr %68, align 4, !tbaa !12 %70 = and i32 %53, %69 %71 = getelementptr inbounds i32, ptr %49, i64 5 store i32 %70, ptr %71, align 4, !tbaa !12 %72 = getelementptr inbounds i32, ptr %3, i64 6 %73 = load i32, ptr %72, align 4, !tbaa !12 %74 = and i32 %53, %73 %75 = getelementptr inbounds i32, ptr %49, i64 6 store i32 %74, ptr %75, align 4, !tbaa !12 %76 = getelementptr inbounds i32, ptr %3, i64 7 %77 = load i32, ptr %76, align 4, !tbaa !12 %78 = and i32 %53, %77 %79 = getelementptr inbounds i32, ptr %49, i64 7 store i32 %78, ptr %79, align 4, !tbaa !12 %80 = getelementptr inbounds i32, ptr %3, i64 8 %81 = load i32, ptr %80, align 4, !tbaa !12 %82 = and i32 %53, %81 %83 = getelementptr inbounds i32, ptr %49, i64 8 store i32 %82, ptr %83, align 4, !tbaa !12 %84 = getelementptr inbounds i32, ptr %3, i64 9 %85 = load i32, ptr %84, align 4, !tbaa !12 %86 = and i32 %53, %85 %87 = getelementptr inbounds i32, ptr %49, i64 9 store i32 %86, ptr %87, align 4, !tbaa !12 %88 = getelementptr inbounds i32, ptr %3, i64 10 %89 = load i32, ptr %88, align 4, !tbaa !12 %90 = and i32 %53, %89 %91 = getelementptr inbounds i32, ptr %49, i64 10 store i32 %90, ptr %91, align 4, !tbaa !12 %92 = getelementptr inbounds i32, ptr %3, i64 11 %93 = load i32, ptr %92, align 4, !tbaa !12 %94 = and i32 %53, %93 %95 = getelementptr inbounds i32, ptr %49, i64 11 store i32 %94, ptr %95, align 4, !tbaa !12 %96 = getelementptr inbounds i32, ptr %3, i64 12 %97 = load i32, ptr %96, align 4, !tbaa !12 %98 = and i32 %53, %97 %99 = getelementptr inbounds i32, ptr %49, i64 12 store i32 %98, ptr %99, align 4, !tbaa !12 %100 = getelementptr inbounds i32, ptr %3, i64 13 %101 = load i32, ptr %100, align 4, !tbaa !12 %102 = and i32 %53, %101 %103 = getelementptr inbounds i32, ptr %49, i64 13 store i32 %102, ptr %103, align 4, !tbaa !12 %104 = getelementptr inbounds i32, ptr %3, i64 14 %105 = load i32, ptr %104, align 4, !tbaa !12 %106 = and i32 %53, %105 %107 = getelementptr inbounds i32, ptr %49, i64 14 store i32 %106, ptr %107, align 4, !tbaa !12 %108 = getelementptr inbounds i32, ptr %3, i64 15 %109 = load i32, ptr %108, align 4, !tbaa !12 %110 = and i32 %53, %109 %111 = getelementptr inbounds i32, ptr %49, i64 15 store i32 %110, ptr %111, align 4, !tbaa !12 %112 = load i32, ptr @HIL_IDD_HEADER_RSC, align 4, !tbaa !12 %113 = and i32 %112, %54 %114 = icmp eq i32 %113, 0 br i1 %114, label %122, label %120 115: ; preds = %44 %116 = add nuw nsw i64 %45, 1 %117 = getelementptr inbounds i32, ptr %3, i64 %116 %118 = load i32, ptr %117, align 4, !tbaa !12 %119 = icmp eq i32 %118, 0 br i1 %119, label %44, label %129, !llvm.loop !16 120: ; preds = %47 %121 = load i32, ptr @HILSEN_NEXT, align 4, !tbaa !12 br label %133 122: ; preds = %47 %123 = load i32, ptr @HIL_IDD_HEADER_EXD, align 4, !tbaa !12 %124 = and i32 %123, %54 %125 = icmp eq i32 %124, 0 br i1 %125, label %133, label %126 126: ; preds = %122 %127 = load i32, ptr @HILSEN_DOWN, align 4, !tbaa !12 %128 = or i32 %127, 4 br label %133 129: ; preds = %27, %115, %2 %130 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1 %131 = load i32, ptr %130, align 8, !tbaa !17 %132 = add nsw i32 %131, -1 store i32 %132, ptr %130, align 8, !tbaa !17 br label %133 133: ; preds = %122, %129, %126, %120 %134 = phi i32 [ -1, %129 ], [ %121, %120 ], [ %128, %126 ], [ 0, %122 ] ret i32 %134 } attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_5__", !7, i64 0, !10, i64 8, !11, i64 16} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!"TYPE_4__", !7, i64 0} !12 = !{!10, !10, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"} !15 = !{!6, !7, i64 16} !16 = distinct !{!16, !14} !17 = !{!6, !10, i64 8}
; ModuleID = 'AnghaBench/linux/drivers/input/serio/extr_hil_mlc.c_hilse_take_idd.c' source_filename = "AnghaBench/linux/drivers/input/serio/extr_hil_mlc.c_hilse_take_idd.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @HIL_PKT_CMD = common local_unnamed_addr global i32 0, align 4 @HIL_PKT_ADDR_MASK = common local_unnamed_addr global i32 0, align 4 @HIL_PKT_DATA_MASK = common local_unnamed_addr global i32 0, align 4 @HIL_CMD_IDD = common local_unnamed_addr global i32 0, align 4 @HIL_IDD_HEADER_RSC = common local_unnamed_addr global i32 0, align 4 @HILSEN_NEXT = common local_unnamed_addr global i32 0, align 4 @HIL_IDD_HEADER_EXD = common local_unnamed_addr global i32 0, align 4 @HILSEN_DOWN = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @hilse_take_idd], section "llvm.metadata" ; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) define internal i32 @hilse_take_idd(ptr nocapture noundef %0, i32 %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = load i32, ptr %3, align 4, !tbaa !13 %5 = load i32, ptr @HIL_PKT_CMD, align 4, !tbaa !13 %6 = and i32 %5, %4 %7 = icmp eq i32 %6, 0 br i1 %7, label %8, label %113 8: ; preds = %2 %9 = load i32, ptr @HIL_PKT_ADDR_MASK, align 4, !tbaa !13 %10 = load i32, ptr @HIL_PKT_DATA_MASK, align 4 %11 = load i32, ptr @HIL_CMD_IDD, align 4 br label %12 12: ; preds = %8, %25 %13 = phi i64 [ 1, %8 ], [ %26, %25 ] %14 = getelementptr inbounds i32, ptr %3, i64 %13 %15 = load i32, ptr %14, align 4, !tbaa !13 %16 = xor i32 %15, %4 %17 = and i32 %16, %9 %18 = icmp eq i32 %17, 0 %19 = and i32 %15, %5 %20 = icmp ne i32 %19, 0 %21 = and i1 %20, %18 %22 = and i32 %10, %15 %23 = icmp eq i32 %22, %11 %24 = select i1 %21, i1 %23, i1 false br i1 %24, label %28, label %25 25: ; preds = %12 %26 = add nuw nsw i64 %13, 1 %27 = icmp eq i64 %26, 16 br i1 %27, label %113, label %12, !llvm.loop !14 28: ; preds = %12, %99 %29 = phi i64 [ %100, %99 ], [ %13, %12 ] %30 = icmp eq i64 %29, 15 br i1 %30, label %31, label %99 31: ; preds = %28 %32 = getelementptr inbounds i8, ptr %0, i64 16 %33 = load ptr, ptr %32, align 8, !tbaa !16 %34 = and i32 %10, %4 store i32 %34, ptr %33, align 4, !tbaa !13 %35 = getelementptr inbounds i8, ptr %3, i64 4 %36 = load i32, ptr %35, align 4, !tbaa !13 %37 = load i32, ptr @HIL_PKT_DATA_MASK, align 4, !tbaa !13 %38 = and i32 %37, %36 %39 = getelementptr inbounds i8, ptr %33, i64 4 store i32 %38, ptr %39, align 4, !tbaa !13 %40 = getelementptr inbounds i8, ptr %3, i64 8 %41 = load i32, ptr %40, align 4, !tbaa !13 %42 = and i32 %37, %41 %43 = getelementptr inbounds i8, ptr %33, i64 8 store i32 %42, ptr %43, align 4, !tbaa !13 %44 = getelementptr inbounds i8, ptr %3, i64 12 %45 = load i32, ptr %44, align 4, !tbaa !13 %46 = and i32 %37, %45 %47 = getelementptr inbounds i8, ptr %33, i64 12 store i32 %46, ptr %47, align 4, !tbaa !13 %48 = getelementptr inbounds i8, ptr %3, i64 16 %49 = load i32, ptr %48, align 4, !tbaa !13 %50 = and i32 %37, %49 %51 = getelementptr inbounds i8, ptr %33, i64 16 store i32 %50, ptr %51, align 4, !tbaa !13 %52 = getelementptr inbounds i8, ptr %3, i64 20 %53 = load i32, ptr %52, align 4, !tbaa !13 %54 = and i32 %37, %53 %55 = getelementptr inbounds i8, ptr %33, i64 20 store i32 %54, ptr %55, align 4, !tbaa !13 %56 = getelementptr inbounds i8, ptr %3, i64 24 %57 = load i32, ptr %56, align 4, !tbaa !13 %58 = and i32 %37, %57 %59 = getelementptr inbounds i8, ptr %33, i64 24 store i32 %58, ptr %59, align 4, !tbaa !13 %60 = getelementptr inbounds i8, ptr %3, i64 28 %61 = load i32, ptr %60, align 4, !tbaa !13 %62 = and i32 %37, %61 %63 = getelementptr inbounds i8, ptr %33, i64 28 store i32 %62, ptr %63, align 4, !tbaa !13 %64 = getelementptr inbounds i8, ptr %3, i64 32 %65 = load i32, ptr %64, align 4, !tbaa !13 %66 = and i32 %37, %65 %67 = getelementptr inbounds i8, ptr %33, i64 32 store i32 %66, ptr %67, align 4, !tbaa !13 %68 = getelementptr inbounds i8, ptr %3, i64 36 %69 = load i32, ptr %68, align 4, !tbaa !13 %70 = and i32 %37, %69 %71 = getelementptr inbounds i8, ptr %33, i64 36 store i32 %70, ptr %71, align 4, !tbaa !13 %72 = getelementptr inbounds i8, ptr %3, i64 40 %73 = load i32, ptr %72, align 4, !tbaa !13 %74 = and i32 %37, %73 %75 = getelementptr inbounds i8, ptr %33, i64 40 store i32 %74, ptr %75, align 4, !tbaa !13 %76 = getelementptr inbounds i8, ptr %3, i64 44 %77 = load i32, ptr %76, align 4, !tbaa !13 %78 = and i32 %37, %77 %79 = getelementptr inbounds i8, ptr %33, i64 44 store i32 %78, ptr %79, align 4, !tbaa !13 %80 = getelementptr inbounds i8, ptr %3, i64 48 %81 = load i32, ptr %80, align 4, !tbaa !13 %82 = and i32 %37, %81 %83 = getelementptr inbounds i8, ptr %33, i64 48 store i32 %82, ptr %83, align 4, !tbaa !13 %84 = getelementptr inbounds i8, ptr %3, i64 52 %85 = load i32, ptr %84, align 4, !tbaa !13 %86 = and i32 %37, %85 %87 = getelementptr inbounds i8, ptr %33, i64 52 store i32 %86, ptr %87, align 4, !tbaa !13 %88 = getelementptr inbounds i8, ptr %3, i64 56 %89 = load i32, ptr %88, align 4, !tbaa !13 %90 = and i32 %37, %89 %91 = getelementptr inbounds i8, ptr %33, i64 56 store i32 %90, ptr %91, align 4, !tbaa !13 %92 = getelementptr inbounds i8, ptr %3, i64 60 %93 = load i32, ptr %92, align 4, !tbaa !13 %94 = and i32 %37, %93 %95 = getelementptr inbounds i8, ptr %33, i64 60 store i32 %94, ptr %95, align 4, !tbaa !13 %96 = load i32, ptr @HIL_IDD_HEADER_RSC, align 4, !tbaa !13 %97 = and i32 %96, %38 %98 = icmp eq i32 %97, 0 br i1 %98, label %106, label %104 99: ; preds = %28 %100 = add nuw nsw i64 %29, 1 %101 = getelementptr inbounds i32, ptr %3, i64 %100 %102 = load i32, ptr %101, align 4, !tbaa !13 %103 = icmp eq i32 %102, 0 br i1 %103, label %28, label %113, !llvm.loop !17 104: ; preds = %31 %105 = load i32, ptr @HILSEN_NEXT, align 4, !tbaa !13 br label %117 106: ; preds = %31 %107 = load i32, ptr @HIL_IDD_HEADER_EXD, align 4, !tbaa !13 %108 = and i32 %107, %38 %109 = icmp eq i32 %108, 0 br i1 %109, label %117, label %110 110: ; preds = %106 %111 = load i32, ptr @HILSEN_DOWN, align 4, !tbaa !13 %112 = or i32 %111, 4 br label %117 113: ; preds = %25, %99, %2 %114 = getelementptr inbounds i8, ptr %0, i64 8 %115 = load i32, ptr %114, align 8, !tbaa !18 %116 = add nsw i32 %115, -1 store i32 %116, ptr %114, align 8, !tbaa !18 br label %117 117: ; preds = %106, %113, %110, %104 %118 = phi i32 [ -1, %113 ], [ %105, %104 ], [ %112, %110 ], [ 0, %106 ] ret i32 %118 } attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_5__", !8, i64 0, !11, i64 8, !12, i64 16} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!"TYPE_4__", !8, i64 0} !13 = !{!11, !11, i64 0} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"} !16 = !{!7, !8, i64 16} !17 = distinct !{!17, !15} !18 = !{!7, !11, i64 8}
linux_drivers_input_serio_extr_hil_mlc.c_hilse_take_idd
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_warpcore_set_20G_force_KR2.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_warpcore_set_20G_force_KR2.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @MDIO_REG_BANK_AER_BLOCK = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_AER_BLOCK_AER_REG = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_WC_DEVAD = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_XGXSBLK0_XGXSCONTROL = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_PMA_DEVAD = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_PMD_KR_CONTROL = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_AN_DEVAD = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_AN_REG_CTRL = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_CL73_USERB0_CTRL = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_SERDESDIGITAL_MISC1 = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_DIGITAL4_MISC3 = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL = dso_local local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @bnx2x_warpcore_set_20G_force_KR2], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @bnx2x_warpcore_set_20G_force_KR2(ptr noundef %0, ptr noundef %1) #0 { %3 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = load ptr, ptr %1, align 8, !tbaa !5 %5 = load i32, ptr @MDIO_REG_BANK_AER_BLOCK, align 4, !tbaa !10 %6 = load i32, ptr @MDIO_AER_BLOCK_AER_REG, align 4, !tbaa !10 %7 = tail call i32 @CL22_WR_OVER_CL45(ptr noundef %4, ptr noundef %0, i32 noundef %5, i32 noundef %6, i32 noundef 0) #3 %8 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !10 %9 = load i32, ptr @MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, align 4, !tbaa !10 %10 = tail call i32 @bnx2x_cl45_read_and_write(ptr noundef %4, ptr noundef %0, i32 noundef %8, i32 noundef %9, i32 noundef -8193) #3 %11 = tail call i32 @bnx2x_set_aer_mmd(ptr noundef nonnull %1, ptr noundef %0) #3 %12 = load i32, ptr @MDIO_PMA_DEVAD, align 4, !tbaa !10 %13 = load i32, ptr @MDIO_WC_REG_PMD_KR_CONTROL, align 4, !tbaa !10 %14 = tail call i32 @bnx2x_cl45_read_and_write(ptr noundef %4, ptr noundef %0, i32 noundef %12, i32 noundef %13, i32 noundef -3) #3 %15 = load i32, ptr @MDIO_AN_DEVAD, align 4, !tbaa !10 %16 = load i32, ptr @MDIO_AN_REG_CTRL, align 4, !tbaa !10 %17 = tail call i32 @bnx2x_cl45_write(ptr noundef %4, ptr noundef %0, i32 noundef %15, i32 noundef %16, i32 noundef 0) #3 %18 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !10 %19 = load i32, ptr @MDIO_WC_REG_CL73_USERB0_CTRL, align 4, !tbaa !10 %20 = call i32 @bnx2x_cl45_read(ptr noundef %4, ptr noundef %0, i32 noundef %18, i32 noundef %19, ptr noundef nonnull %3) #3 %21 = load i32, ptr %3, align 4, !tbaa !10 %22 = and i32 %21, -97 %23 = or disjoint i32 %22, 64 store i32 %23, ptr %3, align 4, !tbaa !10 %24 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !10 %25 = load i32, ptr @MDIO_WC_REG_CL73_USERB0_CTRL, align 4, !tbaa !10 %26 = call i32 @bnx2x_cl45_write(ptr noundef %4, ptr noundef %0, i32 noundef %24, i32 noundef %25, i32 noundef %23) #3 %27 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !10 %28 = load i32, ptr @MDIO_WC_REG_SERDESDIGITAL_MISC1, align 4, !tbaa !10 %29 = call i32 @bnx2x_cl45_read_or_write(ptr noundef %4, ptr noundef %0, i32 noundef %27, i32 noundef %28, i32 noundef 31) #3 %30 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !10 %31 = load i32, ptr @MDIO_WC_REG_DIGITAL4_MISC3, align 4, !tbaa !10 %32 = call i32 @bnx2x_cl45_read_or_write(ptr noundef %4, ptr noundef %0, i32 noundef %30, i32 noundef %31, i32 noundef 128) #3 %33 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !10 %34 = load i32, ptr @MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, align 4, !tbaa !10 %35 = call i32 @bnx2x_cl45_read(ptr noundef %4, ptr noundef %0, i32 noundef %33, i32 noundef %34, ptr noundef nonnull %3) #3 %36 = load i32, ptr %3, align 4, !tbaa !10 %37 = and i32 %36, -49153 %38 = or disjoint i32 %37, 32768 store i32 %38, ptr %3, align 4, !tbaa !10 %39 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !10 %40 = load i32, ptr @MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, align 4, !tbaa !10 %41 = call i32 @bnx2x_cl45_write(ptr noundef %4, ptr noundef %0, i32 noundef %39, i32 noundef %40, i32 noundef %38) #3 %42 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !10 %43 = load i32, ptr @MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP, align 4, !tbaa !10 %44 = call i32 @bnx2x_cl45_write(ptr noundef %4, ptr noundef %0, i32 noundef %42, i32 noundef %43, i32 noundef 33626) #3 %45 = load i32, ptr @MDIO_REG_BANK_AER_BLOCK, align 4, !tbaa !10 %46 = load i32, ptr @MDIO_AER_BLOCK_AER_REG, align 4, !tbaa !10 %47 = call i32 @CL22_WR_OVER_CL45(ptr noundef %4, ptr noundef %0, i32 noundef %45, i32 noundef %46, i32 noundef 0) #3 %48 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !10 %49 = load i32, ptr @MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, align 4, !tbaa !10 %50 = call i32 @bnx2x_cl45_read_or_write(ptr noundef %4, ptr noundef %0, i32 noundef %48, i32 noundef %49, i32 noundef 8192) #3 %51 = call i32 @bnx2x_set_aer_mmd(ptr noundef nonnull %1, ptr noundef %0) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @CL22_WR_OVER_CL45(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @bnx2x_cl45_read_and_write(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @bnx2x_set_aer_mmd(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @bnx2x_cl45_write(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @bnx2x_cl45_read(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @bnx2x_cl45_read_or_write(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"link_params", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_warpcore_set_20G_force_KR2.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_warpcore_set_20G_force_KR2.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @MDIO_REG_BANK_AER_BLOCK = common local_unnamed_addr global i32 0, align 4 @MDIO_AER_BLOCK_AER_REG = common local_unnamed_addr global i32 0, align 4 @MDIO_WC_DEVAD = common local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_XGXSBLK0_XGXSCONTROL = common local_unnamed_addr global i32 0, align 4 @MDIO_PMA_DEVAD = common local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_PMD_KR_CONTROL = common local_unnamed_addr global i32 0, align 4 @MDIO_AN_DEVAD = common local_unnamed_addr global i32 0, align 4 @MDIO_AN_REG_CTRL = common local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_CL73_USERB0_CTRL = common local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_SERDESDIGITAL_MISC1 = common local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_DIGITAL4_MISC3 = common local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL = common local_unnamed_addr global i32 0, align 4 @MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @bnx2x_warpcore_set_20G_force_KR2], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @bnx2x_warpcore_set_20G_force_KR2(ptr noundef %0, ptr noundef %1) #0 { %3 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = load ptr, ptr %1, align 8, !tbaa !6 %5 = load i32, ptr @MDIO_REG_BANK_AER_BLOCK, align 4, !tbaa !11 %6 = load i32, ptr @MDIO_AER_BLOCK_AER_REG, align 4, !tbaa !11 %7 = tail call i32 @CL22_WR_OVER_CL45(ptr noundef %4, ptr noundef %0, i32 noundef %5, i32 noundef %6, i32 noundef 0) #3 %8 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !11 %9 = load i32, ptr @MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, align 4, !tbaa !11 %10 = tail call i32 @bnx2x_cl45_read_and_write(ptr noundef %4, ptr noundef %0, i32 noundef %8, i32 noundef %9, i32 noundef -8193) #3 %11 = tail call i32 @bnx2x_set_aer_mmd(ptr noundef nonnull %1, ptr noundef %0) #3 %12 = load i32, ptr @MDIO_PMA_DEVAD, align 4, !tbaa !11 %13 = load i32, ptr @MDIO_WC_REG_PMD_KR_CONTROL, align 4, !tbaa !11 %14 = tail call i32 @bnx2x_cl45_read_and_write(ptr noundef %4, ptr noundef %0, i32 noundef %12, i32 noundef %13, i32 noundef -3) #3 %15 = load i32, ptr @MDIO_AN_DEVAD, align 4, !tbaa !11 %16 = load i32, ptr @MDIO_AN_REG_CTRL, align 4, !tbaa !11 %17 = tail call i32 @bnx2x_cl45_write(ptr noundef %4, ptr noundef %0, i32 noundef %15, i32 noundef %16, i32 noundef 0) #3 %18 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !11 %19 = load i32, ptr @MDIO_WC_REG_CL73_USERB0_CTRL, align 4, !tbaa !11 %20 = call i32 @bnx2x_cl45_read(ptr noundef %4, ptr noundef %0, i32 noundef %18, i32 noundef %19, ptr noundef nonnull %3) #3 %21 = load i32, ptr %3, align 4, !tbaa !11 %22 = and i32 %21, -97 %23 = or disjoint i32 %22, 64 store i32 %23, ptr %3, align 4, !tbaa !11 %24 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !11 %25 = load i32, ptr @MDIO_WC_REG_CL73_USERB0_CTRL, align 4, !tbaa !11 %26 = call i32 @bnx2x_cl45_write(ptr noundef %4, ptr noundef %0, i32 noundef %24, i32 noundef %25, i32 noundef %23) #3 %27 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !11 %28 = load i32, ptr @MDIO_WC_REG_SERDESDIGITAL_MISC1, align 4, !tbaa !11 %29 = call i32 @bnx2x_cl45_read_or_write(ptr noundef %4, ptr noundef %0, i32 noundef %27, i32 noundef %28, i32 noundef 31) #3 %30 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !11 %31 = load i32, ptr @MDIO_WC_REG_DIGITAL4_MISC3, align 4, !tbaa !11 %32 = call i32 @bnx2x_cl45_read_or_write(ptr noundef %4, ptr noundef %0, i32 noundef %30, i32 noundef %31, i32 noundef 128) #3 %33 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !11 %34 = load i32, ptr @MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, align 4, !tbaa !11 %35 = call i32 @bnx2x_cl45_read(ptr noundef %4, ptr noundef %0, i32 noundef %33, i32 noundef %34, ptr noundef nonnull %3) #3 %36 = load i32, ptr %3, align 4, !tbaa !11 %37 = and i32 %36, -49153 %38 = or disjoint i32 %37, 32768 store i32 %38, ptr %3, align 4, !tbaa !11 %39 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !11 %40 = load i32, ptr @MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, align 4, !tbaa !11 %41 = call i32 @bnx2x_cl45_write(ptr noundef %4, ptr noundef %0, i32 noundef %39, i32 noundef %40, i32 noundef %38) #3 %42 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !11 %43 = load i32, ptr @MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP, align 4, !tbaa !11 %44 = call i32 @bnx2x_cl45_write(ptr noundef %4, ptr noundef %0, i32 noundef %42, i32 noundef %43, i32 noundef 33626) #3 %45 = load i32, ptr @MDIO_REG_BANK_AER_BLOCK, align 4, !tbaa !11 %46 = load i32, ptr @MDIO_AER_BLOCK_AER_REG, align 4, !tbaa !11 %47 = call i32 @CL22_WR_OVER_CL45(ptr noundef %4, ptr noundef %0, i32 noundef %45, i32 noundef %46, i32 noundef 0) #3 %48 = load i32, ptr @MDIO_WC_DEVAD, align 4, !tbaa !11 %49 = load i32, ptr @MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, align 4, !tbaa !11 %50 = call i32 @bnx2x_cl45_read_or_write(ptr noundef %4, ptr noundef %0, i32 noundef %48, i32 noundef %49, i32 noundef 8192) #3 %51 = call i32 @bnx2x_set_aer_mmd(ptr noundef nonnull %1, ptr noundef %0) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @CL22_WR_OVER_CL45(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @bnx2x_cl45_read_and_write(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @bnx2x_set_aer_mmd(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @bnx2x_cl45_write(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @bnx2x_cl45_read(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @bnx2x_cl45_read_or_write(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"link_params", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"int", !9, i64 0}
linux_drivers_net_ethernet_broadcom_bnx2x_extr_bnx2x_link.c_bnx2x_warpcore_set_20G_force_KR2
; ModuleID = 'AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_exprCodeSubselect.c' source_filename = "AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_exprCodeSubselect.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @TK_SELECT = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @exprCodeSubselect], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @exprCodeSubselect(ptr noundef %0, ptr noundef %1) #0 { %3 = load i64, ptr %1, align 8, !tbaa !5 %4 = load i64, ptr @TK_SELECT, align 8, !tbaa !10 %5 = icmp eq i64 %3, %4 br i1 %5, label %6, label %8 6: ; preds = %2 %7 = tail call i32 @sqlite3CodeSubselect(ptr noundef %0, ptr noundef nonnull %1, i32 noundef 0, i32 noundef 0) #2 br label %8 8: ; preds = %6, %2 %9 = phi i32 [ %7, %6 ], [ 0, %2 ] ret i32 %9 } declare i32 @sqlite3CodeSubselect(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_4__", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_exprCodeSubselect.c' source_filename = "AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_exprCodeSubselect.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @TK_SELECT = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @exprCodeSubselect], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @exprCodeSubselect(ptr noundef %0, ptr noundef %1) #0 { %3 = load i64, ptr %1, align 8, !tbaa !6 %4 = load i64, ptr @TK_SELECT, align 8, !tbaa !11 %5 = icmp eq i64 %3, %4 br i1 %5, label %6, label %8 6: ; preds = %2 %7 = tail call i32 @sqlite3CodeSubselect(ptr noundef %0, ptr noundef nonnull %1, i32 noundef 0, i32 noundef 0) #2 br label %8 8: ; preds = %6, %2 %9 = phi i32 [ %7, %6 ], [ 0, %2 ] ret i32 %9 } declare i32 @sqlite3CodeSubselect(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0}
ccv_lib_3rdparty_sqlite3_extr_sqlite3.c_exprCodeSubselect
; ModuleID = 'AnghaBench/RetroArch/libretro-common/file/nbio/extr_nbio_linux.c_io_destroy.c' source_filename = "AnghaBench/RetroArch/libretro-common/file/nbio/extr_nbio_linux.c_io_destroy.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @__NR_io_destroy = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @io_destroy], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @io_destroy(i32 noundef %0) #0 { %2 = load i32, ptr @__NR_io_destroy, align 4, !tbaa !5 %3 = tail call i32 @syscall(i32 noundef %2, i32 noundef %0) #2 ret i32 %3 } declare i32 @syscall(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/RetroArch/libretro-common/file/nbio/extr_nbio_linux.c_io_destroy.c' source_filename = "AnghaBench/RetroArch/libretro-common/file/nbio/extr_nbio_linux.c_io_destroy.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @__NR_io_destroy = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @io_destroy], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @io_destroy(i32 noundef %0) #0 { %2 = load i32, ptr @__NR_io_destroy, align 4, !tbaa !6 %3 = tail call i32 @syscall(i32 noundef %2, i32 noundef %0) #2 ret i32 %3 } declare i32 @syscall(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
RetroArch_libretro-common_file_nbio_extr_nbio_linux.c_io_destroy
; ModuleID = 'AnghaBench/radare2/libr/util/extr_buf_sparse.c_buf_sparse_fini.c' source_filename = "AnghaBench/radare2/libr/util/extr_buf_sparse.c_buf_sparse_fini.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @buf_sparse_fini], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @buf_sparse_fini(ptr noundef %0) #0 { %2 = tail call ptr @get_priv_sparse(ptr noundef %0) #2 %3 = load i32, ptr %2, align 4, !tbaa !5 %4 = tail call i32 @r_list_free(i32 noundef %3) #2 %5 = load i32, ptr %0, align 4, !tbaa !10 %6 = tail call i32 @R_FREE(i32 noundef %5) #2 ret i32 1 } declare ptr @get_priv_sparse(ptr noundef) local_unnamed_addr #1 declare i32 @r_list_free(i32 noundef) local_unnamed_addr #1 declare i32 @R_FREE(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"buf_sparse_priv", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_4__", !7, i64 0}
; ModuleID = 'AnghaBench/radare2/libr/util/extr_buf_sparse.c_buf_sparse_fini.c' source_filename = "AnghaBench/radare2/libr/util/extr_buf_sparse.c_buf_sparse_fini.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @buf_sparse_fini], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef i32 @buf_sparse_fini(ptr noundef %0) #0 { %2 = tail call ptr @get_priv_sparse(ptr noundef %0) #2 %3 = load i32, ptr %2, align 4, !tbaa !6 %4 = tail call i32 @r_list_free(i32 noundef %3) #2 %5 = load i32, ptr %0, align 4, !tbaa !11 %6 = tail call i32 @R_FREE(i32 noundef %5) #2 ret i32 1 } declare ptr @get_priv_sparse(ptr noundef) local_unnamed_addr #1 declare i32 @r_list_free(i32 noundef) local_unnamed_addr #1 declare i32 @R_FREE(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"buf_sparse_priv", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 0} !12 = !{!"TYPE_4__", !8, i64 0}
radare2_libr_util_extr_buf_sparse.c_buf_sparse_fini
; ModuleID = 'AnghaBench/mongoose/examples/api_server/extr_sqlite3.c_dotlockClose.c' source_filename = "AnghaBench/mongoose/examples/api_server/extr_sqlite3.c_dotlockClose.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @SQLITE_OK = dso_local local_unnamed_addr global i32 0, align 4 @NO_LOCK = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @dotlockClose], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @dotlockClose(ptr noundef %0) #0 { %2 = load i32, ptr @SQLITE_OK, align 4, !tbaa !5 %3 = icmp eq ptr %0, null br i1 %3, label %10, label %4 4: ; preds = %1 %5 = load i32, ptr @NO_LOCK, align 4, !tbaa !5 %6 = tail call i32 @dotlockUnlock(ptr noundef nonnull %0, i32 noundef %5) #2 %7 = load i32, ptr %0, align 4, !tbaa !9 %8 = tail call i32 @sqlite3_free(i32 noundef %7) #2 %9 = tail call i32 @closeUnixFile(ptr noundef nonnull %0) #2 br label %10 10: ; preds = %4, %1 %11 = phi i32 [ %9, %4 ], [ %2, %1 ] ret i32 %11 } declare i32 @dotlockUnlock(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sqlite3_free(i32 noundef) local_unnamed_addr #1 declare i32 @closeUnixFile(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"TYPE_2__", !6, i64 0}
; ModuleID = 'AnghaBench/mongoose/examples/api_server/extr_sqlite3.c_dotlockClose.c' source_filename = "AnghaBench/mongoose/examples/api_server/extr_sqlite3.c_dotlockClose.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SQLITE_OK = common local_unnamed_addr global i32 0, align 4 @NO_LOCK = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @dotlockClose], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @dotlockClose(ptr noundef %0) #0 { %2 = load i32, ptr @SQLITE_OK, align 4, !tbaa !6 %3 = icmp eq ptr %0, null br i1 %3, label %10, label %4 4: ; preds = %1 %5 = load i32, ptr @NO_LOCK, align 4, !tbaa !6 %6 = tail call i32 @dotlockUnlock(ptr noundef nonnull %0, i32 noundef %5) #2 %7 = load i32, ptr %0, align 4, !tbaa !10 %8 = tail call i32 @sqlite3_free(i32 noundef %7) #2 %9 = tail call i32 @closeUnixFile(ptr noundef nonnull %0) #2 br label %10 10: ; preds = %4, %1 %11 = phi i32 [ %9, %4 ], [ %2, %1 ] ret i32 %11 } declare i32 @dotlockUnlock(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sqlite3_free(i32 noundef) local_unnamed_addr #1 declare i32 @closeUnixFile(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_2__", !7, i64 0}
mongoose_examples_api_server_extr_sqlite3.c_dotlockClose
; ModuleID = 'AnghaBench/libuv/src/win/extr_core.c_uv_loop_init.c' source_filename = "AnghaBench/libuv/src/win/extr_core.c_uv_loop_init.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_10__ = type { ptr, ptr, i32, %struct.TYPE_11__, i64, i64, i64, i64, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, %struct.TYPE_9__, i32, i32, i64 } %struct.TYPE_11__ = type { i32 } %struct.TYPE_9__ = type { i64 } @INVALID_HANDLE_VALUE = dso_local local_unnamed_addr global ptr null, align 8 @UV_ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @uv__work_done = dso_local local_unnamed_addr global i32 0, align 4 @UV_HANDLE_INTERNAL = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @uv_loop_init(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 (...) @uv__once_init() #3 %3 = load ptr, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !5 %4 = tail call ptr @CreateIoCompletionPort(ptr noundef %3, ptr noundef null, i32 noundef 0, i32 noundef 1) #3 store ptr %4, ptr %0, align 8, !tbaa !9 %5 = icmp eq ptr %4, null br i1 %5, label %6, label %9 6: ; preds = %1 %7 = tail call i32 (...) @GetLastError() #3 %8 = tail call i32 @uv_translate_sys_error(i32 noundef %7) #3 br label %54 9: ; preds = %1 %10 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 21 store i64 0, ptr %10, align 8, !tbaa !15 %11 = tail call i32 @uv_update_time(ptr noundef nonnull %0) #3 %12 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 20 %13 = tail call i32 @QUEUE_INIT(ptr noundef nonnull %12) #3 %14 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 19 %15 = tail call i32 @QUEUE_INIT(ptr noundef nonnull %14) #3 %16 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 15 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %16, i8 0, i64 32, i1 false) %17 = tail call ptr @uv__malloc(i32 noundef 4) #3 %18 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1 store ptr %17, ptr %18, align 8, !tbaa !16 %19 = icmp eq ptr %17, null br i1 %19, label %20, label %22 20: ; preds = %9 %21 = load i32, ptr @UV_ENOMEM, align 4, !tbaa !17 br label %49 22: ; preds = %9 %23 = tail call i32 @heap_init(ptr noundef nonnull %17) #3 %24 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 9 %25 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 8 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(48) %24, i8 0, i64 48, i1 false) %26 = tail call i32 @memset(ptr noundef nonnull %25, i32 noundef 0, i32 noundef 4) #3 %27 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 4 %28 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 2 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %27, i8 0, i64 32, i1 false) %29 = tail call i32 @uv_mutex_init(ptr noundef nonnull %28) #3 %30 = icmp eq i32 %29, 0 br i1 %30, label %31, label %46 31: ; preds = %22 %32 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 3 %33 = load i32, ptr @uv__work_done, align 4, !tbaa !17 %34 = tail call i32 @uv_async_init(ptr noundef nonnull %0, ptr noundef nonnull %32, i32 noundef %33) #3 %35 = icmp eq i32 %34, 0 br i1 %35, label %36, label %43 36: ; preds = %31 %37 = tail call i32 @uv__handle_unref(ptr noundef nonnull %32) #3 %38 = load i32, ptr @UV_HANDLE_INTERNAL, align 4, !tbaa !17 %39 = load i32, ptr %32, align 4, !tbaa !18 %40 = or i32 %39, %38 store i32 %40, ptr %32, align 4, !tbaa !18 %41 = tail call i32 @uv__loops_add(ptr noundef nonnull %0) #3 %42 = icmp eq i32 %41, 0 br i1 %42, label %54, label %43 43: ; preds = %36, %31 %44 = phi i32 [ %34, %31 ], [ %41, %36 ] %45 = tail call i32 @uv_mutex_destroy(ptr noundef nonnull %28) #3 br label %46 46: ; preds = %22, %43 %47 = phi i32 [ %29, %22 ], [ %44, %43 ] %48 = tail call i32 @uv__free(ptr noundef nonnull %17) #3 store ptr null, ptr %18, align 8, !tbaa !16 br label %49 49: ; preds = %46, %20 %50 = phi i32 [ %21, %20 ], [ %47, %46 ] %51 = load ptr, ptr %0, align 8, !tbaa !9 %52 = tail call i32 @CloseHandle(ptr noundef %51) #3 %53 = load ptr, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !5 store ptr %53, ptr %0, align 8, !tbaa !9 br label %54 54: ; preds = %36, %49, %6 %55 = phi i32 [ %8, %6 ], [ %50, %49 ], [ 0, %36 ] ret i32 %55 } declare i32 @uv__once_init(...) local_unnamed_addr #1 declare ptr @CreateIoCompletionPort(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @uv_translate_sys_error(i32 noundef) local_unnamed_addr #1 declare i32 @GetLastError(...) local_unnamed_addr #1 declare i32 @uv_update_time(ptr noundef) local_unnamed_addr #1 declare i32 @QUEUE_INIT(ptr noundef) local_unnamed_addr #1 declare ptr @uv__malloc(i32 noundef) local_unnamed_addr #1 declare i32 @heap_init(ptr noundef) local_unnamed_addr #1 declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @uv_mutex_init(ptr noundef) local_unnamed_addr #1 declare i32 @uv_async_init(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @uv__handle_unref(ptr noundef) local_unnamed_addr #1 declare i32 @uv__loops_add(ptr noundef) local_unnamed_addr #1 declare i32 @uv_mutex_destroy(ptr noundef) local_unnamed_addr #1 declare i32 @uv__free(ptr noundef) local_unnamed_addr #1 declare i32 @CloseHandle(ptr noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"TYPE_10__", !6, i64 0, !6, i64 8, !11, i64 16, !12, i64 20, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !11, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !13, i64 128, !14, i64 136, !11, i64 144, !11, i64 148, !13, i64 152} !11 = !{!"int", !7, i64 0} !12 = !{!"TYPE_11__", !11, i64 0} !13 = !{!"long", !7, i64 0} !14 = !{!"TYPE_9__", !13, i64 0} !15 = !{!10, !13, i64 152} !16 = !{!10, !6, i64 8} !17 = !{!11, !11, i64 0} !18 = !{!10, !11, i64 20}
; ModuleID = 'AnghaBench/libuv/src/win/extr_core.c_uv_loop_init.c' source_filename = "AnghaBench/libuv/src/win/extr_core.c_uv_loop_init.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @INVALID_HANDLE_VALUE = common local_unnamed_addr global ptr null, align 8 @UV_ENOMEM = common local_unnamed_addr global i32 0, align 4 @uv__work_done = common local_unnamed_addr global i32 0, align 4 @UV_HANDLE_INTERNAL = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @uv_loop_init(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 @uv__once_init() #3 %3 = load ptr, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !6 %4 = tail call ptr @CreateIoCompletionPort(ptr noundef %3, ptr noundef null, i32 noundef 0, i32 noundef 1) #3 store ptr %4, ptr %0, align 8, !tbaa !10 %5 = icmp eq ptr %4, null br i1 %5, label %6, label %9 6: ; preds = %1 %7 = tail call i32 @GetLastError() #3 %8 = tail call i32 @uv_translate_sys_error(i32 noundef %7) #3 br label %54 9: ; preds = %1 %10 = getelementptr inbounds i8, ptr %0, i64 152 store i64 0, ptr %10, align 8, !tbaa !16 %11 = tail call i32 @uv_update_time(ptr noundef nonnull %0) #3 %12 = getelementptr inbounds i8, ptr %0, i64 148 %13 = tail call i32 @QUEUE_INIT(ptr noundef nonnull %12) #3 %14 = getelementptr inbounds i8, ptr %0, i64 144 %15 = tail call i32 @QUEUE_INIT(ptr noundef nonnull %14) #3 %16 = getelementptr inbounds i8, ptr %0, i64 112 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %16, i8 0, i64 32, i1 false) %17 = tail call ptr @uv__malloc(i32 noundef 4) #3 %18 = getelementptr inbounds i8, ptr %0, i64 8 store ptr %17, ptr %18, align 8, !tbaa !17 %19 = icmp eq ptr %17, null br i1 %19, label %20, label %22 20: ; preds = %9 %21 = load i32, ptr @UV_ENOMEM, align 4, !tbaa !18 br label %49 22: ; preds = %9 %23 = tail call i32 @heap_init(ptr noundef nonnull %17) #3 %24 = getelementptr inbounds i8, ptr %0, i64 64 %25 = getelementptr inbounds i8, ptr %0, i64 56 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(48) %24, i8 0, i64 48, i1 false) %26 = tail call i32 @memset(ptr noundef nonnull %25, i32 noundef 0, i32 noundef 4) #3 %27 = getelementptr inbounds i8, ptr %0, i64 24 %28 = getelementptr inbounds i8, ptr %0, i64 16 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %27, i8 0, i64 32, i1 false) %29 = tail call i32 @uv_mutex_init(ptr noundef nonnull %28) #3 %30 = icmp eq i32 %29, 0 br i1 %30, label %31, label %46 31: ; preds = %22 %32 = getelementptr inbounds i8, ptr %0, i64 20 %33 = load i32, ptr @uv__work_done, align 4, !tbaa !18 %34 = tail call i32 @uv_async_init(ptr noundef nonnull %0, ptr noundef nonnull %32, i32 noundef %33) #3 %35 = icmp eq i32 %34, 0 br i1 %35, label %36, label %43 36: ; preds = %31 %37 = tail call i32 @uv__handle_unref(ptr noundef nonnull %32) #3 %38 = load i32, ptr @UV_HANDLE_INTERNAL, align 4, !tbaa !18 %39 = load i32, ptr %32, align 4, !tbaa !19 %40 = or i32 %39, %38 store i32 %40, ptr %32, align 4, !tbaa !19 %41 = tail call i32 @uv__loops_add(ptr noundef nonnull %0) #3 %42 = icmp eq i32 %41, 0 br i1 %42, label %54, label %43 43: ; preds = %36, %31 %44 = phi i32 [ %34, %31 ], [ %41, %36 ] %45 = tail call i32 @uv_mutex_destroy(ptr noundef nonnull %28) #3 br label %46 46: ; preds = %22, %43 %47 = phi i32 [ %29, %22 ], [ %44, %43 ] %48 = tail call i32 @uv__free(ptr noundef nonnull %17) #3 store ptr null, ptr %18, align 8, !tbaa !17 br label %49 49: ; preds = %46, %20 %50 = phi i32 [ %21, %20 ], [ %47, %46 ] %51 = load ptr, ptr %0, align 8, !tbaa !10 %52 = tail call i32 @CloseHandle(ptr noundef %51) #3 %53 = load ptr, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !6 store ptr %53, ptr %0, align 8, !tbaa !10 br label %54 54: ; preds = %36, %49, %6 %55 = phi i32 [ %8, %6 ], [ %50, %49 ], [ 0, %36 ] ret i32 %55 } declare i32 @uv__once_init(...) local_unnamed_addr #1 declare ptr @CreateIoCompletionPort(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @uv_translate_sys_error(i32 noundef) local_unnamed_addr #1 declare i32 @GetLastError(...) local_unnamed_addr #1 declare i32 @uv_update_time(ptr noundef) local_unnamed_addr #1 declare i32 @QUEUE_INIT(ptr noundef) local_unnamed_addr #1 declare ptr @uv__malloc(i32 noundef) local_unnamed_addr #1 declare i32 @heap_init(ptr noundef) local_unnamed_addr #1 declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @uv_mutex_init(ptr noundef) local_unnamed_addr #1 declare i32 @uv_async_init(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @uv__handle_unref(ptr noundef) local_unnamed_addr #1 declare i32 @uv__loops_add(ptr noundef) local_unnamed_addr #1 declare i32 @uv_mutex_destroy(ptr noundef) local_unnamed_addr #1 declare i32 @uv__free(ptr noundef) local_unnamed_addr #1 declare i32 @CloseHandle(ptr noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_10__", !7, i64 0, !7, i64 8, !12, i64 16, !13, i64 20, !14, i64 24, !14, i64 32, !14, i64 40, !14, i64 48, !12, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !14, i64 128, !15, i64 136, !12, i64 144, !12, i64 148, !14, i64 152} !12 = !{!"int", !8, i64 0} !13 = !{!"TYPE_11__", !12, i64 0} !14 = !{!"long", !8, i64 0} !15 = !{!"TYPE_9__", !14, i64 0} !16 = !{!11, !14, i64 152} !17 = !{!11, !7, i64 8} !18 = !{!12, !12, i64 0} !19 = !{!11, !12, i64 20}
libuv_src_win_extr_core.c_uv_loop_init
; ModuleID = 'AnghaBench/freebsd/contrib/xz/src/liblzma/delta/extr_delta_decoder.c_delta_decode.c' source_filename = "AnghaBench/freebsd/contrib/xz/src/liblzma/delta/extr_delta_decoder.c_delta_decode.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { i32, ptr } @llvm.compiler.used = appending global [1 x ptr] [ptr @delta_decode], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @delta_decode(ptr noundef %0, ptr noundef %1, ptr noalias noundef %2, ptr noalias noundef %3, i64 noundef %4, ptr noalias noundef %5, ptr noalias noundef %6, i64 noundef %7, i32 noundef %8) #0 { %10 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1 %11 = load ptr, ptr %10, align 8, !tbaa !5 %12 = icmp ne ptr %11, null %13 = zext i1 %12 to i32 %14 = tail call i32 @assert(i32 noundef %13) #2 %15 = load i64, ptr %6, align 8, !tbaa !12 %16 = load ptr, ptr %10, align 8, !tbaa !5 %17 = load i32, ptr %0, align 8, !tbaa !14 %18 = tail call i32 %16(i32 noundef %17, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4, ptr noundef %5, ptr noundef nonnull %6, i64 noundef %7, i32 noundef %8) #2 %19 = getelementptr inbounds i32, ptr %5, i64 %15 %20 = load i64, ptr %6, align 8, !tbaa !12 %21 = sub i64 %20, %15 %22 = tail call i32 @decode_buffer(ptr noundef nonnull %0, ptr noundef %19, i64 noundef %21) #2 ret i32 %18 } declare i32 @assert(i32 noundef) local_unnamed_addr #1 declare i32 @decode_buffer(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !11, i64 8} !6 = !{!"TYPE_5__", !7, i64 0} !7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"long", !9, i64 0} !14 = !{!6, !8, i64 0}
; ModuleID = 'AnghaBench/freebsd/contrib/xz/src/liblzma/delta/extr_delta_decoder.c_delta_decode.c' source_filename = "AnghaBench/freebsd/contrib/xz/src/liblzma/delta/extr_delta_decoder.c_delta_decode.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @delta_decode], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @delta_decode(ptr noundef %0, ptr noundef %1, ptr noalias noundef %2, ptr noalias noundef %3, i64 noundef %4, ptr noalias noundef %5, ptr noalias noundef %6, i64 noundef %7, i32 noundef %8) #0 { %10 = getelementptr inbounds i8, ptr %0, i64 8 %11 = load ptr, ptr %10, align 8, !tbaa !6 %12 = icmp ne ptr %11, null %13 = zext i1 %12 to i32 %14 = tail call i32 @assert(i32 noundef %13) #2 %15 = load i64, ptr %6, align 8, !tbaa !13 %16 = load ptr, ptr %10, align 8, !tbaa !6 %17 = load i32, ptr %0, align 8, !tbaa !15 %18 = tail call i32 %16(i32 noundef %17, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4, ptr noundef %5, ptr noundef nonnull %6, i64 noundef %7, i32 noundef %8) #2 %19 = getelementptr inbounds i32, ptr %5, i64 %15 %20 = load i64, ptr %6, align 8, !tbaa !13 %21 = sub i64 %20, %15 %22 = tail call i32 @decode_buffer(ptr noundef nonnull %0, ptr noundef %19, i64 noundef %21) #2 ret i32 %18 } declare i32 @assert(i32 noundef) local_unnamed_addr #1 declare i32 @decode_buffer(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !12, i64 8} !7 = !{!"TYPE_5__", !8, i64 0} !8 = !{!"TYPE_4__", !9, i64 0, !12, i64 8} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!"any pointer", !10, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"long", !10, i64 0} !15 = !{!7, !9, i64 0}
freebsd_contrib_xz_src_liblzma_delta_extr_delta_decoder.c_delta_decode
; ModuleID = 'AnghaBench/xhyve/src/extr_pci_fbuf.c_pci_fbuf_usage.c' source_filename = "AnghaBench/xhyve/src/extr_pci_fbuf.c_pci_fbuf_usage.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @stderr = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [30 x i8] c"Invalid fbuf emulation \22%s\22\0D\0A\00", align 1 @.str.1 = private unnamed_addr constant [45 x i8] c"fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port\0D\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @pci_fbuf_usage], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @pci_fbuf_usage(ptr noundef %0) #0 { %2 = load i32, ptr @stderr, align 4, !tbaa !5 %3 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %2, ptr noundef nonnull @.str, ptr noundef %0) #2 %4 = load i32, ptr @stderr, align 4, !tbaa !5 %5 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %4, ptr noundef nonnull @.str.1) #2 ret void } declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/xhyve/src/extr_pci_fbuf.c_pci_fbuf_usage.c' source_filename = "AnghaBench/xhyve/src/extr_pci_fbuf.c_pci_fbuf_usage.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @stderr = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [30 x i8] c"Invalid fbuf emulation \22%s\22\0D\0A\00", align 1 @.str.1 = private unnamed_addr constant [45 x i8] c"fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port\0D\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @pci_fbuf_usage], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @pci_fbuf_usage(ptr noundef %0) #0 { %2 = load i32, ptr @stderr, align 4, !tbaa !6 %3 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %2, ptr noundef nonnull @.str, ptr noundef %0) #2 %4 = load i32, ptr @stderr, align 4, !tbaa !6 %5 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %4, ptr noundef nonnull @.str.1) #2 ret void } declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
xhyve_src_extr_pci_fbuf.c_pci_fbuf_usage
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/netxen/extr_netxen_nic_ethtool.c_netxen_nic_get_rx_csum.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/netxen/extr_netxen_nic_ethtool.c_netxen_nic_get_rx_csum.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @netxen_nic_get_rx_csum], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @netxen_nic_get_rx_csum(ptr noundef %0) #0 { %2 = tail call ptr @netdev_priv(ptr noundef %0) #2 %3 = load i32, ptr %2, align 4, !tbaa !5 ret i32 %3 } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"netxen_adapter", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/netxen/extr_netxen_nic_ethtool.c_netxen_nic_get_rx_csum.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/netxen/extr_netxen_nic_ethtool.c_netxen_nic_get_rx_csum.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @netxen_nic_get_rx_csum], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @netxen_nic_get_rx_csum(ptr noundef %0) #0 { %2 = tail call ptr @netdev_priv(ptr noundef %0) #2 %3 = load i32, ptr %2, align 4, !tbaa !6 ret i32 %3 } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"netxen_adapter", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
fastsocket_kernel_drivers_net_netxen_extr_netxen_nic_ethtool.c_netxen_nic_get_rx_csum
; ModuleID = 'AnghaBench/reactos/dll/win32/ole32/extr_classmoniker.c_ClassMoniker_Construct.c' source_filename = "AnghaBench/reactos/dll/win32/ole32/extr_classmoniker.c_ClassMoniker_Construct.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_8__ = type { ptr, i32, i64, %struct.TYPE_7__, %struct.TYPE_6__ } %struct.TYPE_7__ = type { ptr } %struct.TYPE_6__ = type { ptr } @.str = private unnamed_addr constant [9 x i8] c"(%p,%s)\0A\00", align 1 @ClassMonikerVtbl = dso_local global i32 0, align 4 @ROTDataVtbl = dso_local global i32 0, align 4 @S_OK = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ClassMoniker_Construct], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ClassMoniker_Construct(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call i32 @debugstr_guid(ptr noundef %1) #2 %4 = tail call i32 @TRACE(ptr noundef nonnull @.str, ptr noundef %0, i32 noundef %3) #2 %5 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 4 store ptr @ClassMonikerVtbl, ptr %5, align 8, !tbaa !5 %6 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 3 store ptr @ROTDataVtbl, ptr %6, align 8, !tbaa !14 %7 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 2 store i64 0, ptr %7, align 8, !tbaa !15 %8 = load i32, ptr %1, align 4, !tbaa !16 %9 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1 store i32 %8, ptr %9, align 8, !tbaa !17 store ptr null, ptr %0, align 8, !tbaa !18 %10 = load i32, ptr @S_OK, align 4, !tbaa !16 ret i32 %10 } declare i32 @TRACE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @debugstr_guid(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 32} !6 = !{!"TYPE_8__", !7, i64 0, !10, i64 8, !11, i64 16, !12, i64 24, !13, i64 32} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!"long", !8, i64 0} !12 = !{!"TYPE_7__", !7, i64 0} !13 = !{!"TYPE_6__", !7, i64 0} !14 = !{!6, !7, i64 24} !15 = !{!6, !11, i64 16} !16 = !{!10, !10, i64 0} !17 = !{!6, !10, i64 8} !18 = !{!6, !7, i64 0}
; ModuleID = 'AnghaBench/reactos/dll/win32/ole32/extr_classmoniker.c_ClassMoniker_Construct.c' source_filename = "AnghaBench/reactos/dll/win32/ole32/extr_classmoniker.c_ClassMoniker_Construct.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [9 x i8] c"(%p,%s)\0A\00", align 1 @ClassMonikerVtbl = common global i32 0, align 4 @ROTDataVtbl = common global i32 0, align 4 @S_OK = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ClassMoniker_Construct], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ClassMoniker_Construct(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call i32 @debugstr_guid(ptr noundef %1) #2 %4 = tail call i32 @TRACE(ptr noundef nonnull @.str, ptr noundef %0, i32 noundef %3) #2 %5 = getelementptr inbounds i8, ptr %0, i64 32 store ptr @ClassMonikerVtbl, ptr %5, align 8, !tbaa !6 %6 = getelementptr inbounds i8, ptr %0, i64 24 store ptr @ROTDataVtbl, ptr %6, align 8, !tbaa !15 %7 = getelementptr inbounds i8, ptr %0, i64 16 store i64 0, ptr %7, align 8, !tbaa !16 %8 = load i32, ptr %1, align 4, !tbaa !17 %9 = getelementptr inbounds i8, ptr %0, i64 8 store i32 %8, ptr %9, align 8, !tbaa !18 store ptr null, ptr %0, align 8, !tbaa !19 %10 = load i32, ptr @S_OK, align 4, !tbaa !17 ret i32 %10 } declare i32 @TRACE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @debugstr_guid(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 32} !7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8, !12, i64 16, !13, i64 24, !14, i64 32} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!"long", !9, i64 0} !13 = !{!"TYPE_7__", !8, i64 0} !14 = !{!"TYPE_6__", !8, i64 0} !15 = !{!7, !8, i64 24} !16 = !{!7, !12, i64 16} !17 = !{!11, !11, i64 0} !18 = !{!7, !11, i64 8} !19 = !{!7, !8, i64 0}
reactos_dll_win32_ole32_extr_classmoniker.c_ClassMoniker_Construct
; ModuleID = 'AnghaBench/lab/engine/code/game/extr_g_client.c_SelectRandomDeathmatchSpawnPoint.c' source_filename = "AnghaBench/lab/engine/code/game/extr_g_client.c_SelectRandomDeathmatchSpawnPoint.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-pc-linux-gnu" %struct.TYPE_6__ = type { i32 } @MAX_SPAWN_POINTS = dso_local local_unnamed_addr global i32 0, align 4 @classname = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [23 x i8] c"info_player_deathmatch\00", align 1 @FL_NO_BOTS = dso_local local_unnamed_addr global i32 0, align 4 @FL_NO_HUMANS = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local %struct.TYPE_6__* @SelectRandomDeathmatchSpawnPoint(i64 noundef %0) local_unnamed_addr #0 { %2 = load i32, i32* @MAX_SPAWN_POINTS, align 4, !tbaa !5 %3 = zext i32 %2 to i64 %4 = alloca %struct.TYPE_6__*, i64 %3, align 16 %5 = load i32, i32* @classname, align 4, !tbaa !5 %6 = tail call i32 @FOFS(i32 noundef %5) #2 %7 = tail call %struct.TYPE_6__* @G_Find(%struct.TYPE_6__* noundef null, i32 noundef %6, i8* noundef getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)) #2 %8 = icmp ne %struct.TYPE_6__* %7, null %9 = load i32, i32* @MAX_SPAWN_POINTS, align 4 %10 = icmp sgt i32 %9, 0 %11 = select i1 %8, i1 %10, i1 false br i1 %11, label %12, label %57 12: ; preds = %1 %13 = icmp ne i64 %0, 0 br label %14 14: ; preds = %12, %42 %15 = phi i64 [ 0, %12 ], [ %44, %42 ] %16 = phi %struct.TYPE_6__* [ %7, %12 ], [ %47, %42 ] br label %17 17: ; preds = %14, %33 %18 = phi %struct.TYPE_6__* [ %16, %14 ], [ %36, %33 ] %19 = tail call i64 @SpotWouldTelefrag(%struct.TYPE_6__* noundef nonnull %18) #2 %20 = icmp eq i64 %19, 0 br i1 %20, label %21, label %33 21: ; preds = %17 %22 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %18, i64 0, i32 0 %23 = load i32, i32* %22, align 4, !tbaa !9 %24 = load i32, i32* @FL_NO_BOTS, align 4, !tbaa !5 %25 = and i32 %24, %23 %26 = icmp ne i32 %25, 0 %27 = and i1 %13, %26 br i1 %27, label %33, label %28 28: ; preds = %21 %29 = load i32, i32* @FL_NO_HUMANS, align 4, !tbaa !5 %30 = and i32 %29, %23 %31 = icmp eq i32 %30, 0 %32 = or i1 %13, %31 br i1 %32, label %42, label %33 33: ; preds = %21, %28, %17 %34 = load i32, i32* @classname, align 4, !tbaa !5 %35 = tail call i32 @FOFS(i32 noundef %34) #2 %36 = tail call %struct.TYPE_6__* @G_Find(%struct.TYPE_6__* noundef nonnull %18, i32 noundef %35, i8* noundef getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)) #2 %37 = icmp ne %struct.TYPE_6__* %36, null %38 = load i32, i32* @MAX_SPAWN_POINTS, align 4 %39 = sext i32 %38 to i64 %40 = icmp slt i64 %15, %39 %41 = select i1 %37, i1 %40, i1 false br i1 %41, label %17, label %53, !llvm.loop !11 42: ; preds = %28 %43 = getelementptr inbounds %struct.TYPE_6__*, %struct.TYPE_6__** %4, i64 %15 store %struct.TYPE_6__* %18, %struct.TYPE_6__** %43, align 8, !tbaa !13 %44 = add nuw nsw i64 %15, 1 %45 = load i32, i32* @classname, align 4, !tbaa !5 %46 = tail call i32 @FOFS(i32 noundef %45) #2 %47 = tail call %struct.TYPE_6__* @G_Find(%struct.TYPE_6__* noundef nonnull %18, i32 noundef %46, i8* noundef getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)) #2 %48 = icmp ne %struct.TYPE_6__* %47, null %49 = load i32, i32* @MAX_SPAWN_POINTS, align 4 %50 = sext i32 %49 to i64 %51 = icmp slt i64 %44, %50 %52 = select i1 %48, i1 %51, i1 false br i1 %52, label %14, label %53, !llvm.loop !11 53: ; preds = %42, %33 %54 = phi i64 [ %15, %33 ], [ %44, %42 ] %55 = trunc i64 %54 to i32 %56 = icmp eq i32 %55, 0 br i1 %56, label %57, label %61 57: ; preds = %1, %53 %58 = load i32, i32* @classname, align 4, !tbaa !5 %59 = tail call i32 @FOFS(i32 noundef %58) #2 %60 = tail call %struct.TYPE_6__* @G_Find(%struct.TYPE_6__* noundef null, i32 noundef %59, i8* noundef getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)) #2 br label %67 61: ; preds = %53 %62 = tail call i32 (...) @rand() #2 %63 = srem i32 %62, %55 %64 = sext i32 %63 to i64 %65 = getelementptr inbounds %struct.TYPE_6__*, %struct.TYPE_6__** %4, i64 %64 %66 = load %struct.TYPE_6__*, %struct.TYPE_6__** %65, align 8, !tbaa !13 br label %67 67: ; preds = %61, %57 %68 = phi %struct.TYPE_6__* [ %66, %61 ], [ %60, %57 ] ret %struct.TYPE_6__* %68 } declare %struct.TYPE_6__* @G_Find(%struct.TYPE_6__* noundef, i32 noundef, i8* noundef) local_unnamed_addr #1 declare i32 @FOFS(i32 noundef) local_unnamed_addr #1 declare i64 @SpotWouldTelefrag(%struct.TYPE_6__* noundef) local_unnamed_addr #1 declare i32 @rand(...) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 7, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"TYPE_6__", !6, i64 0} !11 = distinct !{!11, !12} !12 = !{!"llvm.loop.mustprogress"} !13 = !{!14, !14, i64 0} !14 = !{!"any pointer", !7, i64 0}
; ModuleID = 'AnghaBench/lab/engine/code/game/extr_g_client.c_SelectRandomDeathmatchSpawnPoint.c' source_filename = "AnghaBench/lab/engine/code/game/extr_g_client.c_SelectRandomDeathmatchSpawnPoint.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @MAX_SPAWN_POINTS = common local_unnamed_addr global i32 0, align 4 @classname = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [23 x i8] c"info_player_deathmatch\00", align 1 @FL_NO_BOTS = common local_unnamed_addr global i32 0, align 4 @FL_NO_HUMANS = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @SelectRandomDeathmatchSpawnPoint(i64 noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @MAX_SPAWN_POINTS, align 4, !tbaa !6 %3 = zext i32 %2 to i64 %4 = alloca ptr, i64 %3, align 8 %5 = load i32, ptr @classname, align 4, !tbaa !6 %6 = tail call i32 @FOFS(i32 noundef %5) #2 %7 = tail call ptr @G_Find(ptr noundef null, i32 noundef %6, ptr noundef nonnull @.str) #2 %8 = icmp ne ptr %7, null %9 = load i32, ptr @MAX_SPAWN_POINTS, align 4 %10 = icmp sgt i32 %9, 0 %11 = select i1 %8, i1 %10, i1 false br i1 %11, label %12, label %54 12: ; preds = %1 %13 = icmp ne i64 %0, 0 br label %14 14: ; preds = %12, %41 %15 = phi i64 [ 0, %12 ], [ %43, %41 ] %16 = phi ptr [ %7, %12 ], [ %46, %41 ] br label %17 17: ; preds = %14, %32 %18 = phi ptr [ %16, %14 ], [ %35, %32 ] %19 = tail call i64 @SpotWouldTelefrag(ptr noundef nonnull %18) #2 %20 = icmp eq i64 %19, 0 br i1 %20, label %21, label %32 21: ; preds = %17 %22 = load i32, ptr %18, align 4, !tbaa !10 %23 = load i32, ptr @FL_NO_BOTS, align 4, !tbaa !6 %24 = and i32 %23, %22 %25 = icmp ne i32 %24, 0 %26 = and i1 %13, %25 br i1 %26, label %32, label %27 27: ; preds = %21 %28 = load i32, ptr @FL_NO_HUMANS, align 4, !tbaa !6 %29 = and i32 %28, %22 %30 = icmp eq i32 %29, 0 %31 = or i1 %13, %30 br i1 %31, label %41, label %32 32: ; preds = %21, %27, %17 %33 = load i32, ptr @classname, align 4, !tbaa !6 %34 = tail call i32 @FOFS(i32 noundef %33) #2 %35 = tail call ptr @G_Find(ptr noundef nonnull %18, i32 noundef %34, ptr noundef nonnull @.str) #2 %36 = icmp ne ptr %35, null %37 = load i32, ptr @MAX_SPAWN_POINTS, align 4 %38 = sext i32 %37 to i64 %39 = icmp slt i64 %15, %38 %40 = select i1 %36, i1 %39, i1 false br i1 %40, label %17, label %52, !llvm.loop !12 41: ; preds = %27 %42 = getelementptr inbounds ptr, ptr %4, i64 %15 store ptr %18, ptr %42, align 8, !tbaa !14 %43 = add nuw nsw i64 %15, 1 %44 = load i32, ptr @classname, align 4, !tbaa !6 %45 = tail call i32 @FOFS(i32 noundef %44) #2 %46 = tail call ptr @G_Find(ptr noundef nonnull %18, i32 noundef %45, ptr noundef nonnull @.str) #2 %47 = icmp ne ptr %46, null %48 = load i32, ptr @MAX_SPAWN_POINTS, align 4 %49 = sext i32 %48 to i64 %50 = icmp slt i64 %43, %49 %51 = select i1 %47, i1 %50, i1 false br i1 %51, label %14, label %58, !llvm.loop !12 52: ; preds = %32 %53 = icmp eq i64 %15, 0 br i1 %53, label %54, label %58 54: ; preds = %1, %52 %55 = load i32, ptr @classname, align 4, !tbaa !6 %56 = tail call i32 @FOFS(i32 noundef %55) #2 %57 = tail call ptr @G_Find(ptr noundef null, i32 noundef %56, ptr noundef nonnull @.str) #2 br label %66 58: ; preds = %41, %52 %59 = phi i64 [ %15, %52 ], [ %43, %41 ] %60 = trunc i64 %59 to i32 %61 = tail call i32 @rand() #2 %62 = srem i32 %61, %60 %63 = sext i32 %62 to i64 %64 = getelementptr inbounds ptr, ptr %4, i64 %63 %65 = load ptr, ptr %64, align 8, !tbaa !14 br label %66 66: ; preds = %58, %54 %67 = phi ptr [ %65, %58 ], [ %57, %54 ] ret ptr %67 } declare ptr @G_Find(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @FOFS(i32 noundef) local_unnamed_addr #1 declare i64 @SpotWouldTelefrag(ptr noundef) local_unnamed_addr #1 declare i32 @rand(...) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_6__", !7, i64 0} !12 = distinct !{!12, !13} !13 = !{!"llvm.loop.mustprogress"} !14 = !{!15, !15, i64 0} !15 = !{!"any pointer", !8, i64 0}
lab_engine_code_game_extr_g_client.c_SelectRandomDeathmatchSpawnPoint
; ModuleID = 'AnghaBench/xLua/WebGLPlugins/extr_liolib.c_read_line.c' source_filename = "AnghaBench/xLua/WebGLPlugins/extr_liolib.c_read_line.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @EOF = dso_local local_unnamed_addr global i32 0, align 4 @LUAL_BUFFERSIZE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @read_line], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @read_line(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 %5 = call i32 @luaL_buffinit(ptr noundef %0, ptr noundef nonnull %4) #3 %6 = load i32, ptr @EOF, align 4, !tbaa !5 %7 = icmp eq i32 %6, 0 br i1 %7, label %8, label %10 8: ; preds = %3 %9 = call i32 @luaL_pushresult(ptr noundef nonnull %4) #3 br label %51 10: ; preds = %3, %33 %11 = phi i32 [ %35, %33 ], [ 0, %3 ] %12 = call ptr @luaL_prepbuffer(ptr noundef nonnull %4) #3 %13 = call i32 @l_lockfile(ptr noundef %1) #3 %14 = load i32, ptr @LUAL_BUFFERSIZE, align 4, !tbaa !5 %15 = icmp sgt i32 %14, 0 br i1 %15, label %16, label %33 16: ; preds = %10, %23 %17 = phi i64 [ %25, %23 ], [ 0, %10 ] %18 = call i32 @l_getc(ptr noundef %1) #3 %19 = load i32, ptr @EOF, align 4, !tbaa !5 %20 = icmp ne i32 %18, %19 %21 = icmp ne i32 %18, 10 %22 = and i1 %21, %20 br i1 %22, label %23, label %30 23: ; preds = %16 %24 = trunc i32 %18 to i8 %25 = add nuw nsw i64 %17, 1 %26 = getelementptr inbounds i8, ptr %12, i64 %17 store i8 %24, ptr %26, align 1, !tbaa !9 %27 = load i32, ptr @LUAL_BUFFERSIZE, align 4, !tbaa !5 %28 = sext i32 %27 to i64 %29 = icmp slt i64 %25, %28 br i1 %29, label %16, label %30, !llvm.loop !10 30: ; preds = %16, %23 %31 = phi i64 [ %25, %23 ], [ %17, %16 ] %32 = trunc i64 %31 to i32 br label %33 33: ; preds = %30, %10 %34 = phi i32 [ 0, %10 ], [ %32, %30 ] %35 = phi i32 [ %11, %10 ], [ %18, %30 ] %36 = call i32 @l_unlockfile(ptr noundef %1) #3 %37 = call i32 @luaL_addsize(ptr noundef nonnull %4, i32 noundef %34) #3 %38 = load i32, ptr @EOF, align 4, !tbaa !5 %39 = icmp ne i32 %35, %38 %40 = icmp ne i32 %35, 10 %41 = and i1 %40, %39 br i1 %41, label %10, label %42, !llvm.loop !12 42: ; preds = %33 %43 = icmp eq i32 %35, 10 %44 = icmp eq i32 %2, 0 %45 = and i1 %44, %43 br i1 %45, label %46, label %49 46: ; preds = %42 %47 = call i32 @luaL_addchar(ptr noundef nonnull %4, i32 noundef 10) #3 %48 = call i32 @luaL_pushresult(ptr noundef nonnull %4) #3 br label %55 49: ; preds = %42 %50 = call i32 @luaL_pushresult(ptr noundef nonnull %4) #3 br i1 %43, label %55, label %51 51: ; preds = %8, %49 %52 = call i64 @lua_rawlen(ptr noundef %0, i32 noundef -1) #3 %53 = icmp sgt i64 %52, 0 %54 = zext i1 %53 to i32 br label %55 55: ; preds = %46, %51, %49 %56 = phi i32 [ 1, %49 ], [ %54, %51 ], [ 1, %46 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 ret i32 %56 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @luaL_buffinit(ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @luaL_prepbuffer(ptr noundef) local_unnamed_addr #2 declare i32 @l_lockfile(ptr noundef) local_unnamed_addr #2 declare i32 @l_getc(ptr noundef) local_unnamed_addr #2 declare i32 @l_unlockfile(ptr noundef) local_unnamed_addr #2 declare i32 @luaL_addsize(ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @luaL_addchar(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @luaL_pushresult(ptr noundef) local_unnamed_addr #2 declare i64 @lua_rawlen(ptr noundef, i32 noundef) local_unnamed_addr #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!7, !7, i64 0} !10 = distinct !{!10, !11} !11 = !{!"llvm.loop.mustprogress"} !12 = distinct !{!12, !11}
; ModuleID = 'AnghaBench/xLua/WebGLPlugins/extr_liolib.c_read_line.c' source_filename = "AnghaBench/xLua/WebGLPlugins/extr_liolib.c_read_line.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EOF = common local_unnamed_addr global i32 0, align 4 @LUAL_BUFFERSIZE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @read_line], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @read_line(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 %5 = call i32 @luaL_buffinit(ptr noundef %0, ptr noundef nonnull %4) #3 %6 = load i32, ptr @EOF, align 4, !tbaa !6 %7 = icmp eq i32 %6, 0 br i1 %7, label %8, label %10 8: ; preds = %3 %9 = call i32 @luaL_pushresult(ptr noundef nonnull %4) #3 br label %51 10: ; preds = %3, %33 %11 = phi i32 [ %35, %33 ], [ 0, %3 ] %12 = call ptr @luaL_prepbuffer(ptr noundef nonnull %4) #3 %13 = call i32 @l_lockfile(ptr noundef %1) #3 %14 = load i32, ptr @LUAL_BUFFERSIZE, align 4, !tbaa !6 %15 = icmp sgt i32 %14, 0 br i1 %15, label %16, label %33 16: ; preds = %10, %23 %17 = phi i64 [ %25, %23 ], [ 0, %10 ] %18 = call i32 @l_getc(ptr noundef %1) #3 %19 = load i32, ptr @EOF, align 4, !tbaa !6 %20 = icmp ne i32 %18, %19 %21 = icmp ne i32 %18, 10 %22 = and i1 %21, %20 br i1 %22, label %23, label %30 23: ; preds = %16 %24 = trunc i32 %18 to i8 %25 = add nuw nsw i64 %17, 1 %26 = getelementptr inbounds i8, ptr %12, i64 %17 store i8 %24, ptr %26, align 1, !tbaa !10 %27 = load i32, ptr @LUAL_BUFFERSIZE, align 4, !tbaa !6 %28 = sext i32 %27 to i64 %29 = icmp slt i64 %25, %28 br i1 %29, label %16, label %30, !llvm.loop !11 30: ; preds = %16, %23 %31 = phi i64 [ %25, %23 ], [ %17, %16 ] %32 = trunc i64 %31 to i32 br label %33 33: ; preds = %30, %10 %34 = phi i32 [ 0, %10 ], [ %32, %30 ] %35 = phi i32 [ %11, %10 ], [ %18, %30 ] %36 = call i32 @l_unlockfile(ptr noundef %1) #3 %37 = call i32 @luaL_addsize(ptr noundef nonnull %4, i32 noundef %34) #3 %38 = load i32, ptr @EOF, align 4, !tbaa !6 %39 = icmp ne i32 %35, %38 %40 = icmp ne i32 %35, 10 %41 = and i1 %40, %39 br i1 %41, label %10, label %42, !llvm.loop !13 42: ; preds = %33 %43 = icmp eq i32 %35, 10 %44 = icmp eq i32 %2, 0 %45 = and i1 %44, %43 br i1 %45, label %46, label %49 46: ; preds = %42 %47 = call i32 @luaL_addchar(ptr noundef nonnull %4, i32 noundef 10) #3 %48 = call i32 @luaL_pushresult(ptr noundef nonnull %4) #3 br label %55 49: ; preds = %42 %50 = call i32 @luaL_pushresult(ptr noundef nonnull %4) #3 br i1 %43, label %55, label %51 51: ; preds = %8, %49 %52 = call i64 @lua_rawlen(ptr noundef %0, i32 noundef -1) #3 %53 = icmp sgt i64 %52, 0 %54 = zext i1 %53 to i32 br label %55 55: ; preds = %46, %51, %49 %56 = phi i32 [ 1, %49 ], [ %54, %51 ], [ 1, %46 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 ret i32 %56 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @luaL_buffinit(ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @luaL_prepbuffer(ptr noundef) local_unnamed_addr #2 declare i32 @l_lockfile(ptr noundef) local_unnamed_addr #2 declare i32 @l_getc(ptr noundef) local_unnamed_addr #2 declare i32 @l_unlockfile(ptr noundef) local_unnamed_addr #2 declare i32 @luaL_addsize(ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @luaL_addchar(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @luaL_pushresult(ptr noundef) local_unnamed_addr #2 declare i64 @lua_rawlen(ptr noundef, i32 noundef) local_unnamed_addr #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!8, !8, i64 0} !11 = distinct !{!11, !12} !12 = !{!"llvm.loop.mustprogress"} !13 = distinct !{!13, !12}
xLua_WebGLPlugins_extr_liolib.c_read_line
; ModuleID = 'AnghaBench/obs-studio/deps/glad/src/extr_glad.c_load_GL_NV_evaluators.c' source_filename = "AnghaBench/obs-studio/deps/glad/src/extr_glad.c_load_GL_NV_evaluators.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @GLAD_GL_NV_evaluators = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [21 x i8] c"glMapControlPointsNV\00", align 1 @glad_glMapControlPointsNV = dso_local local_unnamed_addr global i64 0, align 8 @.str.1 = private unnamed_addr constant [19 x i8] c"glMapParameterivNV\00", align 1 @glad_glMapParameterivNV = dso_local local_unnamed_addr global i64 0, align 8 @.str.2 = private unnamed_addr constant [19 x i8] c"glMapParameterfvNV\00", align 1 @glad_glMapParameterfvNV = dso_local local_unnamed_addr global i64 0, align 8 @.str.3 = private unnamed_addr constant [24 x i8] c"glGetMapControlPointsNV\00", align 1 @glad_glGetMapControlPointsNV = dso_local local_unnamed_addr global i64 0, align 8 @.str.4 = private unnamed_addr constant [22 x i8] c"glGetMapParameterivNV\00", align 1 @glad_glGetMapParameterivNV = dso_local local_unnamed_addr global i64 0, align 8 @.str.5 = private unnamed_addr constant [22 x i8] c"glGetMapParameterfvNV\00", align 1 @glad_glGetMapParameterfvNV = dso_local local_unnamed_addr global i64 0, align 8 @.str.6 = private unnamed_addr constant [28 x i8] c"glGetMapAttribParameterivNV\00", align 1 @glad_glGetMapAttribParameterivNV = dso_local local_unnamed_addr global i64 0, align 8 @.str.7 = private unnamed_addr constant [28 x i8] c"glGetMapAttribParameterfvNV\00", align 1 @glad_glGetMapAttribParameterfvNV = dso_local local_unnamed_addr global i64 0, align 8 @.str.8 = private unnamed_addr constant [13 x i8] c"glEvalMapsNV\00", align 1 @glad_glEvalMapsNV = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @load_GL_NV_evaluators], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @load_GL_NV_evaluators(ptr nocapture noundef readonly %0) #0 { %2 = load i32, ptr @GLAD_GL_NV_evaluators, align 4, !tbaa !5 %3 = icmp eq i32 %2, 0 br i1 %3, label %14, label %4 4: ; preds = %1 %5 = tail call i64 %0(ptr noundef nonnull @.str) #1 store i64 %5, ptr @glad_glMapControlPointsNV, align 8, !tbaa !9 %6 = tail call i64 %0(ptr noundef nonnull @.str.1) #1 store i64 %6, ptr @glad_glMapParameterivNV, align 8, !tbaa !9 %7 = tail call i64 %0(ptr noundef nonnull @.str.2) #1 store i64 %7, ptr @glad_glMapParameterfvNV, align 8, !tbaa !9 %8 = tail call i64 %0(ptr noundef nonnull @.str.3) #1 store i64 %8, ptr @glad_glGetMapControlPointsNV, align 8, !tbaa !9 %9 = tail call i64 %0(ptr noundef nonnull @.str.4) #1 store i64 %9, ptr @glad_glGetMapParameterivNV, align 8, !tbaa !9 %10 = tail call i64 %0(ptr noundef nonnull @.str.5) #1 store i64 %10, ptr @glad_glGetMapParameterfvNV, align 8, !tbaa !9 %11 = tail call i64 %0(ptr noundef nonnull @.str.6) #1 store i64 %11, ptr @glad_glGetMapAttribParameterivNV, align 8, !tbaa !9 %12 = tail call i64 %0(ptr noundef nonnull @.str.7) #1 store i64 %12, ptr @glad_glGetMapAttribParameterfvNV, align 8, !tbaa !9 %13 = tail call i64 %0(ptr noundef nonnull @.str.8) #1 store i64 %13, ptr @glad_glEvalMapsNV, align 8, !tbaa !9 br label %14 14: ; preds = %1, %4 ret void } attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"long", !7, i64 0}
; ModuleID = 'AnghaBench/obs-studio/deps/glad/src/extr_glad.c_load_GL_NV_evaluators.c' source_filename = "AnghaBench/obs-studio/deps/glad/src/extr_glad.c_load_GL_NV_evaluators.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @GLAD_GL_NV_evaluators = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [21 x i8] c"glMapControlPointsNV\00", align 1 @glad_glMapControlPointsNV = common local_unnamed_addr global i64 0, align 8 @.str.1 = private unnamed_addr constant [19 x i8] c"glMapParameterivNV\00", align 1 @glad_glMapParameterivNV = common local_unnamed_addr global i64 0, align 8 @.str.2 = private unnamed_addr constant [19 x i8] c"glMapParameterfvNV\00", align 1 @glad_glMapParameterfvNV = common local_unnamed_addr global i64 0, align 8 @.str.3 = private unnamed_addr constant [24 x i8] c"glGetMapControlPointsNV\00", align 1 @glad_glGetMapControlPointsNV = common local_unnamed_addr global i64 0, align 8 @.str.4 = private unnamed_addr constant [22 x i8] c"glGetMapParameterivNV\00", align 1 @glad_glGetMapParameterivNV = common local_unnamed_addr global i64 0, align 8 @.str.5 = private unnamed_addr constant [22 x i8] c"glGetMapParameterfvNV\00", align 1 @glad_glGetMapParameterfvNV = common local_unnamed_addr global i64 0, align 8 @.str.6 = private unnamed_addr constant [28 x i8] c"glGetMapAttribParameterivNV\00", align 1 @glad_glGetMapAttribParameterivNV = common local_unnamed_addr global i64 0, align 8 @.str.7 = private unnamed_addr constant [28 x i8] c"glGetMapAttribParameterfvNV\00", align 1 @glad_glGetMapAttribParameterfvNV = common local_unnamed_addr global i64 0, align 8 @.str.8 = private unnamed_addr constant [13 x i8] c"glEvalMapsNV\00", align 1 @glad_glEvalMapsNV = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @load_GL_NV_evaluators], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @load_GL_NV_evaluators(ptr nocapture noundef readonly %0) #0 { %2 = load i32, ptr @GLAD_GL_NV_evaluators, align 4, !tbaa !6 %3 = icmp eq i32 %2, 0 br i1 %3, label %14, label %4 4: ; preds = %1 %5 = tail call i64 %0(ptr noundef nonnull @.str) #1 store i64 %5, ptr @glad_glMapControlPointsNV, align 8, !tbaa !10 %6 = tail call i64 %0(ptr noundef nonnull @.str.1) #1 store i64 %6, ptr @glad_glMapParameterivNV, align 8, !tbaa !10 %7 = tail call i64 %0(ptr noundef nonnull @.str.2) #1 store i64 %7, ptr @glad_glMapParameterfvNV, align 8, !tbaa !10 %8 = tail call i64 %0(ptr noundef nonnull @.str.3) #1 store i64 %8, ptr @glad_glGetMapControlPointsNV, align 8, !tbaa !10 %9 = tail call i64 %0(ptr noundef nonnull @.str.4) #1 store i64 %9, ptr @glad_glGetMapParameterivNV, align 8, !tbaa !10 %10 = tail call i64 %0(ptr noundef nonnull @.str.5) #1 store i64 %10, ptr @glad_glGetMapParameterfvNV, align 8, !tbaa !10 %11 = tail call i64 %0(ptr noundef nonnull @.str.6) #1 store i64 %11, ptr @glad_glGetMapAttribParameterivNV, align 8, !tbaa !10 %12 = tail call i64 %0(ptr noundef nonnull @.str.7) #1 store i64 %12, ptr @glad_glGetMapAttribParameterfvNV, align 8, !tbaa !10 %13 = tail call i64 %0(ptr noundef nonnull @.str.8) #1 store i64 %13, ptr @glad_glEvalMapsNV, align 8, !tbaa !10 br label %14 14: ; preds = %1, %4 ret void } attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"long", !8, i64 0}
obs-studio_deps_glad_src_extr_glad.c_load_GL_NV_evaluators
; ModuleID = 'AnghaBench/linux/fs/nfs/extr_super.c_nfs_get_option_str.c' source_filename = "AnghaBench/linux/fs/nfs/extr_super.c_nfs_get_option_str.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @nfs_get_option_str], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @nfs_get_option_str(ptr noundef %0, ptr nocapture noundef %1) #0 { %3 = load ptr, ptr %1, align 8, !tbaa !5 %4 = tail call i32 @kfree(ptr noundef %3) #2 %5 = tail call ptr @match_strdup(ptr noundef %0) #2 store ptr %5, ptr %1, align 8, !tbaa !5 %6 = icmp eq ptr %5, null %7 = zext i1 %6 to i32 ret i32 %7 } declare i32 @kfree(ptr noundef) local_unnamed_addr #1 declare ptr @match_strdup(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/fs/nfs/extr_super.c_nfs_get_option_str.c' source_filename = "AnghaBench/linux/fs/nfs/extr_super.c_nfs_get_option_str.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @nfs_get_option_str], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @nfs_get_option_str(ptr noundef %0, ptr nocapture noundef %1) #0 { %3 = load ptr, ptr %1, align 8, !tbaa !6 %4 = tail call i32 @kfree(ptr noundef %3) #2 %5 = tail call ptr @match_strdup(ptr noundef %0) #2 store ptr %5, ptr %1, align 8, !tbaa !6 %6 = icmp eq ptr %5, null %7 = zext i1 %6 to i32 ret i32 %7 } declare i32 @kfree(ptr noundef) local_unnamed_addr #1 declare ptr @match_strdup(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_fs_nfs_extr_super.c_nfs_get_option_str
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/gas/extr_frags.c_frag_wane.c' source_filename = "AnghaBench/freebsd/contrib/binutils/gas/extr_frags.c_frag_wane.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i64, i64, i32 } @rs_fill = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable define dso_local void @frag_wane(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 { %2 = load i32, ptr @rs_fill, align 4, !tbaa !5 %3 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2 store i32 %2, ptr %3, align 8, !tbaa !9 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %0, i8 0, i64 16, i1 false) ret void } ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1 attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 16} !10 = !{!"TYPE_3__", !11, i64 0, !11, i64 8, !6, i64 16} !11 = !{!"long", !7, i64 0}
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/gas/extr_frags.c_frag_wane.c' source_filename = "AnghaBench/freebsd/contrib/binutils/gas/extr_frags.c_frag_wane.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @rs_fill = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) define void @frag_wane(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 { %2 = load i32, ptr @rs_fill, align 4, !tbaa !6 %3 = getelementptr inbounds i8, ptr %0, i64 16 store i32 %2, ptr %3, align 8, !tbaa !10 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %0, i8 0, i64 16, i1 false) ret void } ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1 attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 16} !11 = !{!"TYPE_3__", !12, i64 0, !12, i64 8, !7, i64 16} !12 = !{!"long", !8, i64 0}
freebsd_contrib_binutils_gas_extr_frags.c_frag_wane
; ModuleID = 'AnghaBench/freebsd/share/examples/FreeBSD_version/extr_FreeBSD_version.c_main.c' source_filename = "AnghaBench/freebsd/share/examples/FreeBSD_version/extr_FreeBSD_version.c_main.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [30 x i8] c"Compilation release date: %d\0A\00", align 1 @__FreeBSD_version = dso_local local_unnamed_addr global i32 0, align 4 @str = private unnamed_addr constant [47 x i8] c"Execution environment release date: can't tell\00", align 1 ; Function Attrs: nofree nounwind uwtable define dso_local noundef i32 @main() local_unnamed_addr #0 { %1 = load i32, ptr @__FreeBSD_version, align 4, !tbaa !5 %2 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %1) %3 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str) ret i32 0 } ; Function Attrs: nofree nounwind declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1 ; Function Attrs: nofree nounwind declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #2 attributes #0 = { nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nofree nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/share/examples/FreeBSD_version/extr_FreeBSD_version.c_main.c' source_filename = "AnghaBench/freebsd/share/examples/FreeBSD_version/extr_FreeBSD_version.c_main.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [30 x i8] c"Compilation release date: %d\0A\00", align 1 @__FreeBSD_version = common local_unnamed_addr global i32 0, align 4 @str = private unnamed_addr constant [47 x i8] c"Execution environment release date: can't tell\00", align 1 ; Function Attrs: nofree nounwind ssp uwtable(sync) define noundef i32 @main() local_unnamed_addr #0 { %1 = load i32, ptr @__FreeBSD_version, align 4, !tbaa !6 %2 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %1) %3 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str) ret i32 0 } ; Function Attrs: nofree nounwind declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1 ; Function Attrs: nofree nounwind declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #2 attributes #0 = { nofree nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nofree nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_share_examples_FreeBSD_version_extr_FreeBSD_version.c_main
; ModuleID = 'AnghaBench/kphp-kdb/mc-proxy/extr_mc-proxy-news-extension.c_cAdd.c' source_filename = "AnghaBench/kphp-kdb/mc-proxy/extr_mc-proxy-news-extension.c_cAdd.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.collection = type { i32, ptr } @MAX_C_NUM = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @cAdd], section "llvm.metadata" ; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable define internal void @cAdd(ptr nocapture noundef %0, i32 noundef %1, i32 noundef %2) #0 { %4 = zext i32 %1 to i64 %5 = sext i32 %2 to i64 %6 = shl nsw i64 %5, 32 %7 = or disjoint i64 %6, %4 %8 = load i32, ptr %0, align 8, !tbaa !5 %9 = icmp sgt i32 %8, 0 br i1 %9, label %10, label %22 10: ; preds = %3 %11 = getelementptr inbounds %struct.collection, ptr %0, i64 0, i32 1 %12 = load ptr, ptr %11, align 8, !tbaa !11 %13 = zext nneg i32 %8 to i64 br label %17 14: ; preds = %17 %15 = add nuw nsw i64 %18, 1 %16 = icmp eq i64 %15, %13 br i1 %16, label %22, label %17, !llvm.loop !12 17: ; preds = %10, %14 %18 = phi i64 [ 0, %10 ], [ %15, %14 ] %19 = getelementptr inbounds i64, ptr %12, i64 %18 %20 = load i64, ptr %19, align 8, !tbaa !14 %21 = icmp eq i64 %20, %7 br i1 %21, label %31, label %14 22: ; preds = %14, %3 %23 = load i32, ptr @MAX_C_NUM, align 4, !tbaa !16 %24 = icmp slt i32 %8, %23 br i1 %24, label %25, label %31 25: ; preds = %22 %26 = getelementptr inbounds %struct.collection, ptr %0, i64 0, i32 1 %27 = load ptr, ptr %26, align 8, !tbaa !11 %28 = add nsw i32 %8, 1 store i32 %28, ptr %0, align 8, !tbaa !5 %29 = sext i32 %8 to i64 %30 = getelementptr inbounds i64, ptr %27, i64 %29 store i64 %7, ptr %30, align 8, !tbaa !14 br label %31 31: ; preds = %17, %22, %25 ret void } attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"collection", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !10, i64 8} !12 = distinct !{!12, !13} !13 = !{!"llvm.loop.mustprogress"} !14 = !{!15, !15, i64 0} !15 = !{!"long long", !8, i64 0} !16 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/kphp-kdb/mc-proxy/extr_mc-proxy-news-extension.c_cAdd.c' source_filename = "AnghaBench/kphp-kdb/mc-proxy/extr_mc-proxy-news-extension.c_cAdd.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @MAX_C_NUM = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @cAdd], section "llvm.metadata" ; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) define internal void @cAdd(ptr nocapture noundef %0, i32 noundef %1, i32 noundef %2) #0 { %4 = zext i32 %1 to i64 %5 = sext i32 %2 to i64 %6 = shl nsw i64 %5, 32 %7 = or disjoint i64 %6, %4 %8 = load i32, ptr %0, align 8, !tbaa !6 %9 = icmp sgt i32 %8, 0 br i1 %9, label %10, label %22 10: ; preds = %3 %11 = getelementptr inbounds i8, ptr %0, i64 8 %12 = load ptr, ptr %11, align 8, !tbaa !12 %13 = zext nneg i32 %8 to i64 br label %17 14: ; preds = %17 %15 = add nuw nsw i64 %18, 1 %16 = icmp eq i64 %15, %13 br i1 %16, label %22, label %17, !llvm.loop !13 17: ; preds = %10, %14 %18 = phi i64 [ 0, %10 ], [ %15, %14 ] %19 = getelementptr inbounds i64, ptr %12, i64 %18 %20 = load i64, ptr %19, align 8, !tbaa !15 %21 = icmp eq i64 %20, %7 br i1 %21, label %31, label %14 22: ; preds = %14, %3 %23 = load i32, ptr @MAX_C_NUM, align 4, !tbaa !17 %24 = icmp slt i32 %8, %23 br i1 %24, label %25, label %31 25: ; preds = %22 %26 = getelementptr inbounds i8, ptr %0, i64 8 %27 = load ptr, ptr %26, align 8, !tbaa !12 %28 = add nsw i32 %8, 1 store i32 %28, ptr %0, align 8, !tbaa !6 %29 = sext i32 %8 to i64 %30 = getelementptr inbounds i64, ptr %27, i64 %29 store i64 %7, ptr %30, align 8, !tbaa !15 br label %31 31: ; preds = %17, %22, %25 ret void } attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"collection", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !11, i64 8} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"} !15 = !{!16, !16, i64 0} !16 = !{!"long long", !9, i64 0} !17 = !{!8, !8, i64 0}
kphp-kdb_mc-proxy_extr_mc-proxy-news-extension.c_cAdd
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_test.c_amdgpu_test_moves.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_test.c_amdgpu_test_moves.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local void @amdgpu_test_moves(ptr noundef %0) local_unnamed_addr #0 { %2 = load i64, ptr %0, align 8, !tbaa !5 %3 = icmp eq i64 %2, 0 br i1 %3, label %6, label %4 4: ; preds = %1 %5 = tail call i32 @amdgpu_do_test_moves(ptr noundef nonnull %0) #2 br label %6 6: ; preds = %4, %1 ret void } declare i32 @amdgpu_do_test_moves(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"amdgpu_device", !7, i64 0} !7 = !{!"TYPE_2__", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_test.c_amdgpu_test_moves.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_test.c_amdgpu_test_moves.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @amdgpu_test_moves(ptr noundef %0) local_unnamed_addr #0 { %2 = load i64, ptr %0, align 8, !tbaa !6 %3 = icmp eq i64 %2, 0 br i1 %3, label %6, label %4 4: ; preds = %1 %5 = tail call i32 @amdgpu_do_test_moves(ptr noundef nonnull %0) #2 br label %6 6: ; preds = %4, %1 ret void } declare i32 @amdgpu_do_test_moves(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"amdgpu_device", !8, i64 0} !8 = !{!"TYPE_2__", !9, i64 0} !9 = !{!"long", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"}
linux_drivers_gpu_drm_amd_amdgpu_extr_amdgpu_test.c_amdgpu_test_moves
; ModuleID = 'AnghaBench/freebsd/sbin/ipfw/extr_ipfw2.c_do_range_cmd.c' source_filename = "AnghaBench/freebsd/sbin/ipfw/extr_ipfw2.c_do_range_cmd.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_10__ = type { %struct.TYPE_11__, i32 } %struct.TYPE_11__ = type { i32, %struct.TYPE_8__ } %struct.TYPE_8__ = type { i32, i32 } @IPFW_TLV_RANGE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @do_range_cmd], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @do_range_cmd(i32 noundef %0, ptr noundef %1) #0 { %3 = alloca %struct.TYPE_10__, align 4 %4 = alloca i64, align 8 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 %5 = call i32 @memset(ptr noundef nonnull %3, i32 noundef 0, i32 noundef 16) #3 %6 = call i32 @memcpy(ptr noundef nonnull %3, ptr noundef %1, i32 noundef 4) #3 %7 = getelementptr inbounds %struct.TYPE_11__, ptr %3, i64 0, i32 1 store i32 4, ptr %7, align 4, !tbaa !5 %8 = load i32, ptr @IPFW_TLV_RANGE, align 4, !tbaa !12 %9 = getelementptr inbounds %struct.TYPE_11__, ptr %3, i64 0, i32 1, i32 1 store i32 %8, ptr %9, align 4, !tbaa !13 store i64 16, ptr %4, align 8, !tbaa !14 %10 = getelementptr inbounds %struct.TYPE_10__, ptr %3, i64 0, i32 1 %11 = call i64 @do_get3(i32 noundef %0, ptr noundef nonnull %10, ptr noundef nonnull %4) #3 %12 = icmp eq i64 %11, 0 br i1 %12, label %13, label %15 13: ; preds = %2 %14 = load i32, ptr %3, align 4, !tbaa !16 store i32 %14, ptr %1, align 4, !tbaa !17 br label %15 15: ; preds = %2, %13 %16 = phi i32 [ 0, %13 ], [ -1, %2 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3 ret i32 %16 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i64 @do_get3(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 4} !6 = !{!"TYPE_10__", !7, i64 0, !8, i64 12} !7 = !{!"TYPE_11__", !8, i64 0, !11, i64 4} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"TYPE_8__", !8, i64 0, !8, i64 4} !12 = !{!8, !8, i64 0} !13 = !{!6, !8, i64 8} !14 = !{!15, !15, i64 0} !15 = !{!"long", !9, i64 0} !16 = !{!6, !8, i64 0} !17 = !{!18, !8, i64 0} !18 = !{!"TYPE_9__", !8, i64 0}
; ModuleID = 'AnghaBench/freebsd/sbin/ipfw/extr_ipfw2.c_do_range_cmd.c' source_filename = "AnghaBench/freebsd/sbin/ipfw/extr_ipfw2.c_do_range_cmd.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_10__ = type { %struct.TYPE_11__, i32 } %struct.TYPE_11__ = type { i32, %struct.TYPE_8__ } %struct.TYPE_8__ = type { i32, i32 } @IPFW_TLV_RANGE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @do_range_cmd], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -1, 1) i32 @do_range_cmd(i32 noundef %0, ptr noundef %1) #0 { %3 = alloca %struct.TYPE_10__, align 4 %4 = alloca i64, align 8 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 %5 = call i32 @memset(ptr noundef nonnull %3, i32 noundef 0, i32 noundef 16) #3 %6 = call i32 @memcpy(ptr noundef nonnull %3, ptr noundef %1, i32 noundef 4) #3 %7 = getelementptr inbounds i8, ptr %3, i64 4 store i32 4, ptr %7, align 4, !tbaa !6 %8 = load i32, ptr @IPFW_TLV_RANGE, align 4, !tbaa !13 %9 = getelementptr inbounds i8, ptr %3, i64 8 store i32 %8, ptr %9, align 4, !tbaa !14 store i64 16, ptr %4, align 8, !tbaa !15 %10 = getelementptr inbounds i8, ptr %3, i64 12 %11 = call i64 @do_get3(i32 noundef %0, ptr noundef nonnull %10, ptr noundef nonnull %4) #3 %12 = icmp eq i64 %11, 0 br i1 %12, label %13, label %15 13: ; preds = %2 %14 = load i32, ptr %3, align 4, !tbaa !17 store i32 %14, ptr %1, align 4, !tbaa !18 br label %15 15: ; preds = %2, %13 %16 = phi i32 [ 0, %13 ], [ -1, %2 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3 ret i32 %16 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i64 @do_get3(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 4} !7 = !{!"TYPE_10__", !8, i64 0, !9, i64 12} !8 = !{!"TYPE_11__", !9, i64 0, !12, i64 4} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!"TYPE_8__", !9, i64 0, !9, i64 4} !13 = !{!9, !9, i64 0} !14 = !{!7, !9, i64 8} !15 = !{!16, !16, i64 0} !16 = !{!"long", !10, i64 0} !17 = !{!7, !9, i64 0} !18 = !{!19, !9, i64 0} !19 = !{!"TYPE_9__", !9, i64 0}
freebsd_sbin_ipfw_extr_ipfw2.c_do_range_cmd
; ModuleID = 'AnghaBench/ijkplayer/ijkmedia/ijksdl/android/extr_ijksdl_codec_android_mediadef.c_SDL_AMediaCodec_getColorFormatName.c' source_filename = "AnghaBench/ijkplayer/ijkmedia/ijksdl/android/extr_ijksdl_codec_android_mediadef.c_SDL_AMediaCodec_getColorFormatName.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [17 x i8] c"Format8bitRGB332\00", align 1 @.str.1 = private unnamed_addr constant [18 x i8] c"Format12bitRGB444\00", align 1 @.str.2 = private unnamed_addr constant [20 x i8] c"Format16bitARGB4444\00", align 1 @.str.3 = private unnamed_addr constant [20 x i8] c"Format16bitARGB1555\00", align 1 @.str.4 = private unnamed_addr constant [18 x i8] c"Format16bitRGB565\00", align 1 @.str.5 = private unnamed_addr constant [18 x i8] c"Format16bitBGR565\00", align 1 @.str.6 = private unnamed_addr constant [18 x i8] c"Format18bitRGB666\00", align 1 @.str.7 = private unnamed_addr constant [20 x i8] c"Format18bitARGB1665\00", align 1 @.str.8 = private unnamed_addr constant [20 x i8] c"Format19bitARGB1666\00", align 1 @.str.9 = private unnamed_addr constant [18 x i8] c"Format24bitRGB888\00", align 1 @.str.10 = private unnamed_addr constant [18 x i8] c"Format24bitBGR888\00", align 1 @.str.11 = private unnamed_addr constant [20 x i8] c"Format24bitARGB1887\00", align 1 @.str.12 = private unnamed_addr constant [20 x i8] c"Format25bitARGB1888\00", align 1 @.str.13 = private unnamed_addr constant [20 x i8] c"Format32bitBGRA8888\00", align 1 @.str.14 = private unnamed_addr constant [20 x i8] c"Format32bitARGB8888\00", align 1 @.str.15 = private unnamed_addr constant [19 x i8] c"FormatYUV411Planar\00", align 1 @.str.16 = private unnamed_addr constant [25 x i8] c"FormatYUV411PackedPlanar\00", align 1 @.str.17 = private unnamed_addr constant [19 x i8] c"FormatYUV420Planar\00", align 1 @.str.18 = private unnamed_addr constant [25 x i8] c"FormatYUV420PackedPlanar\00", align 1 @.str.19 = private unnamed_addr constant [23 x i8] c"FormatYUV420SemiPlanar\00", align 1 @.str.20 = private unnamed_addr constant [19 x i8] c"FormatYUV422Planar\00", align 1 @.str.21 = private unnamed_addr constant [25 x i8] c"FormatYUV422PackedPlanar\00", align 1 @.str.22 = private unnamed_addr constant [23 x i8] c"FormatYUV422SemiPlanar\00", align 1 @.str.23 = private unnamed_addr constant [13 x i8] c"FormatYCbYCr\00", align 1 @.str.24 = private unnamed_addr constant [13 x i8] c"FormatYCrYCb\00", align 1 @.str.25 = private unnamed_addr constant [13 x i8] c"FormatCbYCrY\00", align 1 @.str.26 = private unnamed_addr constant [13 x i8] c"FormatCrYCbY\00", align 1 @.str.27 = private unnamed_addr constant [24 x i8] c"FormatYUV444Interleaved\00", align 1 @.str.28 = private unnamed_addr constant [19 x i8] c"FormatRawBayer8bit\00", align 1 @.str.29 = private unnamed_addr constant [20 x i8] c"FormatRawBayer10bit\00", align 1 @.str.30 = private unnamed_addr constant [29 x i8] c"FormatRawBayer8bitcompressed\00", align 1 @.str.31 = private unnamed_addr constant [9 x i8] c"FormatL2\00", align 1 @.str.32 = private unnamed_addr constant [9 x i8] c"FormatL4\00", align 1 @.str.33 = private unnamed_addr constant [9 x i8] c"FormatL8\00", align 1 @.str.34 = private unnamed_addr constant [10 x i8] c"FormatL16\00", align 1 @.str.35 = private unnamed_addr constant [10 x i8] c"FormatL24\00", align 1 @.str.36 = private unnamed_addr constant [10 x i8] c"FormatL32\00", align 1 @.str.37 = private unnamed_addr constant [29 x i8] c"FormatYUV420PackedSemiPlanar\00", align 1 @.str.38 = private unnamed_addr constant [29 x i8] c"FormatYUV422PackedSemiPlanar\00", align 1 @.str.39 = private unnamed_addr constant [18 x i8] c"Format18BitBGR666\00", align 1 @.str.40 = private unnamed_addr constant [20 x i8] c"Format24BitARGB6666\00", align 1 @.str.41 = private unnamed_addr constant [20 x i8] c"Format24BitABGR6666\00", align 1 @.str.42 = private unnamed_addr constant [14 x i8] c"FormatSurface\00", align 1 @.str.43 = private unnamed_addr constant [21 x i8] c"FormatYUV420Flexible\00", align 1 @.str.44 = private unnamed_addr constant [35 x i8] c"INTEL_FormatYUV420PackedSemiPlanar\00", align 1 @.str.45 = private unnamed_addr constant [41 x i8] c"INTEL_FormatYUV420PackedSemiPlanar_Tiled\00", align 1 @.str.46 = private unnamed_addr constant [28 x i8] c"QCOM_FormatYVU420SemiPlanar\00", align 1 @.str.47 = private unnamed_addr constant [40 x i8] c"QCOM_FormatYVU420PackedSemiPlanar32m4ka\00", align 1 @.str.48 = private unnamed_addr constant [40 x i8] c"QCOM_FormatYUV420PackedSemiPlanar16m2ka\00", align 1 @.str.49 = private unnamed_addr constant [48 x i8] c"QCOM_FormatYUV420PackedSemiPlanar64x32Tile2m8ka\00", align 1 @.str.50 = private unnamed_addr constant [37 x i8] c"QCOM_FORMATYUV420PackedSemiPlanar32m\00", align 1 @.str.51 = private unnamed_addr constant [46 x i8] c"QCOM_FORMATYUV420PackedSemiPlanar32mMultiView\00", align 1 @.str.52 = private unnamed_addr constant [31 x i8] c"SEC_FormatNV12TPhysicalAddress\00", align 1 @.str.53 = private unnamed_addr constant [31 x i8] c"SEC_FormatNV12LPhysicalAddress\00", align 1 @.str.54 = private unnamed_addr constant [30 x i8] c"SEC_FormatNV12LVirtualAddress\00", align 1 @.str.55 = private unnamed_addr constant [20 x i8] c"SEC_FormatNV12Tiled\00", align 1 @.str.56 = private unnamed_addr constant [31 x i8] c"SEC_FormatNV21LPhysicalAddress\00", align 1 @.str.57 = private unnamed_addr constant [21 x i8] c"SEC_FormatNV21Linear\00", align 1 @.str.58 = private unnamed_addr constant [32 x i8] c"TI_FormatYUV420PackedSemiPlanar\00", align 1 @.str.59 = private unnamed_addr constant [14 x i8] c"FormatUnknown\00", align 1 @reltable.SDL_AMediaCodec_getColorFormatName = private unnamed_addr constant [62 x i32] [i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.58 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.57 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.56 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.55 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.52 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.54 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.53 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.46 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.47 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.49 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.48 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.51 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.50 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.45 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.44 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.59 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.59 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.27 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.22 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.20 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.38 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.21 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.19 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.17 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.37 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.18 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.43 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.15 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.16 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.24 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.23 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.42 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.30 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.28 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.29 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.33 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.32 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.36 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.35 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.31 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.34 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.26 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.25 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.13 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.14 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.12 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.9 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.10 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.11 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.40 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.41 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.8 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.6 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.7 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.39 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.4 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.5 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.2 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.3 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.1 to i64), i64 ptrtoint (ptr @reltable.SDL_AMediaCodec_getColorFormatName to i64)) to i32)], align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define dso_local noundef nonnull ptr @SDL_AMediaCodec_getColorFormatName(i32 noundef %0) local_unnamed_addr #0 { %2 = add i32 %0, -128 %3 = icmp ult i32 %2, 62 br i1 %3, label %4, label %8 4: ; preds = %1 %5 = zext nneg i32 %2 to i64 %6 = shl i64 %5, 2 %7 = call ptr @llvm.load.relative.i64(ptr @reltable.SDL_AMediaCodec_getColorFormatName, i64 %6) br label %8 8: ; preds = %1, %4 %9 = phi ptr [ %7, %4 ], [ @.str.59, %1 ] ret ptr %9 } ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: read) declare ptr @llvm.load.relative.i64(ptr, i64) #1 attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: read) } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/ijkplayer/ijkmedia/ijksdl/android/extr_ijksdl_codec_android_mediadef.c_SDL_AMediaCodec_getColorFormatName.c' source_filename = "AnghaBench/ijkplayer/ijkmedia/ijksdl/android/extr_ijksdl_codec_android_mediadef.c_SDL_AMediaCodec_getColorFormatName.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [17 x i8] c"Format8bitRGB332\00", align 1 @.str.1 = private unnamed_addr constant [18 x i8] c"Format12bitRGB444\00", align 1 @.str.2 = private unnamed_addr constant [20 x i8] c"Format16bitARGB4444\00", align 1 @.str.3 = private unnamed_addr constant [20 x i8] c"Format16bitARGB1555\00", align 1 @.str.4 = private unnamed_addr constant [18 x i8] c"Format16bitRGB565\00", align 1 @.str.5 = private unnamed_addr constant [18 x i8] c"Format16bitBGR565\00", align 1 @.str.6 = private unnamed_addr constant [18 x i8] c"Format18bitRGB666\00", align 1 @.str.7 = private unnamed_addr constant [20 x i8] c"Format18bitARGB1665\00", align 1 @.str.8 = private unnamed_addr constant [20 x i8] c"Format19bitARGB1666\00", align 1 @.str.9 = private unnamed_addr constant [18 x i8] c"Format24bitRGB888\00", align 1 @.str.10 = private unnamed_addr constant [18 x i8] c"Format24bitBGR888\00", align 1 @.str.11 = private unnamed_addr constant [20 x i8] c"Format24bitARGB1887\00", align 1 @.str.12 = private unnamed_addr constant [20 x i8] c"Format25bitARGB1888\00", align 1 @.str.13 = private unnamed_addr constant [20 x i8] c"Format32bitBGRA8888\00", align 1 @.str.14 = private unnamed_addr constant [20 x i8] c"Format32bitARGB8888\00", align 1 @.str.15 = private unnamed_addr constant [19 x i8] c"FormatYUV411Planar\00", align 1 @.str.16 = private unnamed_addr constant [25 x i8] c"FormatYUV411PackedPlanar\00", align 1 @.str.17 = private unnamed_addr constant [19 x i8] c"FormatYUV420Planar\00", align 1 @.str.18 = private unnamed_addr constant [25 x i8] c"FormatYUV420PackedPlanar\00", align 1 @.str.19 = private unnamed_addr constant [23 x i8] c"FormatYUV420SemiPlanar\00", align 1 @.str.20 = private unnamed_addr constant [19 x i8] c"FormatYUV422Planar\00", align 1 @.str.21 = private unnamed_addr constant [25 x i8] c"FormatYUV422PackedPlanar\00", align 1 @.str.22 = private unnamed_addr constant [23 x i8] c"FormatYUV422SemiPlanar\00", align 1 @.str.23 = private unnamed_addr constant [13 x i8] c"FormatYCbYCr\00", align 1 @.str.24 = private unnamed_addr constant [13 x i8] c"FormatYCrYCb\00", align 1 @.str.25 = private unnamed_addr constant [13 x i8] c"FormatCbYCrY\00", align 1 @.str.26 = private unnamed_addr constant [13 x i8] c"FormatCrYCbY\00", align 1 @.str.27 = private unnamed_addr constant [24 x i8] c"FormatYUV444Interleaved\00", align 1 @.str.28 = private unnamed_addr constant [19 x i8] c"FormatRawBayer8bit\00", align 1 @.str.29 = private unnamed_addr constant [20 x i8] c"FormatRawBayer10bit\00", align 1 @.str.30 = private unnamed_addr constant [29 x i8] c"FormatRawBayer8bitcompressed\00", align 1 @.str.31 = private unnamed_addr constant [9 x i8] c"FormatL2\00", align 1 @.str.32 = private unnamed_addr constant [9 x i8] c"FormatL4\00", align 1 @.str.33 = private unnamed_addr constant [9 x i8] c"FormatL8\00", align 1 @.str.34 = private unnamed_addr constant [10 x i8] c"FormatL16\00", align 1 @.str.35 = private unnamed_addr constant [10 x i8] c"FormatL24\00", align 1 @.str.36 = private unnamed_addr constant [10 x i8] c"FormatL32\00", align 1 @.str.37 = private unnamed_addr constant [29 x i8] c"FormatYUV420PackedSemiPlanar\00", align 1 @.str.38 = private unnamed_addr constant [29 x i8] c"FormatYUV422PackedSemiPlanar\00", align 1 @.str.39 = private unnamed_addr constant [18 x i8] c"Format18BitBGR666\00", align 1 @.str.40 = private unnamed_addr constant [20 x i8] c"Format24BitARGB6666\00", align 1 @.str.41 = private unnamed_addr constant [20 x i8] c"Format24BitABGR6666\00", align 1 @.str.42 = private unnamed_addr constant [14 x i8] c"FormatSurface\00", align 1 @.str.43 = private unnamed_addr constant [21 x i8] c"FormatYUV420Flexible\00", align 1 @.str.44 = private unnamed_addr constant [35 x i8] c"INTEL_FormatYUV420PackedSemiPlanar\00", align 1 @.str.45 = private unnamed_addr constant [41 x i8] c"INTEL_FormatYUV420PackedSemiPlanar_Tiled\00", align 1 @.str.46 = private unnamed_addr constant [28 x i8] c"QCOM_FormatYVU420SemiPlanar\00", align 1 @.str.47 = private unnamed_addr constant [40 x i8] c"QCOM_FormatYVU420PackedSemiPlanar32m4ka\00", align 1 @.str.48 = private unnamed_addr constant [40 x i8] c"QCOM_FormatYUV420PackedSemiPlanar16m2ka\00", align 1 @.str.49 = private unnamed_addr constant [48 x i8] c"QCOM_FormatYUV420PackedSemiPlanar64x32Tile2m8ka\00", align 1 @.str.50 = private unnamed_addr constant [37 x i8] c"QCOM_FORMATYUV420PackedSemiPlanar32m\00", align 1 @.str.51 = private unnamed_addr constant [46 x i8] c"QCOM_FORMATYUV420PackedSemiPlanar32mMultiView\00", align 1 @.str.52 = private unnamed_addr constant [31 x i8] c"SEC_FormatNV12TPhysicalAddress\00", align 1 @.str.53 = private unnamed_addr constant [31 x i8] c"SEC_FormatNV12LPhysicalAddress\00", align 1 @.str.54 = private unnamed_addr constant [30 x i8] c"SEC_FormatNV12LVirtualAddress\00", align 1 @.str.55 = private unnamed_addr constant [20 x i8] c"SEC_FormatNV12Tiled\00", align 1 @.str.56 = private unnamed_addr constant [31 x i8] c"SEC_FormatNV21LPhysicalAddress\00", align 1 @.str.57 = private unnamed_addr constant [21 x i8] c"SEC_FormatNV21Linear\00", align 1 @.str.58 = private unnamed_addr constant [32 x i8] c"TI_FormatYUV420PackedSemiPlanar\00", align 1 @.str.59 = private unnamed_addr constant [14 x i8] c"FormatUnknown\00", align 1 @switch.table.SDL_AMediaCodec_getColorFormatName = private unnamed_addr constant [62 x ptr] [ptr @.str.58, ptr @.str.57, ptr @.str.56, ptr @.str.55, ptr @.str.52, ptr @.str.54, ptr @.str.53, ptr @.str.46, ptr @.str.47, ptr @.str.49, ptr @.str.48, ptr @.str.51, ptr @.str.50, ptr @.str.45, ptr @.str.44, ptr @.str.59, ptr @.str.59, ptr @.str.27, ptr @.str.22, ptr @.str.20, ptr @.str.38, ptr @.str.21, ptr @.str.19, ptr @.str.17, ptr @.str.37, ptr @.str.18, ptr @.str.43, ptr @.str.15, ptr @.str.16, ptr @.str.24, ptr @.str.23, ptr @.str.42, ptr @.str.30, ptr @.str.28, ptr @.str.29, ptr @.str, ptr @.str.33, ptr @.str.32, ptr @.str.36, ptr @.str.35, ptr @.str.31, ptr @.str.34, ptr @.str.26, ptr @.str.25, ptr @.str, ptr @.str.13, ptr @.str.14, ptr @.str.12, ptr @.str.9, ptr @.str.10, ptr @.str.11, ptr @.str.40, ptr @.str.41, ptr @.str.8, ptr @.str.6, ptr @.str.7, ptr @.str.39, ptr @.str.4, ptr @.str.5, ptr @.str.2, ptr @.str.3, ptr @.str.1], align 8 ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define noundef nonnull ptr @SDL_AMediaCodec_getColorFormatName(i32 noundef %0) local_unnamed_addr #0 { %2 = add i32 %0, -128 %3 = icmp ult i32 %2, 62 br i1 %3, label %4, label %8 4: ; preds = %1 %5 = zext nneg i32 %2 to i64 %6 = getelementptr inbounds [62 x ptr], ptr @switch.table.SDL_AMediaCodec_getColorFormatName, i64 0, i64 %5 %7 = load ptr, ptr %6, align 8 br label %8 8: ; preds = %1, %4 %9 = phi ptr [ %7, %4 ], [ @.str.59, %1 ] ret ptr %9 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
ijkplayer_ijkmedia_ijksdl_android_extr_ijksdl_codec_android_mediadef.c_SDL_AMediaCodec_getColorFormatName
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_parse.c_prefixify_subexp.c' source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_parse.c_prefixify_subexp.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @prefixify_subexp], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @prefixify_subexp(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) #0 { %5 = alloca i32, align 4 %6 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3 %7 = call i32 @operator_length(ptr noundef %0, i32 noundef %2, ptr noundef nonnull %5, ptr noundef nonnull %6) #3 %8 = load i32, ptr %5, align 4, !tbaa !5 %9 = sub nsw i32 %2, %8 %10 = load ptr, ptr %1, align 8, !tbaa !9 %11 = sext i32 %3 to i64 %12 = getelementptr inbounds i32, ptr %10, i64 %11 %13 = load ptr, ptr %0, align 8, !tbaa !9 %14 = sext i32 %9 to i64 %15 = getelementptr inbounds i32, ptr %13, i64 %14 %16 = call i32 @EXP_ELEM_TO_BYTES(i32 noundef %8) #3 %17 = call i32 @memcpy(ptr noundef %12, ptr noundef %15, i32 noundef %16) #3 %18 = load i32, ptr %5, align 4, !tbaa !5 %19 = add nsw i32 %18, %3 %20 = load i32, ptr %6, align 4, !tbaa !5 %21 = shl i32 %20, 2 %22 = call i64 @alloca(i32 noundef %21) #3 %23 = inttoptr i64 %22 to ptr %24 = load i32, ptr %6, align 4, !tbaa !5 %25 = icmp sgt i32 %24, 0 br i1 %25, label %26, label %53 26: ; preds = %4 %27 = zext nneg i32 %24 to i64 br label %31 28: ; preds = %31 %29 = load i32, ptr %6, align 4, !tbaa !5 %30 = icmp sgt i32 %29, 0 br i1 %30, label %40, label %53 31: ; preds = %26, %31 %32 = phi i64 [ %27, %26 ], [ %34, %31 ] %33 = phi i32 [ %9, %26 ], [ %38, %31 ] %34 = add nsw i64 %32, -1 %35 = call i32 @length_of_subexp(ptr noundef nonnull %0, i32 noundef %33) #3 store i32 %35, ptr %5, align 4, !tbaa !5 %36 = getelementptr inbounds i32, ptr %23, i64 %34 store i32 %35, ptr %36, align 4, !tbaa !5 %37 = load i32, ptr %5, align 4, !tbaa !5 %38 = sub nsw i32 %33, %37 %39 = icmp ugt i64 %32, 1 br i1 %39, label %31, label %28, !llvm.loop !12 40: ; preds = %28, %40 %41 = phi i64 [ %49, %40 ], [ 0, %28 ] %42 = phi i32 [ %46, %40 ], [ %38, %28 ] %43 = phi i32 [ %48, %40 ], [ %19, %28 ] %44 = getelementptr inbounds i32, ptr %23, i64 %41 %45 = load i32, ptr %44, align 4, !tbaa !5 store i32 %45, ptr %5, align 4, !tbaa !5 %46 = add nsw i32 %45, %42 call void @prefixify_subexp(ptr noundef nonnull %0, ptr noundef nonnull %1, i32 noundef %46, i32 noundef %43) %47 = load i32, ptr %5, align 4, !tbaa !5 %48 = add nsw i32 %47, %43 %49 = add nuw nsw i64 %41, 1 %50 = load i32, ptr %6, align 4, !tbaa !5 %51 = sext i32 %50 to i64 %52 = icmp slt i64 %49, %51 br i1 %52, label %40, label %53, !llvm.loop !14 53: ; preds = %40, %4, %28 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @operator_length(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @EXP_ELEM_TO_BYTES(i32 noundef) local_unnamed_addr #2 declare i64 @alloca(i32 noundef) local_unnamed_addr #2 declare i32 @length_of_subexp(ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"expression", !11, i64 0} !11 = !{!"any pointer", !7, i64 0} !12 = distinct !{!12, !13} !13 = !{!"llvm.loop.mustprogress"} !14 = distinct !{!14, !13}
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_parse.c_prefixify_subexp.c' source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_parse.c_prefixify_subexp.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @prefixify_subexp], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @prefixify_subexp(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) #0 { %5 = alloca i32, align 4 %6 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3 %7 = call i32 @operator_length(ptr noundef %0, i32 noundef %2, ptr noundef nonnull %5, ptr noundef nonnull %6) #3 %8 = load i32, ptr %5, align 4, !tbaa !6 %9 = sub nsw i32 %2, %8 %10 = load ptr, ptr %1, align 8, !tbaa !10 %11 = sext i32 %3 to i64 %12 = getelementptr inbounds i32, ptr %10, i64 %11 %13 = load ptr, ptr %0, align 8, !tbaa !10 %14 = sext i32 %9 to i64 %15 = getelementptr inbounds i32, ptr %13, i64 %14 %16 = call i32 @EXP_ELEM_TO_BYTES(i32 noundef %8) #3 %17 = call i32 @memcpy(ptr noundef %12, ptr noundef %15, i32 noundef %16) #3 %18 = load i32, ptr %5, align 4, !tbaa !6 %19 = add nsw i32 %18, %3 %20 = load i32, ptr %6, align 4, !tbaa !6 %21 = shl i32 %20, 2 %22 = call i64 @alloca(i32 noundef %21) #3 %23 = inttoptr i64 %22 to ptr %24 = load i32, ptr %6, align 4, !tbaa !6 %25 = icmp sgt i32 %24, 0 br i1 %25, label %26, label %53 26: ; preds = %4 %27 = zext nneg i32 %24 to i64 br label %31 28: ; preds = %31 %29 = load i32, ptr %6, align 4, !tbaa !6 %30 = icmp sgt i32 %29, 0 br i1 %30, label %40, label %53 31: ; preds = %26, %31 %32 = phi i64 [ %27, %26 ], [ %34, %31 ] %33 = phi i32 [ %9, %26 ], [ %38, %31 ] %34 = add nsw i64 %32, -1 %35 = call i32 @length_of_subexp(ptr noundef nonnull %0, i32 noundef %33) #3 store i32 %35, ptr %5, align 4, !tbaa !6 %36 = getelementptr inbounds i32, ptr %23, i64 %34 store i32 %35, ptr %36, align 4, !tbaa !6 %37 = load i32, ptr %5, align 4, !tbaa !6 %38 = sub nsw i32 %33, %37 %39 = icmp ugt i64 %32, 1 br i1 %39, label %31, label %28, !llvm.loop !13 40: ; preds = %28, %40 %41 = phi i64 [ %49, %40 ], [ 0, %28 ] %42 = phi i32 [ %46, %40 ], [ %38, %28 ] %43 = phi i32 [ %48, %40 ], [ %19, %28 ] %44 = getelementptr inbounds i32, ptr %23, i64 %41 %45 = load i32, ptr %44, align 4, !tbaa !6 store i32 %45, ptr %5, align 4, !tbaa !6 %46 = add nsw i32 %45, %42 call void @prefixify_subexp(ptr noundef nonnull %0, ptr noundef nonnull %1, i32 noundef %46, i32 noundef %43) %47 = load i32, ptr %5, align 4, !tbaa !6 %48 = add nsw i32 %47, %43 %49 = add nuw nsw i64 %41, 1 %50 = load i32, ptr %6, align 4, !tbaa !6 %51 = sext i32 %50 to i64 %52 = icmp slt i64 %49, %51 br i1 %52, label %40, label %53, !llvm.loop !15 53: ; preds = %40, %4, %28 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @operator_length(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @EXP_ELEM_TO_BYTES(i32 noundef) local_unnamed_addr #2 declare i64 @alloca(i32 noundef) local_unnamed_addr #2 declare i32 @length_of_subexp(ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"expression", !12, i64 0} !12 = !{!"any pointer", !8, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"} !15 = distinct !{!15, !14}
freebsd_contrib_gdb_gdb_extr_parse.c_prefixify_subexp
; ModuleID = 'AnghaBench/linux/tools/testing/selftests/kvm/lib/extr_sparsebit.c_sparsebit_first_set.c' source_filename = "AnghaBench/linux/tools/testing/selftests/kvm/lib/extr_sparsebit.c_sparsebit_first_set.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local i32 @sparsebit_first_set(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 @sparsebit_any_set(ptr noundef %0) #2 %3 = tail call i32 @assert(i32 noundef %2) #2 %4 = tail call ptr @node_first(ptr noundef %0) #2 %5 = tail call i32 @node_first_set(ptr noundef %4, i32 noundef 0) #2 ret i32 %5 } declare i32 @assert(i32 noundef) local_unnamed_addr #1 declare i32 @sparsebit_any_set(ptr noundef) local_unnamed_addr #1 declare ptr @node_first(ptr noundef) local_unnamed_addr #1 declare i32 @node_first_set(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/tools/testing/selftests/kvm/lib/extr_sparsebit.c_sparsebit_first_set.c' source_filename = "AnghaBench/linux/tools/testing/selftests/kvm/lib/extr_sparsebit.c_sparsebit_first_set.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define i32 @sparsebit_first_set(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 @sparsebit_any_set(ptr noundef %0) #2 %3 = tail call i32 @assert(i32 noundef %2) #2 %4 = tail call ptr @node_first(ptr noundef %0) #2 %5 = tail call i32 @node_first_set(ptr noundef %4, i32 noundef 0) #2 ret i32 %5 } declare i32 @assert(i32 noundef) local_unnamed_addr #1 declare i32 @sparsebit_any_set(ptr noundef) local_unnamed_addr #1 declare ptr @node_first(ptr noundef) local_unnamed_addr #1 declare i32 @node_first_set(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_tools_testing_selftests_kvm_lib_extr_sparsebit.c_sparsebit_first_set
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_hdmi5_core.c_hdmi_core_config_video_sampler.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_hdmi5_core.c_hdmi_core_config_video_sampler.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @HDMI_CORE_TX_INVID0 = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @hdmi_core_config_video_sampler], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @hdmi_core_config_video_sampler(ptr nocapture noundef readonly %0) #0 { %2 = load i32, ptr %0, align 4, !tbaa !5 %3 = load i32, ptr @HDMI_CORE_TX_INVID0, align 4, !tbaa !10 %4 = tail call i32 @REG_FLD_MOD(i32 noundef %2, i32 noundef %3, i32 noundef 1, i32 noundef 4, i32 noundef 0) #2 ret void } declare i32 @REG_FLD_MOD(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"hdmi_core_data", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_hdmi5_core.c_hdmi_core_config_video_sampler.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_hdmi5_core.c_hdmi_core_config_video_sampler.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @HDMI_CORE_TX_INVID0 = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @hdmi_core_config_video_sampler], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @hdmi_core_config_video_sampler(ptr nocapture noundef readonly %0) #0 { %2 = load i32, ptr %0, align 4, !tbaa !6 %3 = load i32, ptr @HDMI_CORE_TX_INVID0, align 4, !tbaa !11 %4 = tail call i32 @REG_FLD_MOD(i32 noundef %2, i32 noundef %3, i32 noundef 1, i32 noundef 4, i32 noundef 0) #2 ret void } declare i32 @REG_FLD_MOD(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"hdmi_core_data", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0}
linux_drivers_gpu_drm_omapdrm_dss_extr_hdmi5_core.c_hdmi_core_config_video_sampler
; ModuleID = 'AnghaBench/linux/drivers/md/extr_dm-thin.c_process_thin_deferred_bios.c' source_filename = "AnghaBench/linux/drivers/md/extr_dm-thin.c_process_thin_deferred_bios.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.bio_list = type { i32 } %struct.blk_plug = type { i32 } %struct.thin_c = type { i32, %struct.bio_list, i64, ptr } %struct.pool = type { i32, i32, ptr, ptr } @BLK_STS_DM_REQUEUE = dso_local local_unnamed_addr global i32 0, align 4 @REQ_OP_DISCARD = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @process_thin_deferred_bios], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @process_thin_deferred_bios(ptr noundef %0) #0 { %2 = alloca %struct.bio_list, align 4 %3 = alloca %struct.blk_plug, align 4 %4 = getelementptr inbounds %struct.thin_c, ptr %0, i64 0, i32 3 %5 = load ptr, ptr %4, align 8, !tbaa !5 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %6 = getelementptr inbounds %struct.thin_c, ptr %0, i64 0, i32 2 %7 = load i64, ptr %6, align 8, !tbaa !13 %8 = icmp eq i64 %7, 0 br i1 %8, label %13, label %9 9: ; preds = %1 %10 = getelementptr inbounds %struct.thin_c, ptr %0, i64 0, i32 1 %11 = load i32, ptr @BLK_STS_DM_REQUEUE, align 4, !tbaa !14 %12 = tail call i32 @error_thin_bio_list(ptr noundef nonnull %0, ptr noundef nonnull %10, i32 noundef %11) #3 br label %62 13: ; preds = %1 %14 = call i32 @bio_list_init(ptr noundef nonnull %2) #3 %15 = call i32 @spin_lock_irqsave(ptr noundef nonnull %0, i64 noundef undef) #3 %16 = getelementptr inbounds %struct.thin_c, ptr %0, i64 0, i32 1 %17 = call i64 @bio_list_empty(ptr noundef nonnull %16) #3 %18 = icmp eq i64 %17, 0 br i1 %18, label %21, label %19 19: ; preds = %13 %20 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %0, i64 noundef undef) #3 br label %62 21: ; preds = %13 %22 = call i32 @__sort_thin_deferred_bios(ptr noundef nonnull %0) #3 %23 = call i32 @bio_list_merge(ptr noundef nonnull %2, ptr noundef nonnull %16) #3 %24 = call i32 @bio_list_init(ptr noundef nonnull %16) #3 %25 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %0, i64 noundef undef) #3 %26 = call i32 @blk_start_plug(ptr noundef nonnull %3) #3 %27 = call ptr @bio_list_pop(ptr noundef nonnull %2) #3 %28 = icmp eq ptr %27, null br i1 %28, label %60, label %29 29: ; preds = %21 %30 = getelementptr inbounds %struct.pool, ptr %5, i64 0, i32 2 %31 = getelementptr inbounds %struct.pool, ptr %5, i64 0, i32 3 %32 = getelementptr inbounds %struct.pool, ptr %5, i64 0, i32 1 br label %33 33: ; preds = %29, %57 %34 = phi ptr [ %27, %29 ], [ %58, %57 ] %35 = phi i32 [ 0, %29 ], [ %50, %57 ] %36 = call i64 @ensure_next_mapping(ptr noundef %5) #3 %37 = icmp eq i64 %36, 0 br i1 %37, label %43, label %38 38: ; preds = %33 %39 = call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #3 %40 = call i32 @bio_list_add(ptr noundef nonnull %16, ptr noundef nonnull %34) #3 %41 = call i32 @bio_list_merge(ptr noundef nonnull %16, ptr noundef nonnull %2) #3 %42 = call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #3 br label %60 43: ; preds = %33 %44 = call i64 @bio_op(ptr noundef nonnull %34) #3 %45 = load i64, ptr @REQ_OP_DISCARD, align 8, !tbaa !15 %46 = icmp eq i64 %44, %45 %47 = select i1 %46, ptr %31, ptr %30 %48 = load ptr, ptr %47, align 8, !tbaa !16 %49 = call i32 %48(ptr noundef %0, ptr noundef nonnull %34) #3 %50 = add i32 %35, 1 %51 = and i32 %35, 127 %52 = icmp eq i32 %51, 0 br i1 %52, label %53, label %57 53: ; preds = %43 %54 = call i32 @throttle_work_update(ptr noundef nonnull %32) #3 %55 = load i32, ptr %5, align 8, !tbaa !17 %56 = call i32 @dm_pool_issue_prefetches(i32 noundef %55) #3 br label %57 57: ; preds = %53, %43 %58 = call ptr @bio_list_pop(ptr noundef nonnull %2) #3 %59 = icmp eq ptr %58, null br i1 %59, label %60, label %33, !llvm.loop !19 60: ; preds = %57, %21, %38 %61 = call i32 @blk_finish_plug(ptr noundef nonnull %3) #3 br label %62 62: ; preds = %60, %19, %9 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @error_thin_bio_list(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @bio_list_init(ptr noundef) local_unnamed_addr #2 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #2 declare i64 @bio_list_empty(ptr noundef) local_unnamed_addr #2 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @__sort_thin_deferred_bios(ptr noundef) local_unnamed_addr #2 declare i32 @bio_list_merge(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @blk_start_plug(ptr noundef) local_unnamed_addr #2 declare ptr @bio_list_pop(ptr noundef) local_unnamed_addr #2 declare i64 @ensure_next_mapping(ptr noundef) local_unnamed_addr #2 declare i32 @bio_list_add(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @bio_op(ptr noundef) local_unnamed_addr #2 declare i32 @throttle_work_update(ptr noundef) local_unnamed_addr #2 declare i32 @dm_pool_issue_prefetches(i32 noundef) local_unnamed_addr #2 declare i32 @blk_finish_plug(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !12, i64 16} !6 = !{!"thin_c", !7, i64 0, !10, i64 4, !11, i64 8, !12, i64 16} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"bio_list", !7, i64 0} !11 = !{!"long", !8, i64 0} !12 = !{!"any pointer", !8, i64 0} !13 = !{!6, !11, i64 8} !14 = !{!7, !7, i64 0} !15 = !{!11, !11, i64 0} !16 = !{!12, !12, i64 0} !17 = !{!18, !7, i64 0} !18 = !{!"pool", !7, i64 0, !7, i64 4, !12, i64 8, !12, i64 16} !19 = distinct !{!19, !20} !20 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/drivers/md/extr_dm-thin.c_process_thin_deferred_bios.c' source_filename = "AnghaBench/linux/drivers/md/extr_dm-thin.c_process_thin_deferred_bios.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.bio_list = type { i32 } %struct.blk_plug = type { i32 } @BLK_STS_DM_REQUEUE = common local_unnamed_addr global i32 0, align 4 @REQ_OP_DISCARD = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @process_thin_deferred_bios], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @process_thin_deferred_bios(ptr noundef %0) #0 { %2 = alloca %struct.bio_list, align 4 %3 = alloca %struct.blk_plug, align 4 %4 = getelementptr inbounds i8, ptr %0, i64 16 %5 = load ptr, ptr %4, align 8, !tbaa !6 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %6 = getelementptr inbounds i8, ptr %0, i64 8 %7 = load i64, ptr %6, align 8, !tbaa !14 %8 = icmp eq i64 %7, 0 br i1 %8, label %13, label %9 9: ; preds = %1 %10 = getelementptr inbounds i8, ptr %0, i64 4 %11 = load i32, ptr @BLK_STS_DM_REQUEUE, align 4, !tbaa !15 %12 = tail call i32 @error_thin_bio_list(ptr noundef nonnull %0, ptr noundef nonnull %10, i32 noundef %11) #3 br label %61 13: ; preds = %1 %14 = call i32 @bio_list_init(ptr noundef nonnull %2) #3 %15 = call i32 @spin_lock_irqsave(ptr noundef nonnull %0, i64 noundef undef) #3 %16 = getelementptr inbounds i8, ptr %0, i64 4 %17 = call i64 @bio_list_empty(ptr noundef nonnull %16) #3 %18 = icmp eq i64 %17, 0 br i1 %18, label %21, label %19 19: ; preds = %13 %20 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %0, i64 noundef undef) #3 br label %61 21: ; preds = %13 %22 = call i32 @__sort_thin_deferred_bios(ptr noundef nonnull %0) #3 %23 = call i32 @bio_list_merge(ptr noundef nonnull %2, ptr noundef nonnull %16) #3 %24 = call i32 @bio_list_init(ptr noundef nonnull %16) #3 %25 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %0, i64 noundef undef) #3 %26 = call i32 @blk_start_plug(ptr noundef nonnull %3) #3 %27 = call ptr @bio_list_pop(ptr noundef nonnull %2) #3 %28 = icmp eq ptr %27, null br i1 %28, label %59, label %29 29: ; preds = %21 %30 = getelementptr inbounds i8, ptr %5, i64 4 br label %31 31: ; preds = %29, %56 %32 = phi ptr [ %27, %29 ], [ %57, %56 ] %33 = phi i32 [ 0, %29 ], [ %49, %56 ] %34 = call i64 @ensure_next_mapping(ptr noundef %5) #3 %35 = icmp eq i64 %34, 0 br i1 %35, label %41, label %36 36: ; preds = %31 %37 = call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #3 %38 = call i32 @bio_list_add(ptr noundef nonnull %16, ptr noundef nonnull %32) #3 %39 = call i32 @bio_list_merge(ptr noundef nonnull %16, ptr noundef nonnull %2) #3 %40 = call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #3 br label %59 41: ; preds = %31 %42 = call i64 @bio_op(ptr noundef nonnull %32) #3 %43 = load i64, ptr @REQ_OP_DISCARD, align 8, !tbaa !16 %44 = icmp eq i64 %42, %43 %45 = select i1 %44, i64 16, i64 8 %46 = getelementptr inbounds i8, ptr %5, i64 %45 %47 = load ptr, ptr %46, align 8, !tbaa !17 %48 = call i32 %47(ptr noundef %0, ptr noundef nonnull %32) #3 %49 = add i32 %33, 1 %50 = and i32 %33, 127 %51 = icmp eq i32 %50, 0 br i1 %51, label %52, label %56 52: ; preds = %41 %53 = call i32 @throttle_work_update(ptr noundef nonnull %30) #3 %54 = load i32, ptr %5, align 8, !tbaa !18 %55 = call i32 @dm_pool_issue_prefetches(i32 noundef %54) #3 br label %56 56: ; preds = %52, %41 %57 = call ptr @bio_list_pop(ptr noundef nonnull %2) #3 %58 = icmp eq ptr %57, null br i1 %58, label %59, label %31, !llvm.loop !20 59: ; preds = %56, %21, %36 %60 = call i32 @blk_finish_plug(ptr noundef nonnull %3) #3 br label %61 61: ; preds = %59, %19, %9 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @error_thin_bio_list(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @bio_list_init(ptr noundef) local_unnamed_addr #2 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #2 declare i64 @bio_list_empty(ptr noundef) local_unnamed_addr #2 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @__sort_thin_deferred_bios(ptr noundef) local_unnamed_addr #2 declare i32 @bio_list_merge(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @blk_start_plug(ptr noundef) local_unnamed_addr #2 declare ptr @bio_list_pop(ptr noundef) local_unnamed_addr #2 declare i64 @ensure_next_mapping(ptr noundef) local_unnamed_addr #2 declare i32 @bio_list_add(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @bio_op(ptr noundef) local_unnamed_addr #2 declare i32 @throttle_work_update(ptr noundef) local_unnamed_addr #2 declare i32 @dm_pool_issue_prefetches(i32 noundef) local_unnamed_addr #2 declare i32 @blk_finish_plug(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !13, i64 16} !7 = !{!"thin_c", !8, i64 0, !11, i64 4, !12, i64 8, !13, i64 16} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"bio_list", !8, i64 0} !12 = !{!"long", !9, i64 0} !13 = !{!"any pointer", !9, i64 0} !14 = !{!7, !12, i64 8} !15 = !{!8, !8, i64 0} !16 = !{!12, !12, i64 0} !17 = !{!13, !13, i64 0} !18 = !{!19, !8, i64 0} !19 = !{!"pool", !8, i64 0, !8, i64 4, !13, i64 8, !13, i64 16} !20 = distinct !{!20, !21} !21 = !{!"llvm.loop.mustprogress"}
linux_drivers_md_extr_dm-thin.c_process_thin_deferred_bios
; ModuleID = 'AnghaBench/bitwise/ion/extr_type.c_type_padding.c' source_filename = "AnghaBench/bitwise/ion/extr_type.c_type_padding.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i64, i64 } @TYPE_COMPLETING = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind uwtable define dso_local i64 @type_padding(ptr nocapture noundef readonly %0) local_unnamed_addr #0 { %2 = load i64, ptr %0, align 8, !tbaa !5 %3 = load i64, ptr @TYPE_COMPLETING, align 8, !tbaa !10 %4 = icmp sgt i64 %2, %3 %5 = zext i1 %4 to i32 %6 = tail call i32 @assert(i32 noundef %5) #2 %7 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1 %8 = load i64, ptr %7, align 8, !tbaa !11 ret i64 %8 } declare i32 @assert(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_3__", !7, i64 0, !7, i64 8} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0} !11 = !{!6, !7, i64 8}
; ModuleID = 'AnghaBench/bitwise/ion/extr_type.c_type_padding.c' source_filename = "AnghaBench/bitwise/ion/extr_type.c_type_padding.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @TYPE_COMPLETING = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define i64 @type_padding(ptr nocapture noundef readonly %0) local_unnamed_addr #0 { %2 = load i64, ptr %0, align 8, !tbaa !6 %3 = load i64, ptr @TYPE_COMPLETING, align 8, !tbaa !11 %4 = icmp sgt i64 %2, %3 %5 = zext i1 %4 to i32 %6 = tail call i32 @assert(i32 noundef %5) #2 %7 = getelementptr inbounds i8, ptr %0, i64 8 %8 = load i64, ptr %7, align 8, !tbaa !12 ret i64 %8 } declare i32 @assert(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_3__", !8, i64 0, !8, i64 8} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0} !12 = !{!7, !8, i64 8}
bitwise_ion_extr_type.c_type_padding
; ModuleID = 'AnghaBench/glfw/deps/extr_tinycthread.c_thrd_yield.c' source_filename = "AnghaBench/glfw/deps/extr_tinycthread.c_thrd_yield.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local void @thrd_yield() local_unnamed_addr #0 { %1 = tail call i32 (...) @sched_yield() #2 ret void } declare i32 @sched_yield(...) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/glfw/deps/extr_tinycthread.c_thrd_yield.c' source_filename = "AnghaBench/glfw/deps/extr_tinycthread.c_thrd_yield.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @thrd_yield() local_unnamed_addr #0 { %1 = tail call i32 @sched_yield() #2 ret void } declare i32 @sched_yield(...) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
glfw_deps_extr_tinycthread.c_thrd_yield
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_tree-data-ref.c_free_data_ref.c' source_filename = "AnghaBench/freebsd/contrib/gcc/extr_tree-data-ref.c_free_data_ref.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @free_data_ref], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @free_data_ref(i32 noundef %0) #0 { %2 = tail call i32 @DR_FREE_ACCESS_FNS(i32 noundef %0) #2 %3 = tail call i32 @free(i32 noundef %0) #2 ret void } declare i32 @DR_FREE_ACCESS_FNS(i32 noundef) local_unnamed_addr #1 declare i32 @free(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_tree-data-ref.c_free_data_ref.c' source_filename = "AnghaBench/freebsd/contrib/gcc/extr_tree-data-ref.c_free_data_ref.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @free_data_ref], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @free_data_ref(i32 noundef %0) #0 { %2 = tail call i32 @DR_FREE_ACCESS_FNS(i32 noundef %0) #2 %3 = tail call i32 @free(i32 noundef %0) #2 ret void } declare i32 @DR_FREE_ACCESS_FNS(i32 noundef) local_unnamed_addr #1 declare i32 @free(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
freebsd_contrib_gcc_extr_tree-data-ref.c_free_data_ref
; ModuleID = 'AnghaBench/Provenance/Cores/Atari800/atari800-src/extr_remez.c_CalcParms.c' source_filename = "AnghaBench/Provenance/Cores/Atari800/atari800-src/extr_remez.c_CalcParms.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @Pi2 = dso_local local_unnamed_addr constant double 0.000000e+00, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @CalcParms], section "llvm.metadata" ; Function Attrs: nofree nounwind memory(write, argmem: readwrite) uwtable define internal void @CalcParms(i32 noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, ptr nocapture noundef readonly %4, ptr nocapture noundef %5, ptr nocapture noundef %6, ptr nocapture noundef writeonly %7) #0 { %9 = icmp slt i32 %0, 0 br i1 %9, label %208, label %10 10: ; preds = %8 %11 = add nuw i32 %0, 1 %12 = zext i32 %11 to i64 %13 = add nsw i64 %12, -1 %14 = and i64 %12, 1 %15 = icmp eq i64 %13, 0 br i1 %15, label %41, label %16 16: ; preds = %10 %17 = and i64 %12, 4294967294 br label %18 18: ; preds = %18, %16 %19 = phi i64 [ 0, %16 ], [ %38, %18 ] %20 = phi i64 [ 0, %16 ], [ %39, %18 ] %21 = getelementptr inbounds i32, ptr %1, i64 %19 %22 = load i32, ptr %21, align 4, !tbaa !5 %23 = sext i32 %22 to i64 %24 = getelementptr inbounds double, ptr %2, i64 %23 %25 = load double, ptr %24, align 8, !tbaa !9 %26 = fmul double %25, 0.000000e+00 %27 = tail call double @cos(double noundef %26) #3 %28 = getelementptr inbounds double, ptr %6, i64 %19 store double %27, ptr %28, align 8, !tbaa !9 %29 = or disjoint i64 %19, 1 %30 = getelementptr inbounds i32, ptr %1, i64 %29 %31 = load i32, ptr %30, align 4, !tbaa !5 %32 = sext i32 %31 to i64 %33 = getelementptr inbounds double, ptr %2, i64 %32 %34 = load double, ptr %33, align 8, !tbaa !9 %35 = fmul double %34, 0.000000e+00 %36 = tail call double @cos(double noundef %35) #3 %37 = getelementptr inbounds double, ptr %6, i64 %29 store double %36, ptr %37, align 8, !tbaa !9 %38 = add nuw nsw i64 %19, 2 %39 = add i64 %20, 2 %40 = icmp eq i64 %39, %17 br i1 %40, label %41, label %18, !llvm.loop !11 41: ; preds = %18, %10 %42 = phi i64 [ 0, %10 ], [ %38, %18 ] %43 = icmp eq i64 %14, 0 br i1 %43, label %53, label %44 44: ; preds = %41 %45 = getelementptr inbounds i32, ptr %1, i64 %42 %46 = load i32, ptr %45, align 4, !tbaa !5 %47 = sext i32 %46 to i64 %48 = getelementptr inbounds double, ptr %2, i64 %47 %49 = load double, ptr %48, align 8, !tbaa !9 %50 = fmul double %49, 0.000000e+00 %51 = tail call double @cos(double noundef %50) #3 %52 = getelementptr inbounds double, ptr %6, i64 %42 store double %51, ptr %52, align 8, !tbaa !9 br label %53 53: ; preds = %41, %44 br i1 %9, label %208, label %54 54: ; preds = %53 %55 = add nsw i32 %0, -1 %56 = sdiv i32 %55, 15 %57 = add nuw nsw i32 %56, 1 %58 = zext nneg i32 %57 to i64 %59 = zext nneg i32 %0 to i64 %60 = add nuw nsw i32 %56, 1 %61 = add nuw i32 %0, 1 %62 = zext i32 %61 to i64 %63 = zext nneg i32 %60 to i64 br label %70 64: ; preds = %97 br i1 %9, label %208, label %65 65: ; preds = %64 %66 = and i64 %12, 1 %67 = icmp eq i64 %13, 0 br i1 %67, label %138, label %68 68: ; preds = %65 %69 = and i64 %12, 4294967294 br label %105 70: ; preds = %97, %54 %71 = phi i64 [ 0, %54 ], [ %103, %97 ] %72 = getelementptr inbounds double, ptr %6, i64 %71 %73 = load double, ptr %72, align 8, !tbaa !9 br label %74 74: ; preds = %70, %93 %75 = phi i64 [ 0, %70 ], [ %95, %93 ] %76 = phi double [ 1.000000e+00, %70 ], [ %94, %93 ] %77 = trunc i64 %75 to i32 %78 = icmp sgt i32 %77, %0 br i1 %78, label %93, label %79 79: ; preds = %74, %89 %80 = phi i64 [ %91, %89 ], [ %75, %74 ] %81 = phi double [ %90, %89 ], [ %76, %74 ] %82 = icmp eq i64 %80, %71 br i1 %82, label %89, label %83 83: ; preds = %79 %84 = getelementptr inbounds double, ptr %6, i64 %80 %85 = load double, ptr %84, align 8, !tbaa !9 %86 = fsub double %73, %85 %87 = fmul double %86, 2.000000e+00 %88 = fmul double %81, %87 br label %89 89: ; preds = %79, %83 %90 = phi double [ %88, %83 ], [ %81, %79 ] %91 = add i64 %80, %58 %92 = icmp sgt i64 %91, %59 br i1 %92, label %93, label %79, !llvm.loop !13 93: ; preds = %89, %74 %94 = phi double [ %76, %74 ], [ %90, %89 ] %95 = add nuw nsw i64 %75, 1 %96 = icmp eq i64 %95, %63 br i1 %96, label %97, label %74, !llvm.loop !14 97: ; preds = %93 %98 = tail call double @llvm.fabs.f64(double %94) %99 = fcmp olt double %98, 1.000000e-05 %100 = fdiv double 1.000000e+00, %94 %101 = select i1 %99, double 0x40F869FFFFFFFFFF, double %100 %102 = getelementptr inbounds double, ptr %5, i64 %71 store double %101, ptr %102, align 8, !tbaa !9 %103 = add nuw nsw i64 %71, 1 %104 = icmp eq i64 %103, %62 br i1 %104, label %64, label %70, !llvm.loop !15 105: ; preds = %105, %68 %106 = phi i64 [ 0, %68 ], [ %135, %105 ] %107 = phi double [ 0.000000e+00, %68 ], [ %130, %105 ] %108 = phi double [ 0.000000e+00, %68 ], [ %134, %105 ] %109 = phi i64 [ 0, %68 ], [ %136, %105 ] %110 = getelementptr inbounds double, ptr %5, i64 %106 %111 = load double, ptr %110, align 8, !tbaa !9 %112 = getelementptr inbounds i32, ptr %1, i64 %106 %113 = load i32, ptr %112, align 4, !tbaa !5 %114 = sext i32 %113 to i64 %115 = getelementptr inbounds double, ptr %3, i64 %114 %116 = load double, ptr %115, align 8, !tbaa !9 %117 = tail call double @llvm.fmuladd.f64(double %111, double %116, double %107) %118 = getelementptr inbounds double, ptr %4, i64 %114 %119 = load double, ptr %118, align 8, !tbaa !9 %120 = fdiv double %111, %119 %121 = fadd double %108, %120 %122 = or disjoint i64 %106, 1 %123 = getelementptr inbounds double, ptr %5, i64 %122 %124 = load double, ptr %123, align 8, !tbaa !9 %125 = getelementptr inbounds i32, ptr %1, i64 %122 %126 = load i32, ptr %125, align 4, !tbaa !5 %127 = sext i32 %126 to i64 %128 = getelementptr inbounds double, ptr %3, i64 %127 %129 = load double, ptr %128, align 8, !tbaa !9 %130 = tail call double @llvm.fmuladd.f64(double %124, double %129, double %117) %131 = getelementptr inbounds double, ptr %4, i64 %127 %132 = load double, ptr %131, align 8, !tbaa !9 %133 = fdiv double %124, %132 %134 = fsub double %121, %133 %135 = add nuw nsw i64 %106, 2 %136 = add i64 %109, 2 %137 = icmp eq i64 %136, %69 br i1 %137, label %138, label %105, !llvm.loop !16 138: ; preds = %105, %65 %139 = phi double [ undef, %65 ], [ %130, %105 ] %140 = phi double [ undef, %65 ], [ %134, %105 ] %141 = phi i64 [ 0, %65 ], [ %135, %105 ] %142 = phi double [ 0.000000e+00, %65 ], [ %130, %105 ] %143 = phi double [ 0.000000e+00, %65 ], [ %134, %105 ] %144 = icmp eq i64 %66, 0 br i1 %144, label %158, label %145 145: ; preds = %138 %146 = getelementptr inbounds double, ptr %5, i64 %141 %147 = load double, ptr %146, align 8, !tbaa !9 %148 = getelementptr inbounds i32, ptr %1, i64 %141 %149 = load i32, ptr %148, align 4, !tbaa !5 %150 = sext i32 %149 to i64 %151 = getelementptr inbounds double, ptr %3, i64 %150 %152 = load double, ptr %151, align 8, !tbaa !9 %153 = tail call double @llvm.fmuladd.f64(double %147, double %152, double %142) %154 = getelementptr inbounds double, ptr %4, i64 %150 %155 = load double, ptr %154, align 8, !tbaa !9 %156 = fdiv double %147, %155 %157 = fadd double %143, %156 br label %158 158: ; preds = %138, %145 %159 = phi double [ %139, %138 ], [ %153, %145 ] %160 = phi double [ %140, %138 ], [ %157, %145 ] %161 = fdiv double %159, %160 br i1 %9, label %208, label %162 162: ; preds = %158 %163 = and i64 %12, 1 %164 = icmp eq i64 %13, 0 br i1 %164, label %194, label %165 165: ; preds = %162 %166 = and i64 %12, 4294967294 br label %167 167: ; preds = %167, %165 %168 = phi i64 [ 0, %165 ], [ %191, %167 ] %169 = phi i64 [ 0, %165 ], [ %192, %167 ] %170 = getelementptr inbounds i32, ptr %1, i64 %168 %171 = load i32, ptr %170, align 4, !tbaa !5 %172 = sext i32 %171 to i64 %173 = getelementptr inbounds double, ptr %3, i64 %172 %174 = load double, ptr %173, align 8, !tbaa !9 %175 = getelementptr inbounds double, ptr %4, i64 %172 %176 = load double, ptr %175, align 8, !tbaa !9 %177 = fdiv double %161, %176 %178 = fsub double %174, %177 %179 = getelementptr inbounds double, ptr %7, i64 %168 store double %178, ptr %179, align 8, !tbaa !9 %180 = or disjoint i64 %168, 1 %181 = getelementptr inbounds i32, ptr %1, i64 %180 %182 = load i32, ptr %181, align 4, !tbaa !5 %183 = sext i32 %182 to i64 %184 = getelementptr inbounds double, ptr %3, i64 %183 %185 = load double, ptr %184, align 8, !tbaa !9 %186 = getelementptr inbounds double, ptr %4, i64 %183 %187 = load double, ptr %186, align 8, !tbaa !9 %188 = fdiv double %161, %187 %189 = fadd double %185, %188 %190 = getelementptr inbounds double, ptr %7, i64 %180 store double %189, ptr %190, align 8, !tbaa !9 %191 = add nuw nsw i64 %168, 2 %192 = add i64 %169, 2 %193 = icmp eq i64 %192, %166 br i1 %193, label %194, label %167, !llvm.loop !17 194: ; preds = %167, %162 %195 = phi i64 [ 0, %162 ], [ %191, %167 ] %196 = icmp eq i64 %163, 0 br i1 %196, label %208, label %197 197: ; preds = %194 %198 = getelementptr inbounds i32, ptr %1, i64 %195 %199 = load i32, ptr %198, align 4, !tbaa !5 %200 = sext i32 %199 to i64 %201 = getelementptr inbounds double, ptr %3, i64 %200 %202 = load double, ptr %201, align 8, !tbaa !9 %203 = getelementptr inbounds double, ptr %4, i64 %200 %204 = load double, ptr %203, align 8, !tbaa !9 %205 = fdiv double %161, %204 %206 = fsub double %202, %205 %207 = getelementptr inbounds double, ptr %7, i64 %195 store double %206, ptr %207, align 8, !tbaa !9 br label %208 208: ; preds = %197, %194, %8, %53, %64, %158 ret void } ; Function Attrs: mustprogress nofree nounwind willreturn memory(write) declare double @cos(double noundef) local_unnamed_addr #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) declare double @llvm.fabs.f64(double) #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) declare double @llvm.fmuladd.f64(double, double, double) #2 attributes #0 = { nofree nounwind memory(write, argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"double", !7, i64 0} !11 = distinct !{!11, !12} !12 = !{!"llvm.loop.mustprogress"} !13 = distinct !{!13, !12} !14 = distinct !{!14, !12} !15 = distinct !{!15, !12} !16 = distinct !{!16, !12} !17 = distinct !{!17, !12}
; ModuleID = 'AnghaBench/Provenance/Cores/Atari800/atari800-src/extr_remez.c_CalcParms.c' source_filename = "AnghaBench/Provenance/Cores/Atari800/atari800-src/extr_remez.c_CalcParms.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @Pi2 = common local_unnamed_addr global double 0.000000e+00, align 8 @llvm.used = appending global [1 x ptr] [ptr @CalcParms], section "llvm.metadata" ; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) define internal void @CalcParms(i32 noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, ptr nocapture noundef readonly %4, ptr nocapture noundef %5, ptr nocapture noundef %6, ptr nocapture noundef writeonly %7) #0 { %9 = icmp slt i32 %0, 0 br i1 %9, label %107, label %10 10: ; preds = %8 %11 = add nuw i32 %0, 1 %12 = zext i32 %11 to i64 br label %13 13: ; preds = %10, %13 %14 = phi i64 [ 0, %10 ], [ %24, %13 ] %15 = load double, ptr @Pi2, align 8, !tbaa !6 %16 = getelementptr inbounds i32, ptr %1, i64 %14 %17 = load i32, ptr %16, align 4, !tbaa !10 %18 = sext i32 %17 to i64 %19 = getelementptr inbounds double, ptr %2, i64 %18 %20 = load double, ptr %19, align 8, !tbaa !6 %21 = fmul double %15, %20 %22 = tail call double @llvm.cos.f64(double %21) %23 = getelementptr inbounds double, ptr %6, i64 %14 store double %22, ptr %23, align 8, !tbaa !6 %24 = add nuw nsw i64 %14, 1 %25 = icmp eq i64 %24, %12 br i1 %25, label %26, label %13, !llvm.loop !12 26: ; preds = %13 %27 = add nsw i32 %0, -1 %28 = sdiv i32 %27, 15 %29 = add nuw nsw i32 %28, 1 %30 = zext nneg i32 %29 to i64 %31 = zext nneg i32 %0 to i64 br label %32 32: ; preds = %59, %26 %33 = phi i64 [ 0, %26 ], [ %65, %59 ] %34 = getelementptr inbounds double, ptr %6, i64 %33 %35 = load double, ptr %34, align 8, !tbaa !6 br label %36 36: ; preds = %32, %55 %37 = phi i64 [ 0, %32 ], [ %57, %55 ] %38 = phi double [ 1.000000e+00, %32 ], [ %56, %55 ] %39 = trunc i64 %37 to i32 %40 = icmp sgt i32 %39, %0 br i1 %40, label %55, label %41 41: ; preds = %36, %51 %42 = phi i64 [ %53, %51 ], [ %37, %36 ] %43 = phi double [ %52, %51 ], [ %38, %36 ] %44 = icmp eq i64 %42, %33 br i1 %44, label %51, label %45 45: ; preds = %41 %46 = getelementptr inbounds double, ptr %6, i64 %42 %47 = load double, ptr %46, align 8, !tbaa !6 %48 = fsub double %35, %47 %49 = fmul double %48, 2.000000e+00 %50 = fmul double %43, %49 br label %51 51: ; preds = %41, %45 %52 = phi double [ %50, %45 ], [ %43, %41 ] %53 = add nuw nsw i64 %42, %30 %54 = icmp ugt i64 %53, %31 br i1 %54, label %55, label %41, !llvm.loop !14 55: ; preds = %51, %36 %56 = phi double [ %38, %36 ], [ %52, %51 ] %57 = add nuw nsw i64 %37, 1 %58 = icmp eq i64 %57, %30 br i1 %58, label %59, label %36, !llvm.loop !15 59: ; preds = %55 %60 = tail call double @llvm.fabs.f64(double %56) %61 = fcmp olt double %60, 1.000000e-05 %62 = fdiv double 1.000000e+00, %56 %63 = select i1 %61, double 0x40F869FFFFFFFFFF, double %62 %64 = getelementptr inbounds double, ptr %5, i64 %33 store double %63, ptr %64, align 8, !tbaa !6 %65 = add nuw nsw i64 %33, 1 %66 = icmp eq i64 %65, %12 br i1 %66, label %67, label %32, !llvm.loop !16 67: ; preds = %59, %67 %68 = phi i64 [ %86, %67 ], [ 0, %59 ] %69 = phi double [ %79, %67 ], [ 0.000000e+00, %59 ] %70 = phi double [ %84, %67 ], [ 0.000000e+00, %59 ] %71 = phi double [ %85, %67 ], [ 1.000000e+00, %59 ] %72 = getelementptr inbounds double, ptr %5, i64 %68 %73 = load double, ptr %72, align 8, !tbaa !6 %74 = getelementptr inbounds i32, ptr %1, i64 %68 %75 = load i32, ptr %74, align 4, !tbaa !10 %76 = sext i32 %75 to i64 %77 = getelementptr inbounds double, ptr %3, i64 %76 %78 = load double, ptr %77, align 8, !tbaa !6 %79 = tail call double @llvm.fmuladd.f64(double %73, double %78, double %69) %80 = fmul double %71, %73 %81 = getelementptr inbounds double, ptr %4, i64 %76 %82 = load double, ptr %81, align 8, !tbaa !6 %83 = fdiv double %80, %82 %84 = fadd double %70, %83 %85 = fneg double %71 %86 = add nuw nsw i64 %68, 1 %87 = icmp eq i64 %86, %12 br i1 %87, label %88, label %67, !llvm.loop !17 88: ; preds = %67 %89 = fdiv double %79, %84 br label %90 90: ; preds = %88, %90 %91 = phi i64 [ 0, %88 ], [ %105, %90 ] %92 = phi double [ 1.000000e+00, %88 ], [ %104, %90 ] %93 = getelementptr inbounds i32, ptr %1, i64 %91 %94 = load i32, ptr %93, align 4, !tbaa !10 %95 = sext i32 %94 to i64 %96 = getelementptr inbounds double, ptr %3, i64 %95 %97 = load double, ptr %96, align 8, !tbaa !6 %98 = fmul double %89, %92 %99 = getelementptr inbounds double, ptr %4, i64 %95 %100 = load double, ptr %99, align 8, !tbaa !6 %101 = fdiv double %98, %100 %102 = fsub double %97, %101 %103 = getelementptr inbounds double, ptr %7, i64 %91 store double %102, ptr %103, align 8, !tbaa !6 %104 = fneg double %92 %105 = add nuw nsw i64 %91, 1 %106 = icmp eq i64 %105, %12 br i1 %106, label %107, label %90, !llvm.loop !18 107: ; preds = %90, %8 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) declare double @llvm.cos.f64(double) #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) declare double @llvm.fabs.f64(double) #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) declare double @llvm.fmuladd.f64(double, double, double) #1 attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"double", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = distinct !{!12, !13} !13 = !{!"llvm.loop.mustprogress"} !14 = distinct !{!14, !13} !15 = distinct !{!15, !13} !16 = distinct !{!16, !13} !17 = distinct !{!17, !13} !18 = distinct !{!18, !13}
Provenance_Cores_Atari800_atari800-src_extr_remez.c_CalcParms
; ModuleID = 'AnghaBench/linux/drivers/char/ipmi/extr_ipmi_msghandler.c_smi_add_send_msg.c' source_filename = "AnghaBench/linux/drivers/char/ipmi/extr_ipmi_msghandler.c_smi_add_send_msg.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ipmi_smi = type { ptr, i32, i32 } @llvm.compiler.used = appending global [1 x ptr] [ptr @smi_add_send_msg], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef ptr @smi_add_send_msg(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = load ptr, ptr %0, align 8, !tbaa !5 %5 = icmp eq ptr %4, null br i1 %5, label %14, label %6 6: ; preds = %3 %7 = icmp sgt i32 %2, 0 br i1 %7, label %8, label %11 8: ; preds = %6 %9 = getelementptr inbounds %struct.ipmi_smi, ptr %0, i64 0, i32 2 %10 = tail call i32 @list_add_tail(ptr noundef %1, ptr noundef nonnull %9) #2 br label %15 11: ; preds = %6 %12 = getelementptr inbounds %struct.ipmi_smi, ptr %0, i64 0, i32 1 %13 = tail call i32 @list_add_tail(ptr noundef %1, ptr noundef nonnull %12) #2 br label %15 14: ; preds = %3 store ptr %1, ptr %0, align 8, !tbaa !5 br label %15 15: ; preds = %8, %11, %14 %16 = phi ptr [ %1, %14 ], [ null, %11 ], [ null, %8 ] ret ptr %16 } declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"ipmi_smi", !7, i64 0, !10, i64 8, !10, i64 12} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/char/ipmi/extr_ipmi_msghandler.c_smi_add_send_msg.c' source_filename = "AnghaBench/linux/drivers/char/ipmi/extr_ipmi_msghandler.c_smi_add_send_msg.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @smi_add_send_msg], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef ptr @smi_add_send_msg(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = load ptr, ptr %0, align 8, !tbaa !6 %5 = icmp eq ptr %4, null br i1 %5, label %14, label %6 6: ; preds = %3 %7 = icmp sgt i32 %2, 0 br i1 %7, label %8, label %11 8: ; preds = %6 %9 = getelementptr inbounds i8, ptr %0, i64 12 %10 = tail call i32 @list_add_tail(ptr noundef %1, ptr noundef nonnull %9) #2 br label %15 11: ; preds = %6 %12 = getelementptr inbounds i8, ptr %0, i64 8 %13 = tail call i32 @list_add_tail(ptr noundef %1, ptr noundef nonnull %12) #2 br label %15 14: ; preds = %3 store ptr %1, ptr %0, align 8, !tbaa !6 br label %15 15: ; preds = %8, %11, %14 %16 = phi ptr [ %1, %14 ], [ null, %11 ], [ null, %8 ] ret ptr %16 } declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"ipmi_smi", !8, i64 0, !11, i64 8, !11, i64 12} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0}
linux_drivers_char_ipmi_extr_ipmi_msghandler.c_smi_add_send_msg
; ModuleID = 'AnghaBench/Cinder/src/freetype/autofit/extr_afdummy.c_af_dummy_hints_apply.c' source_filename = "AnghaBench/Cinder/src/freetype/autofit/extr_afdummy.c_af_dummy_hints_apply.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @af_dummy_hints_apply], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @af_dummy_hints_apply(i32 noundef %0, i32 noundef %1, ptr noundef %2) #0 { %4 = tail call i32 @FT_UNUSED(i32 noundef %0) #2 %5 = tail call i32 @af_glyph_hints_reload(i32 noundef %1, ptr noundef %2) #2 %6 = icmp eq i32 %5, 0 br i1 %6, label %7, label %9 7: ; preds = %3 %8 = tail call i32 @af_glyph_hints_save(i32 noundef %1, ptr noundef %2) #2 br label %9 9: ; preds = %7, %3 ret i32 %5 } declare i32 @FT_UNUSED(i32 noundef) local_unnamed_addr #1 declare i32 @af_glyph_hints_reload(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @af_glyph_hints_save(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/Cinder/src/freetype/autofit/extr_afdummy.c_af_dummy_hints_apply.c' source_filename = "AnghaBench/Cinder/src/freetype/autofit/extr_afdummy.c_af_dummy_hints_apply.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @af_dummy_hints_apply], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @af_dummy_hints_apply(i32 noundef %0, i32 noundef %1, ptr noundef %2) #0 { %4 = tail call i32 @FT_UNUSED(i32 noundef %0) #2 %5 = tail call i32 @af_glyph_hints_reload(i32 noundef %1, ptr noundef %2) #2 %6 = icmp eq i32 %5, 0 br i1 %6, label %7, label %9 7: ; preds = %3 %8 = tail call i32 @af_glyph_hints_save(i32 noundef %1, ptr noundef %2) #2 br label %9 9: ; preds = %7, %3 ret i32 %5 } declare i32 @FT_UNUSED(i32 noundef) local_unnamed_addr #1 declare i32 @af_glyph_hints_reload(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @af_glyph_hints_save(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
Cinder_src_freetype_autofit_extr_afdummy.c_af_dummy_hints_apply
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_buffers.c_mlxsw_sp_sb_tc_pool_bind_get.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_buffers.c_mlxsw_sp_sb_tc_pool_bind_get.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.mlxsw_sp_port = type { i32, ptr } %struct.mlxsw_sp_sb_cm = type { i32, i32 } ; Function Attrs: nounwind uwtable define dso_local noundef i32 @mlxsw_sp_sb_tc_pool_bind_get(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr nocapture noundef writeonly %4, ptr nocapture noundef writeonly %5) local_unnamed_addr #0 { %7 = tail call ptr @mlxsw_core_port_driver_priv(ptr noundef %0) #2 %8 = getelementptr inbounds %struct.mlxsw_sp_port, ptr %7, i64 0, i32 1 %9 = load ptr, ptr %8, align 8, !tbaa !5 %10 = load i32, ptr %7, align 8, !tbaa !11 %11 = tail call ptr @mlxsw_sp_sb_cm_get(ptr noundef %9, i32 noundef %10, i32 noundef %2, i32 noundef %3) #2 %12 = load i32, ptr %11, align 4, !tbaa !12 %13 = getelementptr inbounds %struct.mlxsw_sp_sb_cm, ptr %11, i64 0, i32 1 %14 = load i32, ptr %13, align 4, !tbaa !14 %15 = tail call i32 @mlxsw_sp_sb_threshold_out(ptr noundef %9, i32 noundef %12, i32 noundef %14) #2 store i32 %15, ptr %5, align 4, !tbaa !15 %16 = load i32, ptr %11, align 4, !tbaa !12 store i32 %16, ptr %4, align 4, !tbaa !15 ret i32 0 } declare ptr @mlxsw_core_port_driver_priv(ptr noundef) local_unnamed_addr #1 declare ptr @mlxsw_sp_sb_cm_get(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @mlxsw_sp_sb_threshold_out(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"mlxsw_sp_port", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !7, i64 0} !12 = !{!13, !7, i64 0} !13 = !{!"mlxsw_sp_sb_cm", !7, i64 0, !7, i64 4} !14 = !{!13, !7, i64 4} !15 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_buffers.c_mlxsw_sp_sb_tc_pool_bind_get.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_buffers.c_mlxsw_sp_sb_tc_pool_bind_get.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define noundef i32 @mlxsw_sp_sb_tc_pool_bind_get(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr nocapture noundef writeonly %4, ptr nocapture noundef writeonly %5) local_unnamed_addr #0 { %7 = tail call ptr @mlxsw_core_port_driver_priv(ptr noundef %0) #2 %8 = getelementptr inbounds i8, ptr %7, i64 8 %9 = load ptr, ptr %8, align 8, !tbaa !6 %10 = load i32, ptr %7, align 8, !tbaa !12 %11 = tail call ptr @mlxsw_sp_sb_cm_get(ptr noundef %9, i32 noundef %10, i32 noundef %2, i32 noundef %3) #2 %12 = load i32, ptr %11, align 4, !tbaa !13 %13 = getelementptr inbounds i8, ptr %11, i64 4 %14 = load i32, ptr %13, align 4, !tbaa !15 %15 = tail call i32 @mlxsw_sp_sb_threshold_out(ptr noundef %9, i32 noundef %12, i32 noundef %14) #2 store i32 %15, ptr %5, align 4, !tbaa !16 %16 = load i32, ptr %11, align 4, !tbaa !13 store i32 %16, ptr %4, align 4, !tbaa !16 ret i32 0 } declare ptr @mlxsw_core_port_driver_priv(ptr noundef) local_unnamed_addr #1 declare ptr @mlxsw_sp_sb_cm_get(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @mlxsw_sp_sb_threshold_out(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"mlxsw_sp_port", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !8, i64 0} !13 = !{!14, !8, i64 0} !14 = !{!"mlxsw_sp_sb_cm", !8, i64 0, !8, i64 4} !15 = !{!14, !8, i64 4} !16 = !{!8, !8, i64 0}
linux_drivers_net_ethernet_mellanox_mlxsw_extr_spectrum_buffers.c_mlxsw_sp_sb_tc_pool_bind_get
; ModuleID = 'AnghaBench/git/extr_diff-no-index.c_noindex_filespec.c' source_filename = "AnghaBench/git/extr_diff-no-index.c_noindex_filespec.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [10 x i8] c"/dev/null\00", align 1 @null_oid = dso_local global i32 0, align 4 @file_from_standard_input = dso_local local_unnamed_addr global ptr null, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @noindex_filespec], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef ptr @noindex_filespec(ptr noundef %0, i32 noundef %1) #0 { %3 = icmp eq ptr %0, null %4 = select i1 %3, ptr @.str, ptr %0 %5 = tail call ptr @alloc_filespec(ptr noundef nonnull %4) #2 %6 = tail call i32 @fill_filespec(ptr noundef %5, ptr noundef nonnull @null_oid, i32 noundef 0, i32 noundef %1) #2 %7 = load ptr, ptr @file_from_standard_input, align 8, !tbaa !5 %8 = icmp eq ptr %4, %7 br i1 %8, label %9, label %11 9: ; preds = %2 %10 = tail call i32 @populate_from_stdin(ptr noundef %5) #2 br label %11 11: ; preds = %9, %2 ret ptr %5 } declare ptr @alloc_filespec(ptr noundef) local_unnamed_addr #1 declare i32 @fill_filespec(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @populate_from_stdin(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/git/extr_diff-no-index.c_noindex_filespec.c' source_filename = "AnghaBench/git/extr_diff-no-index.c_noindex_filespec.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [10 x i8] c"/dev/null\00", align 1 @null_oid = common global i32 0, align 4 @file_from_standard_input = common local_unnamed_addr global ptr null, align 8 @llvm.used = appending global [1 x ptr] [ptr @noindex_filespec], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef ptr @noindex_filespec(ptr noundef %0, i32 noundef %1) #0 { %3 = icmp eq ptr %0, null %4 = select i1 %3, ptr @.str, ptr %0 %5 = tail call ptr @alloc_filespec(ptr noundef nonnull %4) #2 %6 = tail call i32 @fill_filespec(ptr noundef %5, ptr noundef nonnull @null_oid, i32 noundef 0, i32 noundef %1) #2 %7 = load ptr, ptr @file_from_standard_input, align 8, !tbaa !6 %8 = icmp eq ptr %4, %7 br i1 %8, label %9, label %11 9: ; preds = %2 %10 = tail call i32 @populate_from_stdin(ptr noundef %5) #2 br label %11 11: ; preds = %9, %2 ret ptr %5 } declare ptr @alloc_filespec(ptr noundef) local_unnamed_addr #1 declare i32 @fill_filespec(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @populate_from_stdin(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
git_extr_diff-no-index.c_noindex_filespec
; ModuleID = 'AnghaBench/openssl/crypto/x509/extr_v3_admis.c_ADMISSION_SYNTAX_set0_admissionAuthority.c' source_filename = "AnghaBench/openssl/crypto/x509/extr_v3_admis.c_ADMISSION_SYNTAX_set0_admissionAuthority.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local void @ADMISSION_SYNTAX_set0_admissionAuthority(ptr nocapture noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = tail call i32 @GENERAL_NAME_free(ptr noundef %3) #2 store ptr %1, ptr %0, align 8, !tbaa !5 ret void } declare i32 @GENERAL_NAME_free(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_3__", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/openssl/crypto/x509/extr_v3_admis.c_ADMISSION_SYNTAX_set0_admissionAuthority.c' source_filename = "AnghaBench/openssl/crypto/x509/extr_v3_admis.c_ADMISSION_SYNTAX_set0_admissionAuthority.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @ADMISSION_SYNTAX_set0_admissionAuthority(ptr nocapture noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = tail call i32 @GENERAL_NAME_free(ptr noundef %3) #2 store ptr %1, ptr %0, align 8, !tbaa !6 ret void } declare i32 @GENERAL_NAME_free(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_3__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
openssl_crypto_x509_extr_v3_admis.c_ADMISSION_SYNTAX_set0_admissionAuthority
; ModuleID = 'AnghaBench/freebsd/sbin/init/extr_init.c_replace_init.c' source_filename = "AnghaBench/freebsd/sbin/init/extr_init.c_replace_init.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @__const.replace_init.sh = private unnamed_addr constant [3 x i8] c"sh\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @replace_init], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @replace_init(ptr noundef %0) #0 { %2 = alloca [3 x ptr], align 16 %3 = alloca [3 x i8], align 1 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #4 call void @llvm.lifetime.start.p0(i64 3, ptr nonnull %3) #4 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(3) %3, ptr noundef nonnull align 1 dereferenceable(3) @__const.replace_init.sh, i64 3, i1 false) store ptr %3, ptr %2, align 16, !tbaa !5 %4 = getelementptr inbounds [3 x ptr], ptr %2, i64 0, i64 1 store ptr %0, ptr %4, align 8, !tbaa !5 %5 = getelementptr inbounds [3 x ptr], ptr %2, i64 0, i64 2 store ptr null, ptr %5, align 16, !tbaa !5 %6 = call i32 @execute_script(ptr noundef nonnull %2) #4 call void @llvm.lifetime.end.p0(i64 3, ptr nonnull %3) #4 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #4 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2 declare i32 @execute_script(ptr noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) } attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/sbin/init/extr_init.c_replace_init.c' source_filename = "AnghaBench/freebsd/sbin/init/extr_init.c_replace_init.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @__const.replace_init.sh = private unnamed_addr constant [3 x i8] c"sh\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @replace_init], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @replace_init(ptr noundef %0) #0 { %2 = alloca [3 x ptr], align 8 %3 = alloca [3 x i8], align 1 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #4 call void @llvm.lifetime.start.p0(i64 3, ptr nonnull %3) #4 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(3) %3, ptr noundef nonnull align 1 dereferenceable(3) @__const.replace_init.sh, i64 3, i1 false) store ptr %3, ptr %2, align 8, !tbaa !6 %4 = getelementptr inbounds i8, ptr %2, i64 8 store ptr %0, ptr %4, align 8, !tbaa !6 %5 = getelementptr inbounds i8, ptr %2, i64 16 store ptr null, ptr %5, align 8, !tbaa !6 %6 = call i32 @execute_script(ptr noundef nonnull %2) #4 call void @llvm.lifetime.end.p0(i64 3, ptr nonnull %3) #4 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #4 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2 declare i32 @execute_script(ptr noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) } attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_sbin_init_extr_init.c_replace_init
; ModuleID = 'AnghaBench/qmk_firmware/users/ericgebhart/extr_ericgebhart.c_matrix_init_keymap.c' source_filename = "AnghaBench/qmk_firmware/users/ericgebhart/extr_ericgebhart.c_matrix_init_keymap.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define weak dso_local void @matrix_init_keymap() local_unnamed_addr #0 { ret void } attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/qmk_firmware/users/ericgebhart/extr_ericgebhart.c_matrix_init_keymap.c' source_filename = "AnghaBench/qmk_firmware/users/ericgebhart/extr_ericgebhart.c_matrix_init_keymap.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define weak void @matrix_init_keymap() local_unnamed_addr #0 { ret void } attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
qmk_firmware_users_ericgebhart_extr_ericgebhart.c_matrix_init_keymap
; ModuleID = 'AnghaBench/linux/drivers/iommu/extr_intel-pasid.c_pasid_set_bits.c' source_filename = "AnghaBench/linux/drivers/iommu/extr_intel-pasid.c_pasid_set_bits.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @pasid_set_bits], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal void @pasid_set_bits(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 { %4 = load i32, ptr %0, align 4, !tbaa !5 %5 = tail call i32 @READ_ONCE(i32 noundef %4) #2 %6 = load i32, ptr %0, align 4, !tbaa !5 %7 = xor i32 %1, -1 %8 = and i32 %5, %7 %9 = or i32 %8, %2 %10 = tail call i32 @WRITE_ONCE(i32 noundef %6, i32 noundef %9) #2 ret void } declare i32 @READ_ONCE(i32 noundef) local_unnamed_addr #1 declare i32 @WRITE_ONCE(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/iommu/extr_intel-pasid.c_pasid_set_bits.c' source_filename = "AnghaBench/linux/drivers/iommu/extr_intel-pasid.c_pasid_set_bits.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @pasid_set_bits], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal void @pasid_set_bits(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 { %4 = load i32, ptr %0, align 4, !tbaa !6 %5 = tail call i32 @READ_ONCE(i32 noundef %4) #2 %6 = load i32, ptr %0, align 4, !tbaa !6 %7 = xor i32 %1, -1 %8 = and i32 %5, %7 %9 = or i32 %8, %2 %10 = tail call i32 @WRITE_ONCE(i32 noundef %6, i32 noundef %9) #2 ret void } declare i32 @READ_ONCE(i32 noundef) local_unnamed_addr #1 declare i32 @WRITE_ONCE(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_iommu_extr_intel-pasid.c_pasid_set_bits
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/m68knommu/mm/extr_kmap.c_iounmap.c' source_filename = "AnghaBench/fastsocket/kernel/arch/m68knommu/mm/extr_kmap.c_iounmap.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define dso_local void @iounmap(ptr nocapture noundef readnone %0) local_unnamed_addr #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/m68knommu/mm/extr_kmap.c_iounmap.c' source_filename = "AnghaBench/fastsocket/kernel/arch/m68knommu/mm/extr_kmap.c_iounmap.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define void @iounmap(ptr nocapture noundef readnone %0) local_unnamed_addr #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
fastsocket_kernel_arch_m68knommu_mm_extr_kmap.c_iounmap
; ModuleID = 'AnghaBench/freebsd/usr.sbin/ctld/extr_ctld.c_port_new.c' source_filename = "AnghaBench/freebsd/usr.sbin/ctld/extr_ctld.c_port_new.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.portal_group = type { i32, i32 } %struct.target = type { i32, i32 } %struct.port = type { ptr, ptr, ptr, i64, ptr } @.str = private unnamed_addr constant [6 x i8] c"%s-%s\00", align 1 @.str.1 = private unnamed_addr constant [9 x i8] c"asprintf\00", align 1 @.str.2 = private unnamed_addr constant [20 x i8] c"duplicate port \22%s\22\00", align 1 @.str.3 = private unnamed_addr constant [7 x i8] c"calloc\00", align 1 @p_next = dso_local local_unnamed_addr global i32 0, align 4 @p_ts = dso_local local_unnamed_addr global i32 0, align 4 @p_pgs = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local ptr @port_new(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 { %4 = alloca ptr, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 %5 = getelementptr inbounds %struct.portal_group, ptr %2, i64 0, i32 1 %6 = load i32, ptr %5, align 4, !tbaa !5 %7 = getelementptr inbounds %struct.target, ptr %1, i64 0, i32 1 %8 = load i32, ptr %7, align 4, !tbaa !10 %9 = call i32 @asprintf(ptr noundef nonnull %4, ptr noundef nonnull @.str, i32 noundef %6, i32 noundef %8) #3 %10 = icmp slt i32 %9, 1 br i1 %10, label %11, label %13 11: ; preds = %3 %12 = call i32 @log_err(i32 noundef 1, ptr noundef nonnull @.str.1) #3 br label %13 13: ; preds = %11, %3 %14 = load ptr, ptr %4, align 8, !tbaa !12 %15 = call ptr @port_find(ptr noundef %0, ptr noundef %14) #3 %16 = icmp eq ptr %15, null br i1 %16, label %22, label %17 17: ; preds = %13 %18 = load ptr, ptr %4, align 8, !tbaa !12 %19 = call i32 @log_warnx(ptr noundef nonnull @.str.2, ptr noundef %18) #3 %20 = load ptr, ptr %4, align 8, !tbaa !12 %21 = call i32 @free(ptr noundef %20) #3 br label %39 22: ; preds = %13 %23 = call ptr @calloc(i32 noundef 1, i32 noundef 40) #3 %24 = icmp eq ptr %23, null br i1 %24, label %25, label %27 25: ; preds = %22 %26 = call i32 @log_err(i32 noundef 1, ptr noundef nonnull @.str.3) #3 br label %27 27: ; preds = %25, %22 %28 = getelementptr inbounds %struct.port, ptr %23, i64 0, i32 4 store ptr %0, ptr %28, align 8, !tbaa !14 %29 = load ptr, ptr %4, align 8, !tbaa !12 store ptr %29, ptr %23, align 8, !tbaa !17 %30 = getelementptr inbounds %struct.port, ptr %23, i64 0, i32 3 store i64 0, ptr %30, align 8, !tbaa !18 %31 = load i32, ptr @p_next, align 4, !tbaa !19 %32 = call i32 @TAILQ_INSERT_TAIL(ptr noundef %0, ptr noundef nonnull %23, i32 noundef %31) #3 %33 = load i32, ptr @p_ts, align 4, !tbaa !19 %34 = call i32 @TAILQ_INSERT_TAIL(ptr noundef nonnull %1, ptr noundef nonnull %23, i32 noundef %33) #3 %35 = getelementptr inbounds %struct.port, ptr %23, i64 0, i32 2 store ptr %1, ptr %35, align 8, !tbaa !20 %36 = load i32, ptr @p_pgs, align 4, !tbaa !19 %37 = call i32 @TAILQ_INSERT_TAIL(ptr noundef nonnull %2, ptr noundef nonnull %23, i32 noundef %36) #3 %38 = getelementptr inbounds %struct.port, ptr %23, i64 0, i32 1 store ptr %2, ptr %38, align 8, !tbaa !21 br label %39 39: ; preds = %27, %17 %40 = phi ptr [ null, %17 ], [ %23, %27 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 ret ptr %40 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @asprintf(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @log_err(i32 noundef, ptr noundef) local_unnamed_addr #2 declare ptr @port_find(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @log_warnx(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @free(ptr noundef) local_unnamed_addr #2 declare ptr @calloc(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @TAILQ_INSERT_TAIL(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 4} !6 = !{!"portal_group", !7, i64 0, !7, i64 4} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 4} !11 = !{!"target", !7, i64 0, !7, i64 4} !12 = !{!13, !13, i64 0} !13 = !{!"any pointer", !8, i64 0} !14 = !{!15, !13, i64 32} !15 = !{!"port", !13, i64 0, !13, i64 8, !13, i64 16, !16, i64 24, !13, i64 32} !16 = !{!"long", !8, i64 0} !17 = !{!15, !13, i64 0} !18 = !{!15, !16, i64 24} !19 = !{!7, !7, i64 0} !20 = !{!15, !13, i64 16} !21 = !{!15, !13, i64 8}
; ModuleID = 'AnghaBench/freebsd/usr.sbin/ctld/extr_ctld.c_port_new.c' source_filename = "AnghaBench/freebsd/usr.sbin/ctld/extr_ctld.c_port_new.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [6 x i8] c"%s-%s\00", align 1 @.str.1 = private unnamed_addr constant [9 x i8] c"asprintf\00", align 1 @.str.2 = private unnamed_addr constant [20 x i8] c"duplicate port \22%s\22\00", align 1 @.str.3 = private unnamed_addr constant [7 x i8] c"calloc\00", align 1 @p_next = common local_unnamed_addr global i32 0, align 4 @p_ts = common local_unnamed_addr global i32 0, align 4 @p_pgs = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @port_new(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 { %4 = alloca ptr, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 %5 = getelementptr inbounds i8, ptr %2, i64 4 %6 = load i32, ptr %5, align 4, !tbaa !6 %7 = getelementptr inbounds i8, ptr %1, i64 4 %8 = load i32, ptr %7, align 4, !tbaa !11 %9 = call i32 @asprintf(ptr noundef nonnull %4, ptr noundef nonnull @.str, i32 noundef %6, i32 noundef %8) #3 %10 = icmp slt i32 %9, 1 br i1 %10, label %11, label %13 11: ; preds = %3 %12 = call i32 @log_err(i32 noundef 1, ptr noundef nonnull @.str.1) #3 br label %13 13: ; preds = %11, %3 %14 = load ptr, ptr %4, align 8, !tbaa !13 %15 = call ptr @port_find(ptr noundef %0, ptr noundef %14) #3 %16 = icmp eq ptr %15, null br i1 %16, label %22, label %17 17: ; preds = %13 %18 = load ptr, ptr %4, align 8, !tbaa !13 %19 = call i32 @log_warnx(ptr noundef nonnull @.str.2, ptr noundef %18) #3 %20 = load ptr, ptr %4, align 8, !tbaa !13 %21 = call i32 @free(ptr noundef %20) #3 br label %39 22: ; preds = %13 %23 = call ptr @calloc(i32 noundef 1, i32 noundef 40) #3 %24 = icmp eq ptr %23, null br i1 %24, label %25, label %27 25: ; preds = %22 %26 = call i32 @log_err(i32 noundef 1, ptr noundef nonnull @.str.3) #3 br label %27 27: ; preds = %25, %22 %28 = getelementptr inbounds i8, ptr %23, i64 32 store ptr %0, ptr %28, align 8, !tbaa !15 %29 = load ptr, ptr %4, align 8, !tbaa !13 store ptr %29, ptr %23, align 8, !tbaa !18 %30 = getelementptr inbounds i8, ptr %23, i64 24 store i64 0, ptr %30, align 8, !tbaa !19 %31 = load i32, ptr @p_next, align 4, !tbaa !20 %32 = call i32 @TAILQ_INSERT_TAIL(ptr noundef %0, ptr noundef nonnull %23, i32 noundef %31) #3 %33 = load i32, ptr @p_ts, align 4, !tbaa !20 %34 = call i32 @TAILQ_INSERT_TAIL(ptr noundef nonnull %1, ptr noundef nonnull %23, i32 noundef %33) #3 %35 = getelementptr inbounds i8, ptr %23, i64 16 store ptr %1, ptr %35, align 8, !tbaa !21 %36 = load i32, ptr @p_pgs, align 4, !tbaa !20 %37 = call i32 @TAILQ_INSERT_TAIL(ptr noundef nonnull %2, ptr noundef nonnull %23, i32 noundef %36) #3 %38 = getelementptr inbounds i8, ptr %23, i64 8 store ptr %2, ptr %38, align 8, !tbaa !22 br label %39 39: ; preds = %27, %17 %40 = phi ptr [ null, %17 ], [ %23, %27 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 ret ptr %40 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @asprintf(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @log_err(i32 noundef, ptr noundef) local_unnamed_addr #2 declare ptr @port_find(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @log_warnx(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @free(ptr noundef) local_unnamed_addr #2 declare ptr @calloc(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @TAILQ_INSERT_TAIL(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 4} !7 = !{!"portal_group", !8, i64 0, !8, i64 4} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 4} !12 = !{!"target", !8, i64 0, !8, i64 4} !13 = !{!14, !14, i64 0} !14 = !{!"any pointer", !9, i64 0} !15 = !{!16, !14, i64 32} !16 = !{!"port", !14, i64 0, !14, i64 8, !14, i64 16, !17, i64 24, !14, i64 32} !17 = !{!"long", !9, i64 0} !18 = !{!16, !14, i64 0} !19 = !{!16, !17, i64 24} !20 = !{!8, !8, i64 0} !21 = !{!16, !14, i64 16} !22 = !{!16, !14, i64 8}
freebsd_usr.sbin_ctld_extr_ctld.c_port_new
; ModuleID = 'AnghaBench/micropython/ports/stm32/usbhost/Core/Src/extr_usbh_ioreq.c_USBH_InterruptReceiveData.c' source_filename = "AnghaBench/micropython/ports/stm32/usbhost/Core/Src/extr_usbh_ioreq.c_USBH_InterruptReceiveData.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @USBH_EP_INTERRUPT = dso_local local_unnamed_addr global i32 0, align 4 @USBH_PID_DATA = dso_local local_unnamed_addr global i32 0, align 4 @USBH_OK = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @USBH_InterruptReceiveData(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 { %5 = load i32, ptr @USBH_EP_INTERRUPT, align 4, !tbaa !5 %6 = load i32, ptr @USBH_PID_DATA, align 4, !tbaa !5 %7 = tail call i32 @USBH_LL_SubmitURB(ptr noundef %0, i32 noundef %3, i32 noundef 1, i32 noundef %5, i32 noundef %6, ptr noundef %1, i32 noundef %2, i32 noundef 0) #2 %8 = load i32, ptr @USBH_OK, align 4, !tbaa !5 ret i32 %8 } declare i32 @USBH_LL_SubmitURB(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/micropython/ports/stm32/usbhost/Core/Src/extr_usbh_ioreq.c_USBH_InterruptReceiveData.c' source_filename = "AnghaBench/micropython/ports/stm32/usbhost/Core/Src/extr_usbh_ioreq.c_USBH_InterruptReceiveData.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @USBH_EP_INTERRUPT = common local_unnamed_addr global i32 0, align 4 @USBH_PID_DATA = common local_unnamed_addr global i32 0, align 4 @USBH_OK = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @USBH_InterruptReceiveData(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 { %5 = load i32, ptr @USBH_EP_INTERRUPT, align 4, !tbaa !6 %6 = load i32, ptr @USBH_PID_DATA, align 4, !tbaa !6 %7 = tail call i32 @USBH_LL_SubmitURB(ptr noundef %0, i32 noundef %3, i32 noundef 1, i32 noundef %5, i32 noundef %6, ptr noundef %1, i32 noundef %2, i32 noundef 0) #2 %8 = load i32, ptr @USBH_OK, align 4, !tbaa !6 ret i32 %8 } declare i32 @USBH_LL_SubmitURB(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
micropython_ports_stm32_usbhost_Core_Src_extr_usbh_ioreq.c_USBH_InterruptReceiveData
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/extr_hal_btc.c_rtl8723e_dm_bt_2_ant_hid_sco_esco.c' source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/extr_hal_btc.c_rtl8723e_dm_bt_2_ant_hid_sco_esco.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_2__ = type { i64 } %struct.btdm_8723 = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32 } @COMP_BT_COEXIST = dso_local local_unnamed_addr global i32 0, align 4 @DBG_DMESG = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [33 x i8] c"[BTCoex], BT TxRx Counters = %d\0A\00", align 1 @HT_CHANNEL_WIDTH_20_40 = dso_local local_unnamed_addr global i64 0, align 8 @.str.1 = private unnamed_addr constant [6 x i8] c"HT40\0A\00", align 1 @BT_TXRX_CNT_LEVEL_2 = dso_local local_unnamed_addr global i64 0, align 8 @.str.2 = private unnamed_addr constant [36 x i8] c"[BTCoex], BT TxRx Counters >= 1400\0A\00", align 1 @BT_TXRX_CNT_LEVEL_1 = dso_local local_unnamed_addr global i64 0, align 8 @.str.3 = private unnamed_addr constant [46 x i8] c"[BTCoex], BT TxRx Counters >= 1200 && < 1400\0A\00", align 1 @.str.4 = private unnamed_addr constant [35 x i8] c"[BTCoex], BT TxRx Counters < 1200\0A\00", align 1 @.str.5 = private unnamed_addr constant [16 x i8] c"HT20 or Legacy\0A\00", align 1 @BT_RSSI_STATE_HIGH = dso_local local_unnamed_addr global i64 0, align 8 @BT_RSSI_STATE_STAY_HIGH = dso_local local_unnamed_addr global i64 0, align 8 @.str.6 = private unnamed_addr constant [16 x i8] c"Wifi rssi high\0A\00", align 1 @.str.7 = private unnamed_addr constant [15 x i8] c"Wifi rssi low\0A\00", align 1 @.str.8 = private unnamed_addr constant [18 x i8] c"Wifi rssi-1 high\0A\00", align 1 @.str.9 = private unnamed_addr constant [45 x i8] c"[BTCoex], BT TxRx Counters>= 1200 && < 1400\0A\00", align 1 @.str.10 = private unnamed_addr constant [17 x i8] c"Wifi rssi-1 low\0A\00", align 1 @.str.11 = private unnamed_addr constant [59 x i8] c"[BTCoex], BT btInqPageStartTime = 0x%x, btTxRxCntLvl = %d\0A\00", align 1 @hal_coex_8723 = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8 @BT_TXRX_CNT_LEVEL_3 = dso_local local_unnamed_addr global i64 0, align 8 @.str.12 = private unnamed_addr constant [51 x i8] c"[BTCoex], Set BT inquiry / page scan 0x3a setting\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @rtl8723e_dm_bt_2_ant_hid_sco_esco], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @rtl8723e_dm_bt_2_ant_hid_sco_esco(ptr noundef %0) #0 { %2 = alloca %struct.btdm_8723, align 8 %3 = tail call ptr @rtl_priv(ptr noundef %0) #3 call void @llvm.lifetime.start.p0(i64 56, ptr nonnull %2) #3 %4 = call i32 @rtl8723e_dm_bt_btdm_structure_reload(ptr noundef %0, ptr noundef nonnull %2) #3 store i32 1, ptr %2, align 8, !tbaa !5 %5 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 1 store i32 1, ptr %5, align 4, !tbaa !11 %6 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 2 store i32 0, ptr %6, align 8, !tbaa !12 %7 = call i64 @rtl8723e_dm_bt_bt_tx_rx_counter_level(ptr noundef %0) #3 %8 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %9 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 %10 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef %3, i32 noundef %8, i32 noundef %9, ptr noundef nonnull @.str, i64 noundef %7) #3 %11 = load i64, ptr %3, align 8, !tbaa !14 %12 = load i64, ptr @HT_CHANNEL_WIDTH_20_40, align 8, !tbaa !17 %13 = icmp eq i64 %11, %12 %14 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %15 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 br i1 %13, label %16, label %39 16: ; preds = %1 %17 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %14, i32 noundef %15, ptr noundef nonnull @.str.1) #3 %18 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 3 store <4 x i32> <i32 1431655765, i32 65535, i32 3, i32 0>, ptr %18, align 4, !tbaa !13 %19 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 7 store i32 0, ptr %19, align 4, !tbaa !18 %20 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 8 store i32 0, ptr %20, align 8, !tbaa !19 %21 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 9 store i32 1, ptr %21, align 4, !tbaa !20 %22 = load i64, ptr @BT_TXRX_CNT_LEVEL_2, align 8, !tbaa !17 %23 = icmp eq i64 %7, %22 br i1 %23, label %24, label %29 24: ; preds = %16 %25 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %26 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 %27 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %25, i32 noundef %26, ptr noundef nonnull @.str.2) #3 %28 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 10 br label %106 29: ; preds = %16 %30 = load i64, ptr @BT_TXRX_CNT_LEVEL_1, align 8, !tbaa !17 %31 = icmp eq i64 %7, %30 %32 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %33 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 %34 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 10 br i1 %31, label %35, label %37 35: ; preds = %29 %36 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %32, i32 noundef %33, ptr noundef nonnull @.str.3) #3 br label %106 37: ; preds = %29 %38 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %32, i32 noundef %33, ptr noundef nonnull @.str.4) #3 br label %106 39: ; preds = %1 %40 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %14, i32 noundef %15, ptr noundef nonnull @.str.5) #3 %41 = call i64 @rtl8723e_dm_bt_check_coex_rssi_state(ptr noundef %0, i32 noundef 2, i32 noundef 47, i32 noundef 0) #3 %42 = call i64 @rtl8723e_dm_bt_check_coex_rssi_state1(ptr noundef %0, i32 noundef 2, i32 noundef 27, i32 noundef 0) #3 %43 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 3 store i32 1431655765, ptr %43, align 4, !tbaa !21 %44 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 4 store i32 65535, ptr %44, align 8, !tbaa !22 %45 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 5 store i32 3, ptr %45, align 4, !tbaa !23 %46 = load i64, ptr @BT_RSSI_STATE_HIGH, align 8, !tbaa !17 %47 = icmp eq i64 %41, %46 %48 = load i64, ptr @BT_RSSI_STATE_STAY_HIGH, align 8 %49 = icmp eq i64 %41, %48 %50 = select i1 %47, i1 true, i1 %49 %51 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %52 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 %53 = select i1 %50, ptr @.str.6, ptr @.str.7 %54 = zext i1 %50 to i32 %55 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %51, i32 noundef %52, ptr noundef nonnull %53) #3 %56 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 6 store i32 %54, ptr %56, align 8 %57 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 7 store i32 %54, ptr %57, align 4 %58 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 8 store i32 0, ptr %58, align 8 %59 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 9 store i32 1, ptr %59, align 4, !tbaa !20 %60 = load i64, ptr @BT_RSSI_STATE_HIGH, align 8, !tbaa !17 %61 = icmp eq i64 %42, %60 %62 = load i64, ptr @BT_RSSI_STATE_STAY_HIGH, align 8 %63 = icmp eq i64 %42, %62 %64 = select i1 %61, i1 true, i1 %63 %65 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %66 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 br i1 %64, label %67, label %87 67: ; preds = %39 %68 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %65, i32 noundef %66, ptr noundef nonnull @.str.8) #3 %69 = call i32 @rtl_write_byte(ptr noundef nonnull %3, i32 noundef 2179, i32 noundef 64) #3 %70 = load i64, ptr @BT_TXRX_CNT_LEVEL_2, align 8, !tbaa !17 %71 = icmp eq i64 %7, %70 br i1 %71, label %72, label %77 72: ; preds = %67 %73 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %74 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 %75 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %73, i32 noundef %74, ptr noundef nonnull @.str.2) #3 %76 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 10 br label %106 77: ; preds = %67 %78 = load i64, ptr @BT_TXRX_CNT_LEVEL_1, align 8, !tbaa !17 %79 = icmp eq i64 %7, %78 %80 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %81 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 %82 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 10 br i1 %79, label %83, label %85 83: ; preds = %77 %84 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %80, i32 noundef %81, ptr noundef nonnull @.str.9) #3 br label %106 85: ; preds = %77 %86 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %80, i32 noundef %81, ptr noundef nonnull @.str.4) #3 br label %106 87: ; preds = %39 %88 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %65, i32 noundef %66, ptr noundef nonnull @.str.10) #3 %89 = load i64, ptr @BT_TXRX_CNT_LEVEL_2, align 8, !tbaa !17 %90 = icmp eq i64 %7, %89 br i1 %90, label %91, label %96 91: ; preds = %87 %92 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %93 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 %94 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %92, i32 noundef %93, ptr noundef nonnull @.str.2) #3 %95 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 10 br label %106 96: ; preds = %87 %97 = load i64, ptr @BT_TXRX_CNT_LEVEL_1, align 8, !tbaa !17 %98 = icmp eq i64 %7, %97 %99 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %100 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 %101 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 10 br i1 %98, label %102, label %104 102: ; preds = %96 %103 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %99, i32 noundef %100, ptr noundef nonnull @.str.3) #3 br label %106 104: ; preds = %96 %105 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %99, i32 noundef %100, ptr noundef nonnull @.str.4) #3 br label %106 106: ; preds = %83, %85, %72, %102, %104, %91, %24, %37, %35 %107 = phi ptr [ %82, %83 ], [ %82, %85 ], [ %76, %72 ], [ %101, %102 ], [ %101, %104 ], [ %95, %91 ], [ %28, %24 ], [ %34, %37 ], [ %34, %35 ] %108 = phi i32 [ 10, %83 ], [ 15, %85 ], [ 5, %72 ], [ 10, %102 ], [ 15, %104 ], [ 5, %91 ], [ 5, %24 ], [ 15, %37 ], [ 10, %35 ] %109 = phi i32 [ 131, %83 ], [ 131, %85 ], [ 131, %72 ], [ 2, %102 ], [ 2, %104 ], [ 2, %91 ], [ 2, %24 ], [ 2, %37 ], [ 2, %35 ] %110 = load ptr, ptr %107, align 8, !tbaa !24 store i32 163, ptr %110, align 4, !tbaa !13 %111 = getelementptr inbounds i32, ptr %110, i64 1 store i32 %108, ptr %111, align 4, !tbaa !13 %112 = getelementptr inbounds i32, ptr %110, i64 2 store i32 %108, ptr %112, align 4, !tbaa !13 %113 = getelementptr inbounds i32, ptr %110, i64 3 store i32 %109, ptr %113, align 4, !tbaa !13 %114 = getelementptr inbounds i32, ptr %110, i64 4 store i32 128, ptr %114, align 4, !tbaa !13 %115 = call i64 @rtl8723e_dm_bt_need_to_dec_bt_pwr(ptr noundef %0) #3 %116 = icmp eq i64 %115, 0 br i1 %116, label %119, label %117 117: ; preds = %106 %118 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 11 store i32 1, ptr %118, align 8, !tbaa !25 br label %119 119: ; preds = %117, %106 %120 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %121 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 %122 = load i64, ptr @hal_coex_8723, align 8, !tbaa !26 %123 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %120, i32 noundef %121, ptr noundef nonnull @.str.11, i64 noundef %122, i64 noundef %7) #3 %124 = load i64, ptr @hal_coex_8723, align 8, !tbaa !26 %125 = icmp ne i64 %124, 0 %126 = load i64, ptr @BT_TXRX_CNT_LEVEL_3, align 8 %127 = icmp eq i64 %126, %7 %128 = select i1 %125, i1 true, i1 %127 br i1 %128, label %129, label %137 129: ; preds = %119 %130 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !13 %131 = load i32, ptr @DBG_DMESG, align 4, !tbaa !13 %132 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %130, i32 noundef %131, ptr noundef nonnull @.str.12) #3 %133 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 9 store i32 1, ptr %133, align 4, !tbaa !20 %134 = getelementptr inbounds %struct.btdm_8723, ptr %2, i64 0, i32 10 %135 = load ptr, ptr %134, align 8, !tbaa !24 store <4 x i32> <i32 163, i32 5, i32 5, i32 2>, ptr %135, align 4, !tbaa !13 %136 = getelementptr inbounds i32, ptr %135, i64 4 store i32 128, ptr %136, align 4, !tbaa !13 br label %137 137: ; preds = %119, %129 %138 = call i64 @rtl8723e_dm_bt_is_coexist_state_changed(ptr noundef %0) #3 %139 = icmp eq i64 %138, 0 br i1 %139, label %142, label %140 140: ; preds = %137 %141 = call i32 @rtl8723e_dm_bt_set_bt_dm(ptr noundef %0, ptr noundef nonnull %2) #3 br label %142 142: ; preds = %140, %137 call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %2) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @rtl_priv(ptr noundef) local_unnamed_addr #2 declare i32 @rtl8723e_dm_bt_btdm_structure_reload(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @rtl8723e_dm_bt_bt_tx_rx_counter_level(ptr noundef) local_unnamed_addr #2 declare i32 @RT_TRACE(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #2 declare i64 @rtl8723e_dm_bt_check_coex_rssi_state(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i64 @rtl8723e_dm_bt_check_coex_rssi_state1(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rtl_write_byte(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i64 @rtl8723e_dm_bt_need_to_dec_bt_pwr(ptr noundef) local_unnamed_addr #2 declare i64 @rtl8723e_dm_bt_is_coexist_state_changed(ptr noundef) local_unnamed_addr #2 declare i32 @rtl8723e_dm_bt_set_bt_dm(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"btdm_8723", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !10, i64 40, !7, i64 48} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !7, i64 4} !12 = !{!6, !7, i64 8} !13 = !{!7, !7, i64 0} !14 = !{!15, !16, i64 0} !15 = !{!"rtl_phy", !16, i64 0} !16 = !{!"long", !8, i64 0} !17 = !{!16, !16, i64 0} !18 = !{!6, !7, i64 28} !19 = !{!6, !7, i64 32} !20 = !{!6, !7, i64 36} !21 = !{!6, !7, i64 12} !22 = !{!6, !7, i64 16} !23 = !{!6, !7, i64 20} !24 = !{!6, !10, i64 40} !25 = !{!6, !7, i64 48} !26 = !{!27, !16, i64 0} !27 = !{!"TYPE_2__", !16, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/extr_hal_btc.c_rtl8723e_dm_bt_2_ant_hid_sco_esco.c' source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/extr_hal_btc.c_rtl8723e_dm_bt_2_ant_hid_sco_esco.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_2__ = type { i64 } %struct.btdm_8723 = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32 } @COMP_BT_COEXIST = common local_unnamed_addr global i32 0, align 4 @DBG_DMESG = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [33 x i8] c"[BTCoex], BT TxRx Counters = %d\0A\00", align 1 @HT_CHANNEL_WIDTH_20_40 = common local_unnamed_addr global i64 0, align 8 @.str.1 = private unnamed_addr constant [6 x i8] c"HT40\0A\00", align 1 @BT_TXRX_CNT_LEVEL_2 = common local_unnamed_addr global i64 0, align 8 @.str.2 = private unnamed_addr constant [36 x i8] c"[BTCoex], BT TxRx Counters >= 1400\0A\00", align 1 @BT_TXRX_CNT_LEVEL_1 = common local_unnamed_addr global i64 0, align 8 @.str.3 = private unnamed_addr constant [46 x i8] c"[BTCoex], BT TxRx Counters >= 1200 && < 1400\0A\00", align 1 @.str.4 = private unnamed_addr constant [35 x i8] c"[BTCoex], BT TxRx Counters < 1200\0A\00", align 1 @.str.5 = private unnamed_addr constant [16 x i8] c"HT20 or Legacy\0A\00", align 1 @BT_RSSI_STATE_HIGH = common local_unnamed_addr global i64 0, align 8 @BT_RSSI_STATE_STAY_HIGH = common local_unnamed_addr global i64 0, align 8 @.str.6 = private unnamed_addr constant [16 x i8] c"Wifi rssi high\0A\00", align 1 @.str.7 = private unnamed_addr constant [15 x i8] c"Wifi rssi low\0A\00", align 1 @.str.8 = private unnamed_addr constant [18 x i8] c"Wifi rssi-1 high\0A\00", align 1 @.str.9 = private unnamed_addr constant [45 x i8] c"[BTCoex], BT TxRx Counters>= 1200 && < 1400\0A\00", align 1 @.str.10 = private unnamed_addr constant [17 x i8] c"Wifi rssi-1 low\0A\00", align 1 @.str.11 = private unnamed_addr constant [59 x i8] c"[BTCoex], BT btInqPageStartTime = 0x%x, btTxRxCntLvl = %d\0A\00", align 1 @hal_coex_8723 = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8 @BT_TXRX_CNT_LEVEL_3 = common local_unnamed_addr global i64 0, align 8 @.str.12 = private unnamed_addr constant [51 x i8] c"[BTCoex], Set BT inquiry / page scan 0x3a setting\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @rtl8723e_dm_bt_2_ant_hid_sco_esco], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @rtl8723e_dm_bt_2_ant_hid_sco_esco(ptr noundef %0) #0 { %2 = alloca %struct.btdm_8723, align 8 %3 = tail call ptr @rtl_priv(ptr noundef %0) #3 call void @llvm.lifetime.start.p0(i64 56, ptr nonnull %2) #3 %4 = call i32 @rtl8723e_dm_bt_btdm_structure_reload(ptr noundef %0, ptr noundef nonnull %2) #3 store <2 x i32> <i32 1, i32 1>, ptr %2, align 8, !tbaa !6 %5 = getelementptr inbounds i8, ptr %2, i64 8 store i32 0, ptr %5, align 8, !tbaa !10 %6 = call i64 @rtl8723e_dm_bt_bt_tx_rx_counter_level(ptr noundef %0) #3 %7 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %8 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 %9 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef %3, i32 noundef %7, i32 noundef %8, ptr noundef nonnull @.str, i64 noundef %6) #3 %10 = load i64, ptr %3, align 8, !tbaa !13 %11 = load i64, ptr @HT_CHANNEL_WIDTH_20_40, align 8, !tbaa !16 %12 = icmp eq i64 %10, %11 %13 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %14 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 br i1 %12, label %15, label %37 15: ; preds = %1 %16 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %13, i32 noundef %14, ptr noundef nonnull @.str.1) #3 %17 = getelementptr inbounds i8, ptr %2, i64 12 store <4 x i32> <i32 1431655765, i32 65535, i32 3, i32 0>, ptr %17, align 4, !tbaa !6 %18 = getelementptr inbounds i8, ptr %2, i64 28 store <2 x i32> zeroinitializer, ptr %18, align 4, !tbaa !6 %19 = getelementptr inbounds i8, ptr %2, i64 36 store i32 1, ptr %19, align 4, !tbaa !17 %20 = load i64, ptr @BT_TXRX_CNT_LEVEL_2, align 8, !tbaa !16 %21 = icmp eq i64 %6, %20 br i1 %21, label %22, label %27 22: ; preds = %15 %23 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %24 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 %25 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %23, i32 noundef %24, ptr noundef nonnull @.str.2) #3 %26 = getelementptr inbounds i8, ptr %2, i64 40 br label %102 27: ; preds = %15 %28 = load i64, ptr @BT_TXRX_CNT_LEVEL_1, align 8, !tbaa !16 %29 = icmp eq i64 %6, %28 %30 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %31 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 %32 = getelementptr inbounds i8, ptr %2, i64 40 br i1 %29, label %33, label %35 33: ; preds = %27 %34 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %30, i32 noundef %31, ptr noundef nonnull @.str.3) #3 br label %102 35: ; preds = %27 %36 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %30, i32 noundef %31, ptr noundef nonnull @.str.4) #3 br label %102 37: ; preds = %1 %38 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %13, i32 noundef %14, ptr noundef nonnull @.str.5) #3 %39 = call i64 @rtl8723e_dm_bt_check_coex_rssi_state(ptr noundef %0, i32 noundef 2, i32 noundef 47, i32 noundef 0) #3 %40 = call i64 @rtl8723e_dm_bt_check_coex_rssi_state1(ptr noundef %0, i32 noundef 2, i32 noundef 27, i32 noundef 0) #3 %41 = getelementptr inbounds i8, ptr %2, i64 12 store <2 x i32> <i32 1431655765, i32 65535>, ptr %41, align 4, !tbaa !6 %42 = getelementptr inbounds i8, ptr %2, i64 20 store i32 3, ptr %42, align 4, !tbaa !18 %43 = load i64, ptr @BT_RSSI_STATE_HIGH, align 8, !tbaa !16 %44 = icmp eq i64 %39, %43 %45 = load i64, ptr @BT_RSSI_STATE_STAY_HIGH, align 8 %46 = icmp eq i64 %39, %45 %47 = select i1 %44, i1 true, i1 %46 %48 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %49 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 %50 = select i1 %47, ptr @.str.6, ptr @.str.7 %51 = zext i1 %47 to i32 %52 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %48, i32 noundef %49, ptr noundef nonnull %50) #3 %53 = getelementptr inbounds i8, ptr %2, i64 24 store i32 %51, ptr %53, align 8 %54 = getelementptr inbounds i8, ptr %2, i64 28 store i32 %51, ptr %54, align 4 %55 = getelementptr inbounds i8, ptr %2, i64 32 store <2 x i32> <i32 0, i32 1>, ptr %55, align 8 %56 = load i64, ptr @BT_RSSI_STATE_HIGH, align 8, !tbaa !16 %57 = icmp eq i64 %40, %56 %58 = load i64, ptr @BT_RSSI_STATE_STAY_HIGH, align 8 %59 = icmp eq i64 %40, %58 %60 = select i1 %57, i1 true, i1 %59 %61 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %62 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 br i1 %60, label %63, label %83 63: ; preds = %37 %64 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %61, i32 noundef %62, ptr noundef nonnull @.str.8) #3 %65 = call i32 @rtl_write_byte(ptr noundef nonnull %3, i32 noundef 2179, i32 noundef 64) #3 %66 = load i64, ptr @BT_TXRX_CNT_LEVEL_2, align 8, !tbaa !16 %67 = icmp eq i64 %6, %66 br i1 %67, label %68, label %73 68: ; preds = %63 %69 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %70 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 %71 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %69, i32 noundef %70, ptr noundef nonnull @.str.2) #3 %72 = getelementptr inbounds i8, ptr %2, i64 40 br label %102 73: ; preds = %63 %74 = load i64, ptr @BT_TXRX_CNT_LEVEL_1, align 8, !tbaa !16 %75 = icmp eq i64 %6, %74 %76 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %77 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 %78 = getelementptr inbounds i8, ptr %2, i64 40 br i1 %75, label %79, label %81 79: ; preds = %73 %80 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %76, i32 noundef %77, ptr noundef nonnull @.str.9) #3 br label %102 81: ; preds = %73 %82 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %76, i32 noundef %77, ptr noundef nonnull @.str.4) #3 br label %102 83: ; preds = %37 %84 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %61, i32 noundef %62, ptr noundef nonnull @.str.10) #3 %85 = load i64, ptr @BT_TXRX_CNT_LEVEL_2, align 8, !tbaa !16 %86 = icmp eq i64 %6, %85 br i1 %86, label %87, label %92 87: ; preds = %83 %88 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %89 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 %90 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %88, i32 noundef %89, ptr noundef nonnull @.str.2) #3 %91 = getelementptr inbounds i8, ptr %2, i64 40 br label %102 92: ; preds = %83 %93 = load i64, ptr @BT_TXRX_CNT_LEVEL_1, align 8, !tbaa !16 %94 = icmp eq i64 %6, %93 %95 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %96 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 %97 = getelementptr inbounds i8, ptr %2, i64 40 br i1 %94, label %98, label %100 98: ; preds = %92 %99 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %95, i32 noundef %96, ptr noundef nonnull @.str.3) #3 br label %102 100: ; preds = %92 %101 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %95, i32 noundef %96, ptr noundef nonnull @.str.4) #3 br label %102 102: ; preds = %79, %81, %68, %98, %100, %87, %22, %35, %33 %103 = phi ptr [ %78, %79 ], [ %78, %81 ], [ %72, %68 ], [ %97, %98 ], [ %97, %100 ], [ %91, %87 ], [ %26, %22 ], [ %32, %35 ], [ %32, %33 ] %104 = phi <2 x i32> [ <i32 10, i32 131>, %79 ], [ <i32 15, i32 131>, %81 ], [ <i32 5, i32 131>, %68 ], [ <i32 10, i32 2>, %98 ], [ <i32 15, i32 2>, %100 ], [ <i32 5, i32 2>, %87 ], [ <i32 5, i32 2>, %22 ], [ <i32 15, i32 2>, %35 ], [ <i32 10, i32 2>, %33 ] %105 = load ptr, ptr %103, align 8, !tbaa !19 store i32 163, ptr %105, align 4, !tbaa !6 %106 = getelementptr inbounds i8, ptr %105, i64 4 %107 = extractelement <2 x i32> %104, i64 0 store i32 %107, ptr %106, align 4, !tbaa !6 %108 = getelementptr inbounds i8, ptr %105, i64 8 store <2 x i32> %104, ptr %108, align 4, !tbaa !6 %109 = getelementptr inbounds i8, ptr %105, i64 16 store i32 128, ptr %109, align 4, !tbaa !6 %110 = call i64 @rtl8723e_dm_bt_need_to_dec_bt_pwr(ptr noundef %0) #3 %111 = icmp eq i64 %110, 0 br i1 %111, label %114, label %112 112: ; preds = %102 %113 = getelementptr inbounds i8, ptr %2, i64 48 store i32 1, ptr %113, align 8, !tbaa !20 br label %114 114: ; preds = %112, %102 %115 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %116 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 %117 = load i64, ptr @hal_coex_8723, align 8, !tbaa !21 %118 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %115, i32 noundef %116, ptr noundef nonnull @.str.11, i64 noundef %117, i64 noundef %6) #3 %119 = load i64, ptr @hal_coex_8723, align 8, !tbaa !21 %120 = icmp ne i64 %119, 0 %121 = load i64, ptr @BT_TXRX_CNT_LEVEL_3, align 8 %122 = icmp eq i64 %121, %6 %123 = select i1 %120, i1 true, i1 %122 br i1 %123, label %124, label %132 124: ; preds = %114 %125 = load i32, ptr @COMP_BT_COEXIST, align 4, !tbaa !6 %126 = load i32, ptr @DBG_DMESG, align 4, !tbaa !6 %127 = call i32 (ptr, i32, i32, ptr, ...) @RT_TRACE(ptr noundef nonnull %3, i32 noundef %125, i32 noundef %126, ptr noundef nonnull @.str.12) #3 %128 = getelementptr inbounds i8, ptr %2, i64 36 store i32 1, ptr %128, align 4, !tbaa !17 %129 = getelementptr inbounds i8, ptr %2, i64 40 %130 = load ptr, ptr %129, align 8, !tbaa !19 store <4 x i32> <i32 163, i32 5, i32 5, i32 2>, ptr %130, align 4, !tbaa !6 %131 = getelementptr inbounds i8, ptr %130, i64 16 store i32 128, ptr %131, align 4, !tbaa !6 br label %132 132: ; preds = %114, %124 %133 = call i64 @rtl8723e_dm_bt_is_coexist_state_changed(ptr noundef %0) #3 %134 = icmp eq i64 %133, 0 br i1 %134, label %137, label %135 135: ; preds = %132 %136 = call i32 @rtl8723e_dm_bt_set_bt_dm(ptr noundef %0, ptr noundef nonnull %2) #3 br label %137 137: ; preds = %135, %132 call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %2) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @rtl_priv(ptr noundef) local_unnamed_addr #2 declare i32 @rtl8723e_dm_bt_btdm_structure_reload(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @rtl8723e_dm_bt_bt_tx_rx_counter_level(ptr noundef) local_unnamed_addr #2 declare i32 @RT_TRACE(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #2 declare i64 @rtl8723e_dm_bt_check_coex_rssi_state(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i64 @rtl8723e_dm_bt_check_coex_rssi_state1(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rtl_write_byte(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i64 @rtl8723e_dm_bt_need_to_dec_bt_pwr(ptr noundef) local_unnamed_addr #2 declare i64 @rtl8723e_dm_bt_is_coexist_state_changed(ptr noundef) local_unnamed_addr #2 declare i32 @rtl8723e_dm_bt_set_bt_dm(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"btdm_8723", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !12, i64 40, !7, i64 48} !12 = !{!"any pointer", !8, i64 0} !13 = !{!14, !15, i64 0} !14 = !{!"rtl_phy", !15, i64 0} !15 = !{!"long", !8, i64 0} !16 = !{!15, !15, i64 0} !17 = !{!11, !7, i64 36} !18 = !{!11, !7, i64 20} !19 = !{!11, !12, i64 40} !20 = !{!11, !7, i64 48} !21 = !{!22, !15, i64 0} !22 = !{!"TYPE_2__", !15, i64 0}
linux_drivers_net_wireless_realtek_rtlwifi_rtl8723ae_extr_hal_btc.c_rtl8723e_dm_bt_2_ant_hid_sco_esco
; ModuleID = 'AnghaBench/linux/arch/arm64/kvm/extr_sys_regs.c___access_id_reg.c' source_filename = "AnghaBench/linux/arch/arm64/kvm/extr_sys_regs.c___access_id_reg.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.sys_reg_params = type { i32, i64 } @llvm.compiler.used = appending global [1 x ptr] [ptr @__access_id_reg], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @__access_id_reg(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 { %5 = getelementptr inbounds %struct.sys_reg_params, ptr %1, i64 0, i32 1 %6 = load i64, ptr %5, align 8, !tbaa !5 %7 = icmp eq i64 %6, 0 br i1 %7, label %10, label %8 8: ; preds = %4 %9 = tail call i32 @write_to_read_only(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2) #2 br label %12 10: ; preds = %4 %11 = tail call i32 @read_id_reg(ptr noundef %0, ptr noundef %2, i32 noundef %3) #2 store i32 %11, ptr %1, align 8, !tbaa !11 br label %12 12: ; preds = %10, %8 %13 = phi i32 [ %9, %8 ], [ 1, %10 ] ret i32 %13 } declare i32 @write_to_read_only(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @read_id_reg(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"sys_reg_params", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!6, !7, i64 0}
; ModuleID = 'AnghaBench/linux/arch/arm64/kvm/extr_sys_regs.c___access_id_reg.c' source_filename = "AnghaBench/linux/arch/arm64/kvm/extr_sys_regs.c___access_id_reg.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @__access_id_reg], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @__access_id_reg(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 { %5 = getelementptr inbounds i8, ptr %1, i64 8 %6 = load i64, ptr %5, align 8, !tbaa !6 %7 = icmp eq i64 %6, 0 br i1 %7, label %10, label %8 8: ; preds = %4 %9 = tail call i32 @write_to_read_only(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2) #2 br label %12 10: ; preds = %4 %11 = tail call i32 @read_id_reg(ptr noundef %0, ptr noundef %2, i32 noundef %3) #2 store i32 %11, ptr %1, align 8, !tbaa !12 br label %12 12: ; preds = %10, %8 %13 = phi i32 [ %9, %8 ], [ 1, %10 ] ret i32 %13 } declare i32 @write_to_read_only(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @read_id_reg(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"sys_reg_params", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!7, !8, i64 0}
linux_arch_arm64_kvm_extr_sys_regs.c___access_id_reg
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_ni_660x.c_ni_660x_num_counters.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_ni_660x.c_ni_660x_num_counters.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @counters_per_chip = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ni_660x_num_counters], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal i32 @ni_660x_num_counters(ptr noundef %0) #0 { %2 = tail call ptr @board(ptr noundef %0) #2 %3 = load i32, ptr %2, align 4, !tbaa !5 %4 = load i32, ptr @counters_per_chip, align 4, !tbaa !10 %5 = mul nsw i32 %4, %3 ret i32 %5 } declare ptr @board(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_2__", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_ni_660x.c_ni_660x_num_counters.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_ni_660x.c_ni_660x_num_counters.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @counters_per_chip = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ni_660x_num_counters], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal i32 @ni_660x_num_counters(ptr noundef %0) #0 { %2 = tail call ptr @board(ptr noundef %0) #2 %3 = load i32, ptr %2, align 4, !tbaa !6 %4 = load i32, ptr @counters_per_chip, align 4, !tbaa !11 %5 = mul nsw i32 %4, %3 ret i32 %5 } declare ptr @board(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_2__", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0}
fastsocket_kernel_drivers_staging_comedi_drivers_extr_ni_660x.c_ni_660x_num_counters
; ModuleID = 'AnghaBench/xLua/build/lua-5.3.5/src/extr_lparser.c_gotostat.c' source_filename = "AnghaBench/xLua/build/lua-5.3.5/src/extr_lparser.c_gotostat.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_10__ = type { i32, ptr, i32 } @TK_GOTO = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [6 x i8] c"break\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @gotostat], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @gotostat(ptr noundef %0, i32 noundef %1) #0 { %3 = load i32, ptr %0, align 8, !tbaa !5 %4 = load i32, ptr @TK_GOTO, align 4, !tbaa !11 %5 = tail call i64 @testnext(ptr noundef nonnull %0, i32 noundef %4) #2 %6 = icmp eq i64 %5, 0 br i1 %6, label %9, label %7 7: ; preds = %2 %8 = tail call ptr @str_checkname(ptr noundef nonnull %0) #2 br label %14 9: ; preds = %2 %10 = tail call i32 @luaX_next(ptr noundef nonnull %0) #2 %11 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 2 %12 = load i32, ptr %11, align 8, !tbaa !12 %13 = tail call ptr @luaS_new(i32 noundef %12, ptr noundef nonnull @.str) #2 br label %14 14: ; preds = %9, %7 %15 = phi ptr [ %8, %7 ], [ %13, %9 ] %16 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1 %17 = load ptr, ptr %16, align 8, !tbaa !13 %18 = tail call i32 @newlabelentry(ptr noundef nonnull %0, ptr noundef %17, ptr noundef %15, i32 noundef %3, i32 noundef %1) #2 %19 = tail call i32 @findlabel(ptr noundef nonnull %0, i32 noundef %18) #2 ret void } declare i64 @testnext(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @str_checkname(ptr noundef) local_unnamed_addr #1 declare i32 @luaX_next(ptr noundef) local_unnamed_addr #1 declare ptr @luaS_new(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @newlabelentry(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @findlabel(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_10__", !7, i64 0, !10, i64 8, !7, i64 16} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!7, !7, i64 0} !12 = !{!6, !7, i64 16} !13 = !{!6, !10, i64 8}
; ModuleID = 'AnghaBench/xLua/build/lua-5.3.5/src/extr_lparser.c_gotostat.c' source_filename = "AnghaBench/xLua/build/lua-5.3.5/src/extr_lparser.c_gotostat.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @TK_GOTO = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [6 x i8] c"break\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @gotostat], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @gotostat(ptr noundef %0, i32 noundef %1) #0 { %3 = load i32, ptr %0, align 8, !tbaa !6 %4 = load i32, ptr @TK_GOTO, align 4, !tbaa !12 %5 = tail call i64 @testnext(ptr noundef nonnull %0, i32 noundef %4) #2 %6 = icmp eq i64 %5, 0 br i1 %6, label %9, label %7 7: ; preds = %2 %8 = tail call ptr @str_checkname(ptr noundef nonnull %0) #2 br label %14 9: ; preds = %2 %10 = tail call i32 @luaX_next(ptr noundef nonnull %0) #2 %11 = getelementptr inbounds i8, ptr %0, i64 16 %12 = load i32, ptr %11, align 8, !tbaa !13 %13 = tail call ptr @luaS_new(i32 noundef %12, ptr noundef nonnull @.str) #2 br label %14 14: ; preds = %9, %7 %15 = phi ptr [ %8, %7 ], [ %13, %9 ] %16 = getelementptr inbounds i8, ptr %0, i64 8 %17 = load ptr, ptr %16, align 8, !tbaa !14 %18 = tail call i32 @newlabelentry(ptr noundef nonnull %0, ptr noundef %17, ptr noundef %15, i32 noundef %3, i32 noundef %1) #2 %19 = tail call i32 @findlabel(ptr noundef nonnull %0, i32 noundef %18) #2 ret void } declare i64 @testnext(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @str_checkname(ptr noundef) local_unnamed_addr #1 declare i32 @luaX_next(ptr noundef) local_unnamed_addr #1 declare ptr @luaS_new(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @newlabelentry(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @findlabel(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_10__", !8, i64 0, !11, i64 8, !8, i64 16} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!8, !8, i64 0} !13 = !{!7, !8, i64 16} !14 = !{!7, !11, i64 8}
xLua_build_lua-5.3.5_src_extr_lparser.c_gotostat
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_hif_usb.c_ath9k_hif_usb_disconnect.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_hif_usb.c_ath9k_hif_usb_disconnect.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.hif_device_usb = type { i32, i32, i32 } %struct.usb_device = type { i64, i32 } @USB_STATE_NOTATTACHED = dso_local local_unnamed_addr global i64 0, align 8 @HIF_USB_READY = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [36 x i8] c"ath9k_htc: USB layer deinitialized\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @ath9k_hif_usb_disconnect], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @ath9k_hif_usb_disconnect(ptr noundef %0) #0 { %2 = tail call ptr @interface_to_usbdev(ptr noundef %0) #2 %3 = tail call ptr @usb_get_intfdata(ptr noundef %0) #2 %4 = load i64, ptr %2, align 8, !tbaa !5 %5 = load i64, ptr @USB_STATE_NOTATTACHED, align 8, !tbaa !11 %6 = icmp eq i64 %4, %5 %7 = zext i1 %6 to i32 %8 = icmp eq ptr %3, null br i1 %8, label %37, label %9 9: ; preds = %1 %10 = getelementptr inbounds %struct.hif_device_usb, ptr %3, i64 0, i32 2 %11 = tail call i32 @wait_for_completion(ptr noundef nonnull %10) #2 %12 = load i32, ptr %3, align 4, !tbaa !12 %13 = load i32, ptr @HIF_USB_READY, align 4, !tbaa !14 %14 = and i32 %13, %12 %15 = icmp eq i32 %14, 0 br i1 %15, label %23, label %16 16: ; preds = %9 %17 = getelementptr inbounds %struct.hif_device_usb, ptr %3, i64 0, i32 1 %18 = load i32, ptr %17, align 4, !tbaa !15 %19 = tail call i32 @ath9k_htc_hw_deinit(i32 noundef %18, i32 noundef %7) #2 %20 = load i32, ptr %17, align 4, !tbaa !15 %21 = tail call i32 @ath9k_htc_hw_free(i32 noundef %20) #2 %22 = tail call i32 @ath9k_hif_usb_dev_deinit(ptr noundef nonnull %3) #2 br label %23 23: ; preds = %16, %9 %24 = tail call i32 @usb_set_intfdata(ptr noundef %0, ptr noundef null) #2 br i1 %6, label %32, label %25 25: ; preds = %23 %26 = load i32, ptr %3, align 4, !tbaa !12 %27 = load i32, ptr @HIF_USB_READY, align 4, !tbaa !14 %28 = and i32 %27, %26 %29 = icmp eq i32 %28, 0 br i1 %29, label %32, label %30 30: ; preds = %25 %31 = tail call i32 @ath9k_hif_usb_reboot(ptr noundef nonnull %2) #2 br label %32 32: ; preds = %30, %25, %23 %33 = tail call i32 @kfree(ptr noundef nonnull %3) #2 %34 = getelementptr inbounds %struct.usb_device, ptr %2, i64 0, i32 1 %35 = tail call i32 @dev_info(ptr noundef nonnull %34, ptr noundef nonnull @.str) #2 %36 = tail call i32 @usb_put_dev(ptr noundef nonnull %2) #2 br label %37 37: ; preds = %1, %32 ret void } declare ptr @interface_to_usbdev(ptr noundef) local_unnamed_addr #1 declare ptr @usb_get_intfdata(ptr noundef) local_unnamed_addr #1 declare i32 @wait_for_completion(ptr noundef) local_unnamed_addr #1 declare i32 @ath9k_htc_hw_deinit(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ath9k_htc_hw_free(i32 noundef) local_unnamed_addr #1 declare i32 @ath9k_hif_usb_dev_deinit(ptr noundef) local_unnamed_addr #1 declare i32 @usb_set_intfdata(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ath9k_hif_usb_reboot(ptr noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 declare i32 @dev_info(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @usb_put_dev(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"usb_device", !7, i64 0, !10, i64 8} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!7, !7, i64 0} !12 = !{!13, !10, i64 0} !13 = !{!"hif_device_usb", !10, i64 0, !10, i64 4, !10, i64 8} !14 = !{!10, !10, i64 0} !15 = !{!13, !10, i64 4}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_hif_usb.c_ath9k_hif_usb_disconnect.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_hif_usb.c_ath9k_hif_usb_disconnect.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @USB_STATE_NOTATTACHED = common local_unnamed_addr global i64 0, align 8 @HIF_USB_READY = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [36 x i8] c"ath9k_htc: USB layer deinitialized\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @ath9k_hif_usb_disconnect], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @ath9k_hif_usb_disconnect(ptr noundef %0) #0 { %2 = tail call ptr @interface_to_usbdev(ptr noundef %0) #2 %3 = tail call ptr @usb_get_intfdata(ptr noundef %0) #2 %4 = load i64, ptr %2, align 8, !tbaa !6 %5 = load i64, ptr @USB_STATE_NOTATTACHED, align 8, !tbaa !12 %6 = icmp eq i64 %4, %5 %7 = zext i1 %6 to i32 %8 = icmp eq ptr %3, null br i1 %8, label %37, label %9 9: ; preds = %1 %10 = getelementptr inbounds i8, ptr %3, i64 8 %11 = tail call i32 @wait_for_completion(ptr noundef nonnull %10) #2 %12 = load i32, ptr %3, align 4, !tbaa !13 %13 = load i32, ptr @HIF_USB_READY, align 4, !tbaa !15 %14 = and i32 %13, %12 %15 = icmp eq i32 %14, 0 br i1 %15, label %23, label %16 16: ; preds = %9 %17 = getelementptr inbounds i8, ptr %3, i64 4 %18 = load i32, ptr %17, align 4, !tbaa !16 %19 = tail call i32 @ath9k_htc_hw_deinit(i32 noundef %18, i32 noundef %7) #2 %20 = load i32, ptr %17, align 4, !tbaa !16 %21 = tail call i32 @ath9k_htc_hw_free(i32 noundef %20) #2 %22 = tail call i32 @ath9k_hif_usb_dev_deinit(ptr noundef nonnull %3) #2 br label %23 23: ; preds = %16, %9 %24 = tail call i32 @usb_set_intfdata(ptr noundef %0, ptr noundef null) #2 br i1 %6, label %32, label %25 25: ; preds = %23 %26 = load i32, ptr %3, align 4, !tbaa !13 %27 = load i32, ptr @HIF_USB_READY, align 4, !tbaa !15 %28 = and i32 %27, %26 %29 = icmp eq i32 %28, 0 br i1 %29, label %32, label %30 30: ; preds = %25 %31 = tail call i32 @ath9k_hif_usb_reboot(ptr noundef nonnull %2) #2 br label %32 32: ; preds = %30, %25, %23 %33 = tail call i32 @kfree(ptr noundef nonnull %3) #2 %34 = getelementptr inbounds i8, ptr %2, i64 8 %35 = tail call i32 @dev_info(ptr noundef nonnull %34, ptr noundef nonnull @.str) #2 %36 = tail call i32 @usb_put_dev(ptr noundef nonnull %2) #2 br label %37 37: ; preds = %1, %32 ret void } declare ptr @interface_to_usbdev(ptr noundef) local_unnamed_addr #1 declare ptr @usb_get_intfdata(ptr noundef) local_unnamed_addr #1 declare i32 @wait_for_completion(ptr noundef) local_unnamed_addr #1 declare i32 @ath9k_htc_hw_deinit(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ath9k_htc_hw_free(i32 noundef) local_unnamed_addr #1 declare i32 @ath9k_hif_usb_dev_deinit(ptr noundef) local_unnamed_addr #1 declare i32 @usb_set_intfdata(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ath9k_hif_usb_reboot(ptr noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 declare i32 @dev_info(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @usb_put_dev(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"usb_device", !8, i64 0, !11, i64 8} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!8, !8, i64 0} !13 = !{!14, !11, i64 0} !14 = !{!"hif_device_usb", !11, i64 0, !11, i64 4, !11, i64 8} !15 = !{!11, !11, i64 0} !16 = !{!14, !11, i64 4}
fastsocket_kernel_drivers_net_wireless_ath_ath9k_extr_hif_usb.c_ath9k_hif_usb_disconnect
; ModuleID = 'AnghaBench/fastsocket/kernel/net/netfilter/extr_nf_conntrack_netlink.c_ctnetlink_exp_fill_info.c' source_filename = "AnghaBench/fastsocket/kernel/net/netfilter/extr_nf_conntrack_netlink.c_ctnetlink_exp_fill_info.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.nfgenmsg = type { i64, i32, i32 } @NLM_F_MULTI = dso_local local_unnamed_addr global i32 0, align 4 @NFNL_SUBSYS_CTNETLINK_EXP = dso_local local_unnamed_addr global i32 0, align 4 @NFNETLINK_V0 = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ctnetlink_exp_fill_info], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ctnetlink_exp_fill_info(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %3, ptr noundef %4) #0 { %6 = icmp eq i64 %1, 0 %7 = load i32, ptr @NLM_F_MULTI, align 4 %8 = select i1 %6, i32 0, i32 %7 %9 = load i32, ptr @NFNL_SUBSYS_CTNETLINK_EXP, align 4, !tbaa !5 %10 = shl i32 %9, 8 %11 = or i32 %10, %3 %12 = tail call ptr @nlmsg_put(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %11, i32 noundef 16, i32 noundef %8) #2 %13 = icmp eq ptr %12, null br i1 %13, label %25, label %14 14: ; preds = %5 %15 = tail call ptr @nlmsg_data(ptr noundef nonnull %12) #2 %16 = load i32, ptr %4, align 4, !tbaa !9 %17 = getelementptr inbounds %struct.nfgenmsg, ptr %15, i64 0, i32 2 store i32 %16, ptr %17, align 4, !tbaa !13 %18 = load i32, ptr @NFNETLINK_V0, align 4, !tbaa !5 %19 = getelementptr inbounds %struct.nfgenmsg, ptr %15, i64 0, i32 1 store i32 %18, ptr %19, align 8, !tbaa !16 store i64 0, ptr %15, align 8, !tbaa !17 %20 = tail call i64 @ctnetlink_exp_dump_expect(ptr noundef %0, ptr noundef nonnull %4) #2 %21 = icmp slt i64 %20, 0 br i1 %21, label %25, label %22 22: ; preds = %14 %23 = tail call i32 @nlmsg_end(ptr noundef %0, ptr noundef nonnull %12) #2 %24 = load i32, ptr %0, align 4, !tbaa !18 br label %27 25: ; preds = %5, %14 %26 = tail call i32 @nlmsg_cancel(ptr noundef %0, ptr noundef %12) #2 br label %27 27: ; preds = %25, %22 %28 = phi i32 [ -1, %25 ], [ %24, %22 ] ret i32 %28 } declare ptr @nlmsg_put(ptr noundef, i64 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @nlmsg_data(ptr noundef) local_unnamed_addr #1 declare i64 @ctnetlink_exp_dump_expect(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @nlmsg_end(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @nlmsg_cancel(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"nf_conntrack_expect", !11, i64 0} !11 = !{!"TYPE_4__", !12, i64 0} !12 = !{!"TYPE_3__", !6, i64 0} !13 = !{!14, !6, i64 12} !14 = !{!"nfgenmsg", !15, i64 0, !6, i64 8, !6, i64 12} !15 = !{!"long", !7, i64 0} !16 = !{!14, !6, i64 8} !17 = !{!14, !15, i64 0} !18 = !{!19, !6, i64 0} !19 = !{!"sk_buff", !6, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/net/netfilter/extr_nf_conntrack_netlink.c_ctnetlink_exp_fill_info.c' source_filename = "AnghaBench/fastsocket/kernel/net/netfilter/extr_nf_conntrack_netlink.c_ctnetlink_exp_fill_info.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @NLM_F_MULTI = common local_unnamed_addr global i32 0, align 4 @NFNL_SUBSYS_CTNETLINK_EXP = common local_unnamed_addr global i32 0, align 4 @NFNETLINK_V0 = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ctnetlink_exp_fill_info], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ctnetlink_exp_fill_info(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %3, ptr noundef %4) #0 { %6 = icmp eq i64 %1, 0 %7 = load i32, ptr @NLM_F_MULTI, align 4 %8 = select i1 %6, i32 0, i32 %7 %9 = load i32, ptr @NFNL_SUBSYS_CTNETLINK_EXP, align 4, !tbaa !6 %10 = shl i32 %9, 8 %11 = or i32 %10, %3 %12 = tail call ptr @nlmsg_put(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %11, i32 noundef 16, i32 noundef %8) #2 %13 = icmp eq ptr %12, null br i1 %13, label %25, label %14 14: ; preds = %5 %15 = tail call ptr @nlmsg_data(ptr noundef nonnull %12) #2 %16 = load i32, ptr %4, align 4, !tbaa !10 %17 = getelementptr inbounds i8, ptr %15, i64 12 store i32 %16, ptr %17, align 4, !tbaa !14 %18 = load i32, ptr @NFNETLINK_V0, align 4, !tbaa !6 %19 = getelementptr inbounds i8, ptr %15, i64 8 store i32 %18, ptr %19, align 8, !tbaa !17 store i64 0, ptr %15, align 8, !tbaa !18 %20 = tail call i64 @ctnetlink_exp_dump_expect(ptr noundef %0, ptr noundef nonnull %4) #2 %21 = icmp slt i64 %20, 0 br i1 %21, label %25, label %22 22: ; preds = %14 %23 = tail call i32 @nlmsg_end(ptr noundef %0, ptr noundef nonnull %12) #2 %24 = load i32, ptr %0, align 4, !tbaa !19 br label %27 25: ; preds = %5, %14 %26 = tail call i32 @nlmsg_cancel(ptr noundef %0, ptr noundef %12) #2 br label %27 27: ; preds = %25, %22 %28 = phi i32 [ -1, %25 ], [ %24, %22 ] ret i32 %28 } declare ptr @nlmsg_put(ptr noundef, i64 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @nlmsg_data(ptr noundef) local_unnamed_addr #1 declare i64 @ctnetlink_exp_dump_expect(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @nlmsg_end(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @nlmsg_cancel(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"nf_conntrack_expect", !12, i64 0} !12 = !{!"TYPE_4__", !13, i64 0} !13 = !{!"TYPE_3__", !7, i64 0} !14 = !{!15, !7, i64 12} !15 = !{!"nfgenmsg", !16, i64 0, !7, i64 8, !7, i64 12} !16 = !{!"long", !8, i64 0} !17 = !{!15, !7, i64 8} !18 = !{!15, !16, i64 0} !19 = !{!20, !7, i64 0} !20 = !{!"sk_buff", !7, i64 0}
fastsocket_kernel_net_netfilter_extr_nf_conntrack_netlink.c_ctnetlink_exp_fill_info
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/util/extr_net_help.c_fd_set_block.c' source_filename = "AnghaBench/freebsd/contrib/unbound/util/extr_net_help.c_fd_set_block.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @FIONBIO = dso_local local_unnamed_addr global i32 0, align 4 @F_GETFL = dso_local local_unnamed_addr global i32 0, align 4 @F_SETFL = dso_local local_unnamed_addr global i32 0, align 4 @O_NONBLOCK = dso_local local_unnamed_addr global i32 0, align 4 @WSAEINVAL = dso_local local_unnamed_addr global i64 0, align 8 @errno = dso_local local_unnamed_addr global i32 0, align 4 @verbosity = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define dso_local noundef i32 @fd_set_block(i32 noundef %0) local_unnamed_addr #0 { ret i32 1 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/util/extr_net_help.c_fd_set_block.c' source_filename = "AnghaBench/freebsd/contrib/unbound/util/extr_net_help.c_fd_set_block.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @FIONBIO = common local_unnamed_addr global i32 0, align 4 @F_GETFL = common local_unnamed_addr global i32 0, align 4 @F_SETFL = common local_unnamed_addr global i32 0, align 4 @O_NONBLOCK = common local_unnamed_addr global i32 0, align 4 @WSAEINVAL = common local_unnamed_addr global i64 0, align 8 @errno = common local_unnamed_addr global i32 0, align 4 @verbosity = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define noundef i32 @fd_set_block(i32 noundef %0) local_unnamed_addr #0 { ret i32 1 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
freebsd_contrib_unbound_util_extr_net_help.c_fd_set_block
; ModuleID = 'AnghaBench/freebsd/sys/cam/extr_cam_iosched.c_cam_iosched_set_trim_ticks.c' source_filename = "AnghaBench/freebsd/sys/cam/extr_cam_iosched.c_cam_iosched_set_trim_ticks.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable define dso_local void @cam_iosched_set_trim_ticks(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 { store i32 %1, ptr %0, align 4, !tbaa !5 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"cam_iosched_softc", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/sys/cam/extr_cam_iosched.c_cam_iosched_set_trim_ticks.c' source_filename = "AnghaBench/freebsd/sys/cam/extr_cam_iosched.c_cam_iosched_set_trim_ticks.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) define void @cam_iosched_set_trim_ticks(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 { store i32 %1, ptr %0, align 4, !tbaa !6 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"cam_iosched_softc", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
freebsd_sys_cam_extr_cam_iosched.c_cam_iosched_set_trim_ticks
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_phy_a.c_b43_aphy_op_allocate.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_phy_a.c_b43_aphy_op_allocate.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @b43_aphy_op_allocate], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @b43_aphy_op_allocate(ptr noundef %0) #0 { %2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5 %3 = tail call ptr @kzalloc(i32 noundef 4, i32 noundef %2) #2 %4 = icmp eq ptr %3, null br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @ENOMEM, align 4, !tbaa !5 %7 = sub nsw i32 0, %6 br label %13 8: ; preds = %1 store ptr %3, ptr %0, align 8, !tbaa !9 %9 = tail call i32 @b43_aphy_init_tssi2dbm_table(ptr noundef nonnull %0) #2 %10 = icmp eq i32 %9, 0 br i1 %10, label %13, label %11 11: ; preds = %8 %12 = tail call i32 @kfree(ptr noundef nonnull %3) #2 store ptr null, ptr %0, align 8, !tbaa !9 br label %13 13: ; preds = %8, %11, %5 %14 = phi i32 [ %9, %11 ], [ %7, %5 ], [ 0, %8 ] ret i32 %14 } declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @b43_aphy_init_tssi2dbm_table(ptr noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !12, i64 0} !10 = !{!"b43_wldev", !11, i64 0} !11 = !{!"TYPE_2__", !12, i64 0} !12 = !{!"any pointer", !7, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_phy_a.c_b43_aphy_op_allocate.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_phy_a.c_b43_aphy_op_allocate.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @b43_aphy_op_allocate], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @b43_aphy_op_allocate(ptr noundef %0) #0 { %2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6 %3 = tail call ptr @kzalloc(i32 noundef 4, i32 noundef %2) #2 %4 = icmp eq ptr %3, null br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @ENOMEM, align 4, !tbaa !6 %7 = sub nsw i32 0, %6 br label %13 8: ; preds = %1 store ptr %3, ptr %0, align 8, !tbaa !10 %9 = tail call i32 @b43_aphy_init_tssi2dbm_table(ptr noundef nonnull %0) #2 %10 = icmp eq i32 %9, 0 br i1 %10, label %13, label %11 11: ; preds = %8 %12 = tail call i32 @kfree(ptr noundef nonnull %3) #2 store ptr null, ptr %0, align 8, !tbaa !10 br label %13 13: ; preds = %8, %11, %5 %14 = phi i32 [ %9, %11 ], [ %7, %5 ], [ 0, %8 ] ret i32 %14 } declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @b43_aphy_init_tssi2dbm_table(ptr noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !13, i64 0} !11 = !{!"b43_wldev", !12, i64 0} !12 = !{!"TYPE_2__", !13, i64 0} !13 = !{!"any pointer", !8, i64 0}
fastsocket_kernel_drivers_net_wireless_b43_extr_phy_a.c_b43_aphy_op_allocate
; ModuleID = 'AnghaBench/h2o/deps/klib/extr_kstring.h_ks_len.c' source_filename = "AnghaBench/h2o/deps/klib/extr_kstring.h_ks_len.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @ks_len], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable define internal i64 @ks_len(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !5 ret i64 %2 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_3__", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/h2o/deps/klib/extr_kstring.h_ks_len.c' source_filename = "AnghaBench/h2o/deps/klib/extr_kstring.h_ks_len.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @ks_len], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) define internal i64 @ks_len(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !6 ret i64 %2 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_3__", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
h2o_deps_klib_extr_kstring.h_ks_len
; ModuleID = 'AnghaBench/lab/engine/code/tools/lcc/src/extr_enode.c_assign.c' source_filename = "AnghaBench/lab/engine/code/tools/lcc/src/extr_enode.c_assign.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-pc-linux-gnu" %struct.TYPE_21__ = type { i64, %struct.TYPE_21__* } %struct.TYPE_22__ = type { %struct.TYPE_21__* } @inttype = dso_local local_unnamed_addr global %struct.TYPE_21__* null, align 8 @Aflag = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [56 x i8] c"assignment between `%t' and `%t' is compiler-dependent\0A\00", align 1 ; Function Attrs: nounwind uwtable define dso_local %struct.TYPE_21__* @assign(%struct.TYPE_21__* noundef %0, %struct.TYPE_22__* noundef %1) local_unnamed_addr #0 { %3 = getelementptr inbounds %struct.TYPE_22__, %struct.TYPE_22__* %1, i64 0, i32 0 %4 = load %struct.TYPE_21__*, %struct.TYPE_21__** %3, align 8, !tbaa !5 %5 = tail call %struct.TYPE_21__* @unqual(%struct.TYPE_21__* noundef %4) #2 %6 = tail call %struct.TYPE_21__* @unqual(%struct.TYPE_21__* noundef %0) #2 %7 = tail call i64 @isenum(%struct.TYPE_21__* noundef %6) #2 %8 = icmp eq i64 %7, 0 br i1 %8, label %12, label %9 9: ; preds = %2 %10 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %6, i64 0, i32 1 %11 = load %struct.TYPE_21__*, %struct.TYPE_21__** %10, align 8, !tbaa !10 br label %12 12: ; preds = %9, %2 %13 = phi %struct.TYPE_21__* [ %11, %9 ], [ %6, %2 ] %14 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %13, i64 0, i32 0 %15 = load i64, i64* %14, align 8, !tbaa !13 %16 = icmp eq i64 %15, 0 br i1 %16, label %147, label %17 17: ; preds = %12 %18 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %5, i64 0, i32 0 %19 = load i64, i64* %18, align 8, !tbaa !13 %20 = icmp eq i64 %19, 0 br i1 %20, label %147, label %21 21: ; preds = %17 %22 = tail call i64 @isarith(%struct.TYPE_21__* noundef nonnull %13) #2 %23 = icmp eq i64 %22, 0 br i1 %23, label %27, label %24 24: ; preds = %21 %25 = tail call i64 @isarith(%struct.TYPE_21__* noundef nonnull %5) #2 %26 = icmp eq i64 %25, 0 br i1 %26, label %27, label %147 27: ; preds = %24, %21 %28 = tail call i64 @isstruct(%struct.TYPE_21__* noundef nonnull %13) #2 %29 = icmp ne i64 %28, 0 %30 = icmp eq %struct.TYPE_21__* %13, %5 %31 = select i1 %29, i1 %30, i1 false br i1 %31, label %147, label %32 32: ; preds = %27 %33 = tail call i64 @isptr(%struct.TYPE_21__* noundef nonnull %13) #2 %34 = icmp eq i64 %33, 0 br i1 %34, label %38, label %35 35: ; preds = %32 %36 = tail call i64 @isnullptr(%struct.TYPE_22__* noundef nonnull %1) #2 %37 = icmp eq i64 %36, 0 br i1 %37, label %38, label %147 38: ; preds = %35, %32 %39 = tail call i64 @isvoidptr(%struct.TYPE_21__* noundef nonnull %13) #2 %40 = icmp eq i64 %39, 0 br i1 %40, label %44, label %41 41: ; preds = %38 %42 = tail call i64 @isptr(%struct.TYPE_21__* noundef nonnull %5) #2 %43 = icmp eq i64 %42, 0 br i1 %43, label %44, label %50 44: ; preds = %41, %38 %45 = tail call i64 @isptr(%struct.TYPE_21__* noundef nonnull %13) #2 %46 = icmp eq i64 %45, 0 br i1 %46, label %69, label %47 47: ; preds = %44 %48 = tail call i64 @isvoidptr(%struct.TYPE_21__* noundef nonnull %5) #2 %49 = icmp eq i64 %48, 0 br i1 %49, label %69, label %50 50: ; preds = %47, %41 %51 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %13, i64 0, i32 1 %52 = load %struct.TYPE_21__*, %struct.TYPE_21__** %51, align 8, !tbaa !10 %53 = tail call i64 @isconst(%struct.TYPE_21__* noundef %52) #2 %54 = icmp eq i64 %53, 0 br i1 %54, label %55, label %60 55: ; preds = %50 %56 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %5, i64 0, i32 1 %57 = load %struct.TYPE_21__*, %struct.TYPE_21__** %56, align 8, !tbaa !10 %58 = tail call i64 @isconst(%struct.TYPE_21__* noundef %57) #2 %59 = icmp eq i64 %58, 0 br i1 %59, label %60, label %69 60: ; preds = %55, %50 %61 = load %struct.TYPE_21__*, %struct.TYPE_21__** %51, align 8, !tbaa !10 %62 = tail call i64 @isvolatile(%struct.TYPE_21__* noundef %61) #2 %63 = icmp eq i64 %62, 0 br i1 %63, label %64, label %147 64: ; preds = %60 %65 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %5, i64 0, i32 1 %66 = load %struct.TYPE_21__*, %struct.TYPE_21__** %65, align 8, !tbaa !10 %67 = tail call i64 @isvolatile(%struct.TYPE_21__* noundef %66) #2 %68 = icmp eq i64 %67, 0 br i1 %68, label %147, label %69 69: ; preds = %64, %55, %47, %44 %70 = tail call i64 @isptr(%struct.TYPE_21__* noundef nonnull %13) #2 %71 = icmp eq i64 %70, 0 br i1 %71, label %100, label %72 72: ; preds = %69 %73 = tail call i64 @isptr(%struct.TYPE_21__* noundef nonnull %5) #2 %74 = icmp eq i64 %73, 0 br i1 %74, label %100, label %75 75: ; preds = %72 %76 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %13, i64 0, i32 1 %77 = load %struct.TYPE_21__*, %struct.TYPE_21__** %76, align 8, !tbaa !10 %78 = tail call %struct.TYPE_21__* @unqual(%struct.TYPE_21__* noundef %77) #2 %79 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %5, i64 0, i32 1 %80 = load %struct.TYPE_21__*, %struct.TYPE_21__** %79, align 8, !tbaa !10 %81 = tail call %struct.TYPE_21__* @unqual(%struct.TYPE_21__* noundef %80) #2 %82 = tail call i64 @eqtype(%struct.TYPE_21__* noundef %78, %struct.TYPE_21__* noundef %81, i32 noundef 1) #2 %83 = icmp eq i64 %82, 0 br i1 %83, label %100, label %84 84: ; preds = %75 %85 = load %struct.TYPE_21__*, %struct.TYPE_21__** %76, align 8, !tbaa !10 %86 = tail call i64 @isconst(%struct.TYPE_21__* noundef %85) #2 %87 = icmp eq i64 %86, 0 br i1 %87, label %88, label %92 88: ; preds = %84 %89 = load %struct.TYPE_21__*, %struct.TYPE_21__** %79, align 8, !tbaa !10 %90 = tail call i64 @isconst(%struct.TYPE_21__* noundef %89) #2 %91 = icmp eq i64 %90, 0 br i1 %91, label %92, label %100 92: ; preds = %88, %84 %93 = load %struct.TYPE_21__*, %struct.TYPE_21__** %76, align 8, !tbaa !10 %94 = tail call i64 @isvolatile(%struct.TYPE_21__* noundef %93) #2 %95 = icmp eq i64 %94, 0 br i1 %95, label %96, label %147 96: ; preds = %92 %97 = load %struct.TYPE_21__*, %struct.TYPE_21__** %79, align 8, !tbaa !10 %98 = tail call i64 @isvolatile(%struct.TYPE_21__* noundef %97) #2 %99 = icmp eq i64 %98, 0 br i1 %99, label %147, label %100 100: ; preds = %96, %88, %75, %72, %69 %101 = tail call i64 @isptr(%struct.TYPE_21__* noundef nonnull %13) #2 %102 = icmp eq i64 %101, 0 br i1 %102, label %147, label %103 103: ; preds = %100 %104 = tail call i64 @isptr(%struct.TYPE_21__* noundef nonnull %5) #2 %105 = icmp eq i64 %104, 0 br i1 %105, label %147, label %106 106: ; preds = %103 %107 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %13, i64 0, i32 1 %108 = load %struct.TYPE_21__*, %struct.TYPE_21__** %107, align 8, !tbaa !10 %109 = tail call i64 @isconst(%struct.TYPE_21__* noundef %108) #2 %110 = icmp eq i64 %109, 0 br i1 %110, label %111, label %116 111: ; preds = %106 %112 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %5, i64 0, i32 1 %113 = load %struct.TYPE_21__*, %struct.TYPE_21__** %112, align 8, !tbaa !10 %114 = tail call i64 @isconst(%struct.TYPE_21__* noundef %113) #2 %115 = icmp eq i64 %114, 0 br i1 %115, label %116, label %147 116: ; preds = %111, %106 %117 = load %struct.TYPE_21__*, %struct.TYPE_21__** %107, align 8, !tbaa !10 %118 = tail call i64 @isvolatile(%struct.TYPE_21__* noundef %117) #2 %119 = icmp eq i64 %118, 0 br i1 %119, label %120, label %125 120: ; preds = %116 %121 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %5, i64 0, i32 1 %122 = load %struct.TYPE_21__*, %struct.TYPE_21__** %121, align 8, !tbaa !10 %123 = tail call i64 @isvolatile(%struct.TYPE_21__* noundef %122) #2 %124 = icmp eq i64 %123, 0 br i1 %124, label %125, label %147 125: ; preds = %120, %116 %126 = load %struct.TYPE_21__*, %struct.TYPE_21__** %107, align 8, !tbaa !10 %127 = tail call %struct.TYPE_21__* @unqual(%struct.TYPE_21__* noundef %126) #2 %128 = getelementptr inbounds %struct.TYPE_21__, %struct.TYPE_21__* %5, i64 0, i32 1 %129 = load %struct.TYPE_21__*, %struct.TYPE_21__** %128, align 8, !tbaa !10 %130 = tail call %struct.TYPE_21__* @unqual(%struct.TYPE_21__* noundef %129) #2 %131 = tail call i64 @isenum(%struct.TYPE_21__* noundef %127) #2 %132 = icmp ne i64 %131, 0 %133 = load %struct.TYPE_21__*, %struct.TYPE_21__** @inttype, align 8 %134 = icmp eq %struct.TYPE_21__* %130, %133 %135 = select i1 %132, i1 %134, i1 false br i1 %135, label %142, label %136 136: ; preds = %125 %137 = tail call i64 @isenum(%struct.TYPE_21__* noundef %130) #2 %138 = icmp ne i64 %137, 0 %139 = load %struct.TYPE_21__*, %struct.TYPE_21__** @inttype, align 8 %140 = icmp eq %struct.TYPE_21__* %127, %139 %141 = select i1 %138, i1 %140, i1 false br i1 %141, label %142, label %147 142: ; preds = %136, %125 %143 = load i32, i32* @Aflag, align 4, !tbaa !14 %144 = icmp sgt i32 %143, 0 br i1 %144, label %145, label %147 145: ; preds = %142 %146 = tail call i32 @warning(i8* noundef getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0), %struct.TYPE_21__* noundef nonnull %13, %struct.TYPE_21__* noundef nonnull %5) #2 br label %147 147: ; preds = %142, %100, %103, %111, %120, %136, %145, %92, %96, %60, %64, %35, %24, %27, %12, %17 %148 = phi %struct.TYPE_21__* [ null, %17 ], [ null, %12 ], [ %5, %27 ], [ %13, %24 ], [ %13, %35 ], [ %13, %64 ], [ %13, %60 ], [ %13, %96 ], [ %13, %92 ], [ %13, %145 ], [ null, %136 ], [ null, %120 ], [ null, %111 ], [ null, %103 ], [ null, %100 ], [ %13, %142 ] ret %struct.TYPE_21__* %148 } declare %struct.TYPE_21__* @unqual(%struct.TYPE_21__* noundef) local_unnamed_addr #1 declare i64 @isenum(%struct.TYPE_21__* noundef) local_unnamed_addr #1 declare i64 @isarith(%struct.TYPE_21__* noundef) local_unnamed_addr #1 declare i64 @isstruct(%struct.TYPE_21__* noundef) local_unnamed_addr #1 declare i64 @isptr(%struct.TYPE_21__* noundef) local_unnamed_addr #1 declare i64 @isnullptr(%struct.TYPE_22__* noundef) local_unnamed_addr #1 declare i64 @isvoidptr(%struct.TYPE_21__* noundef) local_unnamed_addr #1 declare i64 @isconst(%struct.TYPE_21__* noundef) local_unnamed_addr #1 declare i64 @isvolatile(%struct.TYPE_21__* noundef) local_unnamed_addr #1 declare i64 @eqtype(%struct.TYPE_21__* noundef, %struct.TYPE_21__* noundef, i32 noundef) local_unnamed_addr #1 declare i32 @warning(i8* noundef, %struct.TYPE_21__* noundef, %struct.TYPE_21__* noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 7, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_22__", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"TYPE_21__", !12, i64 0, !7, i64 8} !12 = !{!"long", !8, i64 0} !13 = !{!11, !12, i64 0} !14 = !{!15, !15, i64 0} !15 = !{!"int", !8, i64 0}
; ModuleID = 'AnghaBench/lab/engine/code/tools/lcc/src/extr_enode.c_assign.c' source_filename = "AnghaBench/lab/engine/code/tools/lcc/src/extr_enode.c_assign.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @inttype = common local_unnamed_addr global ptr null, align 8 @Aflag = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [56 x i8] c"assignment between `%t' and `%t' is compiler-dependent\0A\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define noundef ptr @assign(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = load ptr, ptr %1, align 8, !tbaa !6 %4 = tail call ptr @unqual(ptr noundef %3) #2 %5 = tail call ptr @unqual(ptr noundef %0) #2 %6 = tail call i64 @isenum(ptr noundef %5) #2 %7 = icmp eq i64 %6, 0 br i1 %7, label %11, label %8 8: ; preds = %2 %9 = getelementptr inbounds i8, ptr %5, i64 8 %10 = load ptr, ptr %9, align 8, !tbaa !11 br label %11 11: ; preds = %8, %2 %12 = phi ptr [ %10, %8 ], [ %5, %2 ] %13 = load i64, ptr %12, align 8, !tbaa !14 %14 = icmp eq i64 %13, 0 br i1 %14, label %144, label %15 15: ; preds = %11 %16 = load i64, ptr %4, align 8, !tbaa !14 %17 = icmp eq i64 %16, 0 br i1 %17, label %144, label %18 18: ; preds = %15 %19 = tail call i64 @isarith(ptr noundef nonnull %12) #2 %20 = icmp eq i64 %19, 0 br i1 %20, label %24, label %21 21: ; preds = %18 %22 = tail call i64 @isarith(ptr noundef nonnull %4) #2 %23 = icmp eq i64 %22, 0 br i1 %23, label %24, label %144 24: ; preds = %21, %18 %25 = tail call i64 @isstruct(ptr noundef nonnull %12) #2 %26 = icmp ne i64 %25, 0 %27 = icmp eq ptr %12, %4 %28 = select i1 %26, i1 %27, i1 false br i1 %28, label %144, label %29 29: ; preds = %24 %30 = tail call i64 @isptr(ptr noundef nonnull %12) #2 %31 = icmp eq i64 %30, 0 br i1 %31, label %35, label %32 32: ; preds = %29 %33 = tail call i64 @isnullptr(ptr noundef nonnull %1) #2 %34 = icmp eq i64 %33, 0 br i1 %34, label %35, label %144 35: ; preds = %32, %29 %36 = tail call i64 @isvoidptr(ptr noundef nonnull %12) #2 %37 = icmp eq i64 %36, 0 br i1 %37, label %41, label %38 38: ; preds = %35 %39 = tail call i64 @isptr(ptr noundef nonnull %4) #2 %40 = icmp eq i64 %39, 0 br i1 %40, label %41, label %47 41: ; preds = %38, %35 %42 = tail call i64 @isptr(ptr noundef nonnull %12) #2 %43 = icmp eq i64 %42, 0 br i1 %43, label %66, label %44 44: ; preds = %41 %45 = tail call i64 @isvoidptr(ptr noundef nonnull %4) #2 %46 = icmp eq i64 %45, 0 br i1 %46, label %66, label %47 47: ; preds = %44, %38 %48 = getelementptr inbounds i8, ptr %12, i64 8 %49 = load ptr, ptr %48, align 8, !tbaa !11 %50 = tail call i64 @isconst(ptr noundef %49) #2 %51 = icmp eq i64 %50, 0 br i1 %51, label %52, label %57 52: ; preds = %47 %53 = getelementptr inbounds i8, ptr %4, i64 8 %54 = load ptr, ptr %53, align 8, !tbaa !11 %55 = tail call i64 @isconst(ptr noundef %54) #2 %56 = icmp eq i64 %55, 0 br i1 %56, label %57, label %66 57: ; preds = %52, %47 %58 = load ptr, ptr %48, align 8, !tbaa !11 %59 = tail call i64 @isvolatile(ptr noundef %58) #2 %60 = icmp eq i64 %59, 0 br i1 %60, label %61, label %144 61: ; preds = %57 %62 = getelementptr inbounds i8, ptr %4, i64 8 %63 = load ptr, ptr %62, align 8, !tbaa !11 %64 = tail call i64 @isvolatile(ptr noundef %63) #2 %65 = icmp eq i64 %64, 0 br i1 %65, label %144, label %66 66: ; preds = %61, %52, %44, %41 %67 = tail call i64 @isptr(ptr noundef nonnull %12) #2 %68 = icmp eq i64 %67, 0 br i1 %68, label %97, label %69 69: ; preds = %66 %70 = tail call i64 @isptr(ptr noundef nonnull %4) #2 %71 = icmp eq i64 %70, 0 br i1 %71, label %97, label %72 72: ; preds = %69 %73 = getelementptr inbounds i8, ptr %12, i64 8 %74 = load ptr, ptr %73, align 8, !tbaa !11 %75 = tail call ptr @unqual(ptr noundef %74) #2 %76 = getelementptr inbounds i8, ptr %4, i64 8 %77 = load ptr, ptr %76, align 8, !tbaa !11 %78 = tail call ptr @unqual(ptr noundef %77) #2 %79 = tail call i64 @eqtype(ptr noundef %75, ptr noundef %78, i32 noundef 1) #2 %80 = icmp eq i64 %79, 0 br i1 %80, label %97, label %81 81: ; preds = %72 %82 = load ptr, ptr %73, align 8, !tbaa !11 %83 = tail call i64 @isconst(ptr noundef %82) #2 %84 = icmp eq i64 %83, 0 br i1 %84, label %85, label %89 85: ; preds = %81 %86 = load ptr, ptr %76, align 8, !tbaa !11 %87 = tail call i64 @isconst(ptr noundef %86) #2 %88 = icmp eq i64 %87, 0 br i1 %88, label %89, label %97 89: ; preds = %85, %81 %90 = load ptr, ptr %73, align 8, !tbaa !11 %91 = tail call i64 @isvolatile(ptr noundef %90) #2 %92 = icmp eq i64 %91, 0 br i1 %92, label %93, label %144 93: ; preds = %89 %94 = load ptr, ptr %76, align 8, !tbaa !11 %95 = tail call i64 @isvolatile(ptr noundef %94) #2 %96 = icmp eq i64 %95, 0 br i1 %96, label %144, label %97 97: ; preds = %93, %85, %72, %69, %66 %98 = tail call i64 @isptr(ptr noundef nonnull %12) #2 %99 = icmp eq i64 %98, 0 br i1 %99, label %144, label %100 100: ; preds = %97 %101 = tail call i64 @isptr(ptr noundef nonnull %4) #2 %102 = icmp eq i64 %101, 0 br i1 %102, label %144, label %103 103: ; preds = %100 %104 = getelementptr inbounds i8, ptr %12, i64 8 %105 = load ptr, ptr %104, align 8, !tbaa !11 %106 = tail call i64 @isconst(ptr noundef %105) #2 %107 = icmp eq i64 %106, 0 br i1 %107, label %108, label %113 108: ; preds = %103 %109 = getelementptr inbounds i8, ptr %4, i64 8 %110 = load ptr, ptr %109, align 8, !tbaa !11 %111 = tail call i64 @isconst(ptr noundef %110) #2 %112 = icmp eq i64 %111, 0 br i1 %112, label %113, label %144 113: ; preds = %108, %103 %114 = load ptr, ptr %104, align 8, !tbaa !11 %115 = tail call i64 @isvolatile(ptr noundef %114) #2 %116 = icmp eq i64 %115, 0 br i1 %116, label %117, label %122 117: ; preds = %113 %118 = getelementptr inbounds i8, ptr %4, i64 8 %119 = load ptr, ptr %118, align 8, !tbaa !11 %120 = tail call i64 @isvolatile(ptr noundef %119) #2 %121 = icmp eq i64 %120, 0 br i1 %121, label %122, label %144 122: ; preds = %117, %113 %123 = load ptr, ptr %104, align 8, !tbaa !11 %124 = tail call ptr @unqual(ptr noundef %123) #2 %125 = getelementptr inbounds i8, ptr %4, i64 8 %126 = load ptr, ptr %125, align 8, !tbaa !11 %127 = tail call ptr @unqual(ptr noundef %126) #2 %128 = tail call i64 @isenum(ptr noundef %124) #2 %129 = icmp ne i64 %128, 0 %130 = load ptr, ptr @inttype, align 8 %131 = icmp eq ptr %127, %130 %132 = select i1 %129, i1 %131, i1 false br i1 %132, label %139, label %133 133: ; preds = %122 %134 = tail call i64 @isenum(ptr noundef %127) #2 %135 = icmp ne i64 %134, 0 %136 = load ptr, ptr @inttype, align 8 %137 = icmp eq ptr %124, %136 %138 = select i1 %135, i1 %137, i1 false br i1 %138, label %139, label %144 139: ; preds = %133, %122 %140 = load i32, ptr @Aflag, align 4, !tbaa !15 %141 = icmp sgt i32 %140, 0 br i1 %141, label %142, label %144 142: ; preds = %139 %143 = tail call i32 @warning(ptr noundef nonnull @.str, ptr noundef nonnull %12, ptr noundef nonnull %4) #2 br label %144 144: ; preds = %142, %139, %97, %100, %108, %117, %133, %89, %93, %57, %61, %32, %21, %24, %11, %15 %145 = phi ptr [ null, %15 ], [ null, %11 ], [ %12, %24 ], [ %12, %21 ], [ %12, %32 ], [ %12, %61 ], [ %12, %57 ], [ %12, %93 ], [ %12, %89 ], [ null, %133 ], [ null, %117 ], [ null, %108 ], [ null, %100 ], [ null, %97 ], [ %12, %139 ], [ %12, %142 ] ret ptr %145 } declare ptr @unqual(ptr noundef) local_unnamed_addr #1 declare i64 @isenum(ptr noundef) local_unnamed_addr #1 declare i64 @isarith(ptr noundef) local_unnamed_addr #1 declare i64 @isstruct(ptr noundef) local_unnamed_addr #1 declare i64 @isptr(ptr noundef) local_unnamed_addr #1 declare i64 @isnullptr(ptr noundef) local_unnamed_addr #1 declare i64 @isvoidptr(ptr noundef) local_unnamed_addr #1 declare i64 @isconst(ptr noundef) local_unnamed_addr #1 declare i64 @isvolatile(ptr noundef) local_unnamed_addr #1 declare i64 @eqtype(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @warning(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_22__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 8} !12 = !{!"TYPE_21__", !13, i64 0, !8, i64 8} !13 = !{!"long", !9, i64 0} !14 = !{!12, !13, i64 0} !15 = !{!16, !16, i64 0} !16 = !{!"int", !9, i64 0}
lab_engine_code_tools_lcc_src_extr_enode.c_assign
; ModuleID = 'AnghaBench/sqlcipher/test/extr_threadtest3.c_cgt_pager_1_read.c' source_filename = "AnghaBench/sqlcipher/test/extr_threadtest3.c_cgt_pager_1_read.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [6 x i8] c"BEGIN\00", align 1 @CALLGRINDTEST1_NROW = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [33 x i8] c"SELECT * FROM t1 WHERE a = :iRow\00", align 1 @.str.2 = private unnamed_addr constant [7 x i8] c"COMMIT\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @cgt_pager_1_read], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @cgt_pager_1_read(ptr noundef %0, ptr noundef %1) #0 { %3 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = tail call i32 @sql_script(ptr noundef %0, ptr noundef %1, ptr noundef nonnull @.str) #3 store i32 1, ptr %3, align 4, !tbaa !5 %5 = load i32, ptr @CALLGRINDTEST1_NROW, align 4, !tbaa !5 %6 = icmp slt i32 %5, 1 br i1 %6, label %13, label %7 7: ; preds = %2, %7 %8 = call i32 @execsql(ptr noundef %0, ptr noundef %1, ptr noundef nonnull @.str.1, ptr noundef nonnull %3) #3 %9 = load i32, ptr %3, align 4, !tbaa !5 %10 = add nsw i32 %9, 1 store i32 %10, ptr %3, align 4, !tbaa !5 %11 = load i32, ptr @CALLGRINDTEST1_NROW, align 4, !tbaa !5 %12 = icmp slt i32 %9, %11 br i1 %12, label %7, label %13, !llvm.loop !9 13: ; preds = %7, %2 %14 = call i32 @sql_script(ptr noundef %0, ptr noundef %1, ptr noundef nonnull @.str.2) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @sql_script(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @execsql(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = distinct !{!9, !10} !10 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/sqlcipher/test/extr_threadtest3.c_cgt_pager_1_read.c' source_filename = "AnghaBench/sqlcipher/test/extr_threadtest3.c_cgt_pager_1_read.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [6 x i8] c"BEGIN\00", align 1 @CALLGRINDTEST1_NROW = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [33 x i8] c"SELECT * FROM t1 WHERE a = :iRow\00", align 1 @.str.2 = private unnamed_addr constant [7 x i8] c"COMMIT\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @cgt_pager_1_read], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @cgt_pager_1_read(ptr noundef %0, ptr noundef %1) #0 { %3 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = tail call i32 @sql_script(ptr noundef %0, ptr noundef %1, ptr noundef nonnull @.str) #3 store i32 1, ptr %3, align 4, !tbaa !6 %5 = load i32, ptr @CALLGRINDTEST1_NROW, align 4, !tbaa !6 %6 = icmp slt i32 %5, 1 br i1 %6, label %13, label %7 7: ; preds = %2, %7 %8 = call i32 @execsql(ptr noundef %0, ptr noundef %1, ptr noundef nonnull @.str.1, ptr noundef nonnull %3) #3 %9 = load i32, ptr %3, align 4, !tbaa !6 %10 = add nsw i32 %9, 1 store i32 %10, ptr %3, align 4, !tbaa !6 %11 = load i32, ptr @CALLGRINDTEST1_NROW, align 4, !tbaa !6 %12 = icmp slt i32 %9, %11 br i1 %12, label %7, label %13, !llvm.loop !10 13: ; preds = %7, %2 %14 = call i32 @sql_script(ptr noundef %0, ptr noundef %1, ptr noundef nonnull @.str.2) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @sql_script(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @execsql(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = distinct !{!10, !11} !11 = !{!"llvm.loop.mustprogress"}
sqlcipher_test_extr_threadtest3.c_cgt_pager_1_read
; ModuleID = 'AnghaBench/freebsd/sys/dev/iicbus/extr_rtc8583.c_rtc8583_writeto.c' source_filename = "AnghaBench/freebsd/sys/dev/iicbus/extr_rtc8583.c_rtc8583_writeto.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.iic_msg = type { ptr, i64, i32, i32 } @MAX_TRANSFER = dso_local local_unnamed_addr global i32 0, align 4 @IIC_M_WR = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @rtc8583_writeto], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @rtc8583_writeto(i32 noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4) #0 { %6 = alloca %struct.iic_msg, align 8 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #4 %7 = load i32, ptr @MAX_TRANSFER, align 4, !tbaa !5 %8 = zext i32 %7 to i64 %9 = tail call ptr @llvm.stacksave.p0() %10 = alloca i32, i64 %8, align 16 %11 = tail call i32 @iicbus_get_addr(i32 noundef %0) #4 store i32 %1, ptr %10, align 16, !tbaa !5 %12 = getelementptr inbounds i32, ptr %10, i64 1 %13 = call i32 @memcpy(ptr noundef nonnull %12, ptr noundef %2, i32 noundef %3) #4 %14 = getelementptr inbounds %struct.iic_msg, ptr %6, i64 0, i32 3 store i32 %11, ptr %14, align 4, !tbaa !9 %15 = load i32, ptr @IIC_M_WR, align 4, !tbaa !5 %16 = getelementptr inbounds %struct.iic_msg, ptr %6, i64 0, i32 2 store i32 %15, ptr %16, align 8, !tbaa !13 %17 = add nsw i32 %3, 1 %18 = sext i32 %17 to i64 %19 = getelementptr inbounds %struct.iic_msg, ptr %6, i64 0, i32 1 store i64 %18, ptr %19, align 8, !tbaa !14 store ptr %10, ptr %6, align 8, !tbaa !15 %20 = call i32 @iicbus_transfer_excl(i32 noundef %0, ptr noundef nonnull %6, i32 noundef 1, i32 noundef %4) #4 call void @llvm.stackrestore.p0(ptr %9) call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #4 ret i32 %20 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn declare ptr @llvm.stacksave.p0() #2 declare i32 @iicbus_get_addr(i32 noundef) local_unnamed_addr #3 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3 declare i32 @iicbus_transfer_excl(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn declare void @llvm.stackrestore.p0(ptr) #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn } attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 20} !10 = !{!"iic_msg", !11, i64 0, !12, i64 8, !6, i64 16, !6, i64 20} !11 = !{!"any pointer", !7, i64 0} !12 = !{!"long", !7, i64 0} !13 = !{!10, !6, i64 16} !14 = !{!10, !12, i64 8} !15 = !{!10, !11, i64 0}
; ModuleID = 'AnghaBench/freebsd/sys/dev/iicbus/extr_rtc8583.c_rtc8583_writeto.c' source_filename = "AnghaBench/freebsd/sys/dev/iicbus/extr_rtc8583.c_rtc8583_writeto.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.iic_msg = type { ptr, i64, i32, i32 } @MAX_TRANSFER = common local_unnamed_addr global i32 0, align 4 @IIC_M_WR = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @rtc8583_writeto], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @rtc8583_writeto(i32 noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4) #0 { %6 = alloca %struct.iic_msg, align 8 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #4 %7 = load i32, ptr @MAX_TRANSFER, align 4, !tbaa !6 %8 = zext i32 %7 to i64 %9 = tail call ptr @llvm.stacksave.p0() %10 = alloca i32, i64 %8, align 4 %11 = tail call i32 @iicbus_get_addr(i32 noundef %0) #4 store i32 %1, ptr %10, align 4, !tbaa !6 %12 = getelementptr inbounds i8, ptr %10, i64 4 %13 = call i32 @memcpy(ptr noundef nonnull %12, ptr noundef %2, i32 noundef %3) #4 %14 = getelementptr inbounds i8, ptr %6, i64 20 store i32 %11, ptr %14, align 4, !tbaa !10 %15 = load i32, ptr @IIC_M_WR, align 4, !tbaa !6 %16 = getelementptr inbounds i8, ptr %6, i64 16 store i32 %15, ptr %16, align 8, !tbaa !14 %17 = add nsw i32 %3, 1 %18 = sext i32 %17 to i64 %19 = getelementptr inbounds i8, ptr %6, i64 8 store i64 %18, ptr %19, align 8, !tbaa !15 store ptr %10, ptr %6, align 8, !tbaa !16 %20 = call i32 @iicbus_transfer_excl(i32 noundef %0, ptr noundef nonnull %6, i32 noundef 1, i32 noundef %4) #4 call void @llvm.stackrestore.p0(ptr %9) call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #4 ret i32 %20 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn declare ptr @llvm.stacksave.p0() #2 declare i32 @iicbus_get_addr(i32 noundef) local_unnamed_addr #3 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3 declare i32 @iicbus_transfer_excl(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn declare void @llvm.stackrestore.p0(ptr) #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn } attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 20} !11 = !{!"iic_msg", !12, i64 0, !13, i64 8, !7, i64 16, !7, i64 20} !12 = !{!"any pointer", !8, i64 0} !13 = !{!"long", !8, i64 0} !14 = !{!11, !7, i64 16} !15 = !{!11, !13, i64 8} !16 = !{!11, !12, i64 0}
freebsd_sys_dev_iicbus_extr_rtc8583.c_rtc8583_writeto
; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8723bs/os_dep/extr_os_intfs.c_rtw_start_drv_threads.c' source_filename = "AnghaBench/linux/drivers/staging/rtl8723bs/os_dep/extr_os_intfs.c_rtw_start_drv_threads.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.adapter = type { %struct.TYPE_2__, ptr, ptr } %struct.TYPE_2__ = type { i32 } @_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4 @_module_os_intfs_c_ = dso_local local_unnamed_addr global i32 0, align 4 @_drv_info_ = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [24 x i8] c"+rtw_start_drv_threads\0A\00", align 1 @rtw_xmit_thread = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [16 x i8] c"RTW_XMIT_THREAD\00", align 1 @_FAIL = dso_local local_unnamed_addr global i32 0, align 4 @rtw_cmd_thread = dso_local local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [15 x i8] c"RTW_CMD_THREAD\00", align 1 ; Function Attrs: nounwind uwtable define dso_local i32 @rtw_start_drv_threads(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @_SUCCESS, align 4, !tbaa !5 %3 = load i32, ptr @_module_os_intfs_c_, align 4, !tbaa !5 %4 = load i32, ptr @_drv_info_, align 4, !tbaa !5 %5 = tail call i32 @RT_TRACE(i32 noundef %3, i32 noundef %4, ptr noundef nonnull @.str) #2 %6 = load i32, ptr @rtw_xmit_thread, align 4, !tbaa !5 %7 = tail call ptr @kthread_run(i32 noundef %6, ptr noundef %0, ptr noundef nonnull @.str.1) #2 %8 = getelementptr inbounds %struct.adapter, ptr %0, i64 0, i32 2 store ptr %7, ptr %8, align 8, !tbaa !9 %9 = tail call i64 @IS_ERR(ptr noundef %7) #2 %10 = load i32, ptr @_FAIL, align 4 %11 = load i32, ptr @rtw_cmd_thread, align 4, !tbaa !5 %12 = tail call ptr @kthread_run(i32 noundef %11, ptr noundef %0, ptr noundef nonnull @.str.2) #2 %13 = getelementptr inbounds %struct.adapter, ptr %0, i64 0, i32 1 store ptr %12, ptr %13, align 8, !tbaa !13 %14 = tail call i64 @IS_ERR(ptr noundef %12) #2 %15 = icmp eq i64 %14, 0 br i1 %15, label %18, label %16 16: ; preds = %1 %17 = load i32, ptr @_FAIL, align 4, !tbaa !5 br label %22 18: ; preds = %1 %19 = icmp eq i64 %9, 0 %20 = select i1 %19, i32 %2, i32 %10 %21 = tail call i32 @wait_for_completion(ptr noundef nonnull %0) #2 br label %22 22: ; preds = %18, %16 %23 = phi i32 [ %17, %16 ], [ %20, %18 ] %24 = tail call i32 @rtw_hal_start_thread(ptr noundef nonnull %0) #2 ret i32 %23 } declare i32 @RT_TRACE(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare ptr @kthread_run(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @wait_for_completion(ptr noundef) local_unnamed_addr #1 declare i32 @rtw_hal_start_thread(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !12, i64 16} !10 = !{!"adapter", !11, i64 0, !12, i64 8, !12, i64 16} !11 = !{!"TYPE_2__", !6, i64 0} !12 = !{!"any pointer", !7, i64 0} !13 = !{!10, !12, i64 8}
; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8723bs/os_dep/extr_os_intfs.c_rtw_start_drv_threads.c' source_filename = "AnghaBench/linux/drivers/staging/rtl8723bs/os_dep/extr_os_intfs.c_rtw_start_drv_threads.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @_SUCCESS = common local_unnamed_addr global i32 0, align 4 @_module_os_intfs_c_ = common local_unnamed_addr global i32 0, align 4 @_drv_info_ = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [24 x i8] c"+rtw_start_drv_threads\0A\00", align 1 @rtw_xmit_thread = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [16 x i8] c"RTW_XMIT_THREAD\00", align 1 @_FAIL = common local_unnamed_addr global i32 0, align 4 @rtw_cmd_thread = common local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [15 x i8] c"RTW_CMD_THREAD\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @rtw_start_drv_threads(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @_SUCCESS, align 4, !tbaa !6 %3 = load i32, ptr @_module_os_intfs_c_, align 4, !tbaa !6 %4 = load i32, ptr @_drv_info_, align 4, !tbaa !6 %5 = tail call i32 @RT_TRACE(i32 noundef %3, i32 noundef %4, ptr noundef nonnull @.str) #2 %6 = load i32, ptr @rtw_xmit_thread, align 4, !tbaa !6 %7 = tail call ptr @kthread_run(i32 noundef %6, ptr noundef %0, ptr noundef nonnull @.str.1) #2 %8 = getelementptr inbounds i8, ptr %0, i64 16 store ptr %7, ptr %8, align 8, !tbaa !10 %9 = tail call i64 @IS_ERR(ptr noundef %7) #2 %10 = load i32, ptr @_FAIL, align 4 %11 = load i32, ptr @rtw_cmd_thread, align 4, !tbaa !6 %12 = tail call ptr @kthread_run(i32 noundef %11, ptr noundef %0, ptr noundef nonnull @.str.2) #2 %13 = getelementptr inbounds i8, ptr %0, i64 8 store ptr %12, ptr %13, align 8, !tbaa !14 %14 = tail call i64 @IS_ERR(ptr noundef %12) #2 %15 = icmp eq i64 %14, 0 br i1 %15, label %18, label %16 16: ; preds = %1 %17 = load i32, ptr @_FAIL, align 4, !tbaa !6 br label %22 18: ; preds = %1 %19 = icmp eq i64 %9, 0 %20 = select i1 %19, i32 %2, i32 %10 %21 = tail call i32 @wait_for_completion(ptr noundef nonnull %0) #2 br label %22 22: ; preds = %18, %16 %23 = phi i32 [ %17, %16 ], [ %20, %18 ] %24 = tail call i32 @rtw_hal_start_thread(ptr noundef nonnull %0) #2 ret i32 %23 } declare i32 @RT_TRACE(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare ptr @kthread_run(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @wait_for_completion(ptr noundef) local_unnamed_addr #1 declare i32 @rtw_hal_start_thread(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !13, i64 16} !11 = !{!"adapter", !12, i64 0, !13, i64 8, !13, i64 16} !12 = !{!"TYPE_2__", !7, i64 0} !13 = !{!"any pointer", !8, i64 0} !14 = !{!11, !13, i64 8}
linux_drivers_staging_rtl8723bs_os_dep_extr_os_intfs.c_rtw_start_drv_threads
; ModuleID = 'AnghaBench/sqlcipher/ext/fts1/extr_fts1_porter.c_m_gt_1.c' source_filename = "AnghaBench/sqlcipher/ext/fts1/extr_fts1_porter.c_m_gt_1.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @m_gt_1], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @m_gt_1(ptr noundef %0) #0 { br label %2 2: ; preds = %2, %1 %3 = phi ptr [ %0, %1 ], [ %6, %2 ] %4 = tail call i64 @isVowel(ptr noundef %3) #2 %5 = icmp eq i64 %4, 0 %6 = getelementptr inbounds i8, ptr %3, i64 1 br i1 %5, label %7, label %2, !llvm.loop !5 7: ; preds = %2 %8 = load i8, ptr %3, align 1, !tbaa !7 %9 = icmp eq i8 %8, 0 br i1 %9, label %35, label %10 10: ; preds = %7, %10 %11 = phi ptr [ %14, %10 ], [ %3, %7 ] %12 = tail call i64 @isConsonant(ptr noundef nonnull %11) #2 %13 = icmp eq i64 %12, 0 %14 = getelementptr inbounds i8, ptr %11, i64 1 br i1 %13, label %15, label %10, !llvm.loop !10 15: ; preds = %10 %16 = load i8, ptr %11, align 1, !tbaa !7 %17 = icmp eq i8 %16, 0 br i1 %17, label %35, label %18 18: ; preds = %15, %18 %19 = phi ptr [ %22, %18 ], [ %11, %15 ] %20 = tail call i64 @isVowel(ptr noundef nonnull %19) #2 %21 = icmp eq i64 %20, 0 %22 = getelementptr inbounds i8, ptr %19, i64 1 br i1 %21, label %23, label %18, !llvm.loop !11 23: ; preds = %18 %24 = load i8, ptr %19, align 1, !tbaa !7 %25 = icmp eq i8 %24, 0 br i1 %25, label %35, label %26 26: ; preds = %23, %26 %27 = phi ptr [ %30, %26 ], [ %19, %23 ] %28 = tail call i64 @isConsonant(ptr noundef nonnull %27) #2 %29 = icmp eq i64 %28, 0 %30 = getelementptr inbounds i8, ptr %27, i64 1 br i1 %29, label %31, label %26, !llvm.loop !12 31: ; preds = %26 %32 = load i8, ptr %27, align 1, !tbaa !7 %33 = icmp ne i8 %32, 0 %34 = zext i1 %33 to i32 br label %35 35: ; preds = %23, %15, %7, %31 %36 = phi i32 [ %34, %31 ], [ 0, %7 ], [ 0, %15 ], [ 0, %23 ] ret i32 %36 } declare i64 @isVowel(ptr noundef) local_unnamed_addr #1 declare i64 @isConsonant(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = distinct !{!5, !6} !6 = !{!"llvm.loop.mustprogress"} !7 = !{!8, !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = distinct !{!10, !6} !11 = distinct !{!11, !6} !12 = distinct !{!12, !6}
; ModuleID = 'AnghaBench/sqlcipher/ext/fts1/extr_fts1_porter.c_m_gt_1.c' source_filename = "AnghaBench/sqlcipher/ext/fts1/extr_fts1_porter.c_m_gt_1.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @m_gt_1], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @m_gt_1(ptr noundef %0) #0 { br label %2 2: ; preds = %2, %1 %3 = phi ptr [ %0, %1 ], [ %6, %2 ] %4 = tail call i64 @isVowel(ptr noundef %3) #2 %5 = icmp eq i64 %4, 0 %6 = getelementptr inbounds i8, ptr %3, i64 1 br i1 %5, label %7, label %2, !llvm.loop !6 7: ; preds = %2 %8 = load i8, ptr %3, align 1, !tbaa !8 %9 = icmp eq i8 %8, 0 br i1 %9, label %35, label %10 10: ; preds = %7, %10 %11 = phi ptr [ %14, %10 ], [ %3, %7 ] %12 = tail call i64 @isConsonant(ptr noundef nonnull %11) #2 %13 = icmp eq i64 %12, 0 %14 = getelementptr inbounds i8, ptr %11, i64 1 br i1 %13, label %15, label %10, !llvm.loop !11 15: ; preds = %10 %16 = load i8, ptr %11, align 1, !tbaa !8 %17 = icmp eq i8 %16, 0 br i1 %17, label %35, label %18 18: ; preds = %15, %18 %19 = phi ptr [ %22, %18 ], [ %11, %15 ] %20 = tail call i64 @isVowel(ptr noundef nonnull %19) #2 %21 = icmp eq i64 %20, 0 %22 = getelementptr inbounds i8, ptr %19, i64 1 br i1 %21, label %23, label %18, !llvm.loop !12 23: ; preds = %18 %24 = load i8, ptr %19, align 1, !tbaa !8 %25 = icmp eq i8 %24, 0 br i1 %25, label %35, label %26 26: ; preds = %23, %26 %27 = phi ptr [ %30, %26 ], [ %19, %23 ] %28 = tail call i64 @isConsonant(ptr noundef nonnull %27) #2 %29 = icmp eq i64 %28, 0 %30 = getelementptr inbounds i8, ptr %27, i64 1 br i1 %29, label %31, label %26, !llvm.loop !13 31: ; preds = %26 %32 = load i8, ptr %27, align 1, !tbaa !8 %33 = icmp ne i8 %32, 0 %34 = zext i1 %33 to i32 br label %35 35: ; preds = %23, %15, %7, %31 %36 = phi i32 [ %34, %31 ], [ 0, %7 ], [ 0, %15 ], [ 0, %23 ] ret i32 %36 } declare i64 @isVowel(ptr noundef) local_unnamed_addr #1 declare i64 @isConsonant(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = distinct !{!6, !7} !7 = !{!"llvm.loop.mustprogress"} !8 = !{!9, !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = distinct !{!11, !7} !12 = distinct !{!12, !7} !13 = distinct !{!13, !7}
sqlcipher_ext_fts1_extr_fts1_porter.c_m_gt_1
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_mt9m001.c_mt9m001_set_bus_param.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_mt9m001.c_mt9m001_set_bus_param.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @SOCAM_DATAWIDTH_MASK = dso_local local_unnamed_addr global i64 0, align 8 @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @SOCAM_DATAWIDTH_10 = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @mt9m001_set_bus_param], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @mt9m001_set_bus_param(ptr noundef %0, i64 noundef %1) #0 { %3 = tail call ptr @to_soc_camera_link(ptr noundef %0) #2 %4 = load i64, ptr @SOCAM_DATAWIDTH_MASK, align 8, !tbaa !5 %5 = and i64 %4, %1 %6 = tail call i32 @is_power_of_2(i64 noundef %5) #2 %7 = icmp eq i32 %6, 0 br i1 %7, label %8, label %11 8: ; preds = %2 %9 = load i32, ptr @EINVAL, align 4, !tbaa !9 %10 = sub nsw i32 0, %9 br label %22 11: ; preds = %2 %12 = load ptr, ptr %3, align 8, !tbaa !11 %13 = icmp eq ptr %12, null br i1 %13, label %16, label %14 14: ; preds = %11 %15 = tail call i32 %12(ptr noundef nonnull %3, i64 noundef %5) #2 br label %22 16: ; preds = %11 %17 = load i64, ptr @SOCAM_DATAWIDTH_10, align 8, !tbaa !5 %18 = icmp eq i64 %5, %17 br i1 %18, label %22, label %19 19: ; preds = %16 %20 = load i32, ptr @EINVAL, align 4, !tbaa !9 %21 = sub nsw i32 0, %20 br label %22 22: ; preds = %16, %19, %14, %8 %23 = phi i32 [ %15, %14 ], [ %21, %19 ], [ %10, %8 ], [ 0, %16 ] ret i32 %23 } declare ptr @to_soc_camera_link(ptr noundef) local_unnamed_addr #1 declare i32 @is_power_of_2(i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0} !11 = !{!12, !13, i64 0} !12 = !{!"soc_camera_link", !13, i64 0} !13 = !{!"any pointer", !7, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_mt9m001.c_mt9m001_set_bus_param.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_mt9m001.c_mt9m001_set_bus_param.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SOCAM_DATAWIDTH_MASK = common local_unnamed_addr global i64 0, align 8 @EINVAL = common local_unnamed_addr global i32 0, align 4 @SOCAM_DATAWIDTH_10 = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @mt9m001_set_bus_param], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @mt9m001_set_bus_param(ptr noundef %0, i64 noundef %1) #0 { %3 = tail call ptr @to_soc_camera_link(ptr noundef %0) #2 %4 = load i64, ptr @SOCAM_DATAWIDTH_MASK, align 8, !tbaa !6 %5 = and i64 %4, %1 %6 = tail call i32 @is_power_of_2(i64 noundef %5) #2 %7 = icmp eq i32 %6, 0 br i1 %7, label %8, label %11 8: ; preds = %2 %9 = load i32, ptr @EINVAL, align 4, !tbaa !10 %10 = sub nsw i32 0, %9 br label %22 11: ; preds = %2 %12 = load ptr, ptr %3, align 8, !tbaa !12 %13 = icmp eq ptr %12, null br i1 %13, label %16, label %14 14: ; preds = %11 %15 = tail call i32 %12(ptr noundef nonnull %3, i64 noundef %5) #2 br label %22 16: ; preds = %11 %17 = load i64, ptr @SOCAM_DATAWIDTH_10, align 8, !tbaa !6 %18 = icmp eq i64 %5, %17 br i1 %18, label %22, label %19 19: ; preds = %16 %20 = load i32, ptr @EINVAL, align 4, !tbaa !10 %21 = sub nsw i32 0, %20 br label %22 22: ; preds = %16, %19, %14, %8 %23 = phi i32 [ %15, %14 ], [ %21, %19 ], [ %10, %8 ], [ 0, %16 ] ret i32 %23 } declare ptr @to_soc_camera_link(ptr noundef) local_unnamed_addr #1 declare i32 @is_power_of_2(i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!13, !14, i64 0} !13 = !{!"soc_camera_link", !14, i64 0} !14 = !{!"any pointer", !8, i64 0}
fastsocket_kernel_drivers_media_video_extr_mt9m001.c_mt9m001_set_bus_param
; ModuleID = 'AnghaBench/freebsd/lib/libkvm/extr_kvm_private.c__kvm_malloc.c' source_filename = "AnghaBench/freebsd/lib/libkvm/extr_kvm_private.c__kvm_malloc.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [29 x i8] c"can't allocate %zu bytes: %s\00", align 1 @errno = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local ptr @_kvm_malloc(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 { %3 = tail call ptr @calloc(i64 noundef %1, i32 noundef 1) #2 %4 = icmp eq ptr %3, null br i1 %4, label %5, label %10 5: ; preds = %2 %6 = load i32, ptr %0, align 4, !tbaa !5 %7 = load i32, ptr @errno, align 4, !tbaa !10 %8 = tail call i32 @strerror(i32 noundef %7) #2 %9 = tail call i32 @_kvm_err(ptr noundef nonnull %0, i32 noundef %6, ptr noundef nonnull @.str, i64 noundef %1, i32 noundef %8) #2 br label %10 10: ; preds = %5, %2 ret ptr %3 } declare ptr @calloc(i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @_kvm_err(ptr noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @strerror(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_4__", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/freebsd/lib/libkvm/extr_kvm_private.c__kvm_malloc.c' source_filename = "AnghaBench/freebsd/lib/libkvm/extr_kvm_private.c__kvm_malloc.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [29 x i8] c"can't allocate %zu bytes: %s\00", align 1 @errno = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @_kvm_malloc(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 { %3 = tail call ptr @calloc(i64 noundef %1, i32 noundef 1) #2 %4 = icmp eq ptr %3, null br i1 %4, label %5, label %10 5: ; preds = %2 %6 = load i32, ptr %0, align 4, !tbaa !6 %7 = load i32, ptr @errno, align 4, !tbaa !11 %8 = tail call i32 @strerror(i32 noundef %7) #2 %9 = tail call i32 @_kvm_err(ptr noundef nonnull %0, i32 noundef %6, ptr noundef nonnull @.str, i64 noundef %1, i32 noundef %8) #2 br label %10 10: ; preds = %5, %2 ret ptr %3 } declare ptr @calloc(i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @_kvm_err(ptr noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @strerror(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0}
freebsd_lib_libkvm_extr_kvm_private.c__kvm_malloc
; ModuleID = 'AnghaBench/git/builtin/extr_revert.c_cmd_cherry_pick.c' source_filename = "AnghaBench/git/builtin/extr_revert.c_cmd_cherry_pick.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.replay_opts = type { i32 } @REPLAY_OPTS_INIT = dso_local local_unnamed_addr global %struct.replay_opts zeroinitializer, align 4 @REPLAY_PICK = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [19 x i8] c"cherry-pick failed\00", align 1 ; Function Attrs: nounwind uwtable define dso_local i32 @cmd_cherry_pick(i32 noundef %0, ptr noundef %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 { %4 = alloca %struct.replay_opts, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 %5 = load i32, ptr @REPLAY_PICK, align 4, !tbaa !5 store i32 %5, ptr %4, align 4, !tbaa !9 %6 = call i32 @sequencer_init_config(ptr noundef nonnull %4) #3 %7 = call i32 @run_sequencer(i32 noundef %0, ptr noundef %1, ptr noundef nonnull %4) #3 %8 = icmp slt i32 %7, 0 br i1 %8, label %9, label %12 9: ; preds = %3 %10 = call i32 @_(ptr noundef nonnull @.str) #3 %11 = call i32 @die(i32 noundef %10) #3 br label %12 12: ; preds = %9, %3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 ret i32 %7 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @sequencer_init_config(ptr noundef) local_unnamed_addr #2 declare i32 @run_sequencer(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @die(i32 noundef) local_unnamed_addr #2 declare i32 @_(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"replay_opts", !6, i64 0}
; ModuleID = 'AnghaBench/git/builtin/extr_revert.c_cmd_cherry_pick.c' source_filename = "AnghaBench/git/builtin/extr_revert.c_cmd_cherry_pick.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.replay_opts = type { i32 } @REPLAY_OPTS_INIT = common local_unnamed_addr global %struct.replay_opts zeroinitializer, align 4 @REPLAY_PICK = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [19 x i8] c"cherry-pick failed\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @cmd_cherry_pick(i32 noundef %0, ptr noundef %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 { %4 = alloca %struct.replay_opts, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 %5 = load i32, ptr @REPLAY_PICK, align 4, !tbaa !6 store i32 %5, ptr %4, align 4, !tbaa !10 %6 = call i32 @sequencer_init_config(ptr noundef nonnull %4) #3 %7 = call i32 @run_sequencer(i32 noundef %0, ptr noundef %1, ptr noundef nonnull %4) #3 %8 = icmp slt i32 %7, 0 br i1 %8, label %9, label %12 9: ; preds = %3 %10 = call i32 @_(ptr noundef nonnull @.str) #3 %11 = call i32 @die(i32 noundef %10) #3 br label %12 12: ; preds = %9, %3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 ret i32 %7 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @sequencer_init_config(ptr noundef) local_unnamed_addr #2 declare i32 @run_sequencer(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @die(i32 noundef) local_unnamed_addr #2 declare i32 @_(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"replay_opts", !7, i64 0}
git_builtin_extr_revert.c_cmd_cherry_pick
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Proto.c_ProtoAdd.c' source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Proto.c_ProtoAdd.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @protocols = dso_local local_unnamed_addr global ptr null, align 8 @.str = private unnamed_addr constant [22 x i8] c"ProtoAdd(): added %s\0A\00", align 1 ; Function Attrs: nounwind uwtable define dso_local noundef i32 @ProtoAdd(ptr noundef %0) local_unnamed_addr #0 { %2 = load ptr, ptr @protocols, align 8, !tbaa !5 %3 = icmp eq ptr %2, null %4 = icmp eq ptr %0, null %5 = or i1 %4, %3 br i1 %5, label %14, label %6 6: ; preds = %1 %7 = tail call ptr @Malloc(i32 noundef 8) #2 store ptr %0, ptr %7, align 8, !tbaa !9 %8 = load ptr, ptr @protocols, align 8, !tbaa !5 %9 = tail call i32 @Add(ptr noundef %8, ptr noundef nonnull %7) #2 %10 = load ptr, ptr %7, align 8, !tbaa !9 %11 = load ptr, ptr %10, align 8, !tbaa !11 %12 = tail call i32 (...) %11() #2 %13 = tail call i32 @Debug(ptr noundef nonnull @.str, i32 noundef %12) #2 br label %14 14: ; preds = %1, %6 %15 = phi i32 [ 1, %6 ], [ 0, %1 ] ret i32 %15 } declare ptr @Malloc(i32 noundef) local_unnamed_addr #1 declare i32 @Add(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @Debug(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"TYPE_7__", !6, i64 0} !11 = !{!12, !6, i64 0} !12 = !{!"TYPE_6__", !6, i64 0}
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Proto.c_ProtoAdd.c' source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Proto.c_ProtoAdd.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @protocols = common local_unnamed_addr global ptr null, align 8 @.str = private unnamed_addr constant [22 x i8] c"ProtoAdd(): added %s\0A\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 0, 2) i32 @ProtoAdd(ptr noundef %0) local_unnamed_addr #0 { %2 = load ptr, ptr @protocols, align 8, !tbaa !6 %3 = icmp eq ptr %2, null %4 = icmp eq ptr %0, null %5 = or i1 %4, %3 br i1 %5, label %14, label %6 6: ; preds = %1 %7 = tail call ptr @Malloc(i32 noundef 8) #2 store ptr %0, ptr %7, align 8, !tbaa !10 %8 = load ptr, ptr @protocols, align 8, !tbaa !6 %9 = tail call i32 @Add(ptr noundef %8, ptr noundef nonnull %7) #2 %10 = load ptr, ptr %7, align 8, !tbaa !10 %11 = load ptr, ptr %10, align 8, !tbaa !12 %12 = tail call i32 %11() #2 %13 = tail call i32 @Debug(ptr noundef nonnull @.str, i32 noundef %12) #2 br label %14 14: ; preds = %1, %6 %15 = phi i32 [ 1, %6 ], [ 0, %1 ] ret i32 %15 } declare ptr @Malloc(i32 noundef) local_unnamed_addr #1 declare i32 @Add(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @Debug(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_7__", !7, i64 0} !12 = !{!13, !7, i64 0} !13 = !{!"TYPE_6__", !7, i64 0}
SoftEtherVPN_src_Cedar_extr_Proto.c_ProtoAdd
; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/pfr/extr_pfrsbit.c_pfr_bitwriter_decode_rle1.c' source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/pfr/extr_pfrsbit.c_pfr_bitwriter_decode_rle1.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i64, i64, ptr, i32 } @llvm.compiler.used = appending global [1 x ptr] [ptr @pfr_bitwriter_decode_rle1], section "llvm.metadata" ; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable define internal void @pfr_bitwriter_decode_rle1(ptr nocapture noundef %0, ptr noundef readonly %1, ptr noundef readnone %2) #0 { %4 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2 %5 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1 %6 = load i64, ptr %5, align 8, !tbaa !5 %7 = icmp sgt i64 %6, 0 br i1 %7, label %8, label %98 8: ; preds = %3 %9 = load ptr, ptr %4, align 8, !tbaa !12 %10 = load i64, ptr %0, align 8, !tbaa !13 %11 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 3 br label %12 12: ; preds = %8, %84 %13 = phi ptr [ %9, %8 ], [ %85, %84 ] %14 = phi ptr [ %1, %8 ], [ %66, %84 ] %15 = phi i64 [ 0, %8 ], [ %89, %84 ] %16 = phi i64 [ 128, %8 ], [ %88, %84 ] %17 = phi ptr [ %9, %8 ], [ %87, %84 ] %18 = phi i64 [ %10, %8 ], [ %86, %84 ] %19 = phi i64 [ 1, %8 ], [ %92, %84 ] %20 = phi i64 [ %6, %8 ], [ %93, %84 ] %21 = phi i64 [ 0, %8 ], [ %67, %84 ] %22 = phi i64 [ 0, %8 ], [ %90, %84 ] %23 = phi i64 [ 1, %8 ], [ %69, %84 ] %24 = icmp eq i64 %19, 0 br i1 %24, label %58, label %25 25: ; preds = %12 %26 = icmp eq i64 %23, 0 br i1 %26, label %34, label %27 27: ; preds = %25 %28 = icmp ult ptr %14, %2 br i1 %28, label %29, label %65 29: ; preds = %27 %30 = getelementptr inbounds i64, ptr %14, i64 1 %31 = load i64, ptr %14, align 8, !tbaa !14 %32 = ashr i64 %31, 4 %33 = and i64 %31, 15 br label %34 34: ; preds = %29, %25 %35 = phi i64 [ 1, %25 ], [ 0, %29 ] %36 = phi i64 [ %21, %25 ], [ %32, %29 ] %37 = phi i64 [ %21, %25 ], [ %33, %29 ] %38 = phi ptr [ %14, %25 ], [ %30, %29 ] %39 = icmp eq i64 %36, 0 br i1 %39, label %40, label %58 40: ; preds = %34, %52 %41 = phi i64 [ %53, %52 ], [ %35, %34 ] %42 = phi i64 [ %55, %52 ], [ %37, %34 ] %43 = phi ptr [ %56, %52 ], [ %38, %34 ] %44 = icmp eq i64 %41, 0 br i1 %44, label %52, label %45 45: ; preds = %40 %46 = icmp ult ptr %43, %2 br i1 %46, label %47, label %65 47: ; preds = %45 %48 = getelementptr inbounds i64, ptr %43, i64 1 %49 = load i64, ptr %43, align 8, !tbaa !14 %50 = ashr i64 %49, 4 %51 = and i64 %49, 15 br label %52 52: ; preds = %47, %40 %53 = phi i64 [ 1, %40 ], [ 0, %47 ] %54 = phi i64 [ %42, %40 ], [ %50, %47 ] %55 = phi i64 [ %42, %40 ], [ %51, %47 ] %56 = phi ptr [ %43, %40 ], [ %48, %47 ] %57 = icmp eq i64 %54, 0 br i1 %57, label %40, label %58, !llvm.loop !15 58: ; preds = %52, %34, %12 %59 = phi i64 [ %23, %12 ], [ %35, %34 ], [ %53, %52 ] %60 = phi i64 [ %22, %12 ], [ %36, %34 ], [ %54, %52 ] %61 = phi i64 [ %21, %12 ], [ %37, %34 ], [ %55, %52 ] %62 = phi ptr [ %14, %12 ], [ %38, %34 ], [ %56, %52 ] %63 = icmp eq i64 %59, 0 %64 = select i1 %63, i64 0, i64 %16 br label %65 65: ; preds = %45, %27, %58 %66 = phi ptr [ %62, %58 ], [ %14, %27 ], [ %43, %45 ] %67 = phi i64 [ %61, %58 ], [ %21, %27 ], [ %42, %45 ] %68 = phi i64 [ %60, %58 ], [ %22, %27 ], [ 0, %45 ] %69 = phi i64 [ %59, %58 ], [ 1, %27 ], [ 1, %45 ] %70 = phi i64 [ %64, %58 ], [ %16, %27 ], [ %16, %45 ] %71 = or i64 %70, %15 %72 = add nsw i64 %18, -1 %73 = icmp slt i64 %18, 2 br i1 %73, label %74, label %79 74: ; preds = %65 store i64 %71, ptr %17, align 8, !tbaa !14 %75 = load i64, ptr %0, align 8, !tbaa !13 %76 = load i32, ptr %11, align 8, !tbaa !18 %77 = sext i32 %76 to i64 %78 = getelementptr inbounds i64, ptr %13, i64 %77 store ptr %78, ptr %4, align 8, !tbaa !12 br label %84 79: ; preds = %65 %80 = ashr i64 %16, 1 %81 = icmp ult i64 %16, 2 br i1 %81, label %82, label %84 82: ; preds = %79 store i64 %71, ptr %17, align 8, !tbaa !14 %83 = getelementptr inbounds i64, ptr %17, i64 1 br label %84 84: ; preds = %79, %82, %74 %85 = phi ptr [ %78, %74 ], [ %13, %82 ], [ %13, %79 ] %86 = phi i64 [ %75, %74 ], [ %72, %82 ], [ %72, %79 ] %87 = phi ptr [ %78, %74 ], [ %83, %82 ], [ %17, %79 ] %88 = phi i64 [ 128, %74 ], [ 128, %82 ], [ %80, %79 ] %89 = phi i64 [ 0, %74 ], [ 0, %82 ], [ %71, %79 ] %90 = add nsw i64 %68, -1 %91 = icmp slt i64 %68, 2 %92 = zext i1 %91 to i64 %93 = add nsw i64 %20, -1 %94 = icmp sgt i64 %20, 1 br i1 %94, label %12, label %95, !llvm.loop !19 95: ; preds = %84 %96 = icmp eq i64 %88, 128 br i1 %96, label %98, label %97 97: ; preds = %95 store i64 %89, ptr %87, align 8, !tbaa !14 br label %98 98: ; preds = %3, %97, %95 ret void } attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 8} !6 = !{!"TYPE_3__", !7, i64 0, !7, i64 8, !10, i64 16, !11, i64 24} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!6, !10, i64 16} !13 = !{!6, !7, i64 0} !14 = !{!7, !7, i64 0} !15 = distinct !{!15, !16, !17} !16 = !{!"llvm.loop.mustprogress"} !17 = !{!"llvm.loop.peeled.count", i32 1} !18 = !{!6, !11, i64 24} !19 = distinct !{!19, !16}
; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/pfr/extr_pfrsbit.c_pfr_bitwriter_decode_rle1.c' source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/pfr/extr_pfrsbit.c_pfr_bitwriter_decode_rle1.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @pfr_bitwriter_decode_rle1], section "llvm.metadata" ; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) define internal void @pfr_bitwriter_decode_rle1(ptr nocapture noundef %0, ptr noundef readonly %1, ptr noundef readnone %2) #0 { %4 = getelementptr inbounds i8, ptr %0, i64 16 %5 = getelementptr inbounds i8, ptr %0, i64 8 %6 = load i64, ptr %5, align 8, !tbaa !6 %7 = icmp sgt i64 %6, 0 br i1 %7, label %8, label %98 8: ; preds = %3 %9 = load ptr, ptr %4, align 8, !tbaa !13 %10 = load i64, ptr %0, align 8, !tbaa !14 %11 = getelementptr inbounds i8, ptr %0, i64 24 br label %12 12: ; preds = %8, %84 %13 = phi ptr [ %9, %8 ], [ %85, %84 ] %14 = phi ptr [ %1, %8 ], [ %66, %84 ] %15 = phi i64 [ 0, %8 ], [ %89, %84 ] %16 = phi i64 [ 128, %8 ], [ %88, %84 ] %17 = phi ptr [ %9, %8 ], [ %87, %84 ] %18 = phi i64 [ %10, %8 ], [ %86, %84 ] %19 = phi i64 [ 1, %8 ], [ %92, %84 ] %20 = phi i64 [ %6, %8 ], [ %93, %84 ] %21 = phi i64 [ 0, %8 ], [ %67, %84 ] %22 = phi i64 [ 0, %8 ], [ %90, %84 ] %23 = phi i64 [ 1, %8 ], [ %69, %84 ] %24 = icmp eq i64 %19, 0 br i1 %24, label %58, label %25 25: ; preds = %12 %26 = icmp eq i64 %23, 0 br i1 %26, label %34, label %27 27: ; preds = %25 %28 = icmp ult ptr %14, %2 br i1 %28, label %29, label %65 29: ; preds = %27 %30 = getelementptr inbounds i8, ptr %14, i64 8 %31 = load i64, ptr %14, align 8, !tbaa !15 %32 = ashr i64 %31, 4 %33 = and i64 %31, 15 br label %34 34: ; preds = %29, %25 %35 = phi i64 [ 1, %25 ], [ 0, %29 ] %36 = phi i64 [ %21, %25 ], [ %32, %29 ] %37 = phi i64 [ %21, %25 ], [ %33, %29 ] %38 = phi ptr [ %14, %25 ], [ %30, %29 ] %39 = icmp eq i64 %36, 0 br i1 %39, label %40, label %58 40: ; preds = %34, %52 %41 = phi i64 [ %53, %52 ], [ %35, %34 ] %42 = phi i64 [ %55, %52 ], [ %37, %34 ] %43 = phi ptr [ %56, %52 ], [ %38, %34 ] %44 = icmp eq i64 %41, 0 br i1 %44, label %52, label %45 45: ; preds = %40 %46 = icmp ult ptr %43, %2 br i1 %46, label %47, label %65 47: ; preds = %45 %48 = getelementptr inbounds i8, ptr %43, i64 8 %49 = load i64, ptr %43, align 8, !tbaa !15 %50 = ashr i64 %49, 4 %51 = and i64 %49, 15 br label %52 52: ; preds = %47, %40 %53 = phi i64 [ 1, %40 ], [ 0, %47 ] %54 = phi i64 [ %42, %40 ], [ %50, %47 ] %55 = phi i64 [ %42, %40 ], [ %51, %47 ] %56 = phi ptr [ %43, %40 ], [ %48, %47 ] %57 = icmp eq i64 %54, 0 br i1 %57, label %40, label %58, !llvm.loop !16 58: ; preds = %52, %34, %12 %59 = phi i64 [ %23, %12 ], [ %35, %34 ], [ %53, %52 ] %60 = phi i64 [ %22, %12 ], [ %36, %34 ], [ %54, %52 ] %61 = phi i64 [ %21, %12 ], [ %37, %34 ], [ %55, %52 ] %62 = phi ptr [ %14, %12 ], [ %38, %34 ], [ %56, %52 ] %63 = icmp eq i64 %59, 0 %64 = select i1 %63, i64 0, i64 %16 br label %65 65: ; preds = %45, %27, %58 %66 = phi ptr [ %62, %58 ], [ %14, %27 ], [ %43, %45 ] %67 = phi i64 [ %61, %58 ], [ %21, %27 ], [ %42, %45 ] %68 = phi i64 [ %60, %58 ], [ %22, %27 ], [ 0, %45 ] %69 = phi i64 [ %59, %58 ], [ 1, %27 ], [ 1, %45 ] %70 = phi i64 [ %64, %58 ], [ %16, %27 ], [ %16, %45 ] %71 = or i64 %70, %15 %72 = add nsw i64 %18, -1 %73 = icmp slt i64 %18, 2 br i1 %73, label %74, label %79 74: ; preds = %65 store i64 %71, ptr %17, align 8, !tbaa !15 %75 = load i64, ptr %0, align 8, !tbaa !14 %76 = load i32, ptr %11, align 8, !tbaa !19 %77 = sext i32 %76 to i64 %78 = getelementptr inbounds i64, ptr %13, i64 %77 store ptr %78, ptr %4, align 8, !tbaa !13 br label %84 79: ; preds = %65 %80 = ashr i64 %16, 1 %81 = icmp ult i64 %16, 2 br i1 %81, label %82, label %84 82: ; preds = %79 store i64 %71, ptr %17, align 8, !tbaa !15 %83 = getelementptr inbounds i8, ptr %17, i64 8 br label %84 84: ; preds = %79, %82, %74 %85 = phi ptr [ %78, %74 ], [ %13, %82 ], [ %13, %79 ] %86 = phi i64 [ %75, %74 ], [ %72, %82 ], [ %72, %79 ] %87 = phi ptr [ %78, %74 ], [ %83, %82 ], [ %17, %79 ] %88 = phi i64 [ 128, %74 ], [ 128, %82 ], [ %80, %79 ] %89 = phi i64 [ 0, %74 ], [ 0, %82 ], [ %71, %79 ] %90 = add nsw i64 %68, -1 %91 = icmp slt i64 %68, 2 %92 = zext i1 %91 to i64 %93 = add nsw i64 %20, -1 %94 = icmp sgt i64 %20, 1 br i1 %94, label %12, label %95, !llvm.loop !20 95: ; preds = %84 %96 = icmp eq i64 %88, 128 br i1 %96, label %98, label %97 97: ; preds = %95 store i64 %89, ptr %87, align 8, !tbaa !15 br label %98 98: ; preds = %3, %97, %95 ret void } attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 8} !7 = !{!"TYPE_3__", !8, i64 0, !8, i64 8, !11, i64 16, !12, i64 24} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!"int", !9, i64 0} !13 = !{!7, !11, i64 16} !14 = !{!7, !8, i64 0} !15 = !{!8, !8, i64 0} !16 = distinct !{!16, !17, !18} !17 = !{!"llvm.loop.mustprogress"} !18 = !{!"llvm.loop.peeled.count", i32 1} !19 = !{!7, !12, i64 24} !20 = distinct !{!20, !17}
reactos_sdk_lib_3rdparty_freetype_src_pfr_extr_pfrsbit.c_pfr_bitwriter_decode_rle1
; ModuleID = 'AnghaBench/i3/src/extr_util.c_update_if_necessary.c' source_filename = "AnghaBench/i3/src/extr_util.c_update_if_necessary.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable define dso_local i32 @update_if_necessary(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = load i32, ptr %0, align 4, !tbaa !5 store i32 %1, ptr %0, align 4, !tbaa !5 %4 = icmp ne i32 %3, %1 %5 = zext i1 %4 to i32 ret i32 %5 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/i3/src/extr_util.c_update_if_necessary.c' source_filename = "AnghaBench/i3/src/extr_util.c_update_if_necessary.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) define range(i32 0, 2) i32 @update_if_necessary(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = load i32, ptr %0, align 4, !tbaa !6 store i32 %1, ptr %0, align 4, !tbaa !6 %4 = icmp ne i32 %3, %1 %5 = zext i1 %4 to i32 ret i32 %5 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
i3_src_extr_util.c_update_if_necessary
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ti/wlcore/extr_main.c_wlcore_adjust_conf.c' source_filename = "AnghaBench/linux/drivers/net/wireless/ti/wlcore/extr_main.c_wlcore_adjust_conf.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_6__ = type { %struct.TYPE_5__, %struct.TYPE_4__ } %struct.TYPE_5__ = type { ptr, ptr } %struct.TYPE_4__ = type { i32, i64, ptr } @fwlog_param = dso_local local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [11 x i8] c"continuous\00", align 1 @WL12XX_FWLOG_CONTINUOUS = dso_local local_unnamed_addr global ptr null, align 8 @WL12XX_FWLOG_OUTPUT_HOST = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [8 x i8] c"dbgpins\00", align 1 @WL12XX_FWLOG_OUTPUT_DBG_PINS = dso_local local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [8 x i8] c"disable\00", align 1 @WL12XX_FWLOG_OUTPUT_NONE = dso_local local_unnamed_addr global i32 0, align 4 @.str.3 = private unnamed_addr constant [27 x i8] c"Unknown fwlog parameter %s\00", align 1 @bug_on_recovery = dso_local local_unnamed_addr global i32 0, align 4 @no_recovery = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @wlcore_adjust_conf], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @wlcore_adjust_conf(ptr nocapture noundef writeonly %0) #0 { %2 = load i64, ptr @fwlog_param, align 8, !tbaa !5 %3 = icmp eq i64 %2, 0 br i1 %3, label %32, label %4 4: ; preds = %1 %5 = tail call i32 @strcmp(i64 noundef %2, ptr noundef nonnull @.str) #2 %6 = icmp eq i32 %5, 0 br i1 %6, label %7, label %12 7: ; preds = %4 %8 = load ptr, ptr @WL12XX_FWLOG_CONTINUOUS, align 8, !tbaa !9 %9 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1 %10 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1, i32 2 store ptr %8, ptr %10, align 8, !tbaa !11 %11 = load i32, ptr @WL12XX_FWLOG_OUTPUT_HOST, align 4, !tbaa !17 store i32 %11, ptr %9, align 8, !tbaa !18 br label %32 12: ; preds = %4 %13 = load i64, ptr @fwlog_param, align 8, !tbaa !5 %14 = tail call i32 @strcmp(i64 noundef %13, ptr noundef nonnull @.str.1) #2 %15 = icmp eq i32 %14, 0 br i1 %15, label %16, label %21 16: ; preds = %12 %17 = load ptr, ptr @WL12XX_FWLOG_CONTINUOUS, align 8, !tbaa !9 %18 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1 %19 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1, i32 2 store ptr %17, ptr %19, align 8, !tbaa !11 %20 = load i32, ptr @WL12XX_FWLOG_OUTPUT_DBG_PINS, align 4, !tbaa !17 store i32 %20, ptr %18, align 8, !tbaa !18 br label %32 21: ; preds = %12 %22 = load i64, ptr @fwlog_param, align 8, !tbaa !5 %23 = tail call i32 @strcmp(i64 noundef %22, ptr noundef nonnull @.str.2) #2 %24 = icmp eq i32 %23, 0 br i1 %24, label %25, label %29 25: ; preds = %21 %26 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1 %27 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1, i32 1 store i64 0, ptr %27, align 8, !tbaa !19 %28 = load i32, ptr @WL12XX_FWLOG_OUTPUT_NONE, align 4, !tbaa !17 store i32 %28, ptr %26, align 8, !tbaa !18 br label %32 29: ; preds = %21 %30 = load i64, ptr @fwlog_param, align 8, !tbaa !5 %31 = tail call i32 @wl1271_error(ptr noundef nonnull @.str.3, i64 noundef %30) #2 br label %32 32: ; preds = %7, %25, %29, %16, %1 %33 = load i32, ptr @bug_on_recovery, align 4, !tbaa !17 %34 = icmp eq i32 %33, -1 br i1 %34, label %39, label %35 35: ; preds = %32 %36 = sext i32 %33 to i64 %37 = inttoptr i64 %36 to ptr %38 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1 store ptr %37, ptr %38, align 8, !tbaa !20 br label %39 39: ; preds = %35, %32 %40 = load i32, ptr @no_recovery, align 4, !tbaa !17 %41 = icmp eq i32 %40, -1 br i1 %41, label %45, label %42 42: ; preds = %39 %43 = sext i32 %40 to i64 %44 = inttoptr i64 %43 to ptr store ptr %44, ptr %0, align 8, !tbaa !21 br label %45 45: ; preds = %42, %39 ret void } declare i32 @strcmp(i64 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @wl1271_error(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"any pointer", !7, i64 0} !11 = !{!12, !10, i64 32} !12 = !{!"wl1271", !13, i64 0} !13 = !{!"TYPE_6__", !14, i64 0, !15, i64 16} !14 = !{!"TYPE_5__", !10, i64 0, !10, i64 8} !15 = !{!"TYPE_4__", !16, i64 0, !6, i64 8, !10, i64 16} !16 = !{!"int", !7, i64 0} !17 = !{!16, !16, i64 0} !18 = !{!12, !16, i64 16} !19 = !{!12, !6, i64 24} !20 = !{!12, !10, i64 8} !21 = !{!12, !10, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ti/wlcore/extr_main.c_wlcore_adjust_conf.c' source_filename = "AnghaBench/linux/drivers/net/wireless/ti/wlcore/extr_main.c_wlcore_adjust_conf.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @fwlog_param = common local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [11 x i8] c"continuous\00", align 1 @WL12XX_FWLOG_CONTINUOUS = common local_unnamed_addr global ptr null, align 8 @WL12XX_FWLOG_OUTPUT_HOST = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [8 x i8] c"dbgpins\00", align 1 @WL12XX_FWLOG_OUTPUT_DBG_PINS = common local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [8 x i8] c"disable\00", align 1 @WL12XX_FWLOG_OUTPUT_NONE = common local_unnamed_addr global i32 0, align 4 @.str.3 = private unnamed_addr constant [27 x i8] c"Unknown fwlog parameter %s\00", align 1 @bug_on_recovery = common local_unnamed_addr global i32 0, align 4 @no_recovery = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @wlcore_adjust_conf], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @wlcore_adjust_conf(ptr nocapture noundef writeonly %0) #0 { %2 = load i64, ptr @fwlog_param, align 8, !tbaa !6 %3 = icmp eq i64 %2, 0 br i1 %3, label %32, label %4 4: ; preds = %1 %5 = tail call i32 @strcmp(i64 noundef %2, ptr noundef nonnull @.str) #2 %6 = icmp eq i32 %5, 0 br i1 %6, label %7, label %12 7: ; preds = %4 %8 = load ptr, ptr @WL12XX_FWLOG_CONTINUOUS, align 8, !tbaa !10 %9 = getelementptr inbounds i8, ptr %0, i64 16 %10 = getelementptr inbounds i8, ptr %0, i64 32 store ptr %8, ptr %10, align 8, !tbaa !12 %11 = load i32, ptr @WL12XX_FWLOG_OUTPUT_HOST, align 4, !tbaa !18 store i32 %11, ptr %9, align 8, !tbaa !19 br label %32 12: ; preds = %4 %13 = load i64, ptr @fwlog_param, align 8, !tbaa !6 %14 = tail call i32 @strcmp(i64 noundef %13, ptr noundef nonnull @.str.1) #2 %15 = icmp eq i32 %14, 0 br i1 %15, label %16, label %21 16: ; preds = %12 %17 = load ptr, ptr @WL12XX_FWLOG_CONTINUOUS, align 8, !tbaa !10 %18 = getelementptr inbounds i8, ptr %0, i64 16 %19 = getelementptr inbounds i8, ptr %0, i64 32 store ptr %17, ptr %19, align 8, !tbaa !12 %20 = load i32, ptr @WL12XX_FWLOG_OUTPUT_DBG_PINS, align 4, !tbaa !18 store i32 %20, ptr %18, align 8, !tbaa !19 br label %32 21: ; preds = %12 %22 = load i64, ptr @fwlog_param, align 8, !tbaa !6 %23 = tail call i32 @strcmp(i64 noundef %22, ptr noundef nonnull @.str.2) #2 %24 = icmp eq i32 %23, 0 br i1 %24, label %25, label %29 25: ; preds = %21 %26 = getelementptr inbounds i8, ptr %0, i64 16 %27 = getelementptr inbounds i8, ptr %0, i64 24 store i64 0, ptr %27, align 8, !tbaa !20 %28 = load i32, ptr @WL12XX_FWLOG_OUTPUT_NONE, align 4, !tbaa !18 store i32 %28, ptr %26, align 8, !tbaa !19 br label %32 29: ; preds = %21 %30 = load i64, ptr @fwlog_param, align 8, !tbaa !6 %31 = tail call i32 @wl1271_error(ptr noundef nonnull @.str.3, i64 noundef %30) #2 br label %32 32: ; preds = %7, %25, %29, %16, %1 %33 = load i32, ptr @bug_on_recovery, align 4, !tbaa !18 %34 = icmp eq i32 %33, -1 br i1 %34, label %39, label %35 35: ; preds = %32 %36 = sext i32 %33 to i64 %37 = inttoptr i64 %36 to ptr %38 = getelementptr inbounds i8, ptr %0, i64 8 store ptr %37, ptr %38, align 8, !tbaa !21 br label %39 39: ; preds = %35, %32 %40 = load i32, ptr @no_recovery, align 4, !tbaa !18 %41 = icmp eq i32 %40, -1 br i1 %41, label %45, label %42 42: ; preds = %39 %43 = sext i32 %40 to i64 %44 = inttoptr i64 %43 to ptr store ptr %44, ptr %0, align 8, !tbaa !22 br label %45 45: ; preds = %42, %39 ret void } declare i32 @strcmp(i64 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @wl1271_error(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!13, !11, i64 32} !13 = !{!"wl1271", !14, i64 0} !14 = !{!"TYPE_6__", !15, i64 0, !16, i64 16} !15 = !{!"TYPE_5__", !11, i64 0, !11, i64 8} !16 = !{!"TYPE_4__", !17, i64 0, !7, i64 8, !11, i64 16} !17 = !{!"int", !8, i64 0} !18 = !{!17, !17, i64 0} !19 = !{!13, !17, i64 16} !20 = !{!13, !7, i64 24} !21 = !{!13, !11, i64 8} !22 = !{!13, !11, i64 0}
linux_drivers_net_wireless_ti_wlcore_extr_main.c_wlcore_adjust_conf
; ModuleID = 'AnghaBench/RetroArch/frontend/drivers/extr_platform_ps3.c_frontend_ps3_exitspawn.c' source_filename = "AnghaBench/RetroArch/frontend/drivers/extr_platform_ps3.c_frontend_ps3_exitspawn.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @CELL_SYSMODULE_FS = dso_local local_unnamed_addr global i32 0, align 4 @CELL_SYSMODULE_IO = dso_local local_unnamed_addr global i32 0, align 4 @CELL_SYSMODULE_SYSUTIL_GAME = dso_local local_unnamed_addr global i32 0, align 4 @frontend_ps3_shutdown = dso_local local_unnamed_addr global i32 0, align 4 @ps3_fork_mode = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @frontend_ps3_exitspawn], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define internal void @frontend_ps3_exitspawn(ptr nocapture readnone %0, i64 %1) #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/RetroArch/frontend/drivers/extr_platform_ps3.c_frontend_ps3_exitspawn.c' source_filename = "AnghaBench/RetroArch/frontend/drivers/extr_platform_ps3.c_frontend_ps3_exitspawn.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @CELL_SYSMODULE_FS = common local_unnamed_addr global i32 0, align 4 @CELL_SYSMODULE_IO = common local_unnamed_addr global i32 0, align 4 @CELL_SYSMODULE_SYSUTIL_GAME = common local_unnamed_addr global i32 0, align 4 @frontend_ps3_shutdown = common local_unnamed_addr global i32 0, align 4 @ps3_fork_mode = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @frontend_ps3_exitspawn], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define internal void @frontend_ps3_exitspawn(ptr nocapture readnone %0, i64 %1) #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
RetroArch_frontend_drivers_extr_platform_ps3.c_frontend_ps3_exitspawn
; ModuleID = 'AnghaBench/linux/drivers/counter/extr_ftm-quaddec.c_ftm_set_write_protection.c' source_filename = "AnghaBench/linux/drivers/counter/extr_ftm-quaddec.c_ftm_set_write_protection.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @FTM_FMS = dso_local local_unnamed_addr global i32 0, align 4 @FTM_FMS_WPEN = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ftm_set_write_protection], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @ftm_set_write_protection(ptr noundef %0) #0 { %2 = load i32, ptr @FTM_FMS, align 4, !tbaa !5 %3 = load i32, ptr @FTM_FMS_WPEN, align 4, !tbaa !5 %4 = tail call i32 @FTM_FIELD_UPDATE(ptr noundef %0, i32 noundef %2, i32 noundef %3, i32 noundef 1) #2 ret void } declare i32 @FTM_FIELD_UPDATE(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/counter/extr_ftm-quaddec.c_ftm_set_write_protection.c' source_filename = "AnghaBench/linux/drivers/counter/extr_ftm-quaddec.c_ftm_set_write_protection.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @FTM_FMS = common local_unnamed_addr global i32 0, align 4 @FTM_FMS_WPEN = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ftm_set_write_protection], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @ftm_set_write_protection(ptr noundef %0) #0 { %2 = load i32, ptr @FTM_FMS, align 4, !tbaa !6 %3 = load i32, ptr @FTM_FMS_WPEN, align 4, !tbaa !6 %4 = tail call i32 @FTM_FIELD_UPDATE(ptr noundef %0, i32 noundef %2, i32 noundef %3, i32 noundef 1) #2 ret void } declare i32 @FTM_FIELD_UPDATE(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_counter_extr_ftm-quaddec.c_ftm_set_write_protection
; ModuleID = 'AnghaBench/linux/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_eeprom_read_insn.c' source_filename = "AnghaBench/linux/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_eeprom_read_insn.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.comedi_insn = type { i32, i32 } @llvm.compiler.used = appending global [1 x ptr] [ptr @eeprom_read_insn], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @eeprom_read_insn(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2, ptr nocapture noundef writeonly %3) #0 { %5 = load i32, ptr %2, align 4, !tbaa !5 %6 = icmp eq i32 %5, 0 br i1 %6, label %21, label %7 7: ; preds = %4 %8 = getelementptr inbounds %struct.comedi_insn, ptr %2, i64 0, i32 1 %9 = load i32, ptr %8, align 4, !tbaa !10 %10 = tail call i32 @CR_CHAN(i32 noundef %9) #2 %11 = tail call i32 @read_eeprom(ptr noundef %0, i32 noundef %10) #2 %12 = load i32, ptr %2, align 4, !tbaa !5 %13 = icmp eq i32 %12, 0 br i1 %13, label %21, label %14 14: ; preds = %7, %14 %15 = phi i64 [ %17, %14 ], [ 0, %7 ] %16 = getelementptr inbounds i32, ptr %3, i64 %15 store i32 %11, ptr %16, align 4, !tbaa !11 %17 = add nuw nsw i64 %15, 1 %18 = load i32, ptr %2, align 4, !tbaa !5 %19 = zext i32 %18 to i64 %20 = icmp ult i64 %17, %19 br i1 %20, label %14, label %21, !llvm.loop !12 21: ; preds = %14, %7, %4 %22 = phi i32 [ 0, %7 ], [ 0, %4 ], [ %18, %14 ] ret i32 %22 } declare i32 @read_eeprom(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @CR_CHAN(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"comedi_insn", !7, i64 0, !7, i64 4} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!6, !7, i64 4} !11 = !{!7, !7, i64 0} !12 = distinct !{!12, !13} !13 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_eeprom_read_insn.c' source_filename = "AnghaBench/linux/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_eeprom_read_insn.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @eeprom_read_insn], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @eeprom_read_insn(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2, ptr nocapture noundef writeonly %3) #0 { %5 = load i32, ptr %2, align 4, !tbaa !6 %6 = icmp eq i32 %5, 0 br i1 %6, label %21, label %7 7: ; preds = %4 %8 = getelementptr inbounds i8, ptr %2, i64 4 %9 = load i32, ptr %8, align 4, !tbaa !11 %10 = tail call i32 @CR_CHAN(i32 noundef %9) #2 %11 = tail call i32 @read_eeprom(ptr noundef %0, i32 noundef %10) #2 %12 = load i32, ptr %2, align 4, !tbaa !6 %13 = icmp eq i32 %12, 0 br i1 %13, label %21, label %14 14: ; preds = %7, %14 %15 = phi i64 [ %17, %14 ], [ 0, %7 ] %16 = getelementptr inbounds i32, ptr %3, i64 %15 store i32 %11, ptr %16, align 4, !tbaa !12 %17 = add nuw nsw i64 %15, 1 %18 = load i32, ptr %2, align 4, !tbaa !6 %19 = zext i32 %18 to i64 %20 = icmp ult i64 %17, %19 br i1 %20, label %14, label %21, !llvm.loop !13 21: ; preds = %14, %7, %4 %22 = phi i32 [ 0, %7 ], [ 0, %4 ], [ %18, %14 ] ret i32 %22 } declare i32 @read_eeprom(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @CR_CHAN(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"comedi_insn", !8, i64 0, !8, i64 4} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!7, !8, i64 4} !12 = !{!8, !8, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"}
linux_drivers_staging_comedi_drivers_extr_cb_pcidas64.c_eeprom_read_insn
; ModuleID = 'AnghaBench/linux/tools/perf/util/extr_trace-event-info.c_name_in_tp_list.c' source_filename = "AnghaBench/linux/tools/perf/util/extr_trace-event-info.c_name_in_tp_list.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.tracepoint_path = type { ptr, i32 } @llvm.compiler.used = appending global [1 x ptr] [ptr @name_in_tp_list], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @name_in_tp_list(ptr noundef %0, ptr noundef readonly %1) #0 { %3 = icmp eq ptr %1, null br i1 %3, label %13, label %4 4: ; preds = %2, %10 %5 = phi ptr [ %11, %10 ], [ %1, %2 ] %6 = getelementptr inbounds %struct.tracepoint_path, ptr %5, i64 0, i32 1 %7 = load i32, ptr %6, align 8, !tbaa !5 %8 = tail call i32 @strcmp(ptr noundef %0, i32 noundef %7) #2 %9 = icmp eq i32 %8, 0 br i1 %9, label %13, label %10 10: ; preds = %4 %11 = load ptr, ptr %5, align 8, !tbaa !11 %12 = icmp eq ptr %11, null br i1 %12, label %13, label %4, !llvm.loop !12 13: ; preds = %4, %10, %2 %14 = phi i32 [ 0, %2 ], [ 0, %10 ], [ 1, %4 ] ret i32 %14 } declare i32 @strcmp(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"tracepoint_path", !7, i64 0, !10, i64 8} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!6, !7, i64 0} !12 = distinct !{!12, !13} !13 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/tools/perf/util/extr_trace-event-info.c_name_in_tp_list.c' source_filename = "AnghaBench/linux/tools/perf/util/extr_trace-event-info.c_name_in_tp_list.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @name_in_tp_list], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @name_in_tp_list(ptr noundef %0, ptr noundef readonly %1) #0 { %3 = icmp eq ptr %1, null br i1 %3, label %13, label %4 4: ; preds = %2, %10 %5 = phi ptr [ %11, %10 ], [ %1, %2 ] %6 = getelementptr inbounds i8, ptr %5, i64 8 %7 = load i32, ptr %6, align 8, !tbaa !6 %8 = tail call i32 @strcmp(ptr noundef %0, i32 noundef %7) #2 %9 = icmp eq i32 %8, 0 br i1 %9, label %13, label %10 10: ; preds = %4 %11 = load ptr, ptr %5, align 8, !tbaa !12 %12 = icmp eq ptr %11, null br i1 %12, label %13, label %4, !llvm.loop !13 13: ; preds = %4, %10, %2 %14 = phi i32 [ 0, %2 ], [ 0, %10 ], [ 1, %4 ] ret i32 %14 } declare i32 @strcmp(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"tracepoint_path", !8, i64 0, !11, i64 8} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!7, !8, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"}
linux_tools_perf_util_extr_trace-event-info.c_name_in_tp_list
; ModuleID = 'AnghaBench/freebsd/sys/i386/i386/extr_npx.c_npxinit.c' source_filename = "AnghaBench/freebsd/sys/i386/i386/extr_npx.c_npxinit.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %union.savefpu = type { i32 } @npxinit.dummy = internal global %union.savefpu zeroinitializer, align 4 @use_xsave = dso_local local_unnamed_addr global i64 0, align 8 @CR4_XSAVE = dso_local local_unnamed_addr global i32 0, align 4 @XCR0 = dso_local local_unnamed_addr global i32 0, align 4 @xsave_mask = dso_local local_unnamed_addr global i32 0, align 4 @cpu_fxsr = dso_local local_unnamed_addr global i64 0, align 8 @__INITIAL_NPXCW__ = dso_local local_unnamed_addr global i32 0, align 4 @__INITIAL_MXCSR__ = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @npxinit(i32 noundef %0) local_unnamed_addr #0 { %2 = icmp eq i32 %0, 0 br i1 %2, label %8, label %3 3: ; preds = %1 %4 = tail call i32 (...) @npx_probe() #2 %5 = icmp eq i32 %4, 0 br i1 %5, label %42, label %6 6: ; preds = %3 %7 = tail call i32 (...) @npxinit_bsp1() #2 br label %8 8: ; preds = %6, %1 %9 = load i64, ptr @use_xsave, align 8, !tbaa !5 %10 = icmp eq i64 %9, 0 br i1 %10, label %19, label %11 11: ; preds = %8 %12 = tail call i32 (...) @rcr4() #2 %13 = load i32, ptr @CR4_XSAVE, align 4, !tbaa !9 %14 = or i32 %13, %12 %15 = tail call i32 @load_cr4(i32 noundef %14) #2 %16 = load i32, ptr @XCR0, align 4, !tbaa !9 %17 = load i32, ptr @xsave_mask, align 4, !tbaa !9 %18 = tail call i32 @load_xcr(i32 noundef %16, i32 noundef %17) #2 br label %19 19: ; preds = %11, %8 br i1 %2, label %22, label %20 20: ; preds = %19 %21 = tail call i32 (...) @npxinit_bsp2() #2 br label %22 22: ; preds = %20, %19 %23 = tail call i32 (...) @intr_disable() #2 %24 = tail call i32 (...) @stop_emulating() #2 %25 = load i64, ptr @cpu_fxsr, align 8, !tbaa !5 %26 = icmp eq i64 %25, 0 br i1 %26, label %29, label %27 27: ; preds = %22 %28 = tail call i32 (...) @fninit() #2 br label %31 29: ; preds = %22 %30 = tail call i32 @fnsave(ptr noundef nonnull @npxinit.dummy) #2 br label %31 31: ; preds = %29, %27 %32 = load i32, ptr @__INITIAL_NPXCW__, align 4, !tbaa !9 %33 = tail call i32 @fldcw(i32 noundef %32) #2 %34 = load i64, ptr @cpu_fxsr, align 8, !tbaa !5 %35 = icmp eq i64 %34, 0 br i1 %35, label %39, label %36 36: ; preds = %31 %37 = load i32, ptr @__INITIAL_MXCSR__, align 4, !tbaa !9 %38 = tail call i32 @ldmxcsr(i32 noundef %37) #2 br label %39 39: ; preds = %36, %31 %40 = tail call i32 (...) @start_emulating() #2 %41 = tail call i32 @intr_restore(i32 noundef %23) #2 br label %42 42: ; preds = %3, %39 ret void } declare i32 @npx_probe(...) local_unnamed_addr #1 declare i32 @npxinit_bsp1(...) local_unnamed_addr #1 declare i32 @load_cr4(i32 noundef) local_unnamed_addr #1 declare i32 @rcr4(...) local_unnamed_addr #1 declare i32 @load_xcr(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @npxinit_bsp2(...) local_unnamed_addr #1 declare i32 @intr_disable(...) local_unnamed_addr #1 declare i32 @stop_emulating(...) local_unnamed_addr #1 declare i32 @fninit(...) local_unnamed_addr #1 declare i32 @fnsave(ptr noundef) local_unnamed_addr #1 declare i32 @fldcw(i32 noundef) local_unnamed_addr #1 declare i32 @ldmxcsr(i32 noundef) local_unnamed_addr #1 declare i32 @start_emulating(...) local_unnamed_addr #1 declare i32 @intr_restore(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0}
; ModuleID = 'AnghaBench/freebsd/sys/i386/i386/extr_npx.c_npxinit.c' source_filename = "AnghaBench/freebsd/sys/i386/i386/extr_npx.c_npxinit.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %union.savefpu = type { i32 } @npxinit.dummy = internal global %union.savefpu zeroinitializer, align 4 @use_xsave = common local_unnamed_addr global i64 0, align 8 @CR4_XSAVE = common local_unnamed_addr global i32 0, align 4 @XCR0 = common local_unnamed_addr global i32 0, align 4 @xsave_mask = common local_unnamed_addr global i32 0, align 4 @cpu_fxsr = common local_unnamed_addr global i64 0, align 8 @__INITIAL_NPXCW__ = common local_unnamed_addr global i32 0, align 4 @__INITIAL_MXCSR__ = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @npxinit(i32 noundef %0) local_unnamed_addr #0 { %2 = icmp eq i32 %0, 0 br i1 %2, label %8, label %3 3: ; preds = %1 %4 = tail call i32 @npx_probe() #2 %5 = icmp eq i32 %4, 0 br i1 %5, label %42, label %6 6: ; preds = %3 %7 = tail call i32 @npxinit_bsp1() #2 br label %8 8: ; preds = %6, %1 %9 = load i64, ptr @use_xsave, align 8, !tbaa !6 %10 = icmp eq i64 %9, 0 br i1 %10, label %19, label %11 11: ; preds = %8 %12 = tail call i32 @rcr4() #2 %13 = load i32, ptr @CR4_XSAVE, align 4, !tbaa !10 %14 = or i32 %13, %12 %15 = tail call i32 @load_cr4(i32 noundef %14) #2 %16 = load i32, ptr @XCR0, align 4, !tbaa !10 %17 = load i32, ptr @xsave_mask, align 4, !tbaa !10 %18 = tail call i32 @load_xcr(i32 noundef %16, i32 noundef %17) #2 br label %19 19: ; preds = %11, %8 br i1 %2, label %22, label %20 20: ; preds = %19 %21 = tail call i32 @npxinit_bsp2() #2 br label %22 22: ; preds = %20, %19 %23 = tail call i32 @intr_disable() #2 %24 = tail call i32 @stop_emulating() #2 %25 = load i64, ptr @cpu_fxsr, align 8, !tbaa !6 %26 = icmp eq i64 %25, 0 br i1 %26, label %29, label %27 27: ; preds = %22 %28 = tail call i32 @fninit() #2 br label %31 29: ; preds = %22 %30 = tail call i32 @fnsave(ptr noundef nonnull @npxinit.dummy) #2 br label %31 31: ; preds = %29, %27 %32 = load i32, ptr @__INITIAL_NPXCW__, align 4, !tbaa !10 %33 = tail call i32 @fldcw(i32 noundef %32) #2 %34 = load i64, ptr @cpu_fxsr, align 8, !tbaa !6 %35 = icmp eq i64 %34, 0 br i1 %35, label %39, label %36 36: ; preds = %31 %37 = load i32, ptr @__INITIAL_MXCSR__, align 4, !tbaa !10 %38 = tail call i32 @ldmxcsr(i32 noundef %37) #2 br label %39 39: ; preds = %36, %31 %40 = tail call i32 @start_emulating() #2 %41 = tail call i32 @intr_restore(i32 noundef %23) #2 br label %42 42: ; preds = %3, %39 ret void } declare i32 @npx_probe(...) local_unnamed_addr #1 declare i32 @npxinit_bsp1(...) local_unnamed_addr #1 declare i32 @load_cr4(i32 noundef) local_unnamed_addr #1 declare i32 @rcr4(...) local_unnamed_addr #1 declare i32 @load_xcr(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @npxinit_bsp2(...) local_unnamed_addr #1 declare i32 @intr_disable(...) local_unnamed_addr #1 declare i32 @stop_emulating(...) local_unnamed_addr #1 declare i32 @fninit(...) local_unnamed_addr #1 declare i32 @fnsave(ptr noundef) local_unnamed_addr #1 declare i32 @fldcw(i32 noundef) local_unnamed_addr #1 declare i32 @ldmxcsr(i32 noundef) local_unnamed_addr #1 declare i32 @start_emulating(...) local_unnamed_addr #1 declare i32 @intr_restore(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0}
freebsd_sys_i386_i386_extr_npx.c_npxinit
; ModuleID = 'AnghaBench/linux/fs/ocfs2/extr_refcounttree.c_ocfs2_get_refcount_cpos_end.c' source_filename = "AnghaBench/linux/fs/ocfs2/extr_refcounttree.c_ocfs2_get_refcount_cpos_end.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ocfs2_extent_tree = type { i32 } %struct.ocfs2_extent_list = type { i32, ptr } %struct.TYPE_10__ = type { i32, i32 } %struct.ocfs2_extent_block = type { %struct.TYPE_7__, i32 } %struct.TYPE_7__ = type { ptr } %struct.TYPE_6__ = type { i32 } %struct.TYPE_9__ = type { ptr, ptr } @UINT_MAX = dso_local local_unnamed_addr global i32 0, align 4 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ocfs2_get_refcount_cpos_end], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ocfs2_get_refcount_cpos_end(ptr noundef %0, ptr noundef %1, ptr noundef readonly %2, ptr nocapture noundef readonly %3, i32 noundef %4, ptr nocapture noundef writeonly %5) #0 { %7 = alloca i32, align 4 %8 = alloca %struct.ocfs2_extent_tree, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3 %9 = tail call ptr @ocfs2_metadata_cache_get_super(ptr noundef %0) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3 %10 = load i32, ptr %3, align 8, !tbaa !5 %11 = tail call i32 @le16_to_cpu(i32 noundef %10) #3 %12 = add nsw i32 %11, -1 %13 = icmp sgt i32 %12, %4 br i1 %13, label %14, label %22 14: ; preds = %6 %15 = getelementptr inbounds %struct.ocfs2_extent_list, ptr %3, i64 0, i32 1 %16 = load ptr, ptr %15, align 8, !tbaa !11 %17 = sext i32 %4 to i64 %18 = getelementptr %struct.TYPE_10__, ptr %16, i64 %17 %19 = getelementptr %struct.TYPE_10__, ptr %18, i64 1 %20 = load i32, ptr %19, align 4, !tbaa !12 %21 = tail call i32 @le32_to_cpu(i32 noundef %20) #3 store i32 %21, ptr %5, align 4, !tbaa !14 br label %115 22: ; preds = %6 %23 = icmp eq ptr %2, null br i1 %23, label %28, label %24 24: ; preds = %22 %25 = getelementptr inbounds %struct.ocfs2_extent_block, ptr %2, i64 0, i32 1 %26 = load i32, ptr %25, align 8, !tbaa !15 %27 = icmp eq i32 %26, 0 br i1 %27, label %28, label %30 28: ; preds = %24, %22 %29 = load i32, ptr @UINT_MAX, align 4, !tbaa !14 store i32 %29, ptr %5, align 4, !tbaa !14 br label %115 30: ; preds = %24 %31 = call i32 @ocfs2_init_refcount_extent_tree(ptr noundef nonnull %8, ptr noundef %0, ptr noundef %1) #3 %32 = call ptr @ocfs2_new_path_from_et(ptr noundef nonnull %8) #3 %33 = icmp eq ptr %32, null br i1 %33, label %34, label %38 34: ; preds = %30 %35 = load i32, ptr @ENOMEM, align 4, !tbaa !14 %36 = sub nsw i32 0, %35 %37 = call i32 @mlog_errno(i32 noundef %36) #3 br label %110 38: ; preds = %30 %39 = load ptr, ptr %2, align 8, !tbaa !18 %40 = sext i32 %4 to i64 %41 = getelementptr inbounds %struct.TYPE_6__, ptr %39, i64 %40 %42 = load i32, ptr %41, align 4, !tbaa !19 %43 = call i32 @le32_to_cpu(i32 noundef %42) #3 store i32 %43, ptr %7, align 4, !tbaa !14 %44 = call i32 @ocfs2_find_path(ptr noundef %0, ptr noundef nonnull %32, i32 noundef %43) #3 %45 = icmp eq i32 %44, 0 br i1 %45, label %48, label %46 46: ; preds = %38 %47 = call i32 @mlog_errno(i32 noundef %44) #3 br label %110 48: ; preds = %38 %49 = call ptr @ocfs2_new_path_from_path(ptr noundef nonnull %32) #3 %50 = icmp eq ptr %49, null br i1 %50, label %51, label %55 51: ; preds = %48 %52 = load i32, ptr @ENOMEM, align 4, !tbaa !14 %53 = sub nsw i32 0, %52 %54 = call i32 @mlog_errno(i32 noundef %53) #3 br label %110 55: ; preds = %48 %56 = call i32 @ocfs2_find_cpos_for_right_leaf(ptr noundef %9, ptr noundef nonnull %32, ptr noundef nonnull %7) #3 %57 = icmp eq i32 %56, 0 br i1 %57, label %60, label %58 58: ; preds = %55 %59 = call i32 @mlog_errno(i32 noundef %56) #3 br label %110 60: ; preds = %55 %61 = load i32, ptr %7, align 4, !tbaa !14 %62 = call i32 @ocfs2_find_path(ptr noundef %0, ptr noundef nonnull %49, i32 noundef %61) #3 %63 = icmp eq i32 %62, 0 br i1 %63, label %66, label %64 64: ; preds = %60 %65 = call i32 @mlog_errno(i32 noundef %62) #3 br label %110 66: ; preds = %60 %67 = call i32 @ocfs2_find_subtree_root(ptr noundef nonnull %8, ptr noundef nonnull %32, ptr noundef nonnull %49) #3 %68 = load ptr, ptr %32, align 8, !tbaa !21 %69 = sext i32 %67 to i64 %70 = getelementptr inbounds %struct.TYPE_9__, ptr %68, i64 %69, i32 1 %71 = load ptr, ptr %70, align 8, !tbaa !23 %72 = getelementptr %struct.TYPE_9__, ptr %68, i64 %69 %73 = getelementptr %struct.TYPE_9__, ptr %72, i64 1 %74 = load ptr, ptr %73, align 8, !tbaa !25 %75 = load i64, ptr %74, align 8, !tbaa !26 %76 = load i32, ptr %71, align 8, !tbaa !5 %77 = call i32 @le16_to_cpu(i32 noundef %76) #3 %78 = icmp sgt i32 %77, 0 br i1 %78, label %79, label %103 79: ; preds = %66 %80 = getelementptr inbounds %struct.ocfs2_extent_list, ptr %71, i64 0, i32 1 br label %81 81: ; preds = %79, %95 %82 = phi i64 [ 0, %79 ], [ %96, %95 ] %83 = load ptr, ptr %80, align 8, !tbaa !11 %84 = getelementptr inbounds %struct.TYPE_10__, ptr %83, i64 %82, i32 1 %85 = load i32, ptr %84, align 4, !tbaa !29 %86 = call i64 @le64_to_cpu(i32 noundef %85) #3 %87 = icmp eq i64 %86, %75 br i1 %87, label %88, label %95 88: ; preds = %81 %89 = trunc i64 %82 to i32 %90 = load ptr, ptr %80, align 8, !tbaa !11 %91 = getelementptr %struct.TYPE_10__, ptr %90, i64 %82 %92 = getelementptr %struct.TYPE_10__, ptr %91, i64 1 %93 = load i32, ptr %92, align 4, !tbaa !12 %94 = call i32 @le32_to_cpu(i32 noundef %93) #3 store i32 %94, ptr %5, align 4, !tbaa !14 br label %103 95: ; preds = %81 %96 = add nuw nsw i64 %82, 1 %97 = load i32, ptr %71, align 8, !tbaa !5 %98 = call i32 @le16_to_cpu(i32 noundef %97) #3 %99 = sext i32 %98 to i64 %100 = icmp slt i64 %96, %99 br i1 %100, label %81, label %101, !llvm.loop !30 101: ; preds = %95 %102 = trunc i64 %96 to i32 br label %103 103: ; preds = %101, %66, %88 %104 = phi i32 [ %89, %88 ], [ 0, %66 ], [ %102, %101 ] %105 = load i32, ptr %71, align 8, !tbaa !5 %106 = call i32 @le16_to_cpu(i32 noundef %105) #3 %107 = icmp eq i32 %104, %106 %108 = zext i1 %107 to i32 %109 = call i32 @BUG_ON(i32 noundef %108) #3 br label %110 110: ; preds = %103, %64, %58, %51, %46, %34 %111 = phi i32 [ %44, %46 ], [ %56, %58 ], [ %62, %64 ], [ 0, %103 ], [ %53, %51 ], [ %36, %34 ] %112 = phi ptr [ null, %46 ], [ %49, %58 ], [ %49, %64 ], [ %49, %103 ], [ null, %51 ], [ null, %34 ] %113 = call i32 @ocfs2_free_path(ptr noundef %32) #3 %114 = call i32 @ocfs2_free_path(ptr noundef %112) #3 br label %115 115: ; preds = %110, %28, %14 %116 = phi i32 [ 0, %14 ], [ %111, %110 ], [ 0, %28 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3 ret i32 %116 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @ocfs2_metadata_cache_get_super(ptr noundef) local_unnamed_addr #2 declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2 declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #2 declare i32 @ocfs2_init_refcount_extent_tree(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @ocfs2_new_path_from_et(ptr noundef) local_unnamed_addr #2 declare i32 @mlog_errno(i32 noundef) local_unnamed_addr #2 declare i32 @ocfs2_find_path(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @ocfs2_new_path_from_path(ptr noundef) local_unnamed_addr #2 declare i32 @ocfs2_find_cpos_for_right_leaf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @ocfs2_find_subtree_root(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @le64_to_cpu(i32 noundef) local_unnamed_addr #2 declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2 declare i32 @ocfs2_free_path(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"ocfs2_extent_list", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !10, i64 8} !12 = !{!13, !7, i64 0} !13 = !{!"TYPE_10__", !7, i64 0, !7, i64 4} !14 = !{!7, !7, i64 0} !15 = !{!16, !7, i64 8} !16 = !{!"ocfs2_extent_block", !17, i64 0, !7, i64 8} !17 = !{!"TYPE_7__", !10, i64 0} !18 = !{!16, !10, i64 0} !19 = !{!20, !7, i64 0} !20 = !{!"TYPE_6__", !7, i64 0} !21 = !{!22, !10, i64 0} !22 = !{!"ocfs2_path", !10, i64 0} !23 = !{!24, !10, i64 8} !24 = !{!"TYPE_9__", !10, i64 0, !10, i64 8} !25 = !{!24, !10, i64 0} !26 = !{!27, !28, i64 0} !27 = !{!"TYPE_8__", !28, i64 0} !28 = !{!"long", !8, i64 0} !29 = !{!13, !7, i64 4} !30 = distinct !{!30, !31} !31 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/fs/ocfs2/extr_refcounttree.c_ocfs2_get_refcount_cpos_end.c' source_filename = "AnghaBench/linux/fs/ocfs2/extr_refcounttree.c_ocfs2_get_refcount_cpos_end.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.ocfs2_extent_tree = type { i32 } %struct.TYPE_10__ = type { i32, i32 } %struct.TYPE_6__ = type { i32 } %struct.TYPE_9__ = type { ptr, ptr } @UINT_MAX = common local_unnamed_addr global i32 0, align 4 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ocfs2_get_refcount_cpos_end], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ocfs2_get_refcount_cpos_end(ptr noundef %0, ptr noundef %1, ptr noundef readonly %2, ptr nocapture noundef readonly %3, i32 noundef %4, ptr nocapture noundef writeonly %5) #0 { %7 = alloca i32, align 4 %8 = alloca %struct.ocfs2_extent_tree, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3 %9 = tail call ptr @ocfs2_metadata_cache_get_super(ptr noundef %0) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3 %10 = load i32, ptr %3, align 8, !tbaa !6 %11 = tail call i32 @le16_to_cpu(i32 noundef %10) #3 %12 = add nsw i32 %11, -1 %13 = icmp sgt i32 %12, %4 br i1 %13, label %14, label %22 14: ; preds = %6 %15 = getelementptr inbounds i8, ptr %3, i64 8 %16 = load ptr, ptr %15, align 8, !tbaa !12 %17 = sext i32 %4 to i64 %18 = getelementptr %struct.TYPE_10__, ptr %16, i64 %17 %19 = getelementptr i8, ptr %18, i64 8 %20 = load i32, ptr %19, align 4, !tbaa !13 %21 = tail call i32 @le32_to_cpu(i32 noundef %20) #3 store i32 %21, ptr %5, align 4, !tbaa !15 br label %115 22: ; preds = %6 %23 = icmp eq ptr %2, null br i1 %23, label %28, label %24 24: ; preds = %22 %25 = getelementptr inbounds i8, ptr %2, i64 8 %26 = load i32, ptr %25, align 8, !tbaa !16 %27 = icmp eq i32 %26, 0 br i1 %27, label %28, label %30 28: ; preds = %24, %22 %29 = load i32, ptr @UINT_MAX, align 4, !tbaa !15 store i32 %29, ptr %5, align 4, !tbaa !15 br label %115 30: ; preds = %24 %31 = call i32 @ocfs2_init_refcount_extent_tree(ptr noundef nonnull %8, ptr noundef %0, ptr noundef %1) #3 %32 = call ptr @ocfs2_new_path_from_et(ptr noundef nonnull %8) #3 %33 = icmp eq ptr %32, null br i1 %33, label %34, label %38 34: ; preds = %30 %35 = load i32, ptr @ENOMEM, align 4, !tbaa !15 %36 = sub nsw i32 0, %35 %37 = call i32 @mlog_errno(i32 noundef %36) #3 br label %110 38: ; preds = %30 %39 = load ptr, ptr %2, align 8, !tbaa !19 %40 = sext i32 %4 to i64 %41 = getelementptr inbounds %struct.TYPE_6__, ptr %39, i64 %40 %42 = load i32, ptr %41, align 4, !tbaa !20 %43 = call i32 @le32_to_cpu(i32 noundef %42) #3 store i32 %43, ptr %7, align 4, !tbaa !15 %44 = call i32 @ocfs2_find_path(ptr noundef %0, ptr noundef nonnull %32, i32 noundef %43) #3 %45 = icmp eq i32 %44, 0 br i1 %45, label %48, label %46 46: ; preds = %38 %47 = call i32 @mlog_errno(i32 noundef %44) #3 br label %110 48: ; preds = %38 %49 = call ptr @ocfs2_new_path_from_path(ptr noundef nonnull %32) #3 %50 = icmp eq ptr %49, null br i1 %50, label %51, label %55 51: ; preds = %48 %52 = load i32, ptr @ENOMEM, align 4, !tbaa !15 %53 = sub nsw i32 0, %52 %54 = call i32 @mlog_errno(i32 noundef %53) #3 br label %110 55: ; preds = %48 %56 = call i32 @ocfs2_find_cpos_for_right_leaf(ptr noundef %9, ptr noundef nonnull %32, ptr noundef nonnull %7) #3 %57 = icmp eq i32 %56, 0 br i1 %57, label %60, label %58 58: ; preds = %55 %59 = call i32 @mlog_errno(i32 noundef %56) #3 br label %110 60: ; preds = %55 %61 = load i32, ptr %7, align 4, !tbaa !15 %62 = call i32 @ocfs2_find_path(ptr noundef %0, ptr noundef nonnull %49, i32 noundef %61) #3 %63 = icmp eq i32 %62, 0 br i1 %63, label %66, label %64 64: ; preds = %60 %65 = call i32 @mlog_errno(i32 noundef %62) #3 br label %110 66: ; preds = %60 %67 = call i32 @ocfs2_find_subtree_root(ptr noundef nonnull %8, ptr noundef nonnull %32, ptr noundef nonnull %49) #3 %68 = load ptr, ptr %32, align 8, !tbaa !22 %69 = sext i32 %67 to i64 %70 = getelementptr inbounds %struct.TYPE_9__, ptr %68, i64 %69, i32 1 %71 = load ptr, ptr %70, align 8, !tbaa !24 %72 = getelementptr %struct.TYPE_9__, ptr %68, i64 %69 %73 = getelementptr i8, ptr %72, i64 16 %74 = load ptr, ptr %73, align 8, !tbaa !26 %75 = load i64, ptr %74, align 8, !tbaa !27 %76 = load i32, ptr %71, align 8, !tbaa !6 %77 = call i32 @le16_to_cpu(i32 noundef %76) #3 %78 = icmp sgt i32 %77, 0 br i1 %78, label %79, label %103 79: ; preds = %66 %80 = getelementptr inbounds i8, ptr %71, i64 8 br label %81 81: ; preds = %79, %95 %82 = phi i64 [ 0, %79 ], [ %96, %95 ] %83 = load ptr, ptr %80, align 8, !tbaa !12 %84 = getelementptr inbounds %struct.TYPE_10__, ptr %83, i64 %82, i32 1 %85 = load i32, ptr %84, align 4, !tbaa !30 %86 = call i64 @le64_to_cpu(i32 noundef %85) #3 %87 = icmp eq i64 %86, %75 br i1 %87, label %88, label %95 88: ; preds = %81 %89 = trunc nuw nsw i64 %82 to i32 %90 = load ptr, ptr %80, align 8, !tbaa !12 %91 = getelementptr inbounds %struct.TYPE_10__, ptr %90, i64 %82 %92 = getelementptr inbounds i8, ptr %91, i64 8 %93 = load i32, ptr %92, align 4, !tbaa !13 %94 = call i32 @le32_to_cpu(i32 noundef %93) #3 store i32 %94, ptr %5, align 4, !tbaa !15 br label %103 95: ; preds = %81 %96 = add nuw nsw i64 %82, 1 %97 = load i32, ptr %71, align 8, !tbaa !6 %98 = call i32 @le16_to_cpu(i32 noundef %97) #3 %99 = sext i32 %98 to i64 %100 = icmp slt i64 %96, %99 br i1 %100, label %81, label %101, !llvm.loop !31 101: ; preds = %95 %102 = trunc nuw nsw i64 %96 to i32 br label %103 103: ; preds = %101, %66, %88 %104 = phi i32 [ %89, %88 ], [ 0, %66 ], [ %102, %101 ] %105 = load i32, ptr %71, align 8, !tbaa !6 %106 = call i32 @le16_to_cpu(i32 noundef %105) #3 %107 = icmp eq i32 %104, %106 %108 = zext i1 %107 to i32 %109 = call i32 @BUG_ON(i32 noundef %108) #3 br label %110 110: ; preds = %103, %64, %58, %51, %46, %34 %111 = phi i32 [ %44, %46 ], [ %56, %58 ], [ %62, %64 ], [ 0, %103 ], [ %53, %51 ], [ %36, %34 ] %112 = phi ptr [ null, %46 ], [ %49, %58 ], [ %49, %64 ], [ %49, %103 ], [ null, %51 ], [ null, %34 ] %113 = call i32 @ocfs2_free_path(ptr noundef %32) #3 %114 = call i32 @ocfs2_free_path(ptr noundef %112) #3 br label %115 115: ; preds = %110, %28, %14 %116 = phi i32 [ 0, %14 ], [ %111, %110 ], [ 0, %28 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3 ret i32 %116 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @ocfs2_metadata_cache_get_super(ptr noundef) local_unnamed_addr #2 declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2 declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #2 declare i32 @ocfs2_init_refcount_extent_tree(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @ocfs2_new_path_from_et(ptr noundef) local_unnamed_addr #2 declare i32 @mlog_errno(i32 noundef) local_unnamed_addr #2 declare i32 @ocfs2_find_path(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @ocfs2_new_path_from_path(ptr noundef) local_unnamed_addr #2 declare i32 @ocfs2_find_cpos_for_right_leaf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @ocfs2_find_subtree_root(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @le64_to_cpu(i32 noundef) local_unnamed_addr #2 declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2 declare i32 @ocfs2_free_path(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"ocfs2_extent_list", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !11, i64 8} !13 = !{!14, !8, i64 0} !14 = !{!"TYPE_10__", !8, i64 0, !8, i64 4} !15 = !{!8, !8, i64 0} !16 = !{!17, !8, i64 8} !17 = !{!"ocfs2_extent_block", !18, i64 0, !8, i64 8} !18 = !{!"TYPE_7__", !11, i64 0} !19 = !{!17, !11, i64 0} !20 = !{!21, !8, i64 0} !21 = !{!"TYPE_6__", !8, i64 0} !22 = !{!23, !11, i64 0} !23 = !{!"ocfs2_path", !11, i64 0} !24 = !{!25, !11, i64 8} !25 = !{!"TYPE_9__", !11, i64 0, !11, i64 8} !26 = !{!25, !11, i64 0} !27 = !{!28, !29, i64 0} !28 = !{!"TYPE_8__", !29, i64 0} !29 = !{!"long", !9, i64 0} !30 = !{!14, !8, i64 4} !31 = distinct !{!31, !32} !32 = !{!"llvm.loop.mustprogress"}
linux_fs_ocfs2_extr_refcounttree.c_ocfs2_get_refcount_cpos_end
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/serial/extr_m32r_sio.c_m32r_sio_stop_rx.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/serial/extr_m32r_sio.c_m32r_sio_stop_rx.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.uart_sio_port = type { i32, %struct.TYPE_2__ } %struct.TYPE_2__ = type { i32 } @UART_IER_RLSI = dso_local local_unnamed_addr global i32 0, align 4 @UART_LSR_DR = dso_local local_unnamed_addr global i32 0, align 4 @UART_IER = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @m32r_sio_stop_rx], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @m32r_sio_stop_rx(ptr noundef %0) #0 { %2 = load i32, ptr @UART_IER_RLSI, align 4, !tbaa !5 %3 = xor i32 %2, -1 %4 = load i32, ptr %0, align 4, !tbaa !9 %5 = and i32 %4, %3 store i32 %5, ptr %0, align 4, !tbaa !9 %6 = load i32, ptr @UART_LSR_DR, align 4, !tbaa !5 %7 = xor i32 %6, -1 %8 = getelementptr inbounds %struct.uart_sio_port, ptr %0, i64 0, i32 1 %9 = load i32, ptr %8, align 4, !tbaa !12 %10 = and i32 %9, %7 store i32 %10, ptr %8, align 4, !tbaa !12 %11 = load i32, ptr @UART_IER, align 4, !tbaa !5 %12 = tail call i32 @serial_out(ptr noundef nonnull %0, i32 noundef %11, i32 noundef %5) #2 ret void } declare i32 @serial_out(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"uart_sio_port", !6, i64 0, !11, i64 4} !11 = !{!"TYPE_2__", !6, i64 0} !12 = !{!10, !6, i64 4}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/serial/extr_m32r_sio.c_m32r_sio_stop_rx.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/serial/extr_m32r_sio.c_m32r_sio_stop_rx.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @UART_IER_RLSI = common local_unnamed_addr global i32 0, align 4 @UART_LSR_DR = common local_unnamed_addr global i32 0, align 4 @UART_IER = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @m32r_sio_stop_rx], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @m32r_sio_stop_rx(ptr noundef %0) #0 { %2 = load i32, ptr @UART_IER_RLSI, align 4, !tbaa !6 %3 = xor i32 %2, -1 %4 = load i32, ptr %0, align 4, !tbaa !10 %5 = and i32 %4, %3 store i32 %5, ptr %0, align 4, !tbaa !10 %6 = load i32, ptr @UART_LSR_DR, align 4, !tbaa !6 %7 = xor i32 %6, -1 %8 = getelementptr inbounds i8, ptr %0, i64 4 %9 = load i32, ptr %8, align 4, !tbaa !13 %10 = and i32 %9, %7 store i32 %10, ptr %8, align 4, !tbaa !13 %11 = load i32, ptr @UART_IER, align 4, !tbaa !6 %12 = tail call i32 @serial_out(ptr noundef nonnull %0, i32 noundef %11, i32 noundef %5) #2 ret void } declare i32 @serial_out(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"uart_sio_port", !7, i64 0, !12, i64 4} !12 = !{!"TYPE_2__", !7, i64 0} !13 = !{!11, !7, i64 4}
fastsocket_kernel_drivers_serial_extr_m32r_sio.c_m32r_sio_stop_rx
; ModuleID = 'AnghaBench/linux/arch/arm/mach-mmp/extr_pxa168.h_pxa168_add_uart.c' source_filename = "AnghaBench/linux/arch/arm/mach-mmp/extr_pxa168.h_pxa168_add_uart.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.pxa_device_desc = type { i32 } @pxa168_device_uart1 = dso_local global %struct.pxa_device_desc zeroinitializer, align 4 @pxa168_device_uart2 = dso_local global %struct.pxa_device_desc zeroinitializer, align 4 @pxa168_device_uart3 = dso_local global %struct.pxa_device_desc zeroinitializer, align 4 @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @pxa168_add_uart], section "llvm.metadata" @switch.table.pxa168_add_uart = private unnamed_addr constant [3 x ptr] [ptr @pxa168_device_uart1, ptr @pxa168_device_uart2, ptr @pxa168_device_uart3], align 8 ; Function Attrs: inlinehint nounwind uwtable define internal i32 @pxa168_add_uart(i32 noundef %0) #0 { %2 = add i32 %0, -1 %3 = icmp ult i32 %2, 3 br i1 %3, label %7, label %4 4: ; preds = %1 %5 = load i32, ptr @EINVAL, align 4, !tbaa !5 %6 = sub nsw i32 0, %5 br label %12 7: ; preds = %1 %8 = zext nneg i32 %2 to i64 %9 = getelementptr inbounds [3 x ptr], ptr @switch.table.pxa168_add_uart, i64 0, i64 %8 %10 = load ptr, ptr %9, align 8 %11 = tail call i32 @pxa_register_device(ptr noundef nonnull %10, ptr noundef null, i32 noundef 0) #2 br label %12 12: ; preds = %7, %4 %13 = phi i32 [ %6, %4 ], [ %11, %7 ] ret i32 %13 } declare i32 @pxa_register_device(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/arch/arm/mach-mmp/extr_pxa168.h_pxa168_add_uart.c' source_filename = "AnghaBench/linux/arch/arm/mach-mmp/extr_pxa168.h_pxa168_add_uart.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.pxa_device_desc = type { i32 } @pxa168_device_uart1 = common global %struct.pxa_device_desc zeroinitializer, align 4 @pxa168_device_uart2 = common global %struct.pxa_device_desc zeroinitializer, align 4 @pxa168_device_uart3 = common global %struct.pxa_device_desc zeroinitializer, align 4 @EINVAL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @pxa168_add_uart], section "llvm.metadata" @switch.table.pxa168_add_uart = private unnamed_addr constant [3 x ptr] [ptr @pxa168_device_uart1, ptr @pxa168_device_uart2, ptr @pxa168_device_uart3], align 8 ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal i32 @pxa168_add_uart(i32 noundef %0) #0 { %2 = add i32 %0, -1 %3 = icmp ult i32 %2, 3 br i1 %3, label %7, label %4 4: ; preds = %1 %5 = load i32, ptr @EINVAL, align 4, !tbaa !6 %6 = sub nsw i32 0, %5 br label %12 7: ; preds = %1 %8 = zext nneg i32 %2 to i64 %9 = getelementptr inbounds [3 x ptr], ptr @switch.table.pxa168_add_uart, i64 0, i64 %8 %10 = load ptr, ptr %9, align 8 %11 = tail call i32 @pxa_register_device(ptr noundef nonnull %10, ptr noundef null, i32 noundef 0) #2 br label %12 12: ; preds = %7, %4 %13 = phi i32 [ %6, %4 ], [ %11, %7 ] ret i32 %13 } declare i32 @pxa_register_device(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_arch_arm_mach-mmp_extr_pxa168.h_pxa168_add_uart
; ModuleID = 'AnghaBench/netdata/collectors/xenstat.plugin/extr_....libnetdatainlined.h_str2l.c' source_filename = "AnghaBench/netdata/collectors/xenstat.plugin/extr_....libnetdatainlined.h_str2l.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @str2l], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal i64 @str2l(ptr nocapture noundef readonly %0) #0 { %2 = load i8, ptr %0, align 1, !tbaa !5 %3 = icmp eq i8 %2, 45 br i1 %3, label %4, label %7 4: ; preds = %1 %5 = getelementptr inbounds i8, ptr %0, i64 1 %6 = load i8, ptr %5, align 1, !tbaa !5 br label %7 7: ; preds = %1, %4 %8 = phi ptr [ %5, %4 ], [ %0, %1 ] %9 = phi i8 [ %6, %4 ], [ %2, %1 ] %10 = add i8 %9, -48 %11 = icmp ult i8 %10, 10 br i1 %11, label %12, label %24 12: ; preds = %7, %12 %13 = phi i8 [ %21, %12 ], [ %9, %7 ] %14 = phi i64 [ %19, %12 ], [ 0, %7 ] %15 = phi ptr [ %20, %12 ], [ %8, %7 ] %16 = mul nsw i64 %14, 10 %17 = and i8 %13, 15 %18 = zext nneg i8 %17 to i64 %19 = add nsw i64 %16, %18 %20 = getelementptr inbounds i8, ptr %15, i64 1 %21 = load i8, ptr %20, align 1, !tbaa !5 %22 = add i8 %21, -48 %23 = icmp ult i8 %22, 10 br i1 %23, label %12, label %24, !llvm.loop !8 24: ; preds = %12, %7 %25 = phi i64 [ 0, %7 ], [ %19, %12 ] %26 = zext i1 %3 to i8 %27 = tail call i64 @unlikely(i8 noundef signext %26) #2 %28 = icmp eq i64 %27, 0 %29 = sub nsw i64 0, %25 %30 = select i1 %28, i64 %25, i64 %29 ret i64 %30 } declare i64 @unlikely(i8 noundef signext) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"omnipotent char", !7, i64 0} !7 = !{!"Simple C/C++ TBAA"} !8 = distinct !{!8, !9} !9 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/netdata/collectors/xenstat.plugin/extr_....libnetdatainlined.h_str2l.c' source_filename = "AnghaBench/netdata/collectors/xenstat.plugin/extr_....libnetdatainlined.h_str2l.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @str2l], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal i64 @str2l(ptr nocapture noundef readonly %0) #0 { %2 = load i8, ptr %0, align 1, !tbaa !6 %3 = icmp eq i8 %2, 45 br i1 %3, label %4, label %7 4: ; preds = %1 %5 = getelementptr inbounds i8, ptr %0, i64 1 %6 = load i8, ptr %5, align 1, !tbaa !6 br label %7 7: ; preds = %1, %4 %8 = phi ptr [ %5, %4 ], [ %0, %1 ] %9 = phi i8 [ %6, %4 ], [ %2, %1 ] %10 = add i8 %9, -48 %11 = icmp ult i8 %10, 10 br i1 %11, label %12, label %24 12: ; preds = %7, %12 %13 = phi i8 [ %21, %12 ], [ %9, %7 ] %14 = phi i64 [ %19, %12 ], [ 0, %7 ] %15 = phi ptr [ %20, %12 ], [ %8, %7 ] %16 = mul nsw i64 %14, 10 %17 = and i8 %13, 15 %18 = zext nneg i8 %17 to i64 %19 = add nsw i64 %16, %18 %20 = getelementptr inbounds i8, ptr %15, i64 1 %21 = load i8, ptr %20, align 1, !tbaa !6 %22 = add i8 %21, -48 %23 = icmp ult i8 %22, 10 br i1 %23, label %12, label %24, !llvm.loop !9 24: ; preds = %12, %7 %25 = phi i64 [ 0, %7 ], [ %19, %12 ] %26 = zext i1 %3 to i8 %27 = tail call i64 @unlikely(i8 noundef signext %26) #2 %28 = icmp eq i64 %27, 0 %29 = sub nsw i64 0, %25 %30 = select i1 %28, i64 %25, i64 %29 ret i64 %30 } declare i64 @unlikely(i8 noundef signext) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = distinct !{!9, !10} !10 = !{!"llvm.loop.mustprogress"}
netdata_collectors_xenstat.plugin_extr_....libnetdatainlined.h_str2l
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/i386/extr_machine_routines.c_ml_gpu_stat_update.c' source_filename = "AnghaBench/darwin-xnu/osfmk/i386/extr_machine_routines.c_ml_gpu_stat_update.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local void @ml_gpu_stat_update(i64 noundef %0) local_unnamed_addr #0 { %2 = tail call ptr (...) @current_thread() #2 %3 = load i32, ptr %2, align 4, !tbaa !5 %4 = trunc i64 %0 to i32 %5 = add i32 %3, %4 store i32 %5, ptr %2, align 4, !tbaa !5 ret void } declare ptr @current_thread(...) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"TYPE_4__", !7, i64 0} !7 = !{!"TYPE_3__", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/i386/extr_machine_routines.c_ml_gpu_stat_update.c' source_filename = "AnghaBench/darwin-xnu/osfmk/i386/extr_machine_routines.c_ml_gpu_stat_update.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @ml_gpu_stat_update(i64 noundef %0) local_unnamed_addr #0 { %2 = tail call ptr @current_thread() #2 %3 = load i32, ptr %2, align 4, !tbaa !6 %4 = trunc i64 %0 to i32 %5 = add i32 %3, %4 store i32 %5, ptr %2, align 4, !tbaa !6 ret void } declare ptr @current_thread(...) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"TYPE_3__", !9, i64 0} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"}
darwin-xnu_osfmk_i386_extr_machine_routines.c_ml_gpu_stat_update
; ModuleID = 'AnghaBench/wcdb/android/sqlcipher/extr_sqlite3.c_sqlite3_set_last_insert_rowid.c' source_filename = "AnghaBench/wcdb/android/sqlcipher/extr_sqlite3.c_sqlite3_set_last_insert_rowid.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { i32, i32 } @SQLITE_MISUSE_BKPT = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @sqlite3_set_last_insert_rowid(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = load i32, ptr %0, align 4, !tbaa !5 %4 = tail call i32 @sqlite3_mutex_enter(i32 noundef %3) #2 %5 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1 store i32 %1, ptr %5, align 4, !tbaa !10 %6 = load i32, ptr %0, align 4, !tbaa !5 %7 = tail call i32 @sqlite3_mutex_leave(i32 noundef %6) #2 ret void } declare i32 @sqlite3_mutex_enter(i32 noundef) local_unnamed_addr #1 declare i32 @sqlite3_mutex_leave(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_4__", !7, i64 0, !7, i64 4} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!6, !7, i64 4}
; ModuleID = 'AnghaBench/wcdb/android/sqlcipher/extr_sqlite3.c_sqlite3_set_last_insert_rowid.c' source_filename = "AnghaBench/wcdb/android/sqlcipher/extr_sqlite3.c_sqlite3_set_last_insert_rowid.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SQLITE_MISUSE_BKPT = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @sqlite3_set_last_insert_rowid(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = load i32, ptr %0, align 4, !tbaa !6 %4 = tail call i32 @sqlite3_mutex_enter(i32 noundef %3) #2 %5 = getelementptr inbounds i8, ptr %0, i64 4 store i32 %1, ptr %5, align 4, !tbaa !11 %6 = load i32, ptr %0, align 4, !tbaa !6 %7 = tail call i32 @sqlite3_mutex_leave(i32 noundef %6) #2 ret void } declare i32 @sqlite3_mutex_enter(i32 noundef) local_unnamed_addr #1 declare i32 @sqlite3_mutex_leave(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!7, !8, i64 4}
wcdb_android_sqlcipher_extr_sqlite3.c_sqlite3_set_last_insert_rowid
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/extr_msm_gem.c_msm_gem_get_vaddr_active.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/extr_msm_gem.c_msm_gem_get_vaddr_active.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @__MSM_MADV_PURGED = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local ptr @msm_gem_get_vaddr_active(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @__MSM_MADV_PURGED, align 4, !tbaa !5 %3 = tail call ptr @get_vaddr(ptr noundef %0, i32 noundef %2) #2 ret ptr %3 } declare ptr @get_vaddr(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/extr_msm_gem.c_msm_gem_get_vaddr_active.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/extr_msm_gem.c_msm_gem_get_vaddr_active.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @__MSM_MADV_PURGED = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @msm_gem_get_vaddr_active(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @__MSM_MADV_PURGED, align 4, !tbaa !6 %3 = tail call ptr @get_vaddr(ptr noundef %0, i32 noundef %2) #2 ret ptr %3 } declare ptr @get_vaddr(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_gpu_drm_msm_extr_msm_gem.c_msm_gem_get_vaddr_active
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/converter/ibm_terminal/keymaps/priyadi/extr_keymap.c_matrix_init_user.c' source_filename = "AnghaBench/qmk_firmware/keyboards/converter/ibm_terminal/keymaps/priyadi/extr_keymap.c_matrix_init_user.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @UC_LNX = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @matrix_init_user() local_unnamed_addr #0 { %1 = load i32, ptr @UC_LNX, align 4, !tbaa !5 %2 = tail call i32 @set_unicode_input_mode(i32 noundef %1) #2 ret void } declare i32 @set_unicode_input_mode(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/converter/ibm_terminal/keymaps/priyadi/extr_keymap.c_matrix_init_user.c' source_filename = "AnghaBench/qmk_firmware/keyboards/converter/ibm_terminal/keymaps/priyadi/extr_keymap.c_matrix_init_user.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @UC_LNX = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @matrix_init_user() local_unnamed_addr #0 { %1 = load i32, ptr @UC_LNX, align 4, !tbaa !6 %2 = tail call i32 @set_unicode_input_mode(i32 noundef %1) #2 ret void } declare i32 @set_unicode_input_mode(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
qmk_firmware_keyboards_converter_ibm_terminal_keymaps_priyadi_extr_keymap.c_matrix_init_user
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/svn/extr_props.c_force_prop_option_message.c' source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/svn/extr_props.c_force_prop_option_message.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [40 x i8] c"Use '--force' to set the '%s' property.\00", align 1 @.str.1 = private unnamed_addr constant [41 x i8] c"Use '--force' to edit the '%s' property.\00", align 1 @.str.2 = private unnamed_addr constant [41 x i8] c"Use '--force' to use the '%s' property'.\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @force_prop_option_message], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal ptr @force_prop_option_message(i32 noundef %0, ptr noundef %1, ptr noundef %2) #0 { %4 = icmp eq i32 %0, 130 %5 = select i1 %4, ptr @.str.1, ptr @.str.2 %6 = icmp eq i32 %0, 129 %7 = select i1 %6, ptr @.str, ptr %5 %8 = tail call i32 @_(ptr noundef nonnull %7) #2 %9 = tail call ptr @apr_psprintf(ptr noundef %2, i32 noundef %8, ptr noundef %1) #2 ret ptr %9 } declare ptr @apr_psprintf(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @_(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/svn/extr_props.c_force_prop_option_message.c' source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/svn/extr_props.c_force_prop_option_message.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [40 x i8] c"Use '--force' to set the '%s' property.\00", align 1 @.str.1 = private unnamed_addr constant [41 x i8] c"Use '--force' to edit the '%s' property.\00", align 1 @.str.2 = private unnamed_addr constant [41 x i8] c"Use '--force' to use the '%s' property'.\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @force_prop_option_message], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal ptr @force_prop_option_message(i32 noundef %0, ptr noundef %1, ptr noundef %2) #0 { %4 = icmp eq i32 %0, 130 %5 = select i1 %4, ptr @.str.1, ptr @.str.2 %6 = icmp eq i32 %0, 129 %7 = select i1 %6, ptr @.str, ptr %5 %8 = tail call i32 @_(ptr noundef nonnull %7) #2 %9 = tail call ptr @apr_psprintf(ptr noundef %2, i32 noundef %8, ptr noundef %1) #2 ret ptr %9 } declare ptr @apr_psprintf(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @_(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
freebsd_contrib_subversion_subversion_svn_extr_props.c_force_prop_option_message
; ModuleID = 'AnghaBench/linux/drivers/mtd/spi-nor/extr_intel-spi.c_intel_spi_is_protected.c' source_filename = "AnghaBench/linux/drivers/mtd/spi-nor/extr_intel-spi.c_intel_spi_is_protected.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.intel_spi = type { i32, i64 } @PR_WPE = dso_local local_unnamed_addr global i32 0, align 4 @PR_RPE = dso_local local_unnamed_addr global i32 0, align 4 @PR_LIMIT_MASK = dso_local local_unnamed_addr global i32 0, align 4 @PR_LIMIT_SHIFT = dso_local local_unnamed_addr global i32 0, align 4 @PR_BASE_MASK = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @intel_spi_is_protected], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @intel_spi_is_protected(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 { %4 = load i32, ptr %0, align 8, !tbaa !5 %5 = icmp sgt i32 %4, 0 br i1 %5, label %6, label %33 6: ; preds = %3 %7 = getelementptr inbounds %struct.intel_spi, ptr %0, i64 0, i32 1 br label %8 8: ; preds = %6, %29 %9 = phi i32 [ 0, %6 ], [ %30, %29 ] %10 = load i64, ptr %7, align 8, !tbaa !11 %11 = tail call i64 @PR(i32 noundef %9) #2 %12 = add nsw i64 %11, %10 %13 = tail call i32 @readl(i64 noundef %12) #2 %14 = load i32, ptr @PR_WPE, align 4, !tbaa !12 %15 = load i32, ptr @PR_RPE, align 4, !tbaa !12 %16 = or i32 %15, %14 %17 = and i32 %16, %13 %18 = icmp eq i32 %17, 0 br i1 %18, label %29, label %19 19: ; preds = %8 %20 = load i32, ptr @PR_BASE_MASK, align 4, !tbaa !12 %21 = and i32 %20, %13 %22 = icmp ult i32 %21, %1 br i1 %22, label %29, label %23 23: ; preds = %19 %24 = load i32, ptr @PR_LIMIT_MASK, align 4, !tbaa !12 %25 = and i32 %24, %13 %26 = load i32, ptr @PR_LIMIT_SHIFT, align 4, !tbaa !12 %27 = lshr i32 %25, %26 %28 = icmp ugt i32 %27, %2 br i1 %28, label %29, label %33 29: ; preds = %19, %23, %8 %30 = add nuw nsw i32 %9, 1 %31 = load i32, ptr %0, align 8, !tbaa !5 %32 = icmp slt i32 %30, %31 br i1 %32, label %8, label %33, !llvm.loop !13 33: ; preds = %29, %23, %3 %34 = phi i32 [ 0, %3 ], [ 1, %23 ], [ 0, %29 ] ret i32 %34 } declare i32 @readl(i64 noundef) local_unnamed_addr #1 declare i64 @PR(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"intel_spi", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!6, !10, i64 8} !12 = !{!7, !7, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/drivers/mtd/spi-nor/extr_intel-spi.c_intel_spi_is_protected.c' source_filename = "AnghaBench/linux/drivers/mtd/spi-nor/extr_intel-spi.c_intel_spi_is_protected.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @PR_WPE = common local_unnamed_addr global i32 0, align 4 @PR_RPE = common local_unnamed_addr global i32 0, align 4 @PR_LIMIT_MASK = common local_unnamed_addr global i32 0, align 4 @PR_LIMIT_SHIFT = common local_unnamed_addr global i32 0, align 4 @PR_BASE_MASK = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @intel_spi_is_protected], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef i32 @intel_spi_is_protected(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 { %4 = load i32, ptr %0, align 8, !tbaa !6 %5 = icmp sgt i32 %4, 0 br i1 %5, label %6, label %33 6: ; preds = %3 %7 = getelementptr inbounds i8, ptr %0, i64 8 br label %8 8: ; preds = %6, %29 %9 = phi i32 [ 0, %6 ], [ %30, %29 ] %10 = load i64, ptr %7, align 8, !tbaa !12 %11 = tail call i64 @PR(i32 noundef %9) #2 %12 = add nsw i64 %11, %10 %13 = tail call i32 @readl(i64 noundef %12) #2 %14 = load i32, ptr @PR_WPE, align 4, !tbaa !13 %15 = load i32, ptr @PR_RPE, align 4, !tbaa !13 %16 = or i32 %15, %14 %17 = and i32 %16, %13 %18 = icmp eq i32 %17, 0 br i1 %18, label %29, label %19 19: ; preds = %8 %20 = load i32, ptr @PR_BASE_MASK, align 4, !tbaa !13 %21 = and i32 %20, %13 %22 = icmp ult i32 %21, %1 br i1 %22, label %29, label %23 23: ; preds = %19 %24 = load i32, ptr @PR_LIMIT_MASK, align 4, !tbaa !13 %25 = and i32 %24, %13 %26 = load i32, ptr @PR_LIMIT_SHIFT, align 4, !tbaa !13 %27 = lshr i32 %25, %26 %28 = icmp ugt i32 %27, %2 br i1 %28, label %29, label %33 29: ; preds = %19, %23, %8 %30 = add nuw nsw i32 %9, 1 %31 = load i32, ptr %0, align 8, !tbaa !6 %32 = icmp slt i32 %30, %31 br i1 %32, label %8, label %33, !llvm.loop !14 33: ; preds = %29, %23, %3 %34 = phi i32 [ 0, %3 ], [ 1, %23 ], [ 0, %29 ] ret i32 %34 } declare i32 @readl(i64 noundef) local_unnamed_addr #1 declare i64 @PR(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"intel_spi", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!7, !11, i64 8} !13 = !{!8, !8, i64 0} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"}
linux_drivers_mtd_spi-nor_extr_intel-spi.c_intel_spi_is_protected
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_adv7170.c_adv7170_write.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_adv7170.c_adv7170_write.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @adv7170_write], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal i32 @adv7170_write(ptr noundef %0, i64 noundef %1, i64 noundef %2) #0 { %4 = tail call ptr @v4l2_get_subdevdata(ptr noundef %0) #2 %5 = tail call ptr @to_adv7170(ptr noundef %0) #2 %6 = load ptr, ptr %5, align 8, !tbaa !5 %7 = getelementptr inbounds i64, ptr %6, i64 %1 store i64 %2, ptr %7, align 8, !tbaa !10 %8 = tail call i32 @i2c_smbus_write_byte_data(ptr noundef %4, i64 noundef %1, i64 noundef %2) #2 ret i32 %8 } declare ptr @v4l2_get_subdevdata(ptr noundef) local_unnamed_addr #1 declare ptr @to_adv7170(ptr noundef) local_unnamed_addr #1 declare i32 @i2c_smbus_write_byte_data(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"adv7170", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"long", !8, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_adv7170.c_adv7170_write.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_adv7170.c_adv7170_write.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @adv7170_write], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal i32 @adv7170_write(ptr noundef %0, i64 noundef %1, i64 noundef %2) #0 { %4 = tail call ptr @v4l2_get_subdevdata(ptr noundef %0) #2 %5 = tail call ptr @to_adv7170(ptr noundef %0) #2 %6 = load ptr, ptr %5, align 8, !tbaa !6 %7 = getelementptr inbounds i64, ptr %6, i64 %1 store i64 %2, ptr %7, align 8, !tbaa !11 %8 = tail call i32 @i2c_smbus_write_byte_data(ptr noundef %4, i64 noundef %1, i64 noundef %2) #2 ret i32 %8 } declare ptr @v4l2_get_subdevdata(ptr noundef) local_unnamed_addr #1 declare ptr @to_adv7170(ptr noundef) local_unnamed_addr #1 declare i32 @i2c_smbus_write_byte_data(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"adv7170", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"long", !9, i64 0}
fastsocket_kernel_drivers_media_video_extr_adv7170.c_adv7170_write
; ModuleID = 'AnghaBench/libsodium/src/libsodium/crypto_box/curve25519xsalsa20poly1305/extr_box_curve25519xsalsa20poly1305.c_crypto_box_curve25519xsalsa20poly1305_seedbytes.c' source_filename = "AnghaBench/libsodium/src/libsodium/crypto_box/curve25519xsalsa20poly1305/extr_box_curve25519xsalsa20poly1305.c_crypto_box_curve25519xsalsa20poly1305_seedbytes.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @crypto_box_curve25519xsalsa20poly1305_SEEDBYTES = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable define dso_local i64 @crypto_box_curve25519xsalsa20poly1305_seedbytes() local_unnamed_addr #0 { %1 = load i64, ptr @crypto_box_curve25519xsalsa20poly1305_SEEDBYTES, align 8, !tbaa !5 ret i64 %1 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/libsodium/src/libsodium/crypto_box/curve25519xsalsa20poly1305/extr_box_curve25519xsalsa20poly1305.c_crypto_box_curve25519xsalsa20poly1305_seedbytes.c' source_filename = "AnghaBench/libsodium/src/libsodium/crypto_box/curve25519xsalsa20poly1305/extr_box_curve25519xsalsa20poly1305.c_crypto_box_curve25519xsalsa20poly1305_seedbytes.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @crypto_box_curve25519xsalsa20poly1305_SEEDBYTES = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) define i64 @crypto_box_curve25519xsalsa20poly1305_seedbytes() local_unnamed_addr #0 { %1 = load i64, ptr @crypto_box_curve25519xsalsa20poly1305_SEEDBYTES, align 8, !tbaa !6 ret i64 %1 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
libsodium_src_libsodium_crypto_box_curve25519xsalsa20poly1305_extr_box_curve25519xsalsa20poly1305.c_crypto_box_curve25519xsalsa20poly1305_seedbytes
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx_gmu.h_gmu_write.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx_gmu.h_gmu_write.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @gmu_write], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal void @gmu_write(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 { %4 = load i64, ptr %0, align 8, !tbaa !5 %5 = shl i32 %1, 2 %6 = sext i32 %5 to i64 %7 = add nsw i64 %4, %6 tail call void @msm_writel(i32 noundef %2, i64 noundef %7) #2 ret void } declare void @msm_writel(i32 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"a6xx_gmu", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx_gmu.h_gmu_write.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx_gmu.h_gmu_write.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @gmu_write], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal void @gmu_write(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 { %4 = load i64, ptr %0, align 8, !tbaa !6 %5 = shl i32 %1, 2 %6 = sext i32 %5 to i64 %7 = add nsw i64 %4, %6 tail call void @msm_writel(i32 noundef %2, i64 noundef %7) #2 ret void } declare void @msm_writel(i32 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"a6xx_gmu", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
linux_drivers_gpu_drm_msm_adreno_extr_a6xx_gmu.h_gmu_write
; ModuleID = 'AnghaBench/freebsd/usr.bin/sort/extr_file.c_shrink_file_list.c' source_filename = "AnghaBench/freebsd/usr.bin/sort/extr_file.c_shrink_file_list.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.file_list = type { i64, i32, i32, ptr } @max_open_files = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @shrink_file_list], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @shrink_file_list(ptr noundef %0) #0 { %2 = alloca %struct.file_list, align 8 %3 = icmp eq ptr %0, null br i1 %3, label %54, label %4 4: ; preds = %1 %5 = load i64, ptr %0, align 8, !tbaa !5 %6 = load i64, ptr @max_open_files, align 8, !tbaa !12 %7 = icmp ult i64 %5, %6 br i1 %7, label %54, label %8 8: ; preds = %4 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3 %9 = call i32 @file_list_init(ptr noundef nonnull %2, i32 noundef 1) #3 %10 = load i64, ptr %0, align 8, !tbaa !5 %11 = icmp eq i64 %10, 0 br i1 %11, label %45, label %12 12: ; preds = %8 %13 = getelementptr inbounds %struct.file_list, ptr %0, i64 0, i32 3 %14 = getelementptr inbounds %struct.file_list, ptr %0, i64 0, i32 1 br label %15 15: ; preds = %12, %40 %16 = phi i64 [ %10, %12 ], [ %43, %40 ] %17 = phi i64 [ 0, %12 ], [ %42, %40 ] %18 = sub i64 %16, %17 %19 = call ptr (...) @new_tmp_file_name() #3 %20 = load i64, ptr @max_open_files, align 8, !tbaa !12 %21 = icmp ult i64 %18, %20 %22 = add i64 %20, -1 %23 = select i1 %21, i64 %18, i64 %22 %24 = load ptr, ptr %13, align 8, !tbaa !13 %25 = getelementptr inbounds i32, ptr %24, i64 %17 %26 = call i32 @merge_files_array(i64 noundef %23, ptr noundef %25, ptr noundef %19) #3 %27 = load i32, ptr %14, align 8, !tbaa !14 %28 = icmp ne i32 %27, 0 %29 = icmp ne i64 %23, 0 %30 = and i1 %28, %29 br i1 %30, label %31, label %40 31: ; preds = %15, %31 %32 = phi i64 [ %38, %31 ], [ 0, %15 ] %33 = load ptr, ptr %13, align 8, !tbaa !13 %34 = getelementptr i32, ptr %33, i64 %17 %35 = getelementptr i32, ptr %34, i64 %32 %36 = load i32, ptr %35, align 4, !tbaa !15 %37 = call i32 @unlink(i32 noundef %36) #3 %38 = add nuw i64 %32, 1 %39 = icmp eq i64 %38, %23 br i1 %39, label %40, label %31, !llvm.loop !16 40: ; preds = %31, %15 %41 = call i32 @file_list_add(ptr noundef nonnull %2, ptr noundef %19, i32 noundef 0) #3 %42 = add i64 %23, %17 %43 = load i64, ptr %0, align 8, !tbaa !5 %44 = icmp ult i64 %42, %43 br i1 %44, label %15, label %45, !llvm.loop !18 45: ; preds = %40, %8 %46 = getelementptr inbounds %struct.file_list, ptr %0, i64 0, i32 1 store i32 0, ptr %46, align 8, !tbaa !14 %47 = call i32 @file_list_clean(ptr noundef nonnull %0) #3 %48 = load i64, ptr %2, align 8, !tbaa !5 store i64 %48, ptr %0, align 8, !tbaa !5 %49 = getelementptr inbounds %struct.file_list, ptr %2, i64 0, i32 3 %50 = load ptr, ptr %49, align 8, !tbaa !13 %51 = getelementptr inbounds %struct.file_list, ptr %0, i64 0, i32 3 store ptr %50, ptr %51, align 8, !tbaa !13 %52 = getelementptr inbounds %struct.file_list, ptr %2, i64 0, i32 1 %53 = load <2 x i32>, ptr %52, align 8, !tbaa !15 store <2 x i32> %53, ptr %46, align 8, !tbaa !15 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3 br label %54 54: ; preds = %1, %4, %45 %55 = phi i32 [ 1, %45 ], [ 0, %4 ], [ 0, %1 ] ret i32 %55 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @file_list_init(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @new_tmp_file_name(...) local_unnamed_addr #2 declare i32 @merge_files_array(i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @unlink(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @file_list_add(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @file_list_clean(ptr noundef) local_unnamed_addr #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"file_list", !7, i64 0, !10, i64 8, !10, i64 12, !11, i64 16} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!7, !7, i64 0} !13 = !{!6, !11, i64 16} !14 = !{!6, !10, i64 8} !15 = !{!10, !10, i64 0} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"} !18 = distinct !{!18, !17}
; ModuleID = 'AnghaBench/freebsd/usr.bin/sort/extr_file.c_shrink_file_list.c' source_filename = "AnghaBench/freebsd/usr.bin/sort/extr_file.c_shrink_file_list.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.file_list = type { i64, i32, i32, ptr } @max_open_files = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @shrink_file_list], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @shrink_file_list(ptr noundef %0) #0 { %2 = alloca %struct.file_list, align 8 %3 = icmp eq ptr %0, null br i1 %3, label %54, label %4 4: ; preds = %1 %5 = load i64, ptr %0, align 8, !tbaa !6 %6 = load i64, ptr @max_open_files, align 8, !tbaa !13 %7 = icmp ult i64 %5, %6 br i1 %7, label %54, label %8 8: ; preds = %4 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3 %9 = call i32 @file_list_init(ptr noundef nonnull %2, i32 noundef 1) #3 %10 = load i64, ptr %0, align 8, !tbaa !6 %11 = icmp eq i64 %10, 0 br i1 %11, label %45, label %12 12: ; preds = %8 %13 = getelementptr inbounds i8, ptr %0, i64 16 %14 = getelementptr inbounds i8, ptr %0, i64 8 br label %15 15: ; preds = %12, %40 %16 = phi i64 [ %10, %12 ], [ %43, %40 ] %17 = phi i64 [ 0, %12 ], [ %42, %40 ] %18 = sub i64 %16, %17 %19 = call ptr @new_tmp_file_name() #3 %20 = load i64, ptr @max_open_files, align 8, !tbaa !13 %21 = icmp ult i64 %18, %20 %22 = add i64 %20, -1 %23 = select i1 %21, i64 %18, i64 %22 %24 = load ptr, ptr %13, align 8, !tbaa !14 %25 = getelementptr inbounds i32, ptr %24, i64 %17 %26 = call i32 @merge_files_array(i64 noundef %23, ptr noundef %25, ptr noundef %19) #3 %27 = load i32, ptr %14, align 8, !tbaa !15 %28 = icmp ne i32 %27, 0 %29 = icmp ne i64 %23, 0 %30 = and i1 %28, %29 br i1 %30, label %31, label %40 31: ; preds = %15, %31 %32 = phi i64 [ %38, %31 ], [ 0, %15 ] %33 = load ptr, ptr %13, align 8, !tbaa !14 %34 = getelementptr i32, ptr %33, i64 %17 %35 = getelementptr i32, ptr %34, i64 %32 %36 = load i32, ptr %35, align 4, !tbaa !16 %37 = call i32 @unlink(i32 noundef %36) #3 %38 = add nuw i64 %32, 1 %39 = icmp eq i64 %38, %23 br i1 %39, label %40, label %31, !llvm.loop !17 40: ; preds = %31, %15 %41 = call i32 @file_list_add(ptr noundef nonnull %2, ptr noundef %19, i32 noundef 0) #3 %42 = add i64 %23, %17 %43 = load i64, ptr %0, align 8, !tbaa !6 %44 = icmp ult i64 %42, %43 br i1 %44, label %15, label %45, !llvm.loop !19 45: ; preds = %40, %8 %46 = getelementptr inbounds i8, ptr %0, i64 8 store i32 0, ptr %46, align 8, !tbaa !15 %47 = call i32 @file_list_clean(ptr noundef nonnull %0) #3 %48 = load i64, ptr %2, align 8, !tbaa !6 store i64 %48, ptr %0, align 8, !tbaa !6 %49 = getelementptr inbounds i8, ptr %2, i64 16 %50 = load ptr, ptr %49, align 8, !tbaa !14 %51 = getelementptr inbounds i8, ptr %0, i64 16 store ptr %50, ptr %51, align 8, !tbaa !14 %52 = getelementptr inbounds i8, ptr %2, i64 8 %53 = load <2 x i32>, ptr %52, align 8, !tbaa !16 store <2 x i32> %53, ptr %46, align 8, !tbaa !16 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3 br label %54 54: ; preds = %1, %4, %45 %55 = phi i32 [ 1, %45 ], [ 0, %4 ], [ 0, %1 ] ret i32 %55 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @file_list_init(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @new_tmp_file_name(...) local_unnamed_addr #2 declare i32 @merge_files_array(i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @unlink(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @file_list_add(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @file_list_clean(ptr noundef) local_unnamed_addr #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"file_list", !8, i64 0, !11, i64 8, !11, i64 12, !12, i64 16} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!"any pointer", !9, i64 0} !13 = !{!8, !8, i64 0} !14 = !{!7, !12, i64 16} !15 = !{!7, !11, i64 8} !16 = !{!11, !11, i64 0} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"} !19 = distinct !{!19, !18}
freebsd_usr.bin_sort_extr_file.c_shrink_file_list
; ModuleID = 'AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_mbx.c_ixgbe_check_for_bit_pf.c' source_filename = "AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_mbx.c_ixgbe_check_for_bit_pf.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @IXGBE_ERR_MBX = dso_local local_unnamed_addr global i32 0, align 4 @IXGBE_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ixgbe_check_for_bit_pf], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ixgbe_check_for_bit_pf(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 { %4 = tail call i32 @IXGBE_MBVFICR(i32 noundef %2) #2 %5 = tail call i32 @IXGBE_READ_REG(ptr noundef %0, i32 noundef %4) #2 %6 = load i32, ptr @IXGBE_ERR_MBX, align 4, !tbaa !5 %7 = and i32 %5, %1 %8 = icmp eq i32 %7, 0 br i1 %8, label %13, label %9 9: ; preds = %3 %10 = load i32, ptr @IXGBE_SUCCESS, align 4, !tbaa !5 %11 = tail call i32 @IXGBE_MBVFICR(i32 noundef %2) #2 %12 = tail call i32 @IXGBE_WRITE_REG(ptr noundef %0, i32 noundef %11, i32 noundef %1) #2 br label %13 13: ; preds = %9, %3 %14 = phi i32 [ %10, %9 ], [ %6, %3 ] ret i32 %14 } declare i32 @IXGBE_READ_REG(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @IXGBE_MBVFICR(i32 noundef) local_unnamed_addr #1 declare i32 @IXGBE_WRITE_REG(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_mbx.c_ixgbe_check_for_bit_pf.c' source_filename = "AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_mbx.c_ixgbe_check_for_bit_pf.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @IXGBE_ERR_MBX = common local_unnamed_addr global i32 0, align 4 @IXGBE_SUCCESS = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ixgbe_check_for_bit_pf], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ixgbe_check_for_bit_pf(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 { %4 = tail call i32 @IXGBE_MBVFICR(i32 noundef %2) #2 %5 = tail call i32 @IXGBE_READ_REG(ptr noundef %0, i32 noundef %4) #2 %6 = load i32, ptr @IXGBE_ERR_MBX, align 4, !tbaa !6 %7 = and i32 %5, %1 %8 = icmp eq i32 %7, 0 br i1 %8, label %13, label %9 9: ; preds = %3 %10 = load i32, ptr @IXGBE_SUCCESS, align 4, !tbaa !6 %11 = tail call i32 @IXGBE_MBVFICR(i32 noundef %2) #2 %12 = tail call i32 @IXGBE_WRITE_REG(ptr noundef %0, i32 noundef %11, i32 noundef %1) #2 br label %13 13: ; preds = %9, %3 %14 = phi i32 [ %10, %9 ], [ %6, %3 ] ret i32 %14 } declare i32 @IXGBE_READ_REG(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @IXGBE_MBVFICR(i32 noundef) local_unnamed_addr #1 declare i32 @IXGBE_WRITE_REG(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_sys_dev_ixgbe_extr_ixgbe_mbx.c_ixgbe_check_for_bit_pf
; ModuleID = 'AnghaBench/linux/drivers/net/dsa/extr_lantiq_gswip.c_gswip_probe.c' source_filename = "AnghaBench/linux/drivers/net/dsa/extr_lantiq_gswip.c_gswip_probe.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.gswip_priv = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr } %struct.TYPE_6__ = type { i32, i32 } %struct.TYPE_7__ = type { i32, ptr, ptr } @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @gswip_switch_ops = dso_local global i32 0, align 4 @GSWIP_VERSION = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [15 x i8] c"lantiq,gphy-fw\00", align 1 @.str.1 = private unnamed_addr constant [22 x i8] c"gphy fw probe failed\0A\00", align 1 @.str.2 = private unnamed_addr constant [19 x i8] c"lantiq,xrx200-mdio\00", align 1 @.str.3 = private unnamed_addr constant [19 x i8] c"mdio probe failed\0A\00", align 1 @.str.4 = private unnamed_addr constant [32 x i8] c"dsa switch register failed: %i\0A\00", align 1 @.str.5 = private unnamed_addr constant [50 x i8] c"wrong CPU port defined, HW only supports port: %i\00", align 1 @.str.6 = private unnamed_addr constant [34 x i8] c"probed GSWIP version %lx mod %lx\0A\00", align 1 @GSWIP_VERSION_REV_MASK = dso_local local_unnamed_addr global i32 0, align 4 @GSWIP_VERSION_REV_SHIFT = dso_local local_unnamed_addr global i32 0, align 4 @GSWIP_VERSION_MOD_MASK = dso_local local_unnamed_addr global i32 0, align 4 @GSWIP_VERSION_MOD_SHIFT = dso_local local_unnamed_addr global i32 0, align 4 @GSWIP_MDIO_GLOB_ENABLE = dso_local local_unnamed_addr global i32 0, align 4 @GSWIP_MDIO_GLOB = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @gswip_probe], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @gswip_probe(ptr noundef %0) #0 { %2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5 %3 = tail call ptr @devm_kzalloc(ptr noundef %0, i32 noundef 64, i32 noundef %2) #2 %4 = icmp eq ptr %3, null br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @ENOMEM, align 4, !tbaa !5 %7 = sub nsw i32 0, %6 br label %128 8: ; preds = %1 %9 = tail call ptr @devm_platform_ioremap_resource(ptr noundef %0, i32 noundef 0) #2 %10 = getelementptr inbounds %struct.gswip_priv, ptr %3, i64 0, i32 7 store ptr %9, ptr %10, align 8, !tbaa !9 %11 = tail call i64 @IS_ERR(ptr noundef %9) #2 %12 = icmp eq i64 %11, 0 br i1 %12, label %16, label %13 13: ; preds = %8 %14 = load ptr, ptr %10, align 8, !tbaa !9 %15 = tail call i32 @PTR_ERR(ptr noundef %14) #2 br label %128 16: ; preds = %8 %17 = tail call ptr @devm_platform_ioremap_resource(ptr noundef %0, i32 noundef 1) #2 %18 = getelementptr inbounds %struct.gswip_priv, ptr %3, i64 0, i32 6 store ptr %17, ptr %18, align 8, !tbaa !12 %19 = tail call i64 @IS_ERR(ptr noundef %17) #2 %20 = icmp eq i64 %19, 0 br i1 %20, label %24, label %21 21: ; preds = %16 %22 = load ptr, ptr %18, align 8, !tbaa !12 %23 = tail call i32 @PTR_ERR(ptr noundef %22) #2 br label %128 24: ; preds = %16 %25 = tail call ptr @devm_platform_ioremap_resource(ptr noundef %0, i32 noundef 2) #2 %26 = getelementptr inbounds %struct.gswip_priv, ptr %3, i64 0, i32 5 store ptr %25, ptr %26, align 8, !tbaa !13 %27 = tail call i64 @IS_ERR(ptr noundef %25) #2 %28 = icmp eq i64 %27, 0 br i1 %28, label %32, label %29 29: ; preds = %24 %30 = load ptr, ptr %26, align 8, !tbaa !13 %31 = tail call i32 @PTR_ERR(ptr noundef %30) #2 br label %128 32: ; preds = %24 %33 = tail call ptr @of_device_get_match_data(ptr noundef %0) #2 %34 = getelementptr inbounds %struct.gswip_priv, ptr %3, i64 0, i32 3 store ptr %33, ptr %34, align 8, !tbaa !14 %35 = icmp eq ptr %33, null br i1 %35, label %36, label %39 36: ; preds = %32 %37 = load i32, ptr @EINVAL, align 4, !tbaa !5 %38 = sub nsw i32 0, %37 br label %128 39: ; preds = %32 %40 = getelementptr inbounds %struct.TYPE_6__, ptr %33, i64 0, i32 1 %41 = load i32, ptr %40, align 4, !tbaa !15 %42 = tail call ptr @dsa_switch_alloc(ptr noundef %0, i32 noundef %41) #2 %43 = getelementptr inbounds %struct.gswip_priv, ptr %3, i64 0, i32 2 store ptr %42, ptr %43, align 8, !tbaa !17 %44 = icmp eq ptr %42, null br i1 %44, label %45, label %48 45: ; preds = %39 %46 = load i32, ptr @ENOMEM, align 4, !tbaa !5 %47 = sub nsw i32 0, %46 br label %128 48: ; preds = %39 %49 = getelementptr inbounds %struct.TYPE_7__, ptr %42, i64 0, i32 2 store ptr %3, ptr %49, align 8, !tbaa !18 %50 = getelementptr inbounds %struct.TYPE_7__, ptr %42, i64 0, i32 1 store ptr @gswip_switch_ops, ptr %50, align 8, !tbaa !20 %51 = getelementptr inbounds %struct.gswip_priv, ptr %3, i64 0, i32 4 store ptr %0, ptr %51, align 8, !tbaa !21 %52 = load i32, ptr @GSWIP_VERSION, align 4, !tbaa !5 %53 = tail call i32 @gswip_switch_r(ptr noundef nonnull %3, i32 noundef %52) #2 %54 = load i32, ptr %0, align 4, !tbaa !22 %55 = tail call ptr @of_get_compatible_child(i32 noundef %54, ptr noundef nonnull @.str) #2 %56 = icmp eq ptr %55, null br i1 %56, label %63, label %57 57: ; preds = %48 %58 = tail call i32 @gswip_gphy_fw_list(ptr noundef nonnull %3, ptr noundef nonnull %55, i32 noundef %53) #2 %59 = tail call i32 @of_node_put(ptr noundef nonnull %55) #2 %60 = icmp eq i32 %58, 0 br i1 %60, label %63, label %61 61: ; preds = %57 %62 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.1) #2 br label %128 63: ; preds = %57, %48 %64 = load i32, ptr %0, align 4, !tbaa !22 %65 = tail call ptr @of_get_compatible_child(i32 noundef %64, ptr noundef nonnull @.str.2) #2 %66 = icmp eq ptr %65, null br i1 %66, label %72, label %67 67: ; preds = %63 %68 = tail call i32 @gswip_mdio(ptr noundef nonnull %3, ptr noundef nonnull %65) #2 %69 = icmp eq i32 %68, 0 br i1 %69, label %72, label %70 70: ; preds = %67 %71 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.3) #2 br label %112 72: ; preds = %67, %63 %73 = load ptr, ptr %43, align 8, !tbaa !17 %74 = tail call i32 @dsa_register_switch(ptr noundef %73) #2 %75 = icmp eq i32 %74, 0 br i1 %75, label %78, label %76 76: ; preds = %72 %77 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.4, i32 noundef %74) #2 br label %106 78: ; preds = %72 %79 = load ptr, ptr %43, align 8, !tbaa !17 %80 = load ptr, ptr %34, align 8, !tbaa !14 %81 = load i32, ptr %80, align 4, !tbaa !24 %82 = tail call i32 @dsa_is_cpu_port(ptr noundef %79, i32 noundef %81) #2 %83 = icmp eq i32 %82, 0 br i1 %83, label %84, label %95 84: ; preds = %78 %85 = load ptr, ptr %34, align 8, !tbaa !14 %86 = load i32, ptr %85, align 4, !tbaa !24 %87 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.5, i32 noundef %86) #2 %88 = load i32, ptr @EINVAL, align 4, !tbaa !5 %89 = sub nsw i32 0, %88 %90 = load i32, ptr @GSWIP_MDIO_GLOB_ENABLE, align 4, !tbaa !5 %91 = load i32, ptr @GSWIP_MDIO_GLOB, align 4, !tbaa !5 %92 = tail call i32 @gswip_mdio_mask(ptr noundef nonnull %3, i32 noundef %90, i32 noundef 0, i32 noundef %91) #2 %93 = load ptr, ptr %43, align 8, !tbaa !17 %94 = tail call i32 @dsa_unregister_switch(ptr noundef %93) #2 br label %106 95: ; preds = %78 %96 = tail call i32 @platform_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %3) #2 %97 = load i32, ptr @GSWIP_VERSION_REV_MASK, align 4, !tbaa !5 %98 = and i32 %97, %53 %99 = load i32, ptr @GSWIP_VERSION_REV_SHIFT, align 4, !tbaa !5 %100 = ashr i32 %98, %99 %101 = load i32, ptr @GSWIP_VERSION_MOD_MASK, align 4, !tbaa !5 %102 = and i32 %101, %53 %103 = load i32, ptr @GSWIP_VERSION_MOD_SHIFT, align 4, !tbaa !5 %104 = ashr i32 %102, %103 %105 = tail call i32 @dev_info(ptr noundef nonnull %0, ptr noundef nonnull @.str.6, i32 noundef %100, i32 noundef %104) #2 br label %128 106: ; preds = %84, %76 %107 = phi i32 [ %74, %76 ], [ %89, %84 ] br i1 %66, label %112, label %108 108: ; preds = %106 %109 = load ptr, ptr %43, align 8, !tbaa !17 %110 = load i32, ptr %109, align 8, !tbaa !25 %111 = tail call i32 @mdiobus_unregister(i32 noundef %110) #2 br label %112 112: ; preds = %106, %108, %70 %113 = phi i32 [ %68, %70 ], [ %107, %108 ], [ %107, %106 ] %114 = tail call i32 @of_node_put(ptr noundef %65) #2 %115 = load i32, ptr %3, align 8, !tbaa !26 %116 = icmp sgt i32 %115, 0 br i1 %116, label %117, label %128 117: ; preds = %112 %118 = getelementptr inbounds %struct.gswip_priv, ptr %3, i64 0, i32 1 br label %119 119: ; preds = %117, %119 %120 = phi i64 [ 0, %117 ], [ %124, %119 ] %121 = load ptr, ptr %118, align 8, !tbaa !27 %122 = getelementptr inbounds i32, ptr %121, i64 %120 %123 = tail call i32 @gswip_gphy_fw_remove(ptr noundef nonnull %3, ptr noundef %122) #2 %124 = add nuw nsw i64 %120, 1 %125 = load i32, ptr %3, align 8, !tbaa !26 %126 = sext i32 %125 to i64 %127 = icmp slt i64 %124, %126 br i1 %127, label %119, label %128, !llvm.loop !28 128: ; preds = %119, %112, %95, %61, %45, %36, %29, %21, %13, %5 %129 = phi i32 [ %15, %13 ], [ %23, %21 ], [ %31, %29 ], [ %58, %61 ], [ 0, %95 ], [ %47, %45 ], [ %38, %36 ], [ %7, %5 ], [ %113, %112 ], [ %113, %119 ] ret i32 %129 } declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @devm_platform_ioremap_resource(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare ptr @of_device_get_match_data(ptr noundef) local_unnamed_addr #1 declare ptr @dsa_switch_alloc(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @gswip_switch_r(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @of_get_compatible_child(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @gswip_gphy_fw_list(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @of_node_put(ptr noundef) local_unnamed_addr #1 declare i32 @dev_err(ptr noundef, ptr noundef, ...) local_unnamed_addr #1 declare i32 @gswip_mdio(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @dsa_register_switch(ptr noundef) local_unnamed_addr #1 declare i32 @dsa_is_cpu_port(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @dev_info(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @gswip_mdio_mask(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dsa_unregister_switch(ptr noundef) local_unnamed_addr #1 declare i32 @mdiobus_unregister(i32 noundef) local_unnamed_addr #1 declare i32 @gswip_gphy_fw_remove(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 56} !10 = !{!"gswip_priv", !6, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56} !11 = !{!"any pointer", !7, i64 0} !12 = !{!10, !11, i64 48} !13 = !{!10, !11, i64 40} !14 = !{!10, !11, i64 24} !15 = !{!16, !6, i64 4} !16 = !{!"TYPE_6__", !6, i64 0, !6, i64 4} !17 = !{!10, !11, i64 16} !18 = !{!19, !11, i64 16} !19 = !{!"TYPE_7__", !6, i64 0, !11, i64 8, !11, i64 16} !20 = !{!19, !11, i64 8} !21 = !{!10, !11, i64 32} !22 = !{!23, !6, i64 0} !23 = !{!"device", !6, i64 0} !24 = !{!16, !6, i64 0} !25 = !{!19, !6, i64 0} !26 = !{!10, !6, i64 0} !27 = !{!10, !11, i64 8} !28 = distinct !{!28, !29} !29 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/drivers/net/dsa/extr_lantiq_gswip.c_gswip_probe.c' source_filename = "AnghaBench/linux/drivers/net/dsa/extr_lantiq_gswip.c_gswip_probe.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @EINVAL = common local_unnamed_addr global i32 0, align 4 @gswip_switch_ops = common global i32 0, align 4 @GSWIP_VERSION = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [15 x i8] c"lantiq,gphy-fw\00", align 1 @.str.1 = private unnamed_addr constant [22 x i8] c"gphy fw probe failed\0A\00", align 1 @.str.2 = private unnamed_addr constant [19 x i8] c"lantiq,xrx200-mdio\00", align 1 @.str.3 = private unnamed_addr constant [19 x i8] c"mdio probe failed\0A\00", align 1 @.str.4 = private unnamed_addr constant [32 x i8] c"dsa switch register failed: %i\0A\00", align 1 @.str.5 = private unnamed_addr constant [50 x i8] c"wrong CPU port defined, HW only supports port: %i\00", align 1 @.str.6 = private unnamed_addr constant [34 x i8] c"probed GSWIP version %lx mod %lx\0A\00", align 1 @GSWIP_VERSION_REV_MASK = common local_unnamed_addr global i32 0, align 4 @GSWIP_VERSION_REV_SHIFT = common local_unnamed_addr global i32 0, align 4 @GSWIP_VERSION_MOD_MASK = common local_unnamed_addr global i32 0, align 4 @GSWIP_VERSION_MOD_SHIFT = common local_unnamed_addr global i32 0, align 4 @GSWIP_MDIO_GLOB_ENABLE = common local_unnamed_addr global i32 0, align 4 @GSWIP_MDIO_GLOB = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @gswip_probe], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @gswip_probe(ptr noundef %0) #0 { %2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6 %3 = tail call ptr @devm_kzalloc(ptr noundef %0, i32 noundef 64, i32 noundef %2) #2 %4 = icmp eq ptr %3, null br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @ENOMEM, align 4, !tbaa !6 %7 = sub nsw i32 0, %6 br label %128 8: ; preds = %1 %9 = tail call ptr @devm_platform_ioremap_resource(ptr noundef %0, i32 noundef 0) #2 %10 = getelementptr inbounds i8, ptr %3, i64 56 store ptr %9, ptr %10, align 8, !tbaa !10 %11 = tail call i64 @IS_ERR(ptr noundef %9) #2 %12 = icmp eq i64 %11, 0 br i1 %12, label %16, label %13 13: ; preds = %8 %14 = load ptr, ptr %10, align 8, !tbaa !10 %15 = tail call i32 @PTR_ERR(ptr noundef %14) #2 br label %128 16: ; preds = %8 %17 = tail call ptr @devm_platform_ioremap_resource(ptr noundef %0, i32 noundef 1) #2 %18 = getelementptr inbounds i8, ptr %3, i64 48 store ptr %17, ptr %18, align 8, !tbaa !13 %19 = tail call i64 @IS_ERR(ptr noundef %17) #2 %20 = icmp eq i64 %19, 0 br i1 %20, label %24, label %21 21: ; preds = %16 %22 = load ptr, ptr %18, align 8, !tbaa !13 %23 = tail call i32 @PTR_ERR(ptr noundef %22) #2 br label %128 24: ; preds = %16 %25 = tail call ptr @devm_platform_ioremap_resource(ptr noundef %0, i32 noundef 2) #2 %26 = getelementptr inbounds i8, ptr %3, i64 40 store ptr %25, ptr %26, align 8, !tbaa !14 %27 = tail call i64 @IS_ERR(ptr noundef %25) #2 %28 = icmp eq i64 %27, 0 br i1 %28, label %32, label %29 29: ; preds = %24 %30 = load ptr, ptr %26, align 8, !tbaa !14 %31 = tail call i32 @PTR_ERR(ptr noundef %30) #2 br label %128 32: ; preds = %24 %33 = tail call ptr @of_device_get_match_data(ptr noundef %0) #2 %34 = getelementptr inbounds i8, ptr %3, i64 24 store ptr %33, ptr %34, align 8, !tbaa !15 %35 = icmp eq ptr %33, null br i1 %35, label %36, label %39 36: ; preds = %32 %37 = load i32, ptr @EINVAL, align 4, !tbaa !6 %38 = sub nsw i32 0, %37 br label %128 39: ; preds = %32 %40 = getelementptr inbounds i8, ptr %33, i64 4 %41 = load i32, ptr %40, align 4, !tbaa !16 %42 = tail call ptr @dsa_switch_alloc(ptr noundef %0, i32 noundef %41) #2 %43 = getelementptr inbounds i8, ptr %3, i64 16 store ptr %42, ptr %43, align 8, !tbaa !18 %44 = icmp eq ptr %42, null br i1 %44, label %45, label %48 45: ; preds = %39 %46 = load i32, ptr @ENOMEM, align 4, !tbaa !6 %47 = sub nsw i32 0, %46 br label %128 48: ; preds = %39 %49 = getelementptr inbounds i8, ptr %42, i64 16 store ptr %3, ptr %49, align 8, !tbaa !19 %50 = getelementptr inbounds i8, ptr %42, i64 8 store ptr @gswip_switch_ops, ptr %50, align 8, !tbaa !21 %51 = getelementptr inbounds i8, ptr %3, i64 32 store ptr %0, ptr %51, align 8, !tbaa !22 %52 = load i32, ptr @GSWIP_VERSION, align 4, !tbaa !6 %53 = tail call i32 @gswip_switch_r(ptr noundef nonnull %3, i32 noundef %52) #2 %54 = load i32, ptr %0, align 4, !tbaa !23 %55 = tail call ptr @of_get_compatible_child(i32 noundef %54, ptr noundef nonnull @.str) #2 %56 = icmp eq ptr %55, null br i1 %56, label %63, label %57 57: ; preds = %48 %58 = tail call i32 @gswip_gphy_fw_list(ptr noundef nonnull %3, ptr noundef nonnull %55, i32 noundef %53) #2 %59 = tail call i32 @of_node_put(ptr noundef nonnull %55) #2 %60 = icmp eq i32 %58, 0 br i1 %60, label %63, label %61 61: ; preds = %57 %62 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.1) #2 br label %128 63: ; preds = %57, %48 %64 = load i32, ptr %0, align 4, !tbaa !23 %65 = tail call ptr @of_get_compatible_child(i32 noundef %64, ptr noundef nonnull @.str.2) #2 %66 = icmp eq ptr %65, null br i1 %66, label %72, label %67 67: ; preds = %63 %68 = tail call i32 @gswip_mdio(ptr noundef nonnull %3, ptr noundef nonnull %65) #2 %69 = icmp eq i32 %68, 0 br i1 %69, label %72, label %70 70: ; preds = %67 %71 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.3) #2 br label %112 72: ; preds = %67, %63 %73 = load ptr, ptr %43, align 8, !tbaa !18 %74 = tail call i32 @dsa_register_switch(ptr noundef %73) #2 %75 = icmp eq i32 %74, 0 br i1 %75, label %78, label %76 76: ; preds = %72 %77 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.4, i32 noundef %74) #2 br label %106 78: ; preds = %72 %79 = load ptr, ptr %43, align 8, !tbaa !18 %80 = load ptr, ptr %34, align 8, !tbaa !15 %81 = load i32, ptr %80, align 4, !tbaa !25 %82 = tail call i32 @dsa_is_cpu_port(ptr noundef %79, i32 noundef %81) #2 %83 = icmp eq i32 %82, 0 br i1 %83, label %84, label %95 84: ; preds = %78 %85 = load ptr, ptr %34, align 8, !tbaa !15 %86 = load i32, ptr %85, align 4, !tbaa !25 %87 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.5, i32 noundef %86) #2 %88 = load i32, ptr @EINVAL, align 4, !tbaa !6 %89 = sub nsw i32 0, %88 %90 = load i32, ptr @GSWIP_MDIO_GLOB_ENABLE, align 4, !tbaa !6 %91 = load i32, ptr @GSWIP_MDIO_GLOB, align 4, !tbaa !6 %92 = tail call i32 @gswip_mdio_mask(ptr noundef nonnull %3, i32 noundef %90, i32 noundef 0, i32 noundef %91) #2 %93 = load ptr, ptr %43, align 8, !tbaa !18 %94 = tail call i32 @dsa_unregister_switch(ptr noundef %93) #2 br label %106 95: ; preds = %78 %96 = tail call i32 @platform_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %3) #2 %97 = load i32, ptr @GSWIP_VERSION_REV_MASK, align 4, !tbaa !6 %98 = and i32 %97, %53 %99 = load i32, ptr @GSWIP_VERSION_REV_SHIFT, align 4, !tbaa !6 %100 = ashr i32 %98, %99 %101 = load i32, ptr @GSWIP_VERSION_MOD_MASK, align 4, !tbaa !6 %102 = and i32 %101, %53 %103 = load i32, ptr @GSWIP_VERSION_MOD_SHIFT, align 4, !tbaa !6 %104 = ashr i32 %102, %103 %105 = tail call i32 @dev_info(ptr noundef nonnull %0, ptr noundef nonnull @.str.6, i32 noundef %100, i32 noundef %104) #2 br label %128 106: ; preds = %84, %76 %107 = phi i32 [ %74, %76 ], [ %89, %84 ] br i1 %66, label %112, label %108 108: ; preds = %106 %109 = load ptr, ptr %43, align 8, !tbaa !18 %110 = load i32, ptr %109, align 8, !tbaa !26 %111 = tail call i32 @mdiobus_unregister(i32 noundef %110) #2 br label %112 112: ; preds = %106, %108, %70 %113 = phi i32 [ %68, %70 ], [ %107, %108 ], [ %107, %106 ] %114 = tail call i32 @of_node_put(ptr noundef %65) #2 %115 = load i32, ptr %3, align 8, !tbaa !27 %116 = icmp sgt i32 %115, 0 br i1 %116, label %117, label %128 117: ; preds = %112 %118 = getelementptr inbounds i8, ptr %3, i64 8 br label %119 119: ; preds = %117, %119 %120 = phi i64 [ 0, %117 ], [ %124, %119 ] %121 = load ptr, ptr %118, align 8, !tbaa !28 %122 = getelementptr inbounds i32, ptr %121, i64 %120 %123 = tail call i32 @gswip_gphy_fw_remove(ptr noundef nonnull %3, ptr noundef %122) #2 %124 = add nuw nsw i64 %120, 1 %125 = load i32, ptr %3, align 8, !tbaa !27 %126 = sext i32 %125 to i64 %127 = icmp slt i64 %124, %126 br i1 %127, label %119, label %128, !llvm.loop !29 128: ; preds = %119, %112, %95, %61, %45, %36, %29, %21, %13, %5 %129 = phi i32 [ %15, %13 ], [ %23, %21 ], [ %31, %29 ], [ %58, %61 ], [ 0, %95 ], [ %47, %45 ], [ %38, %36 ], [ %7, %5 ], [ %113, %112 ], [ %113, %119 ] ret i32 %129 } declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @devm_platform_ioremap_resource(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare ptr @of_device_get_match_data(ptr noundef) local_unnamed_addr #1 declare ptr @dsa_switch_alloc(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @gswip_switch_r(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @of_get_compatible_child(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @gswip_gphy_fw_list(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @of_node_put(ptr noundef) local_unnamed_addr #1 declare i32 @dev_err(ptr noundef, ptr noundef, ...) local_unnamed_addr #1 declare i32 @gswip_mdio(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @dsa_register_switch(ptr noundef) local_unnamed_addr #1 declare i32 @dsa_is_cpu_port(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @dev_info(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @gswip_mdio_mask(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dsa_unregister_switch(ptr noundef) local_unnamed_addr #1 declare i32 @mdiobus_unregister(i32 noundef) local_unnamed_addr #1 declare i32 @gswip_gphy_fw_remove(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 56} !11 = !{!"gswip_priv", !7, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56} !12 = !{!"any pointer", !8, i64 0} !13 = !{!11, !12, i64 48} !14 = !{!11, !12, i64 40} !15 = !{!11, !12, i64 24} !16 = !{!17, !7, i64 4} !17 = !{!"TYPE_6__", !7, i64 0, !7, i64 4} !18 = !{!11, !12, i64 16} !19 = !{!20, !12, i64 16} !20 = !{!"TYPE_7__", !7, i64 0, !12, i64 8, !12, i64 16} !21 = !{!20, !12, i64 8} !22 = !{!11, !12, i64 32} !23 = !{!24, !7, i64 0} !24 = !{!"device", !7, i64 0} !25 = !{!17, !7, i64 0} !26 = !{!20, !7, i64 0} !27 = !{!11, !7, i64 0} !28 = !{!11, !12, i64 8} !29 = distinct !{!29, !30} !30 = !{!"llvm.loop.mustprogress"}
linux_drivers_net_dsa_extr_lantiq_gswip.c_gswip_probe
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/vm/extr_vm_user.c_vm_map_page_query.c' source_filename = "AnghaBench/darwin-xnu/osfmk/vm/extr_vm_user.c_vm_map_page_query.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @VM_MAP_NULL = dso_local local_unnamed_addr global i64 0, align 8 @KERN_INVALID_ARGUMENT = dso_local local_unnamed_addr global i32 0, align 4 @PAGE_MASK = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @vm_map_page_query(i64 noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 { %5 = load i64, ptr @VM_MAP_NULL, align 8, !tbaa !5 %6 = icmp eq i64 %5, %0 br i1 %6, label %7, label %9 7: ; preds = %4 %8 = load i32, ptr @KERN_INVALID_ARGUMENT, align 4, !tbaa !9 br label %13 9: ; preds = %4 %10 = load i32, ptr @PAGE_MASK, align 4, !tbaa !9 %11 = tail call i32 @vm_map_trunc_page(i32 noundef %1, i32 noundef %10) #2 %12 = tail call i32 @vm_map_page_query_internal(i64 noundef %0, i32 noundef %11, ptr noundef %2, ptr noundef %3) #2 br label %13 13: ; preds = %9, %7 %14 = phi i32 [ %8, %7 ], [ %12, %9 ] ret i32 %14 } declare i32 @vm_map_page_query_internal(i64 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @vm_map_trunc_page(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0}
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/vm/extr_vm_user.c_vm_map_page_query.c' source_filename = "AnghaBench/darwin-xnu/osfmk/vm/extr_vm_user.c_vm_map_page_query.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @VM_MAP_NULL = common local_unnamed_addr global i64 0, align 8 @KERN_INVALID_ARGUMENT = common local_unnamed_addr global i32 0, align 4 @PAGE_MASK = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @vm_map_page_query(i64 noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 { %5 = load i64, ptr @VM_MAP_NULL, align 8, !tbaa !6 %6 = icmp eq i64 %5, %0 br i1 %6, label %7, label %9 7: ; preds = %4 %8 = load i32, ptr @KERN_INVALID_ARGUMENT, align 4, !tbaa !10 br label %13 9: ; preds = %4 %10 = load i32, ptr @PAGE_MASK, align 4, !tbaa !10 %11 = tail call i32 @vm_map_trunc_page(i32 noundef %1, i32 noundef %10) #2 %12 = tail call i32 @vm_map_page_query_internal(i64 noundef %0, i32 noundef %11, ptr noundef %2, ptr noundef %3) #2 br label %13 13: ; preds = %9, %7 %14 = phi i32 [ %8, %7 ], [ %12, %9 ] ret i32 %14 } declare i32 @vm_map_page_query_internal(i64 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @vm_map_trunc_page(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0}
darwin-xnu_osfmk_vm_extr_vm_user.c_vm_map_page_query
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_switchdev.c_mlxsw_sp_fdb_notify_mac_lag_process.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_switchdev.c_mlxsw_sp_fdb_notify_mac_lag_process.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.mlxsw_sp_port_vlan = type { i32, i32, ptr } %struct.mlxsw_sp_bridge_port = type { i32, ptr } @ETH_ALEN = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [38 x i8] c"Cannot find port representor for LAG\0A\00", align 1 @.str.1 = private unnamed_addr constant [66 x i8] c"Failed to find a matching {Port, VID} following FDB notification\0A\00", align 1 @.str.2 = private unnamed_addr constant [42 x i8] c"{Port, VID} not associated with a bridge\0A\00", align 1 @.str.3 = private unnamed_addr constant [25 x i8] c"Failed to set FDB entry\0A\00", align 1 @SWITCHDEV_FDB_ADD_TO_BRIDGE = dso_local local_unnamed_addr global i32 0, align 4 @SWITCHDEV_FDB_DEL_TO_BRIDGE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @mlxsw_sp_fdb_notify_mac_lag_process], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @mlxsw_sp_fdb_notify_mac_lag_process(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 { %5 = alloca i32, align 4 %6 = alloca i32, align 4 %7 = load i32, ptr @ETH_ALEN, align 4, !tbaa !5 %8 = zext i32 %7 to i64 %9 = alloca i8, i64 %8, align 16 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3 %10 = call i32 @mlxsw_reg_sfn_mac_lag_unpack(ptr noundef %1, i32 noundef %2, ptr noundef nonnull %9, ptr noundef nonnull %6, ptr noundef nonnull %5) #3 %11 = load i32, ptr %5, align 4, !tbaa !5 %12 = call ptr @mlxsw_sp_lag_rep_port(ptr noundef %0, i32 noundef %11) #3 %13 = icmp eq ptr %12, null br i1 %13, label %14, label %18 14: ; preds = %4 %15 = load ptr, ptr %0, align 8, !tbaa !9 %16 = load i32, ptr %15, align 4, !tbaa !12 %17 = call i32 @dev_err_ratelimited(i32 noundef %16, ptr noundef nonnull @.str) #3 br label %51 18: ; preds = %4 %19 = load i32, ptr %6, align 4, !tbaa !5 %20 = call i64 @mlxsw_sp_fid_is_dummy(ptr noundef %0, i32 noundef %19) #3 %21 = icmp eq i64 %20, 0 br i1 %21, label %22, label %51 22: ; preds = %18 %23 = load i32, ptr %6, align 4, !tbaa !5 %24 = call ptr @mlxsw_sp_port_vlan_find_by_fid(ptr noundef nonnull %12, i32 noundef %23) #3 %25 = icmp eq ptr %24, null br i1 %25, label %26, label %29 26: ; preds = %22 %27 = load i32, ptr %12, align 4, !tbaa !14 %28 = call i32 @netdev_err(i32 noundef %27, ptr noundef nonnull @.str.1) #3 br label %51 29: ; preds = %22 %30 = getelementptr inbounds %struct.mlxsw_sp_port_vlan, ptr %24, i64 0, i32 2 %31 = load ptr, ptr %30, align 8, !tbaa !16 %32 = icmp eq ptr %31, null br i1 %32, label %33, label %36 33: ; preds = %29 %34 = load i32, ptr %12, align 4, !tbaa !14 %35 = call i32 @netdev_err(i32 noundef %34, ptr noundef nonnull @.str.2) #3 br label %51 36: ; preds = %29 %37 = getelementptr inbounds %struct.mlxsw_sp_bridge_port, ptr %31, i64 0, i32 1 %38 = load ptr, ptr %37, align 8, !tbaa !18 %39 = load i64, ptr %38, align 8, !tbaa !20 %40 = icmp eq i64 %39, 0 br i1 %40, label %43, label %41 41: ; preds = %36 %42 = load i32, ptr %24, align 8, !tbaa !23 br label %43 43: ; preds = %36, %41 %44 = phi i32 [ %42, %41 ], [ 0, %36 ] %45 = getelementptr inbounds %struct.mlxsw_sp_port_vlan, ptr %24, i64 0, i32 1 %46 = load i32, ptr %45, align 4, !tbaa !24 %47 = call i64 @mlxsw_sp_fid_lag_vid_valid(i32 noundef %46) #3 %48 = icmp eq i64 %47, 0 br i1 %48, label %51, label %49 49: ; preds = %43 %50 = load i32, ptr %24, align 8, !tbaa !23 br label %51 51: ; preds = %14, %26, %33, %18, %49, %43 %52 = phi ptr [ %31, %43 ], [ %31, %49 ], [ null, %18 ], [ null, %33 ], [ null, %26 ], [ null, %14 ] %53 = phi i32 [ 0, %43 ], [ %50, %49 ], [ 0, %18 ], [ 0, %33 ], [ 0, %26 ], [ 0, %14 ] %54 = phi i32 [ %44, %43 ], [ %44, %49 ], [ undef, %18 ], [ undef, %33 ], [ undef, %26 ], [ undef, %14 ] %55 = phi i1 [ false, %43 ], [ false, %49 ], [ true, %18 ], [ true, %33 ], [ true, %26 ], [ true, %14 ] %56 = phi i32 [ %3, %43 ], [ %3, %49 ], [ 0, %18 ], [ 0, %33 ], [ 0, %26 ], [ 0, %14 ] %57 = load i32, ptr %5, align 4, !tbaa !5 %58 = load i32, ptr %6, align 4, !tbaa !5 %59 = call i32 @mlxsw_sp_port_fdb_uc_lag_op(ptr noundef %0, i32 noundef %57, ptr noundef nonnull %9, i32 noundef %58, i32 noundef %53, i32 noundef %56, i32 noundef 1) #3 %60 = icmp eq i32 %59, 0 br i1 %60, label %65, label %61 61: ; preds = %51 %62 = load ptr, ptr %0, align 8, !tbaa !9 %63 = load i32, ptr %62, align 4, !tbaa !12 %64 = call i32 @dev_err_ratelimited(i32 noundef %63, ptr noundef nonnull @.str.3) #3 br label %73 65: ; preds = %51 br i1 %55, label %73, label %66 66: ; preds = %65 %67 = icmp eq i32 %56, 0 %68 = load i32, ptr @SWITCHDEV_FDB_ADD_TO_BRIDGE, align 4 %69 = load i32, ptr @SWITCHDEV_FDB_DEL_TO_BRIDGE, align 4 %70 = select i1 %67, i32 %69, i32 %68 %71 = load i32, ptr %52, align 8, !tbaa !25 %72 = call i32 @mlxsw_sp_fdb_call_notifiers(i32 noundef %70, ptr noundef nonnull %9, i32 noundef %54, i32 noundef %71, i32 noundef %56) #3 br label %73 73: ; preds = %65, %66, %61 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @mlxsw_reg_sfn_mac_lag_unpack(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @mlxsw_sp_lag_rep_port(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @dev_err_ratelimited(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i64 @mlxsw_sp_fid_is_dummy(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @mlxsw_sp_port_vlan_find_by_fid(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @netdev_err(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i64 @mlxsw_sp_fid_lag_vid_valid(i32 noundef) local_unnamed_addr #2 declare i32 @mlxsw_sp_port_fdb_uc_lag_op(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @mlxsw_sp_fdb_call_notifiers(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"mlxsw_sp", !11, i64 0} !11 = !{!"any pointer", !7, i64 0} !12 = !{!13, !6, i64 0} !13 = !{!"TYPE_2__", !6, i64 0} !14 = !{!15, !6, i64 0} !15 = !{!"mlxsw_sp_port", !6, i64 0} !16 = !{!17, !11, i64 8} !17 = !{!"mlxsw_sp_port_vlan", !6, i64 0, !6, i64 4, !11, i64 8} !18 = !{!19, !11, i64 8} !19 = !{!"mlxsw_sp_bridge_port", !6, i64 0, !11, i64 8} !20 = !{!21, !22, i64 0} !21 = !{!"mlxsw_sp_bridge_device", !22, i64 0} !22 = !{!"long", !7, i64 0} !23 = !{!17, !6, i64 0} !24 = !{!17, !6, i64 4} !25 = !{!19, !6, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_switchdev.c_mlxsw_sp_fdb_notify_mac_lag_process.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_switchdev.c_mlxsw_sp_fdb_notify_mac_lag_process.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ETH_ALEN = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [38 x i8] c"Cannot find port representor for LAG\0A\00", align 1 @.str.1 = private unnamed_addr constant [66 x i8] c"Failed to find a matching {Port, VID} following FDB notification\0A\00", align 1 @.str.2 = private unnamed_addr constant [42 x i8] c"{Port, VID} not associated with a bridge\0A\00", align 1 @.str.3 = private unnamed_addr constant [25 x i8] c"Failed to set FDB entry\0A\00", align 1 @SWITCHDEV_FDB_ADD_TO_BRIDGE = common local_unnamed_addr global i32 0, align 4 @SWITCHDEV_FDB_DEL_TO_BRIDGE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @mlxsw_sp_fdb_notify_mac_lag_process], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @mlxsw_sp_fdb_notify_mac_lag_process(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 { %5 = alloca i32, align 4 %6 = alloca i32, align 4 %7 = load i32, ptr @ETH_ALEN, align 4, !tbaa !6 %8 = zext i32 %7 to i64 %9 = alloca i8, i64 %8, align 1 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3 %10 = call i32 @mlxsw_reg_sfn_mac_lag_unpack(ptr noundef %1, i32 noundef %2, ptr noundef nonnull %9, ptr noundef nonnull %6, ptr noundef nonnull %5) #3 %11 = load i32, ptr %5, align 4, !tbaa !6 %12 = call ptr @mlxsw_sp_lag_rep_port(ptr noundef %0, i32 noundef %11) #3 %13 = icmp eq ptr %12, null br i1 %13, label %14, label %18 14: ; preds = %4 %15 = load ptr, ptr %0, align 8, !tbaa !10 %16 = load i32, ptr %15, align 4, !tbaa !13 %17 = call i32 @dev_err_ratelimited(i32 noundef %16, ptr noundef nonnull @.str) #3 br label %51 18: ; preds = %4 %19 = load i32, ptr %6, align 4, !tbaa !6 %20 = call i64 @mlxsw_sp_fid_is_dummy(ptr noundef %0, i32 noundef %19) #3 %21 = icmp eq i64 %20, 0 br i1 %21, label %22, label %51 22: ; preds = %18 %23 = load i32, ptr %6, align 4, !tbaa !6 %24 = call ptr @mlxsw_sp_port_vlan_find_by_fid(ptr noundef nonnull %12, i32 noundef %23) #3 %25 = icmp eq ptr %24, null br i1 %25, label %26, label %29 26: ; preds = %22 %27 = load i32, ptr %12, align 4, !tbaa !15 %28 = call i32 @netdev_err(i32 noundef %27, ptr noundef nonnull @.str.1) #3 br label %51 29: ; preds = %22 %30 = getelementptr inbounds i8, ptr %24, i64 8 %31 = load ptr, ptr %30, align 8, !tbaa !17 %32 = icmp eq ptr %31, null br i1 %32, label %33, label %36 33: ; preds = %29 %34 = load i32, ptr %12, align 4, !tbaa !15 %35 = call i32 @netdev_err(i32 noundef %34, ptr noundef nonnull @.str.2) #3 br label %51 36: ; preds = %29 %37 = getelementptr inbounds i8, ptr %31, i64 8 %38 = load ptr, ptr %37, align 8, !tbaa !19 %39 = load i64, ptr %38, align 8, !tbaa !21 %40 = icmp eq i64 %39, 0 br i1 %40, label %43, label %41 41: ; preds = %36 %42 = load i32, ptr %24, align 8, !tbaa !24 br label %43 43: ; preds = %36, %41 %44 = phi i32 [ %42, %41 ], [ 0, %36 ] %45 = getelementptr inbounds i8, ptr %24, i64 4 %46 = load i32, ptr %45, align 4, !tbaa !25 %47 = call i64 @mlxsw_sp_fid_lag_vid_valid(i32 noundef %46) #3 %48 = icmp eq i64 %47, 0 br i1 %48, label %51, label %49 49: ; preds = %43 %50 = load i32, ptr %24, align 8, !tbaa !24 br label %51 51: ; preds = %14, %26, %33, %18, %49, %43 %52 = phi ptr [ %31, %43 ], [ %31, %49 ], [ null, %18 ], [ null, %33 ], [ null, %26 ], [ null, %14 ] %53 = phi i32 [ 0, %43 ], [ %50, %49 ], [ 0, %18 ], [ 0, %33 ], [ 0, %26 ], [ 0, %14 ] %54 = phi i32 [ %44, %43 ], [ %44, %49 ], [ undef, %18 ], [ undef, %33 ], [ undef, %26 ], [ undef, %14 ] %55 = phi i1 [ false, %43 ], [ false, %49 ], [ true, %18 ], [ true, %33 ], [ true, %26 ], [ true, %14 ] %56 = phi i32 [ %3, %43 ], [ %3, %49 ], [ 0, %18 ], [ 0, %33 ], [ 0, %26 ], [ 0, %14 ] %57 = load i32, ptr %5, align 4, !tbaa !6 %58 = load i32, ptr %6, align 4, !tbaa !6 %59 = call i32 @mlxsw_sp_port_fdb_uc_lag_op(ptr noundef %0, i32 noundef %57, ptr noundef nonnull %9, i32 noundef %58, i32 noundef %53, i32 noundef %56, i32 noundef 1) #3 %60 = icmp eq i32 %59, 0 br i1 %60, label %65, label %61 61: ; preds = %51 %62 = load ptr, ptr %0, align 8, !tbaa !10 %63 = load i32, ptr %62, align 4, !tbaa !13 %64 = call i32 @dev_err_ratelimited(i32 noundef %63, ptr noundef nonnull @.str.3) #3 br label %73 65: ; preds = %51 br i1 %55, label %73, label %66 66: ; preds = %65 %67 = icmp eq i32 %56, 0 %68 = load i32, ptr @SWITCHDEV_FDB_ADD_TO_BRIDGE, align 4 %69 = load i32, ptr @SWITCHDEV_FDB_DEL_TO_BRIDGE, align 4 %70 = select i1 %67, i32 %69, i32 %68 %71 = load i32, ptr %52, align 8, !tbaa !26 %72 = call i32 @mlxsw_sp_fdb_call_notifiers(i32 noundef %70, ptr noundef nonnull %9, i32 noundef %54, i32 noundef %71, i32 noundef %56) #3 br label %73 73: ; preds = %65, %66, %61 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @mlxsw_reg_sfn_mac_lag_unpack(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @mlxsw_sp_lag_rep_port(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @dev_err_ratelimited(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i64 @mlxsw_sp_fid_is_dummy(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @mlxsw_sp_port_vlan_find_by_fid(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @netdev_err(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i64 @mlxsw_sp_fid_lag_vid_valid(i32 noundef) local_unnamed_addr #2 declare i32 @mlxsw_sp_port_fdb_uc_lag_op(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @mlxsw_sp_fdb_call_notifiers(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"mlxsw_sp", !12, i64 0} !12 = !{!"any pointer", !8, i64 0} !13 = !{!14, !7, i64 0} !14 = !{!"TYPE_2__", !7, i64 0} !15 = !{!16, !7, i64 0} !16 = !{!"mlxsw_sp_port", !7, i64 0} !17 = !{!18, !12, i64 8} !18 = !{!"mlxsw_sp_port_vlan", !7, i64 0, !7, i64 4, !12, i64 8} !19 = !{!20, !12, i64 8} !20 = !{!"mlxsw_sp_bridge_port", !7, i64 0, !12, i64 8} !21 = !{!22, !23, i64 0} !22 = !{!"mlxsw_sp_bridge_device", !23, i64 0} !23 = !{!"long", !8, i64 0} !24 = !{!18, !7, i64 0} !25 = !{!18, !7, i64 4} !26 = !{!20, !7, i64 0}
linux_drivers_net_ethernet_mellanox_mlxsw_extr_spectrum_switchdev.c_mlxsw_sp_fdb_notify_mac_lag_process
; ModuleID = 'AnghaBench/linux/drivers/input/touchscreen/extr_stmfts.c_stmfts_sysfs_read_status.c' source_filename = "AnghaBench/linux/drivers/input/touchscreen/extr_stmfts.c_stmfts_sysfs_read_status.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @STMFTS_READ_STATUS = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [7 x i8] c"%#02x\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @stmfts_sysfs_read_status], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @stmfts_sysfs_read_status(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 { %4 = alloca [4 x i32], align 16 %5 = tail call ptr @dev_get_drvdata(ptr noundef %0) #3 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3 %6 = load i32, ptr %5, align 4, !tbaa !5 %7 = load i32, ptr @STMFTS_READ_STATUS, align 4, !tbaa !10 %8 = call i32 @i2c_smbus_read_i2c_block_data(i32 noundef %6, i32 noundef %7, i32 noundef 16, ptr noundef nonnull %4) #3 %9 = icmp eq i32 %8, 0 br i1 %9, label %10, label %13 10: ; preds = %3 %11 = load i32, ptr %4, align 16, !tbaa !10 %12 = call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %11) #3 br label %13 13: ; preds = %3, %10 %14 = phi i32 [ %12, %10 ], [ %8, %3 ] call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3 ret i32 %14 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #2 declare i32 @i2c_smbus_read_i2c_block_data(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"stmfts_data", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/input/touchscreen/extr_stmfts.c_stmfts_sysfs_read_status.c' source_filename = "AnghaBench/linux/drivers/input/touchscreen/extr_stmfts.c_stmfts_sysfs_read_status.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @STMFTS_READ_STATUS = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [7 x i8] c"%#02x\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @stmfts_sysfs_read_status], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @stmfts_sysfs_read_status(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 { %4 = alloca [4 x i32], align 4 %5 = tail call ptr @dev_get_drvdata(ptr noundef %0) #3 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3 %6 = load i32, ptr %5, align 4, !tbaa !6 %7 = load i32, ptr @STMFTS_READ_STATUS, align 4, !tbaa !11 %8 = call i32 @i2c_smbus_read_i2c_block_data(i32 noundef %6, i32 noundef %7, i32 noundef 16, ptr noundef nonnull %4) #3 %9 = icmp eq i32 %8, 0 br i1 %9, label %10, label %13 10: ; preds = %3 %11 = load i32, ptr %4, align 4, !tbaa !11 %12 = call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %11) #3 br label %13 13: ; preds = %3, %10 %14 = phi i32 [ %12, %10 ], [ %8, %3 ] call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3 ret i32 %14 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #2 declare i32 @i2c_smbus_read_i2c_block_data(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"stmfts_data", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0}
linux_drivers_input_touchscreen_extr_stmfts.c_stmfts_sysfs_read_status
; ModuleID = 'AnghaBench/curl/tests/server/extr_util.c_raw_toupper.c' source_filename = "AnghaBench/curl/tests/server/extr_util.c_raw_toupper.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @raw_toupper], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define internal signext i8 @raw_toupper(i8 noundef signext %0) #0 { %2 = add i8 %0, -97 %3 = icmp ult i8 %2, 26 %4 = add nsw i8 %0, -32 %5 = select i1 %3, i8 %4, i8 %0 ret i8 %5 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/curl/tests/server/extr_util.c_raw_toupper.c' source_filename = "AnghaBench/curl/tests/server/extr_util.c_raw_toupper.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @raw_toupper], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define internal signext i8 @raw_toupper(i8 noundef signext %0) #0 { %2 = add i8 %0, -97 %3 = icmp ult i8 %2, 26 %4 = add nsw i8 %0, -32 %5 = select i1 %3, i8 %4, i8 %0 ret i8 %5 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
curl_tests_server_extr_util.c_raw_toupper
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/afs/extr_proc.c_afs_proc_cell_vlservers_start.c' source_filename = "AnghaBench/fastsocket/kernel/fs/afs/extr_proc.c_afs_proc_cell_vlservers_start.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.afs_cell = type { i64, ptr, i32 } @.str = private unnamed_addr constant [16 x i8] c"cell=%p pos=%Ld\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @afs_proc_cell_vlservers_start], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal ptr @afs_proc_cell_vlservers_start(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = load i64, ptr %1, align 8, !tbaa !10 %5 = tail call i32 @_enter(ptr noundef nonnull @.str, ptr noundef %3, i64 noundef %4) #2 %6 = getelementptr inbounds %struct.afs_cell, ptr %3, i64 0, i32 2 %7 = tail call i32 @down_read(ptr noundef nonnull %6) #2 %8 = icmp eq i64 %4, 0 br i1 %8, label %17, label %9 9: ; preds = %2 %10 = add i64 %4, -1 %11 = load i64, ptr %3, align 8, !tbaa !12 %12 = icmp ult i64 %10, %11 br i1 %12, label %13, label %17 13: ; preds = %9 %14 = getelementptr inbounds %struct.afs_cell, ptr %3, i64 0, i32 1 %15 = load ptr, ptr %14, align 8, !tbaa !15 %16 = getelementptr inbounds i8, ptr %15, i64 %10 br label %17 17: ; preds = %9, %2, %13 %18 = phi ptr [ %16, %13 ], [ inttoptr (i64 1 to ptr), %2 ], [ null, %9 ] ret ptr %18 } declare i32 @_enter(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @down_read(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"seq_file", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"long", !8, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"afs_cell", !11, i64 0, !7, i64 8, !14, i64 16} !14 = !{!"int", !8, i64 0} !15 = !{!13, !7, i64 8}
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/afs/extr_proc.c_afs_proc_cell_vlservers_start.c' source_filename = "AnghaBench/fastsocket/kernel/fs/afs/extr_proc.c_afs_proc_cell_vlservers_start.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [16 x i8] c"cell=%p pos=%Ld\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @afs_proc_cell_vlservers_start], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal ptr @afs_proc_cell_vlservers_start(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = load i64, ptr %1, align 8, !tbaa !11 %5 = tail call i32 @_enter(ptr noundef nonnull @.str, ptr noundef %3, i64 noundef %4) #2 %6 = getelementptr inbounds i8, ptr %3, i64 16 %7 = tail call i32 @down_read(ptr noundef nonnull %6) #2 %8 = icmp eq i64 %4, 0 br i1 %8, label %17, label %9 9: ; preds = %2 %10 = add i64 %4, -1 %11 = load i64, ptr %3, align 8, !tbaa !13 %12 = icmp ult i64 %10, %11 br i1 %12, label %13, label %17 13: ; preds = %9 %14 = getelementptr inbounds i8, ptr %3, i64 8 %15 = load ptr, ptr %14, align 8, !tbaa !16 %16 = getelementptr inbounds i8, ptr %15, i64 %10 br label %17 17: ; preds = %9, %2, %13 %18 = phi ptr [ %16, %13 ], [ inttoptr (i64 1 to ptr), %2 ], [ null, %9 ] ret ptr %18 } declare i32 @_enter(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @down_read(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"seq_file", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"long", !9, i64 0} !13 = !{!14, !12, i64 0} !14 = !{!"afs_cell", !12, i64 0, !8, i64 8, !15, i64 16} !15 = !{!"int", !9, i64 0} !16 = !{!14, !8, i64 8}
fastsocket_kernel_fs_afs_extr_proc.c_afs_proc_cell_vlservers_start
; ModuleID = 'AnghaBench/mjolnir/Mjolnir/lua/extr_lcorolib.c_luaB_yield.c' source_filename = "AnghaBench/mjolnir/Mjolnir/lua/extr_lcorolib.c_luaB_yield.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @luaB_yield], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @luaB_yield(ptr noundef %0) #0 { %2 = tail call i32 @lua_gettop(ptr noundef %0) #2 %3 = tail call i32 @lua_yield(ptr noundef %0, i32 noundef %2) #2 ret i32 %3 } declare i32 @lua_yield(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @lua_gettop(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/mjolnir/Mjolnir/lua/extr_lcorolib.c_luaB_yield.c' source_filename = "AnghaBench/mjolnir/Mjolnir/lua/extr_lcorolib.c_luaB_yield.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @luaB_yield], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @luaB_yield(ptr noundef %0) #0 { %2 = tail call i32 @lua_gettop(ptr noundef %0) #2 %3 = tail call i32 @lua_yield(ptr noundef %0, i32 noundef %2) #2 ret i32 %3 } declare i32 @lua_yield(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @lua_gettop(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
mjolnir_Mjolnir_lua_extr_lcorolib.c_luaB_yield
; ModuleID = 'AnghaBench/linux/drivers/soundwire/extr_bus.h_sdw_slave_debugfs_exit.c' source_filename = "AnghaBench/linux/drivers/soundwire/extr_bus.h_sdw_slave_debugfs_exit.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @sdw_slave_debugfs_exit], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define internal void @sdw_slave_debugfs_exit(ptr nocapture readnone %0) #0 { ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/drivers/soundwire/extr_bus.h_sdw_slave_debugfs_exit.c' source_filename = "AnghaBench/linux/drivers/soundwire/extr_bus.h_sdw_slave_debugfs_exit.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @sdw_slave_debugfs_exit], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define internal void @sdw_slave_debugfs_exit(ptr nocapture readnone %0) #0 { ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_drivers_soundwire_extr_bus.h_sdw_slave_debugfs_exit
; ModuleID = 'AnghaBench/linux/arch/x86/events/intel/extr_core.c_core_guest_get_msrs.c' source_filename = "AnghaBench/linux/arch/x86/events/intel/extr_core.c_core_guest_get_msrs.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_6__ = type { i32 } %struct.cpu_hw_events = type { i32, ptr, ptr } %struct.perf_guest_switch_msr = type { i32, i32, i32 } %struct.perf_event = type { %struct.TYPE_5__, %struct.TYPE_4__ } %struct.TYPE_5__ = type { i64, i64 } %struct.TYPE_4__ = type { i32 } @cpu_hw_events = dso_local global i32 0, align 4 @x86_pmu = dso_local local_unnamed_addr global %struct.TYPE_6__ zeroinitializer, align 4 @ARCH_PERFMON_EVENTSEL_ENABLE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @core_guest_get_msrs], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal ptr @core_guest_get_msrs(ptr nocapture noundef writeonly %0) #0 { %2 = tail call ptr @this_cpu_ptr(ptr noundef nonnull @cpu_hw_events) #2 %3 = getelementptr inbounds %struct.cpu_hw_events, ptr %2, i64 0, i32 2 %4 = load ptr, ptr %3, align 8, !tbaa !5 %5 = load i32, ptr @x86_pmu, align 4, !tbaa !11 %6 = icmp sgt i32 %5, 0 br i1 %6, label %7, label %43 7: ; preds = %1 %8 = getelementptr inbounds %struct.cpu_hw_events, ptr %2, i64 0, i32 1 br label %9 9: ; preds = %7, %38 %10 = phi i64 [ 0, %7 ], [ %39, %38 ] %11 = load ptr, ptr %8, align 8, !tbaa !13 %12 = getelementptr inbounds ptr, ptr %11, i64 %10 %13 = load ptr, ptr %12, align 8, !tbaa !14 %14 = trunc i64 %10 to i32 %15 = tail call i32 @x86_pmu_config_addr(i32 noundef %14) #2 %16 = getelementptr inbounds %struct.perf_guest_switch_msr, ptr %4, i64 %10 %17 = getelementptr inbounds %struct.perf_guest_switch_msr, ptr %4, i64 %10, i32 2 store i32 %15, ptr %17, align 4, !tbaa !15 %18 = getelementptr inbounds %struct.perf_guest_switch_msr, ptr %4, i64 %10, i32 1 store i32 0, ptr %18, align 4, !tbaa !17 store i32 0, ptr %16, align 4, !tbaa !18 %19 = load i32, ptr %2, align 8, !tbaa !19 %20 = tail call i32 @test_bit(i32 noundef %14, i32 noundef %19) #2 %21 = icmp eq i32 %20, 0 br i1 %21, label %38, label %22 22: ; preds = %9 %23 = getelementptr inbounds %struct.perf_event, ptr %13, i64 0, i32 1 %24 = load i32, ptr %23, align 8, !tbaa !20 %25 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !25 %26 = or i32 %25, %24 store i32 %26, ptr %18, align 4, !tbaa !17 store i32 %26, ptr %16, align 4, !tbaa !18 %27 = getelementptr inbounds %struct.TYPE_5__, ptr %13, i64 0, i32 1 %28 = load i64, ptr %27, align 8, !tbaa !26 %29 = icmp eq i64 %28, 0 br i1 %29, label %30, label %33 30: ; preds = %22 %31 = load i64, ptr %13, align 8, !tbaa !27 %32 = icmp eq i64 %31, 0 br i1 %32, label %38, label %33 33: ; preds = %30, %22 %34 = phi ptr [ %16, %22 ], [ %18, %30 ] %35 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !25 %36 = xor i32 %35, -1 %37 = and i32 %26, %36 store i32 %37, ptr %34, align 4, !tbaa !25 br label %38 38: ; preds = %33, %30, %9 %39 = add nuw nsw i64 %10, 1 %40 = load i32, ptr @x86_pmu, align 4, !tbaa !11 %41 = sext i32 %40 to i64 %42 = icmp slt i64 %39, %41 br i1 %42, label %9, label %43, !llvm.loop !28 43: ; preds = %38, %1 %44 = phi i32 [ %5, %1 ], [ %40, %38 ] store i32 %44, ptr %0, align 4, !tbaa !25 ret ptr %4 } declare ptr @this_cpu_ptr(ptr noundef) local_unnamed_addr #1 declare i32 @x86_pmu_config_addr(i32 noundef) local_unnamed_addr #1 declare i32 @test_bit(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 16} !6 = !{!"cpu_hw_events", !7, i64 0, !10, i64 8, !10, i64 16} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!12, !7, i64 0} !12 = !{!"TYPE_6__", !7, i64 0} !13 = !{!6, !10, i64 8} !14 = !{!10, !10, i64 0} !15 = !{!16, !7, i64 8} !16 = !{!"perf_guest_switch_msr", !7, i64 0, !7, i64 4, !7, i64 8} !17 = !{!16, !7, i64 4} !18 = !{!16, !7, i64 0} !19 = !{!6, !7, i64 0} !20 = !{!21, !7, i64 16} !21 = !{!"perf_event", !22, i64 0, !24, i64 16} !22 = !{!"TYPE_5__", !23, i64 0, !23, i64 8} !23 = !{!"long", !8, i64 0} !24 = !{!"TYPE_4__", !7, i64 0} !25 = !{!7, !7, i64 0} !26 = !{!21, !23, i64 8} !27 = !{!21, !23, i64 0} !28 = distinct !{!28, !29} !29 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/arch/x86/events/intel/extr_core.c_core_guest_get_msrs.c' source_filename = "AnghaBench/linux/arch/x86/events/intel/extr_core.c_core_guest_get_msrs.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_6__ = type { i32 } %struct.perf_guest_switch_msr = type { i32, i32, i32 } @cpu_hw_events = common global i32 0, align 4 @x86_pmu = common local_unnamed_addr global %struct.TYPE_6__ zeroinitializer, align 4 @ARCH_PERFMON_EVENTSEL_ENABLE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @core_guest_get_msrs], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal ptr @core_guest_get_msrs(ptr nocapture noundef writeonly %0) #0 { %2 = tail call ptr @this_cpu_ptr(ptr noundef nonnull @cpu_hw_events) #2 %3 = getelementptr inbounds i8, ptr %2, i64 16 %4 = load ptr, ptr %3, align 8, !tbaa !6 %5 = load i32, ptr @x86_pmu, align 4, !tbaa !12 %6 = icmp sgt i32 %5, 0 br i1 %6, label %7, label %43 7: ; preds = %1 %8 = getelementptr inbounds i8, ptr %2, i64 8 br label %9 9: ; preds = %7, %38 %10 = phi i64 [ 0, %7 ], [ %39, %38 ] %11 = load ptr, ptr %8, align 8, !tbaa !14 %12 = getelementptr inbounds ptr, ptr %11, i64 %10 %13 = load ptr, ptr %12, align 8, !tbaa !15 %14 = trunc nuw nsw i64 %10 to i32 %15 = tail call i32 @x86_pmu_config_addr(i32 noundef %14) #2 %16 = getelementptr inbounds %struct.perf_guest_switch_msr, ptr %4, i64 %10 %17 = getelementptr inbounds i8, ptr %16, i64 8 store i32 %15, ptr %17, align 4, !tbaa !16 %18 = getelementptr inbounds i8, ptr %16, i64 4 store <2 x i32> zeroinitializer, ptr %16, align 4, !tbaa !18 %19 = load i32, ptr %2, align 8, !tbaa !19 %20 = tail call i32 @test_bit(i32 noundef %14, i32 noundef %19) #2 %21 = icmp eq i32 %20, 0 br i1 %21, label %38, label %22 22: ; preds = %9 %23 = getelementptr inbounds i8, ptr %13, i64 16 %24 = load i32, ptr %23, align 8, !tbaa !20 %25 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !18 %26 = or i32 %25, %24 store i32 %26, ptr %18, align 4, !tbaa !25 store i32 %26, ptr %16, align 4, !tbaa !26 %27 = getelementptr inbounds i8, ptr %13, i64 8 %28 = load i64, ptr %27, align 8, !tbaa !27 %29 = icmp eq i64 %28, 0 br i1 %29, label %30, label %33 30: ; preds = %22 %31 = load i64, ptr %13, align 8, !tbaa !28 %32 = icmp eq i64 %31, 0 br i1 %32, label %38, label %33 33: ; preds = %30, %22 %34 = phi ptr [ %16, %22 ], [ %18, %30 ] %35 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !18 %36 = xor i32 %35, -1 %37 = and i32 %26, %36 store i32 %37, ptr %34, align 4, !tbaa !18 br label %38 38: ; preds = %33, %30, %9 %39 = add nuw nsw i64 %10, 1 %40 = load i32, ptr @x86_pmu, align 4, !tbaa !12 %41 = sext i32 %40 to i64 %42 = icmp slt i64 %39, %41 br i1 %42, label %9, label %43, !llvm.loop !29 43: ; preds = %38, %1 %44 = phi i32 [ %5, %1 ], [ %40, %38 ] store i32 %44, ptr %0, align 4, !tbaa !18 ret ptr %4 } declare ptr @this_cpu_ptr(ptr noundef) local_unnamed_addr #1 declare i32 @x86_pmu_config_addr(i32 noundef) local_unnamed_addr #1 declare i32 @test_bit(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 16} !7 = !{!"cpu_hw_events", !8, i64 0, !11, i64 8, !11, i64 16} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!13, !8, i64 0} !13 = !{!"TYPE_6__", !8, i64 0} !14 = !{!7, !11, i64 8} !15 = !{!11, !11, i64 0} !16 = !{!17, !8, i64 8} !17 = !{!"perf_guest_switch_msr", !8, i64 0, !8, i64 4, !8, i64 8} !18 = !{!8, !8, i64 0} !19 = !{!7, !8, i64 0} !20 = !{!21, !8, i64 16} !21 = !{!"perf_event", !22, i64 0, !24, i64 16} !22 = !{!"TYPE_5__", !23, i64 0, !23, i64 8} !23 = !{!"long", !9, i64 0} !24 = !{!"TYPE_4__", !8, i64 0} !25 = !{!17, !8, i64 4} !26 = !{!17, !8, i64 0} !27 = !{!21, !23, i64 8} !28 = !{!21, !23, i64 0} !29 = distinct !{!29, !30} !30 = !{!"llvm.loop.mustprogress"}
linux_arch_x86_events_intel_extr_core.c_core_guest_get_msrs
; ModuleID = 'AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_string.c_archive_string_conversion_free.c' source_filename = "AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_string.c_archive_string_conversion_free.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.archive = type { ptr, ptr } ; Function Attrs: nounwind uwtable define dso_local void @archive_string_conversion_free(ptr nocapture noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds %struct.archive, ptr %0, i64 0, i32 1 %3 = load ptr, ptr %2, align 8, !tbaa !5 %4 = icmp eq ptr %3, null br i1 %4, label %10, label %5 5: ; preds = %1, %5 %6 = phi ptr [ %7, %5 ], [ %3, %1 ] %7 = load ptr, ptr %6, align 8, !tbaa !10 %8 = tail call i32 @free_sconv_object(ptr noundef nonnull %6) #2 %9 = icmp eq ptr %7, null br i1 %9, label %10, label %5, !llvm.loop !12 10: ; preds = %5, %1 store ptr null, ptr %2, align 8, !tbaa !5 %11 = load ptr, ptr %0, align 8, !tbaa !14 %12 = tail call i32 @free(ptr noundef %11) #2 store ptr null, ptr %0, align 8, !tbaa !14 ret void } declare i32 @free_sconv_object(ptr noundef) local_unnamed_addr #1 declare i32 @free(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 8} !6 = !{!"archive", !7, i64 0, !7, i64 8} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"archive_string_conv", !7, i64 0} !12 = distinct !{!12, !13} !13 = !{!"llvm.loop.mustprogress"} !14 = !{!6, !7, i64 0}
; ModuleID = 'AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_string.c_archive_string_conversion_free.c' source_filename = "AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_string.c_archive_string_conversion_free.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @archive_string_conversion_free(ptr nocapture noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds i8, ptr %0, i64 8 %3 = load ptr, ptr %2, align 8, !tbaa !6 %4 = icmp eq ptr %3, null br i1 %4, label %10, label %5 5: ; preds = %1, %5 %6 = phi ptr [ %7, %5 ], [ %3, %1 ] %7 = load ptr, ptr %6, align 8, !tbaa !11 %8 = tail call i32 @free_sconv_object(ptr noundef nonnull %6) #2 %9 = icmp eq ptr %7, null br i1 %9, label %10, label %5, !llvm.loop !13 10: ; preds = %5, %1 store ptr null, ptr %2, align 8, !tbaa !6 %11 = load ptr, ptr %0, align 8, !tbaa !15 %12 = tail call i32 @free(ptr noundef %11) #2 store ptr null, ptr %0, align 8, !tbaa !15 ret void } declare i32 @free_sconv_object(ptr noundef) local_unnamed_addr #1 declare i32 @free(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 8} !7 = !{!"archive", !8, i64 0, !8, i64 8} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 0} !12 = !{!"archive_string_conv", !8, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"} !15 = !{!7, !8, i64 0}
freebsd_contrib_libarchive_libarchive_extr_archive_string.c_archive_string_conversion_free
; ModuleID = 'AnghaBench/freebsd/sys/arm/mv/extr_timer.c_mv_watchdog_disable_armv5.c' source_filename = "AnghaBench/freebsd/sys/arm/mv/extr_timer.c_mv_watchdog_disable_armv5.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i32, i32 } @CPU_TIMER2_EN = dso_local local_unnamed_addr global i32 0, align 4 @CPU_TIMER2_AUTO = dso_local local_unnamed_addr global i32 0, align 4 @RSTOUTn_MASK = dso_local local_unnamed_addr global i32 0, align 4 @WD_RST_OUT_EN = dso_local local_unnamed_addr global i32 0, align 4 @BRIDGE_IRQ_MASK = dso_local local_unnamed_addr global i32 0, align 4 @IRQ_TIMER_WD_MASK = dso_local local_unnamed_addr global i32 0, align 4 @timer_softc = dso_local local_unnamed_addr global ptr null, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @mv_watchdog_disable_armv5], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @mv_watchdog_disable_armv5() #0 { %1 = tail call i32 (...) @mv_get_timer_control() #2 %2 = load i32, ptr @CPU_TIMER2_EN, align 4, !tbaa !5 %3 = load i32, ptr @CPU_TIMER2_AUTO, align 4, !tbaa !5 %4 = or i32 %3, %2 %5 = xor i32 %4, -1 %6 = and i32 %1, %5 %7 = tail call i32 @mv_set_timer_control(i32 noundef %6) #2 %8 = load i32, ptr @RSTOUTn_MASK, align 4, !tbaa !5 %9 = tail call i32 @read_cpu_ctrl(i32 noundef %8) #2 %10 = load i32, ptr @WD_RST_OUT_EN, align 4, !tbaa !5 %11 = xor i32 %10, -1 %12 = and i32 %9, %11 %13 = load i32, ptr @RSTOUTn_MASK, align 4, !tbaa !5 %14 = tail call i32 @write_cpu_ctrl(i32 noundef %13, i32 noundef %12) #2 %15 = load i32, ptr @BRIDGE_IRQ_MASK, align 4, !tbaa !5 %16 = tail call i32 @read_cpu_ctrl(i32 noundef %15) #2 %17 = load i32, ptr @IRQ_TIMER_WD_MASK, align 4, !tbaa !5 %18 = xor i32 %17, -1 %19 = and i32 %16, %18 %20 = load i32, ptr @BRIDGE_IRQ_MASK, align 4, !tbaa !5 %21 = tail call i32 @write_cpu_ctrl(i32 noundef %20, i32 noundef %19) #2 %22 = load ptr, ptr @timer_softc, align 8, !tbaa !9 %23 = load ptr, ptr %22, align 8, !tbaa !11 %24 = getelementptr inbounds %struct.TYPE_3__, ptr %23, i64 0, i32 1 %25 = load i32, ptr %24, align 4, !tbaa !13 %26 = tail call i32 @read_cpu_ctrl(i32 noundef %25) #2 %27 = load ptr, ptr @timer_softc, align 8, !tbaa !9 %28 = load ptr, ptr %27, align 8, !tbaa !11 %29 = load i32, ptr %28, align 4, !tbaa !15 %30 = and i32 %29, %26 %31 = getelementptr inbounds %struct.TYPE_3__, ptr %28, i64 0, i32 1 %32 = load i32, ptr %31, align 4, !tbaa !13 %33 = tail call i32 @write_cpu_ctrl(i32 noundef %32, i32 noundef %30) #2 ret void } declare i32 @mv_get_timer_control(...) local_unnamed_addr #1 declare i32 @mv_set_timer_control(i32 noundef) local_unnamed_addr #1 declare i32 @read_cpu_ctrl(i32 noundef) local_unnamed_addr #1 declare i32 @write_cpu_ctrl(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"any pointer", !7, i64 0} !11 = !{!12, !10, i64 0} !12 = !{!"TYPE_4__", !10, i64 0} !13 = !{!14, !6, i64 4} !14 = !{!"TYPE_3__", !6, i64 0, !6, i64 4} !15 = !{!14, !6, i64 0}
; ModuleID = 'AnghaBench/freebsd/sys/arm/mv/extr_timer.c_mv_watchdog_disable_armv5.c' source_filename = "AnghaBench/freebsd/sys/arm/mv/extr_timer.c_mv_watchdog_disable_armv5.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @CPU_TIMER2_EN = common local_unnamed_addr global i32 0, align 4 @CPU_TIMER2_AUTO = common local_unnamed_addr global i32 0, align 4 @RSTOUTn_MASK = common local_unnamed_addr global i32 0, align 4 @WD_RST_OUT_EN = common local_unnamed_addr global i32 0, align 4 @BRIDGE_IRQ_MASK = common local_unnamed_addr global i32 0, align 4 @IRQ_TIMER_WD_MASK = common local_unnamed_addr global i32 0, align 4 @timer_softc = common local_unnamed_addr global ptr null, align 8 @llvm.used = appending global [1 x ptr] [ptr @mv_watchdog_disable_armv5], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @mv_watchdog_disable_armv5() #0 { %1 = tail call i32 @mv_get_timer_control() #2 %2 = load i32, ptr @CPU_TIMER2_EN, align 4, !tbaa !6 %3 = load i32, ptr @CPU_TIMER2_AUTO, align 4, !tbaa !6 %4 = or i32 %3, %2 %5 = xor i32 %4, -1 %6 = and i32 %1, %5 %7 = tail call i32 @mv_set_timer_control(i32 noundef %6) #2 %8 = load i32, ptr @RSTOUTn_MASK, align 4, !tbaa !6 %9 = tail call i32 @read_cpu_ctrl(i32 noundef %8) #2 %10 = load i32, ptr @WD_RST_OUT_EN, align 4, !tbaa !6 %11 = xor i32 %10, -1 %12 = and i32 %9, %11 %13 = load i32, ptr @RSTOUTn_MASK, align 4, !tbaa !6 %14 = tail call i32 @write_cpu_ctrl(i32 noundef %13, i32 noundef %12) #2 %15 = load i32, ptr @BRIDGE_IRQ_MASK, align 4, !tbaa !6 %16 = tail call i32 @read_cpu_ctrl(i32 noundef %15) #2 %17 = load i32, ptr @IRQ_TIMER_WD_MASK, align 4, !tbaa !6 %18 = xor i32 %17, -1 %19 = and i32 %16, %18 %20 = load i32, ptr @BRIDGE_IRQ_MASK, align 4, !tbaa !6 %21 = tail call i32 @write_cpu_ctrl(i32 noundef %20, i32 noundef %19) #2 %22 = load ptr, ptr @timer_softc, align 8, !tbaa !10 %23 = load ptr, ptr %22, align 8, !tbaa !12 %24 = getelementptr inbounds i8, ptr %23, i64 4 %25 = load i32, ptr %24, align 4, !tbaa !14 %26 = tail call i32 @read_cpu_ctrl(i32 noundef %25) #2 %27 = load ptr, ptr @timer_softc, align 8, !tbaa !10 %28 = load ptr, ptr %27, align 8, !tbaa !12 %29 = load i32, ptr %28, align 4, !tbaa !16 %30 = and i32 %29, %26 %31 = getelementptr inbounds i8, ptr %28, i64 4 %32 = load i32, ptr %31, align 4, !tbaa !14 %33 = tail call i32 @write_cpu_ctrl(i32 noundef %32, i32 noundef %30) #2 ret void } declare i32 @mv_get_timer_control(...) local_unnamed_addr #1 declare i32 @mv_set_timer_control(i32 noundef) local_unnamed_addr #1 declare i32 @read_cpu_ctrl(i32 noundef) local_unnamed_addr #1 declare i32 @write_cpu_ctrl(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"TYPE_4__", !11, i64 0} !14 = !{!15, !7, i64 4} !15 = !{!"TYPE_3__", !7, i64 0, !7, i64 4} !16 = !{!15, !7, i64 0}
freebsd_sys_arm_mv_extr_timer.c_mv_watchdog_disable_armv5
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/helix/rev2/keymaps/yshrsmz/extr_keymap.c_update_tri_layer_RGB.c' source_filename = "AnghaBench/qmk_firmware/keyboards/helix/rev2/keymaps/yshrsmz/extr_keymap.c_update_tri_layer_RGB.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local void @update_tri_layer_RGB(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = tail call i64 @IS_LAYER_ON(i32 noundef %0) #2 %5 = icmp eq i64 %4, 0 br i1 %5, label %11, label %6 6: ; preds = %3 %7 = tail call i64 @IS_LAYER_ON(i32 noundef %1) #2 %8 = icmp eq i64 %7, 0 br i1 %8, label %11, label %9 9: ; preds = %6 %10 = tail call i32 @layer_on(i32 noundef %2) #2 br label %13 11: ; preds = %6, %3 %12 = tail call i32 @layer_off(i32 noundef %2) #2 br label %13 13: ; preds = %11, %9 ret void } declare i64 @IS_LAYER_ON(i32 noundef) local_unnamed_addr #1 declare i32 @layer_on(i32 noundef) local_unnamed_addr #1 declare i32 @layer_off(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/helix/rev2/keymaps/yshrsmz/extr_keymap.c_update_tri_layer_RGB.c' source_filename = "AnghaBench/qmk_firmware/keyboards/helix/rev2/keymaps/yshrsmz/extr_keymap.c_update_tri_layer_RGB.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @update_tri_layer_RGB(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = tail call i64 @IS_LAYER_ON(i32 noundef %0) #2 %5 = icmp eq i64 %4, 0 br i1 %5, label %11, label %6 6: ; preds = %3 %7 = tail call i64 @IS_LAYER_ON(i32 noundef %1) #2 %8 = icmp eq i64 %7, 0 br i1 %8, label %11, label %9 9: ; preds = %6 %10 = tail call i32 @layer_on(i32 noundef %2) #2 br label %13 11: ; preds = %6, %3 %12 = tail call i32 @layer_off(i32 noundef %2) #2 br label %13 13: ; preds = %11, %9 ret void } declare i64 @IS_LAYER_ON(i32 noundef) local_unnamed_addr #1 declare i32 @layer_on(i32 noundef) local_unnamed_addr #1 declare i32 @layer_off(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
qmk_firmware_keyboards_helix_rev2_keymaps_yshrsmz_extr_keymap.c_update_tri_layer_RGB