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lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
Demonstrate support for new virtio-net features
VIRTIO_NET_HDR_F_TSTAMP
This is not intended to be merged.
A full feature test also requires a patched qemu binary that knows
these features and negotiates correct vnet_hdr_sz in
virtio_net_set_mrg_rx_bufs. See
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Not-yet-signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
drivers/net/tun.c | 30 ++++++++++++++++++------------
1 file changed, 18 insertions(+), 12 deletions(-)
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 8192740357a09..aa988a9c4bc99 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -2065,23 +2065,29 @@ static ssize_t tun_put_user(struct tun_struct *tun,
}
if (vnet_hdr_sz) {
- struct virtio_net_hdr_v1_hash_tunnel hdr;
- struct virtio_net_hdr *gso;
+ struct virtio_net_hdr_v1_hash_tunnel_ts hdr;
+
+ memset(&hdr, 0, sizeof(hdr));
ret = tun_vnet_hdr_tnl_from_skb(tun->flags, tun->dev, skb,
- &hdr);
+ (struct virtio_net_hdr_v1_hash_tunnel *)&hdr);
if (ret)
return ret;
- /*
- * Drop the packet if the configured header size is too small
- * WRT the enabled offloads.
- */
- gso = (struct virtio_net_hdr *)&hdr;
- ret = __tun_vnet_hdr_put(vnet_hdr_sz, tun->dev->features,
- iter, gso);
- if (ret)
- return ret;
+ if (vnet_hdr_sz >= sizeof(struct virtio_net_hdr_v1_hash_tunnel_ts)) {
+ __le64 tstamp = cpu_to_le64(ktime_get_ns());
+
+ hdr.tstamp_0 = (tstamp & 0x000000000000ffffULL) >> 0;
+ hdr.tstamp_1 = (tstamp & 0x00000000ffff0000ULL) >> 16;
+ hdr.tstamp_2 = (tstamp & 0x0000ffff00000000ULL) >> 32;
+ hdr.tstamp_3 = (tstamp & 0xffff000000000000ULL) >> 48;
+ }
+
+ if (unlikely(iov_iter_count(iter) < vnet_hdr_sz))
+ return -EINVAL;
+
+ if (unlikely(copy_to_iter(&hdr, vnet_hdr_sz, iter) != vnet_hdr_sz))
+ return -EFAULT;
}
if (vlan_hlen) {
--
2.52.0
|
{
"author": "Steffen Trumtrar <s.trumtrar@pengutronix.de>",
"date": "Thu, 29 Jan 2026 09:06:41 +0100",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
Add optional hardware rx timestamp offload for virtio-net.
Introduce virtio feature VIRTIO_NET_F_TSTAMP. If negotiated, the
virtio-net header is expanded with room for a timestamp.
To get and set the hwtstamp the functions ndo_hwtstamp_set/get need
to be implemented. This allows filtering the packets and only time stamp
the packets where the filter matches. This way, the timestamping can
be en/disabled at runtime.
Tested:
guest: ./timestamping eth0 \
SOF_TIMESTAMPING_RAW_HARDWARE \
SOF_TIMESTAMPING_RX_HARDWARE
host: nc -4 -u 192.168.1.1 319
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
--
Changes to last version:
- rework series to use flow filters
- add new struct virtio_net_hdr_v1_hash_tunnel_ts
- original work done by: Willem de Bruijn <willemb@google.com>
---
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
2 files changed, 133 insertions(+), 12 deletions(-)
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index 1bb3aeca66c6e..4e8d9b20c1b34 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -429,6 +429,9 @@ struct virtnet_info {
struct virtio_net_rss_config_trailer rss_trailer;
u8 rss_hash_key_data[VIRTIO_NET_RSS_MAX_KEY_SIZE];
+ /* Device passes time stamps from the driver */
+ bool has_tstamp;
+
/* Has control virtqueue */
bool has_cvq;
@@ -475,6 +478,8 @@ struct virtnet_info {
struct control_buf *ctrl;
+ struct kernel_hwtstamp_config tstamp_config;
+
/* Ethtool settings */
u8 duplex;
u32 speed;
@@ -511,6 +516,7 @@ struct virtio_net_common_hdr {
struct virtio_net_hdr_mrg_rxbuf mrg_hdr;
struct virtio_net_hdr_v1_hash hash_v1_hdr;
struct virtio_net_hdr_v1_hash_tunnel tnl_hdr;
+ struct virtio_net_hdr_v1_hash_tunnel_ts ts_hdr;
};
};
@@ -682,6 +688,13 @@ skb_vnet_common_hdr(struct sk_buff *skb)
return (struct virtio_net_common_hdr *)skb->cb;
}
+static inline struct virtio_net_hdr_v1_hash_tunnel_ts *skb_vnet_hdr_ts(struct sk_buff *skb)
+{
+ BUILD_BUG_ON(sizeof(struct virtio_net_hdr_v1_hash_tunnel_ts) > sizeof(skb->cb));
+
+ return (void *)skb->cb;
+}
+
/*
* private is used to chain pages for big packets, put the whole
* most recent used list in the beginning for reuse
@@ -2560,6 +2573,15 @@ virtio_net_hash_value(const struct virtio_net_hdr_v1_hash *hdr_hash)
(__le16_to_cpu(hdr_hash->hash_value_hi) << 16);
}
+static inline u64
+virtio_net_tstamp_value(const struct virtio_net_hdr_v1_hash_tunnel_ts *hdr_hash_ts)
+{
+ return (u64)__le16_to_cpu(hdr_hash_ts->tstamp_0) |
+ ((u64)__le16_to_cpu(hdr_hash_ts->tstamp_1) << 16) |
+ ((u64)__le16_to_cpu(hdr_hash_ts->tstamp_2) << 32) |
+ ((u64)__le16_to_cpu(hdr_hash_ts->tstamp_3) << 48);
+}
+
static void virtio_skb_set_hash(const struct virtio_net_hdr_v1_hash *hdr_hash,
struct sk_buff *skb)
{
@@ -2589,6 +2611,18 @@ static void virtio_skb_set_hash(const struct virtio_net_hdr_v1_hash *hdr_hash,
skb_set_hash(skb, virtio_net_hash_value(hdr_hash), rss_hash_type);
}
+static inline void virtnet_record_rx_tstamp(const struct virtnet_info *vi,
+ struct sk_buff *skb)
+{
+ struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);
+ const struct virtio_net_hdr_v1_hash_tunnel_ts *h = skb_vnet_hdr_ts(skb);
+ u64 ts;
+
+ ts = virtio_net_tstamp_value(h);
+ memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
+ shhwtstamps->hwtstamp = ns_to_ktime(ts);
+}
+
static void virtnet_receive_done(struct virtnet_info *vi, struct receive_queue *rq,
struct sk_buff *skb, u8 flags)
{
@@ -2617,6 +2651,8 @@ static void virtnet_receive_done(struct virtnet_info *vi, struct receive_queue *
goto frame_err;
}
+ if (vi->has_tstamp && vi->tstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)
+ virtnet_record_rx_tstamp(vi, skb);
skb_record_rx_queue(skb, vq2rxq(rq->vq));
skb->protocol = eth_type_trans(skb, dev);
pr_debug("Receiving skb proto 0x%04x len %i type %i\n",
@@ -3321,7 +3357,7 @@ static int xmit_skb(struct send_queue *sq, struct sk_buff *skb, bool orphan)
{
const unsigned char *dest = ((struct ethhdr *)skb->data)->h_dest;
struct virtnet_info *vi = sq->vq->vdev->priv;
- struct virtio_net_hdr_v1_hash_tunnel *hdr;
+ struct virtio_net_hdr_v1_hash_tunnel_ts *hdr;
int num_sg;
unsigned hdr_len = vi->hdr_len;
bool can_push;
@@ -3329,8 +3365,8 @@ static int xmit_skb(struct send_queue *sq, struct sk_buff *skb, bool orphan)
pr_debug("%s: xmit %p %pM\n", vi->dev->name, skb, dest);
/* Make sure it's safe to cast between formats */
- BUILD_BUG_ON(__alignof__(*hdr) != __alignof__(hdr->hash_hdr));
- BUILD_BUG_ON(__alignof__(*hdr) != __alignof__(hdr->hash_hdr.hdr));
+ BUILD_BUG_ON(__alignof__(*hdr) != __alignof__(hdr->tnl.hash_hdr));
+ BUILD_BUG_ON(__alignof__(*hdr) != __alignof__(hdr->tnl.hash_hdr.hdr));
can_push = vi->any_header_sg &&
!((unsigned long)skb->data & (__alignof__(*hdr) - 1)) &&
@@ -3338,18 +3374,18 @@ static int xmit_skb(struct send_queue *sq, struct sk_buff *skb, bool orphan)
/* Even if we can, don't push here yet as this would skew
* csum_start offset below. */
if (can_push)
- hdr = (struct virtio_net_hdr_v1_hash_tunnel *)(skb->data -
- hdr_len);
+ hdr = (struct virtio_net_hdr_v1_hash_tunnel_ts *)(skb->data -
+ hdr_len);
else
- hdr = &skb_vnet_common_hdr(skb)->tnl_hdr;
+ hdr = &skb_vnet_common_hdr(skb)->ts_hdr;
- if (virtio_net_hdr_tnl_from_skb(skb, hdr, vi->tx_tnl,
+ if (virtio_net_hdr_tnl_from_skb(skb, &hdr->tnl, vi->tx_tnl,
virtio_is_little_endian(vi->vdev), 0,
false))
return -EPROTO;
if (vi->mergeable_rx_bufs)
- hdr->hash_hdr.hdr.num_buffers = 0;
+ hdr->tnl.hash_hdr.hdr.num_buffers = 0;
sg_init_table(sq->sg, skb_shinfo(skb)->nr_frags + (can_push ? 1 : 2));
if (can_push) {
@@ -5563,6 +5599,22 @@ static int virtnet_get_per_queue_coalesce(struct net_device *dev,
return 0;
}
+static int virtnet_get_ts_info(struct net_device *dev,
+ struct kernel_ethtool_ts_info *info)
+{
+ /* setup default software timestamp */
+ ethtool_op_get_ts_info(dev, info);
+
+ info->rx_filters = (BIT(HWTSTAMP_FILTER_NONE) |
+ BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
+ BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
+ BIT(HWTSTAMP_FILTER_ALL));
+
+ info->tx_types = HWTSTAMP_TX_OFF;
+
+ return 0;
+}
+
static void virtnet_init_settings(struct net_device *dev)
{
struct virtnet_info *vi = netdev_priv(dev);
@@ -5658,7 +5710,7 @@ static const struct ethtool_ops virtnet_ethtool_ops = {
.get_ethtool_stats = virtnet_get_ethtool_stats,
.set_channels = virtnet_set_channels,
.get_channels = virtnet_get_channels,
- .get_ts_info = ethtool_op_get_ts_info,
+ .get_ts_info = virtnet_get_ts_info,
.get_link_ksettings = virtnet_get_link_ksettings,
.set_link_ksettings = virtnet_set_link_ksettings,
.set_coalesce = virtnet_set_coalesce,
@@ -6242,6 +6294,58 @@ static void virtnet_tx_timeout(struct net_device *dev, unsigned int txqueue)
jiffies_to_usecs(jiffies - READ_ONCE(txq->trans_start)));
}
+static int virtnet_hwtstamp_get(struct net_device *dev,
+ struct kernel_hwtstamp_config *tstamp_config)
+{
+ struct virtnet_info *vi = netdev_priv(dev);
+
+ if (!netif_running(dev))
+ return -EINVAL;
+
+ *tstamp_config = vi->tstamp_config;
+
+ return 0;
+}
+
+static int virtnet_hwtstamp_set(struct net_device *dev,
+ struct kernel_hwtstamp_config *tstamp_config,
+ struct netlink_ext_ack *extack)
+{
+ struct virtnet_info *vi = netdev_priv(dev);
+
+ if (!netif_running(dev))
+ return -EINVAL;
+
+ switch (tstamp_config->rx_filter) {
+ case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
+ case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
+ break;
+ case HWTSTAMP_FILTER_PTP_V2_EVENT:
+ case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
+ case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
+ case HWTSTAMP_FILTER_PTP_V2_SYNC:
+ case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
+ case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
+ case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
+ case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
+ case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
+ tstamp_config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
+ break;
+ case HWTSTAMP_FILTER_NONE:
+ break;
+ case HWTSTAMP_FILTER_ALL:
+ tstamp_config->rx_filter = HWTSTAMP_FILTER_ALL;
+ break;
+ default:
+ tstamp_config->rx_filter = HWTSTAMP_FILTER_ALL;
+ return -ERANGE;
+ }
+
+ vi->tstamp_config = *tstamp_config;
+
+ return 0;
+}
+
static int virtnet_init_irq_moder(struct virtnet_info *vi)
{
u8 profile_flags = 0, coal_flags = 0;
@@ -6289,6 +6393,8 @@ static const struct net_device_ops virtnet_netdev = {
.ndo_get_phys_port_name = virtnet_get_phys_port_name,
.ndo_set_features = virtnet_set_features,
.ndo_tx_timeout = virtnet_tx_timeout,
+ .ndo_hwtstamp_set = virtnet_hwtstamp_set,
+ .ndo_hwtstamp_get = virtnet_hwtstamp_get,
};
static void virtnet_config_changed_work(struct work_struct *work)
@@ -6911,6 +7017,9 @@ static int virtnet_probe(struct virtio_device *vdev)
if (virtio_has_feature(vdev, VIRTIO_NET_F_HASH_REPORT))
vi->has_rss_hash_report = true;
+ if (virtio_has_feature(vdev, VIRTIO_NET_F_TSTAMP))
+ vi->has_tstamp = true;
+
if (virtio_has_feature(vdev, VIRTIO_NET_F_RSS)) {
vi->has_rss = true;
@@ -6945,8 +7054,10 @@ static int virtnet_probe(struct virtio_device *vdev)
dev->xdp_metadata_ops = &virtnet_xdp_metadata_ops;
}
- if (virtio_has_feature(vdev, VIRTIO_NET_F_GUEST_UDP_TUNNEL_GSO) ||
- virtio_has_feature(vdev, VIRTIO_NET_F_HOST_UDP_TUNNEL_GSO))
+ if (vi->has_tstamp)
+ vi->hdr_len = sizeof(struct virtio_net_hdr_v1_hash_tunnel_ts);
+ else if (virtio_has_feature(vdev, VIRTIO_NET_F_GUEST_UDP_TUNNEL_GSO) ||
+ virtio_has_feature(vdev, VIRTIO_NET_F_HOST_UDP_TUNNEL_GSO))
vi->hdr_len = sizeof(struct virtio_net_hdr_v1_hash_tunnel);
else if (vi->has_rss_hash_report)
vi->hdr_len = sizeof(struct virtio_net_hdr_v1_hash);
@@ -7269,7 +7380,8 @@ static struct virtio_device_id id_table[] = {
VIRTIO_NET_F_SPEED_DUPLEX, VIRTIO_NET_F_STANDBY, \
VIRTIO_NET_F_RSS, VIRTIO_NET_F_HASH_REPORT, VIRTIO_NET_F_NOTF_COAL, \
VIRTIO_NET_F_VQ_NOTF_COAL, \
- VIRTIO_NET_F_GUEST_HDRLEN, VIRTIO_NET_F_DEVICE_STATS
+ VIRTIO_NET_F_GUEST_HDRLEN, VIRTIO_NET_F_DEVICE_STATS, \
+ VIRTIO_NET_F_TSTAMP
static unsigned int features[] = {
VIRTNET_FEATURES,
diff --git a/include/uapi/linux/virtio_net.h b/include/uapi/linux/virtio_net.h
index 1db45b01532b5..9f967575956b8 100644
--- a/include/uapi/linux/virtio_net.h
+++ b/include/uapi/linux/virtio_net.h
@@ -56,6 +56,7 @@
#define VIRTIO_NET_F_MQ 22 /* Device supports Receive Flow
* Steering */
#define VIRTIO_NET_F_CTRL_MAC_ADDR 23 /* Set MAC address */
+#define VIRTIO_NET_F_TSTAMP 49 /* Device sends TAI receive time */
#define VIRTIO_NET_F_DEVICE_STATS 50 /* Device can provide device-level statistics. */
#define VIRTIO_NET_F_VQ_NOTF_COAL 52 /* Device supports virtqueue notification coalescing */
#define VIRTIO_NET_F_NOTF_COAL 53 /* Device supports notifications coalescing */
@@ -215,6 +216,14 @@ struct virtio_net_hdr_v1_hash_tunnel {
__le16 inner_nh_offset;
};
+struct virtio_net_hdr_v1_hash_tunnel_ts {
+ struct virtio_net_hdr_v1_hash_tunnel tnl;
+ __le16 tstamp_0;
+ __le16 tstamp_1;
+ __le16 tstamp_2;
+ __le16 tstamp_3;
+};
+
#ifndef VIRTIO_NET_NO_LEGACY
/* This header comes first in the scatter-gather list.
* For legacy virtio, if VIRTIO_F_ANY_LAYOUT is not negotiated, it must
--
2.52.0
|
{
"author": "Steffen Trumtrar <s.trumtrar@pengutronix.de>",
"date": "Thu, 29 Jan 2026 09:06:42 +0100",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
On Thu, 29 Jan 2026 09:06:42 +0100, Steffen Trumtrar <s.trumtrar@pengutronix.de> wrote:
Since patch #1 used this struct, this one should be placed first in the series.
Also, has the virtio specification process accepted such a draft proposal?
Thanks
|
{
"author": "Xuan Zhuo <xuanzhuo@linux.alibaba.com>",
"date": "Thu, 29 Jan 2026 17:48:25 +0800",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
Hi,
On 2026-01-29 at 17:48 +08, Xuan Zhuo <xuanzhuo@linux.alibaba.com> wrote:
oh, you are right, the order should be the other way around.
I haven't sent the draft yet, because I'm unsure if I understood the way this should be implemented with the flow filter correctly.
If the direction is correct, I'd try and get the specification process going again.
(That is not that easy, if you're not used to it and not that deep into the whole virtio universe ;))
Best regards,
Steffen
--
Pengutronix e.K. | Dipl.-Inform. Steffen Trumtrar |
Steuerwalder Str. 21 | https://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686| Fax: +49-5121-206917-5555 |
|
{
"author": "Steffen Trumtrar <s.trumtrar@pengutronix.de>",
"date": "Thu, 29 Jan 2026 11:08:27 +0100",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
On Thu, 29 Jan 2026 11:08:27 +0100, Steffen Trumtrar <s.trumtrar@pengutronix.de> wrote:
There have been many historical attempts in this area- you may want to take a
look first.
Thanks.
|
{
"author": "Xuan Zhuo <xuanzhuo@linux.alibaba.com>",
"date": "Thu, 29 Jan 2026 19:03:15 +0800",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
syzbot ci has tested the following series
[v2] virtio-net: add flow filter for receive timestamps
https://lore.kernel.org/all/20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de
* [PATCH RFC v2 1/2] tun: support rx-tstamp
* [PATCH RFC v2 2/2] virtio-net: support receive timestamp
and found the following issue:
WARNING in __copy_overflow
Full report is available here:
https://ci.syzbot.org/series/0b35c8c9-603b-4126-ac04-0095faadb2f5
***
WARNING in __copy_overflow
tree: net-next
URL: https://kernel.googlesource.com/pub/scm/linux/kernel/git/netdev/net-next.git
base: ffeafa65b2b26df2f5b5a6118d3174f17bd12ec5
arch: amd64
compiler: Debian clang version 21.1.8 (++20251221033036+2078da43e25a-1~exp1~20251221153213.50), Debian LLD 21.1.8
config: https://ci.syzbot.org/builds/d8316da2-2688-4d74-bbf4-e8412e24d106/config
C repro: https://ci.syzbot.org/findings/96af937a-787b-4fd5-baef-529fc80e0bb7/c_repro
syz repro: https://ci.syzbot.org/findings/96af937a-787b-4fd5-baef-529fc80e0bb7/syz_repro
------------[ cut here ]------------
Buffer overflow detected (32 < 1840)!
WARNING: mm/maccess.c:234 at __copy_overflow+0x17/0x30 mm/maccess.c:234, CPU#0: syz.0.17/5993
Modules linked in:
CPU: 0 UID: 0 PID: 5993 Comm: syz.0.17 Not tainted syzkaller #0 PREEMPT(full)
Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.16.2-debian-1.16.2-1 04/01/2014
RIP: 0010:__copy_overflow+0x1c/0x30 mm/maccess.c:234
Code: 90 90 90 90 90 90 90 90 90 90 90 90 90 90 f3 0f 1e fa 55 53 48 89 f3 89 fd e8 60 b1 c4 ff 48 8d 3d 39 25 d5 0d 89 ee 48 89 da <67> 48 0f b9 3a 5b 5d c3 cc cc cc cc cc cc cc cc cc cc cc cc 90 90
RSP: 0018:ffffc90003b97888 EFLAGS: 00010293
RAX: ffffffff81fdcf50 RBX: 0000000000000730 RCX: ffff88810ccd9d40
RDX: 0000000000000730 RSI: 0000000000000020 RDI: ffffffff8fd2f490
RBP: 0000000000000020 R08: ffffffff8fcec777 R09: 1ffffffff1f9d8ee
R10: dffffc0000000000 R11: ffffffff81742230 R12: dffffc0000000000
R13: 0000000000000000 R14: 0000000000000730 R15: 1ffff92000772f30
FS: 00007f08c446a6c0(0000) GS:ffff88818e32d000(0000) knlGS:0000000000000000
CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 00007f08c4448ff8 CR3: 000000010cec2000 CR4: 00000000000006f0
Call Trace:
<TASK>
copy_overflow include/linux/ucopysize.h:41 [inline]
check_copy_size include/linux/ucopysize.h:50 [inline]
copy_to_iter include/linux/uio.h:219 [inline]
tun_put_user drivers/net/tun.c:2089 [inline]
tun_do_read+0x1f44/0x28a0 drivers/net/tun.c:2190
tun_chr_read_iter+0x13b/0x260 drivers/net/tun.c:2214
do_iter_readv_writev+0x619/0x8c0 fs/read_write.c:-1
vfs_readv+0x288/0x840 fs/read_write.c:1018
do_readv+0x154/0x2e0 fs/read_write.c:1080
do_syscall_x64 arch/x86/entry/syscall_64.c:63 [inline]
do_syscall_64+0xe2/0xf80 arch/x86/entry/syscall_64.c:94
entry_SYSCALL_64_after_hwframe+0x77/0x7f
RIP: 0033:0x7f08c359acb9
Code: ff c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 44 00 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 c7 c1 e8 ff ff ff f7 d8 64 89 01 48
RSP: 002b:00007f08c446a028 EFLAGS: 00000246 ORIG_RAX: 0000000000000013
RAX: ffffffffffffffda RBX: 00007f08c3815fa0 RCX: 00007f08c359acb9
RDX: 0000000000000002 RSI: 0000200000000080 RDI: 0000000000000003
RBP: 00007f08c3608bf7 R08: 0000000000000000 R09: 0000000000000000
R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
R13: 00007f08c3816038 R14: 00007f08c3815fa0 R15: 00007fff6491da78
</TASK>
----------------
Code disassembly (best guess):
0: 90 nop
1: 90 nop
2: 90 nop
3: 90 nop
4: 90 nop
5: 90 nop
6: 90 nop
7: 90 nop
8: 90 nop
9: 90 nop
a: 90 nop
b: 90 nop
c: 90 nop
d: 90 nop
e: f3 0f 1e fa endbr64
12: 55 push %rbp
13: 53 push %rbx
14: 48 89 f3 mov %rsi,%rbx
17: 89 fd mov %edi,%ebp
19: e8 60 b1 c4 ff call 0xffc4b17e
1e: 48 8d 3d 39 25 d5 0d lea 0xdd52539(%rip),%rdi # 0xdd5255e
25: 89 ee mov %ebp,%esi
27: 48 89 da mov %rbx,%rdx
* 2a: 67 48 0f b9 3a ud1 (%edx),%rdi <-- trapping instruction
2f: 5b pop %rbx
30: 5d pop %rbp
31: c3 ret
32: cc int3
33: cc int3
34: cc int3
35: cc int3
36: cc int3
37: cc int3
38: cc int3
39: cc int3
3a: cc int3
3b: cc int3
3c: cc int3
3d: cc int3
3e: 90 nop
3f: 90 nop
***
If these findings have caused you to resend the series or submit a
separate fix, please add the following tag to your commit message:
Tested-by: syzbot@syzkaller.appspotmail.com
---
This report is generated by a bot. It may contain errors.
syzbot ci engineers can be reached at syzkaller@googlegroups.com.
|
{
"author": "syzbot ci <syzbot+ci99a227ab2089b0fa@syzkaller.appspotmail.com>",
"date": "Thu, 29 Jan 2026 05:27:03 -0800",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
Steffen Trumtrar wrote:
Good to see this picked up. I would also still like to see support in
virtio-net for HW timestamps pass-through for virtio-net.
|
{
"author": "Willem de Bruijn <willemdebruijn.kernel@gmail.com>",
"date": "Sun, 01 Feb 2026 16:00:07 -0500",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
Steffen Trumtrar wrote:
This patch refers to a struct that does not exist yet, so this cannot
compile?
|
{
"author": "Willem de Bruijn <willemdebruijn.kernel@gmail.com>",
"date": "Sun, 01 Feb 2026 16:00:49 -0500",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
Steffen Trumtrar wrote:
Jason, Michael: creating a new struct for every field is not very
elegant. Is it time to find a more forward looking approach to
expanding with new fields? Like a TLV, or how netlink structs like
tcp_info are extended with support for legacy users that only use
a truncated struct?
It's fine to implement filters, but also fine to only support ALL or
NONE for simplicity.
In the end it probably depends on what the underlying physical device
supports.
Why the multiple fields, rather than u64.
More broadly: can my old patchset be dusted off as is. Does it require
significant changes?
I only paused it at the time, because I did not have a real device
back-end that was going to support it.
|
{
"author": "Willem de Bruijn <willemdebruijn.kernel@gmail.com>",
"date": "Sun, 01 Feb 2026 16:05:54 -0500",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
On 2026-02-01 at 16:05 -05, Willem de Bruijn <willemdebruijn.kernel@gmail.com> wrote:
Yes, this gets complicated real fast and leads to really long calls for all the nested fields. If there is a different way, I'd prefer that.
Should have added a comment, but this is based on this patch
c3838262b824c71c145cd3668722e99a69bc9cd9
virtio_net: fix alignment for virtio_net_hdr_v1_hash
Changing alignment of header would mean it's no longer safe to cast a
2 byte aligned pointer between formats. Use two 16 bit fields to make
it 2 byte aligned as previously.
This is the dusted off version ;) With the flow filter it should be possible to turn the timestamps on and off during runtime.
Best regards,
Steffen
--
Pengutronix e.K. | Dipl.-Inform. Steffen Trumtrar |
Steuerwalder Str. 21 | https://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686| Fax: +49-5121-206917-5555 |
|
{
"author": "Steffen Trumtrar <s.trumtrar@pengutronix.de>",
"date": "Mon, 02 Feb 2026 08:34:58 +0100",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
On Sun, Feb 01, 2026 at 04:05:54PM -0500, Willem de Bruijn wrote:
I certainly wouldn't mind, though I suspect tlv is too complex as
hardware implementations can't efficiently follow linked lists. I'll
try to ping some hardware designers for what works well for offloads.
|
{
"author": "\"Michael S. Tsirkin\" <mst@redhat.com>",
"date": "Mon, 2 Feb 2026 02:59:31 -0500",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH RFC v2 0/2] virtio-net: add flow filter for receive
timestamps
|
This series tries to pick up the work on the virtio-net timestamping
feature from Willem de Bruijn.
Original series
Message-Id: 20210208185558.995292-1-willemdebruijn.kernel@gmail.com
Subject: [PATCH RFC v2 0/4] virtio-net: add tx-hash, rx-tstamp,
tx-tstamp and tx-time
From: Willem de Bruijn <willemb@google.com>
RFC for four new features to the virtio network device:
1. pass tx flow state to host, for routing + telemetry
2. pass rx tstamp to guest, for better RTT estimation
3. pass tx tstamp to guest, idem
3. pass tx delivery time to host, for accurate pacing
All would introduce an extension to the virtio spec.
The changes in this series are to the driver side. For the changes to qemu see:
https://github.com/strumtrar/qemu/tree/v10.2.0/virtio-rx-stamps
Currently only virtio-net is supported. Performance was tested with
pktgen which doesn't show a decrease in transfer speeds.
As these patches are now mostly different from the initial patchset, I removed
the Signed-off-bys from Willem, so he mustn't be ashamed of what his work evolved to ;)
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- rework patches to use flow filter instead of feature flag
- Link to v1: https://lore.kernel.org/r/20231218-v6-7-topic-virtio-net-ptp-v1-0-cac92b2d8532@pengutronix.de
---
Steffen Trumtrar (2):
tun: support rx-tstamp
virtio-net: support receive timestamp
drivers/net/tun.c | 30 +++++----
drivers/net/virtio_net.c | 136 ++++++++++++++++++++++++++++++++++++----
include/uapi/linux/virtio_net.h | 9 +++
3 files changed, 151 insertions(+), 24 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20231218-v6-7-topic-virtio-net-ptp-3df023bc4f4d
Best regards,
--
Steffen Trumtrar <s.trumtrar@pengutronix.de>
|
Michael S. Tsirkin wrote:
Great thanks.
Agreed that TLV was probably the wrong suggestion.
We can definitely have a required order of fields. My initial thought
is as said like many user/kernel structures: where both sides agree on
the basic order of the struct, and pass along the length, so that they
agree only to process the min of both their supported lengths. New
fields are added at the tail of the struct. See for instance getsockopt
TCP_INFO.
|
{
"author": "Willem de Bruijn <willemdebruijn.kernel@gmail.com>",
"date": "Mon, 02 Feb 2026 12:40:36 -0500",
"thread_id": "20260129-v6-7-topic-virtio-net-ptp-v2-0-30a27dc52760@pengutronix.de.mbox.gz"
}
|
lkml
|
[PATCH net-next v4 0/9] dpll: Core improvements and ice E825-C SyncE support
|
This series introduces Synchronous Ethernet (SyncE) support for the Intel
E825-C Ethernet controller. Unlike previous generations where DPLL
connections were implicitly assumed, the E825-C architecture relies
on the platform firmware (ACPI) to describe the physical connections
between the Ethernet controller and external DPLLs (such as the ZL3073x).
To accommodate this, the series extends the DPLL subsystem to support
firmware node (fwnode) associations, asynchronous discovery via notifiers,
and dynamic pin management. Additionally, a significant refactor of
the DPLL reference counting logic is included to ensure robustness and
debuggability.
DPLL Core Extensions:
* Firmware Node Association: Pins can now be associated with a struct
fwnode_handle after allocation via dpll_pin_fwnode_set(). This allows
drivers to link pin objects with their corresponding DT/ACPI nodes.
* Asynchronous Notifiers: A raw notifier chain is added to the DPLL core.
This allows the Ethernet driver to subscribe to events and react when
the platform DPLL driver registers the parent pins, resolving probe
ordering dependencies.
* Dynamic Indexing: Drivers can now request DPLL_PIN_IDX_UNSPEC to have
the core automatically allocate a unique pin index.
Reference Counting & Debugging:
* Refactor: The reference counting logic in the core is consolidated.
Internal list management helpers now automatically handle hold/put
operations, removing fragile open-coded logic in the registration paths.
* Reference Tracking: A new Kconfig option DPLL_REFCNT_TRACKER is added.
This allows developers to instrument and debug reference leaks by
recording stack traces for every get/put operation.
Driver Updates:
* zl3073x: Updated to associate pins with fwnode handles using the new
setter and support the 'mux' pin type.
* ice: Implements the E825-C specific hardware configuration for SyncE
(CGU registers). It utilizes the new notifier and fwnode APIs to
dynamically discover and attach to the platform DPLLs.
Patch Summary:
Patch 1: DPLL Core (fwnode association).
Patch 2: Driver zl3073x (Set fwnode).
Patch 3-4: DPLL Core (Notifiers and dynamic IDs).
Patch 5: Driver zl3073x (Mux type).
Patch 6: DPLL Core (Refcount refactor).
Patch 7-8: Refcount tracking infrastructure and driver updates.
Patch 9: Driver ice (E825-C SyncE logic).
Changes in v4:
* Fixed documentation and function stub issues found by AI
Arkadiusz Kubalewski (1):
ice: dpll: Support E825-C SyncE and dynamic pin discovery
Ivan Vecera (7):
dpll: Allow associating dpll pin with a firmware node
dpll: zl3073x: Associate pin with fwnode handle
dpll: Support dynamic pin index allocation
dpll: zl3073x: Add support for mux pin type
dpll: Enhance and consolidate reference counting logic
dpll: Add reference count tracking support
drivers: Add support for DPLL reference count tracking
Petr Oros (1):
dpll: Add notifier chain for dpll events
drivers/dpll/Kconfig | 15 +
drivers/dpll/dpll_core.c | 288 ++++++-
drivers/dpll/dpll_core.h | 11 +
drivers/dpll/dpll_netlink.c | 6 +
drivers/dpll/zl3073x/dpll.c | 15 +-
drivers/dpll/zl3073x/dpll.h | 2 +
drivers/dpll/zl3073x/prop.c | 2 +
drivers/net/ethernet/intel/ice/ice_dpll.c | 755 +++++++++++++++---
drivers/net/ethernet/intel/ice/ice_dpll.h | 30 +
drivers/net/ethernet/intel/ice/ice_lib.c | 3 +
drivers/net/ethernet/intel/ice/ice_ptp.c | 32 +
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 9 +-
drivers/net/ethernet/intel/ice/ice_tspll.c | 217 +++++
drivers/net/ethernet/intel/ice/ice_tspll.h | 13 +-
drivers/net/ethernet/intel/ice/ice_type.h | 6 +
.../net/ethernet/mellanox/mlx5/core/dpll.c | 16 +-
drivers/ptp/ptp_ocp.c | 18 +-
include/linux/dpll.h | 59 +-
18 files changed, 1347 insertions(+), 150 deletions(-)
--
2.52.0
|
Extend the DPLL core to support associating a DPLL pin with a firmware
node. This association is required to allow other subsystems (such as
network drivers) to locate and request specific DPLL pins defined in
the Device Tree or ACPI.
* Add a .fwnode field to the struct dpll_pin
* Introduce dpll_pin_fwnode_set() helper to allow the provider driver
to associate a pin with a fwnode after the pin has been allocated
* Introduce fwnode_dpll_pin_find() helper to allow consumers to search
for a registered DPLL pin using its associated fwnode handle
* Ensure the fwnode reference is properly released in dpll_pin_put()
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
v4:
* fixed fwnode_dpll_pin_find() return value description
---
drivers/dpll/dpll_core.c | 49 ++++++++++++++++++++++++++++++++++++++++
drivers/dpll/dpll_core.h | 2 ++
include/linux/dpll.h | 11 +++++++++
3 files changed, 62 insertions(+)
diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c
index 8879a72351561..f04ed7195cadd 100644
--- a/drivers/dpll/dpll_core.c
+++ b/drivers/dpll/dpll_core.c
@@ -10,6 +10,7 @@
#include <linux/device.h>
#include <linux/err.h>
+#include <linux/property.h>
#include <linux/slab.h>
#include <linux/string.h>
@@ -595,12 +596,60 @@ void dpll_pin_put(struct dpll_pin *pin)
xa_destroy(&pin->parent_refs);
xa_destroy(&pin->ref_sync_pins);
dpll_pin_prop_free(&pin->prop);
+ fwnode_handle_put(pin->fwnode);
kfree_rcu(pin, rcu);
}
mutex_unlock(&dpll_lock);
}
EXPORT_SYMBOL_GPL(dpll_pin_put);
+/**
+ * dpll_pin_fwnode_set - set dpll pin firmware node reference
+ * @pin: pointer to a dpll pin
+ * @fwnode: firmware node handle
+ *
+ * Set firmware node handle for the given dpll pin.
+ */
+void dpll_pin_fwnode_set(struct dpll_pin *pin, struct fwnode_handle *fwnode)
+{
+ mutex_lock(&dpll_lock);
+ fwnode_handle_put(pin->fwnode); /* Drop fwnode previously set */
+ pin->fwnode = fwnode_handle_get(fwnode);
+ mutex_unlock(&dpll_lock);
+}
+EXPORT_SYMBOL_GPL(dpll_pin_fwnode_set);
+
+/**
+ * fwnode_dpll_pin_find - find dpll pin by firmware node reference
+ * @fwnode: reference to firmware node
+ *
+ * Get existing object of a pin that is associated with given firmware node
+ * reference.
+ *
+ * Context: Acquires a lock (dpll_lock)
+ * Return:
+ * * valid dpll_pin pointer on success
+ * * NULL when no such pin exists
+ */
+struct dpll_pin *fwnode_dpll_pin_find(struct fwnode_handle *fwnode)
+{
+ struct dpll_pin *pin, *ret = NULL;
+ unsigned long index;
+
+ mutex_lock(&dpll_lock);
+ xa_for_each(&dpll_pin_xa, index, pin) {
+ if (pin->fwnode == fwnode) {
+ ret = pin;
+ refcount_inc(&ret->refcount);
+ break;
+ }
+ }
+ mutex_unlock(&dpll_lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(fwnode_dpll_pin_find);
+
static int
__dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,
const struct dpll_pin_ops *ops, void *priv, void *cookie)
diff --git a/drivers/dpll/dpll_core.h b/drivers/dpll/dpll_core.h
index 8ce969bbeb64e..d3e17ff0ecef0 100644
--- a/drivers/dpll/dpll_core.h
+++ b/drivers/dpll/dpll_core.h
@@ -42,6 +42,7 @@ struct dpll_device {
* @pin_idx: index of a pin given by dev driver
* @clock_id: clock_id of creator
* @module: module of creator
+ * @fwnode: optional reference to firmware node
* @dpll_refs: hold referencees to dplls pin was registered with
* @parent_refs: hold references to parent pins pin was registered with
* @ref_sync_pins: hold references to pins for Reference SYNC feature
@@ -54,6 +55,7 @@ struct dpll_pin {
u32 pin_idx;
u64 clock_id;
struct module *module;
+ struct fwnode_handle *fwnode;
struct xarray dpll_refs;
struct xarray parent_refs;
struct xarray ref_sync_pins;
diff --git a/include/linux/dpll.h b/include/linux/dpll.h
index c6d0248fa5273..f2e8660e90cdf 100644
--- a/include/linux/dpll.h
+++ b/include/linux/dpll.h
@@ -16,6 +16,7 @@
struct dpll_device;
struct dpll_pin;
struct dpll_pin_esync;
+struct fwnode_handle;
struct dpll_device_ops {
int (*mode_get)(const struct dpll_device *dpll, void *dpll_priv,
@@ -178,6 +179,8 @@ void dpll_netdev_pin_clear(struct net_device *dev);
size_t dpll_netdev_pin_handle_size(const struct net_device *dev);
int dpll_netdev_add_pin_handle(struct sk_buff *msg,
const struct net_device *dev);
+
+struct dpll_pin *fwnode_dpll_pin_find(struct fwnode_handle *fwnode);
#else
static inline void
dpll_netdev_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin) { }
@@ -193,6 +196,12 @@ dpll_netdev_add_pin_handle(struct sk_buff *msg, const struct net_device *dev)
{
return 0;
}
+
+static inline struct dpll_pin *
+fwnode_dpll_pin_find(struct fwnode_handle *fwnode)
+{
+ return NULL;
+}
#endif
struct dpll_device *
@@ -218,6 +227,8 @@ void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin,
void dpll_pin_put(struct dpll_pin *pin);
+void dpll_pin_fwnode_set(struct dpll_pin *pin, struct fwnode_handle *fwnode);
+
int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin,
const struct dpll_pin_ops *ops, void *priv);
--
2.52.0
|
{
"author": "Ivan Vecera <ivecera@redhat.com>",
"date": "Mon, 2 Feb 2026 18:16:30 +0100",
"thread_id": "20260202171638.17427-6-ivecera@redhat.com.mbox.gz"
}
|
lkml
|
[PATCH net-next v4 0/9] dpll: Core improvements and ice E825-C SyncE support
|
This series introduces Synchronous Ethernet (SyncE) support for the Intel
E825-C Ethernet controller. Unlike previous generations where DPLL
connections were implicitly assumed, the E825-C architecture relies
on the platform firmware (ACPI) to describe the physical connections
between the Ethernet controller and external DPLLs (such as the ZL3073x).
To accommodate this, the series extends the DPLL subsystem to support
firmware node (fwnode) associations, asynchronous discovery via notifiers,
and dynamic pin management. Additionally, a significant refactor of
the DPLL reference counting logic is included to ensure robustness and
debuggability.
DPLL Core Extensions:
* Firmware Node Association: Pins can now be associated with a struct
fwnode_handle after allocation via dpll_pin_fwnode_set(). This allows
drivers to link pin objects with their corresponding DT/ACPI nodes.
* Asynchronous Notifiers: A raw notifier chain is added to the DPLL core.
This allows the Ethernet driver to subscribe to events and react when
the platform DPLL driver registers the parent pins, resolving probe
ordering dependencies.
* Dynamic Indexing: Drivers can now request DPLL_PIN_IDX_UNSPEC to have
the core automatically allocate a unique pin index.
Reference Counting & Debugging:
* Refactor: The reference counting logic in the core is consolidated.
Internal list management helpers now automatically handle hold/put
operations, removing fragile open-coded logic in the registration paths.
* Reference Tracking: A new Kconfig option DPLL_REFCNT_TRACKER is added.
This allows developers to instrument and debug reference leaks by
recording stack traces for every get/put operation.
Driver Updates:
* zl3073x: Updated to associate pins with fwnode handles using the new
setter and support the 'mux' pin type.
* ice: Implements the E825-C specific hardware configuration for SyncE
(CGU registers). It utilizes the new notifier and fwnode APIs to
dynamically discover and attach to the platform DPLLs.
Patch Summary:
Patch 1: DPLL Core (fwnode association).
Patch 2: Driver zl3073x (Set fwnode).
Patch 3-4: DPLL Core (Notifiers and dynamic IDs).
Patch 5: Driver zl3073x (Mux type).
Patch 6: DPLL Core (Refcount refactor).
Patch 7-8: Refcount tracking infrastructure and driver updates.
Patch 9: Driver ice (E825-C SyncE logic).
Changes in v4:
* Fixed documentation and function stub issues found by AI
Arkadiusz Kubalewski (1):
ice: dpll: Support E825-C SyncE and dynamic pin discovery
Ivan Vecera (7):
dpll: Allow associating dpll pin with a firmware node
dpll: zl3073x: Associate pin with fwnode handle
dpll: Support dynamic pin index allocation
dpll: zl3073x: Add support for mux pin type
dpll: Enhance and consolidate reference counting logic
dpll: Add reference count tracking support
drivers: Add support for DPLL reference count tracking
Petr Oros (1):
dpll: Add notifier chain for dpll events
drivers/dpll/Kconfig | 15 +
drivers/dpll/dpll_core.c | 288 ++++++-
drivers/dpll/dpll_core.h | 11 +
drivers/dpll/dpll_netlink.c | 6 +
drivers/dpll/zl3073x/dpll.c | 15 +-
drivers/dpll/zl3073x/dpll.h | 2 +
drivers/dpll/zl3073x/prop.c | 2 +
drivers/net/ethernet/intel/ice/ice_dpll.c | 755 +++++++++++++++---
drivers/net/ethernet/intel/ice/ice_dpll.h | 30 +
drivers/net/ethernet/intel/ice/ice_lib.c | 3 +
drivers/net/ethernet/intel/ice/ice_ptp.c | 32 +
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 9 +-
drivers/net/ethernet/intel/ice/ice_tspll.c | 217 +++++
drivers/net/ethernet/intel/ice/ice_tspll.h | 13 +-
drivers/net/ethernet/intel/ice/ice_type.h | 6 +
.../net/ethernet/mellanox/mlx5/core/dpll.c | 16 +-
drivers/ptp/ptp_ocp.c | 18 +-
include/linux/dpll.h | 59 +-
18 files changed, 1347 insertions(+), 150 deletions(-)
--
2.52.0
|
Associate the registered DPLL pin with its firmware node by calling
dpll_pin_fwnode_set().
This links the created pin object to its corresponding DT/ACPI node
in the DPLL core. Consequently, this enables consumer drivers (such as
network drivers) to locate and request this specific pin using the
fwnode_dpll_pin_find() helper.
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
drivers/dpll/zl3073x/dpll.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/dpll/zl3073x/dpll.c b/drivers/dpll/zl3073x/dpll.c
index 7d8ed948b9706..9eed21088adac 100644
--- a/drivers/dpll/zl3073x/dpll.c
+++ b/drivers/dpll/zl3073x/dpll.c
@@ -1485,6 +1485,7 @@ zl3073x_dpll_pin_register(struct zl3073x_dpll_pin *pin, u32 index)
rc = PTR_ERR(pin->dpll_pin);
goto err_pin_get;
}
+ dpll_pin_fwnode_set(pin->dpll_pin, props->fwnode);
if (zl3073x_dpll_is_input_pin(pin))
ops = &zl3073x_dpll_input_pin_ops;
--
2.52.0
|
{
"author": "Ivan Vecera <ivecera@redhat.com>",
"date": "Mon, 2 Feb 2026 18:16:31 +0100",
"thread_id": "20260202171638.17427-6-ivecera@redhat.com.mbox.gz"
}
|
lkml
|
[PATCH net-next v4 0/9] dpll: Core improvements and ice E825-C SyncE support
|
This series introduces Synchronous Ethernet (SyncE) support for the Intel
E825-C Ethernet controller. Unlike previous generations where DPLL
connections were implicitly assumed, the E825-C architecture relies
on the platform firmware (ACPI) to describe the physical connections
between the Ethernet controller and external DPLLs (such as the ZL3073x).
To accommodate this, the series extends the DPLL subsystem to support
firmware node (fwnode) associations, asynchronous discovery via notifiers,
and dynamic pin management. Additionally, a significant refactor of
the DPLL reference counting logic is included to ensure robustness and
debuggability.
DPLL Core Extensions:
* Firmware Node Association: Pins can now be associated with a struct
fwnode_handle after allocation via dpll_pin_fwnode_set(). This allows
drivers to link pin objects with their corresponding DT/ACPI nodes.
* Asynchronous Notifiers: A raw notifier chain is added to the DPLL core.
This allows the Ethernet driver to subscribe to events and react when
the platform DPLL driver registers the parent pins, resolving probe
ordering dependencies.
* Dynamic Indexing: Drivers can now request DPLL_PIN_IDX_UNSPEC to have
the core automatically allocate a unique pin index.
Reference Counting & Debugging:
* Refactor: The reference counting logic in the core is consolidated.
Internal list management helpers now automatically handle hold/put
operations, removing fragile open-coded logic in the registration paths.
* Reference Tracking: A new Kconfig option DPLL_REFCNT_TRACKER is added.
This allows developers to instrument and debug reference leaks by
recording stack traces for every get/put operation.
Driver Updates:
* zl3073x: Updated to associate pins with fwnode handles using the new
setter and support the 'mux' pin type.
* ice: Implements the E825-C specific hardware configuration for SyncE
(CGU registers). It utilizes the new notifier and fwnode APIs to
dynamically discover and attach to the platform DPLLs.
Patch Summary:
Patch 1: DPLL Core (fwnode association).
Patch 2: Driver zl3073x (Set fwnode).
Patch 3-4: DPLL Core (Notifiers and dynamic IDs).
Patch 5: Driver zl3073x (Mux type).
Patch 6: DPLL Core (Refcount refactor).
Patch 7-8: Refcount tracking infrastructure and driver updates.
Patch 9: Driver ice (E825-C SyncE logic).
Changes in v4:
* Fixed documentation and function stub issues found by AI
Arkadiusz Kubalewski (1):
ice: dpll: Support E825-C SyncE and dynamic pin discovery
Ivan Vecera (7):
dpll: Allow associating dpll pin with a firmware node
dpll: zl3073x: Associate pin with fwnode handle
dpll: Support dynamic pin index allocation
dpll: zl3073x: Add support for mux pin type
dpll: Enhance and consolidate reference counting logic
dpll: Add reference count tracking support
drivers: Add support for DPLL reference count tracking
Petr Oros (1):
dpll: Add notifier chain for dpll events
drivers/dpll/Kconfig | 15 +
drivers/dpll/dpll_core.c | 288 ++++++-
drivers/dpll/dpll_core.h | 11 +
drivers/dpll/dpll_netlink.c | 6 +
drivers/dpll/zl3073x/dpll.c | 15 +-
drivers/dpll/zl3073x/dpll.h | 2 +
drivers/dpll/zl3073x/prop.c | 2 +
drivers/net/ethernet/intel/ice/ice_dpll.c | 755 +++++++++++++++---
drivers/net/ethernet/intel/ice/ice_dpll.h | 30 +
drivers/net/ethernet/intel/ice/ice_lib.c | 3 +
drivers/net/ethernet/intel/ice/ice_ptp.c | 32 +
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 9 +-
drivers/net/ethernet/intel/ice/ice_tspll.c | 217 +++++
drivers/net/ethernet/intel/ice/ice_tspll.h | 13 +-
drivers/net/ethernet/intel/ice/ice_type.h | 6 +
.../net/ethernet/mellanox/mlx5/core/dpll.c | 16 +-
drivers/ptp/ptp_ocp.c | 18 +-
include/linux/dpll.h | 59 +-
18 files changed, 1347 insertions(+), 150 deletions(-)
--
2.52.0
|
From: Petr Oros <poros@redhat.com>
Currently, the DPLL subsystem reports events (creation, deletion, changes)
to userspace via Netlink. However, there is no mechanism for other kernel
components to be notified of these events directly.
Add a raw notifier chain to the DPLL core protected by dpll_lock. This
allows other kernel subsystems or drivers to register callbacks and
receive notifications when DPLL devices or pins are created, deleted,
or modified.
Define the following:
- Registration helpers: {,un}register_dpll_notifier()
- Event types: DPLL_DEVICE_CREATED, DPLL_PIN_CREATED, etc.
- Context structures: dpll_{device,pin}_notifier_info to pass relevant
data to the listeners.
The notification chain is invoked alongside the existing Netlink event
generation to ensure in-kernel listeners are kept in sync with the
subsystem state.
Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Co-developed-by: Ivan Vecera <ivecera@redhat.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
Signed-off-by: Petr Oros <poros@redhat.com>
---
drivers/dpll/dpll_core.c | 57 +++++++++++++++++++++++++++++++++++++
drivers/dpll/dpll_core.h | 4 +++
drivers/dpll/dpll_netlink.c | 6 ++++
include/linux/dpll.h | 29 +++++++++++++++++++
4 files changed, 96 insertions(+)
diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c
index f04ed7195cadd..b05fe2ba46d91 100644
--- a/drivers/dpll/dpll_core.c
+++ b/drivers/dpll/dpll_core.c
@@ -23,6 +23,8 @@ DEFINE_MUTEX(dpll_lock);
DEFINE_XARRAY_FLAGS(dpll_device_xa, XA_FLAGS_ALLOC);
DEFINE_XARRAY_FLAGS(dpll_pin_xa, XA_FLAGS_ALLOC);
+static RAW_NOTIFIER_HEAD(dpll_notifier_chain);
+
static u32 dpll_device_xa_id;
static u32 dpll_pin_xa_id;
@@ -46,6 +48,39 @@ struct dpll_pin_registration {
void *cookie;
};
+static int call_dpll_notifiers(unsigned long action, void *info)
+{
+ lockdep_assert_held(&dpll_lock);
+ return raw_notifier_call_chain(&dpll_notifier_chain, action, info);
+}
+
+void dpll_device_notify(struct dpll_device *dpll, unsigned long action)
+{
+ struct dpll_device_notifier_info info = {
+ .dpll = dpll,
+ .id = dpll->id,
+ .idx = dpll->device_idx,
+ .clock_id = dpll->clock_id,
+ .type = dpll->type,
+ };
+
+ call_dpll_notifiers(action, &info);
+}
+
+void dpll_pin_notify(struct dpll_pin *pin, unsigned long action)
+{
+ struct dpll_pin_notifier_info info = {
+ .pin = pin,
+ .id = pin->id,
+ .idx = pin->pin_idx,
+ .clock_id = pin->clock_id,
+ .fwnode = pin->fwnode,
+ .prop = &pin->prop,
+ };
+
+ call_dpll_notifiers(action, &info);
+}
+
struct dpll_device *dpll_device_get_by_id(int id)
{
if (xa_get_mark(&dpll_device_xa, id, DPLL_REGISTERED))
@@ -539,6 +574,28 @@ void dpll_netdev_pin_clear(struct net_device *dev)
}
EXPORT_SYMBOL(dpll_netdev_pin_clear);
+int register_dpll_notifier(struct notifier_block *nb)
+{
+ int ret;
+
+ mutex_lock(&dpll_lock);
+ ret = raw_notifier_chain_register(&dpll_notifier_chain, nb);
+ mutex_unlock(&dpll_lock);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(register_dpll_notifier);
+
+int unregister_dpll_notifier(struct notifier_block *nb)
+{
+ int ret;
+
+ mutex_lock(&dpll_lock);
+ ret = raw_notifier_chain_unregister(&dpll_notifier_chain, nb);
+ mutex_unlock(&dpll_lock);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(unregister_dpll_notifier);
+
/**
* dpll_pin_get - find existing or create new dpll pin
* @clock_id: clock_id of creator
diff --git a/drivers/dpll/dpll_core.h b/drivers/dpll/dpll_core.h
index d3e17ff0ecef0..b7b4bb251f739 100644
--- a/drivers/dpll/dpll_core.h
+++ b/drivers/dpll/dpll_core.h
@@ -91,4 +91,8 @@ struct dpll_pin_ref *dpll_xa_ref_dpll_first(struct xarray *xa_refs);
extern struct xarray dpll_device_xa;
extern struct xarray dpll_pin_xa;
extern struct mutex dpll_lock;
+
+void dpll_device_notify(struct dpll_device *dpll, unsigned long action);
+void dpll_pin_notify(struct dpll_pin *pin, unsigned long action);
+
#endif
diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c
index 904199ddd1781..83cbd64abf5a4 100644
--- a/drivers/dpll/dpll_netlink.c
+++ b/drivers/dpll/dpll_netlink.c
@@ -761,17 +761,20 @@ dpll_device_event_send(enum dpll_cmd event, struct dpll_device *dpll)
int dpll_device_create_ntf(struct dpll_device *dpll)
{
+ dpll_device_notify(dpll, DPLL_DEVICE_CREATED);
return dpll_device_event_send(DPLL_CMD_DEVICE_CREATE_NTF, dpll);
}
int dpll_device_delete_ntf(struct dpll_device *dpll)
{
+ dpll_device_notify(dpll, DPLL_DEVICE_DELETED);
return dpll_device_event_send(DPLL_CMD_DEVICE_DELETE_NTF, dpll);
}
static int
__dpll_device_change_ntf(struct dpll_device *dpll)
{
+ dpll_device_notify(dpll, DPLL_DEVICE_CHANGED);
return dpll_device_event_send(DPLL_CMD_DEVICE_CHANGE_NTF, dpll);
}
@@ -829,16 +832,19 @@ dpll_pin_event_send(enum dpll_cmd event, struct dpll_pin *pin)
int dpll_pin_create_ntf(struct dpll_pin *pin)
{
+ dpll_pin_notify(pin, DPLL_PIN_CREATED);
return dpll_pin_event_send(DPLL_CMD_PIN_CREATE_NTF, pin);
}
int dpll_pin_delete_ntf(struct dpll_pin *pin)
{
+ dpll_pin_notify(pin, DPLL_PIN_DELETED);
return dpll_pin_event_send(DPLL_CMD_PIN_DELETE_NTF, pin);
}
int __dpll_pin_change_ntf(struct dpll_pin *pin)
{
+ dpll_pin_notify(pin, DPLL_PIN_CHANGED);
return dpll_pin_event_send(DPLL_CMD_PIN_CHANGE_NTF, pin);
}
diff --git a/include/linux/dpll.h b/include/linux/dpll.h
index f2e8660e90cdf..8ed90dfc65f05 100644
--- a/include/linux/dpll.h
+++ b/include/linux/dpll.h
@@ -11,6 +11,7 @@
#include <linux/device.h>
#include <linux/netlink.h>
#include <linux/netdevice.h>
+#include <linux/notifier.h>
#include <linux/rtnetlink.h>
struct dpll_device;
@@ -172,6 +173,30 @@ struct dpll_pin_properties {
u32 phase_gran;
};
+#define DPLL_DEVICE_CREATED 1
+#define DPLL_DEVICE_DELETED 2
+#define DPLL_DEVICE_CHANGED 3
+#define DPLL_PIN_CREATED 4
+#define DPLL_PIN_DELETED 5
+#define DPLL_PIN_CHANGED 6
+
+struct dpll_device_notifier_info {
+ struct dpll_device *dpll;
+ u32 id;
+ u32 idx;
+ u64 clock_id;
+ enum dpll_type type;
+};
+
+struct dpll_pin_notifier_info {
+ struct dpll_pin *pin;
+ u32 id;
+ u32 idx;
+ u64 clock_id;
+ const struct fwnode_handle *fwnode;
+ const struct dpll_pin_properties *prop;
+};
+
#if IS_ENABLED(CONFIG_DPLL)
void dpll_netdev_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin);
void dpll_netdev_pin_clear(struct net_device *dev);
@@ -242,4 +267,8 @@ int dpll_device_change_ntf(struct dpll_device *dpll);
int dpll_pin_change_ntf(struct dpll_pin *pin);
+int register_dpll_notifier(struct notifier_block *nb);
+
+int unregister_dpll_notifier(struct notifier_block *nb);
+
#endif
--
2.52.0
|
{
"author": "Ivan Vecera <ivecera@redhat.com>",
"date": "Mon, 2 Feb 2026 18:16:32 +0100",
"thread_id": "20260202171638.17427-6-ivecera@redhat.com.mbox.gz"
}
|
lkml
|
[PATCH net-next v4 0/9] dpll: Core improvements and ice E825-C SyncE support
|
This series introduces Synchronous Ethernet (SyncE) support for the Intel
E825-C Ethernet controller. Unlike previous generations where DPLL
connections were implicitly assumed, the E825-C architecture relies
on the platform firmware (ACPI) to describe the physical connections
between the Ethernet controller and external DPLLs (such as the ZL3073x).
To accommodate this, the series extends the DPLL subsystem to support
firmware node (fwnode) associations, asynchronous discovery via notifiers,
and dynamic pin management. Additionally, a significant refactor of
the DPLL reference counting logic is included to ensure robustness and
debuggability.
DPLL Core Extensions:
* Firmware Node Association: Pins can now be associated with a struct
fwnode_handle after allocation via dpll_pin_fwnode_set(). This allows
drivers to link pin objects with their corresponding DT/ACPI nodes.
* Asynchronous Notifiers: A raw notifier chain is added to the DPLL core.
This allows the Ethernet driver to subscribe to events and react when
the platform DPLL driver registers the parent pins, resolving probe
ordering dependencies.
* Dynamic Indexing: Drivers can now request DPLL_PIN_IDX_UNSPEC to have
the core automatically allocate a unique pin index.
Reference Counting & Debugging:
* Refactor: The reference counting logic in the core is consolidated.
Internal list management helpers now automatically handle hold/put
operations, removing fragile open-coded logic in the registration paths.
* Reference Tracking: A new Kconfig option DPLL_REFCNT_TRACKER is added.
This allows developers to instrument and debug reference leaks by
recording stack traces for every get/put operation.
Driver Updates:
* zl3073x: Updated to associate pins with fwnode handles using the new
setter and support the 'mux' pin type.
* ice: Implements the E825-C specific hardware configuration for SyncE
(CGU registers). It utilizes the new notifier and fwnode APIs to
dynamically discover and attach to the platform DPLLs.
Patch Summary:
Patch 1: DPLL Core (fwnode association).
Patch 2: Driver zl3073x (Set fwnode).
Patch 3-4: DPLL Core (Notifiers and dynamic IDs).
Patch 5: Driver zl3073x (Mux type).
Patch 6: DPLL Core (Refcount refactor).
Patch 7-8: Refcount tracking infrastructure and driver updates.
Patch 9: Driver ice (E825-C SyncE logic).
Changes in v4:
* Fixed documentation and function stub issues found by AI
Arkadiusz Kubalewski (1):
ice: dpll: Support E825-C SyncE and dynamic pin discovery
Ivan Vecera (7):
dpll: Allow associating dpll pin with a firmware node
dpll: zl3073x: Associate pin with fwnode handle
dpll: Support dynamic pin index allocation
dpll: zl3073x: Add support for mux pin type
dpll: Enhance and consolidate reference counting logic
dpll: Add reference count tracking support
drivers: Add support for DPLL reference count tracking
Petr Oros (1):
dpll: Add notifier chain for dpll events
drivers/dpll/Kconfig | 15 +
drivers/dpll/dpll_core.c | 288 ++++++-
drivers/dpll/dpll_core.h | 11 +
drivers/dpll/dpll_netlink.c | 6 +
drivers/dpll/zl3073x/dpll.c | 15 +-
drivers/dpll/zl3073x/dpll.h | 2 +
drivers/dpll/zl3073x/prop.c | 2 +
drivers/net/ethernet/intel/ice/ice_dpll.c | 755 +++++++++++++++---
drivers/net/ethernet/intel/ice/ice_dpll.h | 30 +
drivers/net/ethernet/intel/ice/ice_lib.c | 3 +
drivers/net/ethernet/intel/ice/ice_ptp.c | 32 +
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 9 +-
drivers/net/ethernet/intel/ice/ice_tspll.c | 217 +++++
drivers/net/ethernet/intel/ice/ice_tspll.h | 13 +-
drivers/net/ethernet/intel/ice/ice_type.h | 6 +
.../net/ethernet/mellanox/mlx5/core/dpll.c | 16 +-
drivers/ptp/ptp_ocp.c | 18 +-
include/linux/dpll.h | 59 +-
18 files changed, 1347 insertions(+), 150 deletions(-)
--
2.52.0
|
Allow drivers to register DPLL pins without manually specifying a pin
index.
Currently, drivers must provide a unique pin index when calling
dpll_pin_get(). This works well for hardware-mapped pins but creates
friction for drivers handling virtual pins or those without a strict
hardware indexing scheme.
Introduce DPLL_PIN_IDX_UNSPEC (U32_MAX). When a driver passes this
value as the pin index:
1. The core allocates a unique index using an IDA
2. The allocated index is mapped to a range starting above `INT_MAX`
This separation ensures that dynamically allocated indices never collide
with standard driver-provided hardware indices, which are assumed to be
within the `0` to `INT_MAX` range. The index is automatically freed when
the pin is released in dpll_pin_put().
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
v2:
* fixed integer overflow in dpll_pin_idx_free()
---
drivers/dpll/dpll_core.c | 48 ++++++++++++++++++++++++++++++++++++++--
include/linux/dpll.h | 2 ++
2 files changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c
index b05fe2ba46d91..59081cf2c73ae 100644
--- a/drivers/dpll/dpll_core.c
+++ b/drivers/dpll/dpll_core.c
@@ -10,6 +10,7 @@
#include <linux/device.h>
#include <linux/err.h>
+#include <linux/idr.h>
#include <linux/property.h>
#include <linux/slab.h>
#include <linux/string.h>
@@ -24,6 +25,7 @@ DEFINE_XARRAY_FLAGS(dpll_device_xa, XA_FLAGS_ALLOC);
DEFINE_XARRAY_FLAGS(dpll_pin_xa, XA_FLAGS_ALLOC);
static RAW_NOTIFIER_HEAD(dpll_notifier_chain);
+static DEFINE_IDA(dpll_pin_idx_ida);
static u32 dpll_device_xa_id;
static u32 dpll_pin_xa_id;
@@ -464,6 +466,36 @@ void dpll_device_unregister(struct dpll_device *dpll,
}
EXPORT_SYMBOL_GPL(dpll_device_unregister);
+static int dpll_pin_idx_alloc(u32 *pin_idx)
+{
+ int ret;
+
+ if (!pin_idx)
+ return -EINVAL;
+
+ /* Alloc unique number from IDA. Number belongs to <0, INT_MAX> range */
+ ret = ida_alloc(&dpll_pin_idx_ida, GFP_KERNEL);
+ if (ret < 0)
+ return ret;
+
+ /* Map the value to dynamic pin index range <INT_MAX+1, U32_MAX> */
+ *pin_idx = (u32)ret + INT_MAX + 1;
+
+ return 0;
+}
+
+static void dpll_pin_idx_free(u32 pin_idx)
+{
+ if (pin_idx <= INT_MAX)
+ return; /* Not a dynamic pin index */
+
+ /* Map the index value from dynamic pin index range to IDA range and
+ * free it.
+ */
+ pin_idx -= (u32)INT_MAX + 1;
+ ida_free(&dpll_pin_idx_ida, pin_idx);
+}
+
static void dpll_pin_prop_free(struct dpll_pin_properties *prop)
{
kfree(prop->package_label);
@@ -521,9 +553,18 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module,
struct dpll_pin *pin;
int ret;
+ if (pin_idx == DPLL_PIN_IDX_UNSPEC) {
+ ret = dpll_pin_idx_alloc(&pin_idx);
+ if (ret)
+ return ERR_PTR(ret);
+ } else if (pin_idx > INT_MAX) {
+ return ERR_PTR(-EINVAL);
+ }
pin = kzalloc(sizeof(*pin), GFP_KERNEL);
- if (!pin)
- return ERR_PTR(-ENOMEM);
+ if (!pin) {
+ ret = -ENOMEM;
+ goto err_pin_alloc;
+ }
pin->pin_idx = pin_idx;
pin->clock_id = clock_id;
pin->module = module;
@@ -551,6 +592,8 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module,
dpll_pin_prop_free(&pin->prop);
err_pin_prop:
kfree(pin);
+err_pin_alloc:
+ dpll_pin_idx_free(pin_idx);
return ERR_PTR(ret);
}
@@ -654,6 +697,7 @@ void dpll_pin_put(struct dpll_pin *pin)
xa_destroy(&pin->ref_sync_pins);
dpll_pin_prop_free(&pin->prop);
fwnode_handle_put(pin->fwnode);
+ dpll_pin_idx_free(pin->pin_idx);
kfree_rcu(pin, rcu);
}
mutex_unlock(&dpll_lock);
diff --git a/include/linux/dpll.h b/include/linux/dpll.h
index 8ed90dfc65f05..8fff048131f1d 100644
--- a/include/linux/dpll.h
+++ b/include/linux/dpll.h
@@ -240,6 +240,8 @@ int dpll_device_register(struct dpll_device *dpll, enum dpll_type type,
void dpll_device_unregister(struct dpll_device *dpll,
const struct dpll_device_ops *ops, void *priv);
+#define DPLL_PIN_IDX_UNSPEC U32_MAX
+
struct dpll_pin *
dpll_pin_get(u64 clock_id, u32 dev_driver_id, struct module *module,
const struct dpll_pin_properties *prop);
--
2.52.0
|
{
"author": "Ivan Vecera <ivecera@redhat.com>",
"date": "Mon, 2 Feb 2026 18:16:33 +0100",
"thread_id": "20260202171638.17427-6-ivecera@redhat.com.mbox.gz"
}
|
lkml
|
[PATCH net-next v4 0/9] dpll: Core improvements and ice E825-C SyncE support
|
This series introduces Synchronous Ethernet (SyncE) support for the Intel
E825-C Ethernet controller. Unlike previous generations where DPLL
connections were implicitly assumed, the E825-C architecture relies
on the platform firmware (ACPI) to describe the physical connections
between the Ethernet controller and external DPLLs (such as the ZL3073x).
To accommodate this, the series extends the DPLL subsystem to support
firmware node (fwnode) associations, asynchronous discovery via notifiers,
and dynamic pin management. Additionally, a significant refactor of
the DPLL reference counting logic is included to ensure robustness and
debuggability.
DPLL Core Extensions:
* Firmware Node Association: Pins can now be associated with a struct
fwnode_handle after allocation via dpll_pin_fwnode_set(). This allows
drivers to link pin objects with their corresponding DT/ACPI nodes.
* Asynchronous Notifiers: A raw notifier chain is added to the DPLL core.
This allows the Ethernet driver to subscribe to events and react when
the platform DPLL driver registers the parent pins, resolving probe
ordering dependencies.
* Dynamic Indexing: Drivers can now request DPLL_PIN_IDX_UNSPEC to have
the core automatically allocate a unique pin index.
Reference Counting & Debugging:
* Refactor: The reference counting logic in the core is consolidated.
Internal list management helpers now automatically handle hold/put
operations, removing fragile open-coded logic in the registration paths.
* Reference Tracking: A new Kconfig option DPLL_REFCNT_TRACKER is added.
This allows developers to instrument and debug reference leaks by
recording stack traces for every get/put operation.
Driver Updates:
* zl3073x: Updated to associate pins with fwnode handles using the new
setter and support the 'mux' pin type.
* ice: Implements the E825-C specific hardware configuration for SyncE
(CGU registers). It utilizes the new notifier and fwnode APIs to
dynamically discover and attach to the platform DPLLs.
Patch Summary:
Patch 1: DPLL Core (fwnode association).
Patch 2: Driver zl3073x (Set fwnode).
Patch 3-4: DPLL Core (Notifiers and dynamic IDs).
Patch 5: Driver zl3073x (Mux type).
Patch 6: DPLL Core (Refcount refactor).
Patch 7-8: Refcount tracking infrastructure and driver updates.
Patch 9: Driver ice (E825-C SyncE logic).
Changes in v4:
* Fixed documentation and function stub issues found by AI
Arkadiusz Kubalewski (1):
ice: dpll: Support E825-C SyncE and dynamic pin discovery
Ivan Vecera (7):
dpll: Allow associating dpll pin with a firmware node
dpll: zl3073x: Associate pin with fwnode handle
dpll: Support dynamic pin index allocation
dpll: zl3073x: Add support for mux pin type
dpll: Enhance and consolidate reference counting logic
dpll: Add reference count tracking support
drivers: Add support for DPLL reference count tracking
Petr Oros (1):
dpll: Add notifier chain for dpll events
drivers/dpll/Kconfig | 15 +
drivers/dpll/dpll_core.c | 288 ++++++-
drivers/dpll/dpll_core.h | 11 +
drivers/dpll/dpll_netlink.c | 6 +
drivers/dpll/zl3073x/dpll.c | 15 +-
drivers/dpll/zl3073x/dpll.h | 2 +
drivers/dpll/zl3073x/prop.c | 2 +
drivers/net/ethernet/intel/ice/ice_dpll.c | 755 +++++++++++++++---
drivers/net/ethernet/intel/ice/ice_dpll.h | 30 +
drivers/net/ethernet/intel/ice/ice_lib.c | 3 +
drivers/net/ethernet/intel/ice/ice_ptp.c | 32 +
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 9 +-
drivers/net/ethernet/intel/ice/ice_tspll.c | 217 +++++
drivers/net/ethernet/intel/ice/ice_tspll.h | 13 +-
drivers/net/ethernet/intel/ice/ice_type.h | 6 +
.../net/ethernet/mellanox/mlx5/core/dpll.c | 16 +-
drivers/ptp/ptp_ocp.c | 18 +-
include/linux/dpll.h | 59 +-
18 files changed, 1347 insertions(+), 150 deletions(-)
--
2.52.0
|
Add parsing for the "mux" string in the 'connection-type' pin property
mapping it to DPLL_PIN_TYPE_MUX.
Recognizing this type in the driver allows these pins to be taken as
parent pins for pin-on-pin pins coming from different modules (e.g.
network drivers).
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
drivers/dpll/zl3073x/prop.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/dpll/zl3073x/prop.c b/drivers/dpll/zl3073x/prop.c
index 4ed153087570b..ad1f099cbe2b5 100644
--- a/drivers/dpll/zl3073x/prop.c
+++ b/drivers/dpll/zl3073x/prop.c
@@ -249,6 +249,8 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
props->dpll_props.type = DPLL_PIN_TYPE_INT_OSCILLATOR;
else if (!strcmp(type, "synce"))
props->dpll_props.type = DPLL_PIN_TYPE_SYNCE_ETH_PORT;
+ else if (!strcmp(type, "mux"))
+ props->dpll_props.type = DPLL_PIN_TYPE_MUX;
else
dev_warn(zldev->dev,
"Unknown or unsupported pin type '%s'\n",
--
2.52.0
|
{
"author": "Ivan Vecera <ivecera@redhat.com>",
"date": "Mon, 2 Feb 2026 18:16:34 +0100",
"thread_id": "20260202171638.17427-6-ivecera@redhat.com.mbox.gz"
}
|
lkml
|
[PATCH net-next v4 0/9] dpll: Core improvements and ice E825-C SyncE support
|
This series introduces Synchronous Ethernet (SyncE) support for the Intel
E825-C Ethernet controller. Unlike previous generations where DPLL
connections were implicitly assumed, the E825-C architecture relies
on the platform firmware (ACPI) to describe the physical connections
between the Ethernet controller and external DPLLs (such as the ZL3073x).
To accommodate this, the series extends the DPLL subsystem to support
firmware node (fwnode) associations, asynchronous discovery via notifiers,
and dynamic pin management. Additionally, a significant refactor of
the DPLL reference counting logic is included to ensure robustness and
debuggability.
DPLL Core Extensions:
* Firmware Node Association: Pins can now be associated with a struct
fwnode_handle after allocation via dpll_pin_fwnode_set(). This allows
drivers to link pin objects with their corresponding DT/ACPI nodes.
* Asynchronous Notifiers: A raw notifier chain is added to the DPLL core.
This allows the Ethernet driver to subscribe to events and react when
the platform DPLL driver registers the parent pins, resolving probe
ordering dependencies.
* Dynamic Indexing: Drivers can now request DPLL_PIN_IDX_UNSPEC to have
the core automatically allocate a unique pin index.
Reference Counting & Debugging:
* Refactor: The reference counting logic in the core is consolidated.
Internal list management helpers now automatically handle hold/put
operations, removing fragile open-coded logic in the registration paths.
* Reference Tracking: A new Kconfig option DPLL_REFCNT_TRACKER is added.
This allows developers to instrument and debug reference leaks by
recording stack traces for every get/put operation.
Driver Updates:
* zl3073x: Updated to associate pins with fwnode handles using the new
setter and support the 'mux' pin type.
* ice: Implements the E825-C specific hardware configuration for SyncE
(CGU registers). It utilizes the new notifier and fwnode APIs to
dynamically discover and attach to the platform DPLLs.
Patch Summary:
Patch 1: DPLL Core (fwnode association).
Patch 2: Driver zl3073x (Set fwnode).
Patch 3-4: DPLL Core (Notifiers and dynamic IDs).
Patch 5: Driver zl3073x (Mux type).
Patch 6: DPLL Core (Refcount refactor).
Patch 7-8: Refcount tracking infrastructure and driver updates.
Patch 9: Driver ice (E825-C SyncE logic).
Changes in v4:
* Fixed documentation and function stub issues found by AI
Arkadiusz Kubalewski (1):
ice: dpll: Support E825-C SyncE and dynamic pin discovery
Ivan Vecera (7):
dpll: Allow associating dpll pin with a firmware node
dpll: zl3073x: Associate pin with fwnode handle
dpll: Support dynamic pin index allocation
dpll: zl3073x: Add support for mux pin type
dpll: Enhance and consolidate reference counting logic
dpll: Add reference count tracking support
drivers: Add support for DPLL reference count tracking
Petr Oros (1):
dpll: Add notifier chain for dpll events
drivers/dpll/Kconfig | 15 +
drivers/dpll/dpll_core.c | 288 ++++++-
drivers/dpll/dpll_core.h | 11 +
drivers/dpll/dpll_netlink.c | 6 +
drivers/dpll/zl3073x/dpll.c | 15 +-
drivers/dpll/zl3073x/dpll.h | 2 +
drivers/dpll/zl3073x/prop.c | 2 +
drivers/net/ethernet/intel/ice/ice_dpll.c | 755 +++++++++++++++---
drivers/net/ethernet/intel/ice/ice_dpll.h | 30 +
drivers/net/ethernet/intel/ice/ice_lib.c | 3 +
drivers/net/ethernet/intel/ice/ice_ptp.c | 32 +
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 9 +-
drivers/net/ethernet/intel/ice/ice_tspll.c | 217 +++++
drivers/net/ethernet/intel/ice/ice_tspll.h | 13 +-
drivers/net/ethernet/intel/ice/ice_type.h | 6 +
.../net/ethernet/mellanox/mlx5/core/dpll.c | 16 +-
drivers/ptp/ptp_ocp.c | 18 +-
include/linux/dpll.h | 59 +-
18 files changed, 1347 insertions(+), 150 deletions(-)
--
2.52.0
|
Refactor the reference counting mechanism for DPLL devices and pins to
improve consistency and prevent potential lifetime issues.
Introduce internal helpers __dpll_{device,pin}_{hold,put}() to
centralize reference management.
Update the internal XArray reference helpers (dpll_xa_ref_*) to
automatically grab a reference to the target object when it is added to
a list, and release it when removed. This ensures that objects linked
internally (e.g., pins referenced by parent pins) are properly kept
alive without relying on the caller to manually manage the count.
Consequently, remove the now redundant manual `refcount_inc/dec` calls
in dpll_pin_on_pin_{,un}register()`, as ownership is now correctly handled
by the dpll_xa_ref_* functions.
Additionally, ensure that dpll_device_{,un}register()` takes/releases
a reference to the device, ensuring the device object remains valid for
the duration of its registration.
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
drivers/dpll/dpll_core.c | 74 +++++++++++++++++++++++++++-------------
1 file changed, 50 insertions(+), 24 deletions(-)
diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c
index 59081cf2c73ae..f6ab4f0cad84d 100644
--- a/drivers/dpll/dpll_core.c
+++ b/drivers/dpll/dpll_core.c
@@ -83,6 +83,45 @@ void dpll_pin_notify(struct dpll_pin *pin, unsigned long action)
call_dpll_notifiers(action, &info);
}
+static void __dpll_device_hold(struct dpll_device *dpll)
+{
+ refcount_inc(&dpll->refcount);
+}
+
+static void __dpll_device_put(struct dpll_device *dpll)
+{
+ if (refcount_dec_and_test(&dpll->refcount)) {
+ ASSERT_DPLL_NOT_REGISTERED(dpll);
+ WARN_ON_ONCE(!xa_empty(&dpll->pin_refs));
+ xa_destroy(&dpll->pin_refs);
+ xa_erase(&dpll_device_xa, dpll->id);
+ WARN_ON(!list_empty(&dpll->registration_list));
+ kfree(dpll);
+ }
+}
+
+static void __dpll_pin_hold(struct dpll_pin *pin)
+{
+ refcount_inc(&pin->refcount);
+}
+
+static void dpll_pin_idx_free(u32 pin_idx);
+static void dpll_pin_prop_free(struct dpll_pin_properties *prop);
+
+static void __dpll_pin_put(struct dpll_pin *pin)
+{
+ if (refcount_dec_and_test(&pin->refcount)) {
+ xa_erase(&dpll_pin_xa, pin->id);
+ xa_destroy(&pin->dpll_refs);
+ xa_destroy(&pin->parent_refs);
+ xa_destroy(&pin->ref_sync_pins);
+ dpll_pin_prop_free(&pin->prop);
+ fwnode_handle_put(pin->fwnode);
+ dpll_pin_idx_free(pin->pin_idx);
+ kfree_rcu(pin, rcu);
+ }
+}
+
struct dpll_device *dpll_device_get_by_id(int id)
{
if (xa_get_mark(&dpll_device_xa, id, DPLL_REGISTERED))
@@ -152,6 +191,7 @@ dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin,
reg->ops = ops;
reg->priv = priv;
reg->cookie = cookie;
+ __dpll_pin_hold(pin);
if (ref_exists)
refcount_inc(&ref->refcount);
list_add_tail(®->list, &ref->registration_list);
@@ -174,6 +214,7 @@ static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin,
if (WARN_ON(!reg))
return -EINVAL;
list_del(®->list);
+ __dpll_pin_put(pin);
kfree(reg);
if (refcount_dec_and_test(&ref->refcount)) {
xa_erase(xa_pins, i);
@@ -231,6 +272,7 @@ dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll,
reg->ops = ops;
reg->priv = priv;
reg->cookie = cookie;
+ __dpll_device_hold(dpll);
if (ref_exists)
refcount_inc(&ref->refcount);
list_add_tail(®->list, &ref->registration_list);
@@ -253,6 +295,7 @@ dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll,
if (WARN_ON(!reg))
return;
list_del(®->list);
+ __dpll_device_put(dpll);
kfree(reg);
if (refcount_dec_and_test(&ref->refcount)) {
xa_erase(xa_dplls, i);
@@ -323,8 +366,8 @@ dpll_device_get(u64 clock_id, u32 device_idx, struct module *module)
if (dpll->clock_id == clock_id &&
dpll->device_idx == device_idx &&
dpll->module == module) {
+ __dpll_device_hold(dpll);
ret = dpll;
- refcount_inc(&ret->refcount);
break;
}
}
@@ -347,14 +390,7 @@ EXPORT_SYMBOL_GPL(dpll_device_get);
void dpll_device_put(struct dpll_device *dpll)
{
mutex_lock(&dpll_lock);
- if (refcount_dec_and_test(&dpll->refcount)) {
- ASSERT_DPLL_NOT_REGISTERED(dpll);
- WARN_ON_ONCE(!xa_empty(&dpll->pin_refs));
- xa_destroy(&dpll->pin_refs);
- xa_erase(&dpll_device_xa, dpll->id);
- WARN_ON(!list_empty(&dpll->registration_list));
- kfree(dpll);
- }
+ __dpll_device_put(dpll);
mutex_unlock(&dpll_lock);
}
EXPORT_SYMBOL_GPL(dpll_device_put);
@@ -416,6 +452,7 @@ int dpll_device_register(struct dpll_device *dpll, enum dpll_type type,
reg->ops = ops;
reg->priv = priv;
dpll->type = type;
+ __dpll_device_hold(dpll);
first_registration = list_empty(&dpll->registration_list);
list_add_tail(®->list, &dpll->registration_list);
if (!first_registration) {
@@ -455,6 +492,7 @@ void dpll_device_unregister(struct dpll_device *dpll,
return;
}
list_del(®->list);
+ __dpll_device_put(dpll);
kfree(reg);
if (!list_empty(&dpll->registration_list)) {
@@ -666,8 +704,8 @@ dpll_pin_get(u64 clock_id, u32 pin_idx, struct module *module,
if (pos->clock_id == clock_id &&
pos->pin_idx == pin_idx &&
pos->module == module) {
+ __dpll_pin_hold(pos);
ret = pos;
- refcount_inc(&ret->refcount);
break;
}
}
@@ -690,16 +728,7 @@ EXPORT_SYMBOL_GPL(dpll_pin_get);
void dpll_pin_put(struct dpll_pin *pin)
{
mutex_lock(&dpll_lock);
- if (refcount_dec_and_test(&pin->refcount)) {
- xa_erase(&dpll_pin_xa, pin->id);
- xa_destroy(&pin->dpll_refs);
- xa_destroy(&pin->parent_refs);
- xa_destroy(&pin->ref_sync_pins);
- dpll_pin_prop_free(&pin->prop);
- fwnode_handle_put(pin->fwnode);
- dpll_pin_idx_free(pin->pin_idx);
- kfree_rcu(pin, rcu);
- }
+ __dpll_pin_put(pin);
mutex_unlock(&dpll_lock);
}
EXPORT_SYMBOL_GPL(dpll_pin_put);
@@ -740,8 +769,8 @@ struct dpll_pin *fwnode_dpll_pin_find(struct fwnode_handle *fwnode)
mutex_lock(&dpll_lock);
xa_for_each(&dpll_pin_xa, index, pin) {
if (pin->fwnode == fwnode) {
+ __dpll_pin_hold(pin);
ret = pin;
- refcount_inc(&ret->refcount);
break;
}
}
@@ -893,7 +922,6 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin,
ret = dpll_xa_ref_pin_add(&pin->parent_refs, parent, ops, priv, pin);
if (ret)
goto unlock;
- refcount_inc(&pin->refcount);
xa_for_each(&parent->dpll_refs, i, ref) {
ret = __dpll_pin_register(ref->dpll, pin, ops, priv, parent);
if (ret) {
@@ -913,7 +941,6 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin,
parent);
dpll_pin_delete_ntf(pin);
}
- refcount_dec(&pin->refcount);
dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv, pin);
unlock:
mutex_unlock(&dpll_lock);
@@ -940,7 +967,6 @@ void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin,
mutex_lock(&dpll_lock);
dpll_pin_delete_ntf(pin);
dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv, pin);
- refcount_dec(&pin->refcount);
xa_for_each(&pin->dpll_refs, i, ref)
__dpll_pin_unregister(ref->dpll, pin, ops, priv, parent);
mutex_unlock(&dpll_lock);
--
2.52.0
|
{
"author": "Ivan Vecera <ivecera@redhat.com>",
"date": "Mon, 2 Feb 2026 18:16:35 +0100",
"thread_id": "20260202171638.17427-6-ivecera@redhat.com.mbox.gz"
}
|
lkml
|
[PATCH net-next v4 0/9] dpll: Core improvements and ice E825-C SyncE support
|
This series introduces Synchronous Ethernet (SyncE) support for the Intel
E825-C Ethernet controller. Unlike previous generations where DPLL
connections were implicitly assumed, the E825-C architecture relies
on the platform firmware (ACPI) to describe the physical connections
between the Ethernet controller and external DPLLs (such as the ZL3073x).
To accommodate this, the series extends the DPLL subsystem to support
firmware node (fwnode) associations, asynchronous discovery via notifiers,
and dynamic pin management. Additionally, a significant refactor of
the DPLL reference counting logic is included to ensure robustness and
debuggability.
DPLL Core Extensions:
* Firmware Node Association: Pins can now be associated with a struct
fwnode_handle after allocation via dpll_pin_fwnode_set(). This allows
drivers to link pin objects with their corresponding DT/ACPI nodes.
* Asynchronous Notifiers: A raw notifier chain is added to the DPLL core.
This allows the Ethernet driver to subscribe to events and react when
the platform DPLL driver registers the parent pins, resolving probe
ordering dependencies.
* Dynamic Indexing: Drivers can now request DPLL_PIN_IDX_UNSPEC to have
the core automatically allocate a unique pin index.
Reference Counting & Debugging:
* Refactor: The reference counting logic in the core is consolidated.
Internal list management helpers now automatically handle hold/put
operations, removing fragile open-coded logic in the registration paths.
* Reference Tracking: A new Kconfig option DPLL_REFCNT_TRACKER is added.
This allows developers to instrument and debug reference leaks by
recording stack traces for every get/put operation.
Driver Updates:
* zl3073x: Updated to associate pins with fwnode handles using the new
setter and support the 'mux' pin type.
* ice: Implements the E825-C specific hardware configuration for SyncE
(CGU registers). It utilizes the new notifier and fwnode APIs to
dynamically discover and attach to the platform DPLLs.
Patch Summary:
Patch 1: DPLL Core (fwnode association).
Patch 2: Driver zl3073x (Set fwnode).
Patch 3-4: DPLL Core (Notifiers and dynamic IDs).
Patch 5: Driver zl3073x (Mux type).
Patch 6: DPLL Core (Refcount refactor).
Patch 7-8: Refcount tracking infrastructure and driver updates.
Patch 9: Driver ice (E825-C SyncE logic).
Changes in v4:
* Fixed documentation and function stub issues found by AI
Arkadiusz Kubalewski (1):
ice: dpll: Support E825-C SyncE and dynamic pin discovery
Ivan Vecera (7):
dpll: Allow associating dpll pin with a firmware node
dpll: zl3073x: Associate pin with fwnode handle
dpll: Support dynamic pin index allocation
dpll: zl3073x: Add support for mux pin type
dpll: Enhance and consolidate reference counting logic
dpll: Add reference count tracking support
drivers: Add support for DPLL reference count tracking
Petr Oros (1):
dpll: Add notifier chain for dpll events
drivers/dpll/Kconfig | 15 +
drivers/dpll/dpll_core.c | 288 ++++++-
drivers/dpll/dpll_core.h | 11 +
drivers/dpll/dpll_netlink.c | 6 +
drivers/dpll/zl3073x/dpll.c | 15 +-
drivers/dpll/zl3073x/dpll.h | 2 +
drivers/dpll/zl3073x/prop.c | 2 +
drivers/net/ethernet/intel/ice/ice_dpll.c | 755 +++++++++++++++---
drivers/net/ethernet/intel/ice/ice_dpll.h | 30 +
drivers/net/ethernet/intel/ice/ice_lib.c | 3 +
drivers/net/ethernet/intel/ice/ice_ptp.c | 32 +
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 9 +-
drivers/net/ethernet/intel/ice/ice_tspll.c | 217 +++++
drivers/net/ethernet/intel/ice/ice_tspll.h | 13 +-
drivers/net/ethernet/intel/ice/ice_type.h | 6 +
.../net/ethernet/mellanox/mlx5/core/dpll.c | 16 +-
drivers/ptp/ptp_ocp.c | 18 +-
include/linux/dpll.h | 59 +-
18 files changed, 1347 insertions(+), 150 deletions(-)
--
2.52.0
|
Add support for the REF_TRACKER infrastructure to the DPLL subsystem.
When enabled, this allows developers to track and debug reference counting
leaks or imbalances for dpll_device and dpll_pin objects. It records stack
traces for every get/put operation and exposes this information via
debugfs at:
/sys/kernel/debug/ref_tracker/dpll_device_*
/sys/kernel/debug/ref_tracker/dpll_pin_*
The following API changes are made to support this:
1. dpll_device_get() / dpll_device_put() now accept a 'dpll_tracker *'
(which is a typedef to 'struct ref_tracker *' when enabled, or an empty
struct otherwise).
2. dpll_pin_get() / dpll_pin_put() and fwnode_dpll_pin_find() similarly
accept the tracker argument.
3. Internal registration structures now hold a tracker to associate the
reference held by the registration with the specific owner.
All existing in-tree drivers (ice, mlx5, ptp_ocp, zl3073x) are updated
to pass NULL for the new tracker argument, maintaining current behavior
while enabling future debugging capabilities.
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Co-developed-by: Petr Oros <poros@redhat.com>
Signed-off-by: Petr Oros <poros@redhat.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
v4:
* added missing tracker parameter to fwnode_dpll_pin_find() stub
v3:
* added Kconfig dependency on STACKTRACE_SUPPORT and DEBUG_KERNEL
---
drivers/dpll/Kconfig | 15 +++
drivers/dpll/dpll_core.c | 98 ++++++++++++++-----
drivers/dpll/dpll_core.h | 5 +
drivers/dpll/zl3073x/dpll.c | 12 +--
drivers/net/ethernet/intel/ice/ice_dpll.c | 14 +--
.../net/ethernet/mellanox/mlx5/core/dpll.c | 13 +--
drivers/ptp/ptp_ocp.c | 15 +--
include/linux/dpll.h | 21 ++--
8 files changed, 139 insertions(+), 54 deletions(-)
diff --git a/drivers/dpll/Kconfig b/drivers/dpll/Kconfig
index ade872c915ac6..be98969f040ab 100644
--- a/drivers/dpll/Kconfig
+++ b/drivers/dpll/Kconfig
@@ -8,6 +8,21 @@ menu "DPLL device support"
config DPLL
bool
+config DPLL_REFCNT_TRACKER
+ bool "DPLL reference count tracking"
+ depends on DEBUG_KERNEL && STACKTRACE_SUPPORT && DPLL
+ select REF_TRACKER
+ help
+ Enable reference count tracking for DPLL devices and pins.
+ This helps debugging reference leaks and use-after-free bugs
+ by recording stack traces for each get/put operation.
+
+ The tracking information is exposed via debugfs at:
+ /sys/kernel/debug/ref_tracker/dpll_device_*
+ /sys/kernel/debug/ref_tracker/dpll_pin_*
+
+ If unsure, say N.
+
source "drivers/dpll/zl3073x/Kconfig"
endmenu
diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c
index f6ab4f0cad84d..627a5b39a0efd 100644
--- a/drivers/dpll/dpll_core.c
+++ b/drivers/dpll/dpll_core.c
@@ -41,6 +41,7 @@ struct dpll_device_registration {
struct list_head list;
const struct dpll_device_ops *ops;
void *priv;
+ dpll_tracker tracker;
};
struct dpll_pin_registration {
@@ -48,6 +49,7 @@ struct dpll_pin_registration {
const struct dpll_pin_ops *ops;
void *priv;
void *cookie;
+ dpll_tracker tracker;
};
static int call_dpll_notifiers(unsigned long action, void *info)
@@ -83,33 +85,68 @@ void dpll_pin_notify(struct dpll_pin *pin, unsigned long action)
call_dpll_notifiers(action, &info);
}
-static void __dpll_device_hold(struct dpll_device *dpll)
+static void dpll_device_tracker_alloc(struct dpll_device *dpll,
+ dpll_tracker *tracker)
{
+#ifdef CONFIG_DPLL_REFCNT_TRACKER
+ ref_tracker_alloc(&dpll->refcnt_tracker, tracker, GFP_KERNEL);
+#endif
+}
+
+static void dpll_device_tracker_free(struct dpll_device *dpll,
+ dpll_tracker *tracker)
+{
+#ifdef CONFIG_DPLL_REFCNT_TRACKER
+ ref_tracker_free(&dpll->refcnt_tracker, tracker);
+#endif
+}
+
+static void __dpll_device_hold(struct dpll_device *dpll, dpll_tracker *tracker)
+{
+ dpll_device_tracker_alloc(dpll, tracker);
refcount_inc(&dpll->refcount);
}
-static void __dpll_device_put(struct dpll_device *dpll)
+static void __dpll_device_put(struct dpll_device *dpll, dpll_tracker *tracker)
{
+ dpll_device_tracker_free(dpll, tracker);
if (refcount_dec_and_test(&dpll->refcount)) {
ASSERT_DPLL_NOT_REGISTERED(dpll);
WARN_ON_ONCE(!xa_empty(&dpll->pin_refs));
xa_destroy(&dpll->pin_refs);
xa_erase(&dpll_device_xa, dpll->id);
WARN_ON(!list_empty(&dpll->registration_list));
+ ref_tracker_dir_exit(&dpll->refcnt_tracker);
kfree(dpll);
}
}
-static void __dpll_pin_hold(struct dpll_pin *pin)
+static void dpll_pin_tracker_alloc(struct dpll_pin *pin, dpll_tracker *tracker)
{
+#ifdef CONFIG_DPLL_REFCNT_TRACKER
+ ref_tracker_alloc(&pin->refcnt_tracker, tracker, GFP_KERNEL);
+#endif
+}
+
+static void dpll_pin_tracker_free(struct dpll_pin *pin, dpll_tracker *tracker)
+{
+#ifdef CONFIG_DPLL_REFCNT_TRACKER
+ ref_tracker_free(&pin->refcnt_tracker, tracker);
+#endif
+}
+
+static void __dpll_pin_hold(struct dpll_pin *pin, dpll_tracker *tracker)
+{
+ dpll_pin_tracker_alloc(pin, tracker);
refcount_inc(&pin->refcount);
}
static void dpll_pin_idx_free(u32 pin_idx);
static void dpll_pin_prop_free(struct dpll_pin_properties *prop);
-static void __dpll_pin_put(struct dpll_pin *pin)
+static void __dpll_pin_put(struct dpll_pin *pin, dpll_tracker *tracker)
{
+ dpll_pin_tracker_free(pin, tracker);
if (refcount_dec_and_test(&pin->refcount)) {
xa_erase(&dpll_pin_xa, pin->id);
xa_destroy(&pin->dpll_refs);
@@ -118,6 +155,7 @@ static void __dpll_pin_put(struct dpll_pin *pin)
dpll_pin_prop_free(&pin->prop);
fwnode_handle_put(pin->fwnode);
dpll_pin_idx_free(pin->pin_idx);
+ ref_tracker_dir_exit(&pin->refcnt_tracker);
kfree_rcu(pin, rcu);
}
}
@@ -191,7 +229,7 @@ dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin,
reg->ops = ops;
reg->priv = priv;
reg->cookie = cookie;
- __dpll_pin_hold(pin);
+ __dpll_pin_hold(pin, ®->tracker);
if (ref_exists)
refcount_inc(&ref->refcount);
list_add_tail(®->list, &ref->registration_list);
@@ -214,7 +252,7 @@ static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin,
if (WARN_ON(!reg))
return -EINVAL;
list_del(®->list);
- __dpll_pin_put(pin);
+ __dpll_pin_put(pin, ®->tracker);
kfree(reg);
if (refcount_dec_and_test(&ref->refcount)) {
xa_erase(xa_pins, i);
@@ -272,7 +310,7 @@ dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll,
reg->ops = ops;
reg->priv = priv;
reg->cookie = cookie;
- __dpll_device_hold(dpll);
+ __dpll_device_hold(dpll, ®->tracker);
if (ref_exists)
refcount_inc(&ref->refcount);
list_add_tail(®->list, &ref->registration_list);
@@ -295,7 +333,7 @@ dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll,
if (WARN_ON(!reg))
return;
list_del(®->list);
- __dpll_device_put(dpll);
+ __dpll_device_put(dpll, ®->tracker);
kfree(reg);
if (refcount_dec_and_test(&ref->refcount)) {
xa_erase(xa_dplls, i);
@@ -337,6 +375,7 @@ dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module)
return ERR_PTR(ret);
}
xa_init_flags(&dpll->pin_refs, XA_FLAGS_ALLOC);
+ ref_tracker_dir_init(&dpll->refcnt_tracker, 128, "dpll_device");
return dpll;
}
@@ -346,6 +385,7 @@ dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module)
* @clock_id: clock_id of creator
* @device_idx: idx given by device driver
* @module: reference to registering module
+ * @tracker: tracking object for the acquired reference
*
* Get existing object of a dpll device, unique for given arguments.
* Create new if doesn't exist yet.
@@ -356,7 +396,8 @@ dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module)
* * ERR_PTR(X) - error
*/
struct dpll_device *
-dpll_device_get(u64 clock_id, u32 device_idx, struct module *module)
+dpll_device_get(u64 clock_id, u32 device_idx, struct module *module,
+ dpll_tracker *tracker)
{
struct dpll_device *dpll, *ret = NULL;
unsigned long index;
@@ -366,13 +407,17 @@ dpll_device_get(u64 clock_id, u32 device_idx, struct module *module)
if (dpll->clock_id == clock_id &&
dpll->device_idx == device_idx &&
dpll->module == module) {
- __dpll_device_hold(dpll);
+ __dpll_device_hold(dpll, tracker);
ret = dpll;
break;
}
}
- if (!ret)
+ if (!ret) {
ret = dpll_device_alloc(clock_id, device_idx, module);
+ if (!IS_ERR(ret))
+ dpll_device_tracker_alloc(ret, tracker);
+ }
+
mutex_unlock(&dpll_lock);
return ret;
@@ -382,15 +427,16 @@ EXPORT_SYMBOL_GPL(dpll_device_get);
/**
* dpll_device_put - decrease the refcount and free memory if possible
* @dpll: dpll_device struct pointer
+ * @tracker: tracking object for the acquired reference
*
* Context: Acquires a lock (dpll_lock)
* Drop reference for a dpll device, if all references are gone, delete
* dpll device object.
*/
-void dpll_device_put(struct dpll_device *dpll)
+void dpll_device_put(struct dpll_device *dpll, dpll_tracker *tracker)
{
mutex_lock(&dpll_lock);
- __dpll_device_put(dpll);
+ __dpll_device_put(dpll, tracker);
mutex_unlock(&dpll_lock);
}
EXPORT_SYMBOL_GPL(dpll_device_put);
@@ -452,7 +498,7 @@ int dpll_device_register(struct dpll_device *dpll, enum dpll_type type,
reg->ops = ops;
reg->priv = priv;
dpll->type = type;
- __dpll_device_hold(dpll);
+ __dpll_device_hold(dpll, ®->tracker);
first_registration = list_empty(&dpll->registration_list);
list_add_tail(®->list, &dpll->registration_list);
if (!first_registration) {
@@ -492,7 +538,7 @@ void dpll_device_unregister(struct dpll_device *dpll,
return;
}
list_del(®->list);
- __dpll_device_put(dpll);
+ __dpll_device_put(dpll, ®->tracker);
kfree(reg);
if (!list_empty(&dpll->registration_list)) {
@@ -622,6 +668,7 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module,
&dpll_pin_xa_id, GFP_KERNEL);
if (ret < 0)
goto err_xa_alloc;
+ ref_tracker_dir_init(&pin->refcnt_tracker, 128, "dpll_pin");
return pin;
err_xa_alloc:
xa_destroy(&pin->dpll_refs);
@@ -683,6 +730,7 @@ EXPORT_SYMBOL_GPL(unregister_dpll_notifier);
* @pin_idx: idx given by dev driver
* @module: reference to registering module
* @prop: dpll pin properties
+ * @tracker: tracking object for the acquired reference
*
* Get existing object of a pin (unique for given arguments) or create new
* if doesn't exist yet.
@@ -694,7 +742,7 @@ EXPORT_SYMBOL_GPL(unregister_dpll_notifier);
*/
struct dpll_pin *
dpll_pin_get(u64 clock_id, u32 pin_idx, struct module *module,
- const struct dpll_pin_properties *prop)
+ const struct dpll_pin_properties *prop, dpll_tracker *tracker)
{
struct dpll_pin *pos, *ret = NULL;
unsigned long i;
@@ -704,13 +752,16 @@ dpll_pin_get(u64 clock_id, u32 pin_idx, struct module *module,
if (pos->clock_id == clock_id &&
pos->pin_idx == pin_idx &&
pos->module == module) {
- __dpll_pin_hold(pos);
+ __dpll_pin_hold(pos, tracker);
ret = pos;
break;
}
}
- if (!ret)
+ if (!ret) {
ret = dpll_pin_alloc(clock_id, pin_idx, module, prop);
+ if (!IS_ERR(ret))
+ dpll_pin_tracker_alloc(ret, tracker);
+ }
mutex_unlock(&dpll_lock);
return ret;
@@ -720,15 +771,16 @@ EXPORT_SYMBOL_GPL(dpll_pin_get);
/**
* dpll_pin_put - decrease the refcount and free memory if possible
* @pin: pointer to a pin to be put
+ * @tracker: tracking object for the acquired reference
*
* Drop reference for a pin, if all references are gone, delete pin object.
*
* Context: Acquires a lock (dpll_lock)
*/
-void dpll_pin_put(struct dpll_pin *pin)
+void dpll_pin_put(struct dpll_pin *pin, dpll_tracker *tracker)
{
mutex_lock(&dpll_lock);
- __dpll_pin_put(pin);
+ __dpll_pin_put(pin, tracker);
mutex_unlock(&dpll_lock);
}
EXPORT_SYMBOL_GPL(dpll_pin_put);
@@ -752,6 +804,7 @@ EXPORT_SYMBOL_GPL(dpll_pin_fwnode_set);
/**
* fwnode_dpll_pin_find - find dpll pin by firmware node reference
* @fwnode: reference to firmware node
+ * @tracker: tracking object for the acquired reference
*
* Get existing object of a pin that is associated with given firmware node
* reference.
@@ -761,7 +814,8 @@ EXPORT_SYMBOL_GPL(dpll_pin_fwnode_set);
* * valid dpll_pin pointer on success
* * NULL when no such pin exists
*/
-struct dpll_pin *fwnode_dpll_pin_find(struct fwnode_handle *fwnode)
+struct dpll_pin *fwnode_dpll_pin_find(struct fwnode_handle *fwnode,
+ dpll_tracker *tracker)
{
struct dpll_pin *pin, *ret = NULL;
unsigned long index;
@@ -769,7 +823,7 @@ struct dpll_pin *fwnode_dpll_pin_find(struct fwnode_handle *fwnode)
mutex_lock(&dpll_lock);
xa_for_each(&dpll_pin_xa, index, pin) {
if (pin->fwnode == fwnode) {
- __dpll_pin_hold(pin);
+ __dpll_pin_hold(pin, tracker);
ret = pin;
break;
}
diff --git a/drivers/dpll/dpll_core.h b/drivers/dpll/dpll_core.h
index b7b4bb251f739..71ac88ef20172 100644
--- a/drivers/dpll/dpll_core.h
+++ b/drivers/dpll/dpll_core.h
@@ -10,6 +10,7 @@
#include <linux/dpll.h>
#include <linux/list.h>
#include <linux/refcount.h>
+#include <linux/ref_tracker.h>
#include "dpll_nl.h"
#define DPLL_REGISTERED XA_MARK_1
@@ -23,6 +24,7 @@
* @type: type of a dpll
* @pin_refs: stores pins registered within a dpll
* @refcount: refcount
+ * @refcnt_tracker: ref_tracker directory for debugging reference leaks
* @registration_list: list of registered ops and priv data of dpll owners
**/
struct dpll_device {
@@ -33,6 +35,7 @@ struct dpll_device {
enum dpll_type type;
struct xarray pin_refs;
refcount_t refcount;
+ struct ref_tracker_dir refcnt_tracker;
struct list_head registration_list;
};
@@ -48,6 +51,7 @@ struct dpll_device {
* @ref_sync_pins: hold references to pins for Reference SYNC feature
* @prop: pin properties copied from the registerer
* @refcount: refcount
+ * @refcnt_tracker: ref_tracker directory for debugging reference leaks
* @rcu: rcu_head for kfree_rcu()
**/
struct dpll_pin {
@@ -61,6 +65,7 @@ struct dpll_pin {
struct xarray ref_sync_pins;
struct dpll_pin_properties prop;
refcount_t refcount;
+ struct ref_tracker_dir refcnt_tracker;
struct rcu_head rcu;
};
diff --git a/drivers/dpll/zl3073x/dpll.c b/drivers/dpll/zl3073x/dpll.c
index 9eed21088adac..8788bcab7ec53 100644
--- a/drivers/dpll/zl3073x/dpll.c
+++ b/drivers/dpll/zl3073x/dpll.c
@@ -1480,7 +1480,7 @@ zl3073x_dpll_pin_register(struct zl3073x_dpll_pin *pin, u32 index)
/* Create or get existing DPLL pin */
pin->dpll_pin = dpll_pin_get(zldpll->dev->clock_id, index, THIS_MODULE,
- &props->dpll_props);
+ &props->dpll_props, NULL);
if (IS_ERR(pin->dpll_pin)) {
rc = PTR_ERR(pin->dpll_pin);
goto err_pin_get;
@@ -1503,7 +1503,7 @@ zl3073x_dpll_pin_register(struct zl3073x_dpll_pin *pin, u32 index)
return 0;
err_register:
- dpll_pin_put(pin->dpll_pin);
+ dpll_pin_put(pin->dpll_pin, NULL);
err_prio_get:
pin->dpll_pin = NULL;
err_pin_get:
@@ -1534,7 +1534,7 @@ zl3073x_dpll_pin_unregister(struct zl3073x_dpll_pin *pin)
/* Unregister the pin */
dpll_pin_unregister(zldpll->dpll_dev, pin->dpll_pin, ops, pin);
- dpll_pin_put(pin->dpll_pin);
+ dpll_pin_put(pin->dpll_pin, NULL);
pin->dpll_pin = NULL;
}
@@ -1708,7 +1708,7 @@ zl3073x_dpll_device_register(struct zl3073x_dpll *zldpll)
dpll_mode_refsel);
zldpll->dpll_dev = dpll_device_get(zldev->clock_id, zldpll->id,
- THIS_MODULE);
+ THIS_MODULE, NULL);
if (IS_ERR(zldpll->dpll_dev)) {
rc = PTR_ERR(zldpll->dpll_dev);
zldpll->dpll_dev = NULL;
@@ -1720,7 +1720,7 @@ zl3073x_dpll_device_register(struct zl3073x_dpll *zldpll)
zl3073x_prop_dpll_type_get(zldev, zldpll->id),
&zl3073x_dpll_device_ops, zldpll);
if (rc) {
- dpll_device_put(zldpll->dpll_dev);
+ dpll_device_put(zldpll->dpll_dev, NULL);
zldpll->dpll_dev = NULL;
}
@@ -1743,7 +1743,7 @@ zl3073x_dpll_device_unregister(struct zl3073x_dpll *zldpll)
dpll_device_unregister(zldpll->dpll_dev, &zl3073x_dpll_device_ops,
zldpll);
- dpll_device_put(zldpll->dpll_dev);
+ dpll_device_put(zldpll->dpll_dev, NULL);
zldpll->dpll_dev = NULL;
}
diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c
index 53b54e395a2ed..64b7b045ecd58 100644
--- a/drivers/net/ethernet/intel/ice/ice_dpll.c
+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c
@@ -2814,7 +2814,7 @@ static void ice_dpll_release_pins(struct ice_dpll_pin *pins, int count)
int i;
for (i = 0; i < count; i++)
- dpll_pin_put(pins[i].pin);
+ dpll_pin_put(pins[i].pin, NULL);
}
/**
@@ -2840,7 +2840,7 @@ ice_dpll_get_pins(struct ice_pf *pf, struct ice_dpll_pin *pins,
for (i = 0; i < count; i++) {
pins[i].pin = dpll_pin_get(clock_id, i + start_idx, THIS_MODULE,
- &pins[i].prop);
+ &pins[i].prop, NULL);
if (IS_ERR(pins[i].pin)) {
ret = PTR_ERR(pins[i].pin);
goto release_pins;
@@ -2851,7 +2851,7 @@ ice_dpll_get_pins(struct ice_pf *pf, struct ice_dpll_pin *pins,
release_pins:
while (--i >= 0)
- dpll_pin_put(pins[i].pin);
+ dpll_pin_put(pins[i].pin, NULL);
return ret;
}
@@ -3037,7 +3037,7 @@ static void ice_dpll_deinit_rclk_pin(struct ice_pf *pf)
if (WARN_ON_ONCE(!vsi || !vsi->netdev))
return;
dpll_netdev_pin_clear(vsi->netdev);
- dpll_pin_put(rclk->pin);
+ dpll_pin_put(rclk->pin, NULL);
}
/**
@@ -3247,7 +3247,7 @@ ice_dpll_deinit_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu)
{
if (cgu)
dpll_device_unregister(d->dpll, d->ops, d);
- dpll_device_put(d->dpll);
+ dpll_device_put(d->dpll, NULL);
}
/**
@@ -3271,7 +3271,7 @@ ice_dpll_init_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu,
u64 clock_id = pf->dplls.clock_id;
int ret;
- d->dpll = dpll_device_get(clock_id, d->dpll_idx, THIS_MODULE);
+ d->dpll = dpll_device_get(clock_id, d->dpll_idx, THIS_MODULE, NULL);
if (IS_ERR(d->dpll)) {
ret = PTR_ERR(d->dpll);
dev_err(ice_pf_to_dev(pf),
@@ -3287,7 +3287,7 @@ ice_dpll_init_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu,
ice_dpll_update_state(pf, d, true);
ret = dpll_device_register(d->dpll, type, ops, d);
if (ret) {
- dpll_device_put(d->dpll);
+ dpll_device_put(d->dpll, NULL);
return ret;
}
d->ops = ops;
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c
index 3ea8a1766ae28..541d83e5d7183 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c
@@ -438,7 +438,7 @@ static int mlx5_dpll_probe(struct auxiliary_device *adev,
auxiliary_set_drvdata(adev, mdpll);
/* Multiple mdev instances might share one DPLL device. */
- mdpll->dpll = dpll_device_get(clock_id, 0, THIS_MODULE);
+ mdpll->dpll = dpll_device_get(clock_id, 0, THIS_MODULE, NULL);
if (IS_ERR(mdpll->dpll)) {
err = PTR_ERR(mdpll->dpll);
goto err_free_mdpll;
@@ -451,7 +451,8 @@ static int mlx5_dpll_probe(struct auxiliary_device *adev,
/* Multiple mdev instances might share one DPLL pin. */
mdpll->dpll_pin = dpll_pin_get(clock_id, mlx5_get_dev_index(mdev),
- THIS_MODULE, &mlx5_dpll_pin_properties);
+ THIS_MODULE, &mlx5_dpll_pin_properties,
+ NULL);
if (IS_ERR(mdpll->dpll_pin)) {
err = PTR_ERR(mdpll->dpll_pin);
goto err_unregister_dpll_device;
@@ -479,11 +480,11 @@ static int mlx5_dpll_probe(struct auxiliary_device *adev,
dpll_pin_unregister(mdpll->dpll, mdpll->dpll_pin,
&mlx5_dpll_pins_ops, mdpll);
err_put_dpll_pin:
- dpll_pin_put(mdpll->dpll_pin);
+ dpll_pin_put(mdpll->dpll_pin, NULL);
err_unregister_dpll_device:
dpll_device_unregister(mdpll->dpll, &mlx5_dpll_device_ops, mdpll);
err_put_dpll_device:
- dpll_device_put(mdpll->dpll);
+ dpll_device_put(mdpll->dpll, NULL);
err_free_mdpll:
kfree(mdpll);
return err;
@@ -499,9 +500,9 @@ static void mlx5_dpll_remove(struct auxiliary_device *adev)
destroy_workqueue(mdpll->wq);
dpll_pin_unregister(mdpll->dpll, mdpll->dpll_pin,
&mlx5_dpll_pins_ops, mdpll);
- dpll_pin_put(mdpll->dpll_pin);
+ dpll_pin_put(mdpll->dpll_pin, NULL);
dpll_device_unregister(mdpll->dpll, &mlx5_dpll_device_ops, mdpll);
- dpll_device_put(mdpll->dpll);
+ dpll_device_put(mdpll->dpll, NULL);
kfree(mdpll);
mlx5_dpll_synce_status_set(mdev,
diff --git a/drivers/ptp/ptp_ocp.c b/drivers/ptp/ptp_ocp.c
index 65fe05cac8c42..f39b3966b3e8c 100644
--- a/drivers/ptp/ptp_ocp.c
+++ b/drivers/ptp/ptp_ocp.c
@@ -4788,7 +4788,7 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
devlink_register(devlink);
clkid = pci_get_dsn(pdev);
- bp->dpll = dpll_device_get(clkid, 0, THIS_MODULE);
+ bp->dpll = dpll_device_get(clkid, 0, THIS_MODULE, NULL);
if (IS_ERR(bp->dpll)) {
err = PTR_ERR(bp->dpll);
dev_err(&pdev->dev, "dpll_device_alloc failed\n");
@@ -4800,7 +4800,8 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
goto out;
for (i = 0; i < OCP_SMA_NUM; i++) {
- bp->sma[i].dpll_pin = dpll_pin_get(clkid, i, THIS_MODULE, &bp->sma[i].dpll_prop);
+ bp->sma[i].dpll_pin = dpll_pin_get(clkid, i, THIS_MODULE,
+ &bp->sma[i].dpll_prop, NULL);
if (IS_ERR(bp->sma[i].dpll_pin)) {
err = PTR_ERR(bp->sma[i].dpll_pin);
goto out_dpll;
@@ -4809,7 +4810,7 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
err = dpll_pin_register(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops,
&bp->sma[i]);
if (err) {
- dpll_pin_put(bp->sma[i].dpll_pin);
+ dpll_pin_put(bp->sma[i].dpll_pin, NULL);
goto out_dpll;
}
}
@@ -4819,9 +4820,9 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
out_dpll:
while (i--) {
dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]);
- dpll_pin_put(bp->sma[i].dpll_pin);
+ dpll_pin_put(bp->sma[i].dpll_pin, NULL);
}
- dpll_device_put(bp->dpll);
+ dpll_device_put(bp->dpll, NULL);
out:
ptp_ocp_detach(bp);
out_disable:
@@ -4842,11 +4843,11 @@ ptp_ocp_remove(struct pci_dev *pdev)
for (i = 0; i < OCP_SMA_NUM; i++) {
if (bp->sma[i].dpll_pin) {
dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]);
- dpll_pin_put(bp->sma[i].dpll_pin);
+ dpll_pin_put(bp->sma[i].dpll_pin, NULL);
}
}
dpll_device_unregister(bp->dpll, &dpll_ops, bp);
- dpll_device_put(bp->dpll);
+ dpll_device_put(bp->dpll, NULL);
devlink_unregister(devlink);
ptp_ocp_detach(bp);
pci_disable_device(pdev);
diff --git a/include/linux/dpll.h b/include/linux/dpll.h
index 8fff048131f1d..5c80cdab0c180 100644
--- a/include/linux/dpll.h
+++ b/include/linux/dpll.h
@@ -18,6 +18,7 @@ struct dpll_device;
struct dpll_pin;
struct dpll_pin_esync;
struct fwnode_handle;
+struct ref_tracker;
struct dpll_device_ops {
int (*mode_get)(const struct dpll_device *dpll, void *dpll_priv,
@@ -173,6 +174,12 @@ struct dpll_pin_properties {
u32 phase_gran;
};
+#ifdef CONFIG_DPLL_REFCNT_TRACKER
+typedef struct ref_tracker *dpll_tracker;
+#else
+typedef struct {} dpll_tracker;
+#endif
+
#define DPLL_DEVICE_CREATED 1
#define DPLL_DEVICE_DELETED 2
#define DPLL_DEVICE_CHANGED 3
@@ -205,7 +212,8 @@ size_t dpll_netdev_pin_handle_size(const struct net_device *dev);
int dpll_netdev_add_pin_handle(struct sk_buff *msg,
const struct net_device *dev);
-struct dpll_pin *fwnode_dpll_pin_find(struct fwnode_handle *fwnode);
+struct dpll_pin *fwnode_dpll_pin_find(struct fwnode_handle *fwnode,
+ dpll_tracker *tracker);
#else
static inline void
dpll_netdev_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin) { }
@@ -223,16 +231,17 @@ dpll_netdev_add_pin_handle(struct sk_buff *msg, const struct net_device *dev)
}
static inline struct dpll_pin *
-fwnode_dpll_pin_find(struct fwnode_handle *fwnode)
+fwnode_dpll_pin_find(struct fwnode_handle *fwnode, dpll_tracker *tracker);
{
return NULL;
}
#endif
struct dpll_device *
-dpll_device_get(u64 clock_id, u32 dev_driver_id, struct module *module);
+dpll_device_get(u64 clock_id, u32 dev_driver_id, struct module *module,
+ dpll_tracker *tracker);
-void dpll_device_put(struct dpll_device *dpll);
+void dpll_device_put(struct dpll_device *dpll, dpll_tracker *tracker);
int dpll_device_register(struct dpll_device *dpll, enum dpll_type type,
const struct dpll_device_ops *ops, void *priv);
@@ -244,7 +253,7 @@ void dpll_device_unregister(struct dpll_device *dpll,
struct dpll_pin *
dpll_pin_get(u64 clock_id, u32 dev_driver_id, struct module *module,
- const struct dpll_pin_properties *prop);
+ const struct dpll_pin_properties *prop, dpll_tracker *tracker);
int dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,
const struct dpll_pin_ops *ops, void *priv);
@@ -252,7 +261,7 @@ int dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,
void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin,
const struct dpll_pin_ops *ops, void *priv);
-void dpll_pin_put(struct dpll_pin *pin);
+void dpll_pin_put(struct dpll_pin *pin, dpll_tracker *tracker);
void dpll_pin_fwnode_set(struct dpll_pin *pin, struct fwnode_handle *fwnode);
--
2.52.0
|
{
"author": "Ivan Vecera <ivecera@redhat.com>",
"date": "Mon, 2 Feb 2026 18:16:36 +0100",
"thread_id": "20260202171638.17427-6-ivecera@redhat.com.mbox.gz"
}
|
lkml
|
[PATCH net-next v4 0/9] dpll: Core improvements and ice E825-C SyncE support
|
This series introduces Synchronous Ethernet (SyncE) support for the Intel
E825-C Ethernet controller. Unlike previous generations where DPLL
connections were implicitly assumed, the E825-C architecture relies
on the platform firmware (ACPI) to describe the physical connections
between the Ethernet controller and external DPLLs (such as the ZL3073x).
To accommodate this, the series extends the DPLL subsystem to support
firmware node (fwnode) associations, asynchronous discovery via notifiers,
and dynamic pin management. Additionally, a significant refactor of
the DPLL reference counting logic is included to ensure robustness and
debuggability.
DPLL Core Extensions:
* Firmware Node Association: Pins can now be associated with a struct
fwnode_handle after allocation via dpll_pin_fwnode_set(). This allows
drivers to link pin objects with their corresponding DT/ACPI nodes.
* Asynchronous Notifiers: A raw notifier chain is added to the DPLL core.
This allows the Ethernet driver to subscribe to events and react when
the platform DPLL driver registers the parent pins, resolving probe
ordering dependencies.
* Dynamic Indexing: Drivers can now request DPLL_PIN_IDX_UNSPEC to have
the core automatically allocate a unique pin index.
Reference Counting & Debugging:
* Refactor: The reference counting logic in the core is consolidated.
Internal list management helpers now automatically handle hold/put
operations, removing fragile open-coded logic in the registration paths.
* Reference Tracking: A new Kconfig option DPLL_REFCNT_TRACKER is added.
This allows developers to instrument and debug reference leaks by
recording stack traces for every get/put operation.
Driver Updates:
* zl3073x: Updated to associate pins with fwnode handles using the new
setter and support the 'mux' pin type.
* ice: Implements the E825-C specific hardware configuration for SyncE
(CGU registers). It utilizes the new notifier and fwnode APIs to
dynamically discover and attach to the platform DPLLs.
Patch Summary:
Patch 1: DPLL Core (fwnode association).
Patch 2: Driver zl3073x (Set fwnode).
Patch 3-4: DPLL Core (Notifiers and dynamic IDs).
Patch 5: Driver zl3073x (Mux type).
Patch 6: DPLL Core (Refcount refactor).
Patch 7-8: Refcount tracking infrastructure and driver updates.
Patch 9: Driver ice (E825-C SyncE logic).
Changes in v4:
* Fixed documentation and function stub issues found by AI
Arkadiusz Kubalewski (1):
ice: dpll: Support E825-C SyncE and dynamic pin discovery
Ivan Vecera (7):
dpll: Allow associating dpll pin with a firmware node
dpll: zl3073x: Associate pin with fwnode handle
dpll: Support dynamic pin index allocation
dpll: zl3073x: Add support for mux pin type
dpll: Enhance and consolidate reference counting logic
dpll: Add reference count tracking support
drivers: Add support for DPLL reference count tracking
Petr Oros (1):
dpll: Add notifier chain for dpll events
drivers/dpll/Kconfig | 15 +
drivers/dpll/dpll_core.c | 288 ++++++-
drivers/dpll/dpll_core.h | 11 +
drivers/dpll/dpll_netlink.c | 6 +
drivers/dpll/zl3073x/dpll.c | 15 +-
drivers/dpll/zl3073x/dpll.h | 2 +
drivers/dpll/zl3073x/prop.c | 2 +
drivers/net/ethernet/intel/ice/ice_dpll.c | 755 +++++++++++++++---
drivers/net/ethernet/intel/ice/ice_dpll.h | 30 +
drivers/net/ethernet/intel/ice/ice_lib.c | 3 +
drivers/net/ethernet/intel/ice/ice_ptp.c | 32 +
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 9 +-
drivers/net/ethernet/intel/ice/ice_tspll.c | 217 +++++
drivers/net/ethernet/intel/ice/ice_tspll.h | 13 +-
drivers/net/ethernet/intel/ice/ice_type.h | 6 +
.../net/ethernet/mellanox/mlx5/core/dpll.c | 16 +-
drivers/ptp/ptp_ocp.c | 18 +-
include/linux/dpll.h | 59 +-
18 files changed, 1347 insertions(+), 150 deletions(-)
--
2.52.0
|
Update existing DPLL drivers to utilize the DPLL reference count
tracking infrastructure.
Add dpll_tracker fields to the drivers' internal device and pin
structures. Pass pointers to these trackers when calling
dpll_device_get/put() and dpll_pin_get/put().
This allows developers to inspect the specific references held by this
driver via debugfs when CONFIG_DPLL_REFCNT_TRACKER is enabled, aiding
in the debugging of resource leaks.
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
drivers/dpll/zl3073x/dpll.c | 14 ++++++++------
drivers/dpll/zl3073x/dpll.h | 2 ++
drivers/net/ethernet/intel/ice/ice_dpll.c | 15 ++++++++-------
drivers/net/ethernet/intel/ice/ice_dpll.h | 4 ++++
drivers/net/ethernet/mellanox/mlx5/core/dpll.c | 15 +++++++++------
drivers/ptp/ptp_ocp.c | 17 ++++++++++-------
6 files changed, 41 insertions(+), 26 deletions(-)
diff --git a/drivers/dpll/zl3073x/dpll.c b/drivers/dpll/zl3073x/dpll.c
index 8788bcab7ec53..a99d143a7acde 100644
--- a/drivers/dpll/zl3073x/dpll.c
+++ b/drivers/dpll/zl3073x/dpll.c
@@ -29,6 +29,7 @@
* @list: this DPLL pin list entry
* @dpll: DPLL the pin is registered to
* @dpll_pin: pointer to registered dpll_pin
+ * @tracker: tracking object for the acquired reference
* @label: package label
* @dir: pin direction
* @id: pin id
@@ -44,6 +45,7 @@ struct zl3073x_dpll_pin {
struct list_head list;
struct zl3073x_dpll *dpll;
struct dpll_pin *dpll_pin;
+ dpll_tracker tracker;
char label[8];
enum dpll_pin_direction dir;
u8 id;
@@ -1480,7 +1482,7 @@ zl3073x_dpll_pin_register(struct zl3073x_dpll_pin *pin, u32 index)
/* Create or get existing DPLL pin */
pin->dpll_pin = dpll_pin_get(zldpll->dev->clock_id, index, THIS_MODULE,
- &props->dpll_props, NULL);
+ &props->dpll_props, &pin->tracker);
if (IS_ERR(pin->dpll_pin)) {
rc = PTR_ERR(pin->dpll_pin);
goto err_pin_get;
@@ -1503,7 +1505,7 @@ zl3073x_dpll_pin_register(struct zl3073x_dpll_pin *pin, u32 index)
return 0;
err_register:
- dpll_pin_put(pin->dpll_pin, NULL);
+ dpll_pin_put(pin->dpll_pin, &pin->tracker);
err_prio_get:
pin->dpll_pin = NULL;
err_pin_get:
@@ -1534,7 +1536,7 @@ zl3073x_dpll_pin_unregister(struct zl3073x_dpll_pin *pin)
/* Unregister the pin */
dpll_pin_unregister(zldpll->dpll_dev, pin->dpll_pin, ops, pin);
- dpll_pin_put(pin->dpll_pin, NULL);
+ dpll_pin_put(pin->dpll_pin, &pin->tracker);
pin->dpll_pin = NULL;
}
@@ -1708,7 +1710,7 @@ zl3073x_dpll_device_register(struct zl3073x_dpll *zldpll)
dpll_mode_refsel);
zldpll->dpll_dev = dpll_device_get(zldev->clock_id, zldpll->id,
- THIS_MODULE, NULL);
+ THIS_MODULE, &zldpll->tracker);
if (IS_ERR(zldpll->dpll_dev)) {
rc = PTR_ERR(zldpll->dpll_dev);
zldpll->dpll_dev = NULL;
@@ -1720,7 +1722,7 @@ zl3073x_dpll_device_register(struct zl3073x_dpll *zldpll)
zl3073x_prop_dpll_type_get(zldev, zldpll->id),
&zl3073x_dpll_device_ops, zldpll);
if (rc) {
- dpll_device_put(zldpll->dpll_dev, NULL);
+ dpll_device_put(zldpll->dpll_dev, &zldpll->tracker);
zldpll->dpll_dev = NULL;
}
@@ -1743,7 +1745,7 @@ zl3073x_dpll_device_unregister(struct zl3073x_dpll *zldpll)
dpll_device_unregister(zldpll->dpll_dev, &zl3073x_dpll_device_ops,
zldpll);
- dpll_device_put(zldpll->dpll_dev, NULL);
+ dpll_device_put(zldpll->dpll_dev, &zldpll->tracker);
zldpll->dpll_dev = NULL;
}
diff --git a/drivers/dpll/zl3073x/dpll.h b/drivers/dpll/zl3073x/dpll.h
index e8c39b44b356c..c65c798c37927 100644
--- a/drivers/dpll/zl3073x/dpll.h
+++ b/drivers/dpll/zl3073x/dpll.h
@@ -18,6 +18,7 @@
* @check_count: periodic check counter
* @phase_monitor: is phase offset monitor enabled
* @dpll_dev: pointer to registered DPLL device
+ * @tracker: tracking object for the acquired reference
* @lock_status: last saved DPLL lock status
* @pins: list of pins
* @change_work: device change notification work
@@ -31,6 +32,7 @@ struct zl3073x_dpll {
u8 check_count;
bool phase_monitor;
struct dpll_device *dpll_dev;
+ dpll_tracker tracker;
enum dpll_lock_status lock_status;
struct list_head pins;
struct work_struct change_work;
diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c
index 64b7b045ecd58..4eca62688d834 100644
--- a/drivers/net/ethernet/intel/ice/ice_dpll.c
+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c
@@ -2814,7 +2814,7 @@ static void ice_dpll_release_pins(struct ice_dpll_pin *pins, int count)
int i;
for (i = 0; i < count; i++)
- dpll_pin_put(pins[i].pin, NULL);
+ dpll_pin_put(pins[i].pin, &pins[i].tracker);
}
/**
@@ -2840,7 +2840,7 @@ ice_dpll_get_pins(struct ice_pf *pf, struct ice_dpll_pin *pins,
for (i = 0; i < count; i++) {
pins[i].pin = dpll_pin_get(clock_id, i + start_idx, THIS_MODULE,
- &pins[i].prop, NULL);
+ &pins[i].prop, &pins[i].tracker);
if (IS_ERR(pins[i].pin)) {
ret = PTR_ERR(pins[i].pin);
goto release_pins;
@@ -2851,7 +2851,7 @@ ice_dpll_get_pins(struct ice_pf *pf, struct ice_dpll_pin *pins,
release_pins:
while (--i >= 0)
- dpll_pin_put(pins[i].pin, NULL);
+ dpll_pin_put(pins[i].pin, &pins[i].tracker);
return ret;
}
@@ -3037,7 +3037,7 @@ static void ice_dpll_deinit_rclk_pin(struct ice_pf *pf)
if (WARN_ON_ONCE(!vsi || !vsi->netdev))
return;
dpll_netdev_pin_clear(vsi->netdev);
- dpll_pin_put(rclk->pin, NULL);
+ dpll_pin_put(rclk->pin, &rclk->tracker);
}
/**
@@ -3247,7 +3247,7 @@ ice_dpll_deinit_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu)
{
if (cgu)
dpll_device_unregister(d->dpll, d->ops, d);
- dpll_device_put(d->dpll, NULL);
+ dpll_device_put(d->dpll, &d->tracker);
}
/**
@@ -3271,7 +3271,8 @@ ice_dpll_init_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu,
u64 clock_id = pf->dplls.clock_id;
int ret;
- d->dpll = dpll_device_get(clock_id, d->dpll_idx, THIS_MODULE, NULL);
+ d->dpll = dpll_device_get(clock_id, d->dpll_idx, THIS_MODULE,
+ &d->tracker);
if (IS_ERR(d->dpll)) {
ret = PTR_ERR(d->dpll);
dev_err(ice_pf_to_dev(pf),
@@ -3287,7 +3288,7 @@ ice_dpll_init_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu,
ice_dpll_update_state(pf, d, true);
ret = dpll_device_register(d->dpll, type, ops, d);
if (ret) {
- dpll_device_put(d->dpll, NULL);
+ dpll_device_put(d->dpll, &d->tracker);
return ret;
}
d->ops = ops;
diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h
index c0da03384ce91..63fac6510df6e 100644
--- a/drivers/net/ethernet/intel/ice/ice_dpll.h
+++ b/drivers/net/ethernet/intel/ice/ice_dpll.h
@@ -23,6 +23,7 @@ enum ice_dpll_pin_sw {
/** ice_dpll_pin - store info about pins
* @pin: dpll pin structure
* @pf: pointer to pf, which has registered the dpll_pin
+ * @tracker: reference count tracker
* @idx: ice pin private idx
* @num_parents: hols number of parent pins
* @parent_idx: hold indexes of parent pins
@@ -37,6 +38,7 @@ enum ice_dpll_pin_sw {
struct ice_dpll_pin {
struct dpll_pin *pin;
struct ice_pf *pf;
+ dpll_tracker tracker;
u8 idx;
u8 num_parents;
u8 parent_idx[ICE_DPLL_RCLK_NUM_MAX];
@@ -58,6 +60,7 @@ struct ice_dpll_pin {
/** ice_dpll - store info required for DPLL control
* @dpll: pointer to dpll dev
* @pf: pointer to pf, which has registered the dpll_device
+ * @tracker: reference count tracker
* @dpll_idx: index of dpll on the NIC
* @input_idx: currently selected input index
* @prev_input_idx: previously selected input index
@@ -76,6 +79,7 @@ struct ice_dpll_pin {
struct ice_dpll {
struct dpll_device *dpll;
struct ice_pf *pf;
+ dpll_tracker tracker;
u8 dpll_idx;
u8 input_idx;
u8 prev_input_idx;
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c
index 541d83e5d7183..3981dd81d4c17 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c
@@ -9,7 +9,9 @@
*/
struct mlx5_dpll {
struct dpll_device *dpll;
+ dpll_tracker dpll_tracker;
struct dpll_pin *dpll_pin;
+ dpll_tracker pin_tracker;
struct mlx5_core_dev *mdev;
struct workqueue_struct *wq;
struct delayed_work work;
@@ -438,7 +440,8 @@ static int mlx5_dpll_probe(struct auxiliary_device *adev,
auxiliary_set_drvdata(adev, mdpll);
/* Multiple mdev instances might share one DPLL device. */
- mdpll->dpll = dpll_device_get(clock_id, 0, THIS_MODULE, NULL);
+ mdpll->dpll = dpll_device_get(clock_id, 0, THIS_MODULE,
+ &mdpll->dpll_tracker);
if (IS_ERR(mdpll->dpll)) {
err = PTR_ERR(mdpll->dpll);
goto err_free_mdpll;
@@ -452,7 +455,7 @@ static int mlx5_dpll_probe(struct auxiliary_device *adev,
/* Multiple mdev instances might share one DPLL pin. */
mdpll->dpll_pin = dpll_pin_get(clock_id, mlx5_get_dev_index(mdev),
THIS_MODULE, &mlx5_dpll_pin_properties,
- NULL);
+ &mdpll->pin_tracker);
if (IS_ERR(mdpll->dpll_pin)) {
err = PTR_ERR(mdpll->dpll_pin);
goto err_unregister_dpll_device;
@@ -480,11 +483,11 @@ static int mlx5_dpll_probe(struct auxiliary_device *adev,
dpll_pin_unregister(mdpll->dpll, mdpll->dpll_pin,
&mlx5_dpll_pins_ops, mdpll);
err_put_dpll_pin:
- dpll_pin_put(mdpll->dpll_pin, NULL);
+ dpll_pin_put(mdpll->dpll_pin, &mdpll->pin_tracker);
err_unregister_dpll_device:
dpll_device_unregister(mdpll->dpll, &mlx5_dpll_device_ops, mdpll);
err_put_dpll_device:
- dpll_device_put(mdpll->dpll, NULL);
+ dpll_device_put(mdpll->dpll, &mdpll->dpll_tracker);
err_free_mdpll:
kfree(mdpll);
return err;
@@ -500,9 +503,9 @@ static void mlx5_dpll_remove(struct auxiliary_device *adev)
destroy_workqueue(mdpll->wq);
dpll_pin_unregister(mdpll->dpll, mdpll->dpll_pin,
&mlx5_dpll_pins_ops, mdpll);
- dpll_pin_put(mdpll->dpll_pin, NULL);
+ dpll_pin_put(mdpll->dpll_pin, &mdpll->pin_tracker);
dpll_device_unregister(mdpll->dpll, &mlx5_dpll_device_ops, mdpll);
- dpll_device_put(mdpll->dpll, NULL);
+ dpll_device_put(mdpll->dpll, &mdpll->dpll_tracker);
kfree(mdpll);
mlx5_dpll_synce_status_set(mdev,
diff --git a/drivers/ptp/ptp_ocp.c b/drivers/ptp/ptp_ocp.c
index f39b3966b3e8c..1b16a9c3d7fdc 100644
--- a/drivers/ptp/ptp_ocp.c
+++ b/drivers/ptp/ptp_ocp.c
@@ -285,6 +285,7 @@ struct ptp_ocp_sma_connector {
u8 default_fcn;
struct dpll_pin *dpll_pin;
struct dpll_pin_properties dpll_prop;
+ dpll_tracker tracker;
};
struct ocp_attr_group {
@@ -383,6 +384,7 @@ struct ptp_ocp {
struct ptp_ocp_sma_connector sma[OCP_SMA_NUM];
const struct ocp_sma_op *sma_op;
struct dpll_device *dpll;
+ dpll_tracker tracker;
int signals_nr;
int freq_in_nr;
};
@@ -4788,7 +4790,7 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
devlink_register(devlink);
clkid = pci_get_dsn(pdev);
- bp->dpll = dpll_device_get(clkid, 0, THIS_MODULE, NULL);
+ bp->dpll = dpll_device_get(clkid, 0, THIS_MODULE, &bp->tracker);
if (IS_ERR(bp->dpll)) {
err = PTR_ERR(bp->dpll);
dev_err(&pdev->dev, "dpll_device_alloc failed\n");
@@ -4801,7 +4803,8 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
for (i = 0; i < OCP_SMA_NUM; i++) {
bp->sma[i].dpll_pin = dpll_pin_get(clkid, i, THIS_MODULE,
- &bp->sma[i].dpll_prop, NULL);
+ &bp->sma[i].dpll_prop,
+ &bp->sma[i].tracker);
if (IS_ERR(bp->sma[i].dpll_pin)) {
err = PTR_ERR(bp->sma[i].dpll_pin);
goto out_dpll;
@@ -4810,7 +4813,7 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
err = dpll_pin_register(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops,
&bp->sma[i]);
if (err) {
- dpll_pin_put(bp->sma[i].dpll_pin, NULL);
+ dpll_pin_put(bp->sma[i].dpll_pin, &bp->sma[i].tracker);
goto out_dpll;
}
}
@@ -4820,9 +4823,9 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
out_dpll:
while (i--) {
dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]);
- dpll_pin_put(bp->sma[i].dpll_pin, NULL);
+ dpll_pin_put(bp->sma[i].dpll_pin, &bp->sma[i].tracker);
}
- dpll_device_put(bp->dpll, NULL);
+ dpll_device_put(bp->dpll, &bp->tracker);
out:
ptp_ocp_detach(bp);
out_disable:
@@ -4843,11 +4846,11 @@ ptp_ocp_remove(struct pci_dev *pdev)
for (i = 0; i < OCP_SMA_NUM; i++) {
if (bp->sma[i].dpll_pin) {
dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]);
- dpll_pin_put(bp->sma[i].dpll_pin, NULL);
+ dpll_pin_put(bp->sma[i].dpll_pin, &bp->sma[i].tracker);
}
}
dpll_device_unregister(bp->dpll, &dpll_ops, bp);
- dpll_device_put(bp->dpll, NULL);
+ dpll_device_put(bp->dpll, &bp->tracker);
devlink_unregister(devlink);
ptp_ocp_detach(bp);
pci_disable_device(pdev);
--
2.52.0
|
{
"author": "Ivan Vecera <ivecera@redhat.com>",
"date": "Mon, 2 Feb 2026 18:16:37 +0100",
"thread_id": "20260202171638.17427-6-ivecera@redhat.com.mbox.gz"
}
|
End of preview. Expand
in Data Studio
KernelLLM-1 Dataset
A high-quality raw dataset for training and fine-tuning LLMs on Operating System Development.
Overview
This dataset combines raw source code from a variety of mature and hobbyist operating system kernels with thousands of expert-level technical discussions and critiques from the Linux Kernel Mailing List.
The source code included in this dataset represents the latest stable versions of the respective repositories as of February 2nd 2026.
Dataset Structure
The dataset is provided in Parquet format for optimal compression and integration with the datasets library.
1. kernelllm_source.parquet (~1 GB)
Cleaned & Deduplicated Source Code (~970M Tokens).
- Files: 180,129
- Size: ~1 GB (Parquet), ~3.4 GB (Raw Text)
- Sources: Linux, FreeBSD, OpenBSD, NetBSD, Illumos, ReactOS, seL4, ToaruOS, Redox OS, SerenityOS and DragonFlyBSD.
- Cleaning:
- Removed common license headers (GPL, BSD, MIT, etc) to prioritize logic.
- Exact and "smart" deduplication (normalized whitespace) across repositories.
- Excluded files < 100 characters to remove boilerplate headers.
Repository Distribution:
| Repository | File Count |
|---|---|
| Linux | 62,969 |
| FreeBSD | 43,956 |
| Illumos | 23,411 |
| BSD-Mixed (Open/Net) | 22,949 |
| DragonFlyBSD | 17,662 |
| SerenityOS | 7,307 |
| Redox OS | 701 |
| ToaruOS | 609 |
| seL4 | 565 |
2. kernelllm_critiques.parquet (~3.6 MB) (Tiny bit of the LKML)
LKML Critique Pairs (3,135 pairs).
- Sources:
lore.kernel.orgarchives. - Content: Pairs code snippets (patches) with substantive replies, critiques and NACKs from senior maintainers.
- Schema:
{
"source": "lkml",
"subject": "[PATCH] ...",
"code": "(The patch content)",
"critique": "(The maintainer feedback)",
"metadata": {
"author": "...",
"date": "...",
"thread_id": "..."
}
}
Dataset Release Strategy
This is the Raw version of the dataset. It is intended for:
- Intermediate Training: Pre-training on high-quality systems code.
- Fine-Tuning: Instruction-tuning models to act as "Kernel Maintainers". (Or just make them better at Kernel code.)
- Research: Analyzing developer communication patterns in low-level systems.
Licensing and Usage
This dataset is a collection of publicly available open-source code and mailing list archives. It contains content governed by multiple licenses. For full details, see the LICENSE file.
- GNU General Public License (GPL) v2/v3 (e.g., Linux, ReactOS)
- BSD 2-Clause / 3-Clause (e.g., FreeBSD, OpenBSD, NetBSD)
- MIT License (e.g. SerenityOS, ToaruOS)
- Apache License 2.0 (e.g., seL4)
Disclaimer
- Original Licenses Apply: The individual source code files and mailing list archives contained in this dataset remain governed by their original respective licenses.
- Attribution: The
metadatafield for each entry in the dataset includes repository and author information to facilitate attribution. - Research & Ethics: This dataset is provided primarily for research and educational purposes in the field of LLM training and systems programming analysis.
- License Compliance: Users of this dataset are responsible for ensuring that their use of the data complies with all applicable licenses.w
Opt-out
If you are a maintainer of one of the included repositories and would like your data removed from future versions of this dataset, please open an issue on the Hugging Face dataset page.
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