url
stringclasses 147
values | commit
stringclasses 147
values | file_path
stringlengths 7
101
| full_name
stringlengths 1
94
| start
stringlengths 6
10
| end
stringlengths 6
11
| tactic
stringlengths 1
11.2k
| state_before
stringlengths 3
2.09M
| state_after
stringlengths 6
2.09M
|
|---|---|---|---|---|---|---|---|---|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Config.io_reg_haltedOn
|
[62, 9]
|
[63, 28]
|
simp [Config.haltedOn]
|
R L : Type
o : ℕ
r : R → ℕ
⊢ regs (haltedOn o r) WithIO.io = o
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsTo_functional
|
[91, 1]
|
[96, 54]
|
match c with
| {ip,regs} =>
cases ip <;>
(simp [step] at h1 h2; cases h1; cases h2; rfl)
|
R✝ L✝ : Type
Start✝ : ?m.35746
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.35760) true
R L : Type
x✝ : Sort ?u.35745
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.35760) true
c d1 d2 : Config R L
h1 : c [P]==> d1
h2 : c [P]==> d2
⊢ d1 = d2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsTo_functional
|
[91, 1]
|
[96, 54]
|
cases ip <;>
(simp [step] at h1 h2; cases h1; cases h2; rfl)
|
R✝ L✝ : Type
Start✝ : ?m.35746
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.35760) true
R L : Type
x✝ : Sort ?u.35745
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.35760) true
c d1 d2 : Config R L
ip : Option L
regs : R → ℕ
h1 : { ip := ip, regs := regs } [P]==> d1
h2 : { ip := ip, regs := regs } [P]==> d2
⊢ d1 = d2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsTo_functional
|
[91, 1]
|
[96, 54]
|
simp [step] at h1 h2
|
case some
R✝ L✝ : Type
Start✝ : ?m.35746
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.35760) true
R L : Type
x✝ : Sort ?u.35745
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.35760) true
c d1 d2 : Config R L
regs : R → ℕ
val✝ : L
h1 : { ip := some val✝, regs := regs } [P]==> d1
h2 : { ip := some val✝, regs := regs } [P]==> d2
⊢ d1 = d2
|
case some
R✝ L✝ : Type
Start✝ : ?m.35746
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.35760) true
R L : Type
x✝ : Sort ?u.35745
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.35760) true
c d1 d2 : Config R L
regs : R → ℕ
val✝ : L
h1 :
(match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }) =
d1
h2 :
(match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }) =
d2
⊢ d1 = d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsTo_functional
|
[91, 1]
|
[96, 54]
|
cases h1
|
case some
R✝ L✝ : Type
Start✝ : ?m.35746
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.35760) true
R L : Type
x✝ : Sort ?u.35745
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.35760) true
c d1 d2 : Config R L
regs : R → ℕ
val✝ : L
h1 :
(match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }) =
d1
h2 :
(match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }) =
d2
⊢ d1 = d2
|
case some.refl
R✝ L✝ : Type
Start✝ : ?m.35746
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.35760) true
R L : Type
x✝ : Sort ?u.35745
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.35760) true
c d2 : Config R L
regs : R → ℕ
val✝ : L
h2 :
(match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }) =
d2
⊢ (match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }) =
d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsTo_functional
|
[91, 1]
|
[96, 54]
|
cases h2
|
case some.refl
R✝ L✝ : Type
Start✝ : ?m.35746
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.35760) true
R L : Type
x✝ : Sort ?u.35745
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.35760) true
c d2 : Config R L
regs : R → ℕ
val✝ : L
h2 :
(match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }) =
d2
⊢ (match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }) =
d2
|
case some.refl.refl
R✝ L✝ : Type
Start✝ : ?m.35746
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.35760) true
R L : Type
x✝ : Sort ?u.35745
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.35760) true
c : Config R L
regs : R → ℕ
val✝ : L
⊢ (match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }) =
match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsTo_functional
|
[91, 1]
|
[96, 54]
|
rfl
|
case some.refl.refl
R✝ L✝ : Type
Start✝ : ?m.35746
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.35760) true
R L : Type
x✝ : Sort ?u.35745
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.35760) true
c : Config R L
regs : R → ℕ
val✝ : L
⊢ (match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }) =
match P val✝ with
| Instr.inc r l => { ip := l, regs := Function.update regs r (regs r + 1) }
| Instr.dec r l k =>
match regs r with
| Nat.succ n => { ip := l, regs := Function.update regs r n }
| 0 => { ip := k, regs := regs }
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_fixpoint
|
[98, 1]
|
[108, 17]
|
induction h using Relation.ReflTransGen.head_induction_on
|
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d : Config R L
h : c [P]==>* d
⊢ Config.is_halted c = true → c = d
|
case refl
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d : Config R L
⊢ Config.is_halted d = true → d = d
case head
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d a✝¹ c✝ : Config R L
h'✝ : a✝¹ [P]==> c✝
h✝ : Relation.ReflTransGen (stepsTo P) c✝ d
a✝ : Config.is_halted c✝ = true → c✝ = d
⊢ Config.is_halted a✝¹ = true → a✝¹ = d
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_fixpoint
|
[98, 1]
|
[108, 17]
|
case refl => simp
|
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d : Config R L
⊢ Config.is_halted d = true → d = d
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_fixpoint
|
[98, 1]
|
[108, 17]
|
case head c' d' h _ ih =>
intro hc'
simp [Config.is_halted] at hc' ih ⊢
simp [step, hc'] at h
cases h
apply ih hc'
|
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d c' d' : Config R L
h : c' [P]==> d'
h✝ : Relation.ReflTransGen (stepsTo P) d' d
ih : Config.is_halted d' = true → d' = d
⊢ Config.is_halted c' = true → c' = d
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_fixpoint
|
[98, 1]
|
[108, 17]
|
simp
|
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d : Config R L
⊢ Config.is_halted d = true → d = d
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_fixpoint
|
[98, 1]
|
[108, 17]
|
intro hc'
|
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d c' d' : Config R L
h : c' [P]==> d'
h✝ : Relation.ReflTransGen (stepsTo P) d' d
ih : Config.is_halted d' = true → d' = d
⊢ Config.is_halted c' = true → c' = d
|
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d c' d' : Config R L
h : c' [P]==> d'
h✝ : Relation.ReflTransGen (stepsTo P) d' d
ih : Config.is_halted d' = true → d' = d
hc' : Config.is_halted c' = true
⊢ c' = d
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_fixpoint
|
[98, 1]
|
[108, 17]
|
simp [Config.is_halted] at hc' ih ⊢
|
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d c' d' : Config R L
h : c' [P]==> d'
h✝ : Relation.ReflTransGen (stepsTo P) d' d
ih : Config.is_halted d' = true → d' = d
hc' : Config.is_halted c' = true
⊢ c' = d
|
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d c' d' : Config R L
h : c' [P]==> d'
h✝ : Relation.ReflTransGen (stepsTo P) d' d
hc' : c'.ip = none
ih : d'.ip = none → d' = d
⊢ c' = d
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_fixpoint
|
[98, 1]
|
[108, 17]
|
simp [step, hc'] at h
|
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d c' d' : Config R L
h : c' [P]==> d'
h✝ : Relation.ReflTransGen (stepsTo P) d' d
hc' : c'.ip = none
ih : d'.ip = none → d' = d
⊢ c' = d
|
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d c' d' : Config R L
h✝ : Relation.ReflTransGen (stepsTo P) d' d
hc' : c'.ip = none
ih : d'.ip = none → d' = d
h : c' = d'
⊢ c' = d
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_fixpoint
|
[98, 1]
|
[108, 17]
|
cases h
|
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d c' d' : Config R L
h✝ : Relation.ReflTransGen (stepsTo P) d' d
hc' : c'.ip = none
ih : d'.ip = none → d' = d
h : c' = d'
⊢ c' = d
|
case refl
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d c' : Config R L
hc' : c'.ip = none
h✝ : Relation.ReflTransGen (stepsTo P) c' d
ih : c'.ip = none → c' = d
⊢ c' = d
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_fixpoint
|
[98, 1]
|
[108, 17]
|
apply ih hc'
|
case refl
R✝ L✝ : Type
Start✝ : ?m.45031
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.45045) true
R L : Type
x✝ : Sort ?u.45030
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.45045) true
c d c' : Config R L
hc' : c'.ip = none
h✝ : Relation.ReflTransGen (stepsTo P) c' d
ih : c'.ip = none → c' = d
⊢ c' = d
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
induction h1 using Relation.ReflTransGen.head_induction_on
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
c d1 d2 : Config R L
h1 : c [P]==>* d1
h2 : c [P]==>* d2
hd1 : Config.is_halted d1 = true
hd2 : Config.is_halted d2 = true
⊢ d1 = d2
|
case refl
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
c d1 d2 : Config R L
hd1 : Config.is_halted d1 = true
hd2 : Config.is_halted d2 = true
h2 : d1 [P]==>* d2
⊢ d1 = d2
case head
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
c d1 d2 : Config R L
hd1 : Config.is_halted d1 = true
hd2 : Config.is_halted d2 = true
a✝¹ c✝ : Config R L
h'✝ : a✝¹ [P]==> c✝
h✝ : Relation.ReflTransGen (stepsTo P) c✝ d1
a✝ : c✝ [P]==>* d2 → d1 = d2
h2 : a✝¹ [P]==>* d2
⊢ d1 = d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
case refl =>
apply halt_is_fixpoint _ h2 hd1
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
c d1 d2 : Config R L
hd1 : Config.is_halted d1 = true
hd2 : Config.is_halted d2 = true
h2 : d1 [P]==>* d2
⊢ d1 = d2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
case head c' d' h _h ih =>
apply ih
clear ih _h hd1 d1 c
cases Relation.ReflTransGen.cases_head h2 <;> clear h2
case inl h2 =>
cases h2
have : d2 = d' := by
apply halt_is_fixpoint
. exact Relation.ReflTransGen.single h
. exact hd2
cases this; apply Relation.ReflTransGen.refl
case inr h2 =>
rcases h2 with ⟨c,hc,h2⟩
have : c = d' := stepsTo_functional _ hc h
cases this
exact h2
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
c d1 d2 : Config R L
hd1 : Config.is_halted d1 = true
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
_h : Relation.ReflTransGen (stepsTo P) d' d1
ih : d' [P]==>* d2 → d1 = d2
h2 : c' [P]==>* d2
⊢ d1 = d2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
apply halt_is_fixpoint _ h2 hd1
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
c d1 d2 : Config R L
hd1 : Config.is_halted d1 = true
hd2 : Config.is_halted d2 = true
h2 : d1 [P]==>* d2
⊢ d1 = d2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
apply ih
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
c d1 d2 : Config R L
hd1 : Config.is_halted d1 = true
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
_h : Relation.ReflTransGen (stepsTo P) d' d1
ih : d' [P]==>* d2 → d1 = d2
h2 : c' [P]==>* d2
⊢ d1 = d2
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
c d1 d2 : Config R L
hd1 : Config.is_halted d1 = true
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
_h : Relation.ReflTransGen (stepsTo P) d' d1
ih : d' [P]==>* d2 → d1 = d2
h2 : c' [P]==>* d2
⊢ d' [P]==>* d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
clear ih _h hd1 d1 c
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
c d1 d2 : Config R L
hd1 : Config.is_halted d1 = true
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
_h : Relation.ReflTransGen (stepsTo P) d' d1
ih : d' [P]==>* d2 → d1 = d2
h2 : c' [P]==>* d2
⊢ d' [P]==>* d2
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
h2 : c' [P]==>* d2
⊢ d' [P]==>* d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
cases Relation.ReflTransGen.cases_head h2 <;> clear h2
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
h2 : c' [P]==>* d2
⊢ d' [P]==>* d2
|
case inl
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
h✝ : c' = d2
⊢ d' [P]==>* d2
case inr
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
h✝ : ∃ c, (c' [P]==> c) ∧ Relation.ReflTransGen (stepsTo P) c d2
⊢ d' [P]==>* d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
case inl h2 =>
cases h2
have : d2 = d' := by
apply halt_is_fixpoint
. exact Relation.ReflTransGen.single h
. exact hd2
cases this; apply Relation.ReflTransGen.refl
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
h2 : c' = d2
⊢ d' [P]==>* d2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
case inr h2 =>
rcases h2 with ⟨c,hc,h2⟩
have : c = d' := stepsTo_functional _ hc h
cases this
exact h2
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
h2 : ∃ c, (c' [P]==> c) ∧ Relation.ReflTransGen (stepsTo P) c d2
⊢ d' [P]==>* d2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
cases h2
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
h2 : c' = d2
⊢ d' [P]==>* d2
|
case refl
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ d' [P]==>* d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
have : d2 = d' := by
apply halt_is_fixpoint
. exact Relation.ReflTransGen.single h
. exact hd2
|
case refl
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ d' [P]==>* d2
|
case refl
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
this : d2 = d'
⊢ d' [P]==>* d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
cases this
|
case refl
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
this : d2 = d'
⊢ d' [P]==>* d2
|
case refl.refl
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
h : d2 [P]==> d2
⊢ d2 [P]==>* d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
apply Relation.ReflTransGen.refl
|
case refl.refl
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
h : d2 [P]==> d2
⊢ d2 [P]==>* d2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
apply halt_is_fixpoint
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ d2 = d'
|
case h
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ d2 [?P]==>* d'
case a
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ Config.is_halted d2 = true
case P
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ Prog R L
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
. exact Relation.ReflTransGen.single h
|
case h
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ d2 [?P]==>* d'
case a
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ Config.is_halted d2 = true
case P
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ Prog R L
|
case a
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ Config.is_halted d2 = true
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
. exact hd2
|
case a
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ Config.is_halted d2 = true
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
exact Relation.ReflTransGen.single h
|
case h
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ d2 [?P]==>* d'
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
exact hd2
|
case a
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
d' : Config R L
h : d2 [P]==> d'
⊢ Config.is_halted d2 = true
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
rcases h2 with ⟨c,hc,h2⟩
|
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
h2 : ∃ c, (c' [P]==> c) ∧ Relation.ReflTransGen (stepsTo P) c d2
⊢ d' [P]==>* d2
|
case intro.intro
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
c : Config R L
hc : c' [P]==> c
h2 : Relation.ReflTransGen (stepsTo P) c d2
⊢ d' [P]==>* d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
have : c = d' := stepsTo_functional _ hc h
|
case intro.intro
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
c : Config R L
hc : c' [P]==> c
h2 : Relation.ReflTransGen (stepsTo P) c d2
⊢ d' [P]==>* d2
|
case intro.intro
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
c : Config R L
hc : c' [P]==> c
h2 : Relation.ReflTransGen (stepsTo P) c d2
this : c = d'
⊢ d' [P]==>* d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
cases this
|
case intro.intro
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h : c' [P]==> d'
c : Config R L
hc : c' [P]==> c
h2 : Relation.ReflTransGen (stepsTo P) c d2
this : c = d'
⊢ d' [P]==>* d2
|
case intro.intro.refl
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h hc : c' [P]==> d'
h2 : Relation.ReflTransGen (stepsTo P) d' d2
⊢ d' [P]==>* d2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.halt_is_unique
|
[110, 1]
|
[131, 15]
|
exact h2
|
case intro.intro.refl
R✝ L✝ : Type
Start✝ : ?m.50738
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.50752) true
R L : Type
x✝ : Sort ?u.50737
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.50752) true
d2 : Config R L
hd2 : Config.is_halted d2 = true
c' d' : Config R L
h hc : c' [P]==> d'
h2 : Relation.ReflTransGen (stepsTo P) d' d2
⊢ d' [P]==>* d2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsToTrans_of_not_halts_stepsToTransRefl_halts
|
[133, 1]
|
[142, 46]
|
cases Relation.ReflTransGen.cases_head h
|
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
h : c [P]==>* d
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
⊢ c [P]==>+ d
|
case inl
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
h : c [P]==>* d
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
h✝ : c = d
⊢ c [P]==>+ d
case inr
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
h : c [P]==>* d
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
h✝ : ∃ c_1, (c [P]==> c_1) ∧ Relation.ReflTransGen (stepsTo P) c_1 d
⊢ c [P]==>+ d
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsToTrans_of_not_halts_stepsToTransRefl_halts
|
[133, 1]
|
[142, 46]
|
clear h
|
case inl
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
h : c [P]==>* d
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
h✝ : c = d
⊢ c [P]==>+ d
case inr
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
h : c [P]==>* d
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
h✝ : ∃ c_1, (c [P]==> c_1) ∧ Relation.ReflTransGen (stepsTo P) c_1 d
⊢ c [P]==>+ d
|
case inl
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
h✝ : c = d
⊢ c [P]==>+ d
case inr
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
h : c [P]==>* d
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
h✝ : ∃ c_1, (c [P]==> c_1) ∧ Relation.ReflTransGen (stepsTo P) c_1 d
⊢ c [P]==>+ d
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsToTrans_of_not_halts_stepsToTransRefl_halts
|
[133, 1]
|
[142, 46]
|
case inl heq =>
cases heq; contradiction
|
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
heq : c = d
⊢ c [P]==>+ d
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsToTrans_of_not_halts_stepsToTransRefl_halts
|
[133, 1]
|
[142, 46]
|
case inr h =>
rcases h with ⟨c',hc_c',hc'_d⟩
exact Relation.TransGen.head' hc_c' hc'_d
|
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
h✝ : c [P]==>* d
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
h : ∃ c_1, (c [P]==> c_1) ∧ Relation.ReflTransGen (stepsTo P) c_1 d
⊢ c [P]==>+ d
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsToTrans_of_not_halts_stepsToTransRefl_halts
|
[133, 1]
|
[142, 46]
|
cases heq
|
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
heq : c = d
⊢ c [P]==>+ d
|
case refl
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c : Config R L
hc : ¬Config.is_halted c = true
hd : Config.is_halted c = true
⊢ c [P]==>+ c
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsToTrans_of_not_halts_stepsToTransRefl_halts
|
[133, 1]
|
[142, 46]
|
contradiction
|
case refl
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c : Config R L
hc : ¬Config.is_halted c = true
hd : Config.is_halted c = true
⊢ c [P]==>+ c
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsToTrans_of_not_halts_stepsToTransRefl_halts
|
[133, 1]
|
[142, 46]
|
rcases h with ⟨c',hc_c',hc'_d⟩
|
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
h✝ : c [P]==>* d
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
h : ∃ c_1, (c [P]==> c_1) ∧ Relation.ReflTransGen (stepsTo P) c_1 d
⊢ c [P]==>+ d
|
case intro.intro
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
h : c [P]==>* d
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
c' : Config R L
hc_c' : c [P]==> c'
hc'_d : Relation.ReflTransGen (stepsTo P) c' d
⊢ c [P]==>+ d
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.stepsToTrans_of_not_halts_stepsToTransRefl_halts
|
[133, 1]
|
[142, 46]
|
exact Relation.TransGen.head' hc_c' hc'_d
|
case intro.intro
R✝ L✝ : Type
Start✝ : ?m.51733
P✝ : Prog R✝ L✝
inst✝¹ : DecidableEq R✝
S✝ : sorryAx (Sort ?u.51747) true
R L : Type
x✝ : Sort ?u.51732
Start : x✝
P : Prog R L
inst✝ : DecidableEq R
S : sorryAx (Sort ?u.51747) true
c d : Config R L
h : c [P]==>* d
hc : ¬Config.is_halted c = true
hd : Config.is_halted d = true
c' : Config R L
hc_c' : c [P]==> c'
hc'_d : Relation.ReflTransGen (stepsTo P) c' d
⊢ c [P]==>+ d
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
match h1, h2 with
| ⟨regs1,h1'⟩, ⟨regs2,h2'⟩ =>
clear h1 h2
generalize Config.init _ _ = c1 at h1' h2'
clear i
induction h1' using Relation.ReflTransGen.head_induction_on
<;> clear c1
case refl =>
have : o1 = (Config.haltedOn (L := L) o1 regs1).regs .io :=
by simp [Config.haltedOn]
rw [this]
have := halt_is_fixpoint _ h2' (by simp)
rw [this]
simp
case head c d h _ ih =>
apply ih; clear ih
cases Relation.ReflTransGen.cases_head h2' <;> clear h2'
case inl h2' =>
cases h2'
have : _ = d := by
apply halt_is_fixpoint _ (Relation.ReflTransGen.single h)
simp
rw [←this]
case inr h2' =>
rcases h2' with ⟨c',hc,h⟩
have : c' = d := stepsTo_functional _ hc ‹_›
rw [←this]
exact h
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
i o1 o2 : ℕ
h1 : evals S i o1
h2 : evals S i o2
⊢ o1 = o2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
clear h1 h2
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
i o1 o2 : ℕ
h1 : evals S i o1
h2 : evals S i o2
regs1 : R → ℕ
h1' : Config.init i (some S.start) [S.prog]==>* Config.haltedOn o1 regs1
regs2 : R → ℕ
h2' : Config.init i (some S.start) [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
i o1 o2 : ℕ
regs1 : R → ℕ
h1' : Config.init i (some S.start) [S.prog]==>* Config.haltedOn o1 regs1
regs2 : R → ℕ
h2' : Config.init i (some S.start) [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
generalize Config.init _ _ = c1 at h1' h2'
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
i o1 o2 : ℕ
regs1 : R → ℕ
h1' : Config.init i (some S.start) [S.prog]==>* Config.haltedOn o1 regs1
regs2 : R → ℕ
h2' : Config.init i (some S.start) [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
i o1 o2 : ℕ
regs1 regs2 : R → ℕ
c1 : Config (WithIO R) L
h1' : c1 [S.prog]==>* Config.haltedOn o1 regs1
h2' : c1 [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
clear i
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
i o1 o2 : ℕ
regs1 regs2 : R → ℕ
c1 : Config (WithIO R) L
h1' : c1 [S.prog]==>* Config.haltedOn o1 regs1
h2' : c1 [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c1 : Config (WithIO R) L
h1' : c1 [S.prog]==>* Config.haltedOn o1 regs1
h2' : c1 [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
induction h1' using Relation.ReflTransGen.head_induction_on
<;> clear c1
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c1 : Config (WithIO R) L
h1' : c1 [S.prog]==>* Config.haltedOn o1 regs1
h2' : c1 [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
case refl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
case head
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
a✝¹ c✝ : Config (WithIO R) L
h'✝ : a✝¹ [S.prog]==> c✝
h✝ : Relation.ReflTransGen (stepsTo S.prog) c✝ (Config.haltedOn o1 regs1)
a✝ : c✝ [S.prog]==>* Config.haltedOn o2 regs2 → o1 = o2
h2' : a✝¹ [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
case refl =>
have : o1 = (Config.haltedOn (L := L) o1 regs1).regs .io :=
by simp [Config.haltedOn]
rw [this]
have := halt_is_fixpoint _ h2' (by simp)
rw [this]
simp
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
case head c d h _ ih =>
apply ih; clear ih
cases Relation.ReflTransGen.cases_head h2' <;> clear h2'
case inl h2' =>
cases h2'
have : _ = d := by
apply halt_is_fixpoint _ (Relation.ReflTransGen.single h)
simp
rw [←this]
case inr h2' =>
rcases h2' with ⟨c',hc,h⟩
have : c' = d := stepsTo_functional _ hc ‹_›
rw [←this]
exact h
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
ih : d [S.prog]==>* Config.haltedOn o2 regs2 → o1 = o2
h2' : c [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
have : o1 = (Config.haltedOn (L := L) o1 regs1).regs .io :=
by simp [Config.haltedOn]
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
this : o1 = Config.regs (Config.haltedOn o1 regs1) WithIO.io
⊢ o1 = o2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
rw [this]
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
this : o1 = Config.regs (Config.haltedOn o1 regs1) WithIO.io
⊢ o1 = o2
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
this : o1 = Config.regs (Config.haltedOn o1 regs1) WithIO.io
⊢ Config.regs (Config.haltedOn o1 regs1) WithIO.io = o2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
have := halt_is_fixpoint _ h2' (by simp)
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
this : o1 = Config.regs (Config.haltedOn o1 regs1) WithIO.io
⊢ Config.regs (Config.haltedOn o1 regs1) WithIO.io = o2
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
this✝ : o1 = Config.regs (Config.haltedOn o1 regs1) WithIO.io
this : Config.haltedOn o1 regs1 = Config.haltedOn o2 regs2
⊢ Config.regs (Config.haltedOn o1 regs1) WithIO.io = o2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
rw [this]
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
this✝ : o1 = Config.regs (Config.haltedOn o1 regs1) WithIO.io
this : Config.haltedOn o1 regs1 = Config.haltedOn o2 regs2
⊢ Config.regs (Config.haltedOn o1 regs1) WithIO.io = o2
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
this✝ : o1 = Config.regs (Config.haltedOn o1 regs1) WithIO.io
this : Config.haltedOn o1 regs1 = Config.haltedOn o2 regs2
⊢ Config.regs (Config.haltedOn o2 regs2) WithIO.io = o2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
simp
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
this✝ : o1 = Config.regs (Config.haltedOn o1 regs1) WithIO.io
this : Config.haltedOn o1 regs1 = Config.haltedOn o2 regs2
⊢ Config.regs (Config.haltedOn o2 regs2) WithIO.io = o2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
simp [Config.haltedOn]
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = Config.regs (Config.haltedOn o1 regs1) WithIO.io
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
simp
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
h2' : Config.haltedOn o1 regs1 [S.prog]==>* Config.haltedOn o2 regs2
this : o1 = Config.regs (Config.haltedOn o1 regs1) WithIO.io
⊢ Config.is_halted (Config.haltedOn o1 regs1) = true
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
apply ih
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
ih : d [S.prog]==>* Config.haltedOn o2 regs2 → o1 = o2
h2' : c [S.prog]==>* Config.haltedOn o2 regs2
⊢ o1 = o2
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
ih : d [S.prog]==>* Config.haltedOn o2 regs2 → o1 = o2
h2' : c [S.prog]==>* Config.haltedOn o2 regs2
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
clear ih
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
ih : d [S.prog]==>* Config.haltedOn o2 regs2 → o1 = o2
h2' : c [S.prog]==>* Config.haltedOn o2 regs2
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h2' : c [S.prog]==>* Config.haltedOn o2 regs2
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
cases Relation.ReflTransGen.cases_head h2' <;> clear h2'
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h2' : c [S.prog]==>* Config.haltedOn o2 regs2
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
case inl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝¹ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h✝ : c = Config.haltedOn o2 regs2
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
case inr
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝¹ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h✝ : ∃ c_1, (c [S.prog]==> c_1) ∧ Relation.ReflTransGen (stepsTo S.prog) c_1 (Config.haltedOn o2 regs2)
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
case inl h2' =>
cases h2'
have : _ = d := by
apply halt_is_fixpoint _ (Relation.ReflTransGen.single h)
simp
rw [←this]
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h2' : c = Config.haltedOn o2 regs2
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
case inr h2' =>
rcases h2' with ⟨c',hc,h⟩
have : c' = d := stepsTo_functional _ hc ‹_›
rw [←this]
exact h
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h2' : ∃ c_1, (c [S.prog]==> c_1) ∧ Relation.ReflTransGen (stepsTo S.prog) c_1 (Config.haltedOn o2 regs2)
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
cases h2'
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h2' : c = Config.haltedOn o2 regs2
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
case refl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
d : Config (WithIO R) L
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h : Config.haltedOn o2 regs2 [S.prog]==> d
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
have : _ = d := by
apply halt_is_fixpoint _ (Relation.ReflTransGen.single h)
simp
|
case refl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
d : Config (WithIO R) L
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h : Config.haltedOn o2 regs2 [S.prog]==> d
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
case refl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
d : Config (WithIO R) L
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h : Config.haltedOn o2 regs2 [S.prog]==> d
this : Config.haltedOn o2 regs2 = d
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
rw [←this]
|
case refl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
d : Config (WithIO R) L
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h : Config.haltedOn o2 regs2 [S.prog]==> d
this : Config.haltedOn o2 regs2 = d
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
apply halt_is_fixpoint _ (Relation.ReflTransGen.single h)
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
d : Config (WithIO R) L
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h : Config.haltedOn o2 regs2 [S.prog]==> d
⊢ ?m.54568 = d
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
d : Config (WithIO R) L
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h : Config.haltedOn o2 regs2 [S.prog]==> d
⊢ Config.is_halted (Config.haltedOn o2 regs2) = true
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
simp
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
d : Config (WithIO R) L
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h : Config.haltedOn o2 regs2 [S.prog]==> d
⊢ Config.is_halted (Config.haltedOn o2 regs2) = true
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
rcases h2' with ⟨c',hc,h⟩
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
h2' : ∃ c_1, (c [S.prog]==> c_1) ∧ Relation.ReflTransGen (stepsTo S.prog) c_1 (Config.haltedOn o2 regs2)
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
case intro.intro
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h✝¹ : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
c' : Config (WithIO R) L
hc : c [S.prog]==> c'
h : Relation.ReflTransGen (stepsTo S.prog) c' (Config.haltedOn o2 regs2)
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
have : c' = d := stepsTo_functional _ hc ‹_›
|
case intro.intro
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h✝¹ : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
c' : Config (WithIO R) L
hc : c [S.prog]==> c'
h : Relation.ReflTransGen (stepsTo S.prog) c' (Config.haltedOn o2 regs2)
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
case intro.intro
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h✝¹ : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
c' : Config (WithIO R) L
hc : c [S.prog]==> c'
h : Relation.ReflTransGen (stepsTo S.prog) c' (Config.haltedOn o2 regs2)
this : c' = d
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
rw [←this]
|
case intro.intro
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h✝¹ : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
c' : Config (WithIO R) L
hc : c [S.prog]==> c'
h : Relation.ReflTransGen (stepsTo S.prog) c' (Config.haltedOn o2 regs2)
this : c' = d
⊢ d [S.prog]==>* Config.haltedOn o2 regs2
|
case intro.intro
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h✝¹ : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
c' : Config (WithIO R) L
hc : c [S.prog]==> c'
h : Relation.ReflTransGen (stepsTo S.prog) c' (Config.haltedOn o2 regs2)
this : c' = d
⊢ c' [S.prog]==>* Config.haltedOn o2 regs2
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.evals_functional
|
[157, 1]
|
[186, 14]
|
exact h
|
case intro.intro
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
o1 o2 : ℕ
regs1 regs2 : R → ℕ
c d : Config (WithIO R) L
h✝¹ : c [S.prog]==> d
h✝ : Relation.ReflTransGen (stepsTo S.prog) d (Config.haltedOn o1 regs1)
c' : Config (WithIO R) L
hc : c [S.prog]==> c'
h : Relation.ReflTransGen (stepsTo S.prog) c' (Config.haltedOn o2 regs2)
this : c' = d
⊢ c' [S.prog]==>* Config.haltedOn o2 regs2
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
suffices ∀ c hc,
eval.aux S.prog ⟨c,hc⟩ = m ↔
∃ regs, c [S.prog]==>* Config.haltedOn m regs
from this _ _
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
n : ℕ
hn : haltsOn S n
m : ℕ
⊢ eval S n hn = m ↔ evals S n m
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
n : ℕ
hn : haltsOn S n
m : ℕ
⊢ ∀ (c : Config (WithIO R) L) (hc : halts S.prog c),
eval.aux S.prog { config := c, halts := hc } = m ↔ ∃ regs, c [S.prog]==>* Config.haltedOn m regs
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
clear hn n
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
n : ℕ
hn : haltsOn S n
m : ℕ
⊢ ∀ (c : Config (WithIO R) L) (hc : halts S.prog c),
eval.aux S.prog { config := c, halts := hc } = m ↔ ∃ regs, c [S.prog]==>* Config.haltedOn m regs
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
⊢ ∀ (c : Config (WithIO R) L) (hc : halts S.prog c),
eval.aux S.prog { config := c, halts := hc } = m ↔ ∃ regs, c [S.prog]==>* Config.haltedOn m regs
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
intro c hc
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
⊢ ∀ (c : Config (WithIO R) L) (hc : halts S.prog c),
eval.aux S.prog { config := c, halts := hc } = m ↔ ∃ regs, c [S.prog]==>* Config.haltedOn m regs
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c : Config (WithIO R) L
hc : halts S.prog c
⊢ eval.aux S.prog { config := c, halts := hc } = m ↔ ∃ regs, c [S.prog]==>* Config.haltedOn m regs
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
rcases hc with ⟨d,h,hd⟩
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c : Config (WithIO R) L
hc : halts S.prog c
⊢ eval.aux S.prog { config := c, halts := hc } = m ↔ ∃ regs, c [S.prog]==>* Config.haltedOn m regs
|
case intro.intro
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
h : c [S.prog]==>* d
hd : Config.is_halted d = true
⊢ eval.aux S.prog { config := c, halts := (_ : ∃ d, (c [S.prog]==>* d) ∧ Config.is_halted d = true) } = m ↔
∃ regs, c [S.prog]==>* Config.haltedOn m regs
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
induction h using Relation.ReflTransGen.head_induction_on
|
case intro.intro
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
h : c [S.prog]==>* d
hd : Config.is_halted d = true
⊢ eval.aux S.prog { config := c, halts := (_ : ∃ d, (c [S.prog]==>* d) ∧ Config.is_halted d = true) } = m ↔
∃ regs, c [S.prog]==>* Config.haltedOn m regs
|
case intro.intro.refl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
⊢ eval.aux S.prog { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) } = m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
case intro.intro.head
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
a✝¹ c✝ : Config (WithIO R) L
h'✝ : a✝¹ [S.prog]==> c✝
h✝ : Relation.ReflTransGen (stepsTo S.prog) c✝ d
a✝ :
eval.aux S.prog { config := c✝, halts := (_ : ∃ d, (c✝ [S.prog]==>* d) ∧ Config.is_halted d = true) } = m ↔
∃ regs, c✝ [S.prog]==>* Config.haltedOn m regs
⊢ eval.aux S.prog { config := a✝¹, halts := (_ : ∃ d, (a✝¹ [S.prog]==>* d) ∧ Config.is_halted d = true) } = m ↔
∃ regs, a✝¹ [S.prog]==>* Config.haltedOn m regs
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
case refl =>
unfold eval.aux
split
case h_2 h =>
rw [hd] at h
contradiction
next h =>
clear h
simp
constructor <;> intro h
. use fun r => d.regs (.internal r)
have : d = Config.haltedOn m (fun r => d.regs (.internal r)) := by
rcases d with ⟨ip,regs⟩
simp at hd; cases hd
simp [Config.haltedOn]
funext r
cases r <;> simp at h ⊢
. exact h
rw [this] at *
cases this
exact .refl
. rcases h with ⟨regs,h⟩
have := halt_is_fixpoint _ h hd
clear h hd
cases this
simp
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
⊢ eval.aux S.prog { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) } = m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
unfold eval.aux
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
⊢ eval.aux S.prog { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) } = m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
⊢ (match hc :
Config.is_halted
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config with
| true =>
Config.regs { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config
WithIO.io
| false =>
let c' :=
{
config :=
step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config,
halts :=
(_ :
halts S.prog
(step S.prog
{ config := d,
halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config)) };
let_fun this :=
(_ :
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config.ip = none →
False);
eval.aux S.prog c') =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
split
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
⊢ (match hc :
Config.is_halted
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config with
| true =>
Config.regs { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config
WithIO.io
| false =>
let c' :=
{
config :=
step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config,
halts :=
(_ :
halts S.prog
(step S.prog
{ config := d,
halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config)) };
let_fun this :=
(_ :
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config.ip = none →
False);
eval.aux S.prog c') =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
case h_1
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
heq✝ :
Config.is_halted { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config =
true
⊢ Config.regs { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config
WithIO.io =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
case h_2
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
heq✝ :
Config.is_halted { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config =
false
⊢ (let c' :=
{
config :=
step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config,
halts :=
(_ :
halts S.prog
(step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config)) };
let_fun this :=
(_ :
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config.ip = none →
False);
eval.aux S.prog c') =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
case h_2 h =>
rw [hd] at h
contradiction
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h :
Config.is_halted { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config =
false
⊢ (let c' :=
{
config :=
step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config,
halts :=
(_ :
halts S.prog
(step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config)) };
let_fun this :=
(_ :
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config.ip = none →
False);
eval.aux S.prog c') =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
next h =>
clear h
simp
constructor <;> intro h
. use fun r => d.regs (.internal r)
have : d = Config.haltedOn m (fun r => d.regs (.internal r)) := by
rcases d with ⟨ip,regs⟩
simp at hd; cases hd
simp [Config.haltedOn]
funext r
cases r <;> simp at h ⊢
. exact h
rw [this] at *
cases this
exact .refl
. rcases h with ⟨regs,h⟩
have := halt_is_fixpoint _ h hd
clear h hd
cases this
simp
|
case h_1
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
heq✝ :
Config.is_halted { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config =
true
⊢ Config.regs { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config
WithIO.io =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
rw [hd] at h
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h :
Config.is_halted { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config =
false
⊢ (let c' :=
{
config :=
step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config,
halts :=
(_ :
halts S.prog
(step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config)) };
let_fun this :=
(_ :
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config.ip = none →
False);
eval.aux S.prog c') =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h✝ :
Config.is_halted { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config =
false
h : true = false
⊢ (let c' :=
{
config :=
step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config,
halts :=
(_ :
halts S.prog
(step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config)) };
let_fun this :=
(_ :
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config.ip = none →
False);
eval.aux S.prog c') =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
contradiction
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h✝ :
Config.is_halted { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config =
false
h : true = false
⊢ (let c' :=
{
config :=
step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config,
halts :=
(_ :
halts S.prog
(step S.prog
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config)) };
let_fun this :=
(_ :
{ config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config.ip = none →
False);
eval.aux S.prog c') =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
clear h
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h :
Config.is_halted { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config =
true
⊢ Config.regs { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config
WithIO.io =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
⊢ Config.regs { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config
WithIO.io =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
simp
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
⊢ Config.regs { config := d, halts := (_ : ∃ d_1, (d [S.prog]==>* d_1) ∧ Config.is_halted d_1 = true) }.config
WithIO.io =
m ↔
∃ regs, d [S.prog]==>* Config.haltedOn m regs
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
⊢ Config.regs d WithIO.io = m ↔ ∃ regs, Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m regs)
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
constructor <;> intro h
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
⊢ Config.regs d WithIO.io = m ↔ ∃ regs, Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m regs)
|
case mp
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
⊢ ∃ regs, Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m regs)
case mpr
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : ∃ regs, Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m regs)
⊢ Config.regs d WithIO.io = m
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
. use fun r => d.regs (.internal r)
have : d = Config.haltedOn m (fun r => d.regs (.internal r)) := by
rcases d with ⟨ip,regs⟩
simp at hd; cases hd
simp [Config.haltedOn]
funext r
cases r <;> simp at h ⊢
. exact h
rw [this] at *
cases this
exact .refl
|
case mp
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
⊢ ∃ regs, Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m regs)
case mpr
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : ∃ regs, Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m regs)
⊢ Config.regs d WithIO.io = m
|
case mpr
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : ∃ regs, Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m regs)
⊢ Config.regs d WithIO.io = m
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
. rcases h with ⟨regs,h⟩
have := halt_is_fixpoint _ h hd
clear h hd
cases this
simp
|
case mpr
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : ∃ regs, Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m regs)
⊢ Config.regs d WithIO.io = m
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
use fun r => d.regs (.internal r)
|
case mp
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
⊢ ∃ regs, Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m regs)
|
case mp
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
⊢ Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m fun r => Config.regs d (WithIO.internal r))
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
have : d = Config.haltedOn m (fun r => d.regs (.internal r)) := by
rcases d with ⟨ip,regs⟩
simp at hd; cases hd
simp [Config.haltedOn]
funext r
cases r <;> simp at h ⊢
. exact h
|
case mp
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
⊢ Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m fun r => Config.regs d (WithIO.internal r))
|
case mp
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
this : d = Config.haltedOn m fun r => Config.regs d (WithIO.internal r)
⊢ Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m fun r => Config.regs d (WithIO.internal r))
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
rw [this] at *
|
case mp
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
this : d = Config.haltedOn m fun r => Config.regs d (WithIO.internal r)
⊢ Relation.ReflTransGen (fun c d => step S.prog c = d) d (Config.haltedOn m fun r => Config.regs d (WithIO.internal r))
|
case mp
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
this :
(Config.haltedOn m fun r => Config.regs d (WithIO.internal r)) =
Config.haltedOn m fun r =>
Config.regs (Config.haltedOn m fun r => Config.regs d (WithIO.internal r)) (WithIO.internal r)
⊢ Relation.ReflTransGen (fun c d => step S.prog c = d) (Config.haltedOn m fun r => Config.regs d (WithIO.internal r))
(Config.haltedOn m fun r =>
Config.regs (Config.haltedOn m fun r => Config.regs d (WithIO.internal r)) (WithIO.internal r))
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
cases this
|
case mp
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
this :
(Config.haltedOn m fun r => Config.regs d (WithIO.internal r)) =
Config.haltedOn m fun r =>
Config.regs (Config.haltedOn m fun r => Config.regs d (WithIO.internal r)) (WithIO.internal r)
⊢ Relation.ReflTransGen (fun c d => step S.prog c = d) (Config.haltedOn m fun r => Config.regs d (WithIO.internal r))
(Config.haltedOn m fun r =>
Config.regs (Config.haltedOn m fun r => Config.regs d (WithIO.internal r)) (WithIO.internal r))
|
case mp.refl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
⊢ Relation.ReflTransGen (fun c d => step S.prog c = d) (Config.haltedOn m fun r => Config.regs d (WithIO.internal r))
(Config.haltedOn m fun r =>
Config.regs (Config.haltedOn m fun r => Config.regs d (WithIO.internal r)) (WithIO.internal r))
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
exact .refl
|
case mp.refl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
⊢ Relation.ReflTransGen (fun c d => step S.prog c = d) (Config.haltedOn m fun r => Config.regs d (WithIO.internal r))
(Config.haltedOn m fun r =>
Config.regs (Config.haltedOn m fun r => Config.regs d (WithIO.internal r)) (WithIO.internal r))
|
no goals
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
rcases d with ⟨ip,regs⟩
|
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c d : Config (WithIO R) L
hd : Config.is_halted d = true
h : Config.regs d WithIO.io = m
⊢ d = Config.haltedOn m fun r => Config.regs d (WithIO.internal r)
|
case mk
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c : Config (WithIO R) L
ip : Option L
regs : WithIO R → ℕ
hd : Config.is_halted { ip := ip, regs := regs } = true
h : Config.regs { ip := ip, regs := regs } WithIO.io = m
⊢ { ip := ip, regs := regs } = Config.haltedOn m fun r => Config.regs { ip := ip, regs := regs } (WithIO.internal r)
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
simp at hd
|
case mk
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c : Config (WithIO R) L
ip : Option L
regs : WithIO R → ℕ
hd : Config.is_halted { ip := ip, regs := regs } = true
h : Config.regs { ip := ip, regs := regs } WithIO.io = m
⊢ { ip := ip, regs := regs } = Config.haltedOn m fun r => Config.regs { ip := ip, regs := regs } (WithIO.internal r)
|
case mk
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c : Config (WithIO R) L
ip : Option L
regs : WithIO R → ℕ
h : Config.regs { ip := ip, regs := regs } WithIO.io = m
hd : ip = none
⊢ { ip := ip, regs := regs } = Config.haltedOn m fun r => Config.regs { ip := ip, regs := regs } (WithIO.internal r)
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
cases hd
|
case mk
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c : Config (WithIO R) L
ip : Option L
regs : WithIO R → ℕ
h : Config.regs { ip := ip, regs := regs } WithIO.io = m
hd : ip = none
⊢ { ip := ip, regs := regs } = Config.haltedOn m fun r => Config.regs { ip := ip, regs := regs } (WithIO.internal r)
|
case mk.refl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c : Config (WithIO R) L
regs : WithIO R → ℕ
h : Config.regs { ip := none, regs := regs } WithIO.io = m
⊢ { ip := none, regs := regs } = Config.haltedOn m fun r => Config.regs { ip := none, regs := regs } (WithIO.internal r)
|
https://github.com/JamesGallicchio/lean_rms.git
|
b2eba106861c05584458e01a241153abd30d0b5b
|
RegMachine/Basic.lean
|
RegMachine.Prog.Start.eval_eq
|
[239, 1]
|
[308, 15]
|
simp [Config.haltedOn]
|
case mk.refl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c : Config (WithIO R) L
regs : WithIO R → ℕ
h : Config.regs { ip := none, regs := regs } WithIO.io = m
⊢ { ip := none, regs := regs } = Config.haltedOn m fun r => Config.regs { ip := none, regs := regs } (WithIO.internal r)
|
case mk.refl
R L : Type
P : Prog R L
inst✝ : DecidableEq R
S : Start (WithIO R) L
m : ℕ
c : Config (WithIO R) L
regs : WithIO R → ℕ
h : Config.regs { ip := none, regs := regs } WithIO.io = m
⊢ regs = fun x =>
match x with
| WithIO.io => m
| WithIO.internal r => regs (WithIO.internal r)
|
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