IR_x86
stringlengths 592
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| IR_arm
stringlengths 558
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| filename
stringlengths 17
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; ModuleID = 'AnghaBench/fastsocket/kernel/sound/soc/codecs/extr_tlv320aic3x.c_aic3x_suspend.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/soc/codecs/extr_tlv320aic3x.c_aic3x_suspend.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SND_SOC_BIAS_OFF = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @aic3x_suspend], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @aic3x_suspend(ptr noundef %0, i32 %1) #0 {
%3 = tail call ptr @platform_get_drvdata(ptr noundef %0) #2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = load i32, ptr @SND_SOC_BIAS_OFF, align 4, !tbaa !12
%7 = tail call i32 @aic3x_set_bias_level(ptr noundef %5, i32 noundef %6) #2
ret i32 0
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @aic3x_set_bias_level(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_soc_device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/soc/codecs/extr_tlv320aic3x.c_aic3x_suspend.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/soc/codecs/extr_tlv320aic3x.c_aic3x_suspend.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SND_SOC_BIAS_OFF = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @aic3x_suspend], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @aic3x_suspend(ptr noundef %0, i32 %1) #0 {
%3 = tail call ptr @platform_get_drvdata(ptr noundef %0) #2
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = load i32, ptr @SND_SOC_BIAS_OFF, align 4, !tbaa !13
%7 = tail call i32 @aic3x_set_bias_level(ptr noundef %5, i32 noundef %6) #2
ret i32 0
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @aic3x_set_bias_level(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_soc_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
|
fastsocket_kernel_sound_soc_codecs_extr_tlv320aic3x.c_aic3x_suspend
|
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/handwired/prime_exl/keymaps/default/extr_keymap.c_led_set_user.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/handwired/prime_exl/keymaps/default/extr_keymap.c_led_set_user.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@USB_LED_NUM_LOCK = dso_local local_unnamed_addr global i32 0, align 4
@B6 = dso_local local_unnamed_addr global i32 0, align 4
@USB_LED_CAPS_LOCK = dso_local local_unnamed_addr global i32 0, align 4
@B5 = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @led_set_user(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @USB_LED_NUM_LOCK, align 4, !tbaa !5
%3 = tail call i64 @IS_LED_ON(i32 noundef %0, i32 noundef %2) #2
%4 = icmp eq i64 %3, 0
%5 = load i32, ptr @B6, align 4, !tbaa !5
br i1 %4, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @writePinHigh(i32 noundef %5) #2
br label %10
8: ; preds = %1
%9 = tail call i32 @writePinLow(i32 noundef %5) #2
br label %10
10: ; preds = %8, %6
%11 = load i32, ptr @USB_LED_CAPS_LOCK, align 4, !tbaa !5
%12 = tail call i64 @IS_LED_ON(i32 noundef %0, i32 noundef %11) #2
%13 = icmp eq i64 %12, 0
%14 = load i32, ptr @B5, align 4, !tbaa !5
br i1 %13, label %17, label %15
15: ; preds = %10
%16 = tail call i32 @writePinHigh(i32 noundef %14) #2
br label %19
17: ; preds = %10
%18 = tail call i32 @writePinLow(i32 noundef %14) #2
br label %19
19: ; preds = %17, %15
ret void
}
declare i64 @IS_LED_ON(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @writePinHigh(i32 noundef) local_unnamed_addr #1
declare i32 @writePinLow(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/handwired/prime_exl/keymaps/default/extr_keymap.c_led_set_user.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/handwired/prime_exl/keymaps/default/extr_keymap.c_led_set_user.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@USB_LED_NUM_LOCK = common local_unnamed_addr global i32 0, align 4
@B6 = common local_unnamed_addr global i32 0, align 4
@USB_LED_CAPS_LOCK = common local_unnamed_addr global i32 0, align 4
@B5 = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @led_set_user(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @USB_LED_NUM_LOCK, align 4, !tbaa !6
%3 = tail call i64 @IS_LED_ON(i32 noundef %0, i32 noundef %2) #2
%4 = icmp eq i64 %3, 0
%5 = load i32, ptr @B6, align 4, !tbaa !6
br i1 %4, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @writePinHigh(i32 noundef %5) #2
br label %10
8: ; preds = %1
%9 = tail call i32 @writePinLow(i32 noundef %5) #2
br label %10
10: ; preds = %8, %6
%11 = load i32, ptr @USB_LED_CAPS_LOCK, align 4, !tbaa !6
%12 = tail call i64 @IS_LED_ON(i32 noundef %0, i32 noundef %11) #2
%13 = icmp eq i64 %12, 0
%14 = load i32, ptr @B5, align 4, !tbaa !6
br i1 %13, label %17, label %15
15: ; preds = %10
%16 = tail call i32 @writePinHigh(i32 noundef %14) #2
br label %19
17: ; preds = %10
%18 = tail call i32 @writePinLow(i32 noundef %14) #2
br label %19
19: ; preds = %17, %15
ret void
}
declare i64 @IS_LED_ON(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @writePinHigh(i32 noundef) local_unnamed_addr #1
declare i32 @writePinLow(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
qmk_firmware_keyboards_handwired_prime_exl_keymaps_default_extr_keymap.c_led_set_user
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/hwmon/extr_vt1211.c_vt1211_read8.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/hwmon/extr_vt1211.c_vt1211_read8.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @vt1211_read8], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i64 @vt1211_read8(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = add nsw i64 %3, %1
%5 = tail call i64 @inb(i64 noundef %4) #2
ret i64 %5
}
declare i64 @inb(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vt1211_data", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/hwmon/extr_vt1211.c_vt1211_read8.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/hwmon/extr_vt1211.c_vt1211_read8.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @vt1211_read8], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i64 @vt1211_read8(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = add nsw i64 %3, %1
%5 = tail call i64 @inb(i64 noundef %4) #2
ret i64 %5
}
declare i64 @inb(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vt1211_data", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_drivers_hwmon_extr_vt1211.c_vt1211_read8
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/extr_loop.c_do_bio_filebacked.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/extr_loop.c_do_bio_filebacked.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bio = type { i32, i32, i64 }
%struct.loop_device = type { i32, i32, i64, ptr }
%struct.file = type { %struct.TYPE_6__, ptr }
%struct.TYPE_6__ = type { i32 }
@WRITE = dso_local local_unnamed_addr global i64 0, align 8
@BIO_RW_BARRIER = dso_local local_unnamed_addr global i32 0, align 4
@EOPNOTSUPP = dso_local local_unnamed_addr global i32 0, align 4
@BIO_FLUSH = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@BIO_DISCARD = dso_local local_unnamed_addr global i32 0, align 4
@FALLOC_FL_PUNCH_HOLE = dso_local local_unnamed_addr global i32 0, align 4
@FALLOC_FL_KEEP_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@BIO_FUA = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @do_bio_filebacked], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @do_bio_filebacked(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.bio, ptr %1, i64 0, i32 2
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = trunc i64 %4 to i32
%6 = shl i32 %5, 9
%7 = load i32, ptr %0, align 8, !tbaa !11
%8 = add nsw i32 %6, %7
%9 = tail call i64 @bio_rw(ptr noundef %1) #2
%10 = load i64, ptr @WRITE, align 8, !tbaa !14
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %108
12: ; preds = %2
%13 = getelementptr inbounds %struct.loop_device, ptr %0, i64 0, i32 3
%14 = load ptr, ptr %13, align 8, !tbaa !15
%15 = load i32, ptr @BIO_RW_BARRIER, align 4, !tbaa !16
%16 = tail call i64 @bio_rw_flagged(ptr noundef nonnull %1, i32 noundef %15) #2
%17 = icmp eq i64 %16, 0
br i1 %17, label %21, label %18
18: ; preds = %12
%19 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !16
%20 = sub nsw i32 0, %19
br label %112
21: ; preds = %12
%22 = load i32, ptr %1, align 8, !tbaa !17
%23 = load i32, ptr @BIO_FLUSH, align 4, !tbaa !16
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %42, label %26
26: ; preds = %21
%27 = load i32, ptr %14, align 8, !tbaa !18
%28 = tail call i32 @vfs_fsync(ptr noundef nonnull %14, i32 noundef %27, i32 noundef 0) #2
%29 = icmp ne i32 %28, 0
%30 = load i32, ptr @EINVAL, align 4
%31 = sub nsw i32 0, %30
%32 = icmp ne i32 %28, %31
%33 = select i1 %29, i1 %32, i1 false
%34 = zext i1 %33 to i32
%35 = tail call i64 @unlikely(i32 noundef %34) #2
%36 = icmp eq i64 %35, 0
br i1 %36, label %37, label %39
37: ; preds = %26
%38 = load i32, ptr %1, align 8, !tbaa !17
br label %42
39: ; preds = %26
%40 = load i32, ptr @EIO, align 4, !tbaa !16
%41 = sub nsw i32 0, %40
br label %112
42: ; preds = %37, %21
%43 = phi i32 [ %38, %37 ], [ %22, %21 ]
%44 = load i32, ptr @BIO_DISCARD, align 4, !tbaa !16
%45 = and i32 %44, %43
%46 = icmp eq i32 %45, 0
br i1 %46, label %86, label %47
47: ; preds = %42
%48 = load ptr, ptr %13, align 8, !tbaa !15
%49 = getelementptr inbounds %struct.file, ptr %48, i64 0, i32 1
%50 = load ptr, ptr %49, align 8, !tbaa !21
%51 = load ptr, ptr %50, align 8, !tbaa !22
%52 = load i32, ptr @FALLOC_FL_PUNCH_HOLE, align 4, !tbaa !16
%53 = load i32, ptr @FALLOC_FL_KEEP_SIZE, align 4, !tbaa !16
%54 = or i32 %53, %52
%55 = load ptr, ptr %51, align 8, !tbaa !24
%56 = load ptr, ptr %55, align 8, !tbaa !26
%57 = icmp eq ptr %56, null
br i1 %57, label %62, label %58
58: ; preds = %47
%59 = getelementptr inbounds %struct.loop_device, ptr %0, i64 0, i32 2
%60 = load i64, ptr %59, align 8, !tbaa !28
%61 = icmp eq i64 %60, 0
br i1 %61, label %65, label %62
62: ; preds = %58, %47
%63 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !16
%64 = sub nsw i32 0, %63
br label %112
65: ; preds = %58
%66 = getelementptr inbounds %struct.bio, ptr %1, i64 0, i32 1
%67 = load i32, ptr %66, align 4, !tbaa !29
%68 = tail call i32 %56(ptr noundef nonnull %51, i32 noundef %54, i32 noundef %8, i32 noundef %67) #2
%69 = icmp eq i32 %68, 0
br i1 %69, label %79, label %70
70: ; preds = %65
%71 = load i32, ptr @EINVAL, align 4, !tbaa !16
%72 = sub nsw i32 0, %71
%73 = icmp eq i32 %68, %72
br i1 %73, label %79, label %74
74: ; preds = %70
%75 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !16
%76 = sub nsw i32 0, %75
%77 = icmp ne i32 %68, %76
%78 = zext i1 %77 to i32
br label %79
79: ; preds = %74, %70, %65
%80 = phi i32 [ 0, %70 ], [ 0, %65 ], [ %78, %74 ]
%81 = tail call i64 @unlikely(i32 noundef %80) #2
%82 = icmp eq i64 %81, 0
%83 = load i32, ptr @EIO, align 4
%84 = sub nsw i32 0, %83
%85 = select i1 %82, i32 %68, i32 %84
br label %112
86: ; preds = %42
%87 = tail call i32 @lo_send(ptr noundef nonnull %0, ptr noundef nonnull %1, i32 noundef %8) #2
%88 = load i32, ptr %1, align 8, !tbaa !17
%89 = load i32, ptr @BIO_FUA, align 4, !tbaa !16
%90 = and i32 %89, %88
%91 = icmp eq i32 %90, 0
%92 = icmp ne i32 %87, 0
%93 = select i1 %91, i1 true, i1 %92
br i1 %93, label %112, label %94
94: ; preds = %86
%95 = load i32, ptr %14, align 8, !tbaa !18
%96 = tail call i32 @vfs_fsync(ptr noundef nonnull %14, i32 noundef %95, i32 noundef 0) #2
%97 = icmp ne i32 %96, 0
%98 = load i32, ptr @EINVAL, align 4
%99 = sub nsw i32 0, %98
%100 = icmp ne i32 %96, %99
%101 = select i1 %97, i1 %100, i1 false
%102 = zext i1 %101 to i32
%103 = tail call i64 @unlikely(i32 noundef %102) #2
%104 = icmp eq i64 %103, 0
br i1 %104, label %112, label %105
105: ; preds = %94
%106 = load i32, ptr @EIO, align 4, !tbaa !16
%107 = sub nsw i32 0, %106
br label %112
108: ; preds = %2
%109 = getelementptr inbounds %struct.loop_device, ptr %0, i64 0, i32 1
%110 = load i32, ptr %109, align 4, !tbaa !30
%111 = tail call i32 @lo_receive(ptr noundef nonnull %0, ptr noundef nonnull %1, i32 noundef %110, i32 noundef %8) #2
br label %112
112: ; preds = %108, %86, %105, %94, %62, %79, %39, %18
%113 = phi i32 [ %111, %108 ], [ %20, %18 ], [ %41, %39 ], [ %64, %62 ], [ %85, %79 ], [ %87, %86 ], [ %107, %105 ], [ %96, %94 ]
ret i32 %113
}
declare i64 @bio_rw(ptr noundef) local_unnamed_addr #1
declare i64 @bio_rw_flagged(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vfs_fsync(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @lo_send(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lo_receive(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"bio", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"loop_device", !7, i64 0, !7, i64 4, !10, i64 8, !13, i64 16}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!10, !10, i64 0}
!15 = !{!12, !13, i64 16}
!16 = !{!7, !7, i64 0}
!17 = !{!6, !7, i64 0}
!18 = !{!19, !7, i64 0}
!19 = !{!"file", !20, i64 0, !13, i64 8}
!20 = !{!"TYPE_6__", !7, i64 0}
!21 = !{!19, !13, i64 8}
!22 = !{!23, !13, i64 0}
!23 = !{!"TYPE_4__", !13, i64 0}
!24 = !{!25, !13, i64 0}
!25 = !{!"inode", !13, i64 0}
!26 = !{!27, !13, i64 0}
!27 = !{!"TYPE_5__", !13, i64 0}
!28 = !{!12, !10, i64 8}
!29 = !{!6, !7, i64 4}
!30 = !{!12, !7, i64 4}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/extr_loop.c_do_bio_filebacked.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/extr_loop.c_do_bio_filebacked.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@WRITE = common local_unnamed_addr global i64 0, align 8
@BIO_RW_BARRIER = common local_unnamed_addr global i32 0, align 4
@EOPNOTSUPP = common local_unnamed_addr global i32 0, align 4
@BIO_FLUSH = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@EIO = common local_unnamed_addr global i32 0, align 4
@BIO_DISCARD = common local_unnamed_addr global i32 0, align 4
@FALLOC_FL_PUNCH_HOLE = common local_unnamed_addr global i32 0, align 4
@FALLOC_FL_KEEP_SIZE = common local_unnamed_addr global i32 0, align 4
@BIO_FUA = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @do_bio_filebacked], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @do_bio_filebacked(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = trunc i64 %4 to i32
%6 = shl i32 %5, 9
%7 = load i32, ptr %0, align 8, !tbaa !12
%8 = add nsw i32 %6, %7
%9 = tail call i64 @bio_rw(ptr noundef %1) #2
%10 = load i64, ptr @WRITE, align 8, !tbaa !15
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %108
12: ; preds = %2
%13 = getelementptr inbounds i8, ptr %0, i64 16
%14 = load ptr, ptr %13, align 8, !tbaa !16
%15 = load i32, ptr @BIO_RW_BARRIER, align 4, !tbaa !17
%16 = tail call i64 @bio_rw_flagged(ptr noundef nonnull %1, i32 noundef %15) #2
%17 = icmp eq i64 %16, 0
br i1 %17, label %21, label %18
18: ; preds = %12
%19 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !17
%20 = sub nsw i32 0, %19
br label %112
21: ; preds = %12
%22 = load i32, ptr %1, align 8, !tbaa !18
%23 = load i32, ptr @BIO_FLUSH, align 4, !tbaa !17
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %42, label %26
26: ; preds = %21
%27 = load i32, ptr %14, align 8, !tbaa !19
%28 = tail call i32 @vfs_fsync(ptr noundef nonnull %14, i32 noundef %27, i32 noundef 0) #2
%29 = icmp ne i32 %28, 0
%30 = load i32, ptr @EINVAL, align 4
%31 = sub nsw i32 0, %30
%32 = icmp ne i32 %28, %31
%33 = select i1 %29, i1 %32, i1 false
%34 = zext i1 %33 to i32
%35 = tail call i64 @unlikely(i32 noundef %34) #2
%36 = icmp eq i64 %35, 0
br i1 %36, label %37, label %39
37: ; preds = %26
%38 = load i32, ptr %1, align 8, !tbaa !18
br label %42
39: ; preds = %26
%40 = load i32, ptr @EIO, align 4, !tbaa !17
%41 = sub nsw i32 0, %40
br label %112
42: ; preds = %37, %21
%43 = phi i32 [ %38, %37 ], [ %22, %21 ]
%44 = load i32, ptr @BIO_DISCARD, align 4, !tbaa !17
%45 = and i32 %44, %43
%46 = icmp eq i32 %45, 0
br i1 %46, label %86, label %47
47: ; preds = %42
%48 = load ptr, ptr %13, align 8, !tbaa !16
%49 = getelementptr inbounds i8, ptr %48, i64 8
%50 = load ptr, ptr %49, align 8, !tbaa !22
%51 = load ptr, ptr %50, align 8, !tbaa !23
%52 = load i32, ptr @FALLOC_FL_PUNCH_HOLE, align 4, !tbaa !17
%53 = load i32, ptr @FALLOC_FL_KEEP_SIZE, align 4, !tbaa !17
%54 = or i32 %53, %52
%55 = load ptr, ptr %51, align 8, !tbaa !25
%56 = load ptr, ptr %55, align 8, !tbaa !27
%57 = icmp eq ptr %56, null
br i1 %57, label %62, label %58
58: ; preds = %47
%59 = getelementptr inbounds i8, ptr %0, i64 8
%60 = load i64, ptr %59, align 8, !tbaa !29
%61 = icmp eq i64 %60, 0
br i1 %61, label %65, label %62
62: ; preds = %58, %47
%63 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !17
%64 = sub nsw i32 0, %63
br label %112
65: ; preds = %58
%66 = getelementptr inbounds i8, ptr %1, i64 4
%67 = load i32, ptr %66, align 4, !tbaa !30
%68 = tail call i32 %56(ptr noundef nonnull %51, i32 noundef %54, i32 noundef %8, i32 noundef %67) #2
%69 = icmp eq i32 %68, 0
br i1 %69, label %79, label %70
70: ; preds = %65
%71 = load i32, ptr @EINVAL, align 4, !tbaa !17
%72 = sub nsw i32 0, %71
%73 = icmp eq i32 %68, %72
br i1 %73, label %79, label %74
74: ; preds = %70
%75 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !17
%76 = sub nsw i32 0, %75
%77 = icmp ne i32 %68, %76
%78 = zext i1 %77 to i32
br label %79
79: ; preds = %74, %70, %65
%80 = phi i32 [ 0, %70 ], [ 0, %65 ], [ %78, %74 ]
%81 = tail call i64 @unlikely(i32 noundef %80) #2
%82 = icmp eq i64 %81, 0
%83 = load i32, ptr @EIO, align 4
%84 = sub nsw i32 0, %83
%85 = select i1 %82, i32 %68, i32 %84
br label %112
86: ; preds = %42
%87 = tail call i32 @lo_send(ptr noundef nonnull %0, ptr noundef nonnull %1, i32 noundef %8) #2
%88 = load i32, ptr %1, align 8, !tbaa !18
%89 = load i32, ptr @BIO_FUA, align 4, !tbaa !17
%90 = and i32 %89, %88
%91 = icmp eq i32 %90, 0
%92 = icmp ne i32 %87, 0
%93 = select i1 %91, i1 true, i1 %92
br i1 %93, label %112, label %94
94: ; preds = %86
%95 = load i32, ptr %14, align 8, !tbaa !19
%96 = tail call i32 @vfs_fsync(ptr noundef nonnull %14, i32 noundef %95, i32 noundef 0) #2
%97 = icmp ne i32 %96, 0
%98 = load i32, ptr @EINVAL, align 4
%99 = sub nsw i32 0, %98
%100 = icmp ne i32 %96, %99
%101 = select i1 %97, i1 %100, i1 false
%102 = zext i1 %101 to i32
%103 = tail call i64 @unlikely(i32 noundef %102) #2
%104 = icmp eq i64 %103, 0
br i1 %104, label %112, label %105
105: ; preds = %94
%106 = load i32, ptr @EIO, align 4, !tbaa !17
%107 = sub nsw i32 0, %106
br label %112
108: ; preds = %2
%109 = getelementptr inbounds i8, ptr %0, i64 4
%110 = load i32, ptr %109, align 4, !tbaa !31
%111 = tail call i32 @lo_receive(ptr noundef nonnull %0, ptr noundef nonnull %1, i32 noundef %110, i32 noundef %8) #2
br label %112
112: ; preds = %108, %86, %105, %94, %62, %79, %39, %18
%113 = phi i32 [ %111, %108 ], [ %20, %18 ], [ %41, %39 ], [ %64, %62 ], [ %85, %79 ], [ %87, %86 ], [ %107, %105 ], [ %96, %94 ]
ret i32 %113
}
declare i64 @bio_rw(ptr noundef) local_unnamed_addr #1
declare i64 @bio_rw_flagged(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vfs_fsync(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @lo_send(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lo_receive(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"bio", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"loop_device", !8, i64 0, !8, i64 4, !11, i64 8, !14, i64 16}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!11, !11, i64 0}
!16 = !{!13, !14, i64 16}
!17 = !{!8, !8, i64 0}
!18 = !{!7, !8, i64 0}
!19 = !{!20, !8, i64 0}
!20 = !{!"file", !21, i64 0, !14, i64 8}
!21 = !{!"TYPE_6__", !8, i64 0}
!22 = !{!20, !14, i64 8}
!23 = !{!24, !14, i64 0}
!24 = !{!"TYPE_4__", !14, i64 0}
!25 = !{!26, !14, i64 0}
!26 = !{!"inode", !14, i64 0}
!27 = !{!28, !14, i64 0}
!28 = !{!"TYPE_5__", !14, i64 0}
!29 = !{!13, !11, i64 8}
!30 = !{!7, !8, i64 4}
!31 = !{!13, !8, i64 4}
|
fastsocket_kernel_drivers_block_extr_loop.c_do_bio_filebacked
|
; ModuleID = 'AnghaBench/linux/crypto/extr_skcipher.c_skcipher_free_instance_simple.c'
source_filename = "AnghaBench/linux/crypto/extr_skcipher.c_skcipher_free_instance_simple.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @skcipher_free_instance_simple], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @skcipher_free_instance_simple(ptr noundef %0) #0 {
%2 = tail call i32 @skcipher_instance_ctx(ptr noundef %0) #2
%3 = tail call i32 @crypto_drop_spawn(i32 noundef %2) #2
%4 = tail call i32 @kfree(ptr noundef %0) #2
ret void
}
declare i32 @crypto_drop_spawn(i32 noundef) local_unnamed_addr #1
declare i32 @skcipher_instance_ctx(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/crypto/extr_skcipher.c_skcipher_free_instance_simple.c'
source_filename = "AnghaBench/linux/crypto/extr_skcipher.c_skcipher_free_instance_simple.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @skcipher_free_instance_simple], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @skcipher_free_instance_simple(ptr noundef %0) #0 {
%2 = tail call i32 @skcipher_instance_ctx(ptr noundef %0) #2
%3 = tail call i32 @crypto_drop_spawn(i32 noundef %2) #2
%4 = tail call i32 @kfree(ptr noundef %0) #2
ret void
}
declare i32 @crypto_drop_spawn(i32 noundef) local_unnamed_addr #1
declare i32 @skcipher_instance_ctx(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_crypto_extr_skcipher.c_skcipher_free_instance_simple
|
; ModuleID = 'AnghaBench/RetroArch/deps/lua/src/extr_luac.c_usage.c'
source_filename = "AnghaBench/RetroArch/deps/lua/src/extr_luac.c_usage.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@stderr = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"%s: unrecognized option '%s'\0A\00", align 1
@progname = dso_local local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [8 x i8] c"%s: %s\0A\00", align 1
@.str.2 = private unnamed_addr constant [329 x i8] c"usage: %s [options] [filenames]\0AAvailable options are:\0A -l list (use -l -l for full listing)\0A -o name output to file 'name' (default is \22%s\22)\0A -p parse only\0A -s strip debug information\0A -v show version information\0A -- stop handling options\0A - stop handling options and process stdin\0A\00", align 1
@Output = dso_local local_unnamed_addr global ptr null, align 8
@EXIT_FAILURE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @usage], section "llvm.metadata"
; Function Attrs: noreturn nounwind uwtable
define internal void @usage(ptr noundef %0) #0 {
%2 = load i8, ptr %0, align 1, !tbaa !5
%3 = icmp eq i8 %2, 45
%4 = load i32, ptr @stderr, align 4, !tbaa !8
%5 = load ptr, ptr @progname, align 8, !tbaa !10
%6 = select i1 %3, ptr @.str, ptr @.str.1
%7 = tail call i32 @fprintf(i32 noundef %4, ptr noundef nonnull %6, ptr noundef %5, ptr noundef nonnull %0) #3
%8 = load i32, ptr @stderr, align 4, !tbaa !8
%9 = load ptr, ptr @progname, align 8, !tbaa !10
%10 = load ptr, ptr @Output, align 8, !tbaa !10
%11 = tail call i32 @fprintf(i32 noundef %8, ptr noundef nonnull @.str.2, ptr noundef %9, ptr noundef %10) #3
%12 = load i32, ptr @EXIT_FAILURE, align 4, !tbaa !8
%13 = tail call i32 @exit(i32 noundef %12) #4
unreachable
}
declare i32 @fprintf(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !6, i64 0}
|
; ModuleID = 'AnghaBench/RetroArch/deps/lua/src/extr_luac.c_usage.c'
source_filename = "AnghaBench/RetroArch/deps/lua/src/extr_luac.c_usage.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@stderr = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"%s: unrecognized option '%s'\0A\00", align 1
@progname = common local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [8 x i8] c"%s: %s\0A\00", align 1
@.str.2 = private unnamed_addr constant [329 x i8] c"usage: %s [options] [filenames]\0AAvailable options are:\0A -l list (use -l -l for full listing)\0A -o name output to file 'name' (default is \22%s\22)\0A -p parse only\0A -s strip debug information\0A -v show version information\0A -- stop handling options\0A - stop handling options and process stdin\0A\00", align 1
@Output = common local_unnamed_addr global ptr null, align 8
@EXIT_FAILURE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @usage], section "llvm.metadata"
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define internal void @usage(ptr noundef %0) #0 {
%2 = load i8, ptr %0, align 1, !tbaa !6
%3 = icmp eq i8 %2, 45
%4 = load i32, ptr @stderr, align 4, !tbaa !9
%5 = load ptr, ptr @progname, align 8, !tbaa !11
%6 = select i1 %3, ptr @.str, ptr @.str.1
%7 = tail call i32 @fprintf(i32 noundef %4, ptr noundef nonnull %6, ptr noundef %5, ptr noundef nonnull %0) #3
%8 = load i32, ptr @stderr, align 4, !tbaa !9
%9 = load ptr, ptr @progname, align 8, !tbaa !11
%10 = load ptr, ptr @Output, align 8, !tbaa !11
%11 = tail call i32 @fprintf(i32 noundef %8, ptr noundef nonnull @.str.2, ptr noundef %9, ptr noundef %10) #3
%12 = load i32, ptr @EXIT_FAILURE, align 4, !tbaa !9
%13 = tail call i32 @exit(i32 noundef %12) #4
unreachable
}
declare i32 @fprintf(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
|
RetroArch_deps_lua_src_extr_luac.c_usage
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/ipw/extr_if_ipw.c_ipw_write_table1.c'
source_filename = "AnghaBench/freebsd/sys/dev/ipw/extr_if_ipw.c_ipw_write_table1.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ipw_write_table1], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ipw_write_table1(ptr noundef %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = load i64, ptr %0, align 8, !tbaa !5
%5 = add nsw i64 %4, %1
%6 = tail call i32 @MEM_READ_4(ptr noundef nonnull %0, i64 noundef %5) #2
%7 = tail call i32 @MEM_WRITE_4(ptr noundef nonnull %0, i32 noundef %6, i64 noundef %2) #2
ret void
}
declare i32 @MEM_WRITE_4(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @MEM_READ_4(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ipw_softc", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/ipw/extr_if_ipw.c_ipw_write_table1.c'
source_filename = "AnghaBench/freebsd/sys/dev/ipw/extr_if_ipw.c_ipw_write_table1.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ipw_write_table1], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ipw_write_table1(ptr noundef %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = load i64, ptr %0, align 8, !tbaa !6
%5 = add nsw i64 %4, %1
%6 = tail call i32 @MEM_READ_4(ptr noundef nonnull %0, i64 noundef %5) #2
%7 = tail call i32 @MEM_WRITE_4(ptr noundef nonnull %0, i32 noundef %6, i64 noundef %2) #2
ret void
}
declare i32 @MEM_WRITE_4(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @MEM_READ_4(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ipw_softc", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
freebsd_sys_dev_ipw_extr_if_ipw.c_ipw_write_table1
|
; ModuleID = 'AnghaBench/linux/drivers/video/fbdev/riva/extr_fbdev.c_convert_bgcolor_16.c'
source_filename = "AnghaBench/linux/drivers/video/fbdev/riva/extr_fbdev.c_convert_bgcolor_16.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @convert_bgcolor_16], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @convert_bgcolor_16(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = shl i32 %2, 8
%4 = and i32 %3, 16252928
%5 = shl i32 %2, 5
%6 = and i32 %5, 64512
%7 = shl i32 %2, 3
%8 = and i32 %7, 248
%9 = or disjoint i32 %6, %4
%10 = or disjoint i32 %9, %8
%11 = or disjoint i32 %10, -16777216
store i32 %11, ptr %0, align 4, !tbaa !5
%12 = tail call i32 (...) @mb() #2
ret void
}
declare i32 @mb(...) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/video/fbdev/riva/extr_fbdev.c_convert_bgcolor_16.c'
source_filename = "AnghaBench/linux/drivers/video/fbdev/riva/extr_fbdev.c_convert_bgcolor_16.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @convert_bgcolor_16], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @convert_bgcolor_16(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = shl i32 %2, 8
%4 = and i32 %3, 16252928
%5 = shl i32 %2, 5
%6 = and i32 %5, 64512
%7 = shl i32 %2, 3
%8 = and i32 %7, 248
%9 = or disjoint i32 %6, %4
%10 = or disjoint i32 %9, %8
%11 = or disjoint i32 %10, -16777216
store i32 %11, ptr %0, align 4, !tbaa !6
%12 = tail call i32 @mb() #2
ret void
}
declare i32 @mb(...) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_video_fbdev_riva_extr_fbdev.c_convert_bgcolor_16
|
; ModuleID = 'AnghaBench/freebsd/sys/amd64/vmm/intel/extr_vmx.c_vmx_cpl.c'
source_filename = "AnghaBench/freebsd/sys/amd64/vmm/intel/extr_vmx.c_vmx_cpl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@VMCS_GUEST_SS_ACCESS_RIGHTS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @vmx_cpl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @vmx_cpl() #0 {
%1 = load i32, ptr @VMCS_GUEST_SS_ACCESS_RIGHTS, align 4, !tbaa !5
%2 = tail call i32 @vmcs_read(i32 noundef %1) #2
%3 = lshr i32 %2, 5
%4 = and i32 %3, 3
ret i32 %4
}
declare i32 @vmcs_read(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/sys/amd64/vmm/intel/extr_vmx.c_vmx_cpl.c'
source_filename = "AnghaBench/freebsd/sys/amd64/vmm/intel/extr_vmx.c_vmx_cpl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VMCS_GUEST_SS_ACCESS_RIGHTS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vmx_cpl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 4) i32 @vmx_cpl() #0 {
%1 = load i32, ptr @VMCS_GUEST_SS_ACCESS_RIGHTS, align 4, !tbaa !6
%2 = tail call i32 @vmcs_read(i32 noundef %1) #2
%3 = lshr i32 %2, 5
%4 = and i32 %3, 3
ret i32 %4
}
declare i32 @vmcs_read(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_sys_amd64_vmm_intel_extr_vmx.c_vmx_cpl
|
; ModuleID = 'AnghaBench/mpv/video/out/extr_vo.c_vo_get_estimated_vsync_interval.c'
source_filename = "AnghaBench/mpv/video/out/extr_vo.c_vo_get_estimated_vsync_interval.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vo_internal = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local double @vo_get_estimated_vsync_interval(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = getelementptr inbounds %struct.vo_internal, ptr %2, i64 0, i32 1
%4 = tail call i32 @pthread_mutex_lock(ptr noundef nonnull %3) #2
%5 = load i32, ptr %2, align 4, !tbaa !10
%6 = sitofp i32 %5 to double
%7 = fdiv double %6, 1.000000e+06
%8 = tail call i32 @pthread_mutex_unlock(ptr noundef nonnull %3) #2
ret double %7
}
declare i32 @pthread_mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @pthread_mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vo", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"vo_internal", !12, i64 0, !12, i64 4}
!12 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/mpv/video/out/extr_vo.c_vo_get_estimated_vsync_interval.c'
source_filename = "AnghaBench/mpv/video/out/extr_vo.c_vo_get_estimated_vsync_interval.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define double @vo_get_estimated_vsync_interval(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = getelementptr inbounds i8, ptr %2, i64 4
%4 = tail call i32 @pthread_mutex_lock(ptr noundef nonnull %3) #2
%5 = load i32, ptr %2, align 4, !tbaa !11
%6 = sitofp i32 %5 to double
%7 = fdiv double %6, 1.000000e+06
%8 = tail call i32 @pthread_mutex_unlock(ptr noundef nonnull %3) #2
ret double %7
}
declare i32 @pthread_mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @pthread_mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vo", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"vo_internal", !13, i64 0, !13, i64 4}
!13 = !{!"int", !9, i64 0}
|
mpv_video_out_extr_vo.c_vo_get_estimated_vsync_interval
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_combo_phy.c_cnl_set_procmon_ref_values.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_combo_phy.c_cnl_set_procmon_ref_values.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cnl_procmon = type { i32, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @cnl_set_procmon_ref_values], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @cnl_set_procmon_ref_values(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @cnl_get_procmon_ref_values(ptr noundef %0, i32 noundef %1) #2
%4 = tail call i32 @ICL_PORT_COMP_DW1(i32 noundef %1) #2
%5 = tail call i32 @I915_READ(i32 noundef %4) #2
%6 = and i32 %5, -16711936
%7 = load i32, ptr %3, align 4, !tbaa !5
%8 = or i32 %6, %7
%9 = tail call i32 @ICL_PORT_COMP_DW1(i32 noundef %1) #2
%10 = tail call i32 @I915_WRITE(i32 noundef %9, i32 noundef %8) #2
%11 = tail call i32 @ICL_PORT_COMP_DW9(i32 noundef %1) #2
%12 = getelementptr inbounds %struct.cnl_procmon, ptr %3, i64 0, i32 1
%13 = load i32, ptr %12, align 4, !tbaa !10
%14 = tail call i32 @I915_WRITE(i32 noundef %11, i32 noundef %13) #2
%15 = tail call i32 @ICL_PORT_COMP_DW10(i32 noundef %1) #2
%16 = getelementptr inbounds %struct.cnl_procmon, ptr %3, i64 0, i32 2
%17 = load i32, ptr %16, align 4, !tbaa !11
%18 = tail call i32 @I915_WRITE(i32 noundef %15, i32 noundef %17) #2
ret void
}
declare ptr @cnl_get_procmon_ref_values(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @I915_READ(i32 noundef) local_unnamed_addr #1
declare i32 @ICL_PORT_COMP_DW1(i32 noundef) local_unnamed_addr #1
declare i32 @I915_WRITE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ICL_PORT_COMP_DW9(i32 noundef) local_unnamed_addr #1
declare i32 @ICL_PORT_COMP_DW10(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cnl_procmon", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!6, !7, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_combo_phy.c_cnl_set_procmon_ref_values.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_combo_phy.c_cnl_set_procmon_ref_values.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cnl_set_procmon_ref_values], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @cnl_set_procmon_ref_values(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @cnl_get_procmon_ref_values(ptr noundef %0, i32 noundef %1) #2
%4 = tail call i32 @ICL_PORT_COMP_DW1(i32 noundef %1) #2
%5 = tail call i32 @I915_READ(i32 noundef %4) #2
%6 = and i32 %5, -16711936
%7 = load i32, ptr %3, align 4, !tbaa !6
%8 = or i32 %6, %7
%9 = tail call i32 @ICL_PORT_COMP_DW1(i32 noundef %1) #2
%10 = tail call i32 @I915_WRITE(i32 noundef %9, i32 noundef %8) #2
%11 = tail call i32 @ICL_PORT_COMP_DW9(i32 noundef %1) #2
%12 = getelementptr inbounds i8, ptr %3, i64 4
%13 = load i32, ptr %12, align 4, !tbaa !11
%14 = tail call i32 @I915_WRITE(i32 noundef %11, i32 noundef %13) #2
%15 = tail call i32 @ICL_PORT_COMP_DW10(i32 noundef %1) #2
%16 = getelementptr inbounds i8, ptr %3, i64 8
%17 = load i32, ptr %16, align 4, !tbaa !12
%18 = tail call i32 @I915_WRITE(i32 noundef %15, i32 noundef %17) #2
ret void
}
declare ptr @cnl_get_procmon_ref_values(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @I915_READ(i32 noundef) local_unnamed_addr #1
declare i32 @ICL_PORT_COMP_DW1(i32 noundef) local_unnamed_addr #1
declare i32 @I915_WRITE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ICL_PORT_COMP_DW9(i32 noundef) local_unnamed_addr #1
declare i32 @ICL_PORT_COMP_DW10(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cnl_procmon", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!7, !8, i64 8}
|
linux_drivers_gpu_drm_i915_display_extr_intel_combo_phy.c_cnl_set_procmon_ref_values
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/cp/extr_cpddk.c_l521.c'
source_filename = "AnghaBench/freebsd/sys/dev/cp/extr_cpddk.c_l521.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @l521], section "llvm.metadata"
; Function Attrs: nofree norecurse nounwind uwtable
define internal zeroext i16 @l521(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = add nsw i64 %2, 1024
%4 = inttoptr i64 %3 to ptr
store volatile i16 255, ptr %4, align 2, !tbaa !10
%5 = add nsw i64 %2, 1028
%6 = inttoptr i64 %5 to ptr
br label %7
7: ; preds = %1, %24
%8 = phi i32 [ 255, %1 ], [ %25, %24 ]
%9 = trunc i32 %8 to i16
%10 = or i16 %9, 32
store volatile i16 %10, ptr %6, align 2, !tbaa !10
store volatile i16 255, ptr %4, align 2, !tbaa !10
%11 = load volatile i16, ptr %6, align 2, !tbaa !10
%12 = lshr i16 %11, 8
%13 = and i32 %8, 65503
%14 = shl nuw i32 %8, 1
%15 = and i32 %14, 32
%16 = or disjoint i32 %15, %13
%17 = zext nneg i16 %12 to i32
%18 = xor i32 %16, %17
%19 = icmp eq i32 %18, 32
br i1 %19, label %24, label %20
20: ; preds = %7
store volatile i16 255, ptr %6, align 2, !tbaa !10
%21 = shl nuw nsw i32 %17, 8
%22 = or i32 %21, %8
%23 = trunc i32 %22 to i16
br label %28
24: ; preds = %7
%25 = add nsw i32 %8, -1
%26 = icmp eq i32 %8, 0
br i1 %26, label %27, label %7
27: ; preds = %24
store volatile i16 255, ptr %6, align 2, !tbaa !10
br label %28
28: ; preds = %27, %20
%29 = phi i16 [ %23, %20 ], [ 0, %27 ]
ret i16 %29
}
attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !8, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/cp/extr_cpddk.c_l521.c'
source_filename = "AnghaBench/freebsd/sys/dev/cp/extr_cpddk.c_l521.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @l521], section "llvm.metadata"
; Function Attrs: nofree norecurse nounwind ssp uwtable(sync)
define internal zeroext i16 @l521(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = add nsw i64 %2, 1024
%4 = inttoptr i64 %3 to ptr
store volatile i16 255, ptr %4, align 2, !tbaa !11
%5 = add nsw i64 %2, 1028
%6 = inttoptr i64 %5 to ptr
br label %7
7: ; preds = %1, %24
%8 = phi i32 [ 255, %1 ], [ %25, %24 ]
%9 = trunc i32 %8 to i16
%10 = or i16 %9, 32
store volatile i16 %10, ptr %6, align 2, !tbaa !11
store volatile i16 255, ptr %4, align 2, !tbaa !11
%11 = load volatile i16, ptr %6, align 2, !tbaa !11
%12 = lshr i16 %11, 8
%13 = and i32 %8, 65503
%14 = shl nuw i32 %8, 1
%15 = and i32 %14, 32
%16 = or disjoint i32 %15, %13
%17 = zext nneg i16 %12 to i32
%18 = xor i32 %16, %17
%19 = icmp eq i32 %18, 32
br i1 %19, label %24, label %20
20: ; preds = %7
store volatile i16 255, ptr %6, align 2, !tbaa !11
%21 = shl nuw nsw i32 %17, 8
%22 = or i32 %21, %8
%23 = trunc i32 %22 to i16
br label %28
24: ; preds = %7
%25 = add nsw i32 %8, -1
%26 = icmp eq i32 %8, 0
br i1 %26, label %27, label %7
27: ; preds = %24
store volatile i16 255, ptr %6, align 2, !tbaa !11
br label %28
28: ; preds = %27, %20
%29 = phi i16 [ %23, %20 ], [ 0, %27 ]
ret i16 %29
}
attributes #0 = { nofree norecurse nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !9, i64 0}
|
freebsd_sys_dev_cp_extr_cpddk.c_l521
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-bfin.c_rtc_bfin_to_time.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-bfin.c_rtc_bfin_to_time.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SEC_BITS_OFF = dso_local local_unnamed_addr global i32 0, align 4
@MIN_BITS_OFF = dso_local local_unnamed_addr global i32 0, align 4
@HOUR_BITS_OFF = dso_local local_unnamed_addr global i32 0, align 4
@DAY_BITS_OFF = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @rtc_bfin_to_time], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i64 @rtc_bfin_to_time(i32 noundef %0) #0 {
%2 = load i32, ptr @SEC_BITS_OFF, align 4, !tbaa !5
%3 = ashr i32 %0, %2
%4 = and i32 %3, 63
%5 = load i32, ptr @MIN_BITS_OFF, align 4, !tbaa !5
%6 = ashr i32 %0, %5
%7 = and i32 %6, 63
%8 = mul nuw nsw i32 %7, 60
%9 = add nuw nsw i32 %8, %4
%10 = load i32, ptr @HOUR_BITS_OFF, align 4, !tbaa !5
%11 = ashr i32 %0, %10
%12 = and i32 %11, 31
%13 = mul nuw nsw i32 %12, 3600
%14 = add nuw nsw i32 %9, %13
%15 = load i32, ptr @DAY_BITS_OFF, align 4, !tbaa !5
%16 = ashr i32 %0, %15
%17 = and i32 %16, 32767
%18 = mul nuw i32 %17, 86400
%19 = add nuw nsw i32 %14, %18
%20 = sext i32 %19 to i64
ret i64 %20
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-bfin.c_rtc_bfin_to_time.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-bfin.c_rtc_bfin_to_time.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SEC_BITS_OFF = common local_unnamed_addr global i32 0, align 4
@MIN_BITS_OFF = common local_unnamed_addr global i32 0, align 4
@HOUR_BITS_OFF = common local_unnamed_addr global i32 0, align 4
@DAY_BITS_OFF = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @rtc_bfin_to_time], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal range(i64 0, 2147483648) i64 @rtc_bfin_to_time(i32 noundef %0) #0 {
%2 = load i32, ptr @SEC_BITS_OFF, align 4, !tbaa !6
%3 = ashr i32 %0, %2
%4 = and i32 %3, 63
%5 = load i32, ptr @MIN_BITS_OFF, align 4, !tbaa !6
%6 = ashr i32 %0, %5
%7 = and i32 %6, 63
%8 = mul nuw nsw i32 %7, 60
%9 = add nuw nsw i32 %8, %4
%10 = load i32, ptr @HOUR_BITS_OFF, align 4, !tbaa !6
%11 = ashr i32 %0, %10
%12 = and i32 %11, 31
%13 = mul nuw nsw i32 %12, 3600
%14 = add nuw nsw i32 %9, %13
%15 = load i32, ptr @DAY_BITS_OFF, align 4, !tbaa !6
%16 = ashr i32 %0, %15
%17 = and i32 %16, 32767
%18 = mul nuw i32 %17, 86400
%19 = add nuw nsw i32 %14, %18
%20 = zext nneg i32 %19 to i64
ret i64 %20
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_drivers_rtc_extr_rtc-bfin.c_rtc_bfin_to_time
|
; ModuleID = 'AnghaBench/linux/drivers/media/dvb-frontends/extr_mb86a16.c_mb86a16_init.c'
source_filename = "AnghaBench/linux/drivers/media/dvb-frontends/extr_mb86a16.c_mb86a16_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mb86a16_init], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @mb86a16_init(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/media/dvb-frontends/extr_mb86a16.c_mb86a16_init.c'
source_filename = "AnghaBench/linux/drivers/media/dvb-frontends/extr_mb86a16.c_mb86a16_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mb86a16_init], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @mb86a16_init(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_media_dvb-frontends_extr_mb86a16.c_mb86a16_init
|
; ModuleID = 'AnghaBench/vlc/modules/audio_output/extr_wasapi.c_vlc_SpdifToWave.c'
source_filename = "AnghaBench/vlc/modules/audio_output/extr_wasapi.c_vlc_SpdifToWave.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { i32, i32, i32, i32 }
%struct.TYPE_10__ = type { i32, %struct.TYPE_8__, %struct.TYPE_7__, i32 }
%struct.TYPE_8__ = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_7__ = type { i32 }
@_KSDATAFORMAT_SUBTYPE_WAVEFORMATEX = dso_local local_unnamed_addr global i32 0, align 4
@_KSDATAFORMAT_SUBTYPE_IEC61937_DTS = dso_local local_unnamed_addr global i32 0, align 4
@_KSDATAFORMAT_SUBTYPE_IEC61937_DOLBY_DIGITAL = dso_local local_unnamed_addr global i32 0, align 4
@WAVE_FORMAT_EXTENSIBLE = dso_local local_unnamed_addr global i32 0, align 4
@SPEAKER_FRONT_LEFT = dso_local local_unnamed_addr global i32 0, align 4
@SPEAKER_FRONT_RIGHT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @vlc_SpdifToWave], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vlc_SpdifToWave(ptr noalias nocapture noundef writeonly %0, ptr noalias nocapture noundef %1) #0 {
%3 = load i32, ptr %1, align 4, !tbaa !5
switch i32 %3, label %16 [
i32 130, label %4
i32 128, label %13
i32 129, label %13
i32 131, label %13
]
4: ; preds = %2
%5 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 1
%6 = load i32, ptr %5, align 4, !tbaa !10
%7 = icmp slt i32 %6, 48000
%8 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 3
br i1 %7, label %9, label %11
9: ; preds = %4
%10 = load i32, ptr @_KSDATAFORMAT_SUBTYPE_WAVEFORMATEX, align 4, !tbaa !11
store i32 %10, ptr %8, align 4, !tbaa !12
br label %18
11: ; preds = %4
%12 = load i32, ptr @_KSDATAFORMAT_SUBTYPE_IEC61937_DTS, align 4, !tbaa !11
store i32 %12, ptr %8, align 4, !tbaa !12
br label %18
13: ; preds = %2, %2, %2
%14 = load i32, ptr @_KSDATAFORMAT_SUBTYPE_IEC61937_DOLBY_DIGITAL, align 4, !tbaa !11
%15 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 3
store i32 %14, ptr %15, align 4, !tbaa !12
br label %18
16: ; preds = %2
%17 = tail call i32 (...) @vlc_assert_unreachable() #2
br label %18
18: ; preds = %9, %11, %16, %13
%19 = load i32, ptr @WAVE_FORMAT_EXTENSIBLE, align 4, !tbaa !11
%20 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1
%21 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1, i32 6
store i32 %19, ptr %21, align 4, !tbaa !16
store i32 2, ptr %20, align 4, !tbaa !17
%22 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 1
%23 = load i32, ptr %22, align 4, !tbaa !10
%24 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1, i32 1
store i32 %23, ptr %24, align 4, !tbaa !18
%25 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1, i32 2
store i32 16, ptr %25, align 4, !tbaa !19
%26 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1, i32 3
store i32 4, ptr %26, align 4, !tbaa !20
%27 = shl nsw i32 %23, 2
%28 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1, i32 4
store i32 %27, ptr %28, align 4, !tbaa !21
%29 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1, i32 5
store i32 12, ptr %29, align 4, !tbaa !22
%30 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 2
store i32 16, ptr %30, align 4, !tbaa !23
%31 = load i32, ptr @SPEAKER_FRONT_LEFT, align 4, !tbaa !11
%32 = load i32, ptr @SPEAKER_FRONT_RIGHT, align 4, !tbaa !11
%33 = or i32 %32, %31
store i32 %33, ptr %0, align 4, !tbaa !24
store i32 128, ptr %1, align 4, !tbaa !5
%34 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 2
store i32 4, ptr %34, align 4, !tbaa !25
%35 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 3
store i32 1, ptr %35, align 4, !tbaa !26
ret void
}
declare i32 @vlc_assert_unreachable(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_9__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !7, i64 36}
!13 = !{!"TYPE_10__", !7, i64 0, !14, i64 4, !15, i64 32, !7, i64 36}
!14 = !{!"TYPE_8__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24}
!15 = !{!"TYPE_7__", !7, i64 0}
!16 = !{!13, !7, i64 28}
!17 = !{!13, !7, i64 4}
!18 = !{!13, !7, i64 8}
!19 = !{!13, !7, i64 12}
!20 = !{!13, !7, i64 16}
!21 = !{!13, !7, i64 20}
!22 = !{!13, !7, i64 24}
!23 = !{!13, !7, i64 32}
!24 = !{!13, !7, i64 0}
!25 = !{!6, !7, i64 8}
!26 = !{!6, !7, i64 12}
|
; ModuleID = 'AnghaBench/vlc/modules/audio_output/extr_wasapi.c_vlc_SpdifToWave.c'
source_filename = "AnghaBench/vlc/modules/audio_output/extr_wasapi.c_vlc_SpdifToWave.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@_KSDATAFORMAT_SUBTYPE_WAVEFORMATEX = common local_unnamed_addr global i32 0, align 4
@_KSDATAFORMAT_SUBTYPE_IEC61937_DTS = common local_unnamed_addr global i32 0, align 4
@_KSDATAFORMAT_SUBTYPE_IEC61937_DOLBY_DIGITAL = common local_unnamed_addr global i32 0, align 4
@WAVE_FORMAT_EXTENSIBLE = common local_unnamed_addr global i32 0, align 4
@SPEAKER_FRONT_LEFT = common local_unnamed_addr global i32 0, align 4
@SPEAKER_FRONT_RIGHT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vlc_SpdifToWave], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vlc_SpdifToWave(ptr noalias nocapture noundef writeonly %0, ptr noalias nocapture noundef %1) #0 {
%3 = load i32, ptr %1, align 4, !tbaa !6
switch i32 %3, label %16 [
i32 130, label %4
i32 128, label %13
i32 129, label %13
i32 131, label %13
]
4: ; preds = %2
%5 = getelementptr inbounds i8, ptr %1, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = icmp slt i32 %6, 48000
%8 = getelementptr inbounds i8, ptr %0, i64 36
br i1 %7, label %9, label %11
9: ; preds = %4
%10 = load i32, ptr @_KSDATAFORMAT_SUBTYPE_WAVEFORMATEX, align 4, !tbaa !12
store i32 %10, ptr %8, align 4, !tbaa !13
br label %18
11: ; preds = %4
%12 = load i32, ptr @_KSDATAFORMAT_SUBTYPE_IEC61937_DTS, align 4, !tbaa !12
store i32 %12, ptr %8, align 4, !tbaa !13
br label %18
13: ; preds = %2, %2, %2
%14 = load i32, ptr @_KSDATAFORMAT_SUBTYPE_IEC61937_DOLBY_DIGITAL, align 4, !tbaa !12
%15 = getelementptr inbounds i8, ptr %0, i64 36
store i32 %14, ptr %15, align 4, !tbaa !13
br label %18
16: ; preds = %2
%17 = tail call i32 @vlc_assert_unreachable() #2
br label %18
18: ; preds = %9, %11, %16, %13
%19 = load i32, ptr @WAVE_FORMAT_EXTENSIBLE, align 4, !tbaa !12
%20 = getelementptr inbounds i8, ptr %0, i64 4
%21 = getelementptr inbounds i8, ptr %0, i64 28
store i32 %19, ptr %21, align 4, !tbaa !17
store i32 2, ptr %20, align 4, !tbaa !18
%22 = getelementptr inbounds i8, ptr %1, i64 4
%23 = load i32, ptr %22, align 4, !tbaa !11
%24 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %23, ptr %24, align 4, !tbaa !19
%25 = getelementptr inbounds i8, ptr %0, i64 12
store <2 x i32> <i32 16, i32 4>, ptr %25, align 4, !tbaa !12
%26 = shl nsw i32 %23, 2
%27 = getelementptr inbounds i8, ptr %0, i64 20
store i32 %26, ptr %27, align 4, !tbaa !20
%28 = getelementptr inbounds i8, ptr %0, i64 24
store i32 12, ptr %28, align 4, !tbaa !21
%29 = getelementptr inbounds i8, ptr %0, i64 32
store i32 16, ptr %29, align 4, !tbaa !22
%30 = load i32, ptr @SPEAKER_FRONT_LEFT, align 4, !tbaa !12
%31 = load i32, ptr @SPEAKER_FRONT_RIGHT, align 4, !tbaa !12
%32 = or i32 %31, %30
store i32 %32, ptr %0, align 4, !tbaa !23
store i32 128, ptr %1, align 4, !tbaa !6
%33 = getelementptr inbounds i8, ptr %1, i64 8
store <2 x i32> <i32 4, i32 1>, ptr %33, align 4, !tbaa !12
ret void
}
declare i32 @vlc_assert_unreachable(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_9__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !8, i64 36}
!14 = !{!"TYPE_10__", !8, i64 0, !15, i64 4, !16, i64 32, !8, i64 36}
!15 = !{!"TYPE_8__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24}
!16 = !{!"TYPE_7__", !8, i64 0}
!17 = !{!14, !8, i64 28}
!18 = !{!14, !8, i64 4}
!19 = !{!14, !8, i64 8}
!20 = !{!14, !8, i64 20}
!21 = !{!14, !8, i64 24}
!22 = !{!14, !8, i64 32}
!23 = !{!14, !8, i64 0}
|
vlc_modules_audio_output_extr_wasapi.c_vlc_SpdifToWave
|
; ModuleID = 'AnghaBench/i3/src/extr_output.c_get_output_from_string.c'
source_filename = "AnghaBench/i3/src/extr_output.c_get_output_from_string.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [8 x i8] c"current\00", align 1
@focused = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [5 x i8] c"left\00", align 1
@D_LEFT = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [6 x i8] c"right\00", align 1
@D_RIGHT = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [3 x i8] c"up\00", align 1
@D_UP = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [5 x i8] c"down\00", align 1
@D_DOWN = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @get_output_from_string(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i64 @strcasecmp(ptr noundef %1, ptr noundef nonnull @.str) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load i32, ptr @focused, align 4, !tbaa !5
%7 = tail call ptr @get_output_for_con(i32 noundef %6) #2
br label %34
8: ; preds = %2
%9 = tail call i64 @strcasecmp(ptr noundef %1, ptr noundef nonnull @.str.1) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, ptr @D_LEFT, align 4, !tbaa !5
%13 = tail call ptr @get_output_next_wrap(i32 noundef %12, ptr noundef %0) #2
br label %34
14: ; preds = %8
%15 = tail call i64 @strcasecmp(ptr noundef %1, ptr noundef nonnull @.str.2) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, ptr @D_RIGHT, align 4, !tbaa !5
%19 = tail call ptr @get_output_next_wrap(i32 noundef %18, ptr noundef %0) #2
br label %34
20: ; preds = %14
%21 = tail call i64 @strcasecmp(ptr noundef %1, ptr noundef nonnull @.str.3) #2
%22 = icmp eq i64 %21, 0
br i1 %22, label %23, label %26
23: ; preds = %20
%24 = load i32, ptr @D_UP, align 4, !tbaa !5
%25 = tail call ptr @get_output_next_wrap(i32 noundef %24, ptr noundef %0) #2
br label %34
26: ; preds = %20
%27 = tail call i64 @strcasecmp(ptr noundef %1, ptr noundef nonnull @.str.4) #2
%28 = icmp eq i64 %27, 0
br i1 %28, label %29, label %32
29: ; preds = %26
%30 = load i32, ptr @D_DOWN, align 4, !tbaa !5
%31 = tail call ptr @get_output_next_wrap(i32 noundef %30, ptr noundef %0) #2
br label %34
32: ; preds = %26
%33 = tail call ptr @get_output_by_name(ptr noundef %1, i32 noundef 1) #2
br label %34
34: ; preds = %32, %29, %23, %17, %11, %5
%35 = phi ptr [ %7, %5 ], [ %13, %11 ], [ %19, %17 ], [ %25, %23 ], [ %31, %29 ], [ %33, %32 ]
ret ptr %35
}
declare i64 @strcasecmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @get_output_for_con(i32 noundef) local_unnamed_addr #1
declare ptr @get_output_next_wrap(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @get_output_by_name(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/i3/src/extr_output.c_get_output_from_string.c'
source_filename = "AnghaBench/i3/src/extr_output.c_get_output_from_string.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [8 x i8] c"current\00", align 1
@focused = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [5 x i8] c"left\00", align 1
@D_LEFT = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [6 x i8] c"right\00", align 1
@D_RIGHT = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [3 x i8] c"up\00", align 1
@D_UP = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [5 x i8] c"down\00", align 1
@D_DOWN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @get_output_from_string(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i64 @strcasecmp(ptr noundef %1, ptr noundef nonnull @.str) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load i32, ptr @focused, align 4, !tbaa !6
%7 = tail call ptr @get_output_for_con(i32 noundef %6) #2
br label %34
8: ; preds = %2
%9 = tail call i64 @strcasecmp(ptr noundef %1, ptr noundef nonnull @.str.1) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, ptr @D_LEFT, align 4, !tbaa !6
%13 = tail call ptr @get_output_next_wrap(i32 noundef %12, ptr noundef %0) #2
br label %34
14: ; preds = %8
%15 = tail call i64 @strcasecmp(ptr noundef %1, ptr noundef nonnull @.str.2) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, ptr @D_RIGHT, align 4, !tbaa !6
%19 = tail call ptr @get_output_next_wrap(i32 noundef %18, ptr noundef %0) #2
br label %34
20: ; preds = %14
%21 = tail call i64 @strcasecmp(ptr noundef %1, ptr noundef nonnull @.str.3) #2
%22 = icmp eq i64 %21, 0
br i1 %22, label %23, label %26
23: ; preds = %20
%24 = load i32, ptr @D_UP, align 4, !tbaa !6
%25 = tail call ptr @get_output_next_wrap(i32 noundef %24, ptr noundef %0) #2
br label %34
26: ; preds = %20
%27 = tail call i64 @strcasecmp(ptr noundef %1, ptr noundef nonnull @.str.4) #2
%28 = icmp eq i64 %27, 0
br i1 %28, label %29, label %32
29: ; preds = %26
%30 = load i32, ptr @D_DOWN, align 4, !tbaa !6
%31 = tail call ptr @get_output_next_wrap(i32 noundef %30, ptr noundef %0) #2
br label %34
32: ; preds = %26
%33 = tail call ptr @get_output_by_name(ptr noundef %1, i32 noundef 1) #2
br label %34
34: ; preds = %32, %29, %23, %17, %11, %5
%35 = phi ptr [ %7, %5 ], [ %13, %11 ], [ %19, %17 ], [ %25, %23 ], [ %31, %29 ], [ %33, %32 ]
ret ptr %35
}
declare i64 @strcasecmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @get_output_for_con(i32 noundef) local_unnamed_addr #1
declare ptr @get_output_next_wrap(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @get_output_by_name(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
i3_src_extr_output.c_get_output_from_string
|
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/mips/extr_h264qpel_msa.c_ff_avg_h264_qpel16_mc33_msa.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/mips/extr_h264qpel_msa.c_ff_avg_h264_qpel16_mc33_msa.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @ff_avg_h264_qpel16_mc33_msa(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = sext i32 %2 to i64
%5 = getelementptr inbounds i32, ptr %1, i64 %4
%6 = getelementptr inbounds i32, ptr %5, i64 -2
%7 = shl nsw i32 %2, 1
%8 = sext i32 %7 to i64
%9 = sub nsw i64 0, %8
%10 = getelementptr inbounds i32, ptr %1, i64 %9
%11 = getelementptr inbounds i32, ptr %10, i64 4
%12 = tail call i32 @avc_luma_hv_qrt_and_aver_dst_16x16_msa(ptr noundef nonnull %6, ptr noundef nonnull %11, ptr noundef %0, i32 noundef %2) #2
ret void
}
declare i32 @avc_luma_hv_qrt_and_aver_dst_16x16_msa(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/mips/extr_h264qpel_msa.c_ff_avg_h264_qpel16_mc33_msa.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/mips/extr_h264qpel_msa.c_ff_avg_h264_qpel16_mc33_msa.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @ff_avg_h264_qpel16_mc33_msa(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = sext i32 %2 to i64
%5 = getelementptr inbounds i32, ptr %1, i64 %4
%6 = getelementptr inbounds i8, ptr %5, i64 -8
%7 = shl nsw i32 %2, 1
%8 = sext i32 %7 to i64
%9 = sub nsw i64 0, %8
%10 = getelementptr inbounds i32, ptr %1, i64 %9
%11 = getelementptr inbounds i8, ptr %10, i64 16
%12 = tail call i32 @avc_luma_hv_qrt_and_aver_dst_16x16_msa(ptr noundef nonnull %6, ptr noundef nonnull %11, ptr noundef %0, i32 noundef %2) #2
ret void
}
declare i32 @avc_luma_hv_qrt_and_aver_dst_16x16_msa(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
FFmpeg_libavcodec_mips_extr_h264qpel_msa.c_ff_avg_h264_qpel16_mc33_msa
|
; ModuleID = 'AnghaBench/TDengine/src/system/detail/src/extr_mgmtVgroup.c_mgmtVgroupActionInit.c'
source_filename = "AnghaBench/TDengine/src/system/detail/src/extr_mgmtVgroup.c_mgmtVgroupActionInit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@mgmtVgroupActionInsert = dso_local local_unnamed_addr global i32 0, align 4
@mgmtVgroupActionFp = dso_local local_unnamed_addr global ptr null, align 8
@SDB_TYPE_INSERT = dso_local local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionDelete = dso_local local_unnamed_addr global i32 0, align 4
@SDB_TYPE_DELETE = dso_local local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionUpdate = dso_local local_unnamed_addr global i32 0, align 4
@SDB_TYPE_UPDATE = dso_local local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionEncode = dso_local local_unnamed_addr global i32 0, align 4
@SDB_TYPE_ENCODE = dso_local local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionDecode = dso_local local_unnamed_addr global i32 0, align 4
@SDB_TYPE_DECODE = dso_local local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionBeforeBatchUpdate = dso_local local_unnamed_addr global i32 0, align 4
@SDB_TYPE_BEFORE_BATCH_UPDATE = dso_local local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionBatchUpdate = dso_local local_unnamed_addr global i32 0, align 4
@SDB_TYPE_BATCH_UPDATE = dso_local local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionAfterBatchUpdate = dso_local local_unnamed_addr global i32 0, align 4
@SDB_TYPE_AFTER_BATCH_UPDATE = dso_local local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionReset = dso_local local_unnamed_addr global i32 0, align 4
@SDB_TYPE_RESET = dso_local local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionDestroy = dso_local local_unnamed_addr global i32 0, align 4
@SDB_TYPE_DESTROY = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: write, inaccessiblemem: none) uwtable
define dso_local void @mgmtVgroupActionInit() local_unnamed_addr #0 {
%1 = load i32, ptr @mgmtVgroupActionInsert, align 4, !tbaa !5
%2 = load ptr, ptr @mgmtVgroupActionFp, align 8, !tbaa !9
%3 = load i64, ptr @SDB_TYPE_INSERT, align 8, !tbaa !11
%4 = getelementptr inbounds i32, ptr %2, i64 %3
store i32 %1, ptr %4, align 4, !tbaa !5
%5 = load i32, ptr @mgmtVgroupActionDelete, align 4, !tbaa !5
%6 = load i64, ptr @SDB_TYPE_DELETE, align 8, !tbaa !11
%7 = getelementptr inbounds i32, ptr %2, i64 %6
store i32 %5, ptr %7, align 4, !tbaa !5
%8 = load i32, ptr @mgmtVgroupActionUpdate, align 4, !tbaa !5
%9 = load i64, ptr @SDB_TYPE_UPDATE, align 8, !tbaa !11
%10 = getelementptr inbounds i32, ptr %2, i64 %9
store i32 %8, ptr %10, align 4, !tbaa !5
%11 = load i32, ptr @mgmtVgroupActionEncode, align 4, !tbaa !5
%12 = load i64, ptr @SDB_TYPE_ENCODE, align 8, !tbaa !11
%13 = getelementptr inbounds i32, ptr %2, i64 %12
store i32 %11, ptr %13, align 4, !tbaa !5
%14 = load i32, ptr @mgmtVgroupActionDecode, align 4, !tbaa !5
%15 = load i64, ptr @SDB_TYPE_DECODE, align 8, !tbaa !11
%16 = getelementptr inbounds i32, ptr %2, i64 %15
store i32 %14, ptr %16, align 4, !tbaa !5
%17 = load i32, ptr @mgmtVgroupActionBeforeBatchUpdate, align 4, !tbaa !5
%18 = load i64, ptr @SDB_TYPE_BEFORE_BATCH_UPDATE, align 8, !tbaa !11
%19 = getelementptr inbounds i32, ptr %2, i64 %18
store i32 %17, ptr %19, align 4, !tbaa !5
%20 = load i32, ptr @mgmtVgroupActionBatchUpdate, align 4, !tbaa !5
%21 = load i64, ptr @SDB_TYPE_BATCH_UPDATE, align 8, !tbaa !11
%22 = getelementptr inbounds i32, ptr %2, i64 %21
store i32 %20, ptr %22, align 4, !tbaa !5
%23 = load i32, ptr @mgmtVgroupActionAfterBatchUpdate, align 4, !tbaa !5
%24 = load i64, ptr @SDB_TYPE_AFTER_BATCH_UPDATE, align 8, !tbaa !11
%25 = getelementptr inbounds i32, ptr %2, i64 %24
store i32 %23, ptr %25, align 4, !tbaa !5
%26 = load i32, ptr @mgmtVgroupActionReset, align 4, !tbaa !5
%27 = load i64, ptr @SDB_TYPE_RESET, align 8, !tbaa !11
%28 = getelementptr inbounds i32, ptr %2, i64 %27
store i32 %26, ptr %28, align 4, !tbaa !5
%29 = load i32, ptr @mgmtVgroupActionDestroy, align 4, !tbaa !5
%30 = load i64, ptr @SDB_TYPE_DESTROY, align 8, !tbaa !11
%31 = getelementptr inbounds i32, ptr %2, i64 %30
store i32 %29, ptr %31, align 4, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/TDengine/src/system/detail/src/extr_mgmtVgroup.c_mgmtVgroupActionInit.c'
source_filename = "AnghaBench/TDengine/src/system/detail/src/extr_mgmtVgroup.c_mgmtVgroupActionInit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@mgmtVgroupActionInsert = common local_unnamed_addr global i32 0, align 4
@mgmtVgroupActionFp = common local_unnamed_addr global ptr null, align 8
@SDB_TYPE_INSERT = common local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionDelete = common local_unnamed_addr global i32 0, align 4
@SDB_TYPE_DELETE = common local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionUpdate = common local_unnamed_addr global i32 0, align 4
@SDB_TYPE_UPDATE = common local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionEncode = common local_unnamed_addr global i32 0, align 4
@SDB_TYPE_ENCODE = common local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionDecode = common local_unnamed_addr global i32 0, align 4
@SDB_TYPE_DECODE = common local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionBeforeBatchUpdate = common local_unnamed_addr global i32 0, align 4
@SDB_TYPE_BEFORE_BATCH_UPDATE = common local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionBatchUpdate = common local_unnamed_addr global i32 0, align 4
@SDB_TYPE_BATCH_UPDATE = common local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionAfterBatchUpdate = common local_unnamed_addr global i32 0, align 4
@SDB_TYPE_AFTER_BATCH_UPDATE = common local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionReset = common local_unnamed_addr global i32 0, align 4
@SDB_TYPE_RESET = common local_unnamed_addr global i64 0, align 8
@mgmtVgroupActionDestroy = common local_unnamed_addr global i32 0, align 4
@SDB_TYPE_DESTROY = common local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: write, inaccessiblemem: none) uwtable(sync)
define void @mgmtVgroupActionInit() local_unnamed_addr #0 {
%1 = load i32, ptr @mgmtVgroupActionInsert, align 4, !tbaa !6
%2 = load ptr, ptr @mgmtVgroupActionFp, align 8, !tbaa !10
%3 = load i64, ptr @SDB_TYPE_INSERT, align 8, !tbaa !12
%4 = getelementptr inbounds i32, ptr %2, i64 %3
store i32 %1, ptr %4, align 4, !tbaa !6
%5 = load i32, ptr @mgmtVgroupActionDelete, align 4, !tbaa !6
%6 = load i64, ptr @SDB_TYPE_DELETE, align 8, !tbaa !12
%7 = getelementptr inbounds i32, ptr %2, i64 %6
store i32 %5, ptr %7, align 4, !tbaa !6
%8 = load i32, ptr @mgmtVgroupActionUpdate, align 4, !tbaa !6
%9 = load i64, ptr @SDB_TYPE_UPDATE, align 8, !tbaa !12
%10 = getelementptr inbounds i32, ptr %2, i64 %9
store i32 %8, ptr %10, align 4, !tbaa !6
%11 = load i32, ptr @mgmtVgroupActionEncode, align 4, !tbaa !6
%12 = load i64, ptr @SDB_TYPE_ENCODE, align 8, !tbaa !12
%13 = getelementptr inbounds i32, ptr %2, i64 %12
store i32 %11, ptr %13, align 4, !tbaa !6
%14 = load i32, ptr @mgmtVgroupActionDecode, align 4, !tbaa !6
%15 = load i64, ptr @SDB_TYPE_DECODE, align 8, !tbaa !12
%16 = getelementptr inbounds i32, ptr %2, i64 %15
store i32 %14, ptr %16, align 4, !tbaa !6
%17 = load i32, ptr @mgmtVgroupActionBeforeBatchUpdate, align 4, !tbaa !6
%18 = load i64, ptr @SDB_TYPE_BEFORE_BATCH_UPDATE, align 8, !tbaa !12
%19 = getelementptr inbounds i32, ptr %2, i64 %18
store i32 %17, ptr %19, align 4, !tbaa !6
%20 = load i32, ptr @mgmtVgroupActionBatchUpdate, align 4, !tbaa !6
%21 = load i64, ptr @SDB_TYPE_BATCH_UPDATE, align 8, !tbaa !12
%22 = getelementptr inbounds i32, ptr %2, i64 %21
store i32 %20, ptr %22, align 4, !tbaa !6
%23 = load i32, ptr @mgmtVgroupActionAfterBatchUpdate, align 4, !tbaa !6
%24 = load i64, ptr @SDB_TYPE_AFTER_BATCH_UPDATE, align 8, !tbaa !12
%25 = getelementptr inbounds i32, ptr %2, i64 %24
store i32 %23, ptr %25, align 4, !tbaa !6
%26 = load i32, ptr @mgmtVgroupActionReset, align 4, !tbaa !6
%27 = load i64, ptr @SDB_TYPE_RESET, align 8, !tbaa !12
%28 = getelementptr inbounds i32, ptr %2, i64 %27
store i32 %26, ptr %28, align 4, !tbaa !6
%29 = load i32, ptr @mgmtVgroupActionDestroy, align 4, !tbaa !6
%30 = load i64, ptr @SDB_TYPE_DESTROY, align 8, !tbaa !12
%31 = getelementptr inbounds i32, ptr %2, i64 %30
store i32 %29, ptr %31, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
|
TDengine_src_system_detail_src_extr_mgmtVgroup.c_mgmtVgroupActionInit
|
; ModuleID = 'AnghaBench/vlc/modules/video_output/win32/extr_....video_chromad3d11_fmt.h_GetD3D11ContextPrivate.c'
source_filename = "AnghaBench/vlc/modules/video_output/win32/extr_....video_chromad3d11_fmt.h_GetD3D11ContextPrivate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@VLC_VIDEO_CONTEXT_D3D11VA = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @GetD3D11ContextPrivate], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal ptr @GetD3D11ContextPrivate(ptr noundef %0) #0 {
%2 = load i32, ptr @VLC_VIDEO_CONTEXT_D3D11VA, align 4, !tbaa !5
%3 = tail call i64 @vlc_video_context_GetPrivate(ptr noundef %0, i32 noundef %2) #2
%4 = inttoptr i64 %3 to ptr
ret ptr %4
}
declare i64 @vlc_video_context_GetPrivate(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/vlc/modules/video_output/win32/extr_....video_chromad3d11_fmt.h_GetD3D11ContextPrivate.c'
source_filename = "AnghaBench/vlc/modules/video_output/win32/extr_....video_chromad3d11_fmt.h_GetD3D11ContextPrivate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VLC_VIDEO_CONTEXT_D3D11VA = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @GetD3D11ContextPrivate], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal ptr @GetD3D11ContextPrivate(ptr noundef %0) #0 {
%2 = load i32, ptr @VLC_VIDEO_CONTEXT_D3D11VA, align 4, !tbaa !6
%3 = tail call i64 @vlc_video_context_GetPrivate(ptr noundef %0, i32 noundef %2) #2
%4 = inttoptr i64 %3 to ptr
ret ptr %4
}
declare i64 @vlc_video_context_GetPrivate(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
vlc_modules_video_output_win32_extr_....video_chromad3d11_fmt.h_GetD3D11ContextPrivate
|
; ModuleID = 'AnghaBench/linux/fs/xfs/extr_xfs_inode.c_xfs_ilock_data_map_shared.c'
source_filename = "AnghaBench/linux/fs/xfs/extr_xfs_inode.c_xfs_ilock_data_map_shared.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.xfs_inode = type { %struct.TYPE_4__, %struct.TYPE_3__ }
%struct.TYPE_4__ = type { i32 }
%struct.TYPE_3__ = type { i64 }
@XFS_ILOCK_SHARED = dso_local local_unnamed_addr global i32 0, align 4
@XFS_DINODE_FMT_BTREE = dso_local local_unnamed_addr global i64 0, align 8
@XFS_IFEXTENTS = dso_local local_unnamed_addr global i32 0, align 4
@XFS_ILOCK_EXCL = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @xfs_ilock_data_map_shared(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @XFS_ILOCK_SHARED, align 4, !tbaa !5
%3 = getelementptr inbounds %struct.xfs_inode, ptr %0, i64 0, i32 1
%4 = load i64, ptr %3, align 8, !tbaa !9
%5 = load i64, ptr @XFS_DINODE_FMT_BTREE, align 8, !tbaa !14
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %14
7: ; preds = %1
%8 = load i32, ptr %0, align 8, !tbaa !15
%9 = load i32, ptr @XFS_IFEXTENTS, align 4, !tbaa !5
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
%12 = load i32, ptr @XFS_ILOCK_EXCL, align 4
%13 = select i1 %11, i32 %12, i32 %2
br label %14
14: ; preds = %7, %1
%15 = phi i32 [ %2, %1 ], [ %13, %7 ]
%16 = tail call i32 @xfs_ilock(ptr noundef nonnull %0, i32 noundef %15) #2
ret i32 %15
}
declare i32 @xfs_ilock(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 8}
!10 = !{!"xfs_inode", !11, i64 0, !12, i64 8}
!11 = !{!"TYPE_4__", !6, i64 0}
!12 = !{!"TYPE_3__", !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!10, !6, i64 0}
|
; ModuleID = 'AnghaBench/linux/fs/xfs/extr_xfs_inode.c_xfs_ilock_data_map_shared.c'
source_filename = "AnghaBench/linux/fs/xfs/extr_xfs_inode.c_xfs_ilock_data_map_shared.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@XFS_ILOCK_SHARED = common local_unnamed_addr global i32 0, align 4
@XFS_DINODE_FMT_BTREE = common local_unnamed_addr global i64 0, align 8
@XFS_IFEXTENTS = common local_unnamed_addr global i32 0, align 4
@XFS_ILOCK_EXCL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @xfs_ilock_data_map_shared(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @XFS_ILOCK_SHARED, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load i64, ptr %3, align 8, !tbaa !10
%5 = load i64, ptr @XFS_DINODE_FMT_BTREE, align 8, !tbaa !15
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %14
7: ; preds = %1
%8 = load i32, ptr %0, align 8, !tbaa !16
%9 = load i32, ptr @XFS_IFEXTENTS, align 4, !tbaa !6
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
%12 = load i32, ptr @XFS_ILOCK_EXCL, align 4
%13 = select i1 %11, i32 %12, i32 %2
br label %14
14: ; preds = %7, %1
%15 = phi i32 [ %2, %1 ], [ %13, %7 ]
%16 = tail call i32 @xfs_ilock(ptr noundef nonnull %0, i32 noundef %15) #2
ret i32 %15
}
declare i32 @xfs_ilock(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !14, i64 8}
!11 = !{!"xfs_inode", !12, i64 0, !13, i64 8}
!12 = !{!"TYPE_4__", !7, i64 0}
!13 = !{!"TYPE_3__", !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!11, !7, i64 0}
|
linux_fs_xfs_extr_xfs_inode.c_xfs_ilock_data_map_shared
|
; ModuleID = 'AnghaBench/linux/fs/extr_direct-io.c_dio_bio_submit.c'
source_filename = "AnghaBench/linux/fs/extr_direct-io.c_dio_bio_submit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dio_submit = type { i32, i64, ptr, ptr }
%struct.bio = type { i32, ptr }
%struct.dio = type { i64, i32, i32, i32, i64, i64, i32, i32 }
@REQ_OP_READ = dso_local local_unnamed_addr global i64 0, align 8
@BLK_QC_T_NONE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dio_bio_submit], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @dio_bio_submit(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = getelementptr inbounds %struct.dio_submit, ptr %1, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.bio, ptr %4, i64 0, i32 1
store ptr %0, ptr %5, align 8, !tbaa !12
%6 = getelementptr inbounds %struct.dio, ptr %0, i64 0, i32 6
%7 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %6, i64 noundef undef) #3
%8 = getelementptr inbounds %struct.dio, ptr %0, i64 0, i32 7
%9 = load i32, ptr %8, align 4, !tbaa !14
%10 = add nsw i32 %9, 1
store i32 %10, ptr %8, align 4, !tbaa !14
%11 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %6, i64 noundef undef) #3
%12 = getelementptr inbounds %struct.dio, ptr %0, i64 0, i32 5
%13 = load i64, ptr %12, align 8, !tbaa !16
%14 = icmp eq i64 %13, 0
br i1 %14, label %25, label %15
15: ; preds = %2
%16 = load i64, ptr %0, align 8, !tbaa !17
%17 = load i64, ptr @REQ_OP_READ, align 8, !tbaa !18
%18 = icmp eq i64 %16, %17
br i1 %18, label %19, label %25
19: ; preds = %15
%20 = getelementptr inbounds %struct.dio, ptr %0, i64 0, i32 4
%21 = load i64, ptr %20, align 8, !tbaa !19
%22 = icmp eq i64 %21, 0
br i1 %22, label %25, label %23
23: ; preds = %19
%24 = tail call i32 @bio_set_pages_dirty(ptr noundef nonnull %4) #3
br label %25
25: ; preds = %23, %19, %15, %2
%26 = load i32, ptr %4, align 8, !tbaa !20
%27 = getelementptr inbounds %struct.dio, ptr %0, i64 0, i32 3
store i32 %26, ptr %27, align 8, !tbaa !21
%28 = getelementptr inbounds %struct.dio_submit, ptr %1, i64 0, i32 3
%29 = load ptr, ptr %28, align 8, !tbaa !22
%30 = icmp eq ptr %29, null
br i1 %30, label %37, label %31
31: ; preds = %25
%32 = getelementptr inbounds %struct.dio, ptr %0, i64 0, i32 2
%33 = load i32, ptr %32, align 4, !tbaa !23
%34 = load i32, ptr %1, align 8, !tbaa !24
%35 = tail call i32 %29(ptr noundef nonnull %4, i32 noundef %33, i32 noundef %34) #3
%36 = load i32, ptr @BLK_QC_T_NONE, align 4, !tbaa !25
br label %39
37: ; preds = %25
%38 = tail call i32 @submit_bio(ptr noundef nonnull %4) #3
br label %39
39: ; preds = %37, %31
%40 = phi i32 [ %38, %37 ], [ %36, %31 ]
%41 = getelementptr inbounds %struct.dio, ptr %0, i64 0, i32 1
store i32 %40, ptr %41, align 8
%42 = getelementptr inbounds %struct.dio_submit, ptr %1, i64 0, i32 1
store i32 0, ptr %1, align 8, !tbaa !24
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %42, i8 0, i64 16, i1 false)
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @bio_set_pages_dirty(ptr noundef) local_unnamed_addr #1
declare i32 @submit_bio(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"dio_submit", !7, i64 0, !10, i64 8, !11, i64 16, !11, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"bio", !7, i64 0, !11, i64 8}
!14 = !{!15, !7, i64 44}
!15 = !{!"dio", !10, i64 0, !7, i64 8, !7, i64 12, !7, i64 16, !10, i64 24, !10, i64 32, !7, i64 40, !7, i64 44}
!16 = !{!15, !10, i64 32}
!17 = !{!15, !10, i64 0}
!18 = !{!10, !10, i64 0}
!19 = !{!15, !10, i64 24}
!20 = !{!13, !7, i64 0}
!21 = !{!15, !7, i64 16}
!22 = !{!6, !11, i64 24}
!23 = !{!15, !7, i64 12}
!24 = !{!6, !7, i64 0}
!25 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/fs/extr_direct-io.c_dio_bio_submit.c'
source_filename = "AnghaBench/linux/fs/extr_direct-io.c_dio_bio_submit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REQ_OP_READ = common local_unnamed_addr global i64 0, align 8
@BLK_QC_T_NONE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dio_bio_submit], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @dio_bio_submit(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %4, i64 8
store ptr %0, ptr %5, align 8, !tbaa !13
%6 = getelementptr inbounds i8, ptr %0, i64 40
%7 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %6, i64 noundef undef) #3
%8 = getelementptr inbounds i8, ptr %0, i64 44
%9 = load i32, ptr %8, align 4, !tbaa !15
%10 = add nsw i32 %9, 1
store i32 %10, ptr %8, align 4, !tbaa !15
%11 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %6, i64 noundef undef) #3
%12 = getelementptr inbounds i8, ptr %0, i64 32
%13 = load i64, ptr %12, align 8, !tbaa !17
%14 = icmp eq i64 %13, 0
br i1 %14, label %25, label %15
15: ; preds = %2
%16 = load i64, ptr %0, align 8, !tbaa !18
%17 = load i64, ptr @REQ_OP_READ, align 8, !tbaa !19
%18 = icmp eq i64 %16, %17
br i1 %18, label %19, label %25
19: ; preds = %15
%20 = getelementptr inbounds i8, ptr %0, i64 24
%21 = load i64, ptr %20, align 8, !tbaa !20
%22 = icmp eq i64 %21, 0
br i1 %22, label %25, label %23
23: ; preds = %19
%24 = tail call i32 @bio_set_pages_dirty(ptr noundef nonnull %4) #3
br label %25
25: ; preds = %23, %19, %15, %2
%26 = load i32, ptr %4, align 8, !tbaa !21
%27 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %26, ptr %27, align 8, !tbaa !22
%28 = getelementptr inbounds i8, ptr %1, i64 24
%29 = load ptr, ptr %28, align 8, !tbaa !23
%30 = icmp eq ptr %29, null
br i1 %30, label %37, label %31
31: ; preds = %25
%32 = getelementptr inbounds i8, ptr %0, i64 12
%33 = load i32, ptr %32, align 4, !tbaa !24
%34 = load i32, ptr %1, align 8, !tbaa !25
%35 = tail call i32 %29(ptr noundef nonnull %4, i32 noundef %33, i32 noundef %34) #3
%36 = load i32, ptr @BLK_QC_T_NONE, align 4, !tbaa !26
br label %39
37: ; preds = %25
%38 = tail call i32 @submit_bio(ptr noundef nonnull %4) #3
br label %39
39: ; preds = %37, %31
%40 = phi i32 [ %38, %37 ], [ %36, %31 ]
%41 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %40, ptr %41, align 8
%42 = getelementptr inbounds i8, ptr %1, i64 8
store i32 0, ptr %1, align 8, !tbaa !25
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %42, i8 0, i64 16, i1 false)
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @bio_set_pages_dirty(ptr noundef) local_unnamed_addr #1
declare i32 @submit_bio(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 16}
!7 = !{!"dio_submit", !8, i64 0, !11, i64 8, !12, i64 16, !12, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!14, !12, i64 8}
!14 = !{!"bio", !8, i64 0, !12, i64 8}
!15 = !{!16, !8, i64 44}
!16 = !{!"dio", !11, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24, !11, i64 32, !8, i64 40, !8, i64 44}
!17 = !{!16, !11, i64 32}
!18 = !{!16, !11, i64 0}
!19 = !{!11, !11, i64 0}
!20 = !{!16, !11, i64 24}
!21 = !{!14, !8, i64 0}
!22 = !{!16, !8, i64 16}
!23 = !{!7, !12, i64 24}
!24 = !{!16, !8, i64 12}
!25 = !{!7, !8, i64 0}
!26 = !{!8, !8, i64 0}
|
linux_fs_extr_direct-io.c_dio_bio_submit
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/hostfs/extr_hostfs_kern.c_hostfs_link.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/hostfs/extr_hostfs_kern.c_hostfs_link.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @hostfs_link(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @inode_dentry_name(ptr noundef %1, ptr noundef %2) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%8 = sub nsw i32 0, %7
br label %20
9: ; preds = %3
%10 = tail call ptr @dentry_name(ptr noundef %0, i32 noundef 0) #2
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = tail call i32 @kfree(ptr noundef nonnull %4) #2
%14 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%15 = sub nsw i32 0, %14
br label %20
16: ; preds = %9
%17 = tail call i32 @link_file(ptr noundef nonnull %10, ptr noundef nonnull %4) #2
%18 = tail call i32 @kfree(ptr noundef nonnull %4) #2
%19 = tail call i32 @kfree(ptr noundef nonnull %10) #2
br label %20
20: ; preds = %16, %12, %6
%21 = phi i32 [ %8, %6 ], [ %15, %12 ], [ %17, %16 ]
ret i32 %21
}
declare ptr @inode_dentry_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @dentry_name(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @link_file(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/hostfs/extr_hostfs_kern.c_hostfs_link.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/hostfs/extr_hostfs_kern.c_hostfs_link.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOMEM = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @hostfs_link(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @inode_dentry_name(ptr noundef %1, ptr noundef %2) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%8 = sub nsw i32 0, %7
br label %20
9: ; preds = %3
%10 = tail call ptr @dentry_name(ptr noundef %0, i32 noundef 0) #2
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = tail call i32 @kfree(ptr noundef nonnull %4) #2
%14 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%15 = sub nsw i32 0, %14
br label %20
16: ; preds = %9
%17 = tail call i32 @link_file(ptr noundef nonnull %10, ptr noundef nonnull %4) #2
%18 = tail call i32 @kfree(ptr noundef nonnull %4) #2
%19 = tail call i32 @kfree(ptr noundef nonnull %10) #2
br label %20
20: ; preds = %16, %12, %6
%21 = phi i32 [ %8, %6 ], [ %15, %12 ], [ %17, %16 ]
ret i32 %21
}
declare ptr @inode_dentry_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @dentry_name(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @link_file(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_fs_hostfs_extr_hostfs_kern.c_hostfs_link
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-s3c2410/extr_h1940-bluetooth.c_h1940bt_enable.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-s3c2410/extr_h1940-bluetooth.c_h1940bt_enable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@H1940_LATCH_BLUETOOTH_POWER = dso_local local_unnamed_addr global i32 0, align 4
@state = dso_local local_unnamed_addr global i32 0, align 4
@LED_HALF = dso_local local_unnamed_addr global i32 0, align 4
@bt_led_trigger = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @h1940bt_enable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @h1940bt_enable(i32 noundef %0) #0 {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = load i32, ptr @H1940_LATCH_BLUETOOTH_POWER, align 4, !tbaa !5
%5 = tail call i32 @h1940_latch_control(i32 noundef 0, i32 noundef %4) #2
%6 = tail call i32 @mdelay(i32 noundef 10) #2
%7 = tail call i32 @S3C2410_GPH(i32 noundef 1) #2
%8 = tail call i32 @s3c2410_gpio_setpin(i32 noundef %7, i32 noundef 1) #2
%9 = tail call i32 @mdelay(i32 noundef 10) #2
%10 = tail call i32 @S3C2410_GPH(i32 noundef 1) #2
%11 = tail call i32 @s3c2410_gpio_setpin(i32 noundef %10, i32 noundef 0) #2
br label %21
12: ; preds = %1
%13 = tail call i32 @S3C2410_GPH(i32 noundef 1) #2
%14 = tail call i32 @s3c2410_gpio_setpin(i32 noundef %13, i32 noundef 1) #2
%15 = tail call i32 @mdelay(i32 noundef 10) #2
%16 = tail call i32 @S3C2410_GPH(i32 noundef 1) #2
%17 = tail call i32 @s3c2410_gpio_setpin(i32 noundef %16, i32 noundef 0) #2
%18 = tail call i32 @mdelay(i32 noundef 10) #2
%19 = load i32, ptr @H1940_LATCH_BLUETOOTH_POWER, align 4, !tbaa !5
%20 = tail call i32 @h1940_latch_control(i32 noundef %19, i32 noundef 0) #2
br label %21
21: ; preds = %12, %3
%22 = phi i32 [ 0, %12 ], [ 1, %3 ]
store i32 %22, ptr @state, align 4, !tbaa !5
ret void
}
declare i32 @h1940_latch_control(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mdelay(i32 noundef) local_unnamed_addr #1
declare i32 @s3c2410_gpio_setpin(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @S3C2410_GPH(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-s3c2410/extr_h1940-bluetooth.c_h1940bt_enable.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-s3c2410/extr_h1940-bluetooth.c_h1940bt_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@H1940_LATCH_BLUETOOTH_POWER = common local_unnamed_addr global i32 0, align 4
@state = common local_unnamed_addr global i32 0, align 4
@LED_HALF = common local_unnamed_addr global i32 0, align 4
@bt_led_trigger = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @h1940bt_enable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @h1940bt_enable(i32 noundef %0) #0 {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = load i32, ptr @H1940_LATCH_BLUETOOTH_POWER, align 4, !tbaa !6
%5 = tail call i32 @h1940_latch_control(i32 noundef 0, i32 noundef %4) #2
%6 = tail call i32 @mdelay(i32 noundef 10) #2
%7 = tail call i32 @S3C2410_GPH(i32 noundef 1) #2
%8 = tail call i32 @s3c2410_gpio_setpin(i32 noundef %7, i32 noundef 1) #2
%9 = tail call i32 @mdelay(i32 noundef 10) #2
%10 = tail call i32 @S3C2410_GPH(i32 noundef 1) #2
%11 = tail call i32 @s3c2410_gpio_setpin(i32 noundef %10, i32 noundef 0) #2
br label %21
12: ; preds = %1
%13 = tail call i32 @S3C2410_GPH(i32 noundef 1) #2
%14 = tail call i32 @s3c2410_gpio_setpin(i32 noundef %13, i32 noundef 1) #2
%15 = tail call i32 @mdelay(i32 noundef 10) #2
%16 = tail call i32 @S3C2410_GPH(i32 noundef 1) #2
%17 = tail call i32 @s3c2410_gpio_setpin(i32 noundef %16, i32 noundef 0) #2
%18 = tail call i32 @mdelay(i32 noundef 10) #2
%19 = load i32, ptr @H1940_LATCH_BLUETOOTH_POWER, align 4, !tbaa !6
%20 = tail call i32 @h1940_latch_control(i32 noundef %19, i32 noundef 0) #2
br label %21
21: ; preds = %12, %3
%22 = phi i32 [ 0, %12 ], [ 1, %3 ]
store i32 %22, ptr @state, align 4, !tbaa !6
ret void
}
declare i32 @h1940_latch_control(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mdelay(i32 noundef) local_unnamed_addr #1
declare i32 @s3c2410_gpio_setpin(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @S3C2410_GPH(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_arch_arm_mach-s3c2410_extr_h1940-bluetooth.c_h1940bt_enable
|
; ModuleID = 'AnghaBench/reactos/dll/win32/windowscodecs/extr_bmpdecode.c_BmpDecoder_FindIconMask.c'
source_filename = "AnghaBench/reactos/dll/win32/windowscodecs/extr_bmpdecode.c_BmpDecoder_FindIconMask.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i64, i32, i32, i64, i32, ptr }
@BmpFrameDecode_ReadUncompressed = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @BmpDecoder_FindIconMask(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 5
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = icmp ne ptr %7, null
%9 = zext i1 %8 to i32
%10 = tail call i32 @assert(i32 noundef %9) #3
%11 = load i64, ptr %0, align 8, !tbaa !12
%12 = load i64, ptr @BmpFrameDecode_ReadUncompressed, align 8, !tbaa !13
%13 = icmp eq i64 %11, %12
br i1 %13, label %14, label %29
14: ; preds = %3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%15 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 4
%16 = call i32 @IWICBitmapFrameDecode_GetSize(ptr noundef nonnull %15, ptr noundef nonnull %4, ptr noundef nonnull %5) #3
%17 = load i32, ptr %4, align 4, !tbaa !14
%18 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%19 = load i32, ptr %18, align 8, !tbaa !15
%20 = mul nsw i32 %19, %17
%21 = add nsw i32 %20, 31
%22 = sdiv i32 %21, 32
%23 = load i32, ptr %5, align 4, !tbaa !14
%24 = shl i32 %23, 2
%25 = mul i32 %24, %22
%26 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%27 = load i32, ptr %26, align 4, !tbaa !16
%28 = add nsw i32 %25, %27
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
br label %29
29: ; preds = %3, %14
%30 = phi i32 [ %28, %14 ], [ 0, %3 ]
store i32 %30, ptr %1, align 4
%31 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 3
%32 = load i64, ptr %31, align 8, !tbaa !17
%33 = icmp sgt i64 %32, 0
%34 = zext i1 %33 to i32
store i32 %34, ptr %2, align 4, !tbaa !14
ret void
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2
declare i32 @IWICBitmapFrameDecode_GetSize(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 32}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8, !10, i64 12, !7, i64 16, !10, i64 24, !11, i64 32}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!10, !10, i64 0}
!15 = !{!6, !10, i64 8}
!16 = !{!6, !10, i64 12}
!17 = !{!6, !7, i64 16}
|
; ModuleID = 'AnghaBench/reactos/dll/win32/windowscodecs/extr_bmpdecode.c_BmpDecoder_FindIconMask.c'
source_filename = "AnghaBench/reactos/dll/win32/windowscodecs/extr_bmpdecode.c_BmpDecoder_FindIconMask.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BmpFrameDecode_ReadUncompressed = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @BmpDecoder_FindIconMask(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = getelementptr inbounds i8, ptr %0, i64 32
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = icmp ne ptr %7, null
%9 = zext i1 %8 to i32
%10 = tail call i32 @assert(i32 noundef %9) #3
%11 = load i64, ptr %0, align 8, !tbaa !13
%12 = load i64, ptr @BmpFrameDecode_ReadUncompressed, align 8, !tbaa !14
%13 = icmp eq i64 %11, %12
br i1 %13, label %14, label %29
14: ; preds = %3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%15 = getelementptr inbounds i8, ptr %0, i64 24
%16 = call i32 @IWICBitmapFrameDecode_GetSize(ptr noundef nonnull %15, ptr noundef nonnull %4, ptr noundef nonnull %5) #3
%17 = load i32, ptr %4, align 4, !tbaa !15
%18 = getelementptr inbounds i8, ptr %0, i64 8
%19 = load i32, ptr %18, align 8, !tbaa !16
%20 = mul nsw i32 %19, %17
%21 = add nsw i32 %20, 31
%22 = sdiv i32 %21, 32
%23 = load i32, ptr %5, align 4, !tbaa !15
%24 = shl i32 %23, 2
%25 = mul i32 %24, %22
%26 = getelementptr inbounds i8, ptr %0, i64 12
%27 = load i32, ptr %26, align 4, !tbaa !17
%28 = add nsw i32 %25, %27
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
br label %29
29: ; preds = %3, %14
%30 = phi i32 [ %28, %14 ], [ 0, %3 ]
store i32 %30, ptr %1, align 4
%31 = getelementptr inbounds i8, ptr %0, i64 16
%32 = load i64, ptr %31, align 8, !tbaa !18
%33 = icmp sgt i64 %32, 0
%34 = zext i1 %33 to i32
store i32 %34, ptr %2, align 4, !tbaa !15
ret void
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2
declare i32 @IWICBitmapFrameDecode_GetSize(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 32}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8, !11, i64 12, !8, i64 16, !11, i64 24, !12, i64 32}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!11, !11, i64 0}
!16 = !{!7, !11, i64 8}
!17 = !{!7, !11, i64 12}
!18 = !{!7, !8, i64 16}
|
reactos_dll_win32_windowscodecs_extr_bmpdecode.c_BmpDecoder_FindIconMask
|
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/core/extr_pcm_native.c_snd_pcm_playback_forward.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/core/extr_pcm_native.c_snd_pcm_playback_forward.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.snd_pcm_runtime = type { i64, ptr, ptr }
@EPIPE = dso_local local_unnamed_addr global i64 0, align 8
@ESTRPIPE = dso_local local_unnamed_addr global i64 0, align 8
@EBADFD = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_pcm_playback_forward], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @snd_pcm_playback_forward(ptr noundef %0, i64 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = icmp eq i64 %1, 0
br i1 %4, label %38, label %5
5: ; preds = %2
%6 = tail call i32 @snd_pcm_stream_lock_irq(ptr noundef nonnull %0) #3
%7 = getelementptr inbounds %struct.snd_pcm_runtime, ptr %3, i64 0, i32 2
%8 = load ptr, ptr %7, align 8, !tbaa !10
%9 = load i32, ptr %8, align 4, !tbaa !13
switch i32 %9, label %19 [
i32 131, label %22
i32 132, label %22
i32 133, label %10
i32 130, label %10
i32 128, label %13
i32 129, label %16
]
10: ; preds = %5, %5
%11 = tail call i32 @snd_pcm_update_hw_ptr(ptr noundef nonnull %0) #3
%12 = icmp sgt i32 %11, -1
br i1 %12, label %22, label %13
13: ; preds = %10, %5
%14 = load i64, ptr @EPIPE, align 8, !tbaa !16
%15 = sub nsw i64 0, %14
br label %35
16: ; preds = %5
%17 = load i64, ptr @ESTRPIPE, align 8, !tbaa !16
%18 = sub nsw i64 0, %17
br label %35
19: ; preds = %5
%20 = load i64, ptr @EBADFD, align 8, !tbaa !16
%21 = sub nsw i64 0, %20
br label %35
22: ; preds = %10, %5, %5
%23 = tail call i64 @snd_pcm_playback_avail(ptr noundef nonnull %3) #3
%24 = icmp slt i64 %23, 1
br i1 %24, label %35, label %25
25: ; preds = %22
%26 = tail call i64 @llvm.smin.i64(i64 %23, i64 %1)
%27 = getelementptr inbounds %struct.snd_pcm_runtime, ptr %3, i64 0, i32 1
%28 = load ptr, ptr %27, align 8, !tbaa !17
%29 = load i64, ptr %28, align 8, !tbaa !18
%30 = add nsw i64 %29, %26
%31 = load i64, ptr %3, align 8, !tbaa !20
%32 = icmp slt i64 %30, %31
%33 = select i1 %32, i64 0, i64 %31
%34 = sub nsw i64 %30, %33
store i64 %34, ptr %28, align 8, !tbaa !18
br label %35
35: ; preds = %22, %25, %19, %16, %13
%36 = phi i64 [ %21, %19 ], [ %18, %16 ], [ %15, %13 ], [ %26, %25 ], [ 0, %22 ]
%37 = tail call i32 @snd_pcm_stream_unlock_irq(ptr noundef nonnull %0) #3
br label %38
38: ; preds = %2, %35
%39 = phi i64 [ %36, %35 ], [ 0, %2 ]
ret i64 %39
}
declare i32 @snd_pcm_stream_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_update_hw_ptr(ptr noundef) local_unnamed_addr #1
declare i64 @snd_pcm_playback_avail(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_stream_unlock_irq(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smin.i64(i64, i64) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_pcm_substream", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 16}
!11 = !{!"snd_pcm_runtime", !12, i64 0, !7, i64 8, !7, i64 16}
!12 = !{!"long", !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_3__", !15, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!11, !7, i64 8}
!18 = !{!19, !12, i64 0}
!19 = !{!"TYPE_4__", !12, i64 0}
!20 = !{!11, !12, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/core/extr_pcm_native.c_snd_pcm_playback_forward.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/core/extr_pcm_native.c_snd_pcm_playback_forward.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EPIPE = common local_unnamed_addr global i64 0, align 8
@ESTRPIPE = common local_unnamed_addr global i64 0, align 8
@EBADFD = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @snd_pcm_playback_forward], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @snd_pcm_playback_forward(ptr noundef %0, i64 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = icmp eq i64 %1, 0
br i1 %4, label %38, label %5
5: ; preds = %2
%6 = tail call i32 @snd_pcm_stream_lock_irq(ptr noundef nonnull %0) #3
%7 = getelementptr inbounds i8, ptr %3, i64 16
%8 = load ptr, ptr %7, align 8, !tbaa !11
%9 = load i32, ptr %8, align 4, !tbaa !14
switch i32 %9, label %19 [
i32 131, label %22
i32 132, label %22
i32 133, label %10
i32 130, label %10
i32 128, label %13
i32 129, label %16
]
10: ; preds = %5, %5
%11 = tail call i32 @snd_pcm_update_hw_ptr(ptr noundef nonnull %0) #3
%12 = icmp sgt i32 %11, -1
br i1 %12, label %22, label %13
13: ; preds = %10, %5
%14 = load i64, ptr @EPIPE, align 8, !tbaa !17
%15 = sub nsw i64 0, %14
br label %35
16: ; preds = %5
%17 = load i64, ptr @ESTRPIPE, align 8, !tbaa !17
%18 = sub nsw i64 0, %17
br label %35
19: ; preds = %5
%20 = load i64, ptr @EBADFD, align 8, !tbaa !17
%21 = sub nsw i64 0, %20
br label %35
22: ; preds = %10, %5, %5
%23 = tail call i64 @snd_pcm_playback_avail(ptr noundef nonnull %3) #3
%24 = icmp slt i64 %23, 1
br i1 %24, label %35, label %25
25: ; preds = %22
%26 = tail call i64 @llvm.smin.i64(i64 %23, i64 %1)
%27 = getelementptr inbounds i8, ptr %3, i64 8
%28 = load ptr, ptr %27, align 8, !tbaa !18
%29 = load i64, ptr %28, align 8, !tbaa !19
%30 = add nsw i64 %29, %26
%31 = load i64, ptr %3, align 8, !tbaa !21
%32 = icmp slt i64 %30, %31
%33 = select i1 %32, i64 0, i64 %31
%34 = sub nsw i64 %30, %33
store i64 %34, ptr %28, align 8, !tbaa !19
br label %35
35: ; preds = %22, %25, %19, %16, %13
%36 = phi i64 [ %21, %19 ], [ %18, %16 ], [ %15, %13 ], [ %26, %25 ], [ 0, %22 ]
%37 = tail call i32 @snd_pcm_stream_unlock_irq(ptr noundef nonnull %0) #3
br label %38
38: ; preds = %2, %35
%39 = phi i64 [ %36, %35 ], [ 0, %2 ]
ret i64 %39
}
declare i32 @snd_pcm_stream_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_update_hw_ptr(ptr noundef) local_unnamed_addr #1
declare i64 @snd_pcm_playback_avail(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_stream_unlock_irq(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smin.i64(i64, i64) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_pcm_substream", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 16}
!12 = !{!"snd_pcm_runtime", !13, i64 0, !8, i64 8, !8, i64 16}
!13 = !{!"long", !9, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"TYPE_3__", !16, i64 0}
!16 = !{!"int", !9, i64 0}
!17 = !{!13, !13, i64 0}
!18 = !{!12, !8, i64 8}
!19 = !{!20, !13, i64 0}
!20 = !{!"TYPE_4__", !13, i64 0}
!21 = !{!12, !13, i64 0}
|
fastsocket_kernel_sound_core_extr_pcm_native.c_snd_pcm_playback_forward
|
; ModuleID = 'AnghaBench/linux/drivers/s390/char/extr_vmur.c_ur_remove.c'
source_filename = "AnghaBench/linux/drivers/s390/char/extr_vmur.c_ur_remove.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ccw_device = type { i32, i64 }
@.str = private unnamed_addr constant [11 x i8] c"ur_remove\0A\00", align 1
@vmur_mutex = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ur_remove], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ur_remove(ptr noundef %0) #0 {
%2 = tail call i32 @TRACE(ptr noundef nonnull @.str) #2
%3 = tail call i32 @mutex_lock(ptr noundef nonnull @vmur_mutex) #2
%4 = getelementptr inbounds %struct.ccw_device, ptr %0, i64 0, i32 1
%5 = load i64, ptr %4, align 8, !tbaa !5
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @ur_set_offline_force(ptr noundef nonnull %0, i32 noundef 1) #2
br label %9
9: ; preds = %7, %1
%10 = tail call i32 @ur_remove_attributes(ptr noundef nonnull %0) #2
%11 = tail call i32 @get_ccwdev_lock(ptr noundef nonnull %0) #2
%12 = tail call i32 @spin_lock_irqsave(i32 noundef %11, i64 noundef undef) #2
%13 = tail call i32 @dev_get_drvdata(ptr noundef nonnull %0) #2
%14 = tail call i32 @urdev_put(i32 noundef %13) #2
%15 = tail call i32 @dev_set_drvdata(ptr noundef nonnull %0, ptr noundef null) #2
%16 = tail call i32 @get_ccwdev_lock(ptr noundef nonnull %0) #2
%17 = tail call i32 @spin_unlock_irqrestore(i32 noundef %16, i64 noundef undef) #2
%18 = tail call i32 @mutex_unlock(ptr noundef nonnull @vmur_mutex) #2
ret void
}
declare i32 @TRACE(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @ur_set_offline_force(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ur_remove_attributes(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @get_ccwdev_lock(ptr noundef) local_unnamed_addr #1
declare i32 @urdev_put(i32 noundef) local_unnamed_addr #1
declare i32 @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @dev_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"ccw_device", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/s390/char/extr_vmur.c_ur_remove.c'
source_filename = "AnghaBench/linux/drivers/s390/char/extr_vmur.c_ur_remove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [11 x i8] c"ur_remove\0A\00", align 1
@vmur_mutex = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ur_remove], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ur_remove(ptr noundef %0) #0 {
%2 = tail call i32 @TRACE(ptr noundef nonnull @.str) #2
%3 = tail call i32 @mutex_lock(ptr noundef nonnull @vmur_mutex) #2
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load i64, ptr %4, align 8, !tbaa !6
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @ur_set_offline_force(ptr noundef nonnull %0, i32 noundef 1) #2
br label %9
9: ; preds = %7, %1
%10 = tail call i32 @ur_remove_attributes(ptr noundef nonnull %0) #2
%11 = tail call i32 @get_ccwdev_lock(ptr noundef nonnull %0) #2
%12 = tail call i32 @spin_lock_irqsave(i32 noundef %11, i64 noundef undef) #2
%13 = tail call i32 @dev_get_drvdata(ptr noundef nonnull %0) #2
%14 = tail call i32 @urdev_put(i32 noundef %13) #2
%15 = tail call i32 @dev_set_drvdata(ptr noundef nonnull %0, ptr noundef null) #2
%16 = tail call i32 @get_ccwdev_lock(ptr noundef nonnull %0) #2
%17 = tail call i32 @spin_unlock_irqrestore(i32 noundef %16, i64 noundef undef) #2
%18 = tail call i32 @mutex_unlock(ptr noundef nonnull @vmur_mutex) #2
ret void
}
declare i32 @TRACE(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @ur_set_offline_force(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ur_remove_attributes(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @get_ccwdev_lock(ptr noundef) local_unnamed_addr #1
declare i32 @urdev_put(i32 noundef) local_unnamed_addr #1
declare i32 @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @dev_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"ccw_device", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
|
linux_drivers_s390_char_extr_vmur.c_ur_remove
|
; ModuleID = 'AnghaBench/linux/kernel/trace/extr_trace_sched_switch.c_probe_sched_wakeup.c'
source_filename = "AnghaBench/linux/kernel/trace/extr_trace_sched_switch.c_probe_sched_wakeup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@RECORD_TGID = dso_local local_unnamed_addr global i32 0, align 4
@sched_tgid_ref = dso_local local_unnamed_addr global i32 0, align 4
@RECORD_CMDLINE = dso_local local_unnamed_addr global i32 0, align 4
@sched_cmdline_ref = dso_local local_unnamed_addr global i32 0, align 4
@current = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @probe_sched_wakeup], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @probe_sched_wakeup(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @RECORD_TGID, align 4, !tbaa !5
%4 = load i32, ptr @sched_tgid_ref, align 4, !tbaa !5
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 0, i32 %3
%7 = load i32, ptr @RECORD_CMDLINE, align 4, !tbaa !5
%8 = load i32, ptr @sched_cmdline_ref, align 4, !tbaa !5
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 0, i32 %7
%11 = add nsw i32 %10, %6
%12 = icmp eq i32 %11, 0
br i1 %12, label %16, label %13
13: ; preds = %2
%14 = load i32, ptr @current, align 4, !tbaa !5
%15 = tail call i32 @tracing_record_taskinfo(i32 noundef %14, i32 noundef %11) #2
br label %16
16: ; preds = %2, %13
ret void
}
declare i32 @tracing_record_taskinfo(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/kernel/trace/extr_trace_sched_switch.c_probe_sched_wakeup.c'
source_filename = "AnghaBench/linux/kernel/trace/extr_trace_sched_switch.c_probe_sched_wakeup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RECORD_TGID = common local_unnamed_addr global i32 0, align 4
@sched_tgid_ref = common local_unnamed_addr global i32 0, align 4
@RECORD_CMDLINE = common local_unnamed_addr global i32 0, align 4
@sched_cmdline_ref = common local_unnamed_addr global i32 0, align 4
@current = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @probe_sched_wakeup], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @probe_sched_wakeup(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @RECORD_TGID, align 4, !tbaa !6
%4 = load i32, ptr @sched_tgid_ref, align 4, !tbaa !6
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 0, i32 %3
%7 = load i32, ptr @RECORD_CMDLINE, align 4, !tbaa !6
%8 = load i32, ptr @sched_cmdline_ref, align 4, !tbaa !6
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 0, i32 %7
%11 = add nsw i32 %10, %6
%12 = icmp eq i32 %11, 0
br i1 %12, label %16, label %13
13: ; preds = %2
%14 = load i32, ptr @current, align 4, !tbaa !6
%15 = tail call i32 @tracing_record_taskinfo(i32 noundef %14, i32 noundef %11) #2
br label %16
16: ; preds = %2, %13
ret void
}
declare i32 @tracing_record_taskinfo(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_kernel_trace_extr_trace_sched_switch.c_probe_sched_wakeup
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_sge.c_fl_mtu_bufsize.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_sge.c_fl_mtu_bufsize.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sge = type { i32, i64 }
@ETH_HLEN = dso_local local_unnamed_addr global i64 0, align 8
@VLAN_HLEN = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @fl_mtu_bufsize], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @fl_mtu_bufsize(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds %struct.sge, ptr %0, i64 0, i32 1
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = load i64, ptr @ETH_HLEN, align 8, !tbaa !11
%6 = load i64, ptr @VLAN_HLEN, align 8, !tbaa !11
%7 = zext i32 %1 to i64
%8 = add i64 %4, %7
%9 = add i64 %8, %5
%10 = add i64 %9, %6
%11 = load i32, ptr %0, align 8, !tbaa !12
%12 = tail call i32 @ALIGN(i64 noundef %10, i32 noundef %11) #2
ret i32 %12
}
declare i32 @ALIGN(i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"sge", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_sge.c_fl_mtu_bufsize.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_sge.c_fl_mtu_bufsize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ETH_HLEN = common local_unnamed_addr global i64 0, align 8
@VLAN_HLEN = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @fl_mtu_bufsize], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @fl_mtu_bufsize(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = load i64, ptr @ETH_HLEN, align 8, !tbaa !12
%6 = load i64, ptr @VLAN_HLEN, align 8, !tbaa !12
%7 = zext i32 %1 to i64
%8 = add i64 %4, %7
%9 = add i64 %8, %5
%10 = add i64 %9, %6
%11 = load i32, ptr %0, align 8, !tbaa !13
%12 = tail call i32 @ALIGN(i64 noundef %10, i32 noundef %11) #2
ret i32 %12
}
declare i32 @ALIGN(i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"sge", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !8, i64 0}
|
linux_drivers_net_ethernet_chelsio_cxgb4_extr_sge.c_fl_mtu_bufsize
|
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_InRpcBridgeSupport.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_InRpcBridgeSupport.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { ptr, ptr }
@.str = private unnamed_addr constant [20 x i8] c"IsBridgeSupportedOs\00", align 1
@.str.1 = private unnamed_addr constant [16 x i8] c"IsWinPcapNeeded\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @InRpcBridgeSupport(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
%4 = icmp eq ptr %1, null
%5 = or i1 %3, %4
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = tail call i32 @Zero(ptr noundef nonnull %0, i32 noundef 16) #2
%8 = tail call ptr @PackGetBool(ptr noundef nonnull %1, ptr noundef nonnull @.str) #2
%9 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
store ptr %8, ptr %9, align 8, !tbaa !5
%10 = tail call ptr @PackGetBool(ptr noundef nonnull %1, ptr noundef nonnull @.str.1) #2
store ptr %10, ptr %0, align 8, !tbaa !10
br label %11
11: ; preds = %2, %6
ret void
}
declare i32 @Zero(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @PackGetBool(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"TYPE_4__", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_InRpcBridgeSupport.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_InRpcBridgeSupport.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [20 x i8] c"IsBridgeSupportedOs\00", align 1
@.str.1 = private unnamed_addr constant [16 x i8] c"IsWinPcapNeeded\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @InRpcBridgeSupport(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
%4 = icmp eq ptr %1, null
%5 = or i1 %3, %4
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = tail call i32 @Zero(ptr noundef nonnull %0, i32 noundef 16) #2
%8 = tail call ptr @PackGetBool(ptr noundef nonnull %1, ptr noundef nonnull @.str) #2
%9 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %8, ptr %9, align 8, !tbaa !6
%10 = tail call ptr @PackGetBool(ptr noundef nonnull %1, ptr noundef nonnull @.str.1) #2
store ptr %10, ptr %0, align 8, !tbaa !11
br label %11
11: ; preds = %2, %6
ret void
}
declare i32 @Zero(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @PackGetBool(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
|
SoftEtherVPN_src_Cedar_extr_Admin.c_InRpcBridgeSupport
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_x86.c_load_guest_segment_descriptor.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_x86.c_load_guest_segment_descriptor.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.descriptor_table = type { i32, i64 }
@GP_VECTOR = dso_local local_unnamed_addr global i32 0, align 4
@X86EMUL_PROPAGATE_FAULT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @load_guest_segment_descriptor], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @load_guest_segment_descriptor(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = alloca %struct.descriptor_table, align 8
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = call i32 @get_segment_descriptor_dtable(ptr noundef %0, i32 noundef %1, ptr noundef nonnull %4) #3
%7 = load i32, ptr %4, align 8, !tbaa !5
%8 = or i32 %1, 7
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i32, ptr @GP_VECTOR, align 4, !tbaa !11
%12 = and i32 %1, 65532
%13 = call i32 @kvm_queue_exception_e(ptr noundef %0, i32 noundef %11, i32 noundef %12) #3
br label %26
14: ; preds = %3
%15 = and i32 %1, -8
%16 = getelementptr inbounds %struct.descriptor_table, ptr %4, i64 0, i32 1
%17 = load i64, ptr %16, align 8, !tbaa !12
%18 = sext i32 %15 to i64
%19 = add nsw i64 %17, %18
%20 = call i32 @kvm_read_guest_virt_system(i64 noundef %19, ptr noundef %2, i32 noundef 4, ptr noundef %0, ptr noundef nonnull %5) #3
%21 = load i32, ptr @X86EMUL_PROPAGATE_FAULT, align 4, !tbaa !11
%22 = icmp eq i32 %20, %21
br i1 %22, label %23, label %26
23: ; preds = %14
%24 = load i32, ptr %5, align 4, !tbaa !11
%25 = call i32 @kvm_inject_page_fault(ptr noundef %0, i64 noundef %19, i32 noundef %24) #3
br label %26
26: ; preds = %14, %23, %10
%27 = phi i32 [ 1, %10 ], [ %20, %23 ], [ %20, %14 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
ret i32 %27
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @get_segment_descriptor_dtable(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @kvm_queue_exception_e(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @kvm_read_guest_virt_system(i64 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @kvm_inject_page_fault(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"descriptor_table", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 8}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_x86.c_load_guest_segment_descriptor.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_x86.c_load_guest_segment_descriptor.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.descriptor_table = type { i32, i64 }
@GP_VECTOR = common local_unnamed_addr global i32 0, align 4
@X86EMUL_PROPAGATE_FAULT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @load_guest_segment_descriptor], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @load_guest_segment_descriptor(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = alloca %struct.descriptor_table, align 8
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = call i32 @get_segment_descriptor_dtable(ptr noundef %0, i32 noundef %1, ptr noundef nonnull %4) #3
%7 = load i32, ptr %4, align 8, !tbaa !6
%8 = or i32 %1, 7
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i32, ptr @GP_VECTOR, align 4, !tbaa !12
%12 = and i32 %1, 65532
%13 = call i32 @kvm_queue_exception_e(ptr noundef %0, i32 noundef %11, i32 noundef %12) #3
br label %26
14: ; preds = %3
%15 = and i32 %1, -8
%16 = getelementptr inbounds i8, ptr %4, i64 8
%17 = load i64, ptr %16, align 8, !tbaa !13
%18 = sext i32 %15 to i64
%19 = add nsw i64 %17, %18
%20 = call i32 @kvm_read_guest_virt_system(i64 noundef %19, ptr noundef %2, i32 noundef 4, ptr noundef %0, ptr noundef nonnull %5) #3
%21 = load i32, ptr @X86EMUL_PROPAGATE_FAULT, align 4, !tbaa !12
%22 = icmp eq i32 %20, %21
br i1 %22, label %23, label %26
23: ; preds = %14
%24 = load i32, ptr %5, align 4, !tbaa !12
%25 = call i32 @kvm_inject_page_fault(ptr noundef %0, i64 noundef %19, i32 noundef %24) #3
br label %26
26: ; preds = %14, %23, %10
%27 = phi i32 [ 1, %10 ], [ %20, %23 ], [ %20, %14 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
ret i32 %27
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @get_segment_descriptor_dtable(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @kvm_queue_exception_e(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @kvm_read_guest_virt_system(i64 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @kvm_inject_page_fault(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"descriptor_table", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 8}
|
fastsocket_kernel_arch_x86_kvm_extr_x86.c_load_guest_segment_descriptor
|
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/vchiq_arm/extr_vchiq_lib.c_vchi_create_connection.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/vchiq_arm/extr_vchiq_lib.c_vchi_create_connection.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noalias noundef ptr @vchi_create_connection(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @vcos_unused(ptr noundef %0) #2
%4 = tail call i32 @vcos_unused(ptr noundef %1) #2
ret ptr null
}
declare i32 @vcos_unused(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/vchiq_arm/extr_vchiq_lib.c_vchi_create_connection.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/vchiq_arm/extr_vchiq_lib.c_vchi_create_connection.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noalias noundef ptr @vchi_create_connection(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @vcos_unused(ptr noundef %0) #2
%4 = tail call i32 @vcos_unused(ptr noundef %1) #2
ret ptr null
}
declare i32 @vcos_unused(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
RetroArch_gfx_include_userland_interface_vchiq_arm_extr_vchiq_lib.c_vchi_create_connection
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/char/agp/extr_intel-gtt.c_i830_cleanup.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/char/agp/extr_intel-gtt.c_i830_cleanup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @i830_cleanup], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @i830_cleanup() #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/char/agp/extr_intel-gtt.c_i830_cleanup.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/char/agp/extr_intel-gtt.c_i830_cleanup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @i830_cleanup], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @i830_cleanup() #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_drivers_char_agp_extr_intel-gtt.c_i830_cleanup
|
; ModuleID = 'AnghaBench/memcached/extr_testapp.c_test_safe_strtol.c'
source_filename = "AnghaBench/memcached/extr_testapp.c_test_safe_strtol.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [4 x i8] c"123\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"+123\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"-123\00", align 1
@.str.3 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.4 = private unnamed_addr constant [9 x i8] c"123BOGUS\00", align 1
@.str.5 = private unnamed_addr constant [27 x i8] c"92837498237498237498029383\00", align 1
@.str.6 = private unnamed_addr constant [10 x i8] c" issue221\00", align 1
@.str.7 = private unnamed_addr constant [11 x i8] c"2147483647\00", align 1
@.str.8 = private unnamed_addr constant [9 x i8] c" 123 foo\00", align 1
@TEST_PASS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @test_safe_strtol], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @test_safe_strtol() #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%2 = call i32 @safe_strtol(ptr noundef nonnull @.str, ptr noundef nonnull %1) #3
%3 = call i32 @assert(i32 noundef %2) #3
%4 = load i32, ptr %1, align 4, !tbaa !5
%5 = icmp eq i32 %4, 123
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 noundef %6) #3
%8 = call i32 @safe_strtol(ptr noundef nonnull @.str.1, ptr noundef nonnull %1) #3
%9 = call i32 @assert(i32 noundef %8) #3
%10 = load i32, ptr %1, align 4, !tbaa !5
%11 = icmp eq i32 %10, 123
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 noundef %12) #3
%14 = call i32 @safe_strtol(ptr noundef nonnull @.str.2, ptr noundef nonnull %1) #3
%15 = call i32 @assert(i32 noundef %14) #3
%16 = load i32, ptr %1, align 4, !tbaa !5
%17 = icmp eq i32 %16, -123
%18 = zext i1 %17 to i32
%19 = call i32 @assert(i32 noundef %18) #3
%20 = call i32 @safe_strtol(ptr noundef nonnull @.str.3, ptr noundef nonnull %1) #3
%21 = icmp eq i32 %20, 0
%22 = zext i1 %21 to i32
%23 = call i32 @assert(i32 noundef %22) #3
%24 = call i32 @safe_strtol(ptr noundef nonnull @.str.4, ptr noundef nonnull %1) #3
%25 = icmp eq i32 %24, 0
%26 = zext i1 %25 to i32
%27 = call i32 @assert(i32 noundef %26) #3
%28 = call i32 @safe_strtol(ptr noundef nonnull @.str.5, ptr noundef nonnull %1) #3
%29 = icmp eq i32 %28, 0
%30 = zext i1 %29 to i32
%31 = call i32 @assert(i32 noundef %30) #3
%32 = call i32 @safe_strtol(ptr noundef nonnull @.str.6, ptr noundef nonnull %1) #3
%33 = icmp eq i32 %32, 0
%34 = zext i1 %33 to i32
%35 = call i32 @assert(i32 noundef %34) #3
%36 = call i32 @safe_strtol(ptr noundef nonnull @.str.7, ptr noundef nonnull %1) #3
%37 = call i32 @assert(i32 noundef %36) #3
%38 = load i32, ptr %1, align 4, !tbaa !5
%39 = icmp eq i32 %38, 2147483647
%40 = zext i1 %39 to i32
%41 = call i32 @assert(i32 noundef %40) #3
%42 = call i32 @safe_strtol(ptr noundef nonnull @.str.8, ptr noundef nonnull %1) #3
%43 = call i32 @assert(i32 noundef %42) #3
%44 = load i32, ptr %1, align 4, !tbaa !5
%45 = icmp eq i32 %44, 123
%46 = zext i1 %45 to i32
%47 = call i32 @assert(i32 noundef %46) #3
%48 = load i32, ptr @TEST_PASS, align 4, !tbaa !5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret i32 %48
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @assert(i32 noundef) local_unnamed_addr #2
declare i32 @safe_strtol(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/memcached/extr_testapp.c_test_safe_strtol.c'
source_filename = "AnghaBench/memcached/extr_testapp.c_test_safe_strtol.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"123\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"+123\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"-123\00", align 1
@.str.3 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.4 = private unnamed_addr constant [9 x i8] c"123BOGUS\00", align 1
@.str.5 = private unnamed_addr constant [27 x i8] c"92837498237498237498029383\00", align 1
@.str.6 = private unnamed_addr constant [10 x i8] c" issue221\00", align 1
@.str.7 = private unnamed_addr constant [11 x i8] c"2147483647\00", align 1
@.str.8 = private unnamed_addr constant [9 x i8] c" 123 foo\00", align 1
@TEST_PASS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @test_safe_strtol], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @test_safe_strtol() #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%2 = call i32 @safe_strtol(ptr noundef nonnull @.str, ptr noundef nonnull %1) #3
%3 = call i32 @assert(i32 noundef %2) #3
%4 = load i32, ptr %1, align 4, !tbaa !6
%5 = icmp eq i32 %4, 123
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 noundef %6) #3
%8 = call i32 @safe_strtol(ptr noundef nonnull @.str.1, ptr noundef nonnull %1) #3
%9 = call i32 @assert(i32 noundef %8) #3
%10 = load i32, ptr %1, align 4, !tbaa !6
%11 = icmp eq i32 %10, 123
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 noundef %12) #3
%14 = call i32 @safe_strtol(ptr noundef nonnull @.str.2, ptr noundef nonnull %1) #3
%15 = call i32 @assert(i32 noundef %14) #3
%16 = load i32, ptr %1, align 4, !tbaa !6
%17 = icmp eq i32 %16, -123
%18 = zext i1 %17 to i32
%19 = call i32 @assert(i32 noundef %18) #3
%20 = call i32 @safe_strtol(ptr noundef nonnull @.str.3, ptr noundef nonnull %1) #3
%21 = icmp eq i32 %20, 0
%22 = zext i1 %21 to i32
%23 = call i32 @assert(i32 noundef %22) #3
%24 = call i32 @safe_strtol(ptr noundef nonnull @.str.4, ptr noundef nonnull %1) #3
%25 = icmp eq i32 %24, 0
%26 = zext i1 %25 to i32
%27 = call i32 @assert(i32 noundef %26) #3
%28 = call i32 @safe_strtol(ptr noundef nonnull @.str.5, ptr noundef nonnull %1) #3
%29 = icmp eq i32 %28, 0
%30 = zext i1 %29 to i32
%31 = call i32 @assert(i32 noundef %30) #3
%32 = call i32 @safe_strtol(ptr noundef nonnull @.str.6, ptr noundef nonnull %1) #3
%33 = icmp eq i32 %32, 0
%34 = zext i1 %33 to i32
%35 = call i32 @assert(i32 noundef %34) #3
%36 = call i32 @safe_strtol(ptr noundef nonnull @.str.7, ptr noundef nonnull %1) #3
%37 = call i32 @assert(i32 noundef %36) #3
%38 = load i32, ptr %1, align 4, !tbaa !6
%39 = icmp eq i32 %38, 2147483647
%40 = zext i1 %39 to i32
%41 = call i32 @assert(i32 noundef %40) #3
%42 = call i32 @safe_strtol(ptr noundef nonnull @.str.8, ptr noundef nonnull %1) #3
%43 = call i32 @assert(i32 noundef %42) #3
%44 = load i32, ptr %1, align 4, !tbaa !6
%45 = icmp eq i32 %44, 123
%46 = zext i1 %45 to i32
%47 = call i32 @assert(i32 noundef %46) #3
%48 = load i32, ptr @TEST_PASS, align 4, !tbaa !6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret i32 %48
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @assert(i32 noundef) local_unnamed_addr #2
declare i32 @safe_strtol(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
memcached_extr_testapp.c_test_safe_strtol
|
; ModuleID = 'AnghaBench/vlc/modules/control/extr_rc.c_PlayerChapterNext.c'
source_filename = "AnghaBench/vlc/modules/control/extr_rc.c_PlayerChapterNext.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@vlc_player_SelectNextChapter = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @PlayerChapterNext], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @PlayerChapterNext(ptr noundef %0) #0 {
%2 = load i32, ptr @vlc_player_SelectNextChapter, align 4, !tbaa !5
%3 = tail call i32 @PlayerDoVoid(ptr noundef %0, i32 noundef %2) #2
ret void
}
declare i32 @PlayerDoVoid(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/vlc/modules/control/extr_rc.c_PlayerChapterNext.c'
source_filename = "AnghaBench/vlc/modules/control/extr_rc.c_PlayerChapterNext.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@vlc_player_SelectNextChapter = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @PlayerChapterNext], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @PlayerChapterNext(ptr noundef %0) #0 {
%2 = load i32, ptr @vlc_player_SelectNextChapter, align 4, !tbaa !6
%3 = tail call i32 @PlayerDoVoid(ptr noundef %0, i32 noundef %2) #2
ret void
}
declare i32 @PlayerDoVoid(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
vlc_modules_control_extr_rc.c_PlayerChapterNext
|
; ModuleID = 'AnghaBench/linux/drivers/media/i2c/extr_s5k6aa.c_s5k6aa_g_frame_interval.c'
source_filename = "AnghaBench/linux/drivers/media/i2c/extr_s5k6aa.c_s5k6aa_g_frame_interval.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.s5k6aa = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @s5k6aa_g_frame_interval], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @s5k6aa_g_frame_interval(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = tail call ptr @to_s5k6aa(ptr noundef %0) #2
%4 = tail call i32 @mutex_lock(ptr noundef %3) #2
%5 = getelementptr inbounds %struct.s5k6aa, ptr %3, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = load i32, ptr %6, align 4, !tbaa !11
store i32 %7, ptr %1, align 4, !tbaa !13
%8 = tail call i32 @mutex_unlock(ptr noundef %3) #2
ret i32 0
}
declare ptr @to_s5k6aa(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"s5k6aa", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"TYPE_2__", !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"v4l2_subdev_frame_interval", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/media/i2c/extr_s5k6aa.c_s5k6aa_g_frame_interval.c'
source_filename = "AnghaBench/linux/drivers/media/i2c/extr_s5k6aa.c_s5k6aa_g_frame_interval.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @s5k6aa_g_frame_interval], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @s5k6aa_g_frame_interval(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = tail call ptr @to_s5k6aa(ptr noundef %0) #2
%4 = tail call i32 @mutex_lock(ptr noundef %3) #2
%5 = getelementptr inbounds i8, ptr %3, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = load i32, ptr %6, align 4, !tbaa !12
store i32 %7, ptr %1, align 4, !tbaa !14
%8 = tail call i32 @mutex_unlock(ptr noundef %3) #2
ret i32 0
}
declare ptr @to_s5k6aa(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"s5k6aa", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_2__", !8, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"v4l2_subdev_frame_interval", !8, i64 0}
|
linux_drivers_media_i2c_extr_s5k6aa.c_s5k6aa_g_frame_interval
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/extr_cnic.c_cnic_free_uio.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/extr_cnic.c_cnic_free_uio.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@cnic_dev_lock = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cnic_free_uio], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @cnic_free_uio(ptr noundef %0) #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i32 @write_lock(ptr noundef nonnull @cnic_dev_lock) #2
%5 = tail call i32 @list_del_init(ptr noundef nonnull %0) #2
%6 = tail call i32 @write_unlock(ptr noundef nonnull @cnic_dev_lock) #2
%7 = tail call i32 @__cnic_free_uio(ptr noundef nonnull %0) #2
br label %8
8: ; preds = %1, %3
ret void
}
declare i32 @write_lock(ptr noundef) local_unnamed_addr #1
declare i32 @list_del_init(ptr noundef) local_unnamed_addr #1
declare i32 @write_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @__cnic_free_uio(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/extr_cnic.c_cnic_free_uio.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/extr_cnic.c_cnic_free_uio.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cnic_dev_lock = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cnic_free_uio], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @cnic_free_uio(ptr noundef %0) #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i32 @write_lock(ptr noundef nonnull @cnic_dev_lock) #2
%5 = tail call i32 @list_del_init(ptr noundef nonnull %0) #2
%6 = tail call i32 @write_unlock(ptr noundef nonnull @cnic_dev_lock) #2
%7 = tail call i32 @__cnic_free_uio(ptr noundef nonnull %0) #2
br label %8
8: ; preds = %1, %3
ret void
}
declare i32 @write_lock(ptr noundef) local_unnamed_addr #1
declare i32 @list_del_init(ptr noundef) local_unnamed_addr #1
declare i32 @write_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @__cnic_free_uio(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_net_ethernet_broadcom_extr_cnic.c_cnic_free_uio
|
; ModuleID = 'AnghaBench/linux/drivers/i2c/busses/extr_i2c-pxa.c_i2c_pxa_slave_stop.c'
source_filename = "AnghaBench/linux/drivers/i2c/busses/extr_i2c-pxa.c_i2c_pxa_slave_stop.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@I2C_RETRY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @i2c_pxa_slave_stop], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @i2c_pxa_slave_stop(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i32, ptr @I2C_RETRY, align 4, !tbaa !10
%6 = tail call i32 @i2c_pxa_master_complete(ptr noundef nonnull %0, i32 noundef %5) #2
br label %7
7: ; preds = %4, %1
ret void
}
declare i32 @i2c_pxa_master_complete(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pxa_i2c", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/i2c/busses/extr_i2c-pxa.c_i2c_pxa_slave_stop.c'
source_filename = "AnghaBench/linux/drivers/i2c/busses/extr_i2c-pxa.c_i2c_pxa_slave_stop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@I2C_RETRY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @i2c_pxa_slave_stop], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @i2c_pxa_slave_stop(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i32, ptr @I2C_RETRY, align 4, !tbaa !11
%6 = tail call i32 @i2c_pxa_master_complete(ptr noundef nonnull %0, i32 noundef %5) #2
br label %7
7: ; preds = %4, %1
ret void
}
declare i32 @i2c_pxa_master_complete(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pxa_i2c", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
|
linux_drivers_i2c_busses_extr_i2c-pxa.c_i2c_pxa_slave_stop
|
; ModuleID = 'AnghaBench/linux/drivers/staging/sm750fb/extr_sm750.c_lynxfb_ops_fillrect.c'
source_filename = "AnghaBench/linux/drivers/staging/sm750fb/extr_sm750.c_lynxfb_ops_fillrect.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fb_info = type { i64, i64, %struct.TYPE_7__, %struct.TYPE_6__, ptr }
%struct.TYPE_7__ = type { i32 }
%struct.TYPE_6__ = type { i32 }
%struct.lynxfb_par = type { %struct.TYPE_5__, ptr }
%struct.TYPE_5__ = type { i32 }
%struct.fb_fillrect = type { i64, i32, i32, i32, i32, i32 }
%struct.sm750_dev = type { i32, %struct.TYPE_8__ }
%struct.TYPE_8__ = type { ptr }
@FBINFO_STATE_RUNNING = dso_local local_unnamed_addr global i64 0, align 8
@ROP_COPY = dso_local local_unnamed_addr global i32 0, align 4
@HW_ROP2_XOR = dso_local local_unnamed_addr global i32 0, align 4
@HW_ROP2_COPY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @lynxfb_ops_fillrect], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @lynxfb_ops_fillrect(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = load i64, ptr @FBINFO_STATE_RUNNING, align 8, !tbaa !14
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %47
6: ; preds = %2
%7 = getelementptr inbounds %struct.fb_info, ptr %0, i64 0, i32 4
%8 = load ptr, ptr %7, align 8, !tbaa !15
%9 = getelementptr inbounds %struct.lynxfb_par, ptr %8, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !16
%11 = load i32, ptr %8, align 8, !tbaa !19
%12 = getelementptr inbounds %struct.fb_info, ptr %0, i64 0, i32 3
%13 = load i32, ptr %12, align 4, !tbaa !20
%14 = getelementptr inbounds %struct.fb_info, ptr %0, i64 0, i32 2
%15 = load i32, ptr %14, align 8, !tbaa !21
%16 = ashr i32 %15, 3
%17 = icmp eq i32 %16, 1
br i1 %17, label %24, label %18
18: ; preds = %6
%19 = getelementptr inbounds %struct.fb_info, ptr %0, i64 0, i32 1
%20 = load i64, ptr %19, align 8, !tbaa !22
%21 = inttoptr i64 %20 to ptr
%22 = load i64, ptr %1, align 8, !tbaa !23
%23 = getelementptr inbounds i64, ptr %21, i64 %22
br label %24
24: ; preds = %6, %18
%25 = phi ptr [ %23, %18 ], [ %1, %6 ]
%26 = load i64, ptr %25, align 8, !tbaa !14
%27 = getelementptr inbounds %struct.fb_fillrect, ptr %1, i64 0, i32 5
%28 = load i32, ptr %27, align 8, !tbaa !25
%29 = load i32, ptr @ROP_COPY, align 4, !tbaa !26
%30 = icmp eq i32 %28, %29
%31 = load i32, ptr @HW_ROP2_XOR, align 4
%32 = load i32, ptr @HW_ROP2_COPY, align 4
%33 = select i1 %30, i32 %32, i32 %31
%34 = tail call i32 @spin_lock(ptr noundef %10) #2
%35 = getelementptr inbounds %struct.sm750_dev, ptr %10, i64 0, i32 1
%36 = load ptr, ptr %35, align 8, !tbaa !27
%37 = getelementptr inbounds %struct.fb_fillrect, ptr %1, i64 0, i32 4
%38 = load i32, ptr %37, align 4, !tbaa !30
%39 = getelementptr inbounds %struct.fb_fillrect, ptr %1, i64 0, i32 3
%40 = load i32, ptr %39, align 8, !tbaa !31
%41 = getelementptr inbounds %struct.fb_fillrect, ptr %1, i64 0, i32 2
%42 = load i32, ptr %41, align 4, !tbaa !32
%43 = getelementptr inbounds %struct.fb_fillrect, ptr %1, i64 0, i32 1
%44 = load i32, ptr %43, align 8, !tbaa !33
%45 = tail call i32 %36(ptr noundef nonnull %35, i32 noundef %11, i32 noundef %13, i32 noundef %16, i32 noundef %38, i32 noundef %40, i32 noundef %42, i32 noundef %44, i64 noundef %26, i32 noundef %33) #2
%46 = tail call i32 @spin_unlock(ptr noundef %10) #2
br label %47
47: ; preds = %2, %24
ret void
}
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"fb_info", !7, i64 0, !7, i64 8, !10, i64 16, !12, i64 20, !13, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_7__", !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!"TYPE_6__", !11, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!6, !13, i64 24}
!16 = !{!17, !13, i64 8}
!17 = !{!"lynxfb_par", !18, i64 0, !13, i64 8}
!18 = !{!"TYPE_5__", !11, i64 0}
!19 = !{!17, !11, i64 0}
!20 = !{!6, !11, i64 20}
!21 = !{!6, !11, i64 16}
!22 = !{!6, !7, i64 8}
!23 = !{!24, !7, i64 0}
!24 = !{!"fb_fillrect", !7, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!25 = !{!24, !11, i64 24}
!26 = !{!11, !11, i64 0}
!27 = !{!28, !13, i64 8}
!28 = !{!"sm750_dev", !11, i64 0, !29, i64 8}
!29 = !{!"TYPE_8__", !13, i64 0}
!30 = !{!24, !11, i64 20}
!31 = !{!24, !11, i64 16}
!32 = !{!24, !11, i64 12}
!33 = !{!24, !11, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/sm750fb/extr_sm750.c_lynxfb_ops_fillrect.c'
source_filename = "AnghaBench/linux/drivers/staging/sm750fb/extr_sm750.c_lynxfb_ops_fillrect.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FBINFO_STATE_RUNNING = common local_unnamed_addr global i64 0, align 8
@ROP_COPY = common local_unnamed_addr global i32 0, align 4
@HW_ROP2_XOR = common local_unnamed_addr global i32 0, align 4
@HW_ROP2_COPY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @lynxfb_ops_fillrect], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @lynxfb_ops_fillrect(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = load i64, ptr @FBINFO_STATE_RUNNING, align 8, !tbaa !15
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %47
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %0, i64 24
%8 = load ptr, ptr %7, align 8, !tbaa !16
%9 = getelementptr inbounds i8, ptr %8, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !17
%11 = load i32, ptr %8, align 8, !tbaa !20
%12 = getelementptr inbounds i8, ptr %0, i64 20
%13 = load i32, ptr %12, align 4, !tbaa !21
%14 = getelementptr inbounds i8, ptr %0, i64 16
%15 = load i32, ptr %14, align 8, !tbaa !22
%16 = ashr i32 %15, 3
%17 = icmp eq i32 %16, 1
br i1 %17, label %24, label %18
18: ; preds = %6
%19 = getelementptr inbounds i8, ptr %0, i64 8
%20 = load i64, ptr %19, align 8, !tbaa !23
%21 = inttoptr i64 %20 to ptr
%22 = load i64, ptr %1, align 8, !tbaa !24
%23 = getelementptr inbounds i64, ptr %21, i64 %22
br label %24
24: ; preds = %6, %18
%25 = phi ptr [ %23, %18 ], [ %1, %6 ]
%26 = load i64, ptr %25, align 8, !tbaa !15
%27 = getelementptr inbounds i8, ptr %1, i64 24
%28 = load i32, ptr %27, align 8, !tbaa !26
%29 = load i32, ptr @ROP_COPY, align 4, !tbaa !27
%30 = icmp eq i32 %28, %29
%31 = load i32, ptr @HW_ROP2_XOR, align 4
%32 = load i32, ptr @HW_ROP2_COPY, align 4
%33 = select i1 %30, i32 %32, i32 %31
%34 = tail call i32 @spin_lock(ptr noundef %10) #2
%35 = getelementptr inbounds i8, ptr %10, i64 8
%36 = load ptr, ptr %35, align 8, !tbaa !28
%37 = getelementptr inbounds i8, ptr %1, i64 20
%38 = load i32, ptr %37, align 4, !tbaa !31
%39 = getelementptr inbounds i8, ptr %1, i64 16
%40 = load i32, ptr %39, align 8, !tbaa !32
%41 = getelementptr inbounds i8, ptr %1, i64 12
%42 = load i32, ptr %41, align 4, !tbaa !33
%43 = getelementptr inbounds i8, ptr %1, i64 8
%44 = load i32, ptr %43, align 8, !tbaa !34
%45 = tail call i32 %36(ptr noundef nonnull %35, i32 noundef %11, i32 noundef %13, i32 noundef %16, i32 noundef %38, i32 noundef %40, i32 noundef %42, i32 noundef %44, i64 noundef %26, i32 noundef %33) #2
%46 = tail call i32 @spin_unlock(ptr noundef %10) #2
br label %47
47: ; preds = %2, %24
ret void
}
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"fb_info", !8, i64 0, !8, i64 8, !11, i64 16, !13, i64 20, !14, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_7__", !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!"TYPE_6__", !12, i64 0}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!7, !14, i64 24}
!17 = !{!18, !14, i64 8}
!18 = !{!"lynxfb_par", !19, i64 0, !14, i64 8}
!19 = !{!"TYPE_5__", !12, i64 0}
!20 = !{!18, !12, i64 0}
!21 = !{!7, !12, i64 20}
!22 = !{!7, !12, i64 16}
!23 = !{!7, !8, i64 8}
!24 = !{!25, !8, i64 0}
!25 = !{!"fb_fillrect", !8, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24}
!26 = !{!25, !12, i64 24}
!27 = !{!12, !12, i64 0}
!28 = !{!29, !14, i64 8}
!29 = !{!"sm750_dev", !12, i64 0, !30, i64 8}
!30 = !{!"TYPE_8__", !14, i64 0}
!31 = !{!25, !12, i64 20}
!32 = !{!25, !12, i64 16}
!33 = !{!25, !12, i64 12}
!34 = !{!25, !12, i64 8}
|
linux_drivers_staging_sm750fb_extr_sm750.c_lynxfb_ops_fillrect
|
; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_mlme_ext.c_sitesurvey_cmd_hdl.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_mlme_ext.c_sitesurvey_cmd_hdl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i64, i32, i32, i32, ptr, i64, i64 }
%struct.sitesurvey_parm = type { i32, i32, i32, ptr }
%struct.TYPE_4__ = type { i64, i32 }
%struct.TYPE_5__ = type { i64, i32 }
@SCAN_DISABLE = dso_local local_unnamed_addr global i64 0, align 8
@SCAN_START = dso_local local_unnamed_addr global i64 0, align 8
@RTW_SSID_SCAN_AMOUNT = dso_local local_unnamed_addr global i64 0, align 8
@IW_ESSID_MAX_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@RTW_CHANNEL_SCAN_AMOUNT = dso_local local_unnamed_addr global i32 0, align 4
@SCAN_TXNULL = dso_local local_unnamed_addr global i64 0, align 8
@H2C_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
@DYNAMIC_FUNC_DISABLE = dso_local local_unnamed_addr global i32 0, align 4
@HW_VAR_INITIAL_GAIN = dso_local local_unnamed_addr global i32 0, align 4
@_HW_STATE_NOLINK_ = dso_local local_unnamed_addr global i32 0, align 4
@HW_VAR_MLME_SITESURVEY = dso_local local_unnamed_addr global i32 0, align 4
@SCAN_PROCESS = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @sitesurvey_cmd_hdl(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
%5 = load i64, ptr %0, align 8, !tbaa !5
%6 = load i64, ptr @SCAN_DISABLE, align 8, !tbaa !13
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %63
8: ; preds = %2
%9 = load i64, ptr @SCAN_START, align 8, !tbaa !13
store i64 %9, ptr %0, align 8, !tbaa !5
%10 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 5
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %10, i8 0, i64 16, i1 false)
%11 = load i64, ptr @RTW_SSID_SCAN_AMOUNT, align 8, !tbaa !13
%12 = icmp eq i64 %11, 0
br i1 %12, label %43, label %13
13: ; preds = %8
%14 = getelementptr inbounds %struct.sitesurvey_parm, ptr %1, i64 0, i32 3
%15 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 4
%16 = load ptr, ptr %14, align 8, !tbaa !14
br label %17
17: ; preds = %13, %35
%18 = phi ptr [ %16, %13 ], [ %38, %35 ]
%19 = phi i64 [ 0, %13 ], [ %40, %35 ]
%20 = getelementptr inbounds %struct.TYPE_4__, ptr %18, i64 %19
%21 = load i64, ptr %20, align 8, !tbaa !16
%22 = icmp eq i64 %21, 0
%23 = load ptr, ptr %15, align 8, !tbaa !18
br i1 %22, label %35, label %24
24: ; preds = %17
%25 = getelementptr inbounds %struct.TYPE_5__, ptr %23, i64 %19, i32 1
%26 = load i32, ptr %25, align 8, !tbaa !19
%27 = getelementptr inbounds %struct.TYPE_4__, ptr %18, i64 %19, i32 1
%28 = load i32, ptr %27, align 8, !tbaa !21
%29 = load i32, ptr @IW_ESSID_MAX_SIZE, align 4, !tbaa !22
%30 = tail call i32 @memcpy(i32 noundef %26, i32 noundef %28, i32 noundef %29) #4
%31 = load ptr, ptr %14, align 8, !tbaa !14
%32 = getelementptr inbounds %struct.TYPE_4__, ptr %31, i64 %19
%33 = load i64, ptr %32, align 8, !tbaa !16
%34 = load ptr, ptr %15, align 8, !tbaa !18
br label %35
35: ; preds = %17, %24
%36 = phi ptr [ %34, %24 ], [ %23, %17 ]
%37 = phi i64 [ %33, %24 ], [ 0, %17 ]
%38 = phi ptr [ %31, %24 ], [ %18, %17 ]
%39 = getelementptr inbounds %struct.TYPE_5__, ptr %36, i64 %19
store i64 %37, ptr %39, align 8, !tbaa !23
%40 = add nuw i64 %19, 1
%41 = load i64, ptr @RTW_SSID_SCAN_AMOUNT, align 8, !tbaa !13
%42 = icmp ult i64 %40, %41
br i1 %42, label %17, label %43, !llvm.loop !24
43: ; preds = %35, %8
%44 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 2
%45 = load i32, ptr %44, align 4, !tbaa !26
%46 = load i32, ptr @RTW_CHANNEL_SCAN_AMOUNT, align 4, !tbaa !22
%47 = getelementptr inbounds %struct.sitesurvey_parm, ptr %1, i64 0, i32 2
%48 = load i32, ptr %47, align 8, !tbaa !27
%49 = getelementptr inbounds %struct.sitesurvey_parm, ptr %1, i64 0, i32 1
%50 = load i32, ptr %49, align 4, !tbaa !28
%51 = tail call i32 @rtw_scan_ch_decision(ptr noundef nonnull %0, i32 noundef %45, i32 noundef %46, i32 noundef %48, i32 noundef %50) #4
%52 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 3
store i32 %51, ptr %52, align 8, !tbaa !29
%53 = load i32, ptr %1, align 8, !tbaa !30
%54 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
store i32 %53, ptr %54, align 8, !tbaa !31
%55 = tail call i64 @is_client_associated_to_ap(ptr noundef nonnull %0) #4
%56 = icmp eq i64 %55, 0
br i1 %56, label %57, label %59
57: ; preds = %43
%58 = load i64, ptr %0, align 8, !tbaa !5
br label %63
59: ; preds = %43
%60 = load i64, ptr @SCAN_TXNULL, align 8, !tbaa !13
store i64 %60, ptr %0, align 8, !tbaa !5
%61 = tail call i32 @issue_nulldata(ptr noundef nonnull %0, ptr noundef null, i32 noundef 1, i32 noundef 3, i32 noundef 500) #4
%62 = tail call i32 @set_survey_timer(ptr noundef nonnull %0, i32 noundef 50) #4
br label %83
63: ; preds = %57, %2
%64 = phi i64 [ %58, %57 ], [ %5, %2 ]
%65 = load i64, ptr @SCAN_START, align 8, !tbaa !13
%66 = icmp eq i64 %64, %65
%67 = load i64, ptr @SCAN_TXNULL, align 8
%68 = icmp eq i64 %64, %67
%69 = select i1 %66, i1 true, i1 %68
br i1 %69, label %70, label %81
70: ; preds = %63
%71 = tail call i32 @Save_DM_Func_Flag(ptr noundef nonnull %0) #4
%72 = load i32, ptr @DYNAMIC_FUNC_DISABLE, align 4, !tbaa !22
%73 = tail call i32 @Switch_DM_Func(ptr noundef nonnull %0, i32 noundef %72, i32 noundef 0) #4
store i64 30, ptr %4, align 8, !tbaa !13
%74 = load i32, ptr @HW_VAR_INITIAL_GAIN, align 4, !tbaa !22
%75 = call i32 @rtw_hal_set_hwreg(ptr noundef nonnull %0, i32 noundef %74, ptr noundef nonnull %4) #4
%76 = load i32, ptr @_HW_STATE_NOLINK_, align 4, !tbaa !22
%77 = call i32 @Set_MSR(ptr noundef nonnull %0, i32 noundef %76) #4
store i32 1, ptr %3, align 4, !tbaa !22
%78 = load i32, ptr @HW_VAR_MLME_SITESURVEY, align 4, !tbaa !22
%79 = call i32 @rtw_hal_set_hwreg(ptr noundef nonnull %0, i32 noundef %78, ptr noundef nonnull %3) #4
%80 = load i64, ptr @SCAN_PROCESS, align 8, !tbaa !13
store i64 %80, ptr %0, align 8, !tbaa !5
br label %81
81: ; preds = %63, %70
%82 = call i32 @site_survey(ptr noundef nonnull %0) #4
br label %83
83: ; preds = %81, %59
%84 = load i32, ptr @H2C_SUCCESS, align 4, !tbaa !22
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
ret i32 %84
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @rtw_scan_ch_decision(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @is_client_associated_to_ap(ptr noundef) local_unnamed_addr #2
declare i32 @issue_nulldata(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @set_survey_timer(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @Save_DM_Func_Flag(ptr noundef) local_unnamed_addr #2
declare i32 @Switch_DM_Func(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @rtw_hal_set_hwreg(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @Set_MSR(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @site_survey(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"mlme_ext_priv", !7, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !12, i64 24, !8, i64 32, !8, i64 40}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !12, i64 16}
!15 = !{!"sitesurvey_parm", !11, i64 0, !11, i64 4, !11, i64 8, !12, i64 16}
!16 = !{!17, !8, i64 0}
!17 = !{!"TYPE_4__", !8, i64 0, !11, i64 8}
!18 = !{!6, !12, i64 24}
!19 = !{!20, !11, i64 8}
!20 = !{!"TYPE_5__", !8, i64 0, !11, i64 8}
!21 = !{!17, !11, i64 8}
!22 = !{!11, !11, i64 0}
!23 = !{!20, !8, i64 0}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
!26 = !{!6, !11, i64 12}
!27 = !{!15, !11, i64 8}
!28 = !{!15, !11, i64 4}
!29 = !{!6, !11, i64 16}
!30 = !{!15, !11, i64 0}
!31 = !{!6, !11, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_mlme_ext.c_sitesurvey_cmd_hdl.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_mlme_ext.c_sitesurvey_cmd_hdl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i64, i32 }
%struct.TYPE_5__ = type { i64, i32 }
@SCAN_DISABLE = common local_unnamed_addr global i64 0, align 8
@SCAN_START = common local_unnamed_addr global i64 0, align 8
@RTW_SSID_SCAN_AMOUNT = common local_unnamed_addr global i64 0, align 8
@IW_ESSID_MAX_SIZE = common local_unnamed_addr global i32 0, align 4
@RTW_CHANNEL_SCAN_AMOUNT = common local_unnamed_addr global i32 0, align 4
@SCAN_TXNULL = common local_unnamed_addr global i64 0, align 8
@H2C_SUCCESS = common local_unnamed_addr global i32 0, align 4
@DYNAMIC_FUNC_DISABLE = common local_unnamed_addr global i32 0, align 4
@HW_VAR_INITIAL_GAIN = common local_unnamed_addr global i32 0, align 4
@_HW_STATE_NOLINK_ = common local_unnamed_addr global i32 0, align 4
@HW_VAR_MLME_SITESURVEY = common local_unnamed_addr global i32 0, align 4
@SCAN_PROCESS = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @sitesurvey_cmd_hdl(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
%5 = load i64, ptr %0, align 8, !tbaa !6
%6 = load i64, ptr @SCAN_DISABLE, align 8, !tbaa !14
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %63
8: ; preds = %2
%9 = load i64, ptr @SCAN_START, align 8, !tbaa !14
store i64 %9, ptr %0, align 8, !tbaa !6
%10 = getelementptr inbounds i8, ptr %0, i64 32
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %10, i8 0, i64 16, i1 false)
%11 = load i64, ptr @RTW_SSID_SCAN_AMOUNT, align 8, !tbaa !14
%12 = icmp eq i64 %11, 0
br i1 %12, label %43, label %13
13: ; preds = %8
%14 = getelementptr inbounds i8, ptr %1, i64 16
%15 = getelementptr inbounds i8, ptr %0, i64 24
%16 = load ptr, ptr %14, align 8, !tbaa !15
br label %17
17: ; preds = %13, %35
%18 = phi ptr [ %16, %13 ], [ %38, %35 ]
%19 = phi i64 [ 0, %13 ], [ %40, %35 ]
%20 = getelementptr inbounds %struct.TYPE_4__, ptr %18, i64 %19
%21 = load i64, ptr %20, align 8, !tbaa !17
%22 = icmp eq i64 %21, 0
%23 = load ptr, ptr %15, align 8, !tbaa !19
br i1 %22, label %35, label %24
24: ; preds = %17
%25 = getelementptr inbounds %struct.TYPE_5__, ptr %23, i64 %19, i32 1
%26 = load i32, ptr %25, align 8, !tbaa !20
%27 = getelementptr inbounds i8, ptr %20, i64 8
%28 = load i32, ptr %27, align 8, !tbaa !22
%29 = load i32, ptr @IW_ESSID_MAX_SIZE, align 4, !tbaa !23
%30 = tail call i32 @memcpy(i32 noundef %26, i32 noundef %28, i32 noundef %29) #4
%31 = load ptr, ptr %14, align 8, !tbaa !15
%32 = getelementptr inbounds %struct.TYPE_4__, ptr %31, i64 %19
%33 = load i64, ptr %32, align 8, !tbaa !17
%34 = load ptr, ptr %15, align 8, !tbaa !19
br label %35
35: ; preds = %17, %24
%36 = phi ptr [ %34, %24 ], [ %23, %17 ]
%37 = phi i64 [ %33, %24 ], [ 0, %17 ]
%38 = phi ptr [ %31, %24 ], [ %18, %17 ]
%39 = getelementptr inbounds %struct.TYPE_5__, ptr %36, i64 %19
store i64 %37, ptr %39, align 8, !tbaa !24
%40 = add nuw i64 %19, 1
%41 = load i64, ptr @RTW_SSID_SCAN_AMOUNT, align 8, !tbaa !14
%42 = icmp ult i64 %40, %41
br i1 %42, label %17, label %43, !llvm.loop !25
43: ; preds = %35, %8
%44 = getelementptr inbounds i8, ptr %0, i64 12
%45 = load i32, ptr %44, align 4, !tbaa !27
%46 = load i32, ptr @RTW_CHANNEL_SCAN_AMOUNT, align 4, !tbaa !23
%47 = getelementptr inbounds i8, ptr %1, i64 8
%48 = load i32, ptr %47, align 8, !tbaa !28
%49 = getelementptr inbounds i8, ptr %1, i64 4
%50 = load i32, ptr %49, align 4, !tbaa !29
%51 = tail call i32 @rtw_scan_ch_decision(ptr noundef nonnull %0, i32 noundef %45, i32 noundef %46, i32 noundef %48, i32 noundef %50) #4
%52 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %51, ptr %52, align 8, !tbaa !30
%53 = load i32, ptr %1, align 8, !tbaa !31
%54 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %53, ptr %54, align 8, !tbaa !32
%55 = tail call i64 @is_client_associated_to_ap(ptr noundef nonnull %0) #4
%56 = icmp eq i64 %55, 0
br i1 %56, label %57, label %59
57: ; preds = %43
%58 = load i64, ptr %0, align 8, !tbaa !6
br label %63
59: ; preds = %43
%60 = load i64, ptr @SCAN_TXNULL, align 8, !tbaa !14
store i64 %60, ptr %0, align 8, !tbaa !6
%61 = tail call i32 @issue_nulldata(ptr noundef nonnull %0, ptr noundef null, i32 noundef 1, i32 noundef 3, i32 noundef 500) #4
%62 = tail call i32 @set_survey_timer(ptr noundef nonnull %0, i32 noundef 50) #4
br label %83
63: ; preds = %57, %2
%64 = phi i64 [ %58, %57 ], [ %5, %2 ]
%65 = load i64, ptr @SCAN_START, align 8, !tbaa !14
%66 = icmp eq i64 %64, %65
%67 = load i64, ptr @SCAN_TXNULL, align 8
%68 = icmp eq i64 %64, %67
%69 = select i1 %66, i1 true, i1 %68
br i1 %69, label %70, label %81
70: ; preds = %63
%71 = tail call i32 @Save_DM_Func_Flag(ptr noundef nonnull %0) #4
%72 = load i32, ptr @DYNAMIC_FUNC_DISABLE, align 4, !tbaa !23
%73 = tail call i32 @Switch_DM_Func(ptr noundef nonnull %0, i32 noundef %72, i32 noundef 0) #4
store i64 30, ptr %4, align 8, !tbaa !14
%74 = load i32, ptr @HW_VAR_INITIAL_GAIN, align 4, !tbaa !23
%75 = call i32 @rtw_hal_set_hwreg(ptr noundef nonnull %0, i32 noundef %74, ptr noundef nonnull %4) #4
%76 = load i32, ptr @_HW_STATE_NOLINK_, align 4, !tbaa !23
%77 = call i32 @Set_MSR(ptr noundef nonnull %0, i32 noundef %76) #4
store i32 1, ptr %3, align 4, !tbaa !23
%78 = load i32, ptr @HW_VAR_MLME_SITESURVEY, align 4, !tbaa !23
%79 = call i32 @rtw_hal_set_hwreg(ptr noundef nonnull %0, i32 noundef %78, ptr noundef nonnull %3) #4
%80 = load i64, ptr @SCAN_PROCESS, align 8, !tbaa !14
store i64 %80, ptr %0, align 8, !tbaa !6
br label %81
81: ; preds = %63, %70
%82 = call i32 @site_survey(ptr noundef nonnull %0) #4
br label %83
83: ; preds = %81, %59
%84 = load i32, ptr @H2C_SUCCESS, align 4, !tbaa !23
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
ret i32 %84
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @rtw_scan_ch_decision(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @is_client_associated_to_ap(ptr noundef) local_unnamed_addr #2
declare i32 @issue_nulldata(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @set_survey_timer(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @Save_DM_Func_Flag(ptr noundef) local_unnamed_addr #2
declare i32 @Switch_DM_Func(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @rtw_hal_set_hwreg(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @Set_MSR(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @site_survey(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"mlme_ext_priv", !8, i64 0}
!8 = !{!"TYPE_6__", !9, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !13, i64 24, !9, i64 32, !9, i64 40}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"int", !10, i64 0}
!13 = !{!"any pointer", !10, i64 0}
!14 = !{!9, !9, i64 0}
!15 = !{!16, !13, i64 16}
!16 = !{!"sitesurvey_parm", !12, i64 0, !12, i64 4, !12, i64 8, !13, i64 16}
!17 = !{!18, !9, i64 0}
!18 = !{!"TYPE_4__", !9, i64 0, !12, i64 8}
!19 = !{!7, !13, i64 24}
!20 = !{!21, !12, i64 8}
!21 = !{!"TYPE_5__", !9, i64 0, !12, i64 8}
!22 = !{!18, !12, i64 8}
!23 = !{!12, !12, i64 0}
!24 = !{!21, !9, i64 0}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = !{!7, !12, i64 12}
!28 = !{!16, !12, i64 8}
!29 = !{!16, !12, i64 4}
!30 = !{!7, !12, i64 16}
!31 = !{!16, !12, i64 0}
!32 = !{!7, !12, i64 8}
|
linux_drivers_staging_rtl8723bs_core_extr_rtw_mlme_ext.c_sitesurvey_cmd_hdl
|
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/containers/simple/extr_simple_reader.c_simple_convert_packet_flags.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/containers/simple/extr_simple_reader.c_simple_convert_packet_flags.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.convert_from_t = type { i32, i32 }
@VC_CONTAINER_PACKET_FLAG_FRAME_START = dso_local local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_PACKET_FLAG_FRAME_END = dso_local local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_PACKET_FLAG_KEYFRAME = dso_local local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_PACKET_FLAG_DISCONTINUITY = dso_local local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_PACKET_FLAG_CONFIG = dso_local local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_PACKET_FLAG_ENCRYPTED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @simple_convert_packet_flags], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define internal i32 @simple_convert_packet_flags(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = alloca [7 x %struct.convert_from_t], align 16
%5 = alloca [4 x %struct.convert_from_t], align 16
call void @llvm.lifetime.start.p0(i64 56, ptr nonnull %4) #2
store i32 2, ptr %4, align 16, !tbaa !5
%6 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 0, i32 1
%7 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_FRAME_START, align 4, !tbaa !10
store i32 %7, ptr %6, align 4, !tbaa !11
%8 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 1
store i32 4, ptr %8, align 8, !tbaa !5
%9 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 1, i32 1
%10 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_FRAME_END, align 4, !tbaa !10
store i32 %10, ptr %9, align 4, !tbaa !11
%11 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 2
store i32 8, ptr %11, align 16, !tbaa !5
%12 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 2, i32 1
%13 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_KEYFRAME, align 4, !tbaa !10
store i32 %13, ptr %12, align 4, !tbaa !11
%14 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 3
store i32 16, ptr %14, align 8, !tbaa !5
%15 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 3, i32 1
%16 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_DISCONTINUITY, align 4, !tbaa !10
store i32 %16, ptr %15, align 4, !tbaa !11
%17 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 4
store i32 32, ptr %17, align 16, !tbaa !5
%18 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 4, i32 1
%19 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_CONFIG, align 4, !tbaa !10
store i32 %19, ptr %18, align 4, !tbaa !11
%20 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 5
store i32 64, ptr %20, align 8, !tbaa !5
%21 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 5, i32 1
%22 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_ENCRYPTED, align 4, !tbaa !10
store i32 %22, ptr %21, align 4, !tbaa !11
%23 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 6
store i32 0, ptr %23, align 16, !tbaa !5
%24 = getelementptr inbounds %struct.convert_from_t, ptr %4, i64 6, i32 1
store i32 0, ptr %24, align 4, !tbaa !11
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %5) #2
store i32 16, ptr %5, align 16, !tbaa !5
%25 = getelementptr inbounds %struct.convert_from_t, ptr %5, i64 0, i32 1
store i32 %10, ptr %25, align 4, !tbaa !11
%26 = getelementptr inbounds %struct.convert_from_t, ptr %5, i64 1
store i32 32, ptr %26, align 8, !tbaa !5
%27 = getelementptr inbounds %struct.convert_from_t, ptr %5, i64 1, i32 1
store i32 %13, ptr %27, align 4, !tbaa !11
%28 = getelementptr inbounds %struct.convert_from_t, ptr %5, i64 2
store i32 128, ptr %28, align 16, !tbaa !5
%29 = getelementptr inbounds %struct.convert_from_t, ptr %5, i64 2, i32 1
store i32 %19, ptr %29, align 4, !tbaa !11
%30 = getelementptr inbounds %struct.convert_from_t, ptr %5, i64 3
store i32 0, ptr %30, align 8, !tbaa !5
%31 = getelementptr inbounds %struct.convert_from_t, ptr %5, i64 3, i32 1
store i32 0, ptr %31, align 4, !tbaa !11
%32 = load ptr, ptr %0, align 8, !tbaa !12
%33 = zext i32 %1 to i64
%34 = getelementptr inbounds ptr, ptr %32, i64 %33
%35 = load ptr, ptr %34, align 8, !tbaa !15
%36 = load ptr, ptr %35, align 8, !tbaa !16
%37 = load ptr, ptr %36, align 8, !tbaa !18
%38 = load i32, ptr %37, align 4, !tbaa !20
switch i32 %38, label %59 [
i32 129, label %40
i32 128, label %39
]
39: ; preds = %3
br label %40
40: ; preds = %39, %3
%41 = phi i32 [ 16, %39 ], [ 2, %3 ]
%42 = phi ptr [ %5, %39 ], [ %4, %3 ]
br label %43
43: ; preds = %40, %53
%44 = phi i64 [ 0, %40 ], [ %55, %53 ]
%45 = phi i32 [ %41, %40 ], [ %57, %53 ]
%46 = phi i32 [ 0, %40 ], [ %54, %53 ]
%47 = and i32 %45, %2
%48 = icmp eq i32 %47, 0
br i1 %48, label %53, label %49
49: ; preds = %43
%50 = getelementptr inbounds %struct.convert_from_t, ptr %42, i64 %44, i32 1
%51 = load i32, ptr %50, align 4, !tbaa !11
%52 = or i32 %51, %46
br label %53
53: ; preds = %43, %49
%54 = phi i32 [ %52, %49 ], [ %46, %43 ]
%55 = add nuw nsw i64 %44, 1
%56 = getelementptr inbounds %struct.convert_from_t, ptr %42, i64 %55
%57 = load i32, ptr %56, align 8, !tbaa !5
%58 = icmp eq i32 %57, 0
br i1 %58, label %59, label %43, !llvm.loop !22
59: ; preds = %53, %3
%60 = phi i32 [ %2, %3 ], [ %54, %53 ]
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #2
call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %4) #2
ret i32 %60
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_9__", !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!17, !14, i64 0}
!17 = !{!"TYPE_8__", !14, i64 0}
!18 = !{!19, !14, i64 0}
!19 = !{!"TYPE_7__", !14, i64 0}
!20 = !{!21, !7, i64 0}
!21 = !{!"TYPE_6__", !7, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/containers/simple/extr_simple_reader.c_simple_convert_packet_flags.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/containers/simple/extr_simple_reader.c_simple_convert_packet_flags.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.convert_from_t = type { i32, i32 }
@VC_CONTAINER_PACKET_FLAG_FRAME_START = common local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_PACKET_FLAG_FRAME_END = common local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_PACKET_FLAG_KEYFRAME = common local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_PACKET_FLAG_DISCONTINUITY = common local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_PACKET_FLAG_CONFIG = common local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_PACKET_FLAG_ENCRYPTED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @simple_convert_packet_flags], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @simple_convert_packet_flags(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = alloca [7 x %struct.convert_from_t], align 4
%5 = alloca [4 x %struct.convert_from_t], align 4
call void @llvm.lifetime.start.p0(i64 56, ptr nonnull %4) #2
store i32 2, ptr %4, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %4, i64 4
%7 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_FRAME_START, align 4, !tbaa !11
store i32 %7, ptr %6, align 4, !tbaa !12
%8 = getelementptr inbounds i8, ptr %4, i64 8
store i32 4, ptr %8, align 4, !tbaa !6
%9 = getelementptr inbounds i8, ptr %4, i64 12
%10 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_FRAME_END, align 4, !tbaa !11
store i32 %10, ptr %9, align 4, !tbaa !12
%11 = getelementptr inbounds i8, ptr %4, i64 16
store i32 8, ptr %11, align 4, !tbaa !6
%12 = getelementptr inbounds i8, ptr %4, i64 20
%13 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_KEYFRAME, align 4, !tbaa !11
store i32 %13, ptr %12, align 4, !tbaa !12
%14 = getelementptr inbounds i8, ptr %4, i64 24
store i32 16, ptr %14, align 4, !tbaa !6
%15 = getelementptr inbounds i8, ptr %4, i64 28
%16 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_DISCONTINUITY, align 4, !tbaa !11
store i32 %16, ptr %15, align 4, !tbaa !12
%17 = getelementptr inbounds i8, ptr %4, i64 32
store i32 32, ptr %17, align 4, !tbaa !6
%18 = getelementptr inbounds i8, ptr %4, i64 36
%19 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_CONFIG, align 4, !tbaa !11
store i32 %19, ptr %18, align 4, !tbaa !12
%20 = getelementptr inbounds i8, ptr %4, i64 40
store i32 64, ptr %20, align 4, !tbaa !6
%21 = getelementptr inbounds i8, ptr %4, i64 44
%22 = load i32, ptr @VC_CONTAINER_PACKET_FLAG_ENCRYPTED, align 4, !tbaa !11
store i32 %22, ptr %21, align 4, !tbaa !12
%23 = getelementptr inbounds i8, ptr %4, i64 48
store <2 x i32> zeroinitializer, ptr %23, align 4, !tbaa !11
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %5) #2
store i32 16, ptr %5, align 4, !tbaa !6
%24 = getelementptr inbounds i8, ptr %5, i64 4
store i32 %10, ptr %24, align 4, !tbaa !12
%25 = getelementptr inbounds i8, ptr %5, i64 8
store i32 32, ptr %25, align 4, !tbaa !6
%26 = getelementptr inbounds i8, ptr %5, i64 12
store i32 %13, ptr %26, align 4, !tbaa !12
%27 = getelementptr inbounds i8, ptr %5, i64 16
store i32 128, ptr %27, align 4, !tbaa !6
%28 = getelementptr inbounds i8, ptr %5, i64 20
store i32 %19, ptr %28, align 4, !tbaa !12
%29 = getelementptr inbounds i8, ptr %5, i64 24
store <2 x i32> zeroinitializer, ptr %29, align 4, !tbaa !11
%30 = load ptr, ptr %0, align 8, !tbaa !13
%31 = zext i32 %1 to i64
%32 = getelementptr inbounds ptr, ptr %30, i64 %31
%33 = load ptr, ptr %32, align 8, !tbaa !16
%34 = load ptr, ptr %33, align 8, !tbaa !17
%35 = load ptr, ptr %34, align 8, !tbaa !19
%36 = load i32, ptr %35, align 4, !tbaa !21
switch i32 %36, label %57 [
i32 129, label %38
i32 128, label %37
]
37: ; preds = %3
br label %38
38: ; preds = %37, %3
%39 = phi i32 [ 16, %37 ], [ 2, %3 ]
%40 = phi ptr [ %5, %37 ], [ %4, %3 ]
br label %41
41: ; preds = %38, %51
%42 = phi i64 [ 0, %38 ], [ %53, %51 ]
%43 = phi i32 [ %39, %38 ], [ %55, %51 ]
%44 = phi i32 [ 0, %38 ], [ %52, %51 ]
%45 = and i32 %43, %2
%46 = icmp eq i32 %45, 0
br i1 %46, label %51, label %47
47: ; preds = %41
%48 = getelementptr inbounds %struct.convert_from_t, ptr %40, i64 %42, i32 1
%49 = load i32, ptr %48, align 4, !tbaa !12
%50 = or i32 %49, %44
br label %51
51: ; preds = %41, %47
%52 = phi i32 [ %50, %47 ], [ %44, %41 ]
%53 = add nuw nsw i64 %42, 1
%54 = getelementptr inbounds %struct.convert_from_t, ptr %40, i64 %53
%55 = load i32, ptr %54, align 4, !tbaa !6
%56 = icmp eq i32 %55, 0
br i1 %56, label %57, label %41, !llvm.loop !23
57: ; preds = %51, %3
%58 = phi i32 [ %2, %3 ], [ %52, %51 ]
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #2
call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %4) #2
ret i32 %58
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_9__", !15, i64 0}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!18, !15, i64 0}
!18 = !{!"TYPE_8__", !15, i64 0}
!19 = !{!20, !15, i64 0}
!20 = !{!"TYPE_7__", !15, i64 0}
!21 = !{!22, !8, i64 0}
!22 = !{!"TYPE_6__", !8, i64 0}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
|
RetroArch_gfx_include_userland_containers_simple_extr_simple_reader.c_simple_convert_packet_flags
|
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/hhkb/rn42/extr_rn42.c_rn42_init.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/hhkb/rn42/extr_rn42.c_rn42_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DDRF = dso_local local_unnamed_addr global i32 0, align 4
@PORTF = dso_local local_unnamed_addr global i32 0, align 4
@DDRD = dso_local local_unnamed_addr global i32 0, align 4
@PORTD = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @rn42_init() local_unnamed_addr #0 {
%1 = tail call i32 (...) @rn42_autoconnect() #2
%2 = load i32, ptr @DDRF, align 4, !tbaa !5
%3 = load i32, ptr @PORTF, align 4, !tbaa !5
%4 = and i32 %2, -67
store i32 %4, ptr @DDRF, align 4, !tbaa !5
%5 = and i32 %3, -67
%6 = or disjoint i32 %5, 64
store i32 %6, ptr @PORTF, align 4, !tbaa !5
%7 = load i32, ptr @DDRD, align 4, !tbaa !5
%8 = or i32 %7, 32
store i32 %8, ptr @DDRD, align 4, !tbaa !5
%9 = load i32, ptr @PORTD, align 4, !tbaa !5
%10 = and i32 %9, -33
store i32 %10, ptr @PORTD, align 4, !tbaa !5
%11 = tail call i32 (...) @serial_init() #2
ret void
}
declare i32 @rn42_autoconnect(...) local_unnamed_addr #1
declare i32 @serial_init(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/hhkb/rn42/extr_rn42.c_rn42_init.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/hhkb/rn42/extr_rn42.c_rn42_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DDRF = common local_unnamed_addr global i32 0, align 4
@PORTF = common local_unnamed_addr global i32 0, align 4
@DDRD = common local_unnamed_addr global i32 0, align 4
@PORTD = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @rn42_init() local_unnamed_addr #0 {
%1 = tail call i32 @rn42_autoconnect() #2
%2 = load i32, ptr @DDRF, align 4, !tbaa !6
%3 = load i32, ptr @PORTF, align 4, !tbaa !6
%4 = and i32 %2, -67
store i32 %4, ptr @DDRF, align 4, !tbaa !6
%5 = and i32 %3, -67
%6 = or disjoint i32 %5, 64
store i32 %6, ptr @PORTF, align 4, !tbaa !6
%7 = load i32, ptr @DDRD, align 4, !tbaa !6
%8 = or i32 %7, 32
store i32 %8, ptr @DDRD, align 4, !tbaa !6
%9 = load i32, ptr @PORTD, align 4, !tbaa !6
%10 = and i32 %9, -33
store i32 %10, ptr @PORTD, align 4, !tbaa !6
%11 = tail call i32 @serial_init() #2
ret void
}
declare i32 @rn42_autoconnect(...) local_unnamed_addr #1
declare i32 @serial_init(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
qmk_firmware_keyboards_hhkb_rn42_extr_rn42.c_rn42_init
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/ia64/sn/kernel/extr_irq.c_sn_irq_fixup.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/ia64/sn/kernel/extr_irq.c_sn_irq_fixup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sn_irq_info = type { i32, i32, i64, i32, i32, i32 }
@sn_irq_info_lock = dso_local global i32 0, align 4
@sn_irq_lh = dso_local local_unnamed_addr global ptr null, align 8
@IRQ_AFFINITY_SET = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @sn_irq_fixup(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.sn_irq_info, ptr %1, i64 0, i32 5
%4 = load i32, ptr %3, align 8, !tbaa !5
%5 = load i32, ptr %1, align 8, !tbaa !11
%6 = tail call i32 @nasid_slice_to_cpuid(i32 noundef %4, i32 noundef %5) #2
%7 = tail call i32 @pci_dev_get(ptr noundef %0) #2
%8 = getelementptr inbounds %struct.sn_irq_info, ptr %1, i64 0, i32 1
store i32 %6, ptr %8, align 4, !tbaa !12
%9 = tail call i32 @SN_PCIDEV_INFO(ptr noundef %0) #2
%10 = getelementptr inbounds %struct.sn_irq_info, ptr %1, i64 0, i32 4
store i32 %9, ptr %10, align 4, !tbaa !13
%11 = tail call i32 @spin_lock(ptr noundef nonnull @sn_irq_info_lock) #2
%12 = getelementptr inbounds %struct.sn_irq_info, ptr %1, i64 0, i32 3
%13 = load ptr, ptr @sn_irq_lh, align 8, !tbaa !14
%14 = getelementptr inbounds %struct.sn_irq_info, ptr %1, i64 0, i32 2
%15 = load i64, ptr %14, align 8, !tbaa !16
%16 = getelementptr inbounds i32, ptr %13, i64 %15
%17 = load i32, ptr %16, align 4, !tbaa !17
%18 = tail call i32 @list_add_rcu(ptr noundef nonnull %12, i32 noundef %17) #2
%19 = load i64, ptr %14, align 8, !tbaa !16
%20 = tail call i32 @reserve_irq_vector(i64 noundef %19) #2
%21 = tail call i32 @spin_unlock(ptr noundef nonnull @sn_irq_info_lock) #2
%22 = tail call i32 @register_intr_pda(ptr noundef nonnull %1) #2
ret void
}
declare i32 @nasid_slice_to_cpuid(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_dev_get(ptr noundef) local_unnamed_addr #1
declare i32 @SN_PCIDEV_INFO(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @list_add_rcu(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @reserve_irq_vector(i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @register_intr_pda(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"sn_irq_info", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16, !7, i64 20, !7, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!6, !7, i64 4}
!13 = !{!6, !7, i64 20}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!6, !10, i64 8}
!17 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/ia64/sn/kernel/extr_irq.c_sn_irq_fixup.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/ia64/sn/kernel/extr_irq.c_sn_irq_fixup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@sn_irq_info_lock = common global i32 0, align 4
@sn_irq_lh = common local_unnamed_addr global ptr null, align 8
@IRQ_AFFINITY_SET = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @sn_irq_fixup(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 24
%4 = load i32, ptr %3, align 8, !tbaa !6
%5 = load i32, ptr %1, align 8, !tbaa !12
%6 = tail call i32 @nasid_slice_to_cpuid(i32 noundef %4, i32 noundef %5) #2
%7 = tail call i32 @pci_dev_get(ptr noundef %0) #2
%8 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %6, ptr %8, align 4, !tbaa !13
%9 = tail call i32 @SN_PCIDEV_INFO(ptr noundef %0) #2
%10 = getelementptr inbounds i8, ptr %1, i64 20
store i32 %9, ptr %10, align 4, !tbaa !14
%11 = tail call i32 @spin_lock(ptr noundef nonnull @sn_irq_info_lock) #2
%12 = getelementptr inbounds i8, ptr %1, i64 16
%13 = load ptr, ptr @sn_irq_lh, align 8, !tbaa !15
%14 = getelementptr inbounds i8, ptr %1, i64 8
%15 = load i64, ptr %14, align 8, !tbaa !17
%16 = getelementptr inbounds i32, ptr %13, i64 %15
%17 = load i32, ptr %16, align 4, !tbaa !18
%18 = tail call i32 @list_add_rcu(ptr noundef nonnull %12, i32 noundef %17) #2
%19 = load i64, ptr %14, align 8, !tbaa !17
%20 = tail call i32 @reserve_irq_vector(i64 noundef %19) #2
%21 = tail call i32 @spin_unlock(ptr noundef nonnull @sn_irq_info_lock) #2
%22 = tail call i32 @register_intr_pda(ptr noundef nonnull %1) #2
ret void
}
declare i32 @nasid_slice_to_cpuid(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_dev_get(ptr noundef) local_unnamed_addr #1
declare i32 @SN_PCIDEV_INFO(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @list_add_rcu(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @reserve_irq_vector(i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @register_intr_pda(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 24}
!7 = !{!"sn_irq_info", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16, !8, i64 20, !8, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!7, !8, i64 4}
!14 = !{!7, !8, i64 20}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !9, i64 0}
!17 = !{!7, !11, i64 8}
!18 = !{!8, !8, i64 0}
|
fastsocket_kernel_arch_ia64_sn_kernel_extr_irq.c_sn_irq_fixup
|
; ModuleID = 'AnghaBench/freebsd/contrib/dtc/libfdt/extr_libfdt.h_fdt_property_u64.c'
source_filename = "AnghaBench/freebsd/contrib/dtc/libfdt/extr_libfdt.h_fdt_property_u64.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @fdt_property_u64], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @fdt_property_u64(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = tail call i32 @cpu_to_fdt64(i32 noundef %2) #3
store i32 %5, ptr %4, align 4, !tbaa !5
%6 = call i32 @fdt_property(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %4, i32 noundef 4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %6
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cpu_to_fdt64(i32 noundef) local_unnamed_addr #2
declare i32 @fdt_property(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/dtc/libfdt/extr_libfdt.h_fdt_property_u64.c'
source_filename = "AnghaBench/freebsd/contrib/dtc/libfdt/extr_libfdt.h_fdt_property_u64.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @fdt_property_u64], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @fdt_property_u64(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = tail call i32 @cpu_to_fdt64(i32 noundef %2) #3
store i32 %5, ptr %4, align 4, !tbaa !6
%6 = call i32 @fdt_property(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %4, i32 noundef 4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %6
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cpu_to_fdt64(i32 noundef) local_unnamed_addr #2
declare i32 @fdt_property(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_contrib_dtc_libfdt_extr_libfdt.h_fdt_property_u64
|
; ModuleID = 'AnghaBench/poco/SevenZip/src/extr_7zFile.c_FileInStream_CreateVTable.c'
source_filename = "AnghaBench/poco/SevenZip/src/extr_7zFile.c_FileInStream_CreateVTable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32 }
@FileInStream_Read = dso_local local_unnamed_addr global i32 0, align 4
@FileInStream_Seek = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable
define dso_local void @FileInStream_CreateVTable(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @FileInStream_Read, align 4, !tbaa !5
%3 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
store i32 %2, ptr %3, align 4, !tbaa !9
%4 = load i32, ptr @FileInStream_Seek, align 4, !tbaa !5
store i32 %4, ptr %0, align 4, !tbaa !12
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"TYPE_5__", !11, i64 0}
!11 = !{!"TYPE_4__", !6, i64 0, !6, i64 4}
!12 = !{!10, !6, i64 0}
|
; ModuleID = 'AnghaBench/poco/SevenZip/src/extr_7zFile.c_FileInStream_CreateVTable.c'
source_filename = "AnghaBench/poco/SevenZip/src/extr_7zFile.c_FileInStream_CreateVTable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FileInStream_Read = common local_unnamed_addr global i32 0, align 4
@FileInStream_Seek = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define void @FileInStream_CreateVTable(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @FileInStream_Read, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %2, ptr %3, align 4, !tbaa !10
%4 = load i32, ptr @FileInStream_Seek, align 4, !tbaa !6
store i32 %4, ptr %0, align 4, !tbaa !13
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"TYPE_5__", !12, i64 0}
!12 = !{!"TYPE_4__", !7, i64 0, !7, i64 4}
!13 = !{!11, !7, i64 0}
|
poco_SevenZip_src_extr_7zFile.c_FileInStream_CreateVTable
|
; ModuleID = 'AnghaBench/esp-idf/components/esp_http_server/src/extr_httpd_sess.c_httpd_sess_get.c'
source_filename = "AnghaBench/esp-idf/components/esp_http_server/src/extr_httpd_sess.c_httpd_sess_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.httpd_data = type { ptr, %struct.TYPE_4__, %struct.TYPE_3__ }
%struct.TYPE_4__ = type { i32 }
%struct.TYPE_3__ = type { ptr }
%struct.sock_db = type { i32 }
; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define dso_local ptr @httpd_sess_get(ptr noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %28, label %4
4: ; preds = %2
%5 = getelementptr inbounds %struct.httpd_data, ptr %0, i64 0, i32 2
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = icmp eq ptr %6, null
br i1 %7, label %11, label %8
8: ; preds = %4
%9 = load i32, ptr %6, align 4, !tbaa !13
%10 = icmp eq i32 %9, %1
br i1 %10, label %28, label %11
11: ; preds = %8, %4
%12 = getelementptr inbounds %struct.httpd_data, ptr %0, i64 0, i32 1
%13 = load i32, ptr %12, align 8, !tbaa !15
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %28
15: ; preds = %11
%16 = load ptr, ptr %0, align 8, !tbaa !16
%17 = zext nneg i32 %13 to i64
br label %21
18: ; preds = %21
%19 = add nuw nsw i64 %22, 1
%20 = icmp eq i64 %19, %17
br i1 %20, label %28, label %21, !llvm.loop !17
21: ; preds = %15, %18
%22 = phi i64 [ 0, %15 ], [ %19, %18 ]
%23 = getelementptr inbounds %struct.sock_db, ptr %16, i64 %22
%24 = load i32, ptr %23, align 4, !tbaa !13
%25 = icmp eq i32 %24, %1
br i1 %25, label %26, label %18
26: ; preds = %21
%27 = getelementptr inbounds %struct.sock_db, ptr %16, i64 %22
br label %28
28: ; preds = %18, %26, %11, %8, %2
%29 = phi ptr [ null, %2 ], [ %6, %8 ], [ null, %11 ], [ %27, %26 ], [ null, %18 ]
ret ptr %29
}
attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"httpd_data", !7, i64 0, !10, i64 8, !12, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_4__", !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!"TYPE_3__", !7, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"sock_db", !11, i64 0}
!15 = !{!6, !11, i64 8}
!16 = !{!6, !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/esp-idf/components/esp_http_server/src/extr_httpd_sess.c_httpd_sess_get.c'
source_filename = "AnghaBench/esp-idf/components/esp_http_server/src/extr_httpd_sess.c_httpd_sess_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.sock_db = type { i32 }
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define ptr @httpd_sess_get(ptr noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %28, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8, ptr %0, i64 16
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = icmp eq ptr %6, null
br i1 %7, label %11, label %8
8: ; preds = %4
%9 = load i32, ptr %6, align 4, !tbaa !14
%10 = icmp eq i32 %9, %1
br i1 %10, label %28, label %11
11: ; preds = %8, %4
%12 = getelementptr inbounds i8, ptr %0, i64 8
%13 = load i32, ptr %12, align 8, !tbaa !16
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %28
15: ; preds = %11
%16 = load ptr, ptr %0, align 8, !tbaa !17
%17 = zext nneg i32 %13 to i64
br label %21
18: ; preds = %21
%19 = add nuw nsw i64 %22, 1
%20 = icmp eq i64 %19, %17
br i1 %20, label %28, label %21, !llvm.loop !18
21: ; preds = %15, %18
%22 = phi i64 [ 0, %15 ], [ %19, %18 ]
%23 = getelementptr inbounds %struct.sock_db, ptr %16, i64 %22
%24 = load i32, ptr %23, align 4, !tbaa !14
%25 = icmp eq i32 %24, %1
br i1 %25, label %26, label %18
26: ; preds = %21
%27 = getelementptr inbounds %struct.sock_db, ptr %16, i64 %22
br label %28
28: ; preds = %26, %18, %11, %8, %2
%29 = phi ptr [ null, %2 ], [ %6, %8 ], [ null, %11 ], [ %27, %26 ], [ null, %18 ]
ret ptr %29
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"httpd_data", !8, i64 0, !11, i64 8, !13, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!"TYPE_3__", !8, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"sock_db", !12, i64 0}
!16 = !{!7, !12, i64 8}
!17 = !{!7, !8, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
|
esp-idf_components_esp_http_server_src_extr_httpd_sess.c_httpd_sess_get
|
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/musashi/extr_m68kopdm.c_m68k_op_movem_16_er_al.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/musashi/extr_m68kopdm.c_m68k_op_movem_16_er_al.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@REG_DA = dso_local local_unnamed_addr global ptr null, align 8
@CYC_MOVEM_W = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @m68k_op_movem_16_er_al() local_unnamed_addr #0 {
%1 = tail call i32 (...) @OPER_I_16() #2
%2 = tail call i32 (...) @EA_AL_16() #2
br label %3
3: ; preds = %0, %19
%4 = phi i64 [ 0, %0 ], [ %22, %19 ]
%5 = phi i32 [ 0, %0 ], [ %21, %19 ]
%6 = phi i32 [ %2, %0 ], [ %20, %19 ]
%7 = trunc i64 %4 to i32
%8 = shl nuw nsw i32 1, %7
%9 = and i32 %8, %1
%10 = icmp eq i32 %9, 0
br i1 %10, label %19, label %11
11: ; preds = %3
%12 = tail call i32 @m68ki_read_16(i32 noundef %6) #2
%13 = tail call i32 @MASK_OUT_ABOVE_16(i32 noundef %12) #2
%14 = tail call i32 @MAKE_INT_16(i32 noundef %13) #2
%15 = load ptr, ptr @REG_DA, align 8, !tbaa !5
%16 = getelementptr inbounds i32, ptr %15, i64 %4
store i32 %14, ptr %16, align 4, !tbaa !9
%17 = add nsw i32 %6, 2
%18 = add nsw i32 %5, 1
br label %19
19: ; preds = %3, %11
%20 = phi i32 [ %17, %11 ], [ %6, %3 ]
%21 = phi i32 [ %18, %11 ], [ %5, %3 ]
%22 = add nuw nsw i64 %4, 1
%23 = icmp eq i64 %22, 16
br i1 %23, label %24, label %3, !llvm.loop !11
24: ; preds = %19
%25 = load i32, ptr @CYC_MOVEM_W, align 4, !tbaa !9
%26 = shl i32 %21, %25
%27 = tail call i32 @USE_CYCLES(i32 noundef %26) #2
ret void
}
declare i32 @OPER_I_16(...) local_unnamed_addr #1
declare i32 @EA_AL_16(...) local_unnamed_addr #1
declare i32 @MAKE_INT_16(i32 noundef) local_unnamed_addr #1
declare i32 @MASK_OUT_ABOVE_16(i32 noundef) local_unnamed_addr #1
declare i32 @m68ki_read_16(i32 noundef) local_unnamed_addr #1
declare i32 @USE_CYCLES(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/musashi/extr_m68kopdm.c_m68k_op_movem_16_er_al.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/musashi/extr_m68kopdm.c_m68k_op_movem_16_er_al.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REG_DA = common local_unnamed_addr global ptr null, align 8
@CYC_MOVEM_W = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @m68k_op_movem_16_er_al() local_unnamed_addr #0 {
%1 = tail call i32 @OPER_I_16() #2
%2 = tail call i32 @EA_AL_16() #2
br label %3
3: ; preds = %0, %19
%4 = phi i64 [ 0, %0 ], [ %22, %19 ]
%5 = phi i32 [ 0, %0 ], [ %21, %19 ]
%6 = phi i32 [ %2, %0 ], [ %20, %19 ]
%7 = trunc nuw nsw i64 %4 to i32
%8 = shl nuw nsw i32 1, %7
%9 = and i32 %8, %1
%10 = icmp eq i32 %9, 0
br i1 %10, label %19, label %11
11: ; preds = %3
%12 = tail call i32 @m68ki_read_16(i32 noundef %6) #2
%13 = tail call i32 @MASK_OUT_ABOVE_16(i32 noundef %12) #2
%14 = tail call i32 @MAKE_INT_16(i32 noundef %13) #2
%15 = load ptr, ptr @REG_DA, align 8, !tbaa !6
%16 = getelementptr inbounds i32, ptr %15, i64 %4
store i32 %14, ptr %16, align 4, !tbaa !10
%17 = add nsw i32 %6, 2
%18 = add nsw i32 %5, 1
br label %19
19: ; preds = %3, %11
%20 = phi i32 [ %17, %11 ], [ %6, %3 ]
%21 = phi i32 [ %18, %11 ], [ %5, %3 ]
%22 = add nuw nsw i64 %4, 1
%23 = icmp eq i64 %22, 16
br i1 %23, label %24, label %3, !llvm.loop !12
24: ; preds = %19
%25 = load i32, ptr @CYC_MOVEM_W, align 4, !tbaa !10
%26 = shl i32 %21, %25
%27 = tail call i32 @USE_CYCLES(i32 noundef %26) #2
ret void
}
declare i32 @OPER_I_16(...) local_unnamed_addr #1
declare i32 @EA_AL_16(...) local_unnamed_addr #1
declare i32 @MAKE_INT_16(i32 noundef) local_unnamed_addr #1
declare i32 @MASK_OUT_ABOVE_16(i32 noundef) local_unnamed_addr #1
declare i32 @m68ki_read_16(i32 noundef) local_unnamed_addr #1
declare i32 @USE_CYCLES(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
|
Provenance_Cores_Yabause_yabause_src_musashi_extr_m68kopdm.c_m68k_op_movem_16_er_al
|
; ModuleID = 'AnghaBench/linux/net/mac80211/extr_tx.c_ieee80211_clear_fast_xmit.c'
source_filename = "AnghaBench/linux/net/mac80211/extr_tx.c_ieee80211_clear_fast_xmit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sta_info = type { i32, i32 }
@rcu_head = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @ieee80211_clear_fast_xmit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @spin_lock_bh(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.sta_info, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i32 @lockdep_is_held(ptr noundef %0) #2
%6 = tail call ptr @rcu_dereference_protected(i32 noundef %4, i32 noundef %5) #2
%7 = load i32, ptr %3, align 4, !tbaa !5
%8 = tail call i32 @RCU_INIT_POINTER(i32 noundef %7, ptr noundef null) #2
%9 = tail call i32 @spin_unlock_bh(ptr noundef %0) #2
%10 = icmp eq ptr %6, null
br i1 %10, label %14, label %11
11: ; preds = %1
%12 = load i32, ptr @rcu_head, align 4, !tbaa !10
%13 = tail call i32 @kfree_rcu(ptr noundef nonnull %6, i32 noundef %12) #2
br label %14
14: ; preds = %11, %1
ret void
}
declare i32 @spin_lock_bh(ptr noundef) local_unnamed_addr #1
declare ptr @rcu_dereference_protected(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lockdep_is_held(ptr noundef) local_unnamed_addr #1
declare i32 @RCU_INIT_POINTER(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @kfree_rcu(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"sta_info", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/net/mac80211/extr_tx.c_ieee80211_clear_fast_xmit.c'
source_filename = "AnghaBench/linux/net/mac80211/extr_tx.c_ieee80211_clear_fast_xmit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@rcu_head = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @ieee80211_clear_fast_xmit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @spin_lock_bh(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @lockdep_is_held(ptr noundef %0) #2
%6 = tail call ptr @rcu_dereference_protected(i32 noundef %4, i32 noundef %5) #2
%7 = load i32, ptr %3, align 4, !tbaa !6
%8 = tail call i32 @RCU_INIT_POINTER(i32 noundef %7, ptr noundef null) #2
%9 = tail call i32 @spin_unlock_bh(ptr noundef %0) #2
%10 = icmp eq ptr %6, null
br i1 %10, label %14, label %11
11: ; preds = %1
%12 = load i32, ptr @rcu_head, align 4, !tbaa !11
%13 = tail call i32 @kfree_rcu(ptr noundef nonnull %6, i32 noundef %12) #2
br label %14
14: ; preds = %11, %1
ret void
}
declare i32 @spin_lock_bh(ptr noundef) local_unnamed_addr #1
declare ptr @rcu_dereference_protected(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lockdep_is_held(ptr noundef) local_unnamed_addr #1
declare i32 @RCU_INIT_POINTER(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @kfree_rcu(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"sta_info", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
linux_net_mac80211_extr_tx.c_ieee80211_clear_fast_xmit
|
; ModuleID = 'AnghaBench/freebsd/contrib/mandoc/extr_test-strlcat.c_main.c'
source_filename = "AnghaBench/freebsd/contrib/mandoc/extr_test-strlcat.c_main.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@__const.main.buf = private unnamed_addr constant [3 x i8] c"a\00\00", align 1
@.str = private unnamed_addr constant [2 x i8] c"b\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @main() local_unnamed_addr #0 {
%1 = alloca [3 x i8], align 1
call void @llvm.lifetime.start.p0(i64 3, ptr nonnull %1) #4
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(3) %1, ptr noundef nonnull align 1 dereferenceable(3) @__const.main.buf, i64 3, i1 false)
%2 = call i32 @strlcat(ptr noundef nonnull %1, ptr noundef nonnull @.str, i32 noundef 3) #4
%3 = icmp ne i32 %2, 2
%4 = load i8, ptr %1, align 1
%5 = icmp ne i8 %4, 97
%6 = select i1 %3, i1 true, i1 %5
%7 = getelementptr inbounds [3 x i8], ptr %1, i64 0, i64 1
%8 = load i8, ptr %7, align 1
%9 = icmp ne i8 %8, 98
%10 = select i1 %6, i1 true, i1 %9
%11 = getelementptr inbounds [3 x i8], ptr %1, i64 0, i64 2
%12 = load i8, ptr %11, align 1
%13 = icmp ne i8 %12, 0
%14 = select i1 %10, i1 true, i1 %13
%15 = zext i1 %14 to i32
call void @llvm.lifetime.end.p0(i64 3, ptr nonnull %1) #4
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2
declare i32 @strlcat(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/mandoc/extr_test-strlcat.c_main.c'
source_filename = "AnghaBench/freebsd/contrib/mandoc/extr_test-strlcat.c_main.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@__const.main.buf = private unnamed_addr constant [3 x i8] c"a\00\00", align 1
@.str = private unnamed_addr constant [2 x i8] c"b\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @main() local_unnamed_addr #0 {
%1 = alloca [3 x i8], align 1
call void @llvm.lifetime.start.p0(i64 3, ptr nonnull %1) #4
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(3) %1, ptr noundef nonnull align 1 dereferenceable(3) @__const.main.buf, i64 3, i1 false)
%2 = call i32 @strlcat(ptr noundef nonnull %1, ptr noundef nonnull @.str, i32 noundef 3) #4
%3 = icmp ne i32 %2, 2
%4 = load i8, ptr %1, align 1
%5 = icmp ne i8 %4, 97
%6 = select i1 %3, i1 true, i1 %5
%7 = getelementptr inbounds i8, ptr %1, i64 1
%8 = load i8, ptr %7, align 1
%9 = icmp ne i8 %8, 98
%10 = select i1 %6, i1 true, i1 %9
%11 = getelementptr inbounds i8, ptr %1, i64 2
%12 = load i8, ptr %11, align 1
%13 = icmp ne i8 %12, 0
%14 = select i1 %10, i1 true, i1 %13
%15 = zext i1 %14 to i32
call void @llvm.lifetime.end.p0(i64 3, ptr nonnull %1) #4
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2
declare i32 @strlcat(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_contrib_mandoc_extr_test-strlcat.c_main
|
; ModuleID = 'AnghaBench/linux/fs/nfs/extr_write.c_nfs_clear_request_commit.c'
source_filename = "AnghaBench/linux/fs/nfs/extr_write.c_nfs_clear_request_commit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nfs_commit_info = type { i32 }
%struct.nfs_page = type { i32, i32 }
@PG_CLEAN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nfs_clear_request_commit], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @nfs_clear_request_commit(ptr noundef %0) #0 {
%2 = alloca %struct.nfs_commit_info, align 4
%3 = load i32, ptr @PG_CLEAN, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.nfs_page, ptr %0, i64 0, i32 1
%5 = tail call i64 @test_bit(i32 noundef %3, ptr noundef nonnull %4) #3
%6 = icmp eq i64 %5, 0
br i1 %6, label %23, label %7
7: ; preds = %1
%8 = tail call ptr @nfs_req_openctx(ptr noundef %0) #3
%9 = load i32, ptr %8, align 4, !tbaa !9
%10 = tail call ptr @d_inode(i32 noundef %9) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%11 = call i32 @nfs_init_cinfo_from_inode(ptr noundef nonnull %2, ptr noundef %10) #3
%12 = call ptr @NFS_I(ptr noundef %10) #3
%13 = call i32 @mutex_lock(ptr noundef %12) #3
%14 = call i32 @pnfs_clear_request_commit(ptr noundef %0, ptr noundef nonnull %2) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %7
%17 = call i32 @nfs_request_remove_commit_list(ptr noundef %0, ptr noundef nonnull %2) #3
br label %18
18: ; preds = %16, %7
%19 = call ptr @NFS_I(ptr noundef %10) #3
%20 = call i32 @mutex_unlock(ptr noundef %19) #3
%21 = load i32, ptr %0, align 4, !tbaa !11
%22 = call i32 @nfs_clear_page_commit(i32 noundef %21) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %23
23: ; preds = %18, %1
ret void
}
declare i64 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2
declare ptr @nfs_req_openctx(ptr noundef) local_unnamed_addr #1
declare ptr @d_inode(i32 noundef) local_unnamed_addr #1
declare i32 @nfs_init_cinfo_from_inode(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare ptr @NFS_I(ptr noundef) local_unnamed_addr #1
declare i32 @pnfs_clear_request_commit(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nfs_request_remove_commit_list(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @nfs_clear_page_commit(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"nfs_open_context", !6, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"nfs_page", !6, i64 0, !6, i64 4}
|
; ModuleID = 'AnghaBench/linux/fs/nfs/extr_write.c_nfs_clear_request_commit.c'
source_filename = "AnghaBench/linux/fs/nfs/extr_write.c_nfs_clear_request_commit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.nfs_commit_info = type { i32 }
@PG_CLEAN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nfs_clear_request_commit], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @nfs_clear_request_commit(ptr noundef %0) #0 {
%2 = alloca %struct.nfs_commit_info, align 4
%3 = load i32, ptr @PG_CLEAN, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 4
%5 = tail call i64 @test_bit(i32 noundef %3, ptr noundef nonnull %4) #3
%6 = icmp eq i64 %5, 0
br i1 %6, label %23, label %7
7: ; preds = %1
%8 = tail call ptr @nfs_req_openctx(ptr noundef %0) #3
%9 = load i32, ptr %8, align 4, !tbaa !10
%10 = tail call ptr @d_inode(i32 noundef %9) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%11 = call i32 @nfs_init_cinfo_from_inode(ptr noundef nonnull %2, ptr noundef %10) #3
%12 = call ptr @NFS_I(ptr noundef %10) #3
%13 = call i32 @mutex_lock(ptr noundef %12) #3
%14 = call i32 @pnfs_clear_request_commit(ptr noundef %0, ptr noundef nonnull %2) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %7
%17 = call i32 @nfs_request_remove_commit_list(ptr noundef %0, ptr noundef nonnull %2) #3
br label %18
18: ; preds = %16, %7
%19 = call ptr @NFS_I(ptr noundef %10) #3
%20 = call i32 @mutex_unlock(ptr noundef %19) #3
%21 = load i32, ptr %0, align 4, !tbaa !12
%22 = call i32 @nfs_clear_page_commit(i32 noundef %21) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %23
23: ; preds = %18, %1
ret void
}
declare i64 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2
declare ptr @nfs_req_openctx(ptr noundef) local_unnamed_addr #1
declare ptr @d_inode(i32 noundef) local_unnamed_addr #1
declare i32 @nfs_init_cinfo_from_inode(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare ptr @NFS_I(ptr noundef) local_unnamed_addr #1
declare i32 @pnfs_clear_request_commit(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nfs_request_remove_commit_list(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @nfs_clear_page_commit(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"nfs_open_context", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"nfs_page", !7, i64 0, !7, i64 4}
|
linux_fs_nfs_extr_write.c_nfs_clear_request_commit
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dp.c_intel_edp_init_dpcd.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dp.c_intel_edp_init_dpcd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.intel_dp = type { ptr, ptr, ptr, i32, i32, i32, i32 }
@DP_DPCD_REV = dso_local local_unnamed_addr global i64 0, align 8
@DP_EDP_DPCD_REV = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [16 x i8] c"eDP DPCD: %*ph\0A\00", align 1
@DP_EDP_14 = dso_local local_unnamed_addr global i64 0, align 8
@DP_MAX_SUPPORTED_RATES = dso_local local_unnamed_addr global i32 0, align 4
@DP_SUPPORTED_LINK_RATES = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @intel_edp_init_dpcd], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @intel_edp_init_dpcd(ptr noundef %0) #0 {
%2 = tail call ptr @dp_to_dig_port(ptr noundef %0) #3
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = tail call ptr @to_i915(i32 noundef %3) #3
%5 = load ptr, ptr %0, align 8, !tbaa !12
%6 = load i64, ptr @DP_DPCD_REV, align 8, !tbaa !15
%7 = getelementptr inbounds i64, ptr %5, i64 %6
%8 = load i64, ptr %7, align 8, !tbaa !15
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
%11 = tail call i32 @WARN_ON(i32 noundef %10) #3
%12 = tail call i32 @intel_dp_read_dpcd(ptr noundef nonnull %0) #3
%13 = icmp eq i32 %12, 0
br i1 %13, label %83, label %14
14: ; preds = %1
%15 = getelementptr inbounds %struct.intel_dp, ptr %0, i64 0, i32 5
%16 = getelementptr inbounds %struct.intel_dp, ptr %0, i64 0, i32 6
%17 = load ptr, ptr %0, align 8, !tbaa !12
%18 = tail call i32 @drm_dp_is_branch(ptr noundef %17) #3
%19 = tail call i32 @drm_dp_read_desc(ptr noundef nonnull %15, ptr noundef nonnull %16, i32 noundef %18) #3
%20 = load i32, ptr @DP_EDP_DPCD_REV, align 4, !tbaa !17
%21 = getelementptr inbounds %struct.intel_dp, ptr %0, i64 0, i32 1
%22 = load ptr, ptr %21, align 8, !tbaa !18
%23 = tail call i32 @drm_dp_dpcd_read(ptr noundef nonnull %15, i32 noundef %20, ptr noundef %22, i32 noundef 8) #3
%24 = icmp eq i32 %23, 8
br i1 %24, label %25, label %28
25: ; preds = %14
%26 = load ptr, ptr %21, align 8, !tbaa !18
%27 = tail call i32 @DRM_DEBUG_KMS(ptr noundef nonnull @.str, i32 noundef 8, ptr noundef %26) #3
br label %28
28: ; preds = %25, %14
%29 = tail call i32 @intel_psr_init_dpcd(ptr noundef nonnull %0) #3
%30 = load ptr, ptr %21, align 8, !tbaa !18
%31 = load i64, ptr %30, align 8, !tbaa !15
%32 = load i64, ptr @DP_EDP_14, align 8, !tbaa !15
%33 = icmp slt i64 %31, %32
br i1 %33, label %66, label %34
34: ; preds = %28
%35 = load i32, ptr @DP_MAX_SUPPORTED_RATES, align 4, !tbaa !17
%36 = zext i32 %35 to i64
%37 = tail call ptr @llvm.stacksave.p0()
%38 = alloca i64, i64 %36, align 16
%39 = load i32, ptr @DP_SUPPORTED_LINK_RATES, align 4, !tbaa !17
%40 = shl i32 %35, 3
%41 = call i32 @drm_dp_dpcd_read(ptr noundef nonnull %15, i32 noundef %39, ptr noundef nonnull %38, i32 noundef %40) #3
%42 = call i32 @ARRAY_SIZE(ptr noundef nonnull %38) #3
%43 = icmp sgt i32 %42, 0
br i1 %43, label %44, label %63
44: ; preds = %34
%45 = getelementptr inbounds %struct.intel_dp, ptr %0, i64 0, i32 2
br label %46
46: ; preds = %44, %52
%47 = phi i64 [ 0, %44 ], [ %56, %52 ]
%48 = getelementptr inbounds i64, ptr %38, i64 %47
%49 = load i64, ptr %48, align 8, !tbaa !15
%50 = call i32 @le16_to_cpu(i64 noundef %49) #3
%51 = icmp eq i32 %50, 0
br i1 %51, label %60, label %52
52: ; preds = %46
%53 = mul nsw i32 %50, 20
%54 = load ptr, ptr %45, align 8, !tbaa !19
%55 = getelementptr inbounds i32, ptr %54, i64 %47
store i32 %53, ptr %55, align 4, !tbaa !17
%56 = add nuw nsw i64 %47, 1
%57 = call i32 @ARRAY_SIZE(ptr noundef nonnull %38) #3
%58 = sext i32 %57 to i64
%59 = icmp slt i64 %56, %58
br i1 %59, label %46, label %60, !llvm.loop !20
60: ; preds = %46, %52
%61 = phi i64 [ %56, %52 ], [ %47, %46 ]
%62 = trunc i64 %61 to i32
br label %63
63: ; preds = %60, %34
%64 = phi i32 [ 0, %34 ], [ %62, %60 ]
%65 = getelementptr inbounds %struct.intel_dp, ptr %0, i64 0, i32 3
store i32 %64, ptr %65, align 8, !tbaa !22
call void @llvm.stackrestore.p0(ptr %37)
br label %66
66: ; preds = %63, %28
%67 = getelementptr inbounds %struct.intel_dp, ptr %0, i64 0, i32 3
%68 = load i32, ptr %67, align 8, !tbaa !22
%69 = icmp eq i32 %68, 0
br i1 %69, label %72, label %70
70: ; preds = %66
%71 = getelementptr inbounds %struct.intel_dp, ptr %0, i64 0, i32 4
store i32 1, ptr %71, align 4, !tbaa !23
br label %74
72: ; preds = %66
%73 = call i32 @intel_dp_set_sink_rates(ptr noundef nonnull %0) #3
br label %74
74: ; preds = %72, %70
%75 = call i32 @intel_dp_set_common_rates(ptr noundef nonnull %0) #3
%76 = call i32 @INTEL_GEN(ptr noundef %4) #3
%77 = icmp sgt i32 %76, 9
br i1 %77, label %81, label %78
78: ; preds = %74
%79 = call i64 @IS_GEMINILAKE(ptr noundef %4) #3
%80 = icmp eq i64 %79, 0
br i1 %80, label %83, label %81
81: ; preds = %78, %74
%82 = call i32 @intel_dp_get_dsc_sink_cap(ptr noundef nonnull %0) #3
br label %83
83: ; preds = %78, %81, %1
%84 = phi i32 [ 0, %1 ], [ 1, %81 ], [ 1, %78 ]
ret i32 %84
}
declare ptr @to_i915(i32 noundef) local_unnamed_addr #1
declare ptr @dp_to_dig_port(ptr noundef) local_unnamed_addr #1
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @intel_dp_read_dpcd(ptr noundef) local_unnamed_addr #1
declare i32 @drm_dp_read_desc(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @drm_dp_is_branch(ptr noundef) local_unnamed_addr #1
declare i32 @drm_dp_dpcd_read(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DRM_DEBUG_KMS(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @intel_psr_init_dpcd(ptr noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @le16_to_cpu(i64 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #2
declare i32 @intel_dp_set_sink_rates(ptr noundef) local_unnamed_addr #1
declare i32 @intel_dp_set_common_rates(ptr noundef) local_unnamed_addr #1
declare i32 @INTEL_GEN(ptr noundef) local_unnamed_addr #1
declare i64 @IS_GEMINILAKE(ptr noundef) local_unnamed_addr #1
declare i32 @intel_dp_get_dsc_sink_cap(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !9, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !14, i64 0}
!13 = !{!"intel_dp", !14, i64 0, !14, i64 8, !14, i64 16, !9, i64 24, !9, i64 28, !9, i64 32, !9, i64 36}
!14 = !{!"any pointer", !10, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !10, i64 0}
!17 = !{!9, !9, i64 0}
!18 = !{!13, !14, i64 8}
!19 = !{!13, !14, i64 16}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!13, !9, i64 24}
!23 = !{!13, !9, i64 28}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dp.c_intel_edp_init_dpcd.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dp.c_intel_edp_init_dpcd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DP_DPCD_REV = common local_unnamed_addr global i64 0, align 8
@DP_EDP_DPCD_REV = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [16 x i8] c"eDP DPCD: %*ph\0A\00", align 1
@DP_EDP_14 = common local_unnamed_addr global i64 0, align 8
@DP_MAX_SUPPORTED_RATES = common local_unnamed_addr global i32 0, align 4
@DP_SUPPORTED_LINK_RATES = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @intel_edp_init_dpcd], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @intel_edp_init_dpcd(ptr noundef %0) #0 {
%2 = tail call ptr @dp_to_dig_port(ptr noundef %0) #3
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = tail call ptr @to_i915(i32 noundef %3) #3
%5 = load ptr, ptr %0, align 8, !tbaa !13
%6 = load i64, ptr @DP_DPCD_REV, align 8, !tbaa !16
%7 = getelementptr inbounds i64, ptr %5, i64 %6
%8 = load i64, ptr %7, align 8, !tbaa !16
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
%11 = tail call i32 @WARN_ON(i32 noundef %10) #3
%12 = tail call i32 @intel_dp_read_dpcd(ptr noundef nonnull %0) #3
%13 = icmp eq i32 %12, 0
br i1 %13, label %83, label %14
14: ; preds = %1
%15 = getelementptr inbounds i8, ptr %0, i64 32
%16 = getelementptr inbounds i8, ptr %0, i64 36
%17 = load ptr, ptr %0, align 8, !tbaa !13
%18 = tail call i32 @drm_dp_is_branch(ptr noundef %17) #3
%19 = tail call i32 @drm_dp_read_desc(ptr noundef nonnull %15, ptr noundef nonnull %16, i32 noundef %18) #3
%20 = load i32, ptr @DP_EDP_DPCD_REV, align 4, !tbaa !18
%21 = getelementptr inbounds i8, ptr %0, i64 8
%22 = load ptr, ptr %21, align 8, !tbaa !19
%23 = tail call i32 @drm_dp_dpcd_read(ptr noundef nonnull %15, i32 noundef %20, ptr noundef %22, i32 noundef 8) #3
%24 = icmp eq i32 %23, 8
br i1 %24, label %25, label %28
25: ; preds = %14
%26 = load ptr, ptr %21, align 8, !tbaa !19
%27 = tail call i32 @DRM_DEBUG_KMS(ptr noundef nonnull @.str, i32 noundef 8, ptr noundef %26) #3
br label %28
28: ; preds = %25, %14
%29 = tail call i32 @intel_psr_init_dpcd(ptr noundef nonnull %0) #3
%30 = load ptr, ptr %21, align 8, !tbaa !19
%31 = load i64, ptr %30, align 8, !tbaa !16
%32 = load i64, ptr @DP_EDP_14, align 8, !tbaa !16
%33 = icmp slt i64 %31, %32
br i1 %33, label %66, label %34
34: ; preds = %28
%35 = load i32, ptr @DP_MAX_SUPPORTED_RATES, align 4, !tbaa !18
%36 = zext i32 %35 to i64
%37 = tail call ptr @llvm.stacksave.p0()
%38 = alloca i64, i64 %36, align 8
%39 = load i32, ptr @DP_SUPPORTED_LINK_RATES, align 4, !tbaa !18
%40 = shl i32 %35, 3
%41 = call i32 @drm_dp_dpcd_read(ptr noundef nonnull %15, i32 noundef %39, ptr noundef nonnull %38, i32 noundef %40) #3
%42 = call i32 @ARRAY_SIZE(ptr noundef nonnull %38) #3
%43 = icmp sgt i32 %42, 0
br i1 %43, label %44, label %63
44: ; preds = %34
%45 = getelementptr inbounds i8, ptr %0, i64 16
br label %46
46: ; preds = %44, %52
%47 = phi i64 [ 0, %44 ], [ %56, %52 ]
%48 = getelementptr inbounds i64, ptr %38, i64 %47
%49 = load i64, ptr %48, align 8, !tbaa !16
%50 = call i32 @le16_to_cpu(i64 noundef %49) #3
%51 = icmp eq i32 %50, 0
br i1 %51, label %60, label %52
52: ; preds = %46
%53 = mul nsw i32 %50, 20
%54 = load ptr, ptr %45, align 8, !tbaa !20
%55 = getelementptr inbounds i32, ptr %54, i64 %47
store i32 %53, ptr %55, align 4, !tbaa !18
%56 = add nuw nsw i64 %47, 1
%57 = call i32 @ARRAY_SIZE(ptr noundef nonnull %38) #3
%58 = sext i32 %57 to i64
%59 = icmp slt i64 %56, %58
br i1 %59, label %46, label %60, !llvm.loop !21
60: ; preds = %46, %52
%61 = phi i64 [ %56, %52 ], [ %47, %46 ]
%62 = trunc i64 %61 to i32
br label %63
63: ; preds = %60, %34
%64 = phi i32 [ 0, %34 ], [ %62, %60 ]
%65 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %64, ptr %65, align 8, !tbaa !23
call void @llvm.stackrestore.p0(ptr %37)
br label %66
66: ; preds = %63, %28
%67 = getelementptr inbounds i8, ptr %0, i64 24
%68 = load i32, ptr %67, align 8, !tbaa !23
%69 = icmp eq i32 %68, 0
br i1 %69, label %72, label %70
70: ; preds = %66
%71 = getelementptr inbounds i8, ptr %0, i64 28
store i32 1, ptr %71, align 4, !tbaa !24
br label %74
72: ; preds = %66
%73 = call i32 @intel_dp_set_sink_rates(ptr noundef nonnull %0) #3
br label %74
74: ; preds = %72, %70
%75 = call i32 @intel_dp_set_common_rates(ptr noundef nonnull %0) #3
%76 = call i32 @INTEL_GEN(ptr noundef %4) #3
%77 = icmp sgt i32 %76, 9
br i1 %77, label %81, label %78
78: ; preds = %74
%79 = call i64 @IS_GEMINILAKE(ptr noundef %4) #3
%80 = icmp eq i64 %79, 0
br i1 %80, label %83, label %81
81: ; preds = %78, %74
%82 = call i32 @intel_dp_get_dsc_sink_cap(ptr noundef nonnull %0) #3
br label %83
83: ; preds = %78, %81, %1
%84 = phi i32 [ 0, %1 ], [ 1, %81 ], [ 1, %78 ]
ret i32 %84
}
declare ptr @to_i915(i32 noundef) local_unnamed_addr #1
declare ptr @dp_to_dig_port(ptr noundef) local_unnamed_addr #1
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @intel_dp_read_dpcd(ptr noundef) local_unnamed_addr #1
declare i32 @drm_dp_read_desc(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @drm_dp_is_branch(ptr noundef) local_unnamed_addr #1
declare i32 @drm_dp_dpcd_read(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DRM_DEBUG_KMS(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @intel_psr_init_dpcd(ptr noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @le16_to_cpu(i64 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #2
declare i32 @intel_dp_set_sink_rates(ptr noundef) local_unnamed_addr #1
declare i32 @intel_dp_set_common_rates(ptr noundef) local_unnamed_addr #1
declare i32 @INTEL_GEN(ptr noundef) local_unnamed_addr #1
declare i64 @IS_GEMINILAKE(ptr noundef) local_unnamed_addr #1
declare i32 @intel_dp_get_dsc_sink_cap(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !10, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0}
!8 = !{!"TYPE_5__", !9, i64 0}
!9 = !{!"TYPE_4__", !10, i64 0}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!14, !15, i64 0}
!14 = !{!"intel_dp", !15, i64 0, !15, i64 8, !15, i64 16, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36}
!15 = !{!"any pointer", !11, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !11, i64 0}
!18 = !{!10, !10, i64 0}
!19 = !{!14, !15, i64 8}
!20 = !{!14, !15, i64 16}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
!23 = !{!14, !10, i64 24}
!24 = !{!14, !10, i64 28}
|
linux_drivers_gpu_drm_i915_display_extr_intel_dp.c_intel_edp_init_dpcd
|
; ModuleID = 'AnghaBench/freebsd/contrib/libpcap/extr_gencode.c_gen_cmp_ge.c'
source_filename = "AnghaBench/freebsd/contrib/libpcap/extr_gencode.c_gen_cmp_ge.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BPF_JGE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @gen_cmp_ge], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @gen_cmp_ge(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = load i32, ptr @BPF_JGE, align 4, !tbaa !5
%7 = tail call ptr @gen_ncmp(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef -1, i32 noundef %6, i32 noundef 0, i32 noundef %4) #2
ret ptr %7
}
declare ptr @gen_ncmp(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/libpcap/extr_gencode.c_gen_cmp_ge.c'
source_filename = "AnghaBench/freebsd/contrib/libpcap/extr_gencode.c_gen_cmp_ge.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BPF_JGE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @gen_cmp_ge], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @gen_cmp_ge(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = load i32, ptr @BPF_JGE, align 4, !tbaa !6
%7 = tail call ptr @gen_ncmp(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef -1, i32 noundef %6, i32 noundef 0, i32 noundef %4) #2
ret ptr %7
}
declare ptr @gen_ncmp(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_contrib_libpcap_extr_gencode.c_gen_cmp_ge
|
; ModuleID = 'AnghaBench/linux/arch/nds32/kernel/extr_perf_event_cpu.c_cpu_pmu_get_cpu_events.c'
source_filename = "AnghaBench/linux/arch/nds32/kernel/extr_perf_event_cpu.c_cpu_pmu_get_cpu_events.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@cpu_hw_events = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cpu_pmu_get_cpu_events], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @cpu_pmu_get_cpu_events() #0 {
%1 = tail call ptr @this_cpu_ptr(ptr noundef nonnull @cpu_hw_events) #2
ret ptr %1
}
declare ptr @this_cpu_ptr(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/arch/nds32/kernel/extr_perf_event_cpu.c_cpu_pmu_get_cpu_events.c'
source_filename = "AnghaBench/linux/arch/nds32/kernel/extr_perf_event_cpu.c_cpu_pmu_get_cpu_events.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cpu_hw_events = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cpu_pmu_get_cpu_events], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @cpu_pmu_get_cpu_events() #0 {
%1 = tail call ptr @this_cpu_ptr(ptr noundef nonnull @cpu_hw_events) #2
ret ptr %1
}
declare ptr @this_cpu_ptr(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_arch_nds32_kernel_extr_perf_event_cpu.c_cpu_pmu_get_cpu_events
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_en_port.c_en_stats_adder.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_en_port.c_en_stats_adder.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @en_stats_adder], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @en_stats_adder(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %21
5: ; preds = %3
%6 = ptrtoint ptr %1 to i64
%7 = ptrtoint ptr %0 to i64
%8 = sub i64 %6, %7
%9 = shl i64 %8, 30
%10 = ashr i64 %9, 32
br label %11
11: ; preds = %5, %11
%12 = phi ptr [ %0, %5 ], [ %18, %11 ]
%13 = phi i32 [ 0, %5 ], [ %19, %11 ]
%14 = phi i64 [ 0, %5 ], [ %17, %11 ]
%15 = load i32, ptr %12, align 4, !tbaa !5
%16 = tail call i64 @be64_to_cpu(i32 noundef %15) #2
%17 = add i64 %16, %14
%18 = getelementptr inbounds i32, ptr %12, i64 %10
%19 = add nuw nsw i32 %13, 1
%20 = icmp eq i32 %19, %2
br i1 %20, label %21, label %11, !llvm.loop !9
21: ; preds = %11, %3
%22 = phi i64 [ 0, %3 ], [ %17, %11 ]
ret i64 %22
}
declare i64 @be64_to_cpu(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_en_port.c_en_stats_adder.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_en_port.c_en_stats_adder.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @en_stats_adder], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @en_stats_adder(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %21
5: ; preds = %3
%6 = ptrtoint ptr %1 to i64
%7 = ptrtoint ptr %0 to i64
%8 = sub i64 %6, %7
%9 = shl i64 %8, 30
%10 = ashr i64 %9, 32
br label %11
11: ; preds = %5, %11
%12 = phi ptr [ %0, %5 ], [ %18, %11 ]
%13 = phi i32 [ 0, %5 ], [ %19, %11 ]
%14 = phi i64 [ 0, %5 ], [ %17, %11 ]
%15 = load i32, ptr %12, align 4, !tbaa !6
%16 = tail call i64 @be64_to_cpu(i32 noundef %15) #2
%17 = add i64 %16, %14
%18 = getelementptr inbounds i32, ptr %12, i64 %10
%19 = add nuw nsw i32 %13, 1
%20 = icmp eq i32 %19, %2
br i1 %20, label %21, label %11, !llvm.loop !10
21: ; preds = %11, %3
%22 = phi i64 [ 0, %3 ], [ %17, %11 ]
ret i64 %22
}
declare i64 @be64_to_cpu(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_net_ethernet_mellanox_mlx4_extr_en_port.c_en_stats_adder
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/hwmon/extr_adt7470.c_set_temp_min.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/hwmon/extr_adt7470.c_set_temp_min.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.adt7470_data = type { ptr, i32 }
@EINVAL = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @set_temp_min], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @set_temp_min(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = alloca i64, align 8
%6 = tail call ptr @to_sensor_dev_attr(ptr noundef %1) #3
%7 = tail call ptr @to_i2c_client(ptr noundef %0) #3
%8 = tail call ptr @i2c_get_clientdata(ptr noundef %7) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%9 = call i64 @strict_strtol(ptr noundef %2, i32 noundef 10, ptr noundef nonnull %5) #3
%10 = icmp eq i64 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %4
%12 = load i64, ptr @EINVAL, align 8, !tbaa !5
%13 = sub i64 0, %12
br label %29
14: ; preds = %4
%15 = load i64, ptr %5, align 8, !tbaa !5
%16 = call i64 @DIV_ROUND_CLOSEST(i64 noundef %15, i32 noundef 1000) #3
store i64 %16, ptr %5, align 8, !tbaa !5
%17 = call i64 @SENSORS_LIMIT(i64 noundef %16, i32 noundef 0, i32 noundef 255) #3
store i64 %17, ptr %5, align 8, !tbaa !5
%18 = getelementptr inbounds %struct.adt7470_data, ptr %8, i64 0, i32 1
%19 = call i32 @mutex_lock(ptr noundef nonnull %18) #3
%20 = load i64, ptr %5, align 8, !tbaa !5
%21 = load ptr, ptr %8, align 8, !tbaa !9
%22 = load i64, ptr %6, align 8, !tbaa !13
%23 = getelementptr inbounds i64, ptr %21, i64 %22
store i64 %20, ptr %23, align 8, !tbaa !5
%24 = load i64, ptr %6, align 8, !tbaa !13
%25 = call i32 @ADT7470_TEMP_MIN_REG(i64 noundef %24) #3
%26 = load i64, ptr %5, align 8, !tbaa !5
%27 = call i32 @i2c_smbus_write_byte_data(ptr noundef %7, i32 noundef %25, i64 noundef %26) #3
%28 = call i32 @mutex_unlock(ptr noundef nonnull %18) #3
br label %29
29: ; preds = %14, %11
%30 = phi i64 [ %13, %11 ], [ %3, %14 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret i64 %30
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_sensor_dev_attr(ptr noundef) local_unnamed_addr #2
declare ptr @to_i2c_client(ptr noundef) local_unnamed_addr #2
declare ptr @i2c_get_clientdata(ptr noundef) local_unnamed_addr #2
declare i64 @strict_strtol(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @DIV_ROUND_CLOSEST(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @SENSORS_LIMIT(i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #2
declare i32 @i2c_smbus_write_byte_data(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ADT7470_TEMP_MIN_REG(i64 noundef) local_unnamed_addr #2
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"adt7470_data", !11, i64 0, !12, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"sensor_device_attribute", !6, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/hwmon/extr_adt7470.c_set_temp_min.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/hwmon/extr_adt7470.c_set_temp_min.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @set_temp_min], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @set_temp_min(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = alloca i64, align 8
%6 = tail call ptr @to_sensor_dev_attr(ptr noundef %1) #3
%7 = tail call ptr @to_i2c_client(ptr noundef %0) #3
%8 = tail call ptr @i2c_get_clientdata(ptr noundef %7) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%9 = call i64 @strict_strtol(ptr noundef %2, i32 noundef 10, ptr noundef nonnull %5) #3
%10 = icmp eq i64 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %4
%12 = load i64, ptr @EINVAL, align 8, !tbaa !6
%13 = sub i64 0, %12
br label %29
14: ; preds = %4
%15 = load i64, ptr %5, align 8, !tbaa !6
%16 = call i64 @DIV_ROUND_CLOSEST(i64 noundef %15, i32 noundef 1000) #3
store i64 %16, ptr %5, align 8, !tbaa !6
%17 = call i64 @SENSORS_LIMIT(i64 noundef %16, i32 noundef 0, i32 noundef 255) #3
store i64 %17, ptr %5, align 8, !tbaa !6
%18 = getelementptr inbounds i8, ptr %8, i64 8
%19 = call i32 @mutex_lock(ptr noundef nonnull %18) #3
%20 = load i64, ptr %5, align 8, !tbaa !6
%21 = load ptr, ptr %8, align 8, !tbaa !10
%22 = load i64, ptr %6, align 8, !tbaa !14
%23 = getelementptr inbounds i64, ptr %21, i64 %22
store i64 %20, ptr %23, align 8, !tbaa !6
%24 = load i64, ptr %6, align 8, !tbaa !14
%25 = call i32 @ADT7470_TEMP_MIN_REG(i64 noundef %24) #3
%26 = load i64, ptr %5, align 8, !tbaa !6
%27 = call i32 @i2c_smbus_write_byte_data(ptr noundef %7, i32 noundef %25, i64 noundef %26) #3
%28 = call i32 @mutex_unlock(ptr noundef nonnull %18) #3
br label %29
29: ; preds = %14, %11
%30 = phi i64 [ %13, %11 ], [ %3, %14 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret i64 %30
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_sensor_dev_attr(ptr noundef) local_unnamed_addr #2
declare ptr @to_i2c_client(ptr noundef) local_unnamed_addr #2
declare ptr @i2c_get_clientdata(ptr noundef) local_unnamed_addr #2
declare i64 @strict_strtol(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @DIV_ROUND_CLOSEST(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @SENSORS_LIMIT(i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #2
declare i32 @i2c_smbus_write_byte_data(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ADT7470_TEMP_MIN_REG(i64 noundef) local_unnamed_addr #2
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"adt7470_data", !12, i64 0, !13, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"sensor_device_attribute", !7, i64 0}
|
fastsocket_kernel_drivers_hwmon_extr_adt7470.c_set_temp_min
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/um/sys-i386/extr_ptrace_user.c_ptrace_setregs.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/um/sys-i386/extr_ptrace_user.c_ptrace_setregs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PTRACE_SETREGS = dso_local local_unnamed_addr global i32 0, align 4
@errno = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @ptrace_setregs(i64 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @PTRACE_SETREGS, align 4, !tbaa !5
%4 = tail call i64 @ptrace(i32 noundef %3, i64 noundef %0, i32 noundef 0, ptr noundef %1) #2
%5 = icmp slt i64 %4, 0
%6 = load i32, ptr @errno, align 4
%7 = sub nsw i32 0, %6
%8 = select i1 %5, i32 %7, i32 0
ret i32 %8
}
declare i64 @ptrace(i32 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/um/sys-i386/extr_ptrace_user.c_ptrace_setregs.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/um/sys-i386/extr_ptrace_user.c_ptrace_setregs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PTRACE_SETREGS = common local_unnamed_addr global i32 0, align 4
@errno = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @ptrace_setregs(i64 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @PTRACE_SETREGS, align 4, !tbaa !6
%4 = tail call i64 @ptrace(i32 noundef %3, i64 noundef %0, i32 noundef 0, ptr noundef %1) #2
%5 = icmp slt i64 %4, 0
%6 = load i32, ptr @errno, align 4
%7 = sub nsw i32 0, %6
%8 = select i1 %5, i32 %7, i32 0
ret i32 %8
}
declare i64 @ptrace(i32 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_arch_um_sys-i386_extr_ptrace_user.c_ptrace_setregs
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/iicbus/extr_lm75.c_lm75_conf_write.c'
source_filename = "AnghaBench/freebsd/sys/dev/iicbus/extr_lm75.c_lm75_conf_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.lm75_softc = type { i32, i32, i64 }
@LM75_CONF = dso_local local_unnamed_addr global i32 0, align 4
@LM75_CONF_MASK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @lm75_conf_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @lm75_conf_write(ptr nocapture noundef readonly %0) #0 {
%2 = alloca [2 x i32], align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%3 = load i32, ptr @LM75_CONF, align 4, !tbaa !5
store i32 %3, ptr %2, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.lm75_softc, ptr %0, i64 0, i32 2
%5 = load i64, ptr %4, align 8, !tbaa !9
%6 = trunc i64 %5 to i32
%7 = load i32, ptr @LM75_CONF_MASK, align 4, !tbaa !5
%8 = and i32 %7, %6
%9 = getelementptr inbounds [2 x i32], ptr %2, i64 0, i64 1
store i32 %8, ptr %9, align 4, !tbaa !5
%10 = getelementptr inbounds %struct.lm75_softc, ptr %0, i64 0, i32 1
%11 = load i32, ptr %10, align 4, !tbaa !12
%12 = load i32, ptr %0, align 8, !tbaa !13
%13 = call i64 @lm75_write(i32 noundef %11, i32 noundef %12, ptr noundef nonnull %2, i32 noundef 8) #3
%14 = ashr i64 %13, 63
%15 = trunc i64 %14 to i32
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @lm75_write(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"lm75_softc", !6, i64 0, !6, i64 4, !11, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !6, i64 4}
!13 = !{!10, !6, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/iicbus/extr_lm75.c_lm75_conf_write.c'
source_filename = "AnghaBench/freebsd/sys/dev/iicbus/extr_lm75.c_lm75_conf_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LM75_CONF = common local_unnamed_addr global i32 0, align 4
@LM75_CONF_MASK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @lm75_conf_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -1, 1) i32 @lm75_conf_write(ptr nocapture noundef readonly %0) #0 {
%2 = alloca [2 x i32], align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%3 = load i32, ptr @LM75_CONF, align 4, !tbaa !6
store i32 %3, ptr %2, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load i64, ptr %4, align 8, !tbaa !10
%6 = trunc i64 %5 to i32
%7 = load i32, ptr @LM75_CONF_MASK, align 4, !tbaa !6
%8 = and i32 %7, %6
%9 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %8, ptr %9, align 4, !tbaa !6
%10 = getelementptr inbounds i8, ptr %0, i64 4
%11 = load i32, ptr %10, align 4, !tbaa !13
%12 = load i32, ptr %0, align 8, !tbaa !14
%13 = call i64 @lm75_write(i32 noundef %11, i32 noundef %12, ptr noundef nonnull %2, i32 noundef 8) #3
%14 = ashr i64 %13, 63
%15 = trunc nsw i64 %14 to i32
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @lm75_write(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"lm75_softc", !7, i64 0, !7, i64 4, !12, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !7, i64 4}
!14 = !{!11, !7, i64 0}
|
freebsd_sys_dev_iicbus_extr_lm75.c_lm75_conf_write
|
; ModuleID = 'AnghaBench/linux/drivers/soc/fsl/dpio/extr_qbman-portal.h_qbman_swp_CDAN_set_context_enable.c'
source_filename = "AnghaBench/linux/drivers/soc/fsl/dpio/extr_qbman-portal.h_qbman_swp_CDAN_set_context_enable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CODE_CDAN_WE_EN = dso_local local_unnamed_addr global i32 0, align 4
@CODE_CDAN_WE_CTX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @qbman_swp_CDAN_set_context_enable], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @qbman_swp_CDAN_set_context_enable(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr @CODE_CDAN_WE_EN, align 4, !tbaa !5
%5 = load i32, ptr @CODE_CDAN_WE_CTX, align 4, !tbaa !5
%6 = or i32 %5, %4
%7 = tail call i32 @qbman_swp_CDAN_set(ptr noundef %0, i32 noundef %1, i32 noundef %6, i32 noundef 1, i32 noundef %2) #2
ret i32 %7
}
declare i32 @qbman_swp_CDAN_set(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/soc/fsl/dpio/extr_qbman-portal.h_qbman_swp_CDAN_set_context_enable.c'
source_filename = "AnghaBench/linux/drivers/soc/fsl/dpio/extr_qbman-portal.h_qbman_swp_CDAN_set_context_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CODE_CDAN_WE_EN = common local_unnamed_addr global i32 0, align 4
@CODE_CDAN_WE_CTX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @qbman_swp_CDAN_set_context_enable], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @qbman_swp_CDAN_set_context_enable(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr @CODE_CDAN_WE_EN, align 4, !tbaa !6
%5 = load i32, ptr @CODE_CDAN_WE_CTX, align 4, !tbaa !6
%6 = or i32 %5, %4
%7 = tail call i32 @qbman_swp_CDAN_set(ptr noundef %0, i32 noundef %1, i32 noundef %6, i32 noundef 1, i32 noundef %2) #2
ret i32 %7
}
declare i32 @qbman_swp_CDAN_set(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_soc_fsl_dpio_extr_qbman-portal.h_qbman_swp_CDAN_set_context_enable
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-pxa.c_tm_calc.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-pxa.c_tm_calc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rtc_time = type { i32, i32, i32, i32, i32, i32 }
@RYxR_YEAR_MASK = dso_local local_unnamed_addr global i32 0, align 4
@RYxR_YEAR_S = dso_local local_unnamed_addr global i32 0, align 4
@RYxR_MONTH_MASK = dso_local local_unnamed_addr global i32 0, align 4
@RYxR_MONTH_S = dso_local local_unnamed_addr global i32 0, align 4
@RYxR_DAY_MASK = dso_local local_unnamed_addr global i32 0, align 4
@RDxR_HOUR_MASK = dso_local local_unnamed_addr global i32 0, align 4
@RDxR_HOUR_S = dso_local local_unnamed_addr global i32 0, align 4
@RDxR_MIN_MASK = dso_local local_unnamed_addr global i32 0, align 4
@RDxR_MIN_S = dso_local local_unnamed_addr global i32 0, align 4
@RDxR_SEC_MASK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @tm_calc], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable
define internal void @tm_calc(i32 noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2) #0 {
%4 = load i32, ptr @RYxR_YEAR_MASK, align 4, !tbaa !5
%5 = and i32 %4, %0
%6 = load i32, ptr @RYxR_YEAR_S, align 4, !tbaa !5
%7 = ashr i32 %5, %6
%8 = add nsw i32 %7, -1900
store i32 %8, ptr %2, align 4, !tbaa !9
%9 = load i32, ptr @RYxR_MONTH_MASK, align 4, !tbaa !5
%10 = and i32 %9, %0
%11 = load i32, ptr @RYxR_MONTH_S, align 4, !tbaa !5
%12 = ashr i32 %10, %11
%13 = add nsw i32 %12, -1
%14 = getelementptr inbounds %struct.rtc_time, ptr %2, i64 0, i32 1
store i32 %13, ptr %14, align 4, !tbaa !11
%15 = load i32, ptr @RYxR_DAY_MASK, align 4, !tbaa !5
%16 = and i32 %15, %0
%17 = getelementptr inbounds %struct.rtc_time, ptr %2, i64 0, i32 2
store i32 %16, ptr %17, align 4, !tbaa !12
%18 = load i32, ptr @RDxR_HOUR_MASK, align 4, !tbaa !5
%19 = and i32 %18, %1
%20 = load i32, ptr @RDxR_HOUR_S, align 4, !tbaa !5
%21 = ashr i32 %19, %20
%22 = getelementptr inbounds %struct.rtc_time, ptr %2, i64 0, i32 3
store i32 %21, ptr %22, align 4, !tbaa !13
%23 = load i32, ptr @RDxR_MIN_MASK, align 4, !tbaa !5
%24 = and i32 %23, %1
%25 = load i32, ptr @RDxR_MIN_S, align 4, !tbaa !5
%26 = ashr i32 %24, %25
%27 = getelementptr inbounds %struct.rtc_time, ptr %2, i64 0, i32 4
store i32 %26, ptr %27, align 4, !tbaa !14
%28 = load i32, ptr @RDxR_SEC_MASK, align 4, !tbaa !5
%29 = and i32 %28, %1
%30 = getelementptr inbounds %struct.rtc_time, ptr %2, i64 0, i32 5
store i32 %29, ptr %30, align 4, !tbaa !15
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"rtc_time", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20}
!11 = !{!10, !6, i64 4}
!12 = !{!10, !6, i64 8}
!13 = !{!10, !6, i64 12}
!14 = !{!10, !6, i64 16}
!15 = !{!10, !6, i64 20}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-pxa.c_tm_calc.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-pxa.c_tm_calc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RYxR_YEAR_MASK = common local_unnamed_addr global i32 0, align 4
@RYxR_YEAR_S = common local_unnamed_addr global i32 0, align 4
@RYxR_MONTH_MASK = common local_unnamed_addr global i32 0, align 4
@RYxR_MONTH_S = common local_unnamed_addr global i32 0, align 4
@RYxR_DAY_MASK = common local_unnamed_addr global i32 0, align 4
@RDxR_HOUR_MASK = common local_unnamed_addr global i32 0, align 4
@RDxR_HOUR_S = common local_unnamed_addr global i32 0, align 4
@RDxR_MIN_MASK = common local_unnamed_addr global i32 0, align 4
@RDxR_MIN_S = common local_unnamed_addr global i32 0, align 4
@RDxR_SEC_MASK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tm_calc], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define internal void @tm_calc(i32 noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2) #0 {
%4 = load i32, ptr @RYxR_YEAR_MASK, align 4, !tbaa !6
%5 = and i32 %4, %0
%6 = load i32, ptr @RYxR_YEAR_S, align 4, !tbaa !6
%7 = ashr i32 %5, %6
%8 = add nsw i32 %7, -1900
store i32 %8, ptr %2, align 4, !tbaa !10
%9 = load i32, ptr @RYxR_MONTH_MASK, align 4, !tbaa !6
%10 = and i32 %9, %0
%11 = load i32, ptr @RYxR_MONTH_S, align 4, !tbaa !6
%12 = ashr i32 %10, %11
%13 = add nsw i32 %12, -1
%14 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %13, ptr %14, align 4, !tbaa !12
%15 = load i32, ptr @RYxR_DAY_MASK, align 4, !tbaa !6
%16 = and i32 %15, %0
%17 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %16, ptr %17, align 4, !tbaa !13
%18 = load i32, ptr @RDxR_HOUR_MASK, align 4, !tbaa !6
%19 = and i32 %18, %1
%20 = load i32, ptr @RDxR_HOUR_S, align 4, !tbaa !6
%21 = ashr i32 %19, %20
%22 = getelementptr inbounds i8, ptr %2, i64 12
store i32 %21, ptr %22, align 4, !tbaa !14
%23 = load i32, ptr @RDxR_MIN_MASK, align 4, !tbaa !6
%24 = and i32 %23, %1
%25 = load i32, ptr @RDxR_MIN_S, align 4, !tbaa !6
%26 = ashr i32 %24, %25
%27 = getelementptr inbounds i8, ptr %2, i64 16
store i32 %26, ptr %27, align 4, !tbaa !15
%28 = load i32, ptr @RDxR_SEC_MASK, align 4, !tbaa !6
%29 = and i32 %28, %1
%30 = getelementptr inbounds i8, ptr %2, i64 20
store i32 %29, ptr %30, align 4, !tbaa !16
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"rtc_time", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20}
!12 = !{!11, !7, i64 4}
!13 = !{!11, !7, i64 8}
!14 = !{!11, !7, i64 12}
!15 = !{!11, !7, i64 16}
!16 = !{!11, !7, i64 20}
|
fastsocket_kernel_drivers_rtc_extr_rtc-pxa.c_tm_calc
|
; ModuleID = 'AnghaBench/linux/drivers/staging/comedi/drivers/extr_comedi_isadma.c_comedi_isadma_program.c'
source_filename = "AnghaBench/linux/drivers/staging/comedi/drivers/extr_comedi_isadma.c_comedi_isadma_program.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.comedi_isadma_desc = type { i32, i32, i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @comedi_isadma_program(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = tail call i64 (...) @claim_dma_lock() #2
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call i32 @clear_dma_ff(i32 noundef %3) #2
%5 = load i32, ptr %0, align 4, !tbaa !5
%6 = getelementptr inbounds %struct.comedi_isadma_desc, ptr %0, i64 0, i32 3
%7 = load i32, ptr %6, align 4, !tbaa !10
%8 = tail call i32 @set_dma_mode(i32 noundef %5, i32 noundef %7) #2
%9 = load i32, ptr %0, align 4, !tbaa !5
%10 = getelementptr inbounds %struct.comedi_isadma_desc, ptr %0, i64 0, i32 2
%11 = load i32, ptr %10, align 4, !tbaa !11
%12 = tail call i32 @set_dma_addr(i32 noundef %9, i32 noundef %11) #2
%13 = load i32, ptr %0, align 4, !tbaa !5
%14 = getelementptr inbounds %struct.comedi_isadma_desc, ptr %0, i64 0, i32 1
%15 = load i32, ptr %14, align 4, !tbaa !12
%16 = tail call i32 @set_dma_count(i32 noundef %13, i32 noundef %15) #2
%17 = load i32, ptr %0, align 4, !tbaa !5
%18 = tail call i32 @enable_dma(i32 noundef %17) #2
%19 = tail call i32 @release_dma_lock(i64 noundef %2) #2
ret void
}
declare i64 @claim_dma_lock(...) local_unnamed_addr #1
declare i32 @clear_dma_ff(i32 noundef) local_unnamed_addr #1
declare i32 @set_dma_mode(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_dma_addr(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_dma_count(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @enable_dma(i32 noundef) local_unnamed_addr #1
declare i32 @release_dma_lock(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"comedi_isadma_desc", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 12}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !7, i64 4}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/comedi/drivers/extr_comedi_isadma.c_comedi_isadma_program.c'
source_filename = "AnghaBench/linux/drivers/staging/comedi/drivers/extr_comedi_isadma.c_comedi_isadma_program.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @comedi_isadma_program(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = tail call i64 @claim_dma_lock() #2
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call i32 @clear_dma_ff(i32 noundef %3) #2
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %0, i64 12
%7 = load i32, ptr %6, align 4, !tbaa !11
%8 = tail call i32 @set_dma_mode(i32 noundef %5, i32 noundef %7) #2
%9 = load i32, ptr %0, align 4, !tbaa !6
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load i32, ptr %10, align 4, !tbaa !12
%12 = tail call i32 @set_dma_addr(i32 noundef %9, i32 noundef %11) #2
%13 = load i32, ptr %0, align 4, !tbaa !6
%14 = getelementptr inbounds i8, ptr %0, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !13
%16 = tail call i32 @set_dma_count(i32 noundef %13, i32 noundef %15) #2
%17 = load i32, ptr %0, align 4, !tbaa !6
%18 = tail call i32 @enable_dma(i32 noundef %17) #2
%19 = tail call i32 @release_dma_lock(i64 noundef %2) #2
ret void
}
declare i64 @claim_dma_lock(...) local_unnamed_addr #1
declare i32 @clear_dma_ff(i32 noundef) local_unnamed_addr #1
declare i32 @set_dma_mode(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_dma_addr(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_dma_count(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @enable_dma(i32 noundef) local_unnamed_addr #1
declare i32 @release_dma_lock(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"comedi_isadma_desc", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 12}
!12 = !{!7, !8, i64 8}
!13 = !{!7, !8, i64 4}
|
linux_drivers_staging_comedi_drivers_extr_comedi_isadma.c_comedi_isadma_program
|
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StGetHubAdminOptions.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StGetHubAdminOptions.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_14__ = type { i64, ptr }
%struct.TYPE_15__ = type { i32, ptr, i32 }
%struct.TYPE_16__ = type { i32, i32 }
%struct.TYPE_17__ = type { i32, i32, i32 }
@CHECK_RIGHT = dso_local local_unnamed_addr global i32 0, align 4
@NO_SUPPORT_FOR_BRIDGE = dso_local local_unnamed_addr global i32 0, align 4
@SERVER_TYPE_FARM_MEMBER = dso_local local_unnamed_addr global i64 0, align 8
@ERR_NOT_SUPPORTED = dso_local local_unnamed_addr global i64 0, align 8
@ERR_HUB_NOT_FOUND = dso_local local_unnamed_addr global i64 0, align 8
@ERR_NO_ERROR = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i64 @StGetHubAdminOptions(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load i64, ptr %3, align 8, !tbaa !10
%5 = load i64, ptr @SERVER_TYPE_FARM_MEMBER, align 8, !tbaa !13
%6 = icmp eq i64 %4, %5
br i1 %6, label %57, label %7
7: ; preds = %2
%8 = getelementptr inbounds %struct.TYPE_14__, ptr %3, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !14
%10 = tail call i32 @LockHubList(ptr noundef %9) #2
%11 = getelementptr inbounds %struct.TYPE_15__, ptr %1, i64 0, i32 2
%12 = load i32, ptr %11, align 8, !tbaa !15
%13 = tail call ptr @GetHub(ptr noundef %9, i32 noundef %12) #2
%14 = tail call i32 @UnlockHubList(ptr noundef %9) #2
%15 = icmp eq ptr %13, null
br i1 %15, label %57, label %16
16: ; preds = %7
%17 = tail call i32 @FreeRpcAdminOption(ptr noundef nonnull %1) #2
%18 = tail call i32 @Zero(ptr noundef nonnull %1, i32 noundef 24) #2
%19 = load i32, ptr %11, align 8, !tbaa !15
%20 = getelementptr inbounds %struct.TYPE_16__, ptr %13, i64 0, i32 1
%21 = load i32, ptr %20, align 4, !tbaa !18
%22 = tail call i32 @StrCpy(i32 noundef %19, i32 noundef 4, i32 noundef %21) #2
%23 = load i32, ptr %13, align 4, !tbaa !20
%24 = tail call i32 @LockList(i32 noundef %23) #2
%25 = load i32, ptr %13, align 4, !tbaa !20
%26 = tail call i32 @LIST_NUM(i32 noundef %25) #2
store i32 %26, ptr %1, align 8, !tbaa !21
%27 = mul i32 %26, 12
%28 = tail call ptr @ZeroMalloc(i32 noundef %27) #2
%29 = getelementptr inbounds %struct.TYPE_15__, ptr %1, i64 0, i32 1
store ptr %28, ptr %29, align 8, !tbaa !22
%30 = load i32, ptr %1, align 8, !tbaa !21
%31 = icmp eq i32 %30, 0
br i1 %31, label %53, label %32
32: ; preds = %16, %32
%33 = phi i64 [ %49, %32 ], [ 0, %16 ]
%34 = load i32, ptr %13, align 4, !tbaa !20
%35 = tail call ptr @LIST_DATA(i32 noundef %34, i64 noundef %33) #2
%36 = load ptr, ptr %29, align 8, !tbaa !22
%37 = getelementptr inbounds %struct.TYPE_17__, ptr %36, i64 %33
%38 = load i32, ptr %37, align 4, !tbaa !23
%39 = load i32, ptr %35, align 4, !tbaa !23
%40 = tail call i32 @StrCpy(i32 noundef %38, i32 noundef 4, i32 noundef %39) #2
%41 = getelementptr inbounds %struct.TYPE_17__, ptr %35, i64 0, i32 2
%42 = load i32, ptr %41, align 4, !tbaa !25
%43 = getelementptr inbounds %struct.TYPE_17__, ptr %36, i64 %33, i32 2
store i32 %42, ptr %43, align 4, !tbaa !25
%44 = getelementptr inbounds %struct.TYPE_17__, ptr %36, i64 %33, i32 1
%45 = load i32, ptr %44, align 4, !tbaa !26
%46 = load i32, ptr %37, align 4, !tbaa !23
%47 = tail call i32 @GetHubAdminOptionHelpString(i32 noundef %46) #2
%48 = tail call i32 @UniStrCpy(i32 noundef %45, i32 noundef 4, i32 noundef %47) #2
%49 = add nuw i64 %33, 1
%50 = load i32, ptr %1, align 8, !tbaa !21
%51 = sext i32 %50 to i64
%52 = icmp ult i64 %49, %51
br i1 %52, label %32, label %53, !llvm.loop !27
53: ; preds = %32, %16
%54 = load i32, ptr %13, align 4, !tbaa !20
%55 = tail call i32 @UnlockList(i32 noundef %54) #2
%56 = tail call i32 @ReleaseHub(ptr noundef nonnull %13) #2
br label %57
57: ; preds = %7, %2, %53
%58 = phi ptr [ @ERR_NO_ERROR, %53 ], [ @ERR_NOT_SUPPORTED, %2 ], [ @ERR_HUB_NOT_FOUND, %7 ]
%59 = load i64, ptr %58, align 8, !tbaa !13
ret i64 %59
}
declare i32 @LockHubList(ptr noundef) local_unnamed_addr #1
declare ptr @GetHub(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @UnlockHubList(ptr noundef) local_unnamed_addr #1
declare i32 @FreeRpcAdminOption(ptr noundef) local_unnamed_addr #1
declare i32 @Zero(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @StrCpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LockList(i32 noundef) local_unnamed_addr #1
declare i32 @LIST_NUM(i32 noundef) local_unnamed_addr #1
declare ptr @ZeroMalloc(i32 noundef) local_unnamed_addr #1
declare ptr @LIST_DATA(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @UniStrCpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @GetHubAdminOptionHelpString(i32 noundef) local_unnamed_addr #1
declare i32 @UnlockList(i32 noundef) local_unnamed_addr #1
declare i32 @ReleaseHub(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_18__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_14__", !12, i64 0, !7, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!11, !7, i64 8}
!15 = !{!16, !17, i64 16}
!16 = !{!"TYPE_15__", !17, i64 0, !7, i64 8, !17, i64 16}
!17 = !{!"int", !8, i64 0}
!18 = !{!19, !17, i64 4}
!19 = !{!"TYPE_16__", !17, i64 0, !17, i64 4}
!20 = !{!19, !17, i64 0}
!21 = !{!16, !17, i64 0}
!22 = !{!16, !7, i64 8}
!23 = !{!24, !17, i64 0}
!24 = !{!"TYPE_17__", !17, i64 0, !17, i64 4, !17, i64 8}
!25 = !{!24, !17, i64 8}
!26 = !{!24, !17, i64 4}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StGetHubAdminOptions.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StGetHubAdminOptions.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_17__ = type { i32, i32, i32 }
@CHECK_RIGHT = common local_unnamed_addr global i32 0, align 4
@NO_SUPPORT_FOR_BRIDGE = common local_unnamed_addr global i32 0, align 4
@SERVER_TYPE_FARM_MEMBER = common local_unnamed_addr global i64 0, align 8
@ERR_NOT_SUPPORTED = common local_unnamed_addr global i64 0, align 8
@ERR_HUB_NOT_FOUND = common local_unnamed_addr global i64 0, align 8
@ERR_NO_ERROR = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @StGetHubAdminOptions(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load i64, ptr %3, align 8, !tbaa !11
%5 = load i64, ptr @SERVER_TYPE_FARM_MEMBER, align 8, !tbaa !14
%6 = icmp eq i64 %4, %5
br i1 %6, label %57, label %7
7: ; preds = %2
%8 = getelementptr inbounds i8, ptr %3, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !15
%10 = tail call i32 @LockHubList(ptr noundef %9) #2
%11 = getelementptr inbounds i8, ptr %1, i64 16
%12 = load i32, ptr %11, align 8, !tbaa !16
%13 = tail call ptr @GetHub(ptr noundef %9, i32 noundef %12) #2
%14 = tail call i32 @UnlockHubList(ptr noundef %9) #2
%15 = icmp eq ptr %13, null
br i1 %15, label %57, label %16
16: ; preds = %7
%17 = tail call i32 @FreeRpcAdminOption(ptr noundef nonnull %1) #2
%18 = tail call i32 @Zero(ptr noundef nonnull %1, i32 noundef 24) #2
%19 = load i32, ptr %11, align 8, !tbaa !16
%20 = getelementptr inbounds i8, ptr %13, i64 4
%21 = load i32, ptr %20, align 4, !tbaa !19
%22 = tail call i32 @StrCpy(i32 noundef %19, i32 noundef 4, i32 noundef %21) #2
%23 = load i32, ptr %13, align 4, !tbaa !21
%24 = tail call i32 @LockList(i32 noundef %23) #2
%25 = load i32, ptr %13, align 4, !tbaa !21
%26 = tail call i32 @LIST_NUM(i32 noundef %25) #2
store i32 %26, ptr %1, align 8, !tbaa !22
%27 = mul i32 %26, 12
%28 = tail call ptr @ZeroMalloc(i32 noundef %27) #2
%29 = getelementptr inbounds i8, ptr %1, i64 8
store ptr %28, ptr %29, align 8, !tbaa !23
%30 = load i32, ptr %1, align 8, !tbaa !22
%31 = icmp eq i32 %30, 0
br i1 %31, label %53, label %32
32: ; preds = %16, %32
%33 = phi i64 [ %49, %32 ], [ 0, %16 ]
%34 = load i32, ptr %13, align 4, !tbaa !21
%35 = tail call ptr @LIST_DATA(i32 noundef %34, i64 noundef %33) #2
%36 = load ptr, ptr %29, align 8, !tbaa !23
%37 = getelementptr inbounds %struct.TYPE_17__, ptr %36, i64 %33
%38 = load i32, ptr %37, align 4, !tbaa !24
%39 = load i32, ptr %35, align 4, !tbaa !24
%40 = tail call i32 @StrCpy(i32 noundef %38, i32 noundef 4, i32 noundef %39) #2
%41 = getelementptr inbounds i8, ptr %35, i64 8
%42 = load i32, ptr %41, align 4, !tbaa !26
%43 = getelementptr inbounds i8, ptr %37, i64 8
store i32 %42, ptr %43, align 4, !tbaa !26
%44 = getelementptr inbounds i8, ptr %37, i64 4
%45 = load i32, ptr %44, align 4, !tbaa !27
%46 = load i32, ptr %37, align 4, !tbaa !24
%47 = tail call i32 @GetHubAdminOptionHelpString(i32 noundef %46) #2
%48 = tail call i32 @UniStrCpy(i32 noundef %45, i32 noundef 4, i32 noundef %47) #2
%49 = add nuw i64 %33, 1
%50 = load i32, ptr %1, align 8, !tbaa !22
%51 = sext i32 %50 to i64
%52 = icmp ult i64 %49, %51
br i1 %52, label %32, label %53, !llvm.loop !28
53: ; preds = %32, %16
%54 = load i32, ptr %13, align 4, !tbaa !21
%55 = tail call i32 @UnlockList(i32 noundef %54) #2
%56 = tail call i32 @ReleaseHub(ptr noundef nonnull %13) #2
br label %57
57: ; preds = %7, %2, %53
%58 = phi ptr [ @ERR_NO_ERROR, %53 ], [ @ERR_NOT_SUPPORTED, %2 ], [ @ERR_HUB_NOT_FOUND, %7 ]
%59 = load i64, ptr %58, align 8, !tbaa !14
ret i64 %59
}
declare i32 @LockHubList(ptr noundef) local_unnamed_addr #1
declare ptr @GetHub(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @UnlockHubList(ptr noundef) local_unnamed_addr #1
declare i32 @FreeRpcAdminOption(ptr noundef) local_unnamed_addr #1
declare i32 @Zero(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @StrCpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LockList(i32 noundef) local_unnamed_addr #1
declare i32 @LIST_NUM(i32 noundef) local_unnamed_addr #1
declare ptr @ZeroMalloc(i32 noundef) local_unnamed_addr #1
declare ptr @LIST_DATA(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @UniStrCpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @GetHubAdminOptionHelpString(i32 noundef) local_unnamed_addr #1
declare i32 @UnlockList(i32 noundef) local_unnamed_addr #1
declare i32 @ReleaseHub(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_18__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_14__", !13, i64 0, !8, i64 8}
!13 = !{!"long", !9, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!12, !8, i64 8}
!16 = !{!17, !18, i64 16}
!17 = !{!"TYPE_15__", !18, i64 0, !8, i64 8, !18, i64 16}
!18 = !{!"int", !9, i64 0}
!19 = !{!20, !18, i64 4}
!20 = !{!"TYPE_16__", !18, i64 0, !18, i64 4}
!21 = !{!20, !18, i64 0}
!22 = !{!17, !18, i64 0}
!23 = !{!17, !8, i64 8}
!24 = !{!25, !18, i64 0}
!25 = !{!"TYPE_17__", !18, i64 0, !18, i64 4, !18, i64 8}
!26 = !{!25, !18, i64 8}
!27 = !{!25, !18, i64 4}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
|
SoftEtherVPN_src_Cedar_extr_Admin.c_StGetHubAdminOptions
|
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_thinkpad_acpi.c_tpacpi_brightness_nvram_get.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_thinkpad_acpi.c_tpacpi_brightness_nvram_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TP_NVRAM_ADDR_BRIGHTNESS = dso_local local_unnamed_addr global i32 0, align 4
@TP_NVRAM_MASK_LEVEL_BRIGHTNESS = dso_local local_unnamed_addr global i32 0, align 4
@TP_NVRAM_POS_LEVEL_BRIGHTNESS = dso_local local_unnamed_addr global i32 0, align 4
@bright_maxlvl = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @tpacpi_brightness_nvram_get], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @tpacpi_brightness_nvram_get() #0 {
%1 = load i32, ptr @TP_NVRAM_ADDR_BRIGHTNESS, align 4, !tbaa !5
%2 = tail call i32 @nvram_read_byte(i32 noundef %1) #2
%3 = load i32, ptr @TP_NVRAM_MASK_LEVEL_BRIGHTNESS, align 4, !tbaa !5
%4 = and i32 %3, %2
%5 = load i32, ptr @TP_NVRAM_POS_LEVEL_BRIGHTNESS, align 4, !tbaa !5
%6 = lshr i32 %4, %5
%7 = load i32, ptr @bright_maxlvl, align 4, !tbaa !5
%8 = and i32 %6, %7
ret i32 %8
}
declare i32 @nvram_read_byte(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_thinkpad_acpi.c_tpacpi_brightness_nvram_get.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_thinkpad_acpi.c_tpacpi_brightness_nvram_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TP_NVRAM_ADDR_BRIGHTNESS = common local_unnamed_addr global i32 0, align 4
@TP_NVRAM_MASK_LEVEL_BRIGHTNESS = common local_unnamed_addr global i32 0, align 4
@TP_NVRAM_POS_LEVEL_BRIGHTNESS = common local_unnamed_addr global i32 0, align 4
@bright_maxlvl = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tpacpi_brightness_nvram_get], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @tpacpi_brightness_nvram_get() #0 {
%1 = load i32, ptr @TP_NVRAM_ADDR_BRIGHTNESS, align 4, !tbaa !6
%2 = tail call i32 @nvram_read_byte(i32 noundef %1) #2
%3 = load i32, ptr @TP_NVRAM_MASK_LEVEL_BRIGHTNESS, align 4, !tbaa !6
%4 = and i32 %3, %2
%5 = load i32, ptr @TP_NVRAM_POS_LEVEL_BRIGHTNESS, align 4, !tbaa !6
%6 = lshr i32 %4, %5
%7 = load i32, ptr @bright_maxlvl, align 4, !tbaa !6
%8 = and i32 %6, %7
ret i32 %8
}
declare i32 @nvram_read_byte(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_platform_x86_extr_thinkpad_acpi.c_tpacpi_brightness_nvram_get
|
; ModuleID = 'AnghaBench/freebsd/sys/arm/broadcom/bcm2835/extr_bcm2836.c_bcm_lintc_post_filter.c'
source_filename = "AnghaBench/freebsd/sys/arm/broadcom/bcm2835/extr_bcm2836.c_bcm_lintc_post_filter.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @bcm_lintc_post_filter], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @bcm_lintc_post_filter(i32 %0, ptr nocapture readnone %1) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/sys/arm/broadcom/bcm2835/extr_bcm2836.c_bcm_lintc_post_filter.c'
source_filename = "AnghaBench/freebsd/sys/arm/broadcom/bcm2835/extr_bcm2836.c_bcm_lintc_post_filter.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @bcm_lintc_post_filter], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @bcm_lintc_post_filter(i32 %0, ptr nocapture readnone %1) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_sys_arm_broadcom_bcm2835_extr_bcm2836.c_bcm_lintc_post_filter
|
; ModuleID = 'AnghaBench/sqlcipher/ext/fts5/extr_fts5_expr.c_fts5ExprFunctionHr.c'
source_filename = "AnghaBench/sqlcipher/ext/fts5/extr_fts5_expr.c_fts5ExprFunctionHr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @fts5ExprFunctionHr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @fts5ExprFunctionHr(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @fts5ExprFunction(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef 0) #2
ret void
}
declare i32 @fts5ExprFunction(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/sqlcipher/ext/fts5/extr_fts5_expr.c_fts5ExprFunctionHr.c'
source_filename = "AnghaBench/sqlcipher/ext/fts5/extr_fts5_expr.c_fts5ExprFunctionHr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @fts5ExprFunctionHr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @fts5ExprFunctionHr(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @fts5ExprFunction(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef 0) #2
ret void
}
declare i32 @fts5ExprFunction(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
sqlcipher_ext_fts5_extr_fts5_expr.c_fts5ExprFunctionHr
|
; ModuleID = 'AnghaBench/openssl/crypto/evp/extr_evp_lib.c_EVP_CIPHER_asn1_to_param.c'
source_filename = "AnghaBench/openssl/crypto/evp/extr_evp_lib.c_EVP_CIPHER_asn1_to_param.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_10__ = type { ptr, ptr }
@EVP_CIPH_FLAG_CUSTOM_ASN1 = dso_local local_unnamed_addr global i32 0, align 4
@OSSL_CIPHER_PARAM_ALG_ID = dso_local local_unnamed_addr global i32 0, align 4
@EVP_F_EVP_CIPHER_ASN1_TO_PARAM = dso_local local_unnamed_addr global i32 0, align 4
@EVP_R_UNSUPPORTED_CIPHER = dso_local local_unnamed_addr global i32 0, align 4
@EVP_R_CIPHER_PARAMETER_ERROR = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @EVP_CIPHER_asn1_to_param(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca [3 x i32], align 4
%4 = alloca ptr, align 8
%5 = load ptr, ptr %0, align 8, !tbaa !5
%6 = load ptr, ptr %5, align 8, !tbaa !10
%7 = icmp eq ptr %6, null
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = tail call i32 %6(ptr noundef nonnull %0, ptr noundef %1) #4
br label %40
10: ; preds = %2
%11 = tail call i32 @EVP_CIPHER_flags(ptr noundef nonnull %5) #4
%12 = load i32, ptr @EVP_CIPH_FLAG_CUSTOM_ASN1, align 4, !tbaa !12
%13 = and i32 %12, %11
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %19
15: ; preds = %10
%16 = tail call i32 @EVP_CIPHER_mode(ptr noundef nonnull %5) #4
switch i32 %16, label %17 [
i32 129, label %54
i32 131, label %43
i32 132, label %43
i32 128, label %43
i32 130, label %43
]
17: ; preds = %15
%18 = tail call i32 @EVP_CIPHER_get_asn1_iv(ptr noundef nonnull %0, ptr noundef %1) #4
br label %40
19: ; preds = %10
%20 = getelementptr inbounds %struct.TYPE_10__, ptr %5, i64 0, i32 1
%21 = load ptr, ptr %20, align 8, !tbaa !14
%22 = icmp eq ptr %21, null
br i1 %22, label %43, label %23
23: ; preds = %19
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
store ptr null, ptr %4, align 8, !tbaa !15
%24 = call i32 @i2d_ASN1_TYPE(ptr noundef %1, ptr noundef nonnull %4) #4
%25 = icmp sgt i32 %24, -1
br i1 %25, label %26, label %38
26: ; preds = %23
%27 = load i32, ptr @OSSL_CIPHER_PARAM_ALG_ID, align 4, !tbaa !12
%28 = load ptr, ptr %4, align 8, !tbaa !15
%29 = zext nneg i32 %24 to i64
%30 = call i32 @OSSL_PARAM_construct_octet_string(i32 noundef %27, ptr noundef %28, i64 noundef %29) #4
%31 = getelementptr inbounds i32, ptr %3, i64 1
store i32 %30, ptr %3, align 4, !tbaa !12
%32 = call i32 (...) @OSSL_PARAM_construct_end() #4
store i32 %32, ptr %31, align 4, !tbaa !12
%33 = call i64 @EVP_CIPHER_CTX_set_params(ptr noundef nonnull %0, ptr noundef nonnull %3) #4
%34 = icmp eq i64 %33, 0
%35 = select i1 %34, i32 -1, i32 1
%36 = load ptr, ptr %4, align 8, !tbaa !15
%37 = call i32 @OPENSSL_free(ptr noundef %36) #4
br label %38
38: ; preds = %26, %23
%39 = phi i32 [ %35, %26 ], [ -1, %23 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #4
br label %47
40: ; preds = %17, %8
%41 = phi i32 [ %9, %8 ], [ %18, %17 ]
%42 = icmp eq i32 %41, -2
br i1 %42, label %43, label %47
43: ; preds = %15, %15, %15, %15, %19, %40
%44 = load i32, ptr @EVP_F_EVP_CIPHER_ASN1_TO_PARAM, align 4, !tbaa !12
%45 = load i32, ptr @EVP_R_UNSUPPORTED_CIPHER, align 4, !tbaa !12
%46 = tail call i32 @EVPerr(i32 noundef %44, i32 noundef %45) #4
br label %54
47: ; preds = %38, %40
%48 = phi i32 [ %41, %40 ], [ %39, %38 ]
%49 = icmp slt i32 %48, 1
br i1 %49, label %50, label %54
50: ; preds = %47
%51 = load i32, ptr @EVP_F_EVP_CIPHER_ASN1_TO_PARAM, align 4, !tbaa !12
%52 = load i32, ptr @EVP_R_CIPHER_PARAMETER_ERROR, align 4, !tbaa !12
%53 = call i32 @EVPerr(i32 noundef %51, i32 noundef %52) #4
br label %54
54: ; preds = %15, %47, %50, %43
%55 = phi i32 [ %48, %47 ], [ %48, %50 ], [ -2, %43 ], [ 1, %15 ]
%56 = call i32 @llvm.smax.i32(i32 %55, i32 -1)
ret i32 %56
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @EVP_CIPHER_flags(ptr noundef) local_unnamed_addr #2
declare i32 @EVP_CIPHER_mode(ptr noundef) local_unnamed_addr #2
declare i32 @EVP_CIPHER_get_asn1_iv(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @i2d_ASN1_TYPE(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @OSSL_PARAM_construct_octet_string(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @OSSL_PARAM_construct_end(...) local_unnamed_addr #2
declare i64 @EVP_CIPHER_CTX_set_params(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @OPENSSL_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @EVPerr(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_9__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_10__", !7, i64 0, !7, i64 8}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!11, !7, i64 8}
!15 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/openssl/crypto/evp/extr_evp_lib.c_EVP_CIPHER_asn1_to_param.c'
source_filename = "AnghaBench/openssl/crypto/evp/extr_evp_lib.c_EVP_CIPHER_asn1_to_param.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EVP_CIPH_FLAG_CUSTOM_ASN1 = common local_unnamed_addr global i32 0, align 4
@OSSL_CIPHER_PARAM_ALG_ID = common local_unnamed_addr global i32 0, align 4
@EVP_F_EVP_CIPHER_ASN1_TO_PARAM = common local_unnamed_addr global i32 0, align 4
@EVP_R_UNSUPPORTED_CIPHER = common local_unnamed_addr global i32 0, align 4
@EVP_R_CIPHER_PARAMETER_ERROR = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @EVP_CIPHER_asn1_to_param(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca [3 x i32], align 4
%4 = alloca ptr, align 8
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = icmp eq ptr %6, null
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = tail call i32 %6(ptr noundef nonnull %0, ptr noundef %1) #4
br label %40
10: ; preds = %2
%11 = tail call i32 @EVP_CIPHER_flags(ptr noundef nonnull %5) #4
%12 = load i32, ptr @EVP_CIPH_FLAG_CUSTOM_ASN1, align 4, !tbaa !13
%13 = and i32 %12, %11
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %19
15: ; preds = %10
%16 = tail call i32 @EVP_CIPHER_mode(ptr noundef nonnull %5) #4
switch i32 %16, label %17 [
i32 129, label %54
i32 131, label %43
i32 132, label %43
i32 128, label %43
i32 130, label %43
]
17: ; preds = %15
%18 = tail call i32 @EVP_CIPHER_get_asn1_iv(ptr noundef nonnull %0, ptr noundef %1) #4
br label %40
19: ; preds = %10
%20 = getelementptr inbounds i8, ptr %5, i64 8
%21 = load ptr, ptr %20, align 8, !tbaa !15
%22 = icmp eq ptr %21, null
br i1 %22, label %43, label %23
23: ; preds = %19
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
store ptr null, ptr %4, align 8, !tbaa !16
%24 = call i32 @i2d_ASN1_TYPE(ptr noundef %1, ptr noundef nonnull %4) #4
%25 = icmp sgt i32 %24, -1
br i1 %25, label %26, label %38
26: ; preds = %23
%27 = load i32, ptr @OSSL_CIPHER_PARAM_ALG_ID, align 4, !tbaa !13
%28 = load ptr, ptr %4, align 8, !tbaa !16
%29 = zext nneg i32 %24 to i64
%30 = call i32 @OSSL_PARAM_construct_octet_string(i32 noundef %27, ptr noundef %28, i64 noundef %29) #4
%31 = getelementptr inbounds i8, ptr %3, i64 4
store i32 %30, ptr %3, align 4, !tbaa !13
%32 = call i32 @OSSL_PARAM_construct_end() #4
store i32 %32, ptr %31, align 4, !tbaa !13
%33 = call i64 @EVP_CIPHER_CTX_set_params(ptr noundef nonnull %0, ptr noundef nonnull %3) #4
%34 = icmp eq i64 %33, 0
%35 = select i1 %34, i32 -1, i32 1
%36 = load ptr, ptr %4, align 8, !tbaa !16
%37 = call i32 @OPENSSL_free(ptr noundef %36) #4
br label %38
38: ; preds = %26, %23
%39 = phi i32 [ %35, %26 ], [ -1, %23 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #4
br label %47
40: ; preds = %17, %8
%41 = phi i32 [ %9, %8 ], [ %18, %17 ]
%42 = icmp eq i32 %41, -2
br i1 %42, label %43, label %47
43: ; preds = %15, %15, %15, %15, %19, %40
%44 = load i32, ptr @EVP_F_EVP_CIPHER_ASN1_TO_PARAM, align 4, !tbaa !13
%45 = load i32, ptr @EVP_R_UNSUPPORTED_CIPHER, align 4, !tbaa !13
%46 = tail call i32 @EVPerr(i32 noundef %44, i32 noundef %45) #4
br label %54
47: ; preds = %38, %40
%48 = phi i32 [ %41, %40 ], [ %39, %38 ]
%49 = icmp slt i32 %48, 1
br i1 %49, label %50, label %54
50: ; preds = %47
%51 = load i32, ptr @EVP_F_EVP_CIPHER_ASN1_TO_PARAM, align 4, !tbaa !13
%52 = load i32, ptr @EVP_R_CIPHER_PARAMETER_ERROR, align 4, !tbaa !13
%53 = call i32 @EVPerr(i32 noundef %51, i32 noundef %52) #4
br label %54
54: ; preds = %15, %47, %50, %43
%55 = phi i32 [ %48, %47 ], [ %48, %50 ], [ -2, %43 ], [ 1, %15 ]
%56 = call i32 @llvm.smax.i32(i32 %55, i32 -1)
ret i32 %56
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @EVP_CIPHER_flags(ptr noundef) local_unnamed_addr #2
declare i32 @EVP_CIPHER_mode(ptr noundef) local_unnamed_addr #2
declare i32 @EVP_CIPHER_get_asn1_iv(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @i2d_ASN1_TYPE(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @OSSL_PARAM_construct_octet_string(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @OSSL_PARAM_construct_end(...) local_unnamed_addr #2
declare i64 @EVP_CIPHER_CTX_set_params(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @OPENSSL_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @EVPerr(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_9__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_10__", !8, i64 0, !8, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!12, !8, i64 8}
!16 = !{!8, !8, i64 0}
|
openssl_crypto_evp_extr_evp_lib.c_EVP_CIPHER_asn1_to_param
|
; ModuleID = 'AnghaBench/linux/drivers/bus/extr_sunxi-rsb.c_regmap_sunxi_rsb_reg_write.c'
source_filename = "AnghaBench/linux/drivers/bus/extr_sunxi-rsb.c_regmap_sunxi_rsb_reg_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sunxi_rsb_ctx = type { i32, ptr }
%struct.sunxi_rsb_device = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @regmap_sunxi_rsb_reg_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @regmap_sunxi_rsb_reg_write(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = alloca i32, align 4
store i32 %2, ptr %4, align 4, !tbaa !5
%5 = getelementptr inbounds %struct.sunxi_rsb_ctx, ptr %0, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !9
%7 = getelementptr inbounds %struct.sunxi_rsb_device, ptr %6, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = load i32, ptr %6, align 4, !tbaa !14
%10 = load i32, ptr %0, align 8, !tbaa !15
%11 = call i32 @sunxi_rsb_write(i32 noundef %8, i32 noundef %9, i32 noundef %1, ptr noundef nonnull %4, i32 noundef %10) #2
ret i32 %11
}
declare i32 @sunxi_rsb_write(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"sunxi_rsb_ctx", !6, i64 0, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 4}
!13 = !{!"sunxi_rsb_device", !6, i64 0, !6, i64 4}
!14 = !{!13, !6, i64 0}
!15 = !{!10, !6, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/bus/extr_sunxi-rsb.c_regmap_sunxi_rsb_reg_write.c'
source_filename = "AnghaBench/linux/drivers/bus/extr_sunxi-rsb.c_regmap_sunxi_rsb_reg_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @regmap_sunxi_rsb_reg_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @regmap_sunxi_rsb_reg_write(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = alloca i32, align 4
store i32 %2, ptr %4, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !10
%7 = getelementptr inbounds i8, ptr %6, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !13
%9 = load i32, ptr %6, align 4, !tbaa !15
%10 = load i32, ptr %0, align 8, !tbaa !16
%11 = call i32 @sunxi_rsb_write(i32 noundef %8, i32 noundef %9, i32 noundef %1, ptr noundef nonnull %4, i32 noundef %10) #2
ret i32 %11
}
declare i32 @sunxi_rsb_write(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"sunxi_rsb_ctx", !7, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 4}
!14 = !{!"sunxi_rsb_device", !7, i64 0, !7, i64 4}
!15 = !{!14, !7, i64 0}
!16 = !{!11, !7, i64 0}
|
linux_drivers_bus_extr_sunxi-rsb.c_regmap_sunxi_rsb_reg_write
|
; ModuleID = 'AnghaBench/reactos/dll/win32/advpack/extr_reg.c_free_strtable.c'
source_filename = "AnghaBench/reactos/dll/win32/advpack/extr_reg.c_free_strtable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i64, ptr, ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @free_strtable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @free_strtable(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = icmp eq i64 %2, 0
br i1 %3, label %21, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %18, %6 ]
%8 = tail call i32 (...) @GetProcessHeap() #2
%9 = load ptr, ptr %5, align 8, !tbaa !11
%10 = getelementptr inbounds %struct.TYPE_4__, ptr %9, i64 %7, i32 3
%11 = load ptr, ptr %10, align 8, !tbaa !12
%12 = tail call i32 @HeapFree(i32 noundef %8, i32 noundef 0, ptr noundef %11) #2
%13 = tail call i32 (...) @GetProcessHeap() #2
%14 = load ptr, ptr %5, align 8, !tbaa !11
%15 = getelementptr inbounds %struct.TYPE_4__, ptr %14, i64 %7, i32 2
%16 = load ptr, ptr %15, align 8, !tbaa !13
%17 = tail call i32 @HeapFree(i32 noundef %13, i32 noundef 0, ptr noundef %16) #2
%18 = add nuw i64 %7, 1
%19 = load i64, ptr %0, align 8, !tbaa !5
%20 = icmp ult i64 %18, %19
br i1 %20, label %6, label %21, !llvm.loop !14
21: ; preds = %6, %1
%22 = tail call i32 (...) @GetProcessHeap() #2
%23 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%24 = load ptr, ptr %23, align 8, !tbaa !11
%25 = tail call i32 @HeapFree(i32 noundef %22, i32 noundef 0, ptr noundef %24) #2
%26 = tail call i32 (...) @GetProcessHeap() #2
%27 = tail call i32 @HeapFree(i32 noundef %26, i32 noundef 0, ptr noundef nonnull %0) #2
ret void
}
declare i32 @HeapFree(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @GetProcessHeap(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !10, i64 24}
!13 = !{!6, !10, i64 16}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/reactos/dll/win32/advpack/extr_reg.c_free_strtable.c'
source_filename = "AnghaBench/reactos/dll/win32/advpack/extr_reg.c_free_strtable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i64, ptr, ptr, ptr }
@llvm.used = appending global [1 x ptr] [ptr @free_strtable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @free_strtable(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %21, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 8
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %18, %6 ]
%8 = tail call i32 @GetProcessHeap() #2
%9 = load ptr, ptr %5, align 8, !tbaa !12
%10 = getelementptr inbounds %struct.TYPE_4__, ptr %9, i64 %7, i32 3
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = tail call i32 @HeapFree(i32 noundef %8, i32 noundef 0, ptr noundef %11) #2
%13 = tail call i32 @GetProcessHeap() #2
%14 = load ptr, ptr %5, align 8, !tbaa !12
%15 = getelementptr inbounds %struct.TYPE_4__, ptr %14, i64 %7, i32 2
%16 = load ptr, ptr %15, align 8, !tbaa !14
%17 = tail call i32 @HeapFree(i32 noundef %13, i32 noundef 0, ptr noundef %16) #2
%18 = add nuw i64 %7, 1
%19 = load i64, ptr %0, align 8, !tbaa !6
%20 = icmp ult i64 %18, %19
br i1 %20, label %6, label %21, !llvm.loop !15
21: ; preds = %6, %1
%22 = tail call i32 @GetProcessHeap() #2
%23 = getelementptr inbounds i8, ptr %0, i64 8
%24 = load ptr, ptr %23, align 8, !tbaa !12
%25 = tail call i32 @HeapFree(i32 noundef %22, i32 noundef 0, ptr noundef %24) #2
%26 = tail call i32 @GetProcessHeap() #2
%27 = tail call i32 @HeapFree(i32 noundef %26, i32 noundef 0, ptr noundef nonnull %0) #2
ret void
}
declare i32 @HeapFree(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @GetProcessHeap(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!7, !11, i64 24}
!14 = !{!7, !11, i64 16}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
|
reactos_dll_win32_advpack_extr_reg.c_free_strtable
|
; ModuleID = 'AnghaBench/linux/tools/perf/extr_util..uiui.h_ui__init.c'
source_filename = "AnghaBench/linux/tools/perf/extr_util..uiui.h_ui__init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ui__init], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @ui__init() #0 {
ret i32 -1
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/tools/perf/extr_util..uiui.h_ui__init.c'
source_filename = "AnghaBench/linux/tools/perf/extr_util..uiui.h_ui__init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ui__init], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @ui__init() #0 {
ret i32 -1
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_tools_perf_extr_util..uiui.h_ui__init
|
; ModuleID = 'AnghaBench/linux/drivers/firewire/extr_core-cdev.c_ioctl_create_iso_context.c'
source_filename = "AnghaBench/linux/drivers/firewire/extr_core-cdev.c_ioctl_create_iso_context.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fw_cdev_create_iso_context = type { i32, i32, i32, i64, i32, i32 }
%struct.client = type { i64, i32, i32, ptr, i32, ptr, i32 }
@FW_CDEV_ISO_CONTEXT_TRANSMIT = dso_local local_unnamed_addr global i64 0, align 8
@FW_CDEV_ISO_CONTEXT_RECEIVE = dso_local local_unnamed_addr global i64 0, align 8
@FW_CDEV_ISO_CONTEXT_RECEIVE_MULTICHANNEL = dso_local local_unnamed_addr global i64 0, align 8
@SCODE_3200 = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@iso_callback = dso_local local_unnamed_addr global i32 0, align 4
@iso_mc_callback = dso_local local_unnamed_addr global i32 0, align 4
@FW_CDEV_VERSION_AUTO_FLUSH_ISO_OVERFLOW = dso_local local_unnamed_addr global i64 0, align 8
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ioctl_create_iso_context], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ioctl_create_iso_context(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = load i64, ptr @FW_CDEV_ISO_CONTEXT_TRANSMIT, align 8, !tbaa !5
%4 = icmp ne i64 %3, 128
%5 = load i64, ptr @FW_CDEV_ISO_CONTEXT_RECEIVE, align 8
%6 = icmp ne i64 %5, 130
%7 = select i1 %4, i1 true, i1 %6
%8 = load i64, ptr @FW_CDEV_ISO_CONTEXT_RECEIVE_MULTICHANNEL, align 8
%9 = icmp ne i64 %8, 129
%10 = select i1 %7, i1 true, i1 %9
%11 = zext i1 %10 to i32
%12 = tail call i32 @BUILD_BUG_ON(i32 noundef %11) #2
%13 = load i32, ptr %1, align 8, !tbaa !9
switch i32 %13, label %43 [
i32 128, label %17
i32 130, label %29
i32 129, label %14
]
14: ; preds = %2
%15 = getelementptr inbounds %struct.fw_cdev_create_iso_context, ptr %1, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !12
br label %46
17: ; preds = %2
%18 = getelementptr inbounds %struct.fw_cdev_create_iso_context, ptr %1, i64 0, i32 5
%19 = load i32, ptr %18, align 4, !tbaa !13
%20 = load i32, ptr @SCODE_3200, align 4, !tbaa !14
%21 = icmp sgt i32 %19, %20
br i1 %21, label %26, label %22
22: ; preds = %17
%23 = getelementptr inbounds %struct.fw_cdev_create_iso_context, ptr %1, i64 0, i32 1
%24 = load i32, ptr %23, align 4, !tbaa !12
%25 = icmp sgt i32 %24, 63
br i1 %25, label %26, label %46
26: ; preds = %22, %17
%27 = load i32, ptr @EINVAL, align 4, !tbaa !14
%28 = sub nsw i32 0, %27
br label %99
29: ; preds = %2
%30 = getelementptr inbounds %struct.fw_cdev_create_iso_context, ptr %1, i64 0, i32 2
%31 = load i32, ptr %30, align 8, !tbaa !15
%32 = icmp sgt i32 %31, 3
%33 = and i32 %31, 3
%34 = icmp eq i32 %33, 0
%35 = and i1 %32, %34
br i1 %35, label %36, label %40
36: ; preds = %29
%37 = getelementptr inbounds %struct.fw_cdev_create_iso_context, ptr %1, i64 0, i32 1
%38 = load i32, ptr %37, align 4, !tbaa !12
%39 = icmp sgt i32 %38, 63
br i1 %39, label %40, label %46
40: ; preds = %36, %29
%41 = load i32, ptr @EINVAL, align 4, !tbaa !14
%42 = sub nsw i32 0, %41
br label %99
43: ; preds = %2
%44 = load i32, ptr @EINVAL, align 4, !tbaa !14
%45 = sub nsw i32 0, %44
br label %99
46: ; preds = %14, %36, %22
%47 = phi i32 [ %24, %22 ], [ %38, %36 ], [ %16, %14 ]
%48 = phi ptr [ @iso_callback, %22 ], [ @iso_callback, %36 ], [ @iso_mc_callback, %14 ]
%49 = load i32, ptr %48, align 4, !tbaa !14
%50 = getelementptr inbounds %struct.client, ptr %0, i64 0, i32 5
%51 = load ptr, ptr %50, align 8, !tbaa !16
%52 = load i32, ptr %51, align 4, !tbaa !19
%53 = getelementptr inbounds %struct.fw_cdev_create_iso_context, ptr %1, i64 0, i32 5
%54 = load i32, ptr %53, align 4, !tbaa !13
%55 = getelementptr inbounds %struct.fw_cdev_create_iso_context, ptr %1, i64 0, i32 2
%56 = load i32, ptr %55, align 8, !tbaa !15
%57 = tail call ptr @fw_iso_context_create(i32 noundef %52, i32 noundef %13, i32 noundef %47, i32 noundef %54, i32 noundef %56, i32 noundef %49, ptr noundef %0) #2
%58 = tail call i64 @IS_ERR(ptr noundef %57) #2
%59 = icmp eq i64 %58, 0
br i1 %59, label %62, label %60
60: ; preds = %46
%61 = tail call i32 @PTR_ERR(ptr noundef %57) #2
br label %99
62: ; preds = %46
%63 = load i64, ptr %0, align 8, !tbaa !21
%64 = load i64, ptr @FW_CDEV_VERSION_AUTO_FLUSH_ISO_OVERFLOW, align 8, !tbaa !5
%65 = icmp slt i64 %63, %64
br i1 %65, label %66, label %67
66: ; preds = %62
store i32 1, ptr %57, align 4, !tbaa !22
br label %67
67: ; preds = %66, %62
%68 = getelementptr inbounds %struct.client, ptr %0, i64 0, i32 2
%69 = tail call i32 @spin_lock_irq(ptr noundef nonnull %68) #2
%70 = getelementptr inbounds %struct.client, ptr %0, i64 0, i32 3
%71 = load ptr, ptr %70, align 8, !tbaa !24
%72 = icmp eq ptr %71, null
br i1 %72, label %78, label %73
73: ; preds = %67
%74 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %68) #2
%75 = tail call i32 @fw_iso_context_destroy(ptr noundef %57) #2
%76 = load i32, ptr @EBUSY, align 4, !tbaa !14
%77 = sub nsw i32 0, %76
br label %99
78: ; preds = %67
%79 = getelementptr inbounds %struct.client, ptr %0, i64 0, i32 1
%80 = load i32, ptr %79, align 8, !tbaa !25
%81 = icmp eq i32 %80, 0
br i1 %81, label %82, label %93
82: ; preds = %78
%83 = getelementptr inbounds %struct.client, ptr %0, i64 0, i32 6
%84 = load ptr, ptr %50, align 8, !tbaa !16
%85 = load i32, ptr %84, align 4, !tbaa !19
%86 = tail call i32 @iso_dma_direction(ptr noundef %57) #2
%87 = tail call i32 @fw_iso_buffer_map_dma(ptr noundef nonnull %83, i32 noundef %85, i32 noundef %86) #2
%88 = icmp slt i32 %87, 0
br i1 %88, label %89, label %92
89: ; preds = %82
%90 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %68) #2
%91 = tail call i32 @fw_iso_context_destroy(ptr noundef %57) #2
br label %99
92: ; preds = %82
store i32 1, ptr %79, align 8, !tbaa !25
br label %93
93: ; preds = %92, %78
%94 = getelementptr inbounds %struct.fw_cdev_create_iso_context, ptr %1, i64 0, i32 4
%95 = load i32, ptr %94, align 8, !tbaa !26
%96 = getelementptr inbounds %struct.client, ptr %0, i64 0, i32 4
store i32 %95, ptr %96, align 8, !tbaa !27
store ptr %57, ptr %70, align 8, !tbaa !24
%97 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %68) #2
%98 = getelementptr inbounds %struct.fw_cdev_create_iso_context, ptr %1, i64 0, i32 3
store i64 0, ptr %98, align 8, !tbaa !28
br label %99
99: ; preds = %93, %89, %73, %60, %43, %40, %26
%100 = phi i32 [ %45, %43 ], [ %61, %60 ], [ %77, %73 ], [ 0, %93 ], [ %87, %89 ], [ %42, %40 ], [ %28, %26 ]
ret i32 %100
}
declare i32 @BUILD_BUG_ON(i32 noundef) local_unnamed_addr #1
declare ptr @fw_iso_context_create(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @fw_iso_context_destroy(ptr noundef) local_unnamed_addr #1
declare i32 @fw_iso_buffer_map_dma(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @iso_dma_direction(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"fw_cdev_create_iso_context", !11, i64 0, !11, i64 4, !11, i64 8, !6, i64 16, !11, i64 24, !11, i64 28}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 4}
!13 = !{!10, !11, i64 28}
!14 = !{!11, !11, i64 0}
!15 = !{!10, !11, i64 8}
!16 = !{!17, !18, i64 32}
!17 = !{!"client", !6, i64 0, !11, i64 8, !11, i64 12, !18, i64 16, !11, i64 24, !18, i64 32, !11, i64 40}
!18 = !{!"any pointer", !7, i64 0}
!19 = !{!20, !11, i64 0}
!20 = !{!"TYPE_2__", !11, i64 0}
!21 = !{!17, !6, i64 0}
!22 = !{!23, !11, i64 0}
!23 = !{!"fw_iso_context", !11, i64 0}
!24 = !{!17, !18, i64 16}
!25 = !{!17, !11, i64 8}
!26 = !{!10, !11, i64 24}
!27 = !{!17, !11, i64 24}
!28 = !{!10, !6, i64 16}
|
; ModuleID = 'AnghaBench/linux/drivers/firewire/extr_core-cdev.c_ioctl_create_iso_context.c'
source_filename = "AnghaBench/linux/drivers/firewire/extr_core-cdev.c_ioctl_create_iso_context.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FW_CDEV_ISO_CONTEXT_TRANSMIT = common local_unnamed_addr global i64 0, align 8
@FW_CDEV_ISO_CONTEXT_RECEIVE = common local_unnamed_addr global i64 0, align 8
@FW_CDEV_ISO_CONTEXT_RECEIVE_MULTICHANNEL = common local_unnamed_addr global i64 0, align 8
@SCODE_3200 = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@iso_callback = common local_unnamed_addr global i32 0, align 4
@iso_mc_callback = common local_unnamed_addr global i32 0, align 4
@FW_CDEV_VERSION_AUTO_FLUSH_ISO_OVERFLOW = common local_unnamed_addr global i64 0, align 8
@EBUSY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ioctl_create_iso_context], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ioctl_create_iso_context(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = load i64, ptr @FW_CDEV_ISO_CONTEXT_TRANSMIT, align 8, !tbaa !6
%4 = icmp ne i64 %3, 128
%5 = load i64, ptr @FW_CDEV_ISO_CONTEXT_RECEIVE, align 8
%6 = icmp ne i64 %5, 130
%7 = select i1 %4, i1 true, i1 %6
%8 = load i64, ptr @FW_CDEV_ISO_CONTEXT_RECEIVE_MULTICHANNEL, align 8
%9 = icmp ne i64 %8, 129
%10 = select i1 %7, i1 true, i1 %9
%11 = zext i1 %10 to i32
%12 = tail call i32 @BUILD_BUG_ON(i32 noundef %11) #2
%13 = load i32, ptr %1, align 8, !tbaa !10
switch i32 %13, label %43 [
i32 128, label %17
i32 130, label %29
i32 129, label %14
]
14: ; preds = %2
%15 = getelementptr inbounds i8, ptr %1, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !13
br label %46
17: ; preds = %2
%18 = getelementptr inbounds i8, ptr %1, i64 28
%19 = load i32, ptr %18, align 4, !tbaa !14
%20 = load i32, ptr @SCODE_3200, align 4, !tbaa !15
%21 = icmp sgt i32 %19, %20
br i1 %21, label %26, label %22
22: ; preds = %17
%23 = getelementptr inbounds i8, ptr %1, i64 4
%24 = load i32, ptr %23, align 4, !tbaa !13
%25 = icmp sgt i32 %24, 63
br i1 %25, label %26, label %46
26: ; preds = %22, %17
%27 = load i32, ptr @EINVAL, align 4, !tbaa !15
%28 = sub nsw i32 0, %27
br label %99
29: ; preds = %2
%30 = getelementptr inbounds i8, ptr %1, i64 8
%31 = load i32, ptr %30, align 8, !tbaa !16
%32 = icmp sgt i32 %31, 3
%33 = and i32 %31, 3
%34 = icmp eq i32 %33, 0
%35 = and i1 %32, %34
br i1 %35, label %36, label %40
36: ; preds = %29
%37 = getelementptr inbounds i8, ptr %1, i64 4
%38 = load i32, ptr %37, align 4, !tbaa !13
%39 = icmp sgt i32 %38, 63
br i1 %39, label %40, label %46
40: ; preds = %36, %29
%41 = load i32, ptr @EINVAL, align 4, !tbaa !15
%42 = sub nsw i32 0, %41
br label %99
43: ; preds = %2
%44 = load i32, ptr @EINVAL, align 4, !tbaa !15
%45 = sub nsw i32 0, %44
br label %99
46: ; preds = %14, %36, %22
%47 = phi i32 [ %24, %22 ], [ %38, %36 ], [ %16, %14 ]
%48 = phi ptr [ @iso_callback, %22 ], [ @iso_callback, %36 ], [ @iso_mc_callback, %14 ]
%49 = load i32, ptr %48, align 4, !tbaa !15
%50 = getelementptr inbounds i8, ptr %0, i64 32
%51 = load ptr, ptr %50, align 8, !tbaa !17
%52 = load i32, ptr %51, align 4, !tbaa !20
%53 = getelementptr inbounds i8, ptr %1, i64 28
%54 = load i32, ptr %53, align 4, !tbaa !14
%55 = getelementptr inbounds i8, ptr %1, i64 8
%56 = load i32, ptr %55, align 8, !tbaa !16
%57 = tail call ptr @fw_iso_context_create(i32 noundef %52, i32 noundef %13, i32 noundef %47, i32 noundef %54, i32 noundef %56, i32 noundef %49, ptr noundef %0) #2
%58 = tail call i64 @IS_ERR(ptr noundef %57) #2
%59 = icmp eq i64 %58, 0
br i1 %59, label %62, label %60
60: ; preds = %46
%61 = tail call i32 @PTR_ERR(ptr noundef %57) #2
br label %99
62: ; preds = %46
%63 = load i64, ptr %0, align 8, !tbaa !22
%64 = load i64, ptr @FW_CDEV_VERSION_AUTO_FLUSH_ISO_OVERFLOW, align 8, !tbaa !6
%65 = icmp slt i64 %63, %64
br i1 %65, label %66, label %67
66: ; preds = %62
store i32 1, ptr %57, align 4, !tbaa !23
br label %67
67: ; preds = %66, %62
%68 = getelementptr inbounds i8, ptr %0, i64 12
%69 = tail call i32 @spin_lock_irq(ptr noundef nonnull %68) #2
%70 = getelementptr inbounds i8, ptr %0, i64 16
%71 = load ptr, ptr %70, align 8, !tbaa !25
%72 = icmp eq ptr %71, null
br i1 %72, label %78, label %73
73: ; preds = %67
%74 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %68) #2
%75 = tail call i32 @fw_iso_context_destroy(ptr noundef %57) #2
%76 = load i32, ptr @EBUSY, align 4, !tbaa !15
%77 = sub nsw i32 0, %76
br label %99
78: ; preds = %67
%79 = getelementptr inbounds i8, ptr %0, i64 8
%80 = load i32, ptr %79, align 8, !tbaa !26
%81 = icmp eq i32 %80, 0
br i1 %81, label %82, label %93
82: ; preds = %78
%83 = getelementptr inbounds i8, ptr %0, i64 40
%84 = load ptr, ptr %50, align 8, !tbaa !17
%85 = load i32, ptr %84, align 4, !tbaa !20
%86 = tail call i32 @iso_dma_direction(ptr noundef %57) #2
%87 = tail call i32 @fw_iso_buffer_map_dma(ptr noundef nonnull %83, i32 noundef %85, i32 noundef %86) #2
%88 = icmp slt i32 %87, 0
br i1 %88, label %89, label %92
89: ; preds = %82
%90 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %68) #2
%91 = tail call i32 @fw_iso_context_destroy(ptr noundef %57) #2
br label %99
92: ; preds = %82
store i32 1, ptr %79, align 8, !tbaa !26
br label %93
93: ; preds = %92, %78
%94 = getelementptr inbounds i8, ptr %1, i64 24
%95 = load i32, ptr %94, align 8, !tbaa !27
%96 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %95, ptr %96, align 8, !tbaa !28
store ptr %57, ptr %70, align 8, !tbaa !25
%97 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %68) #2
%98 = getelementptr inbounds i8, ptr %1, i64 16
store i64 0, ptr %98, align 8, !tbaa !29
br label %99
99: ; preds = %93, %89, %73, %60, %43, %40, %26
%100 = phi i32 [ %45, %43 ], [ %61, %60 ], [ %77, %73 ], [ 0, %93 ], [ %87, %89 ], [ %42, %40 ], [ %28, %26 ]
ret i32 %100
}
declare i32 @BUILD_BUG_ON(i32 noundef) local_unnamed_addr #1
declare ptr @fw_iso_context_create(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @fw_iso_context_destroy(ptr noundef) local_unnamed_addr #1
declare i32 @fw_iso_buffer_map_dma(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @iso_dma_direction(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"fw_cdev_create_iso_context", !12, i64 0, !12, i64 4, !12, i64 8, !7, i64 16, !12, i64 24, !12, i64 28}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 4}
!14 = !{!11, !12, i64 28}
!15 = !{!12, !12, i64 0}
!16 = !{!11, !12, i64 8}
!17 = !{!18, !19, i64 32}
!18 = !{!"client", !7, i64 0, !12, i64 8, !12, i64 12, !19, i64 16, !12, i64 24, !19, i64 32, !12, i64 40}
!19 = !{!"any pointer", !8, i64 0}
!20 = !{!21, !12, i64 0}
!21 = !{!"TYPE_2__", !12, i64 0}
!22 = !{!18, !7, i64 0}
!23 = !{!24, !12, i64 0}
!24 = !{!"fw_iso_context", !12, i64 0}
!25 = !{!18, !19, i64 16}
!26 = !{!18, !12, i64 8}
!27 = !{!11, !12, i64 24}
!28 = !{!18, !12, i64 24}
!29 = !{!11, !7, i64 16}
|
linux_drivers_firewire_extr_core-cdev.c_ioctl_create_iso_context
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_steeringmlx5dr.h_mlx5dr_table_set_miss_action.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_steeringmlx5dr.h_mlx5dr_table_set_miss_action.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mlx5dr_table_set_miss_action], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @mlx5dr_table_set_miss_action(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_steeringmlx5dr.h_mlx5dr_table_set_miss_action.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_steeringmlx5dr.h_mlx5dr_table_set_miss_action.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mlx5dr_table_set_miss_action], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @mlx5dr_table_set_miss_action(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_net_ethernet_mellanox_mlx5_core_extr_steeringmlx5dr.h_mlx5dr_table_set_miss_action
|
; ModuleID = 'AnghaBench/citus/src/backend/distributed/commands/extr_utility_hook.c_PostProcessUtility.c'
source_filename = "AnghaBench/citus/src/backend/distributed/commands/extr_utility_hook.c_PostProcessUtility.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@IndexStmt = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @PostProcessUtility], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @PostProcessUtility(ptr noundef %0) #0 {
%2 = load i32, ptr @IndexStmt, align 4, !tbaa !5
%3 = tail call i64 @IsA(ptr noundef %0, i32 noundef %2) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = load i32, ptr @IndexStmt, align 4, !tbaa !5
%7 = tail call i32 @castNode(i32 noundef %6, ptr noundef %0) #2
%8 = tail call i32 @PostProcessIndexStmt(i32 noundef %7) #2
br label %9
9: ; preds = %5, %1
ret void
}
declare i64 @IsA(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PostProcessIndexStmt(i32 noundef) local_unnamed_addr #1
declare i32 @castNode(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/citus/src/backend/distributed/commands/extr_utility_hook.c_PostProcessUtility.c'
source_filename = "AnghaBench/citus/src/backend/distributed/commands/extr_utility_hook.c_PostProcessUtility.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IndexStmt = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @PostProcessUtility], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @PostProcessUtility(ptr noundef %0) #0 {
%2 = load i32, ptr @IndexStmt, align 4, !tbaa !6
%3 = tail call i64 @IsA(ptr noundef %0, i32 noundef %2) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = load i32, ptr @IndexStmt, align 4, !tbaa !6
%7 = tail call i32 @castNode(i32 noundef %6, ptr noundef %0) #2
%8 = tail call i32 @PostProcessIndexStmt(i32 noundef %7) #2
br label %9
9: ; preds = %5, %1
ret void
}
declare i64 @IsA(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PostProcessIndexStmt(i32 noundef) local_unnamed_addr #1
declare i32 @castNode(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
citus_src_backend_distributed_commands_extr_utility_hook.c_PostProcessUtility
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_t4_hw.c_sge_intr_handler.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_t4_hw.c_sge_intr_handler.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SGE_INT_CAUSE1_A = dso_local local_unnamed_addr global i32 0, align 4
@SGE_INT_CAUSE2_A = dso_local local_unnamed_addr global i32 0, align 4
@SGE_INT_CAUSE3_A = dso_local local_unnamed_addr global i32 0, align 4
@CHELSIO_T5 = dso_local local_unnamed_addr global i64 0, align 8
@SGE_ERROR_STATS_A = dso_local local_unnamed_addr global i32 0, align 4
@ERROR_QID_VALID_F = dso_local local_unnamed_addr global i32 0, align 4
@UNCAPTURED_ERROR_F = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sge_intr_handler], section "llvm.metadata"
; Function Attrs: noreturn nounwind uwtable
define internal void @sge_intr_handler(ptr noundef %0) #0 {
%2 = load i32, ptr @SGE_INT_CAUSE1_A, align 4, !tbaa !5
%3 = tail call i32 @t4_read_reg(ptr noundef %0, i32 noundef %2) #2
%4 = load i32, ptr @SGE_INT_CAUSE2_A, align 4, !tbaa !5
%5 = tail call i32 @t4_read_reg(ptr noundef %0, i32 noundef %4) #2
unreachable
}
declare i32 @t4_read_reg(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_t4_hw.c_sge_intr_handler.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_t4_hw.c_sge_intr_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SGE_INT_CAUSE1_A = common local_unnamed_addr global i32 0, align 4
@SGE_INT_CAUSE2_A = common local_unnamed_addr global i32 0, align 4
@SGE_INT_CAUSE3_A = common local_unnamed_addr global i32 0, align 4
@CHELSIO_T5 = common local_unnamed_addr global i64 0, align 8
@SGE_ERROR_STATS_A = common local_unnamed_addr global i32 0, align 4
@ERROR_QID_VALID_F = common local_unnamed_addr global i32 0, align 4
@UNCAPTURED_ERROR_F = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sge_intr_handler], section "llvm.metadata"
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define internal void @sge_intr_handler(ptr noundef %0) #0 {
%2 = load i32, ptr @SGE_INT_CAUSE1_A, align 4, !tbaa !6
%3 = tail call i32 @t4_read_reg(ptr noundef %0, i32 noundef %2) #2
%4 = load i32, ptr @SGE_INT_CAUSE2_A, align 4, !tbaa !6
%5 = tail call i32 @t4_read_reg(ptr noundef %0, i32 noundef %4) #2
unreachable
}
declare i32 @t4_read_reg(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_net_ethernet_chelsio_cxgb4_extr_t4_hw.c_sge_intr_handler
|
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_ra_local/extr_ra_plugin.c_svn_ra_local__get_location_segments.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_ra_local/extr_ra_plugin.c_svn_ra_local__get_location_segments.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @svn_ra_local__get_location_segments], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @svn_ra_local__get_location_segments(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6, ptr noundef %7) #0 {
%9 = load ptr, ptr %0, align 8, !tbaa !5
%10 = getelementptr inbounds %struct.TYPE_7__, ptr %9, i64 0, i32 1
%11 = load ptr, ptr %10, align 8, !tbaa !10
%12 = load i32, ptr %11, align 4, !tbaa !13
%13 = tail call ptr @svn_fspath__join(i32 noundef %12, ptr noundef %1, ptr noundef %7) #2
%14 = load i32, ptr %9, align 8, !tbaa !15
%15 = tail call ptr @svn_repos_node_location_segments(i32 noundef %14, ptr noundef %13, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6, ptr noundef null, ptr noundef null, ptr noundef %7) #2
ret ptr %15
}
declare ptr @svn_fspath__join(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @svn_repos_node_location_segments(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"TYPE_7__", !12, i64 0, !7, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_5__", !12, i64 0}
!15 = !{!11, !12, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_ra_local/extr_ra_plugin.c_svn_ra_local__get_location_segments.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_ra_local/extr_ra_plugin.c_svn_ra_local__get_location_segments.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @svn_ra_local__get_location_segments], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @svn_ra_local__get_location_segments(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6, ptr noundef %7) #0 {
%9 = load ptr, ptr %0, align 8, !tbaa !6
%10 = getelementptr inbounds i8, ptr %9, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !11
%12 = load i32, ptr %11, align 4, !tbaa !14
%13 = tail call ptr @svn_fspath__join(i32 noundef %12, ptr noundef %1, ptr noundef %7) #2
%14 = load i32, ptr %9, align 8, !tbaa !16
%15 = tail call ptr @svn_repos_node_location_segments(i32 noundef %14, ptr noundef %13, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6, ptr noundef null, ptr noundef null, ptr noundef %7) #2
ret ptr %15
}
declare ptr @svn_fspath__join(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @svn_repos_node_location_segments(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"TYPE_7__", !13, i64 0, !8, i64 8}
!13 = !{!"int", !9, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_5__", !13, i64 0}
!16 = !{!12, !13, i64 0}
|
freebsd_contrib_subversion_subversion_libsvn_ra_local_extr_ra_plugin.c_svn_ra_local__get_location_segments
|
; ModuleID = 'AnghaBench/radare2/libr/io/p/extr_io_gprobe.c___write.c'
source_filename = "AnghaBench/radare2/libr/io/p/extr_io_gprobe.c___write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i64, i32 }
@GPROBE_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @__write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @__write(ptr nocapture readnone %0, ptr noundef readonly %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = icmp eq ptr %1, null
br i1 %5, label %37, label %6
6: ; preds = %4
%7 = load i64, ptr %1, align 8, !tbaa !5
%8 = icmp ne i64 %7, 0
%9 = icmp ne ptr %2, null
%10 = and i1 %9, %8
br i1 %10, label %11, label %37
11: ; preds = %6
%12 = inttoptr i64 %7 to ptr
%13 = load i64, ptr %12, align 8, !tbaa !10
%14 = sext i32 %3 to i64
%15 = add nsw i64 %13, %14
%16 = load i64, ptr @GPROBE_SIZE, align 8, !tbaa !13
%17 = icmp sgt i64 %15, %16
%18 = sub nsw i64 %16, %13
%19 = trunc i64 %18 to i32
%20 = select i1 %17, i32 %19, i32 %3
%21 = getelementptr inbounds %struct.TYPE_4__, ptr %12, i64 0, i32 1
%22 = icmp sgt i32 %20, 0
br i1 %22, label %23, label %37
23: ; preds = %11, %31
%24 = phi i64 [ %34, %31 ], [ %13, %11 ]
%25 = phi i32 [ %35, %31 ], [ 0, %11 ]
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds i32, ptr %2, i64 %26
%28 = sub nsw i32 %20, %25
%29 = tail call i32 @gprobe_write(ptr noundef nonnull %21, i64 noundef %24, ptr noundef nonnull %27, i32 noundef %28) #2
%30 = icmp slt i32 %29, 1
br i1 %30, label %37, label %31
31: ; preds = %23
%32 = zext nneg i32 %29 to i64
%33 = load i64, ptr %12, align 8, !tbaa !10
%34 = add nsw i64 %33, %32
store i64 %34, ptr %12, align 8, !tbaa !10
%35 = add nuw nsw i32 %29, %25
%36 = icmp slt i32 %35, %20
br i1 %36, label %23, label %37, !llvm.loop !14
37: ; preds = %23, %31, %11, %4, %6
%38 = phi i32 [ -1, %6 ], [ -1, %4 ], [ %20, %11 ], [ -1, %23 ], [ %20, %31 ]
ret i32 %38
}
declare i32 @gprobe_write(ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0, !12, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/radare2/libr/io/p/extr_io_gprobe.c___write.c'
source_filename = "AnghaBench/radare2/libr/io/p/extr_io_gprobe.c___write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GPROBE_SIZE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @__write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @__write(ptr nocapture readnone %0, ptr noundef readonly %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = icmp eq ptr %1, null
br i1 %5, label %37, label %6
6: ; preds = %4
%7 = load i64, ptr %1, align 8, !tbaa !6
%8 = icmp ne i64 %7, 0
%9 = icmp ne ptr %2, null
%10 = and i1 %9, %8
br i1 %10, label %11, label %37
11: ; preds = %6
%12 = inttoptr i64 %7 to ptr
%13 = load i64, ptr %12, align 8, !tbaa !11
%14 = sext i32 %3 to i64
%15 = add nsw i64 %13, %14
%16 = load i64, ptr @GPROBE_SIZE, align 8, !tbaa !14
%17 = icmp sgt i64 %15, %16
%18 = sub nsw i64 %16, %13
%19 = trunc i64 %18 to i32
%20 = select i1 %17, i32 %19, i32 %3
%21 = getelementptr inbounds i8, ptr %12, i64 8
%22 = icmp sgt i32 %20, 0
br i1 %22, label %23, label %37
23: ; preds = %11, %31
%24 = phi i64 [ %34, %31 ], [ %13, %11 ]
%25 = phi i32 [ %35, %31 ], [ 0, %11 ]
%26 = zext nneg i32 %25 to i64
%27 = getelementptr inbounds i32, ptr %2, i64 %26
%28 = sub nsw i32 %20, %25
%29 = tail call i32 @gprobe_write(ptr noundef nonnull %21, i64 noundef %24, ptr noundef nonnull %27, i32 noundef %28) #2
%30 = icmp slt i32 %29, 1
br i1 %30, label %37, label %31
31: ; preds = %23
%32 = zext nneg i32 %29 to i64
%33 = load i64, ptr %12, align 8, !tbaa !11
%34 = add nsw i64 %33, %32
store i64 %34, ptr %12, align 8, !tbaa !11
%35 = add nuw nsw i32 %29, %25
%36 = icmp slt i32 %35, %20
br i1 %36, label %23, label %37, !llvm.loop !15
37: ; preds = %23, %31, %11, %4, %6
%38 = phi i32 [ -1, %6 ], [ -1, %4 ], [ %20, %11 ], [ -1, %23 ], [ %20, %31 ]
ret i32 %38
}
declare i32 @gprobe_write(ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_4__", !8, i64 0, !13, i64 8}
!13 = !{!"int", !9, i64 0}
!14 = !{!8, !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
|
radare2_libr_io_p_extr_io_gprobe.c___write
|
; ModuleID = 'AnghaBench/linux/tools/perf/util/intel-pt-decoder/extr_intel-pt-pkt-decoder.c_intel_pt_get_3byte.c'
source_filename = "AnghaBench/linux/tools/perf/util/intel-pt-decoder/extr_intel-pt-pkt-decoder.c_intel_pt_get_3byte.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@INTEL_PT_NEED_MORE_BYTES = dso_local local_unnamed_addr global i32 0, align 4
@INTEL_PT_BAD_PACKET = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @intel_pt_get_3byte], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @intel_pt_get_3byte(ptr noundef %0, i64 noundef %1, ptr noundef %2) #0 {
%4 = icmp ult i64 %1, 3
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = load i32, ptr @INTEL_PT_NEED_MORE_BYTES, align 4, !tbaa !5
br label %15
7: ; preds = %3
%8 = getelementptr inbounds i8, ptr %0, i64 2
%9 = load i8, ptr %8, align 1, !tbaa !9
%10 = icmp eq i8 %9, -120
br i1 %10, label %11, label %13
11: ; preds = %7
%12 = tail call i32 @intel_pt_get_mnt(ptr noundef nonnull %0, i64 noundef %1, ptr noundef %2) #2
br label %15
13: ; preds = %7
%14 = load i32, ptr @INTEL_PT_BAD_PACKET, align 4, !tbaa !5
br label %15
15: ; preds = %13, %11, %5
%16 = phi i32 [ %6, %5 ], [ %12, %11 ], [ %14, %13 ]
ret i32 %16
}
declare i32 @intel_pt_get_mnt(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/tools/perf/util/intel-pt-decoder/extr_intel-pt-pkt-decoder.c_intel_pt_get_3byte.c'
source_filename = "AnghaBench/linux/tools/perf/util/intel-pt-decoder/extr_intel-pt-pkt-decoder.c_intel_pt_get_3byte.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@INTEL_PT_NEED_MORE_BYTES = common local_unnamed_addr global i32 0, align 4
@INTEL_PT_BAD_PACKET = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @intel_pt_get_3byte], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @intel_pt_get_3byte(ptr noundef %0, i64 noundef %1, ptr noundef %2) #0 {
%4 = icmp ult i64 %1, 3
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = load i32, ptr @INTEL_PT_NEED_MORE_BYTES, align 4, !tbaa !6
br label %15
7: ; preds = %3
%8 = getelementptr inbounds i8, ptr %0, i64 2
%9 = load i8, ptr %8, align 1, !tbaa !10
%10 = icmp eq i8 %9, -120
br i1 %10, label %11, label %13
11: ; preds = %7
%12 = tail call i32 @intel_pt_get_mnt(ptr noundef nonnull %0, i64 noundef %1, ptr noundef %2) #2
br label %15
13: ; preds = %7
%14 = load i32, ptr @INTEL_PT_BAD_PACKET, align 4, !tbaa !6
br label %15
15: ; preds = %13, %11, %5
%16 = phi i32 [ %6, %5 ], [ %12, %11 ], [ %14, %13 ]
ret i32 %16
}
declare i32 @intel_pt_get_mnt(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
|
linux_tools_perf_util_intel-pt-decoder_extr_intel-pt-pkt-decoder.c_intel_pt_get_3byte
|
; ModuleID = 'AnghaBench/linux/drivers/char/hw_random/extr_optee-rng.c_optee_rng_init.c'
source_filename = "AnghaBench/linux/drivers/char/hw_random/extr_optee-rng.c_optee_rng_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.optee_rng_private = type { ptr, i32, i32 }
@MAX_ENTROPY_REQ_SZ = dso_local local_unnamed_addr global i32 0, align 4
@TEE_SHM_MAPPED = dso_local local_unnamed_addr global i32 0, align 4
@TEE_SHM_DMA_BUF = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [22 x i8] c"tee_shm_alloc failed\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @optee_rng_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @optee_rng_init(ptr noundef %0) #0 {
%2 = tail call ptr @to_optee_rng_private(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.optee_rng_private, ptr %2, i64 0, i32 2
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = load i32, ptr @MAX_ENTROPY_REQ_SZ, align 4, !tbaa !11
%6 = load i32, ptr @TEE_SHM_MAPPED, align 4, !tbaa !11
%7 = load i32, ptr @TEE_SHM_DMA_BUF, align 4, !tbaa !11
%8 = or i32 %7, %6
%9 = tail call ptr @tee_shm_alloc(i32 noundef %4, i32 noundef %5, i32 noundef %8) #2
%10 = tail call i64 @IS_ERR(ptr noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %17, label %12
12: ; preds = %1
%13 = getelementptr inbounds %struct.optee_rng_private, ptr %2, i64 0, i32 1
%14 = load i32, ptr %13, align 8, !tbaa !12
%15 = tail call i32 @dev_err(i32 noundef %14, ptr noundef nonnull @.str) #2
%16 = tail call i32 @PTR_ERR(ptr noundef %9) #2
br label %18
17: ; preds = %1
store ptr %9, ptr %2, align 8, !tbaa !13
br label %18
18: ; preds = %17, %12
%19 = phi i32 [ %16, %12 ], [ 0, %17 ]
ret i32 %19
}
declare ptr @to_optee_rng_private(ptr noundef) local_unnamed_addr #1
declare ptr @tee_shm_alloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 12}
!6 = !{!"optee_rng_private", !7, i64 0, !10, i64 8, !10, i64 12}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/char/hw_random/extr_optee-rng.c_optee_rng_init.c'
source_filename = "AnghaBench/linux/drivers/char/hw_random/extr_optee-rng.c_optee_rng_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAX_ENTROPY_REQ_SZ = common local_unnamed_addr global i32 0, align 4
@TEE_SHM_MAPPED = common local_unnamed_addr global i32 0, align 4
@TEE_SHM_DMA_BUF = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [22 x i8] c"tee_shm_alloc failed\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @optee_rng_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @optee_rng_init(ptr noundef %0) #0 {
%2 = tail call ptr @to_optee_rng_private(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 12
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = load i32, ptr @MAX_ENTROPY_REQ_SZ, align 4, !tbaa !12
%6 = load i32, ptr @TEE_SHM_MAPPED, align 4, !tbaa !12
%7 = load i32, ptr @TEE_SHM_DMA_BUF, align 4, !tbaa !12
%8 = or i32 %7, %6
%9 = tail call ptr @tee_shm_alloc(i32 noundef %4, i32 noundef %5, i32 noundef %8) #2
%10 = tail call i64 @IS_ERR(ptr noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %17, label %12
12: ; preds = %1
%13 = getelementptr inbounds i8, ptr %2, i64 8
%14 = load i32, ptr %13, align 8, !tbaa !13
%15 = tail call i32 @dev_err(i32 noundef %14, ptr noundef nonnull @.str) #2
%16 = tail call i32 @PTR_ERR(ptr noundef %9) #2
br label %18
17: ; preds = %1
store ptr %9, ptr %2, align 8, !tbaa !14
br label %18
18: ; preds = %17, %12
%19 = phi i32 [ %16, %12 ], [ 0, %17 ]
ret i32 %19
}
declare ptr @to_optee_rng_private(ptr noundef) local_unnamed_addr #1
declare ptr @tee_shm_alloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 12}
!7 = !{!"optee_rng_private", !8, i64 0, !11, i64 8, !11, i64 12}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!7, !8, i64 0}
|
linux_drivers_char_hw_random_extr_optee-rng.c_optee_rng_init
|
; ModuleID = 'AnghaBench/linux/drivers/staging/most/dim2/extr_dim2.c_rcar_m3_disable.c'
source_filename = "AnghaBench/linux/drivers/staging/most/dim2/extr_dim2.c_rcar_m3_disable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dim2_hdm = type { i64, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @rcar_m3_disable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @rcar_m3_disable(ptr noundef %0) #0 {
%2 = tail call ptr @platform_get_drvdata(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.dim2_hdm, ptr %2, i64 0, i32 1
%4 = load i32, ptr %3, align 8, !tbaa !5
%5 = tail call i32 @clk_disable_unprepare(i32 noundef %4) #2
%6 = load i64, ptr %2, align 8, !tbaa !11
%7 = add nsw i64 %6, 1536
%8 = tail call i32 @writel(i32 noundef 0, i64 noundef %7) #2
ret void
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @clk_disable_unprepare(i32 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"dim2_hdm", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/most/dim2/extr_dim2.c_rcar_m3_disable.c'
source_filename = "AnghaBench/linux/drivers/staging/most/dim2/extr_dim2.c_rcar_m3_disable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rcar_m3_disable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @rcar_m3_disable(ptr noundef %0) #0 {
%2 = tail call ptr @platform_get_drvdata(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 8
%4 = load i32, ptr %3, align 8, !tbaa !6
%5 = tail call i32 @clk_disable_unprepare(i32 noundef %4) #2
%6 = load i64, ptr %2, align 8, !tbaa !12
%7 = add nsw i64 %6, 1536
%8 = tail call i32 @writel(i32 noundef 0, i64 noundef %7) #2
ret void
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @clk_disable_unprepare(i32 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"dim2_hdm", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 0}
|
linux_drivers_staging_most_dim2_extr_dim2.c_rcar_m3_disable
|
; ModuleID = 'AnghaBench/esp-idf/components/freertos/extr_list.c_vListInitialise.c'
source_filename = "AnghaBench/esp-idf/components/freertos/extr_list.c_vListInitialise.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { i64, %struct.TYPE_6__, ptr }
%struct.TYPE_6__ = type { ptr, ptr, i32 }
@portMAX_DELAY = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @vListInitialise(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1
%3 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 2
store ptr %2, ptr %3, align 8, !tbaa !5
%4 = load i32, ptr @portMAX_DELAY, align 4, !tbaa !13
%5 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1, i32 2
store i32 %4, ptr %5, align 8, !tbaa !14
%6 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1, i32 1
store ptr %2, ptr %6, align 8, !tbaa !15
store ptr %2, ptr %2, align 8, !tbaa !16
store i64 0, ptr %0, align 8, !tbaa !17
%7 = tail call i32 @listSET_LIST_INTEGRITY_CHECK_1_VALUE(ptr noundef nonnull %0) #2
%8 = tail call i32 @listSET_LIST_INTEGRITY_CHECK_2_VALUE(ptr noundef nonnull %0) #2
ret void
}
declare i32 @listSET_LIST_INTEGRITY_CHECK_1_VALUE(ptr noundef) local_unnamed_addr #1
declare i32 @listSET_LIST_INTEGRITY_CHECK_2_VALUE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 32}
!6 = !{!"TYPE_7__", !7, i64 0, !10, i64 8, !11, i64 32}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_6__", !11, i64 0, !11, i64 8, !12, i64 16}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!6, !12, i64 24}
!15 = !{!6, !11, i64 16}
!16 = !{!6, !11, i64 8}
!17 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/esp-idf/components/freertos/extr_list.c_vListInitialise.c'
source_filename = "AnghaBench/esp-idf/components/freertos/extr_list.c_vListInitialise.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@portMAX_DELAY = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @vListInitialise(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = getelementptr inbounds i8, ptr %0, i64 32
store ptr %2, ptr %3, align 8, !tbaa !6
%4 = load i32, ptr @portMAX_DELAY, align 4, !tbaa !14
%5 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %4, ptr %5, align 8, !tbaa !15
%6 = getelementptr inbounds i8, ptr %0, i64 16
store ptr %2, ptr %6, align 8, !tbaa !16
store ptr %2, ptr %2, align 8, !tbaa !17
store i64 0, ptr %0, align 8, !tbaa !18
%7 = tail call i32 @listSET_LIST_INTEGRITY_CHECK_1_VALUE(ptr noundef nonnull %0) #2
%8 = tail call i32 @listSET_LIST_INTEGRITY_CHECK_2_VALUE(ptr noundef nonnull %0) #2
ret void
}
declare i32 @listSET_LIST_INTEGRITY_CHECK_1_VALUE(ptr noundef) local_unnamed_addr #1
declare i32 @listSET_LIST_INTEGRITY_CHECK_2_VALUE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 32}
!7 = !{!"TYPE_7__", !8, i64 0, !11, i64 8, !12, i64 32}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_6__", !12, i64 0, !12, i64 8, !13, i64 16}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!7, !13, i64 24}
!16 = !{!7, !12, i64 16}
!17 = !{!7, !12, i64 8}
!18 = !{!7, !8, i64 0}
|
esp-idf_components_freertos_extr_list.c_vListInitialise
|
; ModuleID = 'AnghaBench/pifs/src/extr_πfs.c_pifs_lock.c'
source_filename = "AnghaBench/pifs/src/extr_\CF\80fs.c_pifs_lock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@errno = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pifs_lock], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pifs_lock(ptr nocapture readnone %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr noundef %3) #0 {
%5 = load i32, ptr %1, align 4, !tbaa !5
%6 = tail call i32 @fcntl(i32 noundef %5, i32 noundef %2, ptr noundef %3) #2
%7 = icmp eq i32 %6, -1
%8 = load i32, ptr @errno, align 4
%9 = sub nsw i32 0, %8
%10 = select i1 %7, i32 %9, i32 %6
ret i32 %10
}
declare i32 @fcntl(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"fuse_file_info", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/pifs/src/extr_πfs.c_pifs_lock.c'
source_filename = "AnghaBench/pifs/src/extr_\CF\80fs.c_pifs_lock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@errno = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pifs_lock], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pifs_lock(ptr nocapture readnone %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr noundef %3) #0 {
%5 = load i32, ptr %1, align 4, !tbaa !6
%6 = tail call i32 @fcntl(i32 noundef %5, i32 noundef %2, ptr noundef %3) #2
%7 = icmp eq i32 %6, -1
%8 = load i32, ptr @errno, align 4
%9 = sub nsw i32 0, %8
%10 = select i1 %7, i32 %9, i32 %6
ret i32 %10
}
declare i32 @fcntl(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"fuse_file_info", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
pifs_src_extr_πfs.c_pifs_lock
|
; ModuleID = 'AnghaBench/reactos/drivers/filesystems/btrfs/zstd/extr_zstd_compress.c_ZSTD_CCtx_getParameter.c'
source_filename = "AnghaBench/reactos/drivers/filesystems/btrfs/zstd/extr_zstd_compress.c_ZSTD_CCtx_getParameter.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i64 @ZSTD_CCtx_getParameter(ptr noundef %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call i64 @ZSTD_CCtxParam_getParameter(ptr noundef %0, i32 noundef %1, ptr noundef %2) #2
ret i64 %4
}
declare i64 @ZSTD_CCtxParam_getParameter(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/reactos/drivers/filesystems/btrfs/zstd/extr_zstd_compress.c_ZSTD_CCtx_getParameter.c'
source_filename = "AnghaBench/reactos/drivers/filesystems/btrfs/zstd/extr_zstd_compress.c_ZSTD_CCtx_getParameter.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @ZSTD_CCtx_getParameter(ptr noundef %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call i64 @ZSTD_CCtxParam_getParameter(ptr noundef %0, i32 noundef %1, ptr noundef %2) #2
ret i64 %4
}
declare i64 @ZSTD_CCtxParam_getParameter(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
reactos_drivers_filesystems_btrfs_zstd_extr_zstd_compress.c_ZSTD_CCtx_getParameter
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/isci/scil/extr_scic_sds_request.c_scic_sds_request_constructed_state_enter.c'
source_filename = "AnghaBench/freebsd/sys/dev/isci/scil/extr_scic_sds_request.c_scic_sds_request_constructed_state_enter.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@scic_sds_request_state_handler_table = dso_local local_unnamed_addr global i32 0, align 4
@SCI_BASE_REQUEST_STATE_CONSTRUCTED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @scic_sds_request_constructed_state_enter], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @scic_sds_request_constructed_state_enter(ptr noundef %0) #0 {
%2 = load i32, ptr @scic_sds_request_state_handler_table, align 4, !tbaa !5
%3 = load i32, ptr @SCI_BASE_REQUEST_STATE_CONSTRUCTED, align 4, !tbaa !5
%4 = tail call i32 @SET_STATE_HANDLER(ptr noundef %0, i32 noundef %2, i32 noundef %3) #2
ret void
}
declare i32 @SET_STATE_HANDLER(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/isci/scil/extr_scic_sds_request.c_scic_sds_request_constructed_state_enter.c'
source_filename = "AnghaBench/freebsd/sys/dev/isci/scil/extr_scic_sds_request.c_scic_sds_request_constructed_state_enter.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@scic_sds_request_state_handler_table = common local_unnamed_addr global i32 0, align 4
@SCI_BASE_REQUEST_STATE_CONSTRUCTED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @scic_sds_request_constructed_state_enter], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @scic_sds_request_constructed_state_enter(ptr noundef %0) #0 {
%2 = load i32, ptr @scic_sds_request_state_handler_table, align 4, !tbaa !6
%3 = load i32, ptr @SCI_BASE_REQUEST_STATE_CONSTRUCTED, align 4, !tbaa !6
%4 = tail call i32 @SET_STATE_HANDLER(ptr noundef %0, i32 noundef %2, i32 noundef %3) #2
ret void
}
declare i32 @SET_STATE_HANDLER(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_sys_dev_isci_scil_extr_scic_sds_request.c_scic_sds_request_constructed_state_enter
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/extr_trx.c_rtl92se_tx_fill_desc.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/extr_trx.c_rtl92se_tx_fill_desc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ieee80211_hdr = type { i32, i32 }
%struct.sk_buff = type { i64, i32 }
%struct.rtl_mac = type { i64, i32, i32 }
%struct.rtl_tcb_desc = type { i32, i64, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i32 }
%struct.ieee80211_tx_info = type { i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { ptr }
@IEEE80211_SCTL_FRAG = dso_local local_unnamed_addr global i32 0, align 4
@IEEE80211_FCTL_MOREFRAGS = dso_local local_unnamed_addr global i32 0, align 4
@PCI_DMA_TODEVICE = dso_local local_unnamed_addr global i32 0, align 4
@COMP_SEND = dso_local local_unnamed_addr global i32 0, align 4
@DBG_TRACE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [19 x i8] c"DMA mapping error\0A\00", align 1
@NL80211_IFTYPE_STATION = dso_local local_unnamed_addr global i64 0, align 8
@NL80211_IFTYPE_AP = dso_local local_unnamed_addr global i64 0, align 8
@NL80211_IFTYPE_ADHOC = dso_local local_unnamed_addr global i64 0, align 8
@IEEE80211_STA_RX_BW_40 = dso_local local_unnamed_addr global i64 0, align 8
@IEEE80211_SCTL_SEQ = dso_local local_unnamed_addr global i32 0, align 4
@TX_DESC_SIZE_RTL8192S = dso_local local_unnamed_addr global i32 0, align 4
@DESC_RATEMCS0 = dso_local local_unnamed_addr global i32 0, align 4
@VERSION_8192S_ACUT = dso_local local_unnamed_addr global i64 0, align 8
@DESC_RATE1M = dso_local local_unnamed_addr global i32 0, align 4
@DESC_RATE2M = dso_local local_unnamed_addr global i32 0, align 4
@DESC_RATE5_5M = dso_local local_unnamed_addr global i32 0, align 4
@DESC_RATE11M = dso_local local_unnamed_addr global i32 0, align 4
@DESC_RATE12M = dso_local local_unnamed_addr global i32 0, align 4
@IEEE80211_TX_CTL_AMPDU = dso_local local_unnamed_addr global i32 0, align 4
@DESC_RATE54M = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
@switch.table.rtl92se_tx_fill_desc = private unnamed_addr constant [4 x i32] [i32 1, i32 1, i32 2, i32 3], align 4
; Function Attrs: nounwind uwtable
define dso_local void @rtl92se_tx_fill_desc(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2, ptr nocapture noundef readnone %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8) local_unnamed_addr #0 {
%10 = tail call ptr @rtl_priv(ptr noundef %0) #2
%11 = tail call ptr @rtl_priv(ptr noundef %0) #2
%12 = tail call ptr @rtl_mac(ptr noundef %11) #2
%13 = tail call i32 @rtl_pcipriv(ptr noundef %0) #2
%14 = tail call ptr @rtl_pcidev(i32 noundef %13) #2
%15 = tail call ptr @rtl_priv(ptr noundef %0) #2
%16 = tail call ptr @rtl_hal(ptr noundef %15) #2
%17 = load i32, ptr %1, align 4, !tbaa !5
%18 = tail call i32 @_rtl92se_map_hwqueue_to_fwqueue(ptr noundef %6, i32 noundef %7) #2
%19 = getelementptr inbounds %struct.ieee80211_hdr, ptr %1, i64 0, i32 1
%20 = load i32, ptr %19, align 4, !tbaa !10
%21 = load i32, ptr @IEEE80211_SCTL_FRAG, align 4, !tbaa !11
%22 = tail call i32 @cpu_to_le16(i32 noundef %21) #2
%23 = and i32 %22, %20
%24 = icmp eq i32 %23, 0
%25 = load i32, ptr %1, align 4, !tbaa !5
%26 = load i32, ptr @IEEE80211_FCTL_MOREFRAGS, align 4, !tbaa !11
%27 = tail call i32 @cpu_to_le16(i32 noundef %26) #2
%28 = and i32 %27, %25
%29 = icmp eq i32 %28, 0
%30 = load i32, ptr %14, align 4, !tbaa !12
%31 = getelementptr inbounds %struct.sk_buff, ptr %6, i64 0, i32 1
%32 = load i32, ptr %31, align 8, !tbaa !14
%33 = load i64, ptr %6, align 8, !tbaa !17
%34 = load i32, ptr @PCI_DMA_TODEVICE, align 4, !tbaa !11
%35 = tail call i32 @pci_map_single(i32 noundef %30, i32 noundef %32, i64 noundef %33, i32 noundef %34) #2
%36 = load i32, ptr %14, align 4, !tbaa !12
%37 = tail call i64 @pci_dma_mapping_error(i32 noundef %36, i32 noundef %35) #2
%38 = icmp eq i64 %37, 0
br i1 %38, label %39, label %235
39: ; preds = %9
%40 = load i64, ptr %12, align 8, !tbaa !18
%41 = load i64, ptr @NL80211_IFTYPE_STATION, align 8, !tbaa !20
%42 = icmp eq i64 %40, %41
br i1 %42, label %43, label %46
43: ; preds = %39
%44 = getelementptr inbounds %struct.rtl_mac, ptr %12, i64 0, i32 1
%45 = load i32, ptr %44, align 8, !tbaa !21
br label %61
46: ; preds = %39
%47 = load i64, ptr @NL80211_IFTYPE_AP, align 8, !tbaa !20
%48 = icmp eq i64 %40, %47
br i1 %48, label %54, label %49
49: ; preds = %46
%50 = load i64, ptr @NL80211_IFTYPE_ADHOC, align 8, !tbaa !20
%51 = icmp eq i64 %40, %50
%52 = icmp ne ptr %5, null
%53 = and i1 %52, %51
br i1 %53, label %56, label %61
54: ; preds = %46
%55 = icmp eq ptr %5, null
br i1 %55, label %61, label %56
56: ; preds = %49, %54
%57 = load i64, ptr %5, align 8, !tbaa !22
%58 = load i64, ptr @IEEE80211_STA_RX_BW_40, align 8, !tbaa !20
%59 = icmp sge i64 %57, %58
%60 = zext i1 %59 to i32
br label %61
61: ; preds = %49, %56, %54, %43
%62 = phi i32 [ %45, %43 ], [ %60, %56 ], [ 0, %54 ], [ 0, %49 ]
%63 = load i32, ptr %19, align 4, !tbaa !10
%64 = tail call i32 @le16_to_cpu(i32 noundef %63) #2
%65 = load i32, ptr @IEEE80211_SCTL_SEQ, align 4, !tbaa !11
%66 = and i32 %65, %64
%67 = ashr i32 %66, 4
%68 = tail call i32 @rtl_get_tcb_desc(ptr noundef %0, ptr noundef %4, ptr noundef %5, ptr noundef nonnull %6, ptr noundef %8) #2
%69 = load i32, ptr @TX_DESC_SIZE_RTL8192S, align 4, !tbaa !11
%70 = tail call i32 @CLEAR_PCI_TX_DESC_CONTENT(ptr noundef %2, i32 noundef %69) #2
%71 = tail call i64 @ieee80211_is_nullfunc(i32 noundef %17) #2
%72 = icmp eq i64 %71, 0
br i1 %72, label %73, label %78
73: ; preds = %61
%74 = tail call i64 @ieee80211_is_ctl(i32 noundef %17) #2
%75 = icmp ne i64 %74, 0
%76 = select i1 %75, i1 true, i1 %24
%77 = select i1 %75, i1 true, i1 %29
br i1 %76, label %78, label %225
78: ; preds = %73, %61
%79 = phi i1 [ true, %61 ], [ %77, %73 ]
%80 = load i64, ptr %10, align 8, !tbaa !24
%81 = icmp eq i64 %80, 0
br i1 %81, label %88, label %82
82: ; preds = %78
%83 = load i32, ptr %8, align 8, !tbaa !27
%84 = icmp slt i32 %83, 32
br i1 %84, label %85, label %88
85: ; preds = %82
%86 = tail call i32 @SET_TX_DESC_MACID(ptr noundef %2, i32 noundef %83) #2
%87 = load i32, ptr %8, align 8, !tbaa !27
br label %88
88: ; preds = %82, %85, %78
%89 = phi i32 [ %87, %85 ], [ 0, %82 ], [ 0, %78 ]
%90 = tail call i32 @SET_TX_DESC_RSVD_MACID(ptr noundef %2, i32 noundef %89) #2
%91 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 13
%92 = load i32, ptr %91, align 8, !tbaa !29
%93 = load i32, ptr @DESC_RATEMCS0, align 4, !tbaa !11
%94 = icmp sge i32 %92, %93
%95 = zext i1 %94 to i32
%96 = tail call i32 @SET_TX_DESC_TXHT(ptr noundef %2, i32 noundef %95) #2
%97 = load i64, ptr %16, align 8, !tbaa !30
%98 = load i64, ptr @VERSION_8192S_ACUT, align 8, !tbaa !20
%99 = icmp eq i64 %97, %98
%100 = load i32, ptr %91, align 8, !tbaa !29
br i1 %99, label %101, label %115
101: ; preds = %88
%102 = load i32, ptr @DESC_RATE1M, align 4, !tbaa !11
%103 = icmp eq i32 %100, %102
%104 = load i32, ptr @DESC_RATE2M, align 4
%105 = icmp eq i32 %100, %104
%106 = select i1 %103, i1 true, i1 %105
%107 = load i32, ptr @DESC_RATE5_5M, align 4
%108 = icmp eq i32 %100, %107
%109 = select i1 %106, i1 true, i1 %108
%110 = load i32, ptr @DESC_RATE11M, align 4
%111 = icmp eq i32 %100, %110
%112 = select i1 %109, i1 true, i1 %111
br i1 %112, label %113, label %115
113: ; preds = %101
%114 = load i32, ptr @DESC_RATE12M, align 4, !tbaa !11
store i32 %114, ptr %91, align 8, !tbaa !29
br label %115
115: ; preds = %101, %113, %88
%116 = phi i32 [ %100, %101 ], [ %114, %113 ], [ %100, %88 ]
%117 = tail call i32 @SET_TX_DESC_TX_RATE(ptr noundef %2, i32 noundef %116) #2
%118 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 12
%119 = load i64, ptr %118, align 8, !tbaa !32
%120 = icmp eq i64 %119, 0
br i1 %120, label %121, label %125
121: ; preds = %115
%122 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 11
%123 = load i64, ptr %122, align 8, !tbaa !33
%124 = icmp eq i64 %123, 0
br i1 %124, label %127, label %125
125: ; preds = %121, %115
%126 = tail call i32 @SET_TX_DESC_TX_SHORT(ptr noundef %2, i32 noundef 0) #2
br label %127
127: ; preds = %125, %121
%128 = load i32, ptr %4, align 8, !tbaa !34
%129 = load i32, ptr @IEEE80211_TX_CTL_AMPDU, align 4, !tbaa !11
%130 = and i32 %129, %128
%131 = icmp eq i32 %130, 0
br i1 %131, label %134, label %132
132: ; preds = %127
%133 = tail call i32 @SET_TX_DESC_AGG_ENABLE(ptr noundef %2, i32 noundef 1) #2
br label %134
134: ; preds = %132, %127
%135 = tail call i32 @SET_TX_DESC_SEQ(ptr noundef %2, i32 noundef %67) #2
%136 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 10
%137 = load i64, ptr %136, align 8, !tbaa !38
%138 = icmp eq i64 %137, 0
br i1 %138, label %144, label %139
139: ; preds = %134
%140 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 9
%141 = load i64, ptr %140, align 8, !tbaa !39
%142 = icmp eq i64 %141, 0
%143 = zext i1 %142 to i32
br label %144
144: ; preds = %139, %134
%145 = phi i32 [ 0, %134 ], [ %143, %139 ]
%146 = tail call i32 @SET_TX_DESC_RTS_ENABLE(ptr noundef %2, i32 noundef %145) #2
%147 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 9
%148 = load i64, ptr %147, align 8, !tbaa !39
%149 = icmp ne i64 %148, 0
%150 = zext i1 %149 to i32
%151 = tail call i32 @SET_TX_DESC_CTS_ENABLE(ptr noundef %2, i32 noundef %150) #2
%152 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 8
%153 = load i64, ptr %152, align 8, !tbaa !40
%154 = icmp ne i64 %153, 0
%155 = zext i1 %154 to i32
%156 = tail call i32 @SET_TX_DESC_RTS_STBC(ptr noundef %2, i32 noundef %155) #2
%157 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 6
%158 = load i32, ptr %157, align 8, !tbaa !41
%159 = tail call i32 @SET_TX_DESC_RTS_RATE(ptr noundef %2, i32 noundef %158) #2
%160 = tail call i32 @SET_TX_DESC_RTS_BANDWIDTH(ptr noundef %2, i32 noundef 0) #2
%161 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 7
%162 = load i32, ptr %161, align 4, !tbaa !42
%163 = tail call i32 @SET_TX_DESC_RTS_SUB_CARRIER(ptr noundef %2, i32 noundef %162) #2
%164 = load i32, ptr %157, align 8, !tbaa !41
%165 = load i32, ptr @DESC_RATE54M, align 4, !tbaa !11
%166 = icmp sgt i32 %164, %165
%167 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 5
%168 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 4
%169 = select i1 %166, ptr %168, ptr %167
%170 = load i64, ptr %169, align 8, !tbaa !20
%171 = icmp ne i64 %170, 0
%172 = zext i1 %171 to i32
%173 = tail call i32 @SET_TX_DESC_RTS_SHORT(ptr noundef %2, i32 noundef %172) #2
%174 = icmp eq i32 %62, 0
br i1 %174, label %185, label %175
175: ; preds = %144
%176 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 3
%177 = load i64, ptr %176, align 8, !tbaa !43
%178 = icmp eq i64 %177, 0
br i1 %178, label %181, label %179
179: ; preds = %175
%180 = tail call i32 @SET_TX_DESC_TX_BANDWIDTH(ptr noundef %2, i32 noundef 1) #2
br label %187
181: ; preds = %175
%182 = tail call i32 @SET_TX_DESC_TX_BANDWIDTH(ptr noundef %2, i32 noundef 0) #2
%183 = getelementptr inbounds %struct.rtl_mac, ptr %12, i64 0, i32 2
%184 = load i32, ptr %183, align 4, !tbaa !44
br label %187
185: ; preds = %144
%186 = tail call i32 @SET_TX_DESC_TX_BANDWIDTH(ptr noundef %2, i32 noundef 0) #2
br label %187
187: ; preds = %179, %181, %185
%188 = phi i32 [ 0, %179 ], [ %184, %181 ], [ 0, %185 ]
%189 = tail call i32 @SET_TX_DESC_TX_SUB_CARRIER(ptr noundef %2, i32 noundef %188) #2
%190 = tail call i32 @SET_TX_DESC_LINIP(ptr noundef %2, i32 noundef 0) #2
%191 = tail call i32 @SET_TX_DESC_OFFSET(ptr noundef %2, i32 noundef 32) #2
%192 = load i64, ptr %6, align 8, !tbaa !17
%193 = trunc i64 %192 to i32
%194 = tail call i32 @SET_TX_DESC_PKT_SIZE(ptr noundef %2, i32 noundef %193) #2
%195 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 2
%196 = load i32, ptr %195, align 8, !tbaa !45
%197 = tail call i32 @SET_TX_DESC_RA_BRSR_ID(ptr noundef %2, i32 noundef %196) #2
%198 = getelementptr inbounds %struct.ieee80211_tx_info, ptr %4, i64 0, i32 1
%199 = load ptr, ptr %198, align 8, !tbaa !46
%200 = icmp eq ptr %199, null
br i1 %200, label %212, label %201
201: ; preds = %187
%202 = load i32, ptr %199, align 4, !tbaa !47
%203 = add i32 %202, -128
%204 = icmp ult i32 %203, 4
br i1 %204, label %205, label %209
205: ; preds = %201
%206 = zext nneg i32 %203 to i64
%207 = getelementptr inbounds [4 x i32], ptr @switch.table.rtl92se_tx_fill_desc, i64 0, i64 %206
%208 = load i32, ptr %207, align 4
br label %209
209: ; preds = %201, %205
%210 = phi i32 [ %208, %205 ], [ 0, %201 ]
%211 = tail call i32 @SET_TX_DESC_SEC_TYPE(ptr noundef %2, i32 noundef %210) #2
br label %212
212: ; preds = %209, %187
%213 = tail call i32 @SET_TX_DESC_PACKET_ID(ptr noundef %2, i32 noundef 0) #2
%214 = tail call i32 @SET_TX_DESC_QUEUE_SEL(ptr noundef %2, i32 noundef %18) #2
%215 = tail call i32 @SET_TX_DESC_DATA_RATE_FB_LIMIT(ptr noundef %2, i32 noundef 31) #2
%216 = getelementptr inbounds %struct.rtl_tcb_desc, ptr %8, i64 0, i32 1
%217 = load i64, ptr %216, align 8, !tbaa !49
%218 = icmp ne i64 %217, 0
%219 = zext i1 %218 to i32
%220 = tail call i32 @SET_TX_DESC_USER_RATE(ptr noundef %2, i32 noundef %219) #2
%221 = tail call i32 @ieee80211_is_data_qos(i32 noundef %17) #2
%222 = icmp eq i32 %221, 0
br i1 %222, label %223, label %225
223: ; preds = %212
%224 = tail call i32 @SET_TX_DESC_NON_QOS(ptr noundef %2, i32 noundef 1) #2
br label %225
225: ; preds = %73, %212, %223
%226 = phi i32 [ 1, %212 ], [ 1, %223 ], [ 0, %73 ]
%227 = phi i1 [ %79, %212 ], [ %79, %223 ], [ %29, %73 ]
%228 = tail call i32 @SET_TX_DESC_FIRST_SEG(ptr noundef %2, i32 noundef %226) #2
%229 = zext i1 %227 to i32
%230 = tail call i32 @SET_TX_DESC_LAST_SEG(ptr noundef %2, i32 noundef %229) #2
%231 = load i64, ptr %6, align 8, !tbaa !17
%232 = trunc i64 %231 to i32
%233 = tail call i32 @SET_TX_DESC_TX_BUFFER_SIZE(ptr noundef %2, i32 noundef %232) #2
%234 = tail call i32 @SET_TX_DESC_TX_BUFFER_ADDRESS(ptr noundef %2, i32 noundef %35) #2
br label %235
235: ; preds = %9, %225
%236 = phi ptr [ @.str.1, %225 ], [ @.str, %9 ]
%237 = load i32, ptr @COMP_SEND, align 4, !tbaa !11
%238 = load i32, ptr @DBG_TRACE, align 4, !tbaa !11
%239 = tail call i32 @RT_TRACE(ptr noundef %10, i32 noundef %237, i32 noundef %238, ptr noundef nonnull %236) #2
ret void
}
declare ptr @rtl_priv(ptr noundef) local_unnamed_addr #1
declare ptr @rtl_mac(ptr noundef) local_unnamed_addr #1
declare ptr @rtl_pcidev(i32 noundef) local_unnamed_addr #1
declare i32 @rtl_pcipriv(ptr noundef) local_unnamed_addr #1
declare ptr @rtl_hal(ptr noundef) local_unnamed_addr #1
declare i32 @_rtl92se_map_hwqueue_to_fwqueue(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpu_to_le16(i32 noundef) local_unnamed_addr #1
declare i32 @pci_map_single(i32 noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pci_dma_mapping_error(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RT_TRACE(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @rtl_get_tcb_desc(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @CLEAR_PCI_TX_DESC_CONTENT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ieee80211_is_nullfunc(i32 noundef) local_unnamed_addr #1
declare i64 @ieee80211_is_ctl(i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_MACID(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RSVD_MACID(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TXHT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_RATE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_SHORT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_AGG_ENABLE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_SEQ(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_ENABLE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_CTS_ENABLE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_STBC(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_RATE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_BANDWIDTH(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_SUB_CARRIER(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_SHORT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_BANDWIDTH(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_SUB_CARRIER(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_LINIP(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_OFFSET(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_PKT_SIZE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RA_BRSR_ID(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_SEC_TYPE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_PACKET_ID(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_QUEUE_SEL(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_DATA_RATE_FB_LIMIT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_USER_RATE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ieee80211_is_data_qos(i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_NON_QOS(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_FIRST_SEG(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_LAST_SEG(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_BUFFER_SIZE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_BUFFER_ADDRESS(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ieee80211_hdr", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"rtl_pci", !7, i64 0}
!14 = !{!15, !7, i64 8}
!15 = !{!"sk_buff", !16, i64 0, !7, i64 8}
!16 = !{!"long", !8, i64 0}
!17 = !{!15, !16, i64 0}
!18 = !{!19, !16, i64 0}
!19 = !{!"rtl_mac", !16, i64 0, !7, i64 8, !7, i64 12}
!20 = !{!16, !16, i64 0}
!21 = !{!19, !7, i64 8}
!22 = !{!23, !16, i64 0}
!23 = !{!"ieee80211_sta", !16, i64 0}
!24 = !{!25, !16, i64 0}
!25 = !{!"rtl_priv", !26, i64 0}
!26 = !{!"TYPE_3__", !16, i64 0}
!27 = !{!28, !7, i64 0}
!28 = !{!"rtl_tcb_desc", !7, i64 0, !16, i64 8, !7, i64 16, !16, i64 24, !16, i64 32, !16, i64 40, !7, i64 48, !7, i64 52, !16, i64 56, !16, i64 64, !16, i64 72, !16, i64 80, !16, i64 88, !7, i64 96}
!29 = !{!28, !7, i64 96}
!30 = !{!31, !16, i64 0}
!31 = !{!"rtl_hal", !16, i64 0}
!32 = !{!28, !16, i64 88}
!33 = !{!28, !16, i64 80}
!34 = !{!35, !7, i64 0}
!35 = !{!"ieee80211_tx_info", !7, i64 0, !36, i64 8}
!36 = !{!"TYPE_4__", !37, i64 0}
!37 = !{!"any pointer", !8, i64 0}
!38 = !{!28, !16, i64 72}
!39 = !{!28, !16, i64 64}
!40 = !{!28, !16, i64 56}
!41 = !{!28, !7, i64 48}
!42 = !{!28, !7, i64 52}
!43 = !{!28, !16, i64 24}
!44 = !{!19, !7, i64 12}
!45 = !{!28, !7, i64 16}
!46 = !{!35, !37, i64 8}
!47 = !{!48, !7, i64 0}
!48 = !{!"ieee80211_key_conf", !7, i64 0}
!49 = !{!28, !16, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/extr_trx.c_rtl92se_tx_fill_desc.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/extr_trx.c_rtl92se_tx_fill_desc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IEEE80211_SCTL_FRAG = common local_unnamed_addr global i32 0, align 4
@IEEE80211_FCTL_MOREFRAGS = common local_unnamed_addr global i32 0, align 4
@PCI_DMA_TODEVICE = common local_unnamed_addr global i32 0, align 4
@COMP_SEND = common local_unnamed_addr global i32 0, align 4
@DBG_TRACE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [19 x i8] c"DMA mapping error\0A\00", align 1
@NL80211_IFTYPE_STATION = common local_unnamed_addr global i64 0, align 8
@NL80211_IFTYPE_AP = common local_unnamed_addr global i64 0, align 8
@NL80211_IFTYPE_ADHOC = common local_unnamed_addr global i64 0, align 8
@IEEE80211_STA_RX_BW_40 = common local_unnamed_addr global i64 0, align 8
@IEEE80211_SCTL_SEQ = common local_unnamed_addr global i32 0, align 4
@TX_DESC_SIZE_RTL8192S = common local_unnamed_addr global i32 0, align 4
@DESC_RATEMCS0 = common local_unnamed_addr global i32 0, align 4
@VERSION_8192S_ACUT = common local_unnamed_addr global i64 0, align 8
@DESC_RATE1M = common local_unnamed_addr global i32 0, align 4
@DESC_RATE2M = common local_unnamed_addr global i32 0, align 4
@DESC_RATE5_5M = common local_unnamed_addr global i32 0, align 4
@DESC_RATE11M = common local_unnamed_addr global i32 0, align 4
@DESC_RATE12M = common local_unnamed_addr global i32 0, align 4
@IEEE80211_TX_CTL_AMPDU = common local_unnamed_addr global i32 0, align 4
@DESC_RATE54M = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
@switch.table.rtl92se_tx_fill_desc = private unnamed_addr constant [4 x i32] [i32 1, i32 1, i32 2, i32 3], align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @rtl92se_tx_fill_desc(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2, ptr nocapture noundef readnone %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8) local_unnamed_addr #0 {
%10 = tail call ptr @rtl_priv(ptr noundef %0) #2
%11 = tail call ptr @rtl_priv(ptr noundef %0) #2
%12 = tail call ptr @rtl_mac(ptr noundef %11) #2
%13 = tail call i32 @rtl_pcipriv(ptr noundef %0) #2
%14 = tail call ptr @rtl_pcidev(i32 noundef %13) #2
%15 = tail call ptr @rtl_priv(ptr noundef %0) #2
%16 = tail call ptr @rtl_hal(ptr noundef %15) #2
%17 = load i32, ptr %1, align 4, !tbaa !6
%18 = tail call i32 @_rtl92se_map_hwqueue_to_fwqueue(ptr noundef %6, i32 noundef %7) #2
%19 = getelementptr inbounds i8, ptr %1, i64 4
%20 = load i32, ptr %19, align 4, !tbaa !11
%21 = load i32, ptr @IEEE80211_SCTL_FRAG, align 4, !tbaa !12
%22 = tail call i32 @cpu_to_le16(i32 noundef %21) #2
%23 = and i32 %22, %20
%24 = icmp eq i32 %23, 0
%25 = load i32, ptr %1, align 4, !tbaa !6
%26 = load i32, ptr @IEEE80211_FCTL_MOREFRAGS, align 4, !tbaa !12
%27 = tail call i32 @cpu_to_le16(i32 noundef %26) #2
%28 = and i32 %27, %25
%29 = icmp eq i32 %28, 0
%30 = load i32, ptr %14, align 4, !tbaa !13
%31 = getelementptr inbounds i8, ptr %6, i64 8
%32 = load i32, ptr %31, align 8, !tbaa !15
%33 = load i64, ptr %6, align 8, !tbaa !18
%34 = load i32, ptr @PCI_DMA_TODEVICE, align 4, !tbaa !12
%35 = tail call i32 @pci_map_single(i32 noundef %30, i32 noundef %32, i64 noundef %33, i32 noundef %34) #2
%36 = load i32, ptr %14, align 4, !tbaa !13
%37 = tail call i64 @pci_dma_mapping_error(i32 noundef %36, i32 noundef %35) #2
%38 = icmp eq i64 %37, 0
br i1 %38, label %39, label %234
39: ; preds = %9
%40 = load i64, ptr %12, align 8, !tbaa !19
%41 = load i64, ptr @NL80211_IFTYPE_STATION, align 8, !tbaa !21
%42 = icmp eq i64 %40, %41
br i1 %42, label %43, label %46
43: ; preds = %39
%44 = getelementptr inbounds i8, ptr %12, i64 8
%45 = load i32, ptr %44, align 8, !tbaa !22
br label %61
46: ; preds = %39
%47 = load i64, ptr @NL80211_IFTYPE_AP, align 8, !tbaa !21
%48 = icmp eq i64 %40, %47
br i1 %48, label %54, label %49
49: ; preds = %46
%50 = load i64, ptr @NL80211_IFTYPE_ADHOC, align 8, !tbaa !21
%51 = icmp eq i64 %40, %50
%52 = icmp ne ptr %5, null
%53 = and i1 %52, %51
br i1 %53, label %56, label %61
54: ; preds = %46
%55 = icmp eq ptr %5, null
br i1 %55, label %61, label %56
56: ; preds = %49, %54
%57 = load i64, ptr %5, align 8, !tbaa !23
%58 = load i64, ptr @IEEE80211_STA_RX_BW_40, align 8, !tbaa !21
%59 = icmp sge i64 %57, %58
%60 = zext i1 %59 to i32
br label %61
61: ; preds = %49, %56, %54, %43
%62 = phi i32 [ %45, %43 ], [ %60, %56 ], [ 0, %54 ], [ 0, %49 ]
%63 = load i32, ptr %19, align 4, !tbaa !11
%64 = tail call i32 @le16_to_cpu(i32 noundef %63) #2
%65 = load i32, ptr @IEEE80211_SCTL_SEQ, align 4, !tbaa !12
%66 = and i32 %65, %64
%67 = ashr i32 %66, 4
%68 = tail call i32 @rtl_get_tcb_desc(ptr noundef %0, ptr noundef %4, ptr noundef %5, ptr noundef nonnull %6, ptr noundef %8) #2
%69 = load i32, ptr @TX_DESC_SIZE_RTL8192S, align 4, !tbaa !12
%70 = tail call i32 @CLEAR_PCI_TX_DESC_CONTENT(ptr noundef %2, i32 noundef %69) #2
%71 = tail call i64 @ieee80211_is_nullfunc(i32 noundef %17) #2
%72 = icmp eq i64 %71, 0
br i1 %72, label %73, label %78
73: ; preds = %61
%74 = tail call i64 @ieee80211_is_ctl(i32 noundef %17) #2
%75 = icmp ne i64 %74, 0
%76 = select i1 %75, i1 true, i1 %24
%77 = select i1 %75, i1 true, i1 %29
br i1 %76, label %78, label %224
78: ; preds = %73, %61
%79 = phi i1 [ true, %61 ], [ %77, %73 ]
%80 = load i64, ptr %10, align 8, !tbaa !25
%81 = icmp eq i64 %80, 0
br i1 %81, label %88, label %82
82: ; preds = %78
%83 = load i32, ptr %8, align 8, !tbaa !28
%84 = icmp slt i32 %83, 32
br i1 %84, label %85, label %88
85: ; preds = %82
%86 = tail call i32 @SET_TX_DESC_MACID(ptr noundef %2, i32 noundef %83) #2
%87 = load i32, ptr %8, align 8, !tbaa !28
br label %88
88: ; preds = %82, %85, %78
%89 = phi i32 [ %87, %85 ], [ 0, %82 ], [ 0, %78 ]
%90 = tail call i32 @SET_TX_DESC_RSVD_MACID(ptr noundef %2, i32 noundef %89) #2
%91 = getelementptr inbounds i8, ptr %8, i64 96
%92 = load i32, ptr %91, align 8, !tbaa !30
%93 = load i32, ptr @DESC_RATEMCS0, align 4, !tbaa !12
%94 = icmp sge i32 %92, %93
%95 = zext i1 %94 to i32
%96 = tail call i32 @SET_TX_DESC_TXHT(ptr noundef %2, i32 noundef %95) #2
%97 = load i64, ptr %16, align 8, !tbaa !31
%98 = load i64, ptr @VERSION_8192S_ACUT, align 8, !tbaa !21
%99 = icmp eq i64 %97, %98
%100 = load i32, ptr %91, align 8, !tbaa !30
br i1 %99, label %101, label %115
101: ; preds = %88
%102 = load i32, ptr @DESC_RATE1M, align 4, !tbaa !12
%103 = icmp eq i32 %100, %102
%104 = load i32, ptr @DESC_RATE2M, align 4
%105 = icmp eq i32 %100, %104
%106 = select i1 %103, i1 true, i1 %105
%107 = load i32, ptr @DESC_RATE5_5M, align 4
%108 = icmp eq i32 %100, %107
%109 = select i1 %106, i1 true, i1 %108
%110 = load i32, ptr @DESC_RATE11M, align 4
%111 = icmp eq i32 %100, %110
%112 = select i1 %109, i1 true, i1 %111
br i1 %112, label %113, label %115
113: ; preds = %101
%114 = load i32, ptr @DESC_RATE12M, align 4, !tbaa !12
store i32 %114, ptr %91, align 8, !tbaa !30
br label %115
115: ; preds = %101, %113, %88
%116 = phi i32 [ %100, %101 ], [ %114, %113 ], [ %100, %88 ]
%117 = tail call i32 @SET_TX_DESC_TX_RATE(ptr noundef %2, i32 noundef %116) #2
%118 = getelementptr inbounds i8, ptr %8, i64 88
%119 = load i64, ptr %118, align 8, !tbaa !33
%120 = icmp eq i64 %119, 0
br i1 %120, label %121, label %125
121: ; preds = %115
%122 = getelementptr inbounds i8, ptr %8, i64 80
%123 = load i64, ptr %122, align 8, !tbaa !34
%124 = icmp eq i64 %123, 0
br i1 %124, label %127, label %125
125: ; preds = %121, %115
%126 = tail call i32 @SET_TX_DESC_TX_SHORT(ptr noundef %2, i32 noundef 0) #2
br label %127
127: ; preds = %125, %121
%128 = load i32, ptr %4, align 8, !tbaa !35
%129 = load i32, ptr @IEEE80211_TX_CTL_AMPDU, align 4, !tbaa !12
%130 = and i32 %129, %128
%131 = icmp eq i32 %130, 0
br i1 %131, label %134, label %132
132: ; preds = %127
%133 = tail call i32 @SET_TX_DESC_AGG_ENABLE(ptr noundef %2, i32 noundef 1) #2
br label %134
134: ; preds = %132, %127
%135 = tail call i32 @SET_TX_DESC_SEQ(ptr noundef %2, i32 noundef %67) #2
%136 = getelementptr inbounds i8, ptr %8, i64 72
%137 = load i64, ptr %136, align 8, !tbaa !39
%138 = icmp eq i64 %137, 0
br i1 %138, label %144, label %139
139: ; preds = %134
%140 = getelementptr inbounds i8, ptr %8, i64 64
%141 = load i64, ptr %140, align 8, !tbaa !40
%142 = icmp eq i64 %141, 0
%143 = zext i1 %142 to i32
br label %144
144: ; preds = %139, %134
%145 = phi i32 [ 0, %134 ], [ %143, %139 ]
%146 = tail call i32 @SET_TX_DESC_RTS_ENABLE(ptr noundef %2, i32 noundef %145) #2
%147 = getelementptr inbounds i8, ptr %8, i64 64
%148 = load i64, ptr %147, align 8, !tbaa !40
%149 = icmp ne i64 %148, 0
%150 = zext i1 %149 to i32
%151 = tail call i32 @SET_TX_DESC_CTS_ENABLE(ptr noundef %2, i32 noundef %150) #2
%152 = getelementptr inbounds i8, ptr %8, i64 56
%153 = load i64, ptr %152, align 8, !tbaa !41
%154 = icmp ne i64 %153, 0
%155 = zext i1 %154 to i32
%156 = tail call i32 @SET_TX_DESC_RTS_STBC(ptr noundef %2, i32 noundef %155) #2
%157 = getelementptr inbounds i8, ptr %8, i64 48
%158 = load i32, ptr %157, align 8, !tbaa !42
%159 = tail call i32 @SET_TX_DESC_RTS_RATE(ptr noundef %2, i32 noundef %158) #2
%160 = tail call i32 @SET_TX_DESC_RTS_BANDWIDTH(ptr noundef %2, i32 noundef 0) #2
%161 = getelementptr inbounds i8, ptr %8, i64 52
%162 = load i32, ptr %161, align 4, !tbaa !43
%163 = tail call i32 @SET_TX_DESC_RTS_SUB_CARRIER(ptr noundef %2, i32 noundef %162) #2
%164 = load i32, ptr %157, align 8, !tbaa !42
%165 = load i32, ptr @DESC_RATE54M, align 4, !tbaa !12
%166 = icmp sgt i32 %164, %165
%167 = select i1 %166, i64 32, i64 40
%168 = getelementptr inbounds i8, ptr %8, i64 %167
%169 = load i64, ptr %168, align 8, !tbaa !21
%170 = icmp ne i64 %169, 0
%171 = zext i1 %170 to i32
%172 = tail call i32 @SET_TX_DESC_RTS_SHORT(ptr noundef %2, i32 noundef %171) #2
%173 = icmp eq i32 %62, 0
br i1 %173, label %184, label %174
174: ; preds = %144
%175 = getelementptr inbounds i8, ptr %8, i64 24
%176 = load i64, ptr %175, align 8, !tbaa !44
%177 = icmp eq i64 %176, 0
br i1 %177, label %180, label %178
178: ; preds = %174
%179 = tail call i32 @SET_TX_DESC_TX_BANDWIDTH(ptr noundef %2, i32 noundef 1) #2
br label %186
180: ; preds = %174
%181 = tail call i32 @SET_TX_DESC_TX_BANDWIDTH(ptr noundef %2, i32 noundef 0) #2
%182 = getelementptr inbounds i8, ptr %12, i64 12
%183 = load i32, ptr %182, align 4, !tbaa !45
br label %186
184: ; preds = %144
%185 = tail call i32 @SET_TX_DESC_TX_BANDWIDTH(ptr noundef %2, i32 noundef 0) #2
br label %186
186: ; preds = %178, %180, %184
%187 = phi i32 [ 0, %178 ], [ %183, %180 ], [ 0, %184 ]
%188 = tail call i32 @SET_TX_DESC_TX_SUB_CARRIER(ptr noundef %2, i32 noundef %187) #2
%189 = tail call i32 @SET_TX_DESC_LINIP(ptr noundef %2, i32 noundef 0) #2
%190 = tail call i32 @SET_TX_DESC_OFFSET(ptr noundef %2, i32 noundef 32) #2
%191 = load i64, ptr %6, align 8, !tbaa !18
%192 = trunc i64 %191 to i32
%193 = tail call i32 @SET_TX_DESC_PKT_SIZE(ptr noundef %2, i32 noundef %192) #2
%194 = getelementptr inbounds i8, ptr %8, i64 16
%195 = load i32, ptr %194, align 8, !tbaa !46
%196 = tail call i32 @SET_TX_DESC_RA_BRSR_ID(ptr noundef %2, i32 noundef %195) #2
%197 = getelementptr inbounds i8, ptr %4, i64 8
%198 = load ptr, ptr %197, align 8, !tbaa !47
%199 = icmp eq ptr %198, null
br i1 %199, label %211, label %200
200: ; preds = %186
%201 = load i32, ptr %198, align 4, !tbaa !48
%202 = add i32 %201, -128
%203 = icmp ult i32 %202, 4
br i1 %203, label %204, label %208
204: ; preds = %200
%205 = zext nneg i32 %202 to i64
%206 = getelementptr inbounds [4 x i32], ptr @switch.table.rtl92se_tx_fill_desc, i64 0, i64 %205
%207 = load i32, ptr %206, align 4
br label %208
208: ; preds = %200, %204
%209 = phi i32 [ %207, %204 ], [ 0, %200 ]
%210 = tail call i32 @SET_TX_DESC_SEC_TYPE(ptr noundef %2, i32 noundef %209) #2
br label %211
211: ; preds = %208, %186
%212 = tail call i32 @SET_TX_DESC_PACKET_ID(ptr noundef %2, i32 noundef 0) #2
%213 = tail call i32 @SET_TX_DESC_QUEUE_SEL(ptr noundef %2, i32 noundef %18) #2
%214 = tail call i32 @SET_TX_DESC_DATA_RATE_FB_LIMIT(ptr noundef %2, i32 noundef 31) #2
%215 = getelementptr inbounds i8, ptr %8, i64 8
%216 = load i64, ptr %215, align 8, !tbaa !50
%217 = icmp ne i64 %216, 0
%218 = zext i1 %217 to i32
%219 = tail call i32 @SET_TX_DESC_USER_RATE(ptr noundef %2, i32 noundef %218) #2
%220 = tail call i32 @ieee80211_is_data_qos(i32 noundef %17) #2
%221 = icmp eq i32 %220, 0
br i1 %221, label %222, label %224
222: ; preds = %211
%223 = tail call i32 @SET_TX_DESC_NON_QOS(ptr noundef %2, i32 noundef 1) #2
br label %224
224: ; preds = %73, %211, %222
%225 = phi i32 [ 1, %211 ], [ 1, %222 ], [ 0, %73 ]
%226 = phi i1 [ %79, %211 ], [ %79, %222 ], [ %29, %73 ]
%227 = tail call i32 @SET_TX_DESC_FIRST_SEG(ptr noundef %2, i32 noundef %225) #2
%228 = zext i1 %226 to i32
%229 = tail call i32 @SET_TX_DESC_LAST_SEG(ptr noundef %2, i32 noundef %228) #2
%230 = load i64, ptr %6, align 8, !tbaa !18
%231 = trunc i64 %230 to i32
%232 = tail call i32 @SET_TX_DESC_TX_BUFFER_SIZE(ptr noundef %2, i32 noundef %231) #2
%233 = tail call i32 @SET_TX_DESC_TX_BUFFER_ADDRESS(ptr noundef %2, i32 noundef %35) #2
br label %234
234: ; preds = %9, %224
%235 = phi ptr [ @.str.1, %224 ], [ @.str, %9 ]
%236 = load i32, ptr @COMP_SEND, align 4, !tbaa !12
%237 = load i32, ptr @DBG_TRACE, align 4, !tbaa !12
%238 = tail call i32 @RT_TRACE(ptr noundef %10, i32 noundef %236, i32 noundef %237, ptr noundef nonnull %235) #2
ret void
}
declare ptr @rtl_priv(ptr noundef) local_unnamed_addr #1
declare ptr @rtl_mac(ptr noundef) local_unnamed_addr #1
declare ptr @rtl_pcidev(i32 noundef) local_unnamed_addr #1
declare i32 @rtl_pcipriv(ptr noundef) local_unnamed_addr #1
declare ptr @rtl_hal(ptr noundef) local_unnamed_addr #1
declare i32 @_rtl92se_map_hwqueue_to_fwqueue(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpu_to_le16(i32 noundef) local_unnamed_addr #1
declare i32 @pci_map_single(i32 noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pci_dma_mapping_error(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RT_TRACE(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @rtl_get_tcb_desc(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @CLEAR_PCI_TX_DESC_CONTENT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ieee80211_is_nullfunc(i32 noundef) local_unnamed_addr #1
declare i64 @ieee80211_is_ctl(i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_MACID(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RSVD_MACID(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TXHT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_RATE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_SHORT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_AGG_ENABLE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_SEQ(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_ENABLE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_CTS_ENABLE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_STBC(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_RATE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_BANDWIDTH(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_SUB_CARRIER(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RTS_SHORT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_BANDWIDTH(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_SUB_CARRIER(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_LINIP(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_OFFSET(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_PKT_SIZE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_RA_BRSR_ID(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_SEC_TYPE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_PACKET_ID(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_QUEUE_SEL(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_DATA_RATE_FB_LIMIT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_USER_RATE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ieee80211_is_data_qos(i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_NON_QOS(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_FIRST_SEG(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_LAST_SEG(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_BUFFER_SIZE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_TX_DESC_TX_BUFFER_ADDRESS(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ieee80211_hdr", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"rtl_pci", !8, i64 0}
!15 = !{!16, !8, i64 8}
!16 = !{!"sk_buff", !17, i64 0, !8, i64 8}
!17 = !{!"long", !9, i64 0}
!18 = !{!16, !17, i64 0}
!19 = !{!20, !17, i64 0}
!20 = !{!"rtl_mac", !17, i64 0, !8, i64 8, !8, i64 12}
!21 = !{!17, !17, i64 0}
!22 = !{!20, !8, i64 8}
!23 = !{!24, !17, i64 0}
!24 = !{!"ieee80211_sta", !17, i64 0}
!25 = !{!26, !17, i64 0}
!26 = !{!"rtl_priv", !27, i64 0}
!27 = !{!"TYPE_3__", !17, i64 0}
!28 = !{!29, !8, i64 0}
!29 = !{!"rtl_tcb_desc", !8, i64 0, !17, i64 8, !8, i64 16, !17, i64 24, !17, i64 32, !17, i64 40, !8, i64 48, !8, i64 52, !17, i64 56, !17, i64 64, !17, i64 72, !17, i64 80, !17, i64 88, !8, i64 96}
!30 = !{!29, !8, i64 96}
!31 = !{!32, !17, i64 0}
!32 = !{!"rtl_hal", !17, i64 0}
!33 = !{!29, !17, i64 88}
!34 = !{!29, !17, i64 80}
!35 = !{!36, !8, i64 0}
!36 = !{!"ieee80211_tx_info", !8, i64 0, !37, i64 8}
!37 = !{!"TYPE_4__", !38, i64 0}
!38 = !{!"any pointer", !9, i64 0}
!39 = !{!29, !17, i64 72}
!40 = !{!29, !17, i64 64}
!41 = !{!29, !17, i64 56}
!42 = !{!29, !8, i64 48}
!43 = !{!29, !8, i64 52}
!44 = !{!29, !17, i64 24}
!45 = !{!20, !8, i64 12}
!46 = !{!29, !8, i64 16}
!47 = !{!36, !38, i64 8}
!48 = !{!49, !8, i64 0}
!49 = !{!"ieee80211_key_conf", !8, i64 0}
!50 = !{!29, !17, i64 8}
|
linux_drivers_net_wireless_realtek_rtlwifi_rtl8192se_extr_trx.c_rtl92se_tx_fill_desc
|
; ModuleID = 'AnghaBench/numpy/numpy/linalg/lapack_lite/extr_f2c_s_lapack.c_spotrf_.c'
source_filename = "AnghaBench/numpy/numpy/linalg/lapack_lite/extr_f2c_s_lapack.c_spotrf_.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@spotrf_.j = internal unnamed_addr global i32 0, align 4
@spotrf_.jb = internal global i32 0, align 4
@spotrf_.nb = internal unnamed_addr global i32 0, align 4
@spotrf_.upper = internal unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [2 x i8] c"U\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"L\00", align 1
@.str.2 = private unnamed_addr constant [7 x i8] c"SPOTRF\00", align 1
@c__1 = dso_local global i32 0, align 4
@c_n1 = dso_local global i32 0, align 4
@.str.3 = private unnamed_addr constant [6 x i8] c"Upper\00", align 1
@.str.4 = private unnamed_addr constant [10 x i8] c"Transpose\00", align 1
@c_b151 = dso_local global i32 0, align 4
@c_b15 = dso_local global i32 0, align 4
@.str.5 = private unnamed_addr constant [13 x i8] c"No transpose\00", align 1
@.str.6 = private unnamed_addr constant [5 x i8] c"Left\00", align 1
@.str.7 = private unnamed_addr constant [9 x i8] c"Non-unit\00", align 1
@.str.8 = private unnamed_addr constant [6 x i8] c"Lower\00", align 1
@.str.9 = private unnamed_addr constant [6 x i8] c"Right\00", align 1
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @spotrf_(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) local_unnamed_addr #0 {
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
%9 = load i32, ptr %3, align 4, !tbaa !5
%10 = xor i32 %9, -1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, ptr %2, i64 %11
store i32 0, ptr %4, align 4, !tbaa !5
%13 = tail call i64 @lsame_(ptr noundef %0, ptr noundef nonnull @.str) #3
store i64 %13, ptr @spotrf_.upper, align 8, !tbaa !9
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %5
%16 = tail call i64 @lsame_(ptr noundef %0, ptr noundef nonnull @.str.1) #3
%17 = icmp eq i64 %16, 0
br i1 %17, label %28, label %18
18: ; preds = %15, %5
%19 = load i32, ptr %1, align 4, !tbaa !5
%20 = icmp slt i32 %19, 0
br i1 %20, label %28, label %21
21: ; preds = %18
%22 = load i32, ptr %3, align 4, !tbaa !5
%23 = tail call i32 @max(i32 noundef 1, i32 noundef %19) #3
%24 = icmp slt i32 %22, %23
br i1 %24, label %28, label %25
25: ; preds = %21
%26 = load i32, ptr %4, align 4, !tbaa !5
%27 = icmp eq i32 %26, 0
br i1 %27, label %34, label %30
28: ; preds = %21, %18, %15
%29 = phi i32 [ -1, %15 ], [ -2, %18 ], [ -4, %21 ]
store i32 %29, ptr %4, align 4, !tbaa !5
br label %30
30: ; preds = %28, %25
%31 = phi i32 [ %26, %25 ], [ %29, %28 ]
%32 = sub nsw i32 0, %31
store i32 %32, ptr %6, align 4, !tbaa !5
%33 = call i32 @xerbla_(ptr noundef nonnull @.str.2, ptr noundef nonnull %6) #3
br label %183
34: ; preds = %25
%35 = load i32, ptr %1, align 4, !tbaa !5
%36 = icmp eq i32 %35, 0
br i1 %36, label %183, label %37
37: ; preds = %34
%38 = tail call i32 @ilaenv_(ptr noundef nonnull @c__1, ptr noundef nonnull @.str.2, ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull @c_n1, ptr noundef nonnull @c_n1, ptr noundef nonnull @c_n1, i32 noundef 6, i32 noundef 1) #3
store i32 %38, ptr @spotrf_.nb, align 4, !tbaa !5
%39 = icmp slt i32 %38, 2
br i1 %39, label %43, label %40
40: ; preds = %37
%41 = load i32, ptr %1, align 4, !tbaa !5
%42 = icmp slt i32 %38, %41
br i1 %42, label %45, label %43
43: ; preds = %40, %37
%44 = tail call i32 @spotf2_(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3
br label %183
45: ; preds = %40
%46 = load i64, ptr @spotrf_.upper, align 8, !tbaa !9
%47 = icmp eq i64 %46, 0
br i1 %47, label %113, label %48
48: ; preds = %45
%49 = getelementptr i32, ptr %12, i64 1
store i32 1, ptr @spotrf_.j, align 4, !tbaa !5
%50 = add i32 %9, 1
br label %51
51: ; preds = %48, %109
%52 = phi i32 [ 1, %48 ], [ %111, %109 ]
%53 = load i32, ptr @spotrf_.nb, align 4, !tbaa !5
store i32 %53, ptr %7, align 4, !tbaa !5
%54 = load i32, ptr %1, align 4, !tbaa !5
%55 = sub nsw i32 %54, %52
%56 = add nsw i32 %55, 1
store i32 %56, ptr %8, align 4, !tbaa !5
%57 = call i32 @min(i32 noundef %53, i32 noundef %56) #3
store i32 %57, ptr @spotrf_.jb, align 4, !tbaa !5
%58 = load i32, ptr @spotrf_.j, align 4, !tbaa !5
%59 = add nsw i32 %58, -1
store i32 %59, ptr %7, align 4, !tbaa !5
%60 = mul nsw i32 %58, %9
%61 = sext i32 %60 to i64
%62 = getelementptr i32, ptr %49, i64 %61
%63 = add nsw i32 %60, %58
%64 = sext i32 %63 to i64
%65 = getelementptr inbounds i32, ptr %12, i64 %64
%66 = call i32 @ssyrk_(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.4, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull %7, ptr noundef nonnull @c_b151, ptr noundef %62, ptr noundef nonnull %3, ptr noundef nonnull @c_b15, ptr noundef %65, ptr noundef nonnull %3) #3
%67 = load i32, ptr @spotrf_.j, align 4, !tbaa !5
%68 = mul i32 %67, %50
%69 = sext i32 %68 to i64
%70 = getelementptr inbounds i32, ptr %12, i64 %69
%71 = call i32 @spotf2_(ptr noundef nonnull @.str.3, ptr noundef nonnull @spotrf_.jb, ptr noundef %70, ptr noundef nonnull %3, ptr noundef nonnull %4) #3
%72 = load i32, ptr %4, align 4, !tbaa !5
%73 = icmp eq i32 %72, 0
br i1 %73, label %74, label %178
74: ; preds = %51
%75 = load i32, ptr @spotrf_.j, align 4, !tbaa !5
%76 = load i32, ptr @spotrf_.jb, align 4, !tbaa !5
%77 = add nsw i32 %76, %75
%78 = load i32, ptr %1, align 4, !tbaa !5
%79 = icmp sgt i32 %77, %78
br i1 %79, label %109, label %80
80: ; preds = %74
%81 = sub i32 %78, %77
%82 = add i32 %81, 1
store i32 %82, ptr %7, align 4, !tbaa !5
%83 = add nsw i32 %75, -1
store i32 %83, ptr %8, align 4, !tbaa !5
%84 = mul nsw i32 %75, %9
%85 = sext i32 %84 to i64
%86 = getelementptr i32, ptr %49, i64 %85
%87 = mul nsw i32 %77, %9
%88 = sext i32 %87 to i64
%89 = getelementptr i32, ptr %49, i64 %88
%90 = add nsw i32 %87, %75
%91 = sext i32 %90 to i64
%92 = getelementptr inbounds i32, ptr %12, i64 %91
%93 = call i32 @sgemm_(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.5, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull %7, ptr noundef nonnull %8, ptr noundef nonnull @c_b151, ptr noundef %86, ptr noundef nonnull %3, ptr noundef %89, ptr noundef nonnull %3, ptr noundef nonnull @c_b15, ptr noundef %92, ptr noundef nonnull %3) #3
%94 = load i32, ptr %1, align 4, !tbaa !5
%95 = load i32, ptr @spotrf_.j, align 4, !tbaa !5
%96 = load i32, ptr @spotrf_.jb, align 4, !tbaa !5
%97 = add i32 %96, %95
%98 = add i32 %94, 1
%99 = sub i32 %98, %97
store i32 %99, ptr %7, align 4, !tbaa !5
%100 = mul i32 %95, %50
%101 = sext i32 %100 to i64
%102 = getelementptr inbounds i32, ptr %12, i64 %101
%103 = mul nsw i32 %97, %9
%104 = add nsw i32 %103, %95
%105 = sext i32 %104 to i64
%106 = getelementptr inbounds i32, ptr %12, i64 %105
%107 = call i32 @strsm_(ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.7, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull %7, ptr noundef nonnull @c_b15, ptr noundef %102, ptr noundef nonnull %3, ptr noundef %106, ptr noundef nonnull %3) #3
%108 = load i32, ptr @spotrf_.j, align 4, !tbaa !5
br label %109
109: ; preds = %74, %80
%110 = phi i32 [ %75, %74 ], [ %108, %80 ]
%111 = add nsw i32 %110, %38
store i32 %111, ptr @spotrf_.j, align 4, !tbaa !5
%112 = icmp sgt i32 %111, %41
br i1 %112, label %183, label %51, !llvm.loop !11
113: ; preds = %45
store i32 1, ptr @spotrf_.j, align 4, !tbaa !5
%114 = add i32 %9, 1
br label %115
115: ; preds = %113, %174
%116 = phi i32 [ 1, %113 ], [ %176, %174 ]
%117 = load i32, ptr @spotrf_.nb, align 4, !tbaa !5
store i32 %117, ptr %7, align 4, !tbaa !5
%118 = load i32, ptr %1, align 4, !tbaa !5
%119 = sub nsw i32 %118, %116
%120 = add nsw i32 %119, 1
store i32 %120, ptr %8, align 4, !tbaa !5
%121 = call i32 @min(i32 noundef %117, i32 noundef %120) #3
store i32 %121, ptr @spotrf_.jb, align 4, !tbaa !5
%122 = load i32, ptr @spotrf_.j, align 4, !tbaa !5
%123 = add nsw i32 %122, -1
store i32 %123, ptr %7, align 4, !tbaa !5
%124 = add nsw i32 %122, %9
%125 = sext i32 %124 to i64
%126 = getelementptr inbounds i32, ptr %12, i64 %125
%127 = mul i32 %122, %114
%128 = sext i32 %127 to i64
%129 = getelementptr inbounds i32, ptr %12, i64 %128
%130 = call i32 @ssyrk_(ptr noundef nonnull @.str.8, ptr noundef nonnull @.str.5, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull %7, ptr noundef nonnull @c_b151, ptr noundef %126, ptr noundef nonnull %3, ptr noundef nonnull @c_b15, ptr noundef %129, ptr noundef nonnull %3) #3
%131 = load i32, ptr @spotrf_.j, align 4, !tbaa !5
%132 = mul i32 %131, %114
%133 = sext i32 %132 to i64
%134 = getelementptr inbounds i32, ptr %12, i64 %133
%135 = call i32 @spotf2_(ptr noundef nonnull @.str.8, ptr noundef nonnull @spotrf_.jb, ptr noundef %134, ptr noundef nonnull %3, ptr noundef nonnull %4) #3
%136 = load i32, ptr %4, align 4, !tbaa !5
%137 = icmp eq i32 %136, 0
br i1 %137, label %138, label %178
138: ; preds = %115
%139 = load i32, ptr @spotrf_.j, align 4, !tbaa !5
%140 = load i32, ptr @spotrf_.jb, align 4, !tbaa !5
%141 = add nsw i32 %140, %139
%142 = load i32, ptr %1, align 4, !tbaa !5
%143 = icmp sgt i32 %141, %142
br i1 %143, label %174, label %144
144: ; preds = %138
%145 = sub i32 %142, %141
%146 = add i32 %145, 1
store i32 %146, ptr %7, align 4, !tbaa !5
%147 = add nsw i32 %139, -1
store i32 %147, ptr %8, align 4, !tbaa !5
%148 = add nsw i32 %141, %9
%149 = sext i32 %148 to i64
%150 = getelementptr inbounds i32, ptr %12, i64 %149
%151 = add nsw i32 %139, %9
%152 = sext i32 %151 to i64
%153 = getelementptr inbounds i32, ptr %12, i64 %152
%154 = mul nsw i32 %139, %9
%155 = add nsw i32 %141, %154
%156 = sext i32 %155 to i64
%157 = getelementptr inbounds i32, ptr %12, i64 %156
%158 = call i32 @sgemm_(ptr noundef nonnull @.str.5, ptr noundef nonnull @.str.4, ptr noundef nonnull %7, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull %8, ptr noundef nonnull @c_b151, ptr noundef %150, ptr noundef nonnull %3, ptr noundef %153, ptr noundef nonnull %3, ptr noundef nonnull @c_b15, ptr noundef %157, ptr noundef nonnull %3) #3
%159 = load i32, ptr %1, align 4, !tbaa !5
%160 = load i32, ptr @spotrf_.j, align 4, !tbaa !5
%161 = load i32, ptr @spotrf_.jb, align 4, !tbaa !5
%162 = add i32 %161, %160
%163 = add i32 %159, 1
%164 = sub i32 %163, %162
store i32 %164, ptr %7, align 4, !tbaa !5
%165 = mul nsw i32 %160, %9
%166 = add nsw i32 %165, %160
%167 = sext i32 %166 to i64
%168 = getelementptr inbounds i32, ptr %12, i64 %167
%169 = add nsw i32 %162, %165
%170 = sext i32 %169 to i64
%171 = getelementptr inbounds i32, ptr %12, i64 %170
%172 = call i32 @strsm_(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.8, ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.7, ptr noundef nonnull %7, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull @c_b15, ptr noundef %168, ptr noundef nonnull %3, ptr noundef %171, ptr noundef nonnull %3) #3
%173 = load i32, ptr @spotrf_.j, align 4, !tbaa !5
br label %174
174: ; preds = %138, %144
%175 = phi i32 [ %139, %138 ], [ %173, %144 ]
%176 = add nsw i32 %175, %38
store i32 %176, ptr @spotrf_.j, align 4, !tbaa !5
%177 = icmp sgt i32 %176, %41
br i1 %177, label %183, label %115, !llvm.loop !13
178: ; preds = %51, %115
%179 = phi i32 [ %136, %115 ], [ %72, %51 ]
%180 = load i32, ptr @spotrf_.j, align 4, !tbaa !5
%181 = add i32 %179, -1
%182 = add i32 %181, %180
store i32 %182, ptr %4, align 4, !tbaa !5
br label %183
183: ; preds = %109, %174, %178, %43, %34, %30
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @lsame_(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @max(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @xerbla_(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ilaenv_(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @spotf2_(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @min(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ssyrk_(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sgemm_(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strsm_(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
|
; ModuleID = 'AnghaBench/numpy/numpy/linalg/lapack_lite/extr_f2c_s_lapack.c_spotrf_.c'
source_filename = "AnghaBench/numpy/numpy/linalg/lapack_lite/extr_f2c_s_lapack.c_spotrf_.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@spotrf_.j = internal unnamed_addr global i32 0, align 4
@spotrf_.jb = internal global i32 0, align 4
@spotrf_.nb = internal unnamed_addr global i32 0, align 4
@spotrf_.upper = internal unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [2 x i8] c"U\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"L\00", align 1
@.str.2 = private unnamed_addr constant [7 x i8] c"SPOTRF\00", align 1
@c__1 = common global i32 0, align 4
@c_n1 = common global i32 0, align 4
@.str.3 = private unnamed_addr constant [6 x i8] c"Upper\00", align 1
@.str.4 = private unnamed_addr constant [10 x i8] c"Transpose\00", align 1
@c_b151 = common global i32 0, align 4
@c_b15 = common global i32 0, align 4
@.str.5 = private unnamed_addr constant [13 x i8] c"No transpose\00", align 1
@.str.6 = private unnamed_addr constant [5 x i8] c"Left\00", align 1
@.str.7 = private unnamed_addr constant [9 x i8] c"Non-unit\00", align 1
@.str.8 = private unnamed_addr constant [6 x i8] c"Lower\00", align 1
@.str.9 = private unnamed_addr constant [6 x i8] c"Right\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @spotrf_(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) local_unnamed_addr #0 {
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
%9 = load i32, ptr %3, align 4, !tbaa !6
%10 = xor i32 %9, -1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, ptr %2, i64 %11
store i32 0, ptr %4, align 4, !tbaa !6
%13 = tail call i64 @lsame_(ptr noundef %0, ptr noundef nonnull @.str) #3
store i64 %13, ptr @spotrf_.upper, align 8, !tbaa !10
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %5
%16 = tail call i64 @lsame_(ptr noundef %0, ptr noundef nonnull @.str.1) #3
%17 = icmp eq i64 %16, 0
br i1 %17, label %28, label %18
18: ; preds = %15, %5
%19 = load i32, ptr %1, align 4, !tbaa !6
%20 = icmp slt i32 %19, 0
br i1 %20, label %28, label %21
21: ; preds = %18
%22 = load i32, ptr %3, align 4, !tbaa !6
%23 = tail call i32 @max(i32 noundef 1, i32 noundef %19) #3
%24 = icmp slt i32 %22, %23
br i1 %24, label %28, label %25
25: ; preds = %21
%26 = load i32, ptr %4, align 4, !tbaa !6
%27 = icmp eq i32 %26, 0
br i1 %27, label %34, label %30
28: ; preds = %21, %18, %15
%29 = phi i32 [ -1, %15 ], [ -2, %18 ], [ -4, %21 ]
store i32 %29, ptr %4, align 4, !tbaa !6
br label %30
30: ; preds = %28, %25
%31 = phi i32 [ %26, %25 ], [ %29, %28 ]
%32 = sub nsw i32 0, %31
store i32 %32, ptr %6, align 4, !tbaa !6
%33 = call i32 @xerbla_(ptr noundef nonnull @.str.2, ptr noundef nonnull %6) #3
br label %183
34: ; preds = %25
%35 = load i32, ptr %1, align 4, !tbaa !6
%36 = icmp eq i32 %35, 0
br i1 %36, label %183, label %37
37: ; preds = %34
%38 = tail call i32 @ilaenv_(ptr noundef nonnull @c__1, ptr noundef nonnull @.str.2, ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull @c_n1, ptr noundef nonnull @c_n1, ptr noundef nonnull @c_n1, i32 noundef 6, i32 noundef 1) #3
store i32 %38, ptr @spotrf_.nb, align 4, !tbaa !6
%39 = icmp slt i32 %38, 2
br i1 %39, label %43, label %40
40: ; preds = %37
%41 = load i32, ptr %1, align 4, !tbaa !6
%42 = icmp slt i32 %38, %41
br i1 %42, label %45, label %43
43: ; preds = %40, %37
%44 = tail call i32 @spotf2_(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3
br label %183
45: ; preds = %40
%46 = load i64, ptr @spotrf_.upper, align 8, !tbaa !10
%47 = icmp eq i64 %46, 0
br i1 %47, label %113, label %48
48: ; preds = %45
%49 = getelementptr i8, ptr %12, i64 4
store i32 1, ptr @spotrf_.j, align 4, !tbaa !6
%50 = add i32 %9, 1
br label %51
51: ; preds = %48, %109
%52 = phi i32 [ 1, %48 ], [ %111, %109 ]
%53 = load i32, ptr @spotrf_.nb, align 4, !tbaa !6
store i32 %53, ptr %7, align 4, !tbaa !6
%54 = load i32, ptr %1, align 4, !tbaa !6
%55 = sub nsw i32 %54, %52
%56 = add nsw i32 %55, 1
store i32 %56, ptr %8, align 4, !tbaa !6
%57 = call i32 @min(i32 noundef %53, i32 noundef %56) #3
store i32 %57, ptr @spotrf_.jb, align 4, !tbaa !6
%58 = load i32, ptr @spotrf_.j, align 4, !tbaa !6
%59 = add nsw i32 %58, -1
store i32 %59, ptr %7, align 4, !tbaa !6
%60 = mul nsw i32 %58, %9
%61 = sext i32 %60 to i64
%62 = getelementptr i32, ptr %49, i64 %61
%63 = add nsw i32 %60, %58
%64 = sext i32 %63 to i64
%65 = getelementptr inbounds i32, ptr %12, i64 %64
%66 = call i32 @ssyrk_(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.4, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull %7, ptr noundef nonnull @c_b151, ptr noundef %62, ptr noundef nonnull %3, ptr noundef nonnull @c_b15, ptr noundef %65, ptr noundef nonnull %3) #3
%67 = load i32, ptr @spotrf_.j, align 4, !tbaa !6
%68 = mul i32 %67, %50
%69 = sext i32 %68 to i64
%70 = getelementptr inbounds i32, ptr %12, i64 %69
%71 = call i32 @spotf2_(ptr noundef nonnull @.str.3, ptr noundef nonnull @spotrf_.jb, ptr noundef %70, ptr noundef nonnull %3, ptr noundef nonnull %4) #3
%72 = load i32, ptr %4, align 4, !tbaa !6
%73 = icmp eq i32 %72, 0
br i1 %73, label %74, label %178
74: ; preds = %51
%75 = load i32, ptr @spotrf_.j, align 4, !tbaa !6
%76 = load i32, ptr @spotrf_.jb, align 4, !tbaa !6
%77 = add nsw i32 %76, %75
%78 = load i32, ptr %1, align 4, !tbaa !6
%79 = icmp sgt i32 %77, %78
br i1 %79, label %109, label %80
80: ; preds = %74
%81 = sub i32 %78, %77
%82 = add i32 %81, 1
store i32 %82, ptr %7, align 4, !tbaa !6
%83 = add nsw i32 %75, -1
store i32 %83, ptr %8, align 4, !tbaa !6
%84 = mul nsw i32 %75, %9
%85 = sext i32 %84 to i64
%86 = getelementptr i32, ptr %49, i64 %85
%87 = mul nsw i32 %77, %9
%88 = sext i32 %87 to i64
%89 = getelementptr i32, ptr %49, i64 %88
%90 = add nsw i32 %87, %75
%91 = sext i32 %90 to i64
%92 = getelementptr inbounds i32, ptr %12, i64 %91
%93 = call i32 @sgemm_(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.5, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull %7, ptr noundef nonnull %8, ptr noundef nonnull @c_b151, ptr noundef %86, ptr noundef nonnull %3, ptr noundef %89, ptr noundef nonnull %3, ptr noundef nonnull @c_b15, ptr noundef %92, ptr noundef nonnull %3) #3
%94 = load i32, ptr %1, align 4, !tbaa !6
%95 = load i32, ptr @spotrf_.j, align 4, !tbaa !6
%96 = load i32, ptr @spotrf_.jb, align 4, !tbaa !6
%97 = add i32 %96, %95
%98 = add i32 %94, 1
%99 = sub i32 %98, %97
store i32 %99, ptr %7, align 4, !tbaa !6
%100 = mul i32 %95, %50
%101 = sext i32 %100 to i64
%102 = getelementptr inbounds i32, ptr %12, i64 %101
%103 = mul nsw i32 %97, %9
%104 = add nsw i32 %103, %95
%105 = sext i32 %104 to i64
%106 = getelementptr inbounds i32, ptr %12, i64 %105
%107 = call i32 @strsm_(ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.7, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull %7, ptr noundef nonnull @c_b15, ptr noundef %102, ptr noundef nonnull %3, ptr noundef %106, ptr noundef nonnull %3) #3
%108 = load i32, ptr @spotrf_.j, align 4, !tbaa !6
br label %109
109: ; preds = %74, %80
%110 = phi i32 [ %75, %74 ], [ %108, %80 ]
%111 = add nsw i32 %110, %38
store i32 %111, ptr @spotrf_.j, align 4, !tbaa !6
%112 = icmp sgt i32 %111, %41
br i1 %112, label %183, label %51, !llvm.loop !12
113: ; preds = %45
store i32 1, ptr @spotrf_.j, align 4, !tbaa !6
%114 = add i32 %9, 1
br label %115
115: ; preds = %113, %174
%116 = phi i32 [ 1, %113 ], [ %176, %174 ]
%117 = load i32, ptr @spotrf_.nb, align 4, !tbaa !6
store i32 %117, ptr %7, align 4, !tbaa !6
%118 = load i32, ptr %1, align 4, !tbaa !6
%119 = sub nsw i32 %118, %116
%120 = add nsw i32 %119, 1
store i32 %120, ptr %8, align 4, !tbaa !6
%121 = call i32 @min(i32 noundef %117, i32 noundef %120) #3
store i32 %121, ptr @spotrf_.jb, align 4, !tbaa !6
%122 = load i32, ptr @spotrf_.j, align 4, !tbaa !6
%123 = add nsw i32 %122, -1
store i32 %123, ptr %7, align 4, !tbaa !6
%124 = add nsw i32 %122, %9
%125 = sext i32 %124 to i64
%126 = getelementptr inbounds i32, ptr %12, i64 %125
%127 = mul i32 %122, %114
%128 = sext i32 %127 to i64
%129 = getelementptr inbounds i32, ptr %12, i64 %128
%130 = call i32 @ssyrk_(ptr noundef nonnull @.str.8, ptr noundef nonnull @.str.5, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull %7, ptr noundef nonnull @c_b151, ptr noundef %126, ptr noundef nonnull %3, ptr noundef nonnull @c_b15, ptr noundef %129, ptr noundef nonnull %3) #3
%131 = load i32, ptr @spotrf_.j, align 4, !tbaa !6
%132 = mul i32 %131, %114
%133 = sext i32 %132 to i64
%134 = getelementptr inbounds i32, ptr %12, i64 %133
%135 = call i32 @spotf2_(ptr noundef nonnull @.str.8, ptr noundef nonnull @spotrf_.jb, ptr noundef %134, ptr noundef nonnull %3, ptr noundef nonnull %4) #3
%136 = load i32, ptr %4, align 4, !tbaa !6
%137 = icmp eq i32 %136, 0
br i1 %137, label %138, label %178
138: ; preds = %115
%139 = load i32, ptr @spotrf_.j, align 4, !tbaa !6
%140 = load i32, ptr @spotrf_.jb, align 4, !tbaa !6
%141 = add nsw i32 %140, %139
%142 = load i32, ptr %1, align 4, !tbaa !6
%143 = icmp sgt i32 %141, %142
br i1 %143, label %174, label %144
144: ; preds = %138
%145 = sub i32 %142, %141
%146 = add i32 %145, 1
store i32 %146, ptr %7, align 4, !tbaa !6
%147 = add nsw i32 %139, -1
store i32 %147, ptr %8, align 4, !tbaa !6
%148 = add nsw i32 %141, %9
%149 = sext i32 %148 to i64
%150 = getelementptr inbounds i32, ptr %12, i64 %149
%151 = add nsw i32 %139, %9
%152 = sext i32 %151 to i64
%153 = getelementptr inbounds i32, ptr %12, i64 %152
%154 = mul nsw i32 %139, %9
%155 = add nsw i32 %141, %154
%156 = sext i32 %155 to i64
%157 = getelementptr inbounds i32, ptr %12, i64 %156
%158 = call i32 @sgemm_(ptr noundef nonnull @.str.5, ptr noundef nonnull @.str.4, ptr noundef nonnull %7, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull %8, ptr noundef nonnull @c_b151, ptr noundef %150, ptr noundef nonnull %3, ptr noundef %153, ptr noundef nonnull %3, ptr noundef nonnull @c_b15, ptr noundef %157, ptr noundef nonnull %3) #3
%159 = load i32, ptr %1, align 4, !tbaa !6
%160 = load i32, ptr @spotrf_.j, align 4, !tbaa !6
%161 = load i32, ptr @spotrf_.jb, align 4, !tbaa !6
%162 = add i32 %161, %160
%163 = add i32 %159, 1
%164 = sub i32 %163, %162
store i32 %164, ptr %7, align 4, !tbaa !6
%165 = mul nsw i32 %160, %9
%166 = add nsw i32 %165, %160
%167 = sext i32 %166 to i64
%168 = getelementptr inbounds i32, ptr %12, i64 %167
%169 = add nsw i32 %162, %165
%170 = sext i32 %169 to i64
%171 = getelementptr inbounds i32, ptr %12, i64 %170
%172 = call i32 @strsm_(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.8, ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.7, ptr noundef nonnull %7, ptr noundef nonnull @spotrf_.jb, ptr noundef nonnull @c_b15, ptr noundef %168, ptr noundef nonnull %3, ptr noundef %171, ptr noundef nonnull %3) #3
%173 = load i32, ptr @spotrf_.j, align 4, !tbaa !6
br label %174
174: ; preds = %138, %144
%175 = phi i32 [ %139, %138 ], [ %173, %144 ]
%176 = add nsw i32 %175, %38
store i32 %176, ptr @spotrf_.j, align 4, !tbaa !6
%177 = icmp sgt i32 %176, %41
br i1 %177, label %183, label %115, !llvm.loop !14
178: ; preds = %51, %115
%179 = phi i32 [ %136, %115 ], [ %72, %51 ]
%180 = load i32, ptr @spotrf_.j, align 4, !tbaa !6
%181 = add i32 %179, -1
%182 = add i32 %181, %180
store i32 %182, ptr %4, align 4, !tbaa !6
br label %183
183: ; preds = %109, %174, %178, %43, %34, %30
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @lsame_(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @max(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @xerbla_(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ilaenv_(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @spotf2_(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @min(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ssyrk_(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sgemm_(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strsm_(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
|
numpy_numpy_linalg_lapack_lite_extr_f2c_s_lapack.c_spotrf_
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_pci-sysfs.c_is_enabled_store.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_pci-sysfs.c_is_enabled_store.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CAP_SYS_ADMIN = dso_local local_unnamed_addr global i32 0, align 4
@EPERM = dso_local local_unnamed_addr global i64 0, align 8
@EIO = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @is_enabled_store], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @is_enabled_store(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = alloca i64, align 8
%6 = tail call ptr @to_pci_dev(ptr noundef %0) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%7 = call i64 @strict_strtoul(ptr noundef %2, i32 noundef 0, ptr noundef nonnull %5) #3
%8 = load i32, ptr @CAP_SYS_ADMIN, align 4, !tbaa !5
%9 = call i32 @capable(i32 noundef %8) #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i64, ptr @EPERM, align 8, !tbaa !9
%13 = sub i64 0, %12
br label %24
14: ; preds = %4
%15 = load i64, ptr %5, align 8, !tbaa !9
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %22
17: ; preds = %14
%18 = call i64 @pci_is_enabled(ptr noundef %6) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %17
%21 = call i32 @pci_disable_device(ptr noundef %6) #3
br label %24
22: ; preds = %14
%23 = call i64 @pci_enable_device(ptr noundef %6) #3
br label %24
24: ; preds = %22, %20, %17, %11
%25 = phi i64 [ %13, %11 ], [ %3, %17 ], [ %3, %20 ], [ %3, %22 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret i64 %25
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_pci_dev(ptr noundef) local_unnamed_addr #2
declare i64 @strict_strtoul(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @capable(i32 noundef) local_unnamed_addr #2
declare i64 @pci_is_enabled(ptr noundef) local_unnamed_addr #2
declare i32 @pci_disable_device(ptr noundef) local_unnamed_addr #2
declare i64 @pci_enable_device(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_pci-sysfs.c_is_enabled_store.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_pci-sysfs.c_is_enabled_store.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CAP_SYS_ADMIN = common local_unnamed_addr global i32 0, align 4
@EPERM = common local_unnamed_addr global i64 0, align 8
@EIO = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @is_enabled_store], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @is_enabled_store(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = alloca i64, align 8
%6 = tail call ptr @to_pci_dev(ptr noundef %0) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%7 = call i64 @strict_strtoul(ptr noundef %2, i32 noundef 0, ptr noundef nonnull %5) #3
%8 = load i32, ptr @CAP_SYS_ADMIN, align 4, !tbaa !6
%9 = call i32 @capable(i32 noundef %8) #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i64, ptr @EPERM, align 8, !tbaa !10
%13 = sub i64 0, %12
br label %24
14: ; preds = %4
%15 = load i64, ptr %5, align 8, !tbaa !10
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %22
17: ; preds = %14
%18 = call i64 @pci_is_enabled(ptr noundef %6) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %17
%21 = call i32 @pci_disable_device(ptr noundef %6) #3
br label %24
22: ; preds = %14
%23 = call i64 @pci_enable_device(ptr noundef %6) #3
br label %24
24: ; preds = %22, %20, %17, %11
%25 = phi i64 [ %13, %11 ], [ %3, %17 ], [ %3, %20 ], [ %3, %22 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret i64 %25
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_pci_dev(ptr noundef) local_unnamed_addr #2
declare i64 @strict_strtoul(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @capable(i32 noundef) local_unnamed_addr #2
declare i64 @pci_is_enabled(ptr noundef) local_unnamed_addr #2
declare i32 @pci_disable_device(ptr noundef) local_unnamed_addr #2
declare i64 @pci_enable_device(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
|
fastsocket_kernel_drivers_pci_extr_pci-sysfs.c_is_enabled_store
|
; ModuleID = 'AnghaBench/linux/net/batman-adv/extr_bridge_loop_avoidance.h_batadv_bla_backbone_table_seq_print_text.c'
source_filename = "AnghaBench/linux/net/batman-adv/extr_bridge_loop_avoidance.h_batadv_bla_backbone_table_seq_print_text.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @batadv_bla_backbone_table_seq_print_text], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @batadv_bla_backbone_table_seq_print_text(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/net/batman-adv/extr_bridge_loop_avoidance.h_batadv_bla_backbone_table_seq_print_text.c'
source_filename = "AnghaBench/linux/net/batman-adv/extr_bridge_loop_avoidance.h_batadv_bla_backbone_table_seq_print_text.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @batadv_bla_backbone_table_seq_print_text], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @batadv_bla_backbone_table_seq_print_text(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_net_batman-adv_extr_bridge_loop_avoidance.h_batadv_bla_backbone_table_seq_print_text
|
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_npcm750-pwm-fan.c_npcm7xx_read_pwm.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_npcm750-pwm-fan.c_npcm7xx_read_pwm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE = dso_local local_unnamed_addr global i32 0, align 4
@EOPNOTSUPP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @npcm7xx_read_pwm], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @npcm7xx_read_pwm(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr nocapture noundef writeonly %3) #0 {
%5 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%6 = icmp eq i32 %1, 128
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, ptr @NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE, align 4, !tbaa !5
%9 = sdiv i32 %2, %8
%10 = srem i32 %2, %8
%11 = load i32, ptr %5, align 4, !tbaa !9
%12 = tail call i32 @NPCM7XX_PWM_REG_CMRx(i32 noundef %11, i32 noundef %9, i32 noundef %10) #2
%13 = tail call i64 @ioread32(i32 noundef %12) #2
store i64 %13, ptr %3, align 8, !tbaa !11
br label %17
14: ; preds = %4
%15 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !5
%16 = sub nsw i32 0, %15
br label %17
17: ; preds = %14, %7
%18 = phi i32 [ 0, %7 ], [ %16, %14 ]
ret i32 %18
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i64 @ioread32(i32 noundef) local_unnamed_addr #1
declare i32 @NPCM7XX_PWM_REG_CMRx(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"npcm7xx_pwm_fan_data", !6, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_npcm750-pwm-fan.c_npcm7xx_read_pwm.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_npcm750-pwm-fan.c_npcm7xx_read_pwm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE = common local_unnamed_addr global i32 0, align 4
@EOPNOTSUPP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @npcm7xx_read_pwm], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @npcm7xx_read_pwm(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr nocapture noundef writeonly %3) #0 {
%5 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%6 = icmp eq i32 %1, 128
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, ptr @NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE, align 4, !tbaa !6
%9 = freeze i32 %8
%10 = sdiv i32 %2, %9
%11 = mul i32 %10, %9
%12 = sub i32 %2, %11
%13 = load i32, ptr %5, align 4, !tbaa !10
%14 = tail call i32 @NPCM7XX_PWM_REG_CMRx(i32 noundef %13, i32 noundef %10, i32 noundef %12) #2
%15 = tail call i64 @ioread32(i32 noundef %14) #2
store i64 %15, ptr %3, align 8, !tbaa !12
br label %19
16: ; preds = %4
%17 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !6
%18 = sub nsw i32 0, %17
br label %19
19: ; preds = %16, %7
%20 = phi i32 [ 0, %7 ], [ %18, %16 ]
ret i32 %20
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i64 @ioread32(i32 noundef) local_unnamed_addr #1
declare i32 @NPCM7XX_PWM_REG_CMRx(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"npcm7xx_pwm_fan_data", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
|
linux_drivers_hwmon_extr_npcm750-pwm-fan.c_npcm7xx_read_pwm
|
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_deprecated.c_svn_client_merge.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_deprecated.c_svn_client_merge.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local ptr @svn_client_merge(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr noundef %9, ptr noundef %10) local_unnamed_addr #0 {
%12 = tail call ptr @svn_client_merge2(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr noundef null, ptr noundef %9, ptr noundef %10) #2
ret ptr %12
}
declare ptr @svn_client_merge2(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_deprecated.c_svn_client_merge.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_deprecated.c_svn_client_merge.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @svn_client_merge(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr noundef %9, ptr noundef %10) local_unnamed_addr #0 {
%12 = tail call ptr @svn_client_merge2(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr noundef null, ptr noundef %9, ptr noundef %10) #2
ret ptr %12
}
declare ptr @svn_client_merge2(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_contrib_subversion_subversion_libsvn_client_extr_deprecated.c_svn_client_merge
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/nwfpe/extr_fpa11_cpdt.c_EmulateCPDT.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/nwfpe/extr_fpa11_cpdt.c_EmulateCPDT.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @EmulateCPDT(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i64 @LDF_OP(i32 noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @PerformLDF(i32 noundef %0) #2
br label %21
6: ; preds = %1
%7 = tail call i64 @LFM_OP(i32 noundef %0) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %6
%10 = tail call i32 @PerformLFM(i32 noundef %0) #2
br label %21
11: ; preds = %6
%12 = tail call i64 @STF_OP(i32 noundef %0) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %11
%15 = tail call i32 @PerformSTF(i32 noundef %0) #2
br label %21
16: ; preds = %11
%17 = tail call i64 @SFM_OP(i32 noundef %0) #2
%18 = icmp eq i64 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %16
%20 = tail call i32 @PerformSFM(i32 noundef %0) #2
br label %21
21: ; preds = %16, %9, %19, %14, %4
%22 = phi i32 [ %5, %4 ], [ %10, %9 ], [ %15, %14 ], [ %20, %19 ], [ 0, %16 ]
ret i32 %22
}
declare i64 @LDF_OP(i32 noundef) local_unnamed_addr #1
declare i32 @PerformLDF(i32 noundef) local_unnamed_addr #1
declare i64 @LFM_OP(i32 noundef) local_unnamed_addr #1
declare i32 @PerformLFM(i32 noundef) local_unnamed_addr #1
declare i64 @STF_OP(i32 noundef) local_unnamed_addr #1
declare i32 @PerformSTF(i32 noundef) local_unnamed_addr #1
declare i64 @SFM_OP(i32 noundef) local_unnamed_addr #1
declare i32 @PerformSFM(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/nwfpe/extr_fpa11_cpdt.c_EmulateCPDT.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/nwfpe/extr_fpa11_cpdt.c_EmulateCPDT.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @EmulateCPDT(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i64 @LDF_OP(i32 noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @PerformLDF(i32 noundef %0) #2
br label %21
6: ; preds = %1
%7 = tail call i64 @LFM_OP(i32 noundef %0) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %6
%10 = tail call i32 @PerformLFM(i32 noundef %0) #2
br label %21
11: ; preds = %6
%12 = tail call i64 @STF_OP(i32 noundef %0) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %11
%15 = tail call i32 @PerformSTF(i32 noundef %0) #2
br label %21
16: ; preds = %11
%17 = tail call i64 @SFM_OP(i32 noundef %0) #2
%18 = icmp eq i64 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %16
%20 = tail call i32 @PerformSFM(i32 noundef %0) #2
br label %21
21: ; preds = %16, %9, %19, %14, %4
%22 = phi i32 [ %5, %4 ], [ %10, %9 ], [ %15, %14 ], [ %20, %19 ], [ 0, %16 ]
ret i32 %22
}
declare i64 @LDF_OP(i32 noundef) local_unnamed_addr #1
declare i32 @PerformLDF(i32 noundef) local_unnamed_addr #1
declare i64 @LFM_OP(i32 noundef) local_unnamed_addr #1
declare i32 @PerformLFM(i32 noundef) local_unnamed_addr #1
declare i64 @STF_OP(i32 noundef) local_unnamed_addr #1
declare i32 @PerformSTF(i32 noundef) local_unnamed_addr #1
declare i64 @SFM_OP(i32 noundef) local_unnamed_addr #1
declare i32 @PerformSFM(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_arch_arm_nwfpe_extr_fpa11_cpdt.c_EmulateCPDT
|
; ModuleID = 'AnghaBench/RetroArch/libretro-common/formats/png/extr_rpng_encode.c_rpng_save_image_bgr24_string.c'
source_filename = "AnghaBench/RetroArch/libretro-common/formats/png/extr_rpng_encode.c_rpng_save_image_bgr24_string.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DEFLATE_PADDING = dso_local local_unnamed_addr global i32 0, align 4
@PNG_ROUGH_HEADER = dso_local local_unnamed_addr global i32 0, align 4
@RETRO_VFS_FILE_ACCESS_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@RETRO_VFS_FILE_ACCESS_HINT_NONE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @rpng_save_image_bgr24_string(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr nocapture noundef %4) local_unnamed_addr #0 {
%6 = load i32, ptr @DEFLATE_PADDING, align 4, !tbaa !5
%7 = mul i32 %1, 3
%8 = mul i32 %7, %2
%9 = mul i32 %8, %6
%10 = load i32, ptr @PNG_ROUGH_HEADER, align 4, !tbaa !5
%11 = add nsw i32 %9, %10
%12 = shl i32 %11, 2
%13 = tail call i64 @malloc(i32 noundef %12) #2
%14 = inttoptr i64 %13 to ptr
%15 = icmp eq i64 %13, 0
br i1 %15, label %16, label %18
16: ; preds = %5
%17 = tail call i32 (...) @GOTO_END_ERROR() #2
br label %18
18: ; preds = %16, %5
%19 = load i32, ptr @RETRO_VFS_FILE_ACCESS_WRITE, align 4, !tbaa !5
%20 = load i32, ptr @RETRO_VFS_FILE_ACCESS_HINT_NONE, align 4, !tbaa !5
%21 = tail call ptr @intfstream_open_writable_memory(ptr noundef %14, i32 noundef %19, i32 noundef %20, i32 noundef %11) #2
%22 = tail call i32 @rpng_save_image_stream(ptr noundef %0, ptr noundef %21, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef 3) #2
%23 = tail call i32 @intfstream_get_ptr(ptr noundef %21) #2
store i32 %23, ptr %4, align 4, !tbaa !5
%24 = tail call i32 @intfstream_rewind(ptr noundef %21) #2
%25 = load i32, ptr %4, align 4, !tbaa !5
%26 = shl i32 %25, 2
%27 = tail call i64 @malloc(i32 noundef %26) #2
%28 = inttoptr i64 %27 to ptr
%29 = icmp eq i64 %27, 0
br i1 %29, label %30, label %32
30: ; preds = %18
%31 = tail call i32 (...) @GOTO_END_ERROR() #2
br label %32
32: ; preds = %30, %18
%33 = load i32, ptr %4, align 4, !tbaa !5
%34 = tail call i32 @intfstream_read(ptr noundef %21, ptr noundef %28, i32 noundef %33) #2
br i1 %15, label %37, label %35
35: ; preds = %32
%36 = tail call i32 @free(ptr noundef nonnull %14) #2
br label %37
37: ; preds = %35, %32
%38 = icmp eq ptr %21, null
br i1 %38, label %41, label %39
39: ; preds = %37
%40 = tail call i32 @free(ptr noundef nonnull %21) #2
br label %41
41: ; preds = %39, %37
%42 = icmp ne i32 %22, 0
%43 = or i1 %42, %29
%44 = select i1 %42, ptr %28, ptr null
br i1 %43, label %47, label %45
45: ; preds = %41
%46 = tail call i32 @free(ptr noundef nonnull %28) #2
br label %47
47: ; preds = %41, %45
%48 = phi ptr [ null, %45 ], [ %44, %41 ]
ret ptr %48
}
declare i64 @malloc(i32 noundef) local_unnamed_addr #1
declare i32 @GOTO_END_ERROR(...) local_unnamed_addr #1
declare ptr @intfstream_open_writable_memory(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rpng_save_image_stream(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @intfstream_get_ptr(ptr noundef) local_unnamed_addr #1
declare i32 @intfstream_rewind(ptr noundef) local_unnamed_addr #1
declare i32 @intfstream_read(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/RetroArch/libretro-common/formats/png/extr_rpng_encode.c_rpng_save_image_bgr24_string.c'
source_filename = "AnghaBench/RetroArch/libretro-common/formats/png/extr_rpng_encode.c_rpng_save_image_bgr24_string.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DEFLATE_PADDING = common local_unnamed_addr global i32 0, align 4
@PNG_ROUGH_HEADER = common local_unnamed_addr global i32 0, align 4
@RETRO_VFS_FILE_ACCESS_WRITE = common local_unnamed_addr global i32 0, align 4
@RETRO_VFS_FILE_ACCESS_HINT_NONE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @rpng_save_image_bgr24_string(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr nocapture noundef %4) local_unnamed_addr #0 {
%6 = load i32, ptr @DEFLATE_PADDING, align 4, !tbaa !6
%7 = mul i32 %1, 3
%8 = mul i32 %7, %2
%9 = mul i32 %8, %6
%10 = load i32, ptr @PNG_ROUGH_HEADER, align 4, !tbaa !6
%11 = add nsw i32 %9, %10
%12 = shl i32 %11, 2
%13 = tail call i64 @malloc(i32 noundef %12) #2
%14 = inttoptr i64 %13 to ptr
%15 = icmp eq i64 %13, 0
br i1 %15, label %16, label %18
16: ; preds = %5
%17 = tail call i32 @GOTO_END_ERROR() #2
br label %18
18: ; preds = %16, %5
%19 = load i32, ptr @RETRO_VFS_FILE_ACCESS_WRITE, align 4, !tbaa !6
%20 = load i32, ptr @RETRO_VFS_FILE_ACCESS_HINT_NONE, align 4, !tbaa !6
%21 = tail call ptr @intfstream_open_writable_memory(ptr noundef %14, i32 noundef %19, i32 noundef %20, i32 noundef %11) #2
%22 = tail call i32 @rpng_save_image_stream(ptr noundef %0, ptr noundef %21, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef 3) #2
%23 = tail call i32 @intfstream_get_ptr(ptr noundef %21) #2
store i32 %23, ptr %4, align 4, !tbaa !6
%24 = tail call i32 @intfstream_rewind(ptr noundef %21) #2
%25 = load i32, ptr %4, align 4, !tbaa !6
%26 = shl i32 %25, 2
%27 = tail call i64 @malloc(i32 noundef %26) #2
%28 = inttoptr i64 %27 to ptr
%29 = icmp eq i64 %27, 0
br i1 %29, label %30, label %32
30: ; preds = %18
%31 = tail call i32 @GOTO_END_ERROR() #2
br label %32
32: ; preds = %30, %18
%33 = load i32, ptr %4, align 4, !tbaa !6
%34 = tail call i32 @intfstream_read(ptr noundef %21, ptr noundef %28, i32 noundef %33) #2
br i1 %15, label %37, label %35
35: ; preds = %32
%36 = tail call i32 @free(ptr noundef nonnull %14) #2
br label %37
37: ; preds = %35, %32
%38 = icmp eq ptr %21, null
br i1 %38, label %41, label %39
39: ; preds = %37
%40 = tail call i32 @free(ptr noundef nonnull %21) #2
br label %41
41: ; preds = %39, %37
%42 = icmp ne i32 %22, 0
%43 = or i1 %42, %29
%44 = select i1 %42, ptr %28, ptr null
br i1 %43, label %47, label %45
45: ; preds = %41
%46 = tail call i32 @free(ptr noundef nonnull %28) #2
br label %47
47: ; preds = %41, %45
%48 = phi ptr [ null, %45 ], [ %44, %41 ]
ret ptr %48
}
declare i64 @malloc(i32 noundef) local_unnamed_addr #1
declare i32 @GOTO_END_ERROR(...) local_unnamed_addr #1
declare ptr @intfstream_open_writable_memory(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rpng_save_image_stream(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @intfstream_get_ptr(ptr noundef) local_unnamed_addr #1
declare i32 @intfstream_rewind(ptr noundef) local_unnamed_addr #1
declare i32 @intfstream_read(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
RetroArch_libretro-common_formats_png_extr_rpng_encode.c_rpng_save_image_bgr24_string
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/bna/extr_bnad.c_bnad_rx_coalescing_timeo_set.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/bna/extr_bnad.c_bnad_rx_coalescing_timeo_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bnad = type { i32, i32, ptr }
%struct.bnad_rx_info = type { i32 }
; Function Attrs: nounwind uwtable
define dso_local void @bnad_rx_coalescing_timeo_set(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %23
4: ; preds = %1
%5 = getelementptr inbounds %struct.bnad, ptr %0, i64 0, i32 2
%6 = getelementptr inbounds %struct.bnad, ptr %0, i64 0, i32 1
br label %7
7: ; preds = %4, %18
%8 = phi i32 [ %2, %4 ], [ %19, %18 ]
%9 = phi i64 [ 0, %4 ], [ %20, %18 ]
%10 = load ptr, ptr %5, align 8, !tbaa !11
%11 = getelementptr inbounds %struct.bnad_rx_info, ptr %10, i64 %9
%12 = load i32, ptr %11, align 4, !tbaa !12
%13 = icmp eq i32 %12, 0
br i1 %13, label %18, label %14
14: ; preds = %7
%15 = load i32, ptr %6, align 4, !tbaa !14
%16 = tail call i32 @bna_rx_coalescing_timeo_set(i32 noundef %12, i32 noundef %15) #2
%17 = load i32, ptr %0, align 8, !tbaa !5
br label %18
18: ; preds = %7, %14
%19 = phi i32 [ %8, %7 ], [ %17, %14 ]
%20 = add nuw nsw i64 %9, 1
%21 = sext i32 %19 to i64
%22 = icmp slt i64 %20, %21
br i1 %22, label %7, label %23, !llvm.loop !15
23: ; preds = %18, %1
ret void
}
declare i32 @bna_rx_coalescing_timeo_set(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bnad", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !7, i64 0}
!13 = !{!"bnad_rx_info", !7, i64 0}
!14 = !{!6, !7, i64 4}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/bna/extr_bnad.c_bnad_rx_coalescing_timeo_set.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/bna/extr_bnad.c_bnad_rx_coalescing_timeo_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.bnad_rx_info = type { i32 }
; Function Attrs: nounwind ssp uwtable(sync)
define void @bnad_rx_coalescing_timeo_set(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %23
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = getelementptr inbounds i8, ptr %0, i64 4
br label %7
7: ; preds = %4, %18
%8 = phi i32 [ %2, %4 ], [ %19, %18 ]
%9 = phi i64 [ 0, %4 ], [ %20, %18 ]
%10 = load ptr, ptr %5, align 8, !tbaa !12
%11 = getelementptr inbounds %struct.bnad_rx_info, ptr %10, i64 %9
%12 = load i32, ptr %11, align 4, !tbaa !13
%13 = icmp eq i32 %12, 0
br i1 %13, label %18, label %14
14: ; preds = %7
%15 = load i32, ptr %6, align 4, !tbaa !15
%16 = tail call i32 @bna_rx_coalescing_timeo_set(i32 noundef %12, i32 noundef %15) #2
%17 = load i32, ptr %0, align 8, !tbaa !6
br label %18
18: ; preds = %7, %14
%19 = phi i32 [ %8, %7 ], [ %17, %14 ]
%20 = add nuw nsw i64 %9, 1
%21 = sext i32 %19 to i64
%22 = icmp slt i64 %20, %21
br i1 %22, label %7, label %23, !llvm.loop !16
23: ; preds = %18, %1
ret void
}
declare i32 @bna_rx_coalescing_timeo_set(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"bnad", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !8, i64 0}
!14 = !{!"bnad_rx_info", !8, i64 0}
!15 = !{!7, !8, i64 4}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
|
fastsocket_kernel_drivers_net_bna_extr_bnad.c_bnad_rx_coalescing_timeo_set
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_pkex_finish.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_pkex_finish.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dpp_bootstrap_info = type { i32, ptr, i32, ptr, i32, i32, i32, i32 }
%struct.dpp_pkex = type { ptr, ptr }
@DPP_BOOTSTRAP_PKEX = dso_local local_unnamed_addr global i32 0, align 4
@ETH_ALEN = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @dpp_pkex_finish(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @os_zalloc(i32 noundef 48) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %32, label %7
7: ; preds = %4
%8 = tail call i32 @dpp_next_id(ptr noundef %0) #2
%9 = getelementptr inbounds %struct.dpp_bootstrap_info, ptr %5, i64 0, i32 7
store i32 %8, ptr %9, align 4, !tbaa !5
%10 = load i32, ptr @DPP_BOOTSTRAP_PKEX, align 4, !tbaa !11
%11 = getelementptr inbounds %struct.dpp_bootstrap_info, ptr %5, i64 0, i32 6
store i32 %10, ptr %11, align 8, !tbaa !12
%12 = getelementptr inbounds %struct.dpp_bootstrap_info, ptr %5, i64 0, i32 5
%13 = load i32, ptr %12, align 4, !tbaa !13
%14 = load i32, ptr @ETH_ALEN, align 4, !tbaa !11
%15 = tail call i32 @os_memcpy(i32 noundef %13, ptr noundef %2, i32 noundef %14) #2
store i32 1, ptr %5, align 8, !tbaa !14
%16 = getelementptr inbounds %struct.dpp_bootstrap_info, ptr %5, i64 0, i32 1
%17 = load ptr, ptr %16, align 8, !tbaa !15
store i32 %3, ptr %17, align 4, !tbaa !11
%18 = getelementptr inbounds %struct.dpp_pkex, ptr %1, i64 0, i32 1
%19 = load ptr, ptr %18, align 8, !tbaa !16
%20 = load i32, ptr %19, align 4, !tbaa !18
%21 = getelementptr inbounds %struct.dpp_bootstrap_info, ptr %5, i64 0, i32 4
store i32 %20, ptr %21, align 8, !tbaa !20
%22 = load ptr, ptr %1, align 8, !tbaa !21
%23 = getelementptr inbounds %struct.dpp_bootstrap_info, ptr %5, i64 0, i32 3
store ptr %22, ptr %23, align 8, !tbaa !22
store ptr null, ptr %1, align 8, !tbaa !21
%24 = tail call i64 @dpp_bootstrap_key_hash(ptr noundef nonnull %5) #2
%25 = icmp slt i64 %24, 0
br i1 %25, label %26, label %28
26: ; preds = %7
%27 = tail call i32 @dpp_bootstrap_info_free(ptr noundef nonnull %5) #2
br label %32
28: ; preds = %7
%29 = tail call i32 @dpp_pkex_free(ptr noundef nonnull %1) #2
%30 = getelementptr inbounds %struct.dpp_bootstrap_info, ptr %5, i64 0, i32 2
%31 = tail call i32 @dl_list_add(ptr noundef %0, ptr noundef nonnull %30) #2
br label %32
32: ; preds = %4, %28, %26
%33 = phi ptr [ null, %26 ], [ %5, %28 ], [ null, %4 ]
ret ptr %33
}
declare ptr @os_zalloc(i32 noundef) local_unnamed_addr #1
declare i32 @dpp_next_id(ptr noundef) local_unnamed_addr #1
declare i32 @os_memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @dpp_bootstrap_key_hash(ptr noundef) local_unnamed_addr #1
declare i32 @dpp_bootstrap_info_free(ptr noundef) local_unnamed_addr #1
declare i32 @dpp_pkex_free(ptr noundef) local_unnamed_addr #1
declare i32 @dl_list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 44}
!6 = !{!"dpp_bootstrap_info", !7, i64 0, !10, i64 8, !7, i64 16, !10, i64 24, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 40}
!13 = !{!6, !7, i64 36}
!14 = !{!6, !7, i64 0}
!15 = !{!6, !10, i64 8}
!16 = !{!17, !10, i64 8}
!17 = !{!"dpp_pkex", !10, i64 0, !10, i64 8}
!18 = !{!19, !7, i64 0}
!19 = !{!"TYPE_2__", !7, i64 0}
!20 = !{!6, !7, i64 32}
!21 = !{!17, !10, i64 0}
!22 = !{!6, !10, i64 24}
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_pkex_finish.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_pkex_finish.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DPP_BOOTSTRAP_PKEX = common local_unnamed_addr global i32 0, align 4
@ETH_ALEN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @dpp_pkex_finish(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @os_zalloc(i32 noundef 48) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %32, label %7
7: ; preds = %4
%8 = tail call i32 @dpp_next_id(ptr noundef %0) #2
%9 = getelementptr inbounds i8, ptr %5, i64 44
store i32 %8, ptr %9, align 4, !tbaa !6
%10 = load i32, ptr @DPP_BOOTSTRAP_PKEX, align 4, !tbaa !12
%11 = getelementptr inbounds i8, ptr %5, i64 40
store i32 %10, ptr %11, align 8, !tbaa !13
%12 = getelementptr inbounds i8, ptr %5, i64 36
%13 = load i32, ptr %12, align 4, !tbaa !14
%14 = load i32, ptr @ETH_ALEN, align 4, !tbaa !12
%15 = tail call i32 @os_memcpy(i32 noundef %13, ptr noundef %2, i32 noundef %14) #2
store i32 1, ptr %5, align 8, !tbaa !15
%16 = getelementptr inbounds i8, ptr %5, i64 8
%17 = load ptr, ptr %16, align 8, !tbaa !16
store i32 %3, ptr %17, align 4, !tbaa !12
%18 = getelementptr inbounds i8, ptr %1, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !17
%20 = load i32, ptr %19, align 4, !tbaa !19
%21 = getelementptr inbounds i8, ptr %5, i64 32
store i32 %20, ptr %21, align 8, !tbaa !21
%22 = load ptr, ptr %1, align 8, !tbaa !22
%23 = getelementptr inbounds i8, ptr %5, i64 24
store ptr %22, ptr %23, align 8, !tbaa !23
store ptr null, ptr %1, align 8, !tbaa !22
%24 = tail call i64 @dpp_bootstrap_key_hash(ptr noundef nonnull %5) #2
%25 = icmp slt i64 %24, 0
br i1 %25, label %26, label %28
26: ; preds = %7
%27 = tail call i32 @dpp_bootstrap_info_free(ptr noundef nonnull %5) #2
br label %32
28: ; preds = %7
%29 = tail call i32 @dpp_pkex_free(ptr noundef nonnull %1) #2
%30 = getelementptr inbounds i8, ptr %5, i64 16
%31 = tail call i32 @dl_list_add(ptr noundef %0, ptr noundef nonnull %30) #2
br label %32
32: ; preds = %4, %28, %26
%33 = phi ptr [ null, %26 ], [ %5, %28 ], [ null, %4 ]
ret ptr %33
}
declare ptr @os_zalloc(i32 noundef) local_unnamed_addr #1
declare i32 @dpp_next_id(ptr noundef) local_unnamed_addr #1
declare i32 @os_memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @dpp_bootstrap_key_hash(ptr noundef) local_unnamed_addr #1
declare i32 @dpp_bootstrap_info_free(ptr noundef) local_unnamed_addr #1
declare i32 @dpp_pkex_free(ptr noundef) local_unnamed_addr #1
declare i32 @dl_list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 44}
!7 = !{!"dpp_bootstrap_info", !8, i64 0, !11, i64 8, !8, i64 16, !11, i64 24, !8, i64 32, !8, i64 36, !8, i64 40, !8, i64 44}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 40}
!14 = !{!7, !8, i64 36}
!15 = !{!7, !8, i64 0}
!16 = !{!7, !11, i64 8}
!17 = !{!18, !11, i64 8}
!18 = !{!"dpp_pkex", !11, i64 0, !11, i64 8}
!19 = !{!20, !8, i64 0}
!20 = !{!"TYPE_2__", !8, i64 0}
!21 = !{!7, !8, i64 32}
!22 = !{!18, !11, i64 0}
!23 = !{!7, !11, i64 24}
|
freebsd_contrib_wpa_src_common_extr_dpp.c_dpp_pkex_finish
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ncpfs/extr_sock.c_ncpdgram_timeout_call.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ncpfs/extr_sock.c_ncpdgram_timeout_call.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @ncpdgram_timeout_call(i64 noundef %0) local_unnamed_addr #0 {
%2 = inttoptr i64 %0 to ptr
%3 = tail call i32 @schedule_work(ptr noundef %2) #2
ret void
}
declare i32 @schedule_work(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ncpfs/extr_sock.c_ncpdgram_timeout_call.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ncpfs/extr_sock.c_ncpdgram_timeout_call.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @ncpdgram_timeout_call(i64 noundef %0) local_unnamed_addr #0 {
%2 = inttoptr i64 %0 to ptr
%3 = tail call i32 @schedule_work(ptr noundef %2) #2
ret void
}
declare i32 @schedule_work(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_fs_ncpfs_extr_sock.c_ncpdgram_timeout_call
|
; ModuleID = 'AnghaBench/lab/engine/code/q3_ui/extr_ui_qmenu.c_RadioButton_Key.c'
source_filename = "AnghaBench/lab/engine/code/q3_ui/extr_ui_qmenu.c_RadioButton_Key.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
%struct.TYPE_6__ = type { i32, %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i32, {}* }
@QMF_HASMOUSEFOCUS = dso_local local_unnamed_addr global i32 0, align 4
@QM_ACTIVATED = dso_local local_unnamed_addr global i32 0, align 4
@menu_move_sound = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.TYPE_6__*, i32)* @RadioButton_Key to i8*)], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @RadioButton_Key(%struct.TYPE_6__* noundef %0, i32 noundef %1) #0 {
switch i32 %1, label %23 [
i32 129, label %3
i32 137, label %9
i32 136, label %9
i32 135, label %9
i32 134, label %9
i32 138, label %9
i32 133, label %9
i32 132, label %9
i32 130, label %9
i32 131, label %9
i32 128, label %9
]
3: ; preds = %2
%4 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %0, i64 0, i32 1, i32 0
%5 = load i32, i32* %4, align 8, !tbaa !5
%6 = load i32, i32* @QMF_HASMOUSEFOCUS, align 4, !tbaa !12
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %23, label %9
9: ; preds = %3, %2, %2, %2, %2, %2, %2, %2, %2, %2, %2
%10 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %0, i64 0, i32 0
%11 = load i32, i32* %10, align 8, !tbaa !13
%12 = icmp eq i32 %11, 0
%13 = zext i1 %12 to i32
store i32 %13, i32* %10, align 8, !tbaa !13
%14 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %0, i64 0, i32 1, i32 1
%15 = bitcast {}** %14 to i32 (%struct.TYPE_6__*, i32)**
%16 = load i32 (%struct.TYPE_6__*, i32)*, i32 (%struct.TYPE_6__*, i32)** %15, align 8, !tbaa !14
%17 = icmp eq i32 (%struct.TYPE_6__*, i32)* %16, null
br i1 %17, label %21, label %18
18: ; preds = %9
%19 = load i32, i32* @QM_ACTIVATED, align 4, !tbaa !12
%20 = tail call i32 %16(%struct.TYPE_6__* noundef nonnull %0, i32 noundef %19) #1
br label %21
21: ; preds = %18, %9
%22 = load i32, i32* @menu_move_sound, align 4, !tbaa !12
br label %23
23: ; preds = %2, %3, %21
%24 = phi i32 [ %22, %21 ], [ 0, %3 ], [ 0, %2 ]
ret i32 %24
}
attributes #0 = { nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"}
!5 = !{!6, !7, i64 8}
!6 = !{!"TYPE_6__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_5__", !7, i64 0, !11, i64 8}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!6, !11, i64 16}
|
; ModuleID = 'AnghaBench/lab/engine/code/q3_ui/extr_ui_qmenu.c_RadioButton_Key.c'
source_filename = "AnghaBench/lab/engine/code/q3_ui/extr_ui_qmenu.c_RadioButton_Key.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@QMF_HASMOUSEFOCUS = common local_unnamed_addr global i32 0, align 4
@QM_ACTIVATED = common local_unnamed_addr global i32 0, align 4
@menu_move_sound = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @RadioButton_Key], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @RadioButton_Key(ptr noundef %0, i32 noundef %1) #0 {
switch i32 %1, label %21 [
i32 129, label %3
i32 137, label %9
i32 136, label %9
i32 135, label %9
i32 134, label %9
i32 138, label %9
i32 133, label %9
i32 132, label %9
i32 130, label %9
i32 131, label %9
i32 128, label %9
]
3: ; preds = %2
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load i32, ptr %4, align 8, !tbaa !6
%6 = load i32, ptr @QMF_HASMOUSEFOCUS, align 4, !tbaa !13
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %21, label %9
9: ; preds = %3, %2, %2, %2, %2, %2, %2, %2, %2, %2, %2
%10 = load i32, ptr %0, align 8, !tbaa !14
%11 = icmp eq i32 %10, 0
%12 = zext i1 %11 to i32
store i32 %12, ptr %0, align 8, !tbaa !14
%13 = getelementptr inbounds i8, ptr %0, i64 16
%14 = load ptr, ptr %13, align 8, !tbaa !15
%15 = icmp eq ptr %14, null
br i1 %15, label %19, label %16
16: ; preds = %9
%17 = load i32, ptr @QM_ACTIVATED, align 4, !tbaa !13
%18 = tail call i32 %14(ptr noundef nonnull %0, i32 noundef %17) #1
br label %19
19: ; preds = %16, %9
%20 = load i32, ptr @menu_move_sound, align 4, !tbaa !13
br label %21
21: ; preds = %2, %3, %19
%22 = phi i32 [ %20, %19 ], [ 0, %3 ], [ 0, %2 ]
ret i32 %22
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"TYPE_6__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_5__", !8, i64 0, !12, i64 8}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!7, !12, i64 16}
|
lab_engine_code_q3_ui_extr_ui_qmenu.c_RadioButton_Key
|
; ModuleID = 'AnghaBench/linux/arch/unicore32/kernel/extr_clock.c_clk_disable.c'
source_filename = "AnghaBench/linux/arch/unicore32/kernel/extr_clock.c_clk_disable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local void @clk_disable(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/arch/unicore32/kernel/extr_clock.c_clk_disable.c'
source_filename = "AnghaBench/linux/arch/unicore32/kernel/extr_clock.c_clk_disable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @clk_disable(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_arch_unicore32_kernel_extr_clock.c_clk_disable
|
; ModuleID = 'AnghaBench/linux/drivers/oprofile/extr_cpu_buffer.c_end_cpu_work.c'
source_filename = "AnghaBench/linux/drivers/oprofile/extr_cpu_buffer.c_end_cpu_work.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@work_enabled = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @end_cpu_work() local_unnamed_addr #0 {
store i64 0, ptr @work_enabled, align 8, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/oprofile/extr_cpu_buffer.c_end_cpu_work.c'
source_filename = "AnghaBench/linux/drivers/oprofile/extr_cpu_buffer.c_end_cpu_work.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@work_enabled = common local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync)
define void @end_cpu_work() local_unnamed_addr #0 {
store i64 0, ptr @work_enabled, align 8, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_oprofile_extr_cpu_buffer.c_end_cpu_work
|
; ModuleID = 'AnghaBench/linux/drivers/fpga/extr_altera-cvp.c_altera_cvp_v2_wait_for_credit.c'
source_filename = "AnghaBench/linux/drivers/fpga/extr_altera-cvp.c_altera_cvp_v2_wait_for_credit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.altera_cvp_conf = type { ptr, i64 }
@V2_CREDIT_TIMEOUT_US = dso_local local_unnamed_addr global i32 0, align 4
@V2_CHECK_CREDIT_US = dso_local local_unnamed_addr global i32 0, align 4
@VSE_CVP_TX_CREDITS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [35 x i8] c"Error reading CVP Credit Register\0A\00", align 1
@ALTERA_CVP_V2_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [42 x i8] c"CE Bit error credit reg[0x%x]:sent[0x%x]\0A\00", align 1
@EAGAIN = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [28 x i8] c"Timeout waiting for credit\0A\00", align 1
@ETIMEDOUT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @altera_cvp_v2_wait_for_credit], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @altera_cvp_v2_wait_for_credit(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca i64, align 8
%4 = load i32, ptr @V2_CREDIT_TIMEOUT_US, align 4, !tbaa !5
%5 = load i32, ptr @V2_CHECK_CREDIT_US, align 4, !tbaa !5
%6 = sdiv i32 %4, %5
%7 = load ptr, ptr %0, align 8, !tbaa !9
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%8 = getelementptr inbounds %struct.altera_cvp_conf, ptr %7, i64 0, i32 1
br label %9
9: ; preds = %33, %2
%10 = phi i32 [ %6, %2 ], [ %37, %33 ]
%11 = load i32, ptr @VSE_CVP_TX_CREDITS, align 4, !tbaa !5
%12 = call i32 @altera_read_config_byte(ptr noundef %7, i32 noundef %11, ptr noundef nonnull %3) #3
%13 = icmp eq i32 %12, 0
br i1 %13, label %17, label %14
14: ; preds = %9
%15 = load ptr, ptr %7, align 8, !tbaa !12
%16 = call i32 (ptr, ptr, ...) @dev_err(ptr noundef %15, ptr noundef nonnull @.str) #3
br label %44
17: ; preds = %9
%18 = load i64, ptr %3, align 8, !tbaa !15
%19 = load i64, ptr %8, align 8, !tbaa !16
%20 = icmp eq i64 %18, %19
br i1 %20, label %21, label %44
21: ; preds = %17
%22 = load i32, ptr @ALTERA_CVP_V2_SIZE, align 4, !tbaa !5
%23 = mul nsw i32 %22, %1
%24 = call i32 @altera_cvp_chk_error(ptr noundef nonnull %0, i32 noundef %23) #3
%25 = icmp eq i32 %24, 0
br i1 %25, label %33, label %26
26: ; preds = %21
%27 = load ptr, ptr %7, align 8, !tbaa !12
%28 = load i64, ptr %3, align 8, !tbaa !15
%29 = load i64, ptr %8, align 8, !tbaa !16
%30 = call i32 (ptr, ptr, ...) @dev_err(ptr noundef %27, ptr noundef nonnull @.str.1, i64 noundef %28, i64 noundef %29) #3
%31 = load i32, ptr @EAGAIN, align 4, !tbaa !5
%32 = sub nsw i32 0, %31
br label %44
33: ; preds = %21
%34 = load i32, ptr @V2_CHECK_CREDIT_US, align 4, !tbaa !5
%35 = add nsw i32 %34, 1
%36 = call i32 @usleep_range(i32 noundef %34, i32 noundef %35) #3
%37 = add nsw i32 %10, -1
%38 = icmp eq i32 %10, 0
br i1 %38, label %39, label %9, !llvm.loop !17
39: ; preds = %33
%40 = load ptr, ptr %7, align 8, !tbaa !12
%41 = call i32 (ptr, ptr, ...) @dev_err(ptr noundef %40, ptr noundef nonnull @.str.2) #3
%42 = load i32, ptr @ETIMEDOUT, align 4, !tbaa !5
%43 = sub nsw i32 0, %42
br label %44
44: ; preds = %17, %39, %26, %14
%45 = phi i32 [ %12, %14 ], [ %32, %26 ], [ %43, %39 ], [ 0, %17 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %45
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @altera_read_config_byte(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef, ...) local_unnamed_addr #2
declare i32 @altera_cvp_chk_error(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"fpga_manager", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"altera_cvp_conf", !11, i64 0, !14, i64 8}
!14 = !{!"long", !7, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!13, !14, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/fpga/extr_altera-cvp.c_altera_cvp_v2_wait_for_credit.c'
source_filename = "AnghaBench/linux/drivers/fpga/extr_altera-cvp.c_altera_cvp_v2_wait_for_credit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@V2_CREDIT_TIMEOUT_US = common local_unnamed_addr global i32 0, align 4
@V2_CHECK_CREDIT_US = common local_unnamed_addr global i32 0, align 4
@VSE_CVP_TX_CREDITS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [35 x i8] c"Error reading CVP Credit Register\0A\00", align 1
@ALTERA_CVP_V2_SIZE = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [42 x i8] c"CE Bit error credit reg[0x%x]:sent[0x%x]\0A\00", align 1
@EAGAIN = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [28 x i8] c"Timeout waiting for credit\0A\00", align 1
@ETIMEDOUT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @altera_cvp_v2_wait_for_credit], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @altera_cvp_v2_wait_for_credit(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca i64, align 8
%4 = load i32, ptr @V2_CREDIT_TIMEOUT_US, align 4, !tbaa !6
%5 = load i32, ptr @V2_CHECK_CREDIT_US, align 4, !tbaa !6
%6 = sdiv i32 %4, %5
%7 = load ptr, ptr %0, align 8, !tbaa !10
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%8 = getelementptr inbounds i8, ptr %7, i64 8
br label %9
9: ; preds = %33, %2
%10 = phi i32 [ %6, %2 ], [ %37, %33 ]
%11 = load i32, ptr @VSE_CVP_TX_CREDITS, align 4, !tbaa !6
%12 = call i32 @altera_read_config_byte(ptr noundef %7, i32 noundef %11, ptr noundef nonnull %3) #3
%13 = icmp eq i32 %12, 0
br i1 %13, label %17, label %14
14: ; preds = %9
%15 = load ptr, ptr %7, align 8, !tbaa !13
%16 = call i32 (ptr, ptr, ...) @dev_err(ptr noundef %15, ptr noundef nonnull @.str) #3
br label %44
17: ; preds = %9
%18 = load i64, ptr %3, align 8, !tbaa !16
%19 = load i64, ptr %8, align 8, !tbaa !17
%20 = icmp eq i64 %18, %19
br i1 %20, label %21, label %44
21: ; preds = %17
%22 = load i32, ptr @ALTERA_CVP_V2_SIZE, align 4, !tbaa !6
%23 = mul nsw i32 %22, %1
%24 = call i32 @altera_cvp_chk_error(ptr noundef nonnull %0, i32 noundef %23) #3
%25 = icmp eq i32 %24, 0
br i1 %25, label %33, label %26
26: ; preds = %21
%27 = load ptr, ptr %7, align 8, !tbaa !13
%28 = load i64, ptr %3, align 8, !tbaa !16
%29 = load i64, ptr %8, align 8, !tbaa !17
%30 = call i32 (ptr, ptr, ...) @dev_err(ptr noundef %27, ptr noundef nonnull @.str.1, i64 noundef %28, i64 noundef %29) #3
%31 = load i32, ptr @EAGAIN, align 4, !tbaa !6
%32 = sub nsw i32 0, %31
br label %44
33: ; preds = %21
%34 = load i32, ptr @V2_CHECK_CREDIT_US, align 4, !tbaa !6
%35 = add nsw i32 %34, 1
%36 = call i32 @usleep_range(i32 noundef %34, i32 noundef %35) #3
%37 = add nsw i32 %10, -1
%38 = icmp eq i32 %10, 0
br i1 %38, label %39, label %9, !llvm.loop !18
39: ; preds = %33
%40 = load ptr, ptr %7, align 8, !tbaa !13
%41 = call i32 (ptr, ptr, ...) @dev_err(ptr noundef %40, ptr noundef nonnull @.str.2) #3
%42 = load i32, ptr @ETIMEDOUT, align 4, !tbaa !6
%43 = sub nsw i32 0, %42
br label %44
44: ; preds = %17, %39, %26, %14
%45 = phi i32 [ %12, %14 ], [ %32, %26 ], [ %43, %39 ], [ 0, %17 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %45
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @altera_read_config_byte(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef, ...) local_unnamed_addr #2
declare i32 @altera_cvp_chk_error(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"fpga_manager", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"altera_cvp_conf", !12, i64 0, !15, i64 8}
!15 = !{!"long", !8, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!14, !15, i64 8}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_fpga_extr_altera-cvp.c_altera_cvp_v2_wait_for_credit
|
; ModuleID = 'AnghaBench/linux/drivers/md/bcache/extr_request.c_bch_cached_dev_request_init.c'
source_filename = "AnghaBench/linux/drivers/md/bcache/extr_request.c_bch_cached_dev_request_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32, i32, ptr }
%struct.TYPE_5__ = type { ptr, i32 }
@cached_dev_make_request = dso_local local_unnamed_addr global i32 0, align 4
@cached_dev_congested = dso_local local_unnamed_addr global i32 0, align 4
@cached_dev_cache_miss = dso_local local_unnamed_addr global i32 0, align 4
@cached_dev_ioctl = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable
define dso_local void @bch_cached_dev_request_init(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i32, ptr @cached_dev_make_request, align 4, !tbaa !12
%5 = load ptr, ptr %3, align 8, !tbaa !13
%6 = getelementptr inbounds %struct.TYPE_5__, ptr %5, i64 0, i32 1
store i32 %4, ptr %6, align 8, !tbaa !15
%7 = load i32, ptr @cached_dev_congested, align 4, !tbaa !12
%8 = load ptr, ptr %5, align 8, !tbaa !17
store i32 %7, ptr %8, align 4, !tbaa !18
%9 = load i32, ptr @cached_dev_cache_miss, align 4, !tbaa !12
%10 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
store i32 %9, ptr %10, align 4, !tbaa !20
%11 = load i32, ptr @cached_dev_ioctl, align 4, !tbaa !12
store i32 %11, ptr %0, align 8, !tbaa !21
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"cached_dev", !7, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"gendisk", !11, i64 0}
!15 = !{!16, !8, i64 8}
!16 = !{!"TYPE_5__", !11, i64 0, !8, i64 8}
!17 = !{!16, !11, i64 0}
!18 = !{!19, !8, i64 0}
!19 = !{!"TYPE_4__", !8, i64 0}
!20 = !{!6, !8, i64 4}
!21 = !{!6, !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/md/bcache/extr_request.c_bch_cached_dev_request_init.c'
source_filename = "AnghaBench/linux/drivers/md/bcache/extr_request.c_bch_cached_dev_request_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cached_dev_make_request = common local_unnamed_addr global i32 0, align 4
@cached_dev_congested = common local_unnamed_addr global i32 0, align 4
@cached_dev_cache_miss = common local_unnamed_addr global i32 0, align 4
@cached_dev_ioctl = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define void @bch_cached_dev_request_init(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i32, ptr @cached_dev_make_request, align 4, !tbaa !13
%5 = load ptr, ptr %3, align 8, !tbaa !14
%6 = getelementptr inbounds i8, ptr %5, i64 8
store i32 %4, ptr %6, align 8, !tbaa !16
%7 = load i32, ptr @cached_dev_congested, align 4, !tbaa !13
%8 = load ptr, ptr %5, align 8, !tbaa !18
store i32 %7, ptr %8, align 4, !tbaa !19
%9 = load i32, ptr @cached_dev_cache_miss, align 4, !tbaa !13
%10 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %9, ptr %10, align 4, !tbaa !21
%11 = load i32, ptr @cached_dev_ioctl, align 4, !tbaa !13
store i32 %11, ptr %0, align 8, !tbaa !22
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"cached_dev", !8, i64 0}
!8 = !{!"TYPE_6__", !9, i64 0, !9, i64 4, !12, i64 8}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!9, !9, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"gendisk", !12, i64 0}
!16 = !{!17, !9, i64 8}
!17 = !{!"TYPE_5__", !12, i64 0, !9, i64 8}
!18 = !{!17, !12, i64 0}
!19 = !{!20, !9, i64 0}
!20 = !{!"TYPE_4__", !9, i64 0}
!21 = !{!7, !9, i64 4}
!22 = !{!7, !9, i64 0}
|
linux_drivers_md_bcache_extr_request.c_bch_cached_dev_request_init
|
; ModuleID = 'AnghaBench/libgit2/tests/core/extr_string.c_test_core_string__prefixncmp.c'
source_filename = "AnghaBench/libgit2/tests/core/extr_string.c_test_core_string__prefixncmp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"a\00", align 1
@.str.2 = private unnamed_addr constant [2 x i8] c"b\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"ab\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c"ac\00", align 1
@.str.5 = private unnamed_addr constant [3 x i8] c"aa\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @test_core_string__prefixncmp() local_unnamed_addr #0 {
%1 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str, i32 noundef 0, ptr noundef nonnull @.str) #2
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @cl_assert(i32 noundef %3) #2
%5 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.1, i32 noundef 1, ptr noundef nonnull @.str) #2
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @cl_assert(i32 noundef %7) #2
%9 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str, i32 noundef 0, ptr noundef nonnull @.str.1) #2
%10 = lshr i64 %9, 63
%11 = trunc i64 %10 to i32
%12 = tail call i32 @cl_assert(i32 noundef %11) #2
%13 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.1, i32 noundef 1, ptr noundef nonnull @.str.2) #2
%14 = lshr i64 %13, 63
%15 = trunc i64 %14 to i32
%16 = tail call i32 @cl_assert(i32 noundef %15) #2
%17 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.2, i32 noundef 1, ptr noundef nonnull @.str.1) #2
%18 = icmp sgt i64 %17, 0
%19 = zext i1 %18 to i32
%20 = tail call i32 @cl_assert(i32 noundef %19) #2
%21 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 2, ptr noundef nonnull @.str.1) #2
%22 = icmp eq i64 %21, 0
%23 = zext i1 %22 to i32
%24 = tail call i32 @cl_assert(i32 noundef %23) #2
%25 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 1, ptr noundef nonnull @.str.1) #2
%26 = icmp eq i64 %25, 0
%27 = zext i1 %26 to i32
%28 = tail call i32 @cl_assert(i32 noundef %27) #2
%29 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 2, ptr noundef nonnull @.str.4) #2
%30 = lshr i64 %29, 63
%31 = trunc i64 %30 to i32
%32 = tail call i32 @cl_assert(i32 noundef %31) #2
%33 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.1, i32 noundef 1, ptr noundef nonnull @.str.4) #2
%34 = lshr i64 %33, 63
%35 = trunc i64 %34 to i32
%36 = tail call i32 @cl_assert(i32 noundef %35) #2
%37 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 1, ptr noundef nonnull @.str.4) #2
%38 = lshr i64 %37, 63
%39 = trunc i64 %38 to i32
%40 = tail call i32 @cl_assert(i32 noundef %39) #2
%41 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 2, ptr noundef nonnull @.str.5) #2
%42 = icmp sgt i64 %41, 0
%43 = zext i1 %42 to i32
%44 = tail call i32 @cl_assert(i32 noundef %43) #2
%45 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 1, ptr noundef nonnull @.str.5) #2
%46 = lshr i64 %45, 63
%47 = trunc i64 %46 to i32
%48 = tail call i32 @cl_assert(i32 noundef %47) #2
ret void
}
declare i32 @cl_assert(i32 noundef) local_unnamed_addr #1
declare i64 @git__prefixncmp(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/libgit2/tests/core/extr_string.c_test_core_string__prefixncmp.c'
source_filename = "AnghaBench/libgit2/tests/core/extr_string.c_test_core_string__prefixncmp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"a\00", align 1
@.str.2 = private unnamed_addr constant [2 x i8] c"b\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"ab\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c"ac\00", align 1
@.str.5 = private unnamed_addr constant [3 x i8] c"aa\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @test_core_string__prefixncmp() local_unnamed_addr #0 {
%1 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str, i32 noundef 0, ptr noundef nonnull @.str) #2
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @cl_assert(i32 noundef %3) #2
%5 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.1, i32 noundef 1, ptr noundef nonnull @.str) #2
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @cl_assert(i32 noundef %7) #2
%9 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str, i32 noundef 0, ptr noundef nonnull @.str.1) #2
%10 = lshr i64 %9, 63
%11 = trunc nuw nsw i64 %10 to i32
%12 = tail call i32 @cl_assert(i32 noundef %11) #2
%13 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.1, i32 noundef 1, ptr noundef nonnull @.str.2) #2
%14 = lshr i64 %13, 63
%15 = trunc nuw nsw i64 %14 to i32
%16 = tail call i32 @cl_assert(i32 noundef %15) #2
%17 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.2, i32 noundef 1, ptr noundef nonnull @.str.1) #2
%18 = icmp sgt i64 %17, 0
%19 = zext i1 %18 to i32
%20 = tail call i32 @cl_assert(i32 noundef %19) #2
%21 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 2, ptr noundef nonnull @.str.1) #2
%22 = icmp eq i64 %21, 0
%23 = zext i1 %22 to i32
%24 = tail call i32 @cl_assert(i32 noundef %23) #2
%25 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 1, ptr noundef nonnull @.str.1) #2
%26 = icmp eq i64 %25, 0
%27 = zext i1 %26 to i32
%28 = tail call i32 @cl_assert(i32 noundef %27) #2
%29 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 2, ptr noundef nonnull @.str.4) #2
%30 = lshr i64 %29, 63
%31 = trunc nuw nsw i64 %30 to i32
%32 = tail call i32 @cl_assert(i32 noundef %31) #2
%33 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.1, i32 noundef 1, ptr noundef nonnull @.str.4) #2
%34 = lshr i64 %33, 63
%35 = trunc nuw nsw i64 %34 to i32
%36 = tail call i32 @cl_assert(i32 noundef %35) #2
%37 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 1, ptr noundef nonnull @.str.4) #2
%38 = lshr i64 %37, 63
%39 = trunc nuw nsw i64 %38 to i32
%40 = tail call i32 @cl_assert(i32 noundef %39) #2
%41 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 2, ptr noundef nonnull @.str.5) #2
%42 = icmp sgt i64 %41, 0
%43 = zext i1 %42 to i32
%44 = tail call i32 @cl_assert(i32 noundef %43) #2
%45 = tail call i64 @git__prefixncmp(ptr noundef nonnull @.str.3, i32 noundef 1, ptr noundef nonnull @.str.5) #2
%46 = lshr i64 %45, 63
%47 = trunc nuw nsw i64 %46 to i32
%48 = tail call i32 @cl_assert(i32 noundef %47) #2
ret void
}
declare i32 @cl_assert(i32 noundef) local_unnamed_addr #1
declare i64 @git__prefixncmp(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
libgit2_tests_core_extr_string.c_test_core_string__prefixncmp
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/dccp/extr_dccp.h_max48.c'
source_filename = "AnghaBench/fastsocket/kernel/net/dccp/extr_dccp.h_max48.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @max48], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @max48(i32 noundef %0, i32 noundef %1) #0 {
%3 = tail call i64 @after48(i32 noundef %0, i32 noundef %1) #2
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 %1, i32 %0
ret i32 %5
}
declare i64 @after48(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/dccp/extr_dccp.h_max48.c'
source_filename = "AnghaBench/fastsocket/kernel/net/dccp/extr_dccp.h_max48.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @max48], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @max48(i32 noundef %0, i32 noundef %1) #0 {
%3 = tail call i64 @after48(i32 noundef %0, i32 noundef %1) #2
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 %1, i32 %0
ret i32 %5
}
declare i64 @after48(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_net_dccp_extr_dccp.h_max48
|
; ModuleID = 'AnghaBench/ijkplayer/ijkmedia/ijkj4a/j4a/class/android/media/extr_AudioTrack.c_J4AC_android_media_AudioTrack__getMaxVolume__catchAll.c'
source_filename = "AnghaBench/ijkplayer/ijkmedia/ijkj4a/j4a/class/android/media/extr_AudioTrack.c_J4AC_android_media_AudioTrack__getMaxVolume__catchAll.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @J4AC_android_media_AudioTrack__getMaxVolume__catchAll(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @J4AC_android_media_AudioTrack__getMaxVolume(ptr noundef %0) #2
%3 = tail call i64 @J4A_ExceptionCheck__catchAll(ptr noundef %0) #2
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 %2, i32 0
ret i32 %5
}
declare i32 @J4AC_android_media_AudioTrack__getMaxVolume(ptr noundef) local_unnamed_addr #1
declare i64 @J4A_ExceptionCheck__catchAll(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/ijkplayer/ijkmedia/ijkj4a/j4a/class/android/media/extr_AudioTrack.c_J4AC_android_media_AudioTrack__getMaxVolume__catchAll.c'
source_filename = "AnghaBench/ijkplayer/ijkmedia/ijkj4a/j4a/class/android/media/extr_AudioTrack.c_J4AC_android_media_AudioTrack__getMaxVolume__catchAll.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @J4AC_android_media_AudioTrack__getMaxVolume__catchAll(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @J4AC_android_media_AudioTrack__getMaxVolume(ptr noundef %0) #2
%3 = tail call i64 @J4A_ExceptionCheck__catchAll(ptr noundef %0) #2
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 %2, i32 0
ret i32 %5
}
declare i32 @J4AC_android_media_AudioTrack__getMaxVolume(ptr noundef) local_unnamed_addr #1
declare i64 @J4A_ExceptionCheck__catchAll(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
ijkplayer_ijkmedia_ijkj4a_j4a_class_android_media_extr_AudioTrack.c_J4AC_android_media_AudioTrack__getMaxVolume__catchAll
|
; ModuleID = 'AnghaBench/linux/drivers/clk/mmp/extr_clk-gate.c_mmp_clk_gate_is_enabled.c'
source_filename = "AnghaBench/linux/drivers/clk/mmp/extr_clk-gate.c_mmp_clk_gate_is_enabled.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mmp_clk_gate = type { i32, i32, i64, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @mmp_clk_gate_is_enabled], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mmp_clk_gate_is_enabled(ptr noundef %0) #0 {
%2 = tail call ptr @to_clk_mmp_gate(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.mmp_clk_gate, ptr %2, i64 0, i32 2
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @spin_lock_irqsave(i64 noundef %4, i64 noundef 0) #2
br label %8
8: ; preds = %6, %1
%9 = getelementptr inbounds %struct.mmp_clk_gate, ptr %2, i64 0, i32 3
%10 = load i32, ptr %9, align 8, !tbaa !11
%11 = tail call i32 @readl(i32 noundef %10) #2
%12 = load i64, ptr %3, align 8, !tbaa !5
%13 = icmp eq i64 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %8
%15 = tail call i32 @spin_unlock_irqrestore(i64 noundef %12, i64 noundef 0) #2
br label %16
16: ; preds = %14, %8
%17 = load i32, ptr %2, align 8, !tbaa !12
%18 = and i32 %17, %11
%19 = getelementptr inbounds %struct.mmp_clk_gate, ptr %2, i64 0, i32 1
%20 = load i32, ptr %19, align 4, !tbaa !13
%21 = icmp eq i32 %18, %20
%22 = zext i1 %21 to i32
ret i32 %22
}
declare ptr @to_clk_mmp_gate(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @readl(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"mmp_clk_gate", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 16}
!12 = !{!6, !7, i64 0}
!13 = !{!6, !7, i64 4}
|
; ModuleID = 'AnghaBench/linux/drivers/clk/mmp/extr_clk-gate.c_mmp_clk_gate_is_enabled.c'
source_filename = "AnghaBench/linux/drivers/clk/mmp/extr_clk-gate.c_mmp_clk_gate_is_enabled.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mmp_clk_gate_is_enabled], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @mmp_clk_gate_is_enabled(ptr noundef %0) #0 {
%2 = tail call ptr @to_clk_mmp_gate(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 8
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @spin_lock_irqsave(i64 noundef %4, i64 noundef 0) #2
br label %8
8: ; preds = %6, %1
%9 = getelementptr inbounds i8, ptr %2, i64 16
%10 = load i32, ptr %9, align 8, !tbaa !12
%11 = tail call i32 @readl(i32 noundef %10) #2
%12 = load i64, ptr %3, align 8, !tbaa !6
%13 = icmp eq i64 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %8
%15 = tail call i32 @spin_unlock_irqrestore(i64 noundef %12, i64 noundef 0) #2
br label %16
16: ; preds = %14, %8
%17 = load i32, ptr %2, align 8, !tbaa !13
%18 = and i32 %17, %11
%19 = getelementptr inbounds i8, ptr %2, i64 4
%20 = load i32, ptr %19, align 4, !tbaa !14
%21 = icmp eq i32 %18, %20
%22 = zext i1 %21 to i32
ret i32 %22
}
declare ptr @to_clk_mmp_gate(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @readl(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"mmp_clk_gate", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !8, i64 16}
!13 = !{!7, !8, i64 0}
!14 = !{!7, !8, i64 4}
|
linux_drivers_clk_mmp_extr_clk-gate.c_mmp_clk_gate_is_enabled
|
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