IR_x86
stringlengths 592
249k
| IR_arm
stringlengths 558
250k
| filename
stringlengths 17
191
|
|---|---|---|
; ModuleID = 'AnghaBench/freebsd/sys/dev/cxgbe/common/extr_t4_hw.c_t4_config_watchdog.c'
source_filename = "AnghaBench/freebsd/sys/dev/cxgbe/common/extr_t4_hw.c_t4_config_watchdog.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fw_watchdog_cmd = type { ptr, ptr, ptr, ptr }
@FW_WATCHDOG_CMD = dso_local local_unnamed_addr global i32 0, align 4
@F_FW_CMD_REQUEST = dso_local local_unnamed_addr global i32 0, align 4
@F_FW_CMD_WRITE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @t4_config_watchdog(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
%7 = alloca %struct.fw_watchdog_cmd, align 8
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %7) #3
%8 = add i32 %4, 5
%9 = udiv i32 %8, 10
%10 = icmp eq i32 %4, 0
%11 = icmp ugt i32 %8, 9
%12 = or i1 %10, %11
%13 = select i1 %12, i32 %9, i32 1
%14 = call i32 @memset(ptr noundef nonnull %7, i32 noundef 0, i32 noundef 32) #3
%15 = load i32, ptr @FW_WATCHDOG_CMD, align 4, !tbaa !5
%16 = call i32 @V_FW_CMD_OP(i32 noundef %15) #3
%17 = load i32, ptr @F_FW_CMD_REQUEST, align 4, !tbaa !5
%18 = or i32 %17, %16
%19 = load i32, ptr @F_FW_CMD_WRITE, align 4, !tbaa !5
%20 = or i32 %18, %19
%21 = call i32 @V_FW_PARAMS_CMD_PFN(i32 noundef %2) #3
%22 = or i32 %20, %21
%23 = call i32 @V_FW_PARAMS_CMD_VFN(i32 noundef %3) #3
%24 = or i32 %22, %23
%25 = call ptr @cpu_to_be32(i32 noundef %24) #3
%26 = getelementptr inbounds %struct.fw_watchdog_cmd, ptr %7, i64 0, i32 3
store ptr %25, ptr %26, align 8, !tbaa !9
%27 = call i32 @FW_LEN16(ptr noundef nonnull byval(%struct.fw_watchdog_cmd) align 8 %7) #3
%28 = call ptr @cpu_to_be32(i32 noundef %27) #3
%29 = getelementptr inbounds %struct.fw_watchdog_cmd, ptr %7, i64 0, i32 2
store ptr %28, ptr %29, align 8, !tbaa !12
%30 = call ptr @cpu_to_be32(i32 noundef %13) #3
%31 = getelementptr inbounds %struct.fw_watchdog_cmd, ptr %7, i64 0, i32 1
store ptr %30, ptr %31, align 8, !tbaa !13
%32 = call ptr @cpu_to_be32(i32 noundef %5) #3
store ptr %32, ptr %7, align 8, !tbaa !14
%33 = call i32 @t4_wr_mbox(ptr noundef %0, i32 noundef %1, ptr noundef nonnull %7, i32 noundef 32, ptr noundef null) #3
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %7) #3
ret i32 %33
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_be32(i32 noundef) local_unnamed_addr #2
declare i32 @V_FW_CMD_OP(i32 noundef) local_unnamed_addr #2
declare i32 @V_FW_PARAMS_CMD_PFN(i32 noundef) local_unnamed_addr #2
declare i32 @V_FW_PARAMS_CMD_VFN(i32 noundef) local_unnamed_addr #2
declare i32 @FW_LEN16(ptr noundef byval(%struct.fw_watchdog_cmd) align 8) local_unnamed_addr #2
declare i32 @t4_wr_mbox(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 24}
!10 = !{!"fw_watchdog_cmd", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 16}
!13 = !{!10, !11, i64 8}
!14 = !{!10, !11, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/cxgbe/common/extr_t4_hw.c_t4_config_watchdog.c'
source_filename = "AnghaBench/freebsd/sys/dev/cxgbe/common/extr_t4_hw.c_t4_config_watchdog.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.fw_watchdog_cmd = type { ptr, ptr, ptr, ptr }
@FW_WATCHDOG_CMD = common local_unnamed_addr global i32 0, align 4
@F_FW_CMD_REQUEST = common local_unnamed_addr global i32 0, align 4
@F_FW_CMD_WRITE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @t4_config_watchdog(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
%7 = alloca %struct.fw_watchdog_cmd, align 8
%8 = alloca %struct.fw_watchdog_cmd, align 8
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %7) #4
%9 = add i32 %4, 5
%10 = udiv i32 %9, 10
%11 = icmp eq i32 %4, 0
%12 = icmp ugt i32 %9, 9
%13 = or i1 %11, %12
%14 = select i1 %13, i32 %10, i32 1
%15 = call i32 @memset(ptr noundef nonnull %7, i32 noundef 0, i32 noundef 32) #4
%16 = load i32, ptr @FW_WATCHDOG_CMD, align 4, !tbaa !6
%17 = call i32 @V_FW_CMD_OP(i32 noundef %16) #4
%18 = load i32, ptr @F_FW_CMD_REQUEST, align 4, !tbaa !6
%19 = or i32 %18, %17
%20 = load i32, ptr @F_FW_CMD_WRITE, align 4, !tbaa !6
%21 = or i32 %19, %20
%22 = call i32 @V_FW_PARAMS_CMD_PFN(i32 noundef %2) #4
%23 = or i32 %21, %22
%24 = call i32 @V_FW_PARAMS_CMD_VFN(i32 noundef %3) #4
%25 = or i32 %23, %24
%26 = call ptr @cpu_to_be32(i32 noundef %25) #4
%27 = getelementptr inbounds i8, ptr %7, i64 24
store ptr %26, ptr %27, align 8, !tbaa !10
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %8) #4
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %8, ptr noundef nonnull align 8 dereferenceable(32) %7, i64 32, i1 false), !tbaa.struct !13
%28 = call i32 @FW_LEN16(ptr noundef nonnull %8) #4
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %8) #4
%29 = call ptr @cpu_to_be32(i32 noundef %28) #4
%30 = getelementptr inbounds i8, ptr %7, i64 16
store ptr %29, ptr %30, align 8, !tbaa !15
%31 = call ptr @cpu_to_be32(i32 noundef %14) #4
%32 = getelementptr inbounds i8, ptr %7, i64 8
store ptr %31, ptr %32, align 8, !tbaa !16
%33 = call ptr @cpu_to_be32(i32 noundef %5) #4
store ptr %33, ptr %7, align 8, !tbaa !17
%34 = call i32 @t4_wr_mbox(ptr noundef %0, i32 noundef %1, ptr noundef nonnull %7, i32 noundef 32, ptr noundef null) #4
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %7) #4
ret i32 %34
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_be32(i32 noundef) local_unnamed_addr #2
declare i32 @V_FW_CMD_OP(i32 noundef) local_unnamed_addr #2
declare i32 @V_FW_PARAMS_CMD_PFN(i32 noundef) local_unnamed_addr #2
declare i32 @V_FW_PARAMS_CMD_VFN(i32 noundef) local_unnamed_addr #2
declare i32 @FW_LEN16(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @t4_wr_mbox(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 24}
!11 = !{!"fw_watchdog_cmd", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{i64 0, i64 8, !14, i64 8, i64 8, !14, i64 16, i64 8, !14, i64 24, i64 8, !14}
!14 = !{!12, !12, i64 0}
!15 = !{!11, !12, i64 16}
!16 = !{!11, !12, i64 8}
!17 = !{!11, !12, i64 0}
|
freebsd_sys_dev_cxgbe_common_extr_t4_hw.c_t4_config_watchdog
|
; ModuleID = 'AnghaBench/redis/src/extr_sds.c_sdsrange.c'
source_filename = "AnghaBench/redis/src/extr_sds.c_sdsrange.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @sdsrange(ptr noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = tail call i64 @sdslen(ptr noundef %0) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %28, label %6
6: ; preds = %3
%7 = icmp ule i64 %1, %2
%8 = sub i64 %2, %1
%9 = add i64 %8, 1
%10 = icmp ne i64 %9, 0
%11 = and i1 %7, %10
%12 = icmp ugt i64 %4, %1
%13 = and i1 %11, %12
br i1 %13, label %14, label %24
14: ; preds = %6
%15 = icmp ugt i64 %4, %2
%16 = sub i64 %4, %1
%17 = select i1 %15, i64 %9, i64 %16
%18 = icmp ne i64 %1, 0
%19 = icmp ne i64 %17, 0
%20 = and i1 %18, %19
br i1 %20, label %21, label %24
21: ; preds = %14
%22 = getelementptr inbounds i64, ptr %0, i64 %1
%23 = tail call i32 @memmove(ptr noundef %0, ptr noundef nonnull %22, i64 noundef %17) #2
br label %24
24: ; preds = %6, %21, %14
%25 = phi i64 [ %17, %21 ], [ %17, %14 ], [ 0, %6 ]
%26 = getelementptr inbounds i64, ptr %0, i64 %25
store i64 0, ptr %26, align 8, !tbaa !5
%27 = tail call i32 @sdssetlen(ptr noundef %0, i64 noundef %25) #2
br label %28
28: ; preds = %3, %24
ret void
}
declare i64 @sdslen(ptr noundef) local_unnamed_addr #1
declare i32 @memmove(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @sdssetlen(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/redis/src/extr_sds.c_sdsrange.c'
source_filename = "AnghaBench/redis/src/extr_sds.c_sdsrange.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @sdsrange(ptr noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = tail call i64 @sdslen(ptr noundef %0) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %28, label %6
6: ; preds = %3
%7 = icmp ule i64 %1, %2
%8 = sub i64 %2, %1
%9 = add i64 %8, 1
%10 = icmp ne i64 %9, 0
%11 = and i1 %7, %10
%12 = icmp ugt i64 %4, %1
%13 = and i1 %11, %12
br i1 %13, label %14, label %24
14: ; preds = %6
%15 = icmp ugt i64 %4, %2
%16 = sub i64 %4, %1
%17 = select i1 %15, i64 %9, i64 %16
%18 = icmp ne i64 %1, 0
%19 = icmp ne i64 %17, 0
%20 = and i1 %18, %19
br i1 %20, label %21, label %24
21: ; preds = %14
%22 = getelementptr inbounds i64, ptr %0, i64 %1
%23 = tail call i32 @memmove(ptr noundef %0, ptr noundef nonnull %22, i64 noundef %17) #2
br label %24
24: ; preds = %6, %21, %14
%25 = phi i64 [ %17, %21 ], [ %17, %14 ], [ 0, %6 ]
%26 = getelementptr inbounds i64, ptr %0, i64 %25
store i64 0, ptr %26, align 8, !tbaa !6
%27 = tail call i32 @sdssetlen(ptr noundef %0, i64 noundef %25) #2
br label %28
28: ; preds = %3, %24
ret void
}
declare i64 @sdslen(ptr noundef) local_unnamed_addr #1
declare i32 @memmove(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @sdssetlen(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
redis_src_extr_sds.c_sdsrange
|
; ModuleID = 'AnghaBench/linux/drivers/thermal/intel/int340x_thermal/extr_processor_thermal_device.c_proc_thermal_remove.c'
source_filename = "AnghaBench/linux/drivers/thermal/intel/int340x_thermal/extr_processor_thermal_device.c_proc_thermal_remove.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32 }
%struct.proc_thermal_device = type { ptr, i32, ptr }
@ACPI_DEVICE_NOTIFY = dso_local local_unnamed_addr global i32 0, align 4
@proc_thermal_notify = dso_local local_unnamed_addr global i32 0, align 4
@dev_attr_tcc_offset_degree_celsius = dso_local global %struct.TYPE_6__ zeroinitializer, align 4
@power_limit_attribute_group = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @proc_thermal_remove], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @proc_thermal_remove(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.proc_thermal_device, ptr %0, i64 0, i32 2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i32, ptr %3, align 4, !tbaa !11
%5 = load i32, ptr @ACPI_DEVICE_NOTIFY, align 4, !tbaa !13
%6 = load i32, ptr @proc_thermal_notify, align 4, !tbaa !13
%7 = tail call i32 @acpi_remove_notify_handler(i32 noundef %4, i32 noundef %5, i32 noundef %6) #2
%8 = getelementptr inbounds %struct.proc_thermal_device, ptr %0, i64 0, i32 1
%9 = load i32, ptr %8, align 8, !tbaa !14
%10 = tail call i32 @int340x_thermal_zone_remove(i32 noundef %9) #2
%11 = load ptr, ptr %0, align 8, !tbaa !15
%12 = tail call i32 @sysfs_remove_file(ptr noundef %11, ptr noundef nonnull @dev_attr_tcc_offset_degree_celsius) #2
%13 = load ptr, ptr %0, align 8, !tbaa !15
%14 = tail call i32 @sysfs_remove_group(ptr noundef %13, ptr noundef nonnull @power_limit_attribute_group) #2
ret void
}
declare i32 @acpi_remove_notify_handler(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @int340x_thermal_zone_remove(i32 noundef) local_unnamed_addr #1
declare i32 @sysfs_remove_file(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sysfs_remove_group(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"proc_thermal_device", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_4__", !10, i64 0}
!13 = !{!10, !10, i64 0}
!14 = !{!6, !10, i64 8}
!15 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/thermal/intel/int340x_thermal/extr_processor_thermal_device.c_proc_thermal_remove.c'
source_filename = "AnghaBench/linux/drivers/thermal/intel/int340x_thermal/extr_processor_thermal_device.c_proc_thermal_remove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_6__ = type { i32 }
@ACPI_DEVICE_NOTIFY = common local_unnamed_addr global i32 0, align 4
@proc_thermal_notify = common local_unnamed_addr global i32 0, align 4
@dev_attr_tcc_offset_degree_celsius = common global %struct.TYPE_6__ zeroinitializer, align 4
@power_limit_attribute_group = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @proc_thermal_remove], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @proc_thermal_remove(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !12
%5 = load i32, ptr @ACPI_DEVICE_NOTIFY, align 4, !tbaa !14
%6 = load i32, ptr @proc_thermal_notify, align 4, !tbaa !14
%7 = tail call i32 @acpi_remove_notify_handler(i32 noundef %4, i32 noundef %5, i32 noundef %6) #2
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = load i32, ptr %8, align 8, !tbaa !15
%10 = tail call i32 @int340x_thermal_zone_remove(i32 noundef %9) #2
%11 = load ptr, ptr %0, align 8, !tbaa !16
%12 = tail call i32 @sysfs_remove_file(ptr noundef %11, ptr noundef nonnull @dev_attr_tcc_offset_degree_celsius) #2
%13 = load ptr, ptr %0, align 8, !tbaa !16
%14 = tail call i32 @sysfs_remove_group(ptr noundef %13, ptr noundef nonnull @power_limit_attribute_group) #2
ret void
}
declare i32 @acpi_remove_notify_handler(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @int340x_thermal_zone_remove(i32 noundef) local_unnamed_addr #1
declare i32 @sysfs_remove_file(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sysfs_remove_group(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"proc_thermal_device", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_4__", !11, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!7, !11, i64 8}
!16 = !{!7, !8, i64 0}
|
linux_drivers_thermal_intel_int340x_thermal_extr_processor_thermal_device.c_proc_thermal_remove
|
; ModuleID = 'AnghaBench/freebsd/contrib/xz/src/xz/extr_hardware.c_hardware_memlimit_set.c'
source_filename = "AnghaBench/freebsd/contrib/xz/src/xz/extr_hardware.c_hardware_memlimit_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@total_ram = dso_local local_unnamed_addr global i32 0, align 4
@memlimit_compress = dso_local local_unnamed_addr global i32 0, align 4
@memlimit_decompress = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @hardware_memlimit_set(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = icmp eq i32 %3, 0
br i1 %5, label %16, label %6
6: ; preds = %4
%7 = icmp sgt i32 %0, 0
%8 = zext i1 %7 to i32
%9 = tail call i32 @assert(i32 noundef %8) #2
%10 = icmp slt i32 %0, 101
%11 = zext i1 %10 to i32
%12 = tail call i32 @assert(i32 noundef %11) #2
%13 = load i32, ptr @total_ram, align 4, !tbaa !5
%14 = mul nsw i32 %13, %0
%15 = sdiv i32 %14, 100
br label %16
16: ; preds = %6, %4
%17 = phi i32 [ %15, %6 ], [ %0, %4 ]
%18 = icmp eq i32 %1, 0
br i1 %18, label %20, label %19
19: ; preds = %16
store i32 %17, ptr @memlimit_compress, align 4, !tbaa !5
br label %20
20: ; preds = %19, %16
%21 = icmp eq i32 %2, 0
br i1 %21, label %23, label %22
22: ; preds = %20
store i32 %17, ptr @memlimit_decompress, align 4, !tbaa !5
br label %23
23: ; preds = %22, %20
ret void
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/xz/src/xz/extr_hardware.c_hardware_memlimit_set.c'
source_filename = "AnghaBench/freebsd/contrib/xz/src/xz/extr_hardware.c_hardware_memlimit_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@total_ram = common local_unnamed_addr global i32 0, align 4
@memlimit_compress = common local_unnamed_addr global i32 0, align 4
@memlimit_decompress = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @hardware_memlimit_set(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = icmp eq i32 %3, 0
br i1 %5, label %16, label %6
6: ; preds = %4
%7 = icmp sgt i32 %0, 0
%8 = zext i1 %7 to i32
%9 = tail call i32 @assert(i32 noundef %8) #2
%10 = icmp slt i32 %0, 101
%11 = zext i1 %10 to i32
%12 = tail call i32 @assert(i32 noundef %11) #2
%13 = load i32, ptr @total_ram, align 4, !tbaa !6
%14 = mul nsw i32 %13, %0
%15 = sdiv i32 %14, 100
br label %16
16: ; preds = %6, %4
%17 = phi i32 [ %15, %6 ], [ %0, %4 ]
%18 = icmp eq i32 %1, 0
br i1 %18, label %20, label %19
19: ; preds = %16
store i32 %17, ptr @memlimit_compress, align 4, !tbaa !6
br label %20
20: ; preds = %19, %16
%21 = icmp eq i32 %2, 0
br i1 %21, label %23, label %22
22: ; preds = %20
store i32 %17, ptr @memlimit_decompress, align 4, !tbaa !6
br label %23
23: ; preds = %22, %20
ret void
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_contrib_xz_src_xz_extr_hardware.c_hardware_memlimit_set
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_ddi.c_skl_get_buf_trans_hdmi.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_ddi.c_skl_get_buf_trans_hdmi.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@skl_y_ddi_translations_hdmi = dso_local local_unnamed_addr global ptr null, align 8
@skl_ddi_translations_hdmi = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @skl_get_buf_trans_hdmi], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @skl_get_buf_trans_hdmi(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = tail call i64 @IS_SKL_ULX(ptr noundef %0) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %2
%6 = tail call i64 @IS_KBL_ULX(ptr noundef %0) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = tail call i64 @IS_CFL_ULX(ptr noundef %0) #2
%10 = icmp eq i64 %9, 0
%11 = select i1 %10, ptr @skl_ddi_translations_hdmi, ptr @skl_y_ddi_translations_hdmi
br label %12
12: ; preds = %8, %2, %5
%13 = phi ptr [ @skl_y_ddi_translations_hdmi, %5 ], [ @skl_y_ddi_translations_hdmi, %2 ], [ %11, %8 ]
%14 = load ptr, ptr %13, align 8, !tbaa !5
%15 = tail call i32 @ARRAY_SIZE(ptr noundef %14) #2
store i32 %15, ptr %1, align 4, !tbaa !9
%16 = load ptr, ptr %13, align 8, !tbaa !5
ret ptr %16
}
declare i64 @IS_SKL_ULX(ptr noundef) local_unnamed_addr #1
declare i64 @IS_KBL_ULX(ptr noundef) local_unnamed_addr #1
declare i64 @IS_CFL_ULX(ptr noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_ddi.c_skl_get_buf_trans_hdmi.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_ddi.c_skl_get_buf_trans_hdmi.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@skl_y_ddi_translations_hdmi = common local_unnamed_addr global ptr null, align 8
@skl_ddi_translations_hdmi = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @skl_get_buf_trans_hdmi], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @skl_get_buf_trans_hdmi(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = tail call i64 @IS_SKL_ULX(ptr noundef %0) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %2
%6 = tail call i64 @IS_KBL_ULX(ptr noundef %0) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = tail call i64 @IS_CFL_ULX(ptr noundef %0) #2
%10 = icmp eq i64 %9, 0
%11 = select i1 %10, ptr @skl_ddi_translations_hdmi, ptr @skl_y_ddi_translations_hdmi
br label %12
12: ; preds = %8, %2, %5
%13 = phi ptr [ @skl_y_ddi_translations_hdmi, %5 ], [ @skl_y_ddi_translations_hdmi, %2 ], [ %11, %8 ]
%14 = load ptr, ptr %13, align 8, !tbaa !6
%15 = tail call i32 @ARRAY_SIZE(ptr noundef %14) #2
store i32 %15, ptr %1, align 4, !tbaa !10
%16 = load ptr, ptr %13, align 8, !tbaa !6
ret ptr %16
}
declare i64 @IS_SKL_ULX(ptr noundef) local_unnamed_addr #1
declare i64 @IS_KBL_ULX(ptr noundef) local_unnamed_addr #1
declare i64 @IS_CFL_ULX(ptr noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
|
linux_drivers_gpu_drm_i915_display_extr_intel_ddi.c_skl_get_buf_trans_hdmi
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/cirrus/extr_ep93xx_eth.c_ep93xx_dev_alloc.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/cirrus/extr_ep93xx_eth.c_ep93xx_dev_alloc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.net_device = type { i32, ptr, ptr, i32 }
@ETH_ALEN = dso_local local_unnamed_addr global i32 0, align 4
@ep93xx_ethtool_ops = dso_local global i32 0, align 4
@ep93xx_netdev_ops = dso_local global i32 0, align 4
@NETIF_F_SG = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_F_HW_CSUM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ep93xx_dev_alloc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @ep93xx_dev_alloc(ptr nocapture noundef readonly %0) #0 {
%2 = tail call ptr @alloc_etherdev(i32 noundef 4) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %17, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.net_device, ptr %2, i64 0, i32 3
%6 = load i32, ptr %5, align 8, !tbaa !5
%7 = load i32, ptr %0, align 4, !tbaa !11
%8 = load i32, ptr @ETH_ALEN, align 4, !tbaa !13
%9 = tail call i32 @memcpy(i32 noundef %6, i32 noundef %7, i32 noundef %8) #2
%10 = getelementptr inbounds %struct.net_device, ptr %2, i64 0, i32 2
store ptr @ep93xx_ethtool_ops, ptr %10, align 8, !tbaa !14
%11 = getelementptr inbounds %struct.net_device, ptr %2, i64 0, i32 1
store ptr @ep93xx_netdev_ops, ptr %11, align 8, !tbaa !15
%12 = load i32, ptr @NETIF_F_SG, align 4, !tbaa !13
%13 = load i32, ptr @NETIF_F_HW_CSUM, align 4, !tbaa !13
%14 = or i32 %13, %12
%15 = load i32, ptr %2, align 8, !tbaa !16
%16 = or i32 %14, %15
store i32 %16, ptr %2, align 8, !tbaa !16
br label %17
17: ; preds = %1, %4
ret ptr %2
}
declare ptr @alloc_etherdev(i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"net_device", !7, i64 0, !10, i64 8, !10, i64 16, !7, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"ep93xx_eth_data", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !10, i64 16}
!15 = !{!6, !10, i64 8}
!16 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/cirrus/extr_ep93xx_eth.c_ep93xx_dev_alloc.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/cirrus/extr_ep93xx_eth.c_ep93xx_dev_alloc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ETH_ALEN = common local_unnamed_addr global i32 0, align 4
@ep93xx_ethtool_ops = common global i32 0, align 4
@ep93xx_netdev_ops = common global i32 0, align 4
@NETIF_F_SG = common local_unnamed_addr global i32 0, align 4
@NETIF_F_HW_CSUM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ep93xx_dev_alloc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @ep93xx_dev_alloc(ptr nocapture noundef readonly %0) #0 {
%2 = tail call ptr @alloc_etherdev(i32 noundef 4) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %17, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %2, i64 24
%6 = load i32, ptr %5, align 8, !tbaa !6
%7 = load i32, ptr %0, align 4, !tbaa !12
%8 = load i32, ptr @ETH_ALEN, align 4, !tbaa !14
%9 = tail call i32 @memcpy(i32 noundef %6, i32 noundef %7, i32 noundef %8) #2
%10 = getelementptr inbounds i8, ptr %2, i64 16
store ptr @ep93xx_ethtool_ops, ptr %10, align 8, !tbaa !15
%11 = getelementptr inbounds i8, ptr %2, i64 8
store ptr @ep93xx_netdev_ops, ptr %11, align 8, !tbaa !16
%12 = load i32, ptr @NETIF_F_SG, align 4, !tbaa !14
%13 = load i32, ptr @NETIF_F_HW_CSUM, align 4, !tbaa !14
%14 = or i32 %13, %12
%15 = load i32, ptr %2, align 8, !tbaa !17
%16 = or i32 %14, %15
store i32 %16, ptr %2, align 8, !tbaa !17
br label %17
17: ; preds = %1, %4
ret ptr %2
}
declare ptr @alloc_etherdev(i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 24}
!7 = !{!"net_device", !8, i64 0, !11, i64 8, !11, i64 16, !8, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"ep93xx_eth_data", !8, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !11, i64 16}
!16 = !{!7, !11, i64 8}
!17 = !{!7, !8, i64 0}
|
linux_drivers_net_ethernet_cirrus_extr_ep93xx_eth.c_ep93xx_dev_alloc
|
; ModuleID = 'AnghaBench/linux/drivers/net/can/usb/kvaser_usb/extr_kvaser_usb_leaf.c_kvaser_usb_leaf_handle_command.c'
source_filename = "AnghaBench/linux/drivers/net/can/usb/kvaser_usb/extr_kvaser_usb_leaf.c_kvaser_usb_leaf_handle_command.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.kvaser_usb = type { ptr, %struct.TYPE_5__ }
%struct.TYPE_5__ = type { %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32 }
@KVASER_LEAF = dso_local local_unnamed_addr global i32 0, align 4
@KVASER_USBCAN = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [24 x i8] c"Unhandled command (%d)\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @kvaser_usb_leaf_handle_command], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @kvaser_usb_leaf_handle_command(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr %1, align 4, !tbaa !5
switch i32 %3, label %38 [
i32 131, label %4
i32 130, label %6
i32 132, label %8
i32 133, label %8
i32 134, label %10
i32 136, label %17
i32 137, label %17
i32 129, label %26
i32 128, label %28
i32 135, label %33
]
4: ; preds = %2
%5 = tail call i32 @kvaser_usb_leaf_start_chip_reply(ptr noundef %0, ptr noundef nonnull %1) #2
br label %41
6: ; preds = %2
%7 = tail call i32 @kvaser_usb_leaf_stop_chip_reply(ptr noundef %0, ptr noundef nonnull %1) #2
br label %41
8: ; preds = %2, %2
%9 = tail call i32 @kvaser_usb_leaf_rx_can_msg(ptr noundef %0, ptr noundef nonnull %1) #2
br label %41
10: ; preds = %2
%11 = getelementptr inbounds %struct.kvaser_usb, ptr %0, i64 0, i32 1
%12 = load i32, ptr %11, align 8, !tbaa !10
%13 = load i32, ptr @KVASER_LEAF, align 4, !tbaa !15
%14 = icmp eq i32 %12, %13
br i1 %14, label %15, label %38
15: ; preds = %10
%16 = tail call i32 @kvaser_usb_leaf_rx_can_msg(ptr noundef nonnull %0, ptr noundef nonnull %1) #2
br label %41
17: ; preds = %2, %2
%18 = getelementptr inbounds %struct.kvaser_usb, ptr %0, i64 0, i32 1
%19 = load i32, ptr %18, align 8, !tbaa !10
%20 = load i32, ptr @KVASER_LEAF, align 4, !tbaa !15
%21 = icmp eq i32 %19, %20
br i1 %21, label %22, label %24
22: ; preds = %17
%23 = tail call i32 @kvaser_usb_leaf_leaf_rx_error(ptr noundef nonnull %0, ptr noundef nonnull %1) #2
br label %41
24: ; preds = %17
%25 = tail call i32 @kvaser_usb_leaf_usbcan_rx_error(ptr noundef nonnull %0, ptr noundef nonnull %1) #2
br label %41
26: ; preds = %2
%27 = tail call i32 @kvaser_usb_leaf_tx_acknowledge(ptr noundef %0, ptr noundef nonnull %1) #2
br label %41
28: ; preds = %2
%29 = getelementptr inbounds %struct.kvaser_usb, ptr %0, i64 0, i32 1
%30 = load i32, ptr %29, align 8, !tbaa !10
%31 = load i32, ptr @KVASER_USBCAN, align 4, !tbaa !15
%32 = icmp eq i32 %30, %31
br i1 %32, label %41, label %38
33: ; preds = %2
%34 = getelementptr inbounds %struct.kvaser_usb, ptr %0, i64 0, i32 1
%35 = load i32, ptr %34, align 8, !tbaa !10
%36 = load i32, ptr @KVASER_LEAF, align 4, !tbaa !15
%37 = icmp eq i32 %35, %36
br i1 %37, label %41, label %38
38: ; preds = %2, %33, %28, %10
%39 = load ptr, ptr %0, align 8, !tbaa !16
%40 = tail call i32 @dev_warn(ptr noundef %39, ptr noundef nonnull @.str, i32 noundef %3) #2
br label %41
41: ; preds = %33, %28, %22, %24, %38, %26, %15, %8, %6, %4
ret void
}
declare i32 @kvaser_usb_leaf_start_chip_reply(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kvaser_usb_leaf_stop_chip_reply(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kvaser_usb_leaf_rx_can_msg(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kvaser_usb_leaf_leaf_rx_error(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kvaser_usb_leaf_usbcan_rx_error(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kvaser_usb_leaf_tx_acknowledge(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_warn(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"kvaser_cmd", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"kvaser_usb", !12, i64 0, !13, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"TYPE_5__", !14, i64 0}
!14 = !{!"TYPE_4__", !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{!11, !12, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/can/usb/kvaser_usb/extr_kvaser_usb_leaf.c_kvaser_usb_leaf_handle_command.c'
source_filename = "AnghaBench/linux/drivers/net/can/usb/kvaser_usb/extr_kvaser_usb_leaf.c_kvaser_usb_leaf_handle_command.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@KVASER_LEAF = common local_unnamed_addr global i32 0, align 4
@KVASER_USBCAN = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [24 x i8] c"Unhandled command (%d)\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @kvaser_usb_leaf_handle_command], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @kvaser_usb_leaf_handle_command(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr %1, align 4, !tbaa !6
switch i32 %3, label %38 [
i32 131, label %4
i32 130, label %6
i32 132, label %8
i32 133, label %8
i32 134, label %10
i32 136, label %17
i32 137, label %17
i32 129, label %26
i32 128, label %28
i32 135, label %33
]
4: ; preds = %2
%5 = tail call i32 @kvaser_usb_leaf_start_chip_reply(ptr noundef %0, ptr noundef nonnull %1) #2
br label %41
6: ; preds = %2
%7 = tail call i32 @kvaser_usb_leaf_stop_chip_reply(ptr noundef %0, ptr noundef nonnull %1) #2
br label %41
8: ; preds = %2, %2
%9 = tail call i32 @kvaser_usb_leaf_rx_can_msg(ptr noundef %0, ptr noundef nonnull %1) #2
br label %41
10: ; preds = %2
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = load i32, ptr %11, align 8, !tbaa !11
%13 = load i32, ptr @KVASER_LEAF, align 4, !tbaa !16
%14 = icmp eq i32 %12, %13
br i1 %14, label %15, label %38
15: ; preds = %10
%16 = tail call i32 @kvaser_usb_leaf_rx_can_msg(ptr noundef nonnull %0, ptr noundef nonnull %1) #2
br label %41
17: ; preds = %2, %2
%18 = getelementptr inbounds i8, ptr %0, i64 8
%19 = load i32, ptr %18, align 8, !tbaa !11
%20 = load i32, ptr @KVASER_LEAF, align 4, !tbaa !16
%21 = icmp eq i32 %19, %20
br i1 %21, label %22, label %24
22: ; preds = %17
%23 = tail call i32 @kvaser_usb_leaf_leaf_rx_error(ptr noundef nonnull %0, ptr noundef nonnull %1) #2
br label %41
24: ; preds = %17
%25 = tail call i32 @kvaser_usb_leaf_usbcan_rx_error(ptr noundef nonnull %0, ptr noundef nonnull %1) #2
br label %41
26: ; preds = %2
%27 = tail call i32 @kvaser_usb_leaf_tx_acknowledge(ptr noundef %0, ptr noundef nonnull %1) #2
br label %41
28: ; preds = %2
%29 = getelementptr inbounds i8, ptr %0, i64 8
%30 = load i32, ptr %29, align 8, !tbaa !11
%31 = load i32, ptr @KVASER_USBCAN, align 4, !tbaa !16
%32 = icmp eq i32 %30, %31
br i1 %32, label %41, label %38
33: ; preds = %2
%34 = getelementptr inbounds i8, ptr %0, i64 8
%35 = load i32, ptr %34, align 8, !tbaa !11
%36 = load i32, ptr @KVASER_LEAF, align 4, !tbaa !16
%37 = icmp eq i32 %35, %36
br i1 %37, label %41, label %38
38: ; preds = %2, %33, %28, %10
%39 = load ptr, ptr %0, align 8, !tbaa !17
%40 = tail call i32 @dev_warn(ptr noundef %39, ptr noundef nonnull @.str, i32 noundef %3) #2
br label %41
41: ; preds = %33, %28, %22, %24, %38, %26, %15, %8, %6, %4
ret void
}
declare i32 @kvaser_usb_leaf_start_chip_reply(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kvaser_usb_leaf_stop_chip_reply(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kvaser_usb_leaf_rx_can_msg(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kvaser_usb_leaf_leaf_rx_error(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kvaser_usb_leaf_usbcan_rx_error(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kvaser_usb_leaf_tx_acknowledge(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_warn(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"kvaser_cmd", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"kvaser_usb", !13, i64 0, !14, i64 8}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!"TYPE_5__", !15, i64 0}
!15 = !{!"TYPE_4__", !8, i64 0}
!16 = !{!8, !8, i64 0}
!17 = !{!12, !13, i64 0}
|
linux_drivers_net_can_usb_kvaser_usb_extr_kvaser_usb_leaf.c_kvaser_usb_leaf_handle_command
|
; ModuleID = 'AnghaBench/linux/drivers/staging/vt6655/extr_card.c_CARDbyGetPktType.c'
source_filename = "AnghaBench/linux/drivers/staging/vt6655/extr_card.c_CARDbyGetPktType.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BB_TYPE_11A = dso_local local_unnamed_addr global i64 0, align 8
@BB_TYPE_11B = dso_local local_unnamed_addr global i64 0, align 8
@PK_TYPE_11GA = dso_local local_unnamed_addr global i8 0, align 1
@PK_TYPE_11GB = dso_local local_unnamed_addr global i8 0, align 1
; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @CARDbyGetPktType(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @BB_TYPE_11A, align 8, !tbaa !10
%4 = icmp eq i64 %2, %3
%5 = load i64, ptr @BB_TYPE_11B, align 8
%6 = icmp eq i64 %2, %5
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = trunc i64 %2 to i8
br label %17
10: ; preds = %1
%11 = tail call i64 @CARDbIsOFDMinBasicRate(ptr noundef nonnull %0) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %10
%14 = load i8, ptr @PK_TYPE_11GA, align 1, !tbaa !11
br label %17
15: ; preds = %10
%16 = load i8, ptr @PK_TYPE_11GB, align 1, !tbaa !11
br label %17
17: ; preds = %15, %13, %8
%18 = phi i8 [ %9, %8 ], [ %14, %13 ], [ %16, %15 ]
ret i8 %18
}
declare i64 @CARDbIsOFDMinBasicRate(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vnt_private", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!8, !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/vt6655/extr_card.c_CARDbyGetPktType.c'
source_filename = "AnghaBench/linux/drivers/staging/vt6655/extr_card.c_CARDbyGetPktType.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BB_TYPE_11A = common local_unnamed_addr global i64 0, align 8
@BB_TYPE_11B = common local_unnamed_addr global i64 0, align 8
@PK_TYPE_11GA = common local_unnamed_addr global i8 0, align 1
@PK_TYPE_11GB = common local_unnamed_addr global i8 0, align 1
; Function Attrs: nounwind ssp uwtable(sync)
define zeroext i8 @CARDbyGetPktType(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @BB_TYPE_11A, align 8, !tbaa !11
%4 = icmp eq i64 %2, %3
%5 = load i64, ptr @BB_TYPE_11B, align 8
%6 = icmp eq i64 %2, %5
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = trunc i64 %2 to i8
br label %17
10: ; preds = %1
%11 = tail call i64 @CARDbIsOFDMinBasicRate(ptr noundef nonnull %0) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %10
%14 = load i8, ptr @PK_TYPE_11GA, align 1, !tbaa !12
br label %17
15: ; preds = %10
%16 = load i8, ptr @PK_TYPE_11GB, align 1, !tbaa !12
br label %17
17: ; preds = %15, %13, %8
%18 = phi i8 [ %9, %8 ], [ %14, %13 ], [ %16, %15 ]
ret i8 %18
}
declare i64 @CARDbIsOFDMinBasicRate(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vnt_private", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!9, !9, i64 0}
|
linux_drivers_staging_vt6655_extr_card.c_CARDbyGetPktType
|
; ModuleID = 'AnghaBench/glfw/deps/extr_glad_gl.c_glad_gl_free_extensions.c'
source_filename = "AnghaBench/glfw/deps/extr_glad_gl.c_glad_gl_free_extensions.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @glad_gl_free_extensions], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @glad_gl_free_extensions(ptr noundef %0, i32 noundef %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %17, label %4
4: ; preds = %2
%5 = icmp eq i32 %1, 0
br i1 %5, label %15, label %6
6: ; preds = %4
%7 = zext i32 %1 to i64
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ 0, %6 ], [ %13, %8 ]
%10 = getelementptr inbounds ptr, ptr %0, i64 %9
%11 = load ptr, ptr %10, align 8, !tbaa !5
%12 = tail call i32 @free(ptr noundef %11) #2
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %7
br i1 %14, label %15, label %8, !llvm.loop !9
15: ; preds = %8, %4
%16 = tail call i32 @free(ptr noundef nonnull %0) #2
br label %17
17: ; preds = %15, %2
ret void
}
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/glfw/deps/extr_glad_gl.c_glad_gl_free_extensions.c'
source_filename = "AnghaBench/glfw/deps/extr_glad_gl.c_glad_gl_free_extensions.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @glad_gl_free_extensions], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @glad_gl_free_extensions(ptr noundef %0, i32 noundef %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %17, label %4
4: ; preds = %2
%5 = icmp eq i32 %1, 0
br i1 %5, label %15, label %6
6: ; preds = %4
%7 = zext i32 %1 to i64
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ 0, %6 ], [ %13, %8 ]
%10 = getelementptr inbounds ptr, ptr %0, i64 %9
%11 = load ptr, ptr %10, align 8, !tbaa !6
%12 = tail call i32 @free(ptr noundef %11) #2
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %7
br i1 %14, label %15, label %8, !llvm.loop !10
15: ; preds = %8, %4
%16 = tail call i32 @free(ptr noundef nonnull %0) #2
br label %17
17: ; preds = %15, %2
ret void
}
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
|
glfw_deps_extr_glad_gl.c_glad_gl_free_extensions
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_diva.c_ReadHSCX.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_diva.c_ReadHSCX.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @ReadHSCX], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @ReadHSCX(ptr nocapture noundef readonly %0, i32 noundef %1, i64 noundef %2) #0 {
%4 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%5 = load i32, ptr %4, align 4, !tbaa !5
%6 = load i32, ptr %0, align 4, !tbaa !12
%7 = icmp eq i32 %1, 0
%8 = select i1 %7, i64 0, i64 64
%9 = add nsw i64 %8, %2
%10 = tail call i64 @readreg(i32 noundef %5, i32 noundef %6, i64 noundef %9) #2
ret i64 %10
}
declare i64 @readreg(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !9, i64 4}
!6 = !{!"IsdnCardState", !7, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"TYPE_3__", !9, i64 0, !9, i64 4}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!6, !9, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_diva.c_ReadHSCX.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_diva.c_ReadHSCX.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ReadHSCX], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @ReadHSCX(ptr nocapture noundef readonly %0, i32 noundef %1, i64 noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %0, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !6
%6 = load i32, ptr %0, align 4, !tbaa !13
%7 = icmp eq i32 %1, 0
%8 = select i1 %7, i64 0, i64 64
%9 = add nsw i64 %8, %2
%10 = tail call i64 @readreg(i32 noundef %5, i32 noundef %6, i64 noundef %9) #2
ret i64 %10
}
declare i64 @readreg(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !10, i64 4}
!7 = !{!"IsdnCardState", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0}
!9 = !{!"TYPE_3__", !10, i64 0, !10, i64 4}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!7, !10, i64 0}
|
fastsocket_kernel_drivers_isdn_hisax_extr_diva.c_ReadHSCX
|
; ModuleID = 'AnghaBench/linux/crypto/extr_rsa_helper.c_rsa_get_dp.c'
source_filename = "AnghaBench/linux/crypto/extr_rsa_helper.c_rsa_get_dp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rsa_key = type { i64, i64, ptr }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local i32 @rsa_get_dp(ptr nocapture noundef %0, i64 noundef %1, i8 noundef zeroext %2, ptr noundef %3, i64 noundef %4) local_unnamed_addr #0 {
%6 = icmp ne ptr %3, null
%7 = icmp ne i64 %4, 0
%8 = and i1 %6, %7
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i64, ptr %0, align 8, !tbaa !5
%11 = icmp ult i64 %10, %4
br i1 %11, label %12, label %15
12: ; preds = %9, %5
%13 = load i32, ptr @EINVAL, align 4, !tbaa !11
%14 = sub nsw i32 0, %13
br label %18
15: ; preds = %9
%16 = getelementptr inbounds %struct.rsa_key, ptr %0, i64 0, i32 2
store ptr %3, ptr %16, align 8, !tbaa !13
%17 = getelementptr inbounds %struct.rsa_key, ptr %0, i64 0, i32 1
store i64 %4, ptr %17, align 8, !tbaa !14
br label %18
18: ; preds = %15, %12
%19 = phi i32 [ %14, %12 ], [ 0, %15 ]
ret i32 %19
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"rsa_key", !7, i64 0, !7, i64 8, !10, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!6, !10, i64 16}
!14 = !{!6, !7, i64 8}
|
; ModuleID = 'AnghaBench/linux/crypto/extr_rsa_helper.c_rsa_get_dp.c'
source_filename = "AnghaBench/linux/crypto/extr_rsa_helper.c_rsa_get_dp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @rsa_get_dp(ptr nocapture noundef %0, i64 noundef %1, i8 noundef zeroext %2, ptr noundef %3, i64 noundef %4) local_unnamed_addr #0 {
%6 = icmp ne ptr %3, null
%7 = icmp ne i64 %4, 0
%8 = and i1 %6, %7
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i64, ptr %0, align 8, !tbaa !6
%11 = icmp ult i64 %10, %4
br i1 %11, label %12, label %15
12: ; preds = %9, %5
%13 = load i32, ptr @EINVAL, align 4, !tbaa !12
%14 = sub nsw i32 0, %13
br label %18
15: ; preds = %9
%16 = getelementptr inbounds i8, ptr %0, i64 16
store ptr %3, ptr %16, align 8, !tbaa !14
%17 = getelementptr inbounds i8, ptr %0, i64 8
store i64 %4, ptr %17, align 8, !tbaa !15
br label %18
18: ; preds = %15, %12
%19 = phi i32 [ %14, %12 ], [ 0, %15 ]
ret i32 %19
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rsa_key", !8, i64 0, !8, i64 8, !11, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!7, !11, i64 16}
!15 = !{!7, !8, i64 8}
|
linux_crypto_extr_rsa_helper.c_rsa_get_dp
|
; ModuleID = 'AnghaBench/git/builtin/extr_commit.c_rollback_index_files.c'
source_filename = "AnghaBench/git/builtin/extr_commit.c_rollback_index_files.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@commit_style = dso_local local_unnamed_addr global i32 0, align 4
@index_lock = dso_local global i32 0, align 4
@false_lock = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @rollback_index_files], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @rollback_index_files() #0 {
%1 = load i32, ptr @commit_style, align 4, !tbaa !5
switch i32 %1, label %7 [
i32 128, label %2
i32 129, label %4
]
2: ; preds = %0
%3 = tail call i32 @rollback_lock_file(ptr noundef nonnull @index_lock) #2
br label %4
4: ; preds = %0, %2
%5 = phi ptr [ @false_lock, %2 ], [ @index_lock, %0 ]
%6 = tail call i32 @rollback_lock_file(ptr noundef nonnull %5) #2
br label %7
7: ; preds = %4, %0
ret void
}
declare i32 @rollback_lock_file(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/git/builtin/extr_commit.c_rollback_index_files.c'
source_filename = "AnghaBench/git/builtin/extr_commit.c_rollback_index_files.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@commit_style = common local_unnamed_addr global i32 0, align 4
@index_lock = common global i32 0, align 4
@false_lock = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @rollback_index_files], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @rollback_index_files() #0 {
%1 = load i32, ptr @commit_style, align 4, !tbaa !6
switch i32 %1, label %7 [
i32 128, label %2
i32 129, label %4
]
2: ; preds = %0
%3 = tail call i32 @rollback_lock_file(ptr noundef nonnull @index_lock) #2
br label %4
4: ; preds = %0, %2
%5 = phi ptr [ @false_lock, %2 ], [ @index_lock, %0 ]
%6 = tail call i32 @rollback_lock_file(ptr noundef nonnull %5) #2
br label %7
7: ; preds = %4, %0
ret void
}
declare i32 @rollback_lock_file(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
git_builtin_extr_commit.c_rollback_index_files
|
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_j2kenc.c_putnumpasses.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_j2kenc.c_putnumpasses.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @putnumpasses], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @putnumpasses(ptr noundef %0, i32 noundef %1) #0 {
switch i32 %1, label %7 [
i32 1, label %3
i32 2, label %5
]
3: ; preds = %2
%4 = tail call i32 @put_num(ptr noundef %0, i32 noundef 0, i32 noundef 1) #2
br label %23
5: ; preds = %2
%6 = tail call i32 @put_num(ptr noundef %0, i32 noundef 2, i32 noundef 2) #2
br label %23
7: ; preds = %2
%8 = icmp slt i32 %1, 6
br i1 %8, label %9, label %13
9: ; preds = %7
%10 = add nsw i32 %1, -3
%11 = or i32 %10, 12
%12 = tail call i32 @put_num(ptr noundef %0, i32 noundef %11, i32 noundef 4) #2
br label %23
13: ; preds = %7
%14 = icmp ult i32 %1, 37
br i1 %14, label %15, label %19
15: ; preds = %13
%16 = add nsw i32 %1, -6
%17 = or i32 %16, 480
%18 = tail call i32 @put_num(ptr noundef %0, i32 noundef %17, i32 noundef 9) #2
br label %23
19: ; preds = %13
%20 = add nsw i32 %1, -37
%21 = or i32 %20, 65408
%22 = tail call i32 @put_num(ptr noundef %0, i32 noundef %21, i32 noundef 16) #2
br label %23
23: ; preds = %5, %15, %19, %9, %3
ret void
}
declare i32 @put_num(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_j2kenc.c_putnumpasses.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_j2kenc.c_putnumpasses.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @putnumpasses], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @putnumpasses(ptr noundef %0, i32 noundef %1) #0 {
switch i32 %1, label %7 [
i32 1, label %3
i32 2, label %5
]
3: ; preds = %2
%4 = tail call i32 @put_num(ptr noundef %0, i32 noundef 0, i32 noundef 1) #2
br label %23
5: ; preds = %2
%6 = tail call i32 @put_num(ptr noundef %0, i32 noundef 2, i32 noundef 2) #2
br label %23
7: ; preds = %2
%8 = icmp slt i32 %1, 6
br i1 %8, label %9, label %13
9: ; preds = %7
%10 = add nsw i32 %1, -3
%11 = or i32 %10, 12
%12 = tail call i32 @put_num(ptr noundef %0, i32 noundef %11, i32 noundef 4) #2
br label %23
13: ; preds = %7
%14 = icmp ult i32 %1, 37
br i1 %14, label %15, label %19
15: ; preds = %13
%16 = add nsw i32 %1, -6
%17 = or i32 %16, 480
%18 = tail call i32 @put_num(ptr noundef %0, i32 noundef %17, i32 noundef 9) #2
br label %23
19: ; preds = %13
%20 = add nsw i32 %1, -37
%21 = or i32 %20, 65408
%22 = tail call i32 @put_num(ptr noundef %0, i32 noundef %21, i32 noundef 16) #2
br label %23
23: ; preds = %5, %15, %19, %9, %3
ret void
}
declare i32 @put_num(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
FFmpeg_libavcodec_extr_j2kenc.c_putnumpasses
|
; ModuleID = 'AnghaBench/php-src/ext/pcre/pcre2lib/sljit/extr_sljitLir.c_function_check_dst.c'
source_filename = "AnghaBench/php-src/ext/pcre/pcre2lib/sljit/extr_sljitLir.c_function_check_dst.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sljit_compiler = type { i32, i32, i64 }
@SLJIT_UNUSED = dso_local local_unnamed_addr global i64 0, align 8
@SLJIT_SP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @function_check_dst], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @function_check_dst(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3) #0 {
%5 = load i32, ptr %0, align 8, !tbaa !5
%6 = icmp eq i32 %5, -1
br i1 %6, label %35, label %7
7: ; preds = %4
%8 = getelementptr inbounds %struct.sljit_compiler, ptr %0, i64 0, i32 1
%9 = load i32, ptr %8, align 4, !tbaa !11
%10 = icmp eq i32 %9, -1
br i1 %10, label %35, label %11
11: ; preds = %7
%12 = tail call i64 @FUNCTION_CHECK_IS_REG(i64 noundef %1) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %11
%15 = icmp ne i64 %3, 0
%16 = load i64, ptr @SLJIT_UNUSED, align 8
%17 = icmp eq i64 %16, %1
%18 = select i1 %15, i1 %17, i1 false
br i1 %18, label %19, label %22
19: ; preds = %14, %11
%20 = icmp eq i64 %2, 0
%21 = zext i1 %20 to i64
br label %35
22: ; preds = %14
%23 = load i32, ptr @SLJIT_SP, align 4, !tbaa !12
%24 = tail call i64 @SLJIT_MEM1(i32 noundef %23) #2
%25 = icmp eq i64 %24, %1
br i1 %25, label %26, label %33
26: ; preds = %22
%27 = icmp sgt i64 %2, -1
br i1 %27, label %28, label %35
28: ; preds = %26
%29 = getelementptr inbounds %struct.sljit_compiler, ptr %0, i64 0, i32 2
%30 = load i64, ptr %29, align 8, !tbaa !13
%31 = icmp sgt i64 %30, %2
%32 = zext i1 %31 to i64
br label %35
33: ; preds = %22
%34 = tail call i64 @function_check_src_mem(ptr noundef nonnull %0, i64 noundef %1, i64 noundef %2) #2
br label %35
35: ; preds = %26, %28, %4, %7, %33, %19
%36 = phi i64 [ %21, %19 ], [ %34, %33 ], [ 0, %7 ], [ 0, %4 ], [ 0, %26 ], [ %32, %28 ]
ret i64 %36
}
declare i64 @FUNCTION_CHECK_IS_REG(i64 noundef) local_unnamed_addr #1
declare i64 @SLJIT_MEM1(i32 noundef) local_unnamed_addr #1
declare i64 @function_check_src_mem(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sljit_compiler", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !10, i64 8}
|
; ModuleID = 'AnghaBench/php-src/ext/pcre/pcre2lib/sljit/extr_sljitLir.c_function_check_dst.c'
source_filename = "AnghaBench/php-src/ext/pcre/pcre2lib/sljit/extr_sljitLir.c_function_check_dst.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SLJIT_UNUSED = common local_unnamed_addr global i64 0, align 8
@SLJIT_SP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @function_check_dst], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @function_check_dst(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3) #0 {
%5 = load i32, ptr %0, align 8, !tbaa !6
%6 = icmp eq i32 %5, -1
br i1 %6, label %35, label %7
7: ; preds = %4
%8 = getelementptr inbounds i8, ptr %0, i64 4
%9 = load i32, ptr %8, align 4, !tbaa !12
%10 = icmp eq i32 %9, -1
br i1 %10, label %35, label %11
11: ; preds = %7
%12 = tail call i64 @FUNCTION_CHECK_IS_REG(i64 noundef %1) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %11
%15 = icmp ne i64 %3, 0
%16 = load i64, ptr @SLJIT_UNUSED, align 8
%17 = icmp eq i64 %16, %1
%18 = select i1 %15, i1 %17, i1 false
br i1 %18, label %19, label %22
19: ; preds = %14, %11
%20 = icmp eq i64 %2, 0
%21 = zext i1 %20 to i64
br label %35
22: ; preds = %14
%23 = load i32, ptr @SLJIT_SP, align 4, !tbaa !13
%24 = tail call i64 @SLJIT_MEM1(i32 noundef %23) #2
%25 = icmp eq i64 %24, %1
br i1 %25, label %26, label %33
26: ; preds = %22
%27 = icmp sgt i64 %2, -1
br i1 %27, label %28, label %35
28: ; preds = %26
%29 = getelementptr inbounds i8, ptr %0, i64 8
%30 = load i64, ptr %29, align 8, !tbaa !14
%31 = icmp sgt i64 %30, %2
%32 = zext i1 %31 to i64
br label %35
33: ; preds = %22
%34 = tail call i64 @function_check_src_mem(ptr noundef nonnull %0, i64 noundef %1, i64 noundef %2) #2
br label %35
35: ; preds = %26, %28, %4, %7, %33, %19
%36 = phi i64 [ %21, %19 ], [ %34, %33 ], [ 0, %7 ], [ 0, %4 ], [ 0, %26 ], [ %32, %28 ]
ret i64 %36
}
declare i64 @FUNCTION_CHECK_IS_REG(i64 noundef) local_unnamed_addr #1
declare i64 @SLJIT_MEM1(i32 noundef) local_unnamed_addr #1
declare i64 @function_check_src_mem(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sljit_compiler", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !11, i64 8}
|
php-src_ext_pcre_pcre2lib_sljit_extr_sljitLir.c_function_check_dst
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_sdio.c_brcmf_sdio_rxfail.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_sdio.c_brcmf_sdio_rxfail.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.brcmf_sdio = type { i32, %struct.TYPE_4__, %struct.TYPE_3__, ptr, ptr }
%struct.TYPE_4__ = type { i64 }
%struct.TYPE_3__ = type { i64, i32 }
@.str = private unnamed_addr constant [21 x i8] c"%sterminate frame%s\0A\00", align 1
@.str.1 = private unnamed_addr constant [16 x i8] c"abort command, \00", align 1
@.str.2 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.3 = private unnamed_addr constant [11 x i8] c", send NAK\00", align 1
@SBSDIO_FUNC1_FRAMECTRL = dso_local local_unnamed_addr global i32 0, align 4
@SFC_RF_TERM = dso_local local_unnamed_addr global i32 0, align 4
@SBSDIO_FUNC1_RFRAMEBCHI = dso_local local_unnamed_addr global i32 0, align 4
@SBSDIO_FUNC1_RFRAMEBCLO = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [39 x i8] c"count growing: last 0x%04x now 0x%04x\0A\00", align 1
@.str.5 = private unnamed_addr constant [33 x i8] c"count never zeroed: last 0x%04x\0A\00", align 1
@SDIO = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [26 x i8] c"flush took %d iterations\0A\00", align 1
@tosbmailbox = dso_local local_unnamed_addr global i32 0, align 4
@SMB_NAK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @brcmf_sdio_rxfail], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @brcmf_sdio_rxfail(ptr nocapture noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = alloca i32, align 4
%5 = getelementptr inbounds %struct.brcmf_sdio, ptr %0, i64 0, i32 3
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = getelementptr inbounds %struct.brcmf_sdio, ptr %0, i64 0, i32 4
%8 = load ptr, ptr %7, align 8, !tbaa !14
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%9 = icmp eq i32 %1, 0
%10 = select i1 %9, ptr @.str.2, ptr @.str.1
%11 = icmp eq i32 %2, 0
%12 = select i1 %11, ptr @.str.2, ptr @.str.3
%13 = tail call i32 (ptr, ...) @brcmf_err(ptr noundef nonnull @.str, ptr noundef nonnull %10, ptr noundef nonnull %12) #3
br i1 %9, label %18, label %14
14: ; preds = %3
%15 = load ptr, ptr %5, align 8, !tbaa !5
%16 = load i32, ptr %15, align 4, !tbaa !15
%17 = tail call i32 @brcmf_sdiod_abort(ptr noundef nonnull %15, i32 noundef %16) #3
br label %18
18: ; preds = %14, %3
%19 = load ptr, ptr %5, align 8, !tbaa !5
%20 = load i32, ptr @SBSDIO_FUNC1_FRAMECTRL, align 4, !tbaa !17
%21 = load i32, ptr @SFC_RF_TERM, align 4, !tbaa !17
%22 = call i32 @brcmf_sdiod_writeb(ptr noundef %19, i32 noundef %20, i32 noundef %21, ptr noundef nonnull %4) #3
%23 = getelementptr inbounds %struct.brcmf_sdio, ptr %0, i64 0, i32 2
%24 = load i64, ptr %23, align 8, !tbaa !18
%25 = add nsw i64 %24, 1
store i64 %25, ptr %23, align 8, !tbaa !18
br label %26
26: ; preds = %18, %50
%27 = phi i32 [ 65535, %18 ], [ %51, %50 ]
%28 = phi i32 [ 65535, %18 ], [ %47, %50 ]
%29 = load ptr, ptr %5, align 8, !tbaa !5
%30 = load i32, ptr @SBSDIO_FUNC1_RFRAMEBCHI, align 4, !tbaa !17
%31 = call i32 @brcmf_sdiod_readb(ptr noundef %29, i32 noundef %30, ptr noundef nonnull %4) #3
%32 = load ptr, ptr %5, align 8, !tbaa !5
%33 = load i32, ptr @SBSDIO_FUNC1_RFRAMEBCLO, align 4, !tbaa !17
%34 = call i32 @brcmf_sdiod_readb(ptr noundef %32, i32 noundef %33, ptr noundef nonnull %4) #3
%35 = load i64, ptr %23, align 8, !tbaa !18
%36 = add nsw i64 %35, 2
store i64 %36, ptr %23, align 8, !tbaa !18
%37 = icmp eq i32 %31, 0
%38 = icmp eq i32 %34, 0
%39 = select i1 %37, i1 %38, i1 false
br i1 %39, label %55, label %40
40: ; preds = %26
%41 = ashr i32 %28, 8
%42 = icmp sgt i32 %31, %41
%43 = and i32 %28, 255
%44 = icmp sgt i32 %34, %43
%45 = select i1 %42, i1 %44, i1 false
%46 = shl i32 %31, 8
%47 = add nsw i32 %34, %46
br i1 %45, label %48, label %50
48: ; preds = %40
%49 = call i32 (ptr, ...) @brcmf_err(ptr noundef nonnull @.str.4, i32 noundef %28, i32 noundef %47) #3
br label %50
50: ; preds = %40, %48
%51 = add nsw i32 %27, -1
%52 = icmp ugt i32 %27, 1
br i1 %52, label %26, label %53, !llvm.loop !19
53: ; preds = %50
%54 = call i32 (ptr, ...) @brcmf_err(ptr noundef nonnull @.str.5, i32 noundef %47) #3
br label %59
55: ; preds = %26
%56 = load i32, ptr @SDIO, align 4, !tbaa !17
%57 = sub nsw i32 65535, %27
%58 = call i32 @brcmf_dbg(i32 noundef %56, ptr noundef nonnull @.str.6, i32 noundef %57) #3
br label %59
59: ; preds = %55, %53
br i1 %11, label %75, label %60
60: ; preds = %59
%61 = getelementptr inbounds %struct.brcmf_sdio, ptr %0, i64 0, i32 2, i32 1
%62 = load i32, ptr %61, align 8, !tbaa !21
%63 = add nsw i32 %62, 1
store i32 %63, ptr %61, align 8, !tbaa !21
%64 = load i64, ptr %8, align 8, !tbaa !22
%65 = load i32, ptr @tosbmailbox, align 4, !tbaa !17
%66 = call i64 @SD_REG(i32 noundef %65) #3
%67 = add nsw i64 %66, %64
%68 = load i32, ptr @SMB_NAK, align 4, !tbaa !17
%69 = call i32 @brcmf_sdiod_writel(ptr noundef %6, i64 noundef %67, i32 noundef %68, ptr noundef nonnull %4) #3
%70 = load i64, ptr %23, align 8, !tbaa !18
%71 = add nsw i64 %70, 1
store i64 %71, ptr %23, align 8, !tbaa !18
%72 = load i32, ptr %4, align 4, !tbaa !17
%73 = icmp eq i32 %72, 0
br i1 %73, label %74, label %75
74: ; preds = %60
store i32 1, ptr %0, align 8, !tbaa !24
br label %75
75: ; preds = %60, %74, %59
%76 = getelementptr inbounds %struct.brcmf_sdio, ptr %0, i64 0, i32 1
store i64 0, ptr %76, align 8, !tbaa !25
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @brcmf_err(ptr noundef, ...) local_unnamed_addr #2
declare i32 @brcmf_sdiod_abort(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @brcmf_sdiod_writeb(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @brcmf_sdiod_readb(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @brcmf_dbg(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @brcmf_sdiod_writel(ptr noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @SD_REG(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !13, i64 32}
!6 = !{!"brcmf_sdio", !7, i64 0, !10, i64 8, !12, i64 16, !13, i64 32, !13, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_4__", !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!"TYPE_3__", !11, i64 0, !7, i64 8}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!6, !13, i64 40}
!15 = !{!16, !7, i64 0}
!16 = !{!"brcmf_sdio_dev", !7, i64 0}
!17 = !{!7, !7, i64 0}
!18 = !{!6, !11, i64 16}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!6, !7, i64 24}
!22 = !{!23, !11, i64 0}
!23 = !{!"brcmf_core", !11, i64 0}
!24 = !{!6, !7, i64 0}
!25 = !{!6, !11, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_sdio.c_brcmf_sdio_rxfail.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_sdio.c_brcmf_sdio_rxfail.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [21 x i8] c"%sterminate frame%s\0A\00", align 1
@.str.1 = private unnamed_addr constant [16 x i8] c"abort command, \00", align 1
@.str.2 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.3 = private unnamed_addr constant [11 x i8] c", send NAK\00", align 1
@SBSDIO_FUNC1_FRAMECTRL = common local_unnamed_addr global i32 0, align 4
@SFC_RF_TERM = common local_unnamed_addr global i32 0, align 4
@SBSDIO_FUNC1_RFRAMEBCHI = common local_unnamed_addr global i32 0, align 4
@SBSDIO_FUNC1_RFRAMEBCLO = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [39 x i8] c"count growing: last 0x%04x now 0x%04x\0A\00", align 1
@.str.5 = private unnamed_addr constant [33 x i8] c"count never zeroed: last 0x%04x\0A\00", align 1
@SDIO = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [26 x i8] c"flush took %d iterations\0A\00", align 1
@tosbmailbox = common local_unnamed_addr global i32 0, align 4
@SMB_NAK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @brcmf_sdio_rxfail], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @brcmf_sdio_rxfail(ptr nocapture noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = alloca i32, align 4
%5 = getelementptr inbounds i8, ptr %0, i64 32
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = getelementptr inbounds i8, ptr %0, i64 40
%8 = load ptr, ptr %7, align 8, !tbaa !15
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%9 = icmp eq i32 %1, 0
%10 = select i1 %9, ptr @.str.2, ptr @.str.1
%11 = icmp eq i32 %2, 0
%12 = select i1 %11, ptr @.str.2, ptr @.str.3
%13 = tail call i32 (ptr, ...) @brcmf_err(ptr noundef nonnull @.str, ptr noundef nonnull %10, ptr noundef nonnull %12) #3
br i1 %9, label %18, label %14
14: ; preds = %3
%15 = load ptr, ptr %5, align 8, !tbaa !6
%16 = load i32, ptr %15, align 4, !tbaa !16
%17 = tail call i32 @brcmf_sdiod_abort(ptr noundef nonnull %15, i32 noundef %16) #3
br label %18
18: ; preds = %14, %3
%19 = load ptr, ptr %5, align 8, !tbaa !6
%20 = load i32, ptr @SBSDIO_FUNC1_FRAMECTRL, align 4, !tbaa !18
%21 = load i32, ptr @SFC_RF_TERM, align 4, !tbaa !18
%22 = call i32 @brcmf_sdiod_writeb(ptr noundef %19, i32 noundef %20, i32 noundef %21, ptr noundef nonnull %4) #3
%23 = getelementptr inbounds i8, ptr %0, i64 16
%24 = load i64, ptr %23, align 8, !tbaa !19
%25 = add nsw i64 %24, 1
store i64 %25, ptr %23, align 8, !tbaa !19
br label %26
26: ; preds = %18, %50
%27 = phi i32 [ 65535, %18 ], [ %51, %50 ]
%28 = phi i32 [ 65535, %18 ], [ %47, %50 ]
%29 = load ptr, ptr %5, align 8, !tbaa !6
%30 = load i32, ptr @SBSDIO_FUNC1_RFRAMEBCHI, align 4, !tbaa !18
%31 = call i32 @brcmf_sdiod_readb(ptr noundef %29, i32 noundef %30, ptr noundef nonnull %4) #3
%32 = load ptr, ptr %5, align 8, !tbaa !6
%33 = load i32, ptr @SBSDIO_FUNC1_RFRAMEBCLO, align 4, !tbaa !18
%34 = call i32 @brcmf_sdiod_readb(ptr noundef %32, i32 noundef %33, ptr noundef nonnull %4) #3
%35 = load i64, ptr %23, align 8, !tbaa !19
%36 = add nsw i64 %35, 2
store i64 %36, ptr %23, align 8, !tbaa !19
%37 = icmp eq i32 %31, 0
%38 = icmp eq i32 %34, 0
%39 = select i1 %37, i1 %38, i1 false
br i1 %39, label %55, label %40
40: ; preds = %26
%41 = ashr i32 %28, 8
%42 = icmp sgt i32 %31, %41
%43 = and i32 %28, 255
%44 = icmp sgt i32 %34, %43
%45 = select i1 %42, i1 %44, i1 false
%46 = shl i32 %31, 8
%47 = add nsw i32 %34, %46
br i1 %45, label %48, label %50
48: ; preds = %40
%49 = call i32 (ptr, ...) @brcmf_err(ptr noundef nonnull @.str.4, i32 noundef %28, i32 noundef %47) #3
br label %50
50: ; preds = %40, %48
%51 = add nsw i32 %27, -1
%52 = icmp ugt i32 %27, 1
br i1 %52, label %26, label %53, !llvm.loop !20
53: ; preds = %50
%54 = call i32 (ptr, ...) @brcmf_err(ptr noundef nonnull @.str.5, i32 noundef %47) #3
br label %59
55: ; preds = %26
%56 = load i32, ptr @SDIO, align 4, !tbaa !18
%57 = sub nsw i32 65535, %27
%58 = call i32 @brcmf_dbg(i32 noundef %56, ptr noundef nonnull @.str.6, i32 noundef %57) #3
br label %59
59: ; preds = %55, %53
br i1 %11, label %75, label %60
60: ; preds = %59
%61 = getelementptr inbounds i8, ptr %0, i64 24
%62 = load i32, ptr %61, align 8, !tbaa !22
%63 = add nsw i32 %62, 1
store i32 %63, ptr %61, align 8, !tbaa !22
%64 = load i64, ptr %8, align 8, !tbaa !23
%65 = load i32, ptr @tosbmailbox, align 4, !tbaa !18
%66 = call i64 @SD_REG(i32 noundef %65) #3
%67 = add nsw i64 %66, %64
%68 = load i32, ptr @SMB_NAK, align 4, !tbaa !18
%69 = call i32 @brcmf_sdiod_writel(ptr noundef %6, i64 noundef %67, i32 noundef %68, ptr noundef nonnull %4) #3
%70 = load i64, ptr %23, align 8, !tbaa !19
%71 = add nsw i64 %70, 1
store i64 %71, ptr %23, align 8, !tbaa !19
%72 = load i32, ptr %4, align 4, !tbaa !18
%73 = icmp eq i32 %72, 0
br i1 %73, label %74, label %75
74: ; preds = %60
store i32 1, ptr %0, align 8, !tbaa !25
br label %75
75: ; preds = %60, %74, %59
%76 = getelementptr inbounds i8, ptr %0, i64 8
store i64 0, ptr %76, align 8, !tbaa !26
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @brcmf_err(ptr noundef, ...) local_unnamed_addr #2
declare i32 @brcmf_sdiod_abort(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @brcmf_sdiod_writeb(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @brcmf_sdiod_readb(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @brcmf_dbg(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @brcmf_sdiod_writel(ptr noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @SD_REG(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !14, i64 32}
!7 = !{!"brcmf_sdio", !8, i64 0, !11, i64 8, !13, i64 16, !14, i64 32, !14, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!"TYPE_3__", !12, i64 0, !8, i64 8}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!7, !14, i64 40}
!16 = !{!17, !8, i64 0}
!17 = !{!"brcmf_sdio_dev", !8, i64 0}
!18 = !{!8, !8, i64 0}
!19 = !{!7, !12, i64 16}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!7, !8, i64 24}
!23 = !{!24, !12, i64 0}
!24 = !{!"brcmf_core", !12, i64 0}
!25 = !{!7, !8, i64 0}
!26 = !{!7, !12, i64 8}
|
linux_drivers_net_wireless_broadcom_brcm80211_brcmfmac_extr_sdio.c_brcmf_sdio_rxfail
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_alpha-tdep.c_alpha_unwind_dummy_id.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_alpha-tdep.c_alpha_unwind_dummy_id.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ALPHA_SP_REGNUM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @alpha_unwind_dummy_id], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @alpha_unwind_dummy_id(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i32, ptr @ALPHA_SP_REGNUM, align 4, !tbaa !5
%5 = call i32 @frame_unwind_unsigned_register(ptr noundef %1, i32 noundef %4, ptr noundef nonnull %3) #3
%6 = load i32, ptr %3, align 4, !tbaa !5
%7 = call i32 @frame_pc_unwind(ptr noundef %1) #3
%8 = call i32 @frame_id_build(i32 noundef %6, i32 noundef %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %8
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @frame_unwind_unsigned_register(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @frame_id_build(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @frame_pc_unwind(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_alpha-tdep.c_alpha_unwind_dummy_id.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_alpha-tdep.c_alpha_unwind_dummy_id.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ALPHA_SP_REGNUM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @alpha_unwind_dummy_id], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @alpha_unwind_dummy_id(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i32, ptr @ALPHA_SP_REGNUM, align 4, !tbaa !6
%5 = call i32 @frame_unwind_unsigned_register(ptr noundef %1, i32 noundef %4, ptr noundef nonnull %3) #3
%6 = load i32, ptr %3, align 4, !tbaa !6
%7 = call i32 @frame_pc_unwind(ptr noundef %1) #3
%8 = call i32 @frame_id_build(i32 noundef %6, i32 noundef %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %8
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @frame_unwind_unsigned_register(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @frame_id_build(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @frame_pc_unwind(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_contrib_gdb_gdb_extr_alpha-tdep.c_alpha_unwind_dummy_id
|
; ModuleID = 'AnghaBench/FFmpeg/libavfilter/extr_af_channelsplit.c_query_formats.c'
source_filename = "AnghaBench/FFmpeg/libavfilter/extr_af_channelsplit.c_query_formats.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { i32, ptr, ptr, ptr }
%struct.TYPE_10__ = type { ptr, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @query_formats], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @query_formats(ptr noundef %0) #0 {
%2 = alloca ptr, align 8
%3 = alloca ptr, align 8
%4 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 3
%5 = load ptr, ptr %4, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
store ptr null, ptr %2, align 8, !tbaa !11
%6 = tail call i32 (...) @ff_planar_sample_fmts() #3
%7 = tail call i32 @ff_set_common_formats(ptr noundef %0, i32 noundef %6) #3
%8 = icmp slt i32 %7, 0
br i1 %8, label %52, label %9
9: ; preds = %1
%10 = tail call i32 (...) @ff_all_samplerates() #3
%11 = tail call i32 @ff_set_common_samplerates(ptr noundef nonnull %0, i32 noundef %10) #3
%12 = icmp slt i32 %11, 0
br i1 %12, label %52, label %13
13: ; preds = %9
%14 = getelementptr inbounds %struct.TYPE_10__, ptr %5, i64 0, i32 1
%15 = load i32, ptr %14, align 8, !tbaa !12
%16 = call i32 @ff_add_channel_layout(ptr noundef nonnull %2, i32 noundef %15) #3
%17 = icmp slt i32 %16, 0
br i1 %17, label %52, label %18
18: ; preds = %13
%19 = load ptr, ptr %2, align 8, !tbaa !11
%20 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 2
%21 = load ptr, ptr %20, align 8, !tbaa !14
%22 = load ptr, ptr %21, align 8, !tbaa !11
%23 = call i32 @ff_channel_layouts_ref(ptr noundef %19, ptr noundef %22) #3
%24 = icmp slt i32 %23, 0
br i1 %24, label %52, label %25
25: ; preds = %18
%26 = load i32, ptr %0, align 8, !tbaa !15
%27 = icmp sgt i32 %26, 0
br i1 %27, label %28, label %52
28: ; preds = %25
%29 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 1
br label %35
30: ; preds = %45
%31 = add nuw nsw i64 %36, 1
%32 = load i32, ptr %0, align 8, !tbaa !15
%33 = sext i32 %32 to i64
%34 = icmp slt i64 %31, %33
br i1 %34, label %35, label %52, !llvm.loop !16
35: ; preds = %28, %30
%36 = phi i64 [ 0, %28 ], [ %31, %30 ]
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
store ptr null, ptr %3, align 8, !tbaa !11
%37 = load i32, ptr %14, align 8, !tbaa !12
%38 = load ptr, ptr %5, align 8, !tbaa !18
%39 = getelementptr inbounds i32, ptr %38, i64 %36
%40 = load i32, ptr %39, align 4, !tbaa !19
%41 = call i32 @av_channel_layout_extract_channel(i32 noundef %37, i32 noundef %40) #3
%42 = call i32 @ff_add_channel_layout(ptr noundef nonnull %3, i32 noundef %41) #3
%43 = icmp slt i32 %42, 0
br i1 %43, label %44, label %45
44: ; preds = %35
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
br label %52
45: ; preds = %35
%46 = load ptr, ptr %3, align 8, !tbaa !11
%47 = load ptr, ptr %29, align 8, !tbaa !20
%48 = getelementptr inbounds ptr, ptr %47, i64 %36
%49 = load ptr, ptr %48, align 8, !tbaa !11
%50 = call i32 @ff_channel_layouts_ref(ptr noundef %46, ptr noundef %49) #3
%51 = icmp sgt i32 %50, -1
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
br i1 %51, label %30, label %52
52: ; preds = %45, %30, %25, %44, %13, %18, %1, %9
%53 = phi i32 [ %7, %1 ], [ %11, %9 ], [ %16, %13 ], [ %23, %18 ], [ %42, %44 ], [ 0, %25 ], [ %50, %45 ], [ 0, %30 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %53
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ff_set_common_formats(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ff_planar_sample_fmts(...) local_unnamed_addr #2
declare i32 @ff_set_common_samplerates(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ff_all_samplerates(...) local_unnamed_addr #2
declare i32 @ff_add_channel_layout(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ff_channel_layouts_ref(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @av_channel_layout_extract_channel(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"TYPE_11__", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!13, !7, i64 8}
!13 = !{!"TYPE_10__", !10, i64 0, !7, i64 8}
!14 = !{!6, !10, i64 16}
!15 = !{!6, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!13, !10, i64 0}
!19 = !{!7, !7, i64 0}
!20 = !{!6, !10, i64 8}
|
; ModuleID = 'AnghaBench/FFmpeg/libavfilter/extr_af_channelsplit.c_query_formats.c'
source_filename = "AnghaBench/FFmpeg/libavfilter/extr_af_channelsplit.c_query_formats.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @query_formats], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @query_formats(ptr noundef %0) #0 {
%2 = alloca ptr, align 8
%3 = alloca ptr, align 8
%4 = getelementptr inbounds i8, ptr %0, i64 24
%5 = load ptr, ptr %4, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
store ptr null, ptr %2, align 8, !tbaa !12
%6 = tail call i32 @ff_planar_sample_fmts() #3
%7 = tail call i32 @ff_set_common_formats(ptr noundef %0, i32 noundef %6) #3
%8 = icmp slt i32 %7, 0
br i1 %8, label %52, label %9
9: ; preds = %1
%10 = tail call i32 @ff_all_samplerates() #3
%11 = tail call i32 @ff_set_common_samplerates(ptr noundef nonnull %0, i32 noundef %10) #3
%12 = icmp slt i32 %11, 0
br i1 %12, label %52, label %13
13: ; preds = %9
%14 = getelementptr inbounds i8, ptr %5, i64 8
%15 = load i32, ptr %14, align 8, !tbaa !13
%16 = call i32 @ff_add_channel_layout(ptr noundef nonnull %2, i32 noundef %15) #3
%17 = icmp slt i32 %16, 0
br i1 %17, label %52, label %18
18: ; preds = %13
%19 = load ptr, ptr %2, align 8, !tbaa !12
%20 = getelementptr inbounds i8, ptr %0, i64 16
%21 = load ptr, ptr %20, align 8, !tbaa !15
%22 = load ptr, ptr %21, align 8, !tbaa !12
%23 = call i32 @ff_channel_layouts_ref(ptr noundef %19, ptr noundef %22) #3
%24 = icmp slt i32 %23, 0
br i1 %24, label %52, label %25
25: ; preds = %18
%26 = load i32, ptr %0, align 8, !tbaa !16
%27 = icmp sgt i32 %26, 0
br i1 %27, label %28, label %52
28: ; preds = %25
%29 = getelementptr inbounds i8, ptr %0, i64 8
br label %35
30: ; preds = %45
%31 = add nuw nsw i64 %36, 1
%32 = load i32, ptr %0, align 8, !tbaa !16
%33 = sext i32 %32 to i64
%34 = icmp slt i64 %31, %33
br i1 %34, label %35, label %52, !llvm.loop !17
35: ; preds = %28, %30
%36 = phi i64 [ 0, %28 ], [ %31, %30 ]
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
store ptr null, ptr %3, align 8, !tbaa !12
%37 = load i32, ptr %14, align 8, !tbaa !13
%38 = load ptr, ptr %5, align 8, !tbaa !19
%39 = getelementptr inbounds i32, ptr %38, i64 %36
%40 = load i32, ptr %39, align 4, !tbaa !20
%41 = call i32 @av_channel_layout_extract_channel(i32 noundef %37, i32 noundef %40) #3
%42 = call i32 @ff_add_channel_layout(ptr noundef nonnull %3, i32 noundef %41) #3
%43 = icmp slt i32 %42, 0
br i1 %43, label %44, label %45
44: ; preds = %35
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
br label %52
45: ; preds = %35
%46 = load ptr, ptr %3, align 8, !tbaa !12
%47 = load ptr, ptr %29, align 8, !tbaa !21
%48 = getelementptr inbounds ptr, ptr %47, i64 %36
%49 = load ptr, ptr %48, align 8, !tbaa !12
%50 = call i32 @ff_channel_layouts_ref(ptr noundef %46, ptr noundef %49) #3
%51 = icmp sgt i32 %50, -1
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
br i1 %51, label %30, label %52
52: ; preds = %45, %30, %25, %44, %13, %18, %1, %9
%53 = phi i32 [ %7, %1 ], [ %11, %9 ], [ %16, %13 ], [ %23, %18 ], [ %42, %44 ], [ 0, %25 ], [ %50, %45 ], [ 0, %30 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %53
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ff_set_common_formats(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ff_planar_sample_fmts(...) local_unnamed_addr #2
declare i32 @ff_set_common_samplerates(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ff_all_samplerates(...) local_unnamed_addr #2
declare i32 @ff_add_channel_layout(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ff_channel_layouts_ref(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @av_channel_layout_extract_channel(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 24}
!7 = !{!"TYPE_11__", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !8, i64 8}
!14 = !{!"TYPE_10__", !11, i64 0, !8, i64 8}
!15 = !{!7, !11, i64 16}
!16 = !{!7, !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!14, !11, i64 0}
!20 = !{!8, !8, i64 0}
!21 = !{!7, !11, i64 8}
|
FFmpeg_libavfilter_extr_af_channelsplit.c_query_formats
|
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/tools/ctf/cvt/extr_input.c_read_ctf.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/tools/ctf/cvt/extr_input.c_read_ctf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @read_ctf(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5) local_unnamed_addr #0 {
%7 = icmp sgt i32 %1, 0
br i1 %7, label %8, label %21
8: ; preds = %6
%9 = zext nneg i32 %1 to i64
br label %10
10: ; preds = %8, %17
%11 = phi i64 [ 0, %8 ], [ %19, %17 ]
%12 = phi i32 [ 0, %8 ], [ %18, %17 ]
%13 = getelementptr inbounds ptr, ptr %0, i64 %11
%14 = load ptr, ptr %13, align 8, !tbaa !5
%15 = tail call i32 @read_ctf_common(ptr noundef %14, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5) #2
%16 = icmp slt i32 %15, 0
br i1 %16, label %21, label %17
17: ; preds = %10
%18 = add nuw nsw i32 %15, %12
%19 = add nuw nsw i64 %11, 1
%20 = icmp eq i64 %19, %9
br i1 %20, label %21, label %10, !llvm.loop !9
21: ; preds = %10, %17, %6
%22 = phi i32 [ 0, %6 ], [ %18, %17 ], [ %15, %10 ]
ret i32 %22
}
declare i32 @read_ctf_common(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/tools/ctf/cvt/extr_input.c_read_ctf.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/tools/ctf/cvt/extr_input.c_read_ctf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @read_ctf(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5) local_unnamed_addr #0 {
%7 = icmp sgt i32 %1, 0
br i1 %7, label %8, label %21
8: ; preds = %6
%9 = zext nneg i32 %1 to i64
br label %10
10: ; preds = %8, %17
%11 = phi i64 [ 0, %8 ], [ %19, %17 ]
%12 = phi i32 [ 0, %8 ], [ %18, %17 ]
%13 = getelementptr inbounds ptr, ptr %0, i64 %11
%14 = load ptr, ptr %13, align 8, !tbaa !6
%15 = tail call i32 @read_ctf_common(ptr noundef %14, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5) #2
%16 = icmp slt i32 %15, 0
br i1 %16, label %21, label %17
17: ; preds = %10
%18 = add nuw nsw i32 %15, %12
%19 = add nuw nsw i64 %11, 1
%20 = icmp eq i64 %19, %9
br i1 %20, label %21, label %10, !llvm.loop !10
21: ; preds = %10, %17, %6
%22 = phi i32 [ 0, %6 ], [ %18, %17 ], [ %15, %10 ]
ret i32 %22
}
declare i32 @read_ctf_common(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
|
freebsd_cddl_contrib_opensolaris_tools_ctf_cvt_extr_input.c_read_ctf
|
; ModuleID = 'AnghaBench/linux/drivers/staging/comedi/drivers/extr_icp_multi.c_icp_multi_do_insn_bits.c'
source_filename = "AnghaBench/linux/drivers/staging/comedi/drivers/extr_icp_multi.c_icp_multi_do_insn_bits.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ICP_MULTI_DO = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @icp_multi_do_insn_bits], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @icp_multi_do_insn_bits(ptr nocapture noundef readonly %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr noundef %3) #0 {
%5 = tail call i64 @comedi_dio_update_state(ptr noundef %1, ptr noundef %3) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %4
%8 = load i32, ptr %1, align 4, !tbaa !5
%9 = load i64, ptr %0, align 8, !tbaa !10
%10 = load i64, ptr @ICP_MULTI_DO, align 8, !tbaa !13
%11 = add nsw i64 %10, %9
%12 = tail call i32 @writew(i32 noundef %8, i64 noundef %11) #2
br label %13
13: ; preds = %7, %4
%14 = load i32, ptr %1, align 4, !tbaa !5
%15 = getelementptr inbounds i32, ptr %3, i64 1
store i32 %14, ptr %15, align 4, !tbaa !14
%16 = load i32, ptr %2, align 4, !tbaa !15
ret i32 %16
}
declare i64 @comedi_dio_update_state(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @writew(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"comedi_subdevice", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"comedi_device", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"comedi_insn", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/comedi/drivers/extr_icp_multi.c_icp_multi_do_insn_bits.c'
source_filename = "AnghaBench/linux/drivers/staging/comedi/drivers/extr_icp_multi.c_icp_multi_do_insn_bits.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ICP_MULTI_DO = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @icp_multi_do_insn_bits], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @icp_multi_do_insn_bits(ptr nocapture noundef readonly %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr noundef %3) #0 {
%5 = tail call i64 @comedi_dio_update_state(ptr noundef %1, ptr noundef %3) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %4
%8 = load i32, ptr %1, align 4, !tbaa !6
%9 = load i64, ptr %0, align 8, !tbaa !11
%10 = load i64, ptr @ICP_MULTI_DO, align 8, !tbaa !14
%11 = add nsw i64 %10, %9
%12 = tail call i32 @writew(i32 noundef %8, i64 noundef %11) #2
br label %13
13: ; preds = %7, %4
%14 = load i32, ptr %1, align 4, !tbaa !6
%15 = getelementptr inbounds i8, ptr %3, i64 4
store i32 %14, ptr %15, align 4, !tbaa !15
%16 = load i32, ptr %2, align 4, !tbaa !16
ret i32 %16
}
declare i64 @comedi_dio_update_state(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @writew(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"comedi_subdevice", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"comedi_device", !13, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!17, !8, i64 0}
!17 = !{!"comedi_insn", !8, i64 0}
|
linux_drivers_staging_comedi_drivers_extr_icp_multi.c_icp_multi_do_insn_bits
|
; ModuleID = 'AnghaBench/linux/drivers/clk/extr_clk-aspeed.c_aspeed_clk_disable.c'
source_filename = "AnghaBench/linux/drivers/clk/extr_clk-aspeed.c_aspeed_clk_disable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.aspeed_clk_gate = type { i64, i32, i32, i32 }
@CLK_GATE_SET_TO_DISABLE = dso_local local_unnamed_addr global i64 0, align 8
@ASPEED_CLK_STOP_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @aspeed_clk_disable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @aspeed_clk_disable(ptr noundef %0) #0 {
%2 = tail call ptr @to_aspeed_clk_gate(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.aspeed_clk_gate, ptr %2, i64 0, i32 3
%4 = load i32, ptr %3, align 8, !tbaa !5
%5 = tail call i32 @BIT(i32 noundef %4) #2
%6 = getelementptr inbounds %struct.aspeed_clk_gate, ptr %2, i64 0, i32 1
%7 = load i32, ptr %6, align 8, !tbaa !11
%8 = tail call i32 @spin_lock_irqsave(i32 noundef %7, i64 noundef undef) #2
%9 = load i64, ptr %2, align 8, !tbaa !12
%10 = load i64, ptr @CLK_GATE_SET_TO_DISABLE, align 8, !tbaa !13
%11 = and i64 %10, %9
%12 = icmp eq i64 %11, 0
%13 = select i1 %12, i32 0, i32 %5
%14 = getelementptr inbounds %struct.aspeed_clk_gate, ptr %2, i64 0, i32 2
%15 = load i32, ptr %14, align 4, !tbaa !14
%16 = load i32, ptr @ASPEED_CLK_STOP_CTRL, align 4, !tbaa !15
%17 = tail call i32 @regmap_update_bits(i32 noundef %15, i32 noundef %16, i32 noundef %5, i32 noundef %13) #2
%18 = load i32, ptr %6, align 8, !tbaa !11
%19 = tail call i32 @spin_unlock_irqrestore(i32 noundef %18, i64 noundef undef) #2
ret void
}
declare ptr @to_aspeed_clk_gate(ptr noundef) local_unnamed_addr #1
declare i32 @BIT(i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"aspeed_clk_gate", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !10, i64 12}
!15 = !{!10, !10, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/clk/extr_clk-aspeed.c_aspeed_clk_disable.c'
source_filename = "AnghaBench/linux/drivers/clk/extr_clk-aspeed.c_aspeed_clk_disable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CLK_GATE_SET_TO_DISABLE = common local_unnamed_addr global i64 0, align 8
@ASPEED_CLK_STOP_CTRL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @aspeed_clk_disable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @aspeed_clk_disable(ptr noundef %0) #0 {
%2 = tail call ptr @to_aspeed_clk_gate(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 16
%4 = load i32, ptr %3, align 8, !tbaa !6
%5 = tail call i32 @BIT(i32 noundef %4) #2
%6 = getelementptr inbounds i8, ptr %2, i64 8
%7 = load i32, ptr %6, align 8, !tbaa !12
%8 = tail call i32 @spin_lock_irqsave(i32 noundef %7, i64 noundef undef) #2
%9 = load i64, ptr %2, align 8, !tbaa !13
%10 = load i64, ptr @CLK_GATE_SET_TO_DISABLE, align 8, !tbaa !14
%11 = and i64 %10, %9
%12 = icmp eq i64 %11, 0
%13 = select i1 %12, i32 0, i32 %5
%14 = getelementptr inbounds i8, ptr %2, i64 12
%15 = load i32, ptr %14, align 4, !tbaa !15
%16 = load i32, ptr @ASPEED_CLK_STOP_CTRL, align 4, !tbaa !16
%17 = tail call i32 @regmap_update_bits(i32 noundef %15, i32 noundef %16, i32 noundef %5, i32 noundef %13) #2
%18 = load i32, ptr %6, align 8, !tbaa !12
%19 = tail call i32 @spin_unlock_irqrestore(i32 noundef %18, i64 noundef undef) #2
ret void
}
declare ptr @to_aspeed_clk_gate(ptr noundef) local_unnamed_addr #1
declare i32 @BIT(i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"aspeed_clk_gate", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!7, !8, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !11, i64 12}
!16 = !{!11, !11, i64 0}
|
linux_drivers_clk_extr_clk-aspeed.c_aspeed_clk_disable
|
; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-uniphier.c_uniphier_spi_prepare_transfer_hardware.c'
source_filename = "AnghaBench/linux/drivers/spi/extr_spi-uniphier.c_uniphier_spi_prepare_transfer_hardware.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SSI_CTL_EN = dso_local local_unnamed_addr global i32 0, align 4
@SSI_CTL = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @uniphier_spi_prepare_transfer_hardware], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @uniphier_spi_prepare_transfer_hardware(ptr noundef %0) #0 {
%2 = tail call ptr @spi_master_get_devdata(ptr noundef %0) #2
%3 = load i32, ptr @SSI_CTL_EN, align 4, !tbaa !5
%4 = load i64, ptr %2, align 8, !tbaa !9
%5 = load i64, ptr @SSI_CTL, align 8, !tbaa !12
%6 = add nsw i64 %5, %4
%7 = tail call i32 @writel(i32 noundef %3, i64 noundef %6) #2
ret i32 0
}
declare ptr @spi_master_get_devdata(ptr noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"uniphier_spi_priv", !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!11, !11, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-uniphier.c_uniphier_spi_prepare_transfer_hardware.c'
source_filename = "AnghaBench/linux/drivers/spi/extr_spi-uniphier.c_uniphier_spi_prepare_transfer_hardware.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SSI_CTL_EN = common local_unnamed_addr global i32 0, align 4
@SSI_CTL = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @uniphier_spi_prepare_transfer_hardware], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @uniphier_spi_prepare_transfer_hardware(ptr noundef %0) #0 {
%2 = tail call ptr @spi_master_get_devdata(ptr noundef %0) #2
%3 = load i32, ptr @SSI_CTL_EN, align 4, !tbaa !6
%4 = load i64, ptr %2, align 8, !tbaa !10
%5 = load i64, ptr @SSI_CTL, align 8, !tbaa !13
%6 = add nsw i64 %5, %4
%7 = tail call i32 @writel(i32 noundef %3, i64 noundef %6) #2
ret i32 0
}
declare ptr @spi_master_get_devdata(ptr noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"uniphier_spi_priv", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
|
linux_drivers_spi_extr_spi-uniphier.c_uniphier_spi_prepare_transfer_hardware
|
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dsl_dir.c_dsl_dir_set_quota_check.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dsl_dir.c_dsl_dir_set_quota_check.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { i32, i32, i32 }
%struct.TYPE_12__ = type { i64, i64 }
@FTAG = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"quota\00", align 1
@ENOSPC = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dsl_dir_set_quota_check], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dsl_dir_set_quota_check(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
%4 = alloca i64, align 8
%5 = tail call ptr @dmu_tx_pool(ptr noundef %1) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%6 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 2
%7 = load i32, ptr %6, align 4, !tbaa !5
%8 = load i32, ptr @FTAG, align 4, !tbaa !10
%9 = call i32 @dsl_dataset_hold(ptr noundef %5, i32 noundef %7, i32 noundef %8, ptr noundef nonnull %3) #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %65
11: ; preds = %2
%12 = load ptr, ptr %3, align 8, !tbaa !11
%13 = load ptr, ptr %12, align 8, !tbaa !13
%14 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 1
%15 = load i32, ptr %14, align 4, !tbaa !15
%16 = load i32, ptr %0, align 4, !tbaa !16
%17 = call i32 @dsl_prop_predict(ptr noundef %13, ptr noundef nonnull @.str, i32 noundef %15, i32 noundef %16, ptr noundef nonnull %4) #3
%18 = icmp eq i32 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %11
%20 = load ptr, ptr %3, align 8, !tbaa !11
br label %60
21: ; preds = %11
%22 = load i64, ptr %4, align 8, !tbaa !17
%23 = icmp eq i64 %22, 0
%24 = load ptr, ptr %3, align 8, !tbaa !11
br i1 %23, label %60, label %25
25: ; preds = %21
%26 = load ptr, ptr %24, align 8, !tbaa !13
%27 = call i32 @mutex_enter(ptr noundef %26) #3
%28 = load ptr, ptr %3, align 8, !tbaa !11
%29 = load ptr, ptr %28, align 8, !tbaa !13
%30 = call i64 @dsl_dir_space_towrite(ptr noundef %29) #3
%31 = call i64 @dmu_tx_is_syncing(ptr noundef %1) #3
%32 = icmp ne i64 %31, 0
%33 = icmp eq i64 %30, 0
%34 = select i1 %32, i1 true, i1 %33
br i1 %34, label %35, label %54
35: ; preds = %25
%36 = load i64, ptr %4, align 8, !tbaa !17
%37 = load ptr, ptr %3, align 8, !tbaa !11
%38 = load ptr, ptr %37, align 8, !tbaa !13
%39 = call ptr @dsl_dir_phys(ptr noundef %38) #3
%40 = load i64, ptr %39, align 8, !tbaa !19
%41 = icmp slt i64 %36, %40
br i1 %41, label %51, label %42
42: ; preds = %35
%43 = load i64, ptr %4, align 8, !tbaa !17
%44 = load ptr, ptr %3, align 8, !tbaa !11
%45 = load ptr, ptr %44, align 8, !tbaa !13
%46 = call ptr @dsl_dir_phys(ptr noundef %45) #3
%47 = getelementptr inbounds %struct.TYPE_12__, ptr %46, i64 0, i32 1
%48 = load i64, ptr %47, align 8, !tbaa !21
%49 = add nsw i64 %48, %30
%50 = icmp slt i64 %43, %49
br i1 %50, label %51, label %54
51: ; preds = %42, %35
%52 = load i32, ptr @ENOSPC, align 4, !tbaa !10
%53 = call i32 @SET_ERROR(i32 noundef %52) #3
br label %54
54: ; preds = %25, %51, %42
%55 = phi i32 [ %53, %51 ], [ 0, %42 ], [ 0, %25 ]
%56 = load ptr, ptr %3, align 8, !tbaa !11
%57 = load ptr, ptr %56, align 8, !tbaa !13
%58 = call i32 @mutex_exit(ptr noundef %57) #3
%59 = load ptr, ptr %3, align 8, !tbaa !11
br label %60
60: ; preds = %21, %19, %54
%61 = phi ptr [ %59, %54 ], [ %20, %19 ], [ %24, %21 ]
%62 = phi i32 [ %55, %54 ], [ %17, %19 ], [ 0, %21 ]
%63 = load i32, ptr @FTAG, align 4, !tbaa !10
%64 = call i32 @dsl_dataset_rele(ptr noundef %61, i32 noundef %63) #3
br label %65
65: ; preds = %60, %2
%66 = phi i32 [ %9, %2 ], [ %62, %60 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %66
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @dmu_tx_pool(ptr noundef) local_unnamed_addr #2
declare i32 @dsl_dataset_hold(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dsl_prop_predict(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dsl_dataset_rele(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mutex_enter(ptr noundef) local_unnamed_addr #2
declare i64 @dsl_dir_space_towrite(ptr noundef) local_unnamed_addr #2
declare i64 @dmu_tx_is_syncing(ptr noundef) local_unnamed_addr #2
declare ptr @dsl_dir_phys(ptr noundef) local_unnamed_addr #2
declare i32 @SET_ERROR(i32 noundef) local_unnamed_addr #2
declare i32 @mutex_exit(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"TYPE_9__", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_10__", !12, i64 0}
!15 = !{!6, !7, i64 4}
!16 = !{!6, !7, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"long", !8, i64 0}
!19 = !{!20, !18, i64 0}
!20 = !{!"TYPE_12__", !18, i64 0, !18, i64 8}
!21 = !{!20, !18, i64 8}
|
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dsl_dir.c_dsl_dir_set_quota_check.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dsl_dir.c_dsl_dir_set_quota_check.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FTAG = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"quota\00", align 1
@ENOSPC = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dsl_dir_set_quota_check], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @dsl_dir_set_quota_check(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
%4 = alloca i64, align 8
%5 = tail call ptr @dmu_tx_pool(ptr noundef %1) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i32, ptr %6, align 4, !tbaa !6
%8 = load i32, ptr @FTAG, align 4, !tbaa !11
%9 = call i32 @dsl_dataset_hold(ptr noundef %5, i32 noundef %7, i32 noundef %8, ptr noundef nonnull %3) #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %65
11: ; preds = %2
%12 = load ptr, ptr %3, align 8, !tbaa !12
%13 = load ptr, ptr %12, align 8, !tbaa !14
%14 = getelementptr inbounds i8, ptr %0, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !16
%16 = load i32, ptr %0, align 4, !tbaa !17
%17 = call i32 @dsl_prop_predict(ptr noundef %13, ptr noundef nonnull @.str, i32 noundef %15, i32 noundef %16, ptr noundef nonnull %4) #3
%18 = icmp eq i32 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %11
%20 = load ptr, ptr %3, align 8, !tbaa !12
br label %60
21: ; preds = %11
%22 = load i64, ptr %4, align 8, !tbaa !18
%23 = icmp eq i64 %22, 0
%24 = load ptr, ptr %3, align 8, !tbaa !12
br i1 %23, label %60, label %25
25: ; preds = %21
%26 = load ptr, ptr %24, align 8, !tbaa !14
%27 = call i32 @mutex_enter(ptr noundef %26) #3
%28 = load ptr, ptr %3, align 8, !tbaa !12
%29 = load ptr, ptr %28, align 8, !tbaa !14
%30 = call i64 @dsl_dir_space_towrite(ptr noundef %29) #3
%31 = call i64 @dmu_tx_is_syncing(ptr noundef %1) #3
%32 = icmp ne i64 %31, 0
%33 = icmp eq i64 %30, 0
%34 = select i1 %32, i1 true, i1 %33
br i1 %34, label %35, label %54
35: ; preds = %25
%36 = load i64, ptr %4, align 8, !tbaa !18
%37 = load ptr, ptr %3, align 8, !tbaa !12
%38 = load ptr, ptr %37, align 8, !tbaa !14
%39 = call ptr @dsl_dir_phys(ptr noundef %38) #3
%40 = load i64, ptr %39, align 8, !tbaa !20
%41 = icmp slt i64 %36, %40
br i1 %41, label %51, label %42
42: ; preds = %35
%43 = load i64, ptr %4, align 8, !tbaa !18
%44 = load ptr, ptr %3, align 8, !tbaa !12
%45 = load ptr, ptr %44, align 8, !tbaa !14
%46 = call ptr @dsl_dir_phys(ptr noundef %45) #3
%47 = getelementptr inbounds i8, ptr %46, i64 8
%48 = load i64, ptr %47, align 8, !tbaa !22
%49 = add nsw i64 %48, %30
%50 = icmp slt i64 %43, %49
br i1 %50, label %51, label %54
51: ; preds = %42, %35
%52 = load i32, ptr @ENOSPC, align 4, !tbaa !11
%53 = call i32 @SET_ERROR(i32 noundef %52) #3
br label %54
54: ; preds = %25, %51, %42
%55 = phi i32 [ %53, %51 ], [ 0, %42 ], [ 0, %25 ]
%56 = load ptr, ptr %3, align 8, !tbaa !12
%57 = load ptr, ptr %56, align 8, !tbaa !14
%58 = call i32 @mutex_exit(ptr noundef %57) #3
%59 = load ptr, ptr %3, align 8, !tbaa !12
br label %60
60: ; preds = %21, %19, %54
%61 = phi ptr [ %59, %54 ], [ %20, %19 ], [ %24, %21 ]
%62 = phi i32 [ %55, %54 ], [ %17, %19 ], [ 0, %21 ]
%63 = load i32, ptr @FTAG, align 4, !tbaa !11
%64 = call i32 @dsl_dataset_rele(ptr noundef %61, i32 noundef %63) #3
br label %65
65: ; preds = %60, %2
%66 = phi i32 [ %9, %2 ], [ %62, %60 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %66
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @dmu_tx_pool(ptr noundef) local_unnamed_addr #2
declare i32 @dsl_dataset_hold(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dsl_prop_predict(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dsl_dataset_rele(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mutex_enter(ptr noundef) local_unnamed_addr #2
declare i64 @dsl_dir_space_towrite(ptr noundef) local_unnamed_addr #2
declare i64 @dmu_tx_is_syncing(ptr noundef) local_unnamed_addr #2
declare ptr @dsl_dir_phys(ptr noundef) local_unnamed_addr #2
declare i32 @SET_ERROR(i32 noundef) local_unnamed_addr #2
declare i32 @mutex_exit(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"TYPE_9__", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_10__", !13, i64 0}
!16 = !{!7, !8, i64 4}
!17 = !{!7, !8, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"long", !9, i64 0}
!20 = !{!21, !19, i64 0}
!21 = !{!"TYPE_12__", !19, i64 0, !19, i64 8}
!22 = !{!21, !19, i64 8}
|
freebsd_sys_cddl_contrib_opensolaris_uts_common_fs_zfs_extr_dsl_dir.c_dsl_dir_set_quota_check
|
; ModuleID = 'AnghaBench/linux/drivers/iio/light/extr_tsl2772.c_tsl2772_resume.c'
source_filename = "AnghaBench/linux/drivers/iio/light/extr_tsl2772.c_tsl2772_resume.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TSL2772_BOOT_MIN_SLEEP_TIME = dso_local local_unnamed_addr global i32 0, align 4
@TSL2772_BOOT_MAX_SLEEP_TIME = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @tsl2772_resume], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @tsl2772_resume(ptr noundef %0) #0 {
%2 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%3 = tail call ptr @iio_priv(ptr noundef %2) #2
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i32 @ARRAY_SIZE(i32 noundef %4) #2
%6 = load i32, ptr %3, align 4, !tbaa !5
%7 = tail call i32 @regulator_bulk_enable(i32 noundef %5, i32 noundef %6) #2
%8 = icmp slt i32 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %1
%10 = load i32, ptr @TSL2772_BOOT_MIN_SLEEP_TIME, align 4, !tbaa !10
%11 = load i32, ptr @TSL2772_BOOT_MAX_SLEEP_TIME, align 4, !tbaa !10
%12 = tail call i32 @usleep_range(i32 noundef %10, i32 noundef %11) #2
%13 = tail call i32 @tsl2772_chip_on(ptr noundef %2) #2
br label %14
14: ; preds = %1, %9
%15 = phi i32 [ %13, %9 ], [ %7, %1 ]
ret i32 %15
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare ptr @iio_priv(ptr noundef) local_unnamed_addr #1
declare i32 @regulator_bulk_enable(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(i32 noundef) local_unnamed_addr #1
declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tsl2772_chip_on(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"tsl2772_chip", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/iio/light/extr_tsl2772.c_tsl2772_resume.c'
source_filename = "AnghaBench/linux/drivers/iio/light/extr_tsl2772.c_tsl2772_resume.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TSL2772_BOOT_MIN_SLEEP_TIME = common local_unnamed_addr global i32 0, align 4
@TSL2772_BOOT_MAX_SLEEP_TIME = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tsl2772_resume], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @tsl2772_resume(ptr noundef %0) #0 {
%2 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%3 = tail call ptr @iio_priv(ptr noundef %2) #2
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @ARRAY_SIZE(i32 noundef %4) #2
%6 = load i32, ptr %3, align 4, !tbaa !6
%7 = tail call i32 @regulator_bulk_enable(i32 noundef %5, i32 noundef %6) #2
%8 = icmp slt i32 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %1
%10 = load i32, ptr @TSL2772_BOOT_MIN_SLEEP_TIME, align 4, !tbaa !11
%11 = load i32, ptr @TSL2772_BOOT_MAX_SLEEP_TIME, align 4, !tbaa !11
%12 = tail call i32 @usleep_range(i32 noundef %10, i32 noundef %11) #2
%13 = tail call i32 @tsl2772_chip_on(ptr noundef %2) #2
br label %14
14: ; preds = %1, %9
%15 = phi i32 [ %13, %9 ], [ %7, %1 ]
ret i32 %15
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare ptr @iio_priv(ptr noundef) local_unnamed_addr #1
declare i32 @regulator_bulk_enable(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(i32 noundef) local_unnamed_addr #1
declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tsl2772_chip_on(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"tsl2772_chip", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
linux_drivers_iio_light_extr_tsl2772.c_tsl2772_resume
|
; ModuleID = 'AnghaBench/linux/sound/pci/oxygen/extr_oxygen_lib.c_oxygen_pci_shutdown.c'
source_filename = "AnghaBench/linux/sound/pci/oxygen/extr_oxygen_lib.c_oxygen_pci_shutdown.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @oxygen_pci_shutdown(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @pci_get_drvdata(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call i32 @oxygen_shutdown(ptr noundef %3) #2
%5 = load ptr, ptr %3, align 8, !tbaa !10
%6 = tail call i32 %5(ptr noundef nonnull %3) #2
ret void
}
declare ptr @pci_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @oxygen_shutdown(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_card", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"oxygen", !12, i64 0}
!12 = !{!"TYPE_2__", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/sound/pci/oxygen/extr_oxygen_lib.c_oxygen_pci_shutdown.c'
source_filename = "AnghaBench/linux/sound/pci/oxygen/extr_oxygen_lib.c_oxygen_pci_shutdown.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @oxygen_pci_shutdown(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @pci_get_drvdata(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call i32 @oxygen_shutdown(ptr noundef %3) #2
%5 = load ptr, ptr %3, align 8, !tbaa !11
%6 = tail call i32 %5(ptr noundef nonnull %3) #2
ret void
}
declare ptr @pci_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @oxygen_shutdown(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_card", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"oxygen", !13, i64 0}
!13 = !{!"TYPE_2__", !8, i64 0}
|
linux_sound_pci_oxygen_extr_oxygen_lib.c_oxygen_pci_shutdown
|
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/bnxt_re/extr_main.c_bnxt_re_cleanup_res.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/bnxt_re/extr_main.c_bnxt_re_cleanup_res.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bnxt_re_dev = type { i32, %struct.TYPE_2__, ptr }
%struct.TYPE_2__ = type { i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @bnxt_re_cleanup_res], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @bnxt_re_cleanup_res(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = icmp sgt i32 %2, 1
br i1 %3, label %4, label %16
4: ; preds = %1
%5 = getelementptr inbounds %struct.bnxt_re_dev, ptr %0, i64 0, i32 2
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 1, %4 ], [ %12, %6 ]
%8 = load ptr, ptr %5, align 8, !tbaa !13
%9 = getelementptr i32, ptr %8, i64 %7
%10 = getelementptr i32, ptr %9, i64 -1
%11 = tail call i32 @bnxt_qplib_disable_nq(ptr noundef %10) #2
%12 = add nuw nsw i64 %7, 1
%13 = load i32, ptr %0, align 8, !tbaa !5
%14 = sext i32 %13 to i64
%15 = icmp slt i64 %12, %14
br i1 %15, label %6, label %16, !llvm.loop !14
16: ; preds = %6, %1
%17 = getelementptr inbounds %struct.bnxt_re_dev, ptr %0, i64 0, i32 1
%18 = load i64, ptr %17, align 8, !tbaa !16
%19 = icmp eq i64 %18, 0
br i1 %19, label %22, label %20
20: ; preds = %16
%21 = tail call i32 @bnxt_qplib_cleanup_res(ptr noundef nonnull %17) #2
br label %22
22: ; preds = %20, %16
ret void
}
declare i32 @bnxt_qplib_disable_nq(ptr noundef) local_unnamed_addr #1
declare i32 @bnxt_qplib_cleanup_res(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bnxt_re_dev", !7, i64 0, !10, i64 8, !12, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !12, i64 16}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!6, !11, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/bnxt_re/extr_main.c_bnxt_re_cleanup_res.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/bnxt_re/extr_main.c_bnxt_re_cleanup_res.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @bnxt_re_cleanup_res], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @bnxt_re_cleanup_res(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = icmp sgt i32 %2, 1
br i1 %3, label %4, label %16
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 16
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 1, %4 ], [ %12, %6 ]
%8 = load ptr, ptr %5, align 8, !tbaa !14
%9 = getelementptr i32, ptr %8, i64 %7
%10 = getelementptr i8, ptr %9, i64 -4
%11 = tail call i32 @bnxt_qplib_disable_nq(ptr noundef %10) #2
%12 = add nuw nsw i64 %7, 1
%13 = load i32, ptr %0, align 8, !tbaa !6
%14 = sext i32 %13 to i64
%15 = icmp slt i64 %12, %14
br i1 %15, label %6, label %16, !llvm.loop !15
16: ; preds = %6, %1
%17 = getelementptr inbounds i8, ptr %0, i64 8
%18 = load i64, ptr %17, align 8, !tbaa !17
%19 = icmp eq i64 %18, 0
br i1 %19, label %22, label %20
20: ; preds = %16
%21 = tail call i32 @bnxt_qplib_cleanup_res(ptr noundef nonnull %17) #2
br label %22
22: ; preds = %20, %16
ret void
}
declare i32 @bnxt_qplib_disable_nq(ptr noundef) local_unnamed_addr #1
declare i32 @bnxt_qplib_cleanup_res(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"bnxt_re_dev", !8, i64 0, !11, i64 8, !13, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!7, !13, i64 16}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!7, !12, i64 8}
|
linux_drivers_infiniband_hw_bnxt_re_extr_main.c_bnxt_re_cleanup_res
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/game/extr_g_syscalls.c_trap_GetUserinfo.c'
source_filename = "AnghaBench/Quake-III-Arena/code/game/extr_g_syscalls.c_trap_GetUserinfo.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@G_GET_USERINFO = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @trap_GetUserinfo(i32 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @G_GET_USERINFO, align 4, !tbaa !5
%5 = tail call i32 @syscall(i32 noundef %4, i32 noundef %0, ptr noundef %1, i32 noundef %2) #2
ret void
}
declare i32 @syscall(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/game/extr_g_syscalls.c_trap_GetUserinfo.c'
source_filename = "AnghaBench/Quake-III-Arena/code/game/extr_g_syscalls.c_trap_GetUserinfo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@G_GET_USERINFO = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @trap_GetUserinfo(i32 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @G_GET_USERINFO, align 4, !tbaa !6
%5 = tail call i32 @syscall(i32 noundef %4, i32 noundef %0, ptr noundef %1, i32 noundef %2) #2
ret void
}
declare i32 @syscall(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
Quake-III-Arena_code_game_extr_g_syscalls.c_trap_GetUserinfo
|
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ctxfi/extr_ctmixer.c_set_switch_state.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ctxfi/extr_ctmixer.c_set_switch_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SWH_MIXER_START = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @set_switch_state], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal void @set_switch_state(ptr nocapture noundef %0, i32 noundef %1, i8 noundef zeroext %2) #0 {
%4 = icmp eq i8 %2, 0
%5 = load i32, ptr @SWH_MIXER_START, align 4, !tbaa !5
%6 = sub i32 %1, %5
%7 = shl nuw i32 1, %6
br i1 %4, label %11, label %8
8: ; preds = %3
%9 = load i32, ptr %0, align 4, !tbaa !9
%10 = or i32 %7, %9
br label %15
11: ; preds = %3
%12 = xor i32 %7, -1
%13 = load i32, ptr %0, align 4, !tbaa !9
%14 = and i32 %13, %12
br label %15
15: ; preds = %11, %8
%16 = phi i32 [ %14, %11 ], [ %10, %8 ]
store i32 %16, ptr %0, align 4, !tbaa !9
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"ct_mixer", !6, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ctxfi/extr_ctmixer.c_set_switch_state.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ctxfi/extr_ctmixer.c_set_switch_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SWH_MIXER_START = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @set_switch_state], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @set_switch_state(ptr nocapture noundef %0, i32 noundef %1, i8 noundef zeroext %2) #0 {
%4 = icmp eq i8 %2, 0
%5 = load i32, ptr @SWH_MIXER_START, align 4, !tbaa !6
%6 = sub i32 %1, %5
%7 = shl nuw i32 1, %6
br i1 %4, label %11, label %8
8: ; preds = %3
%9 = load i32, ptr %0, align 4, !tbaa !10
%10 = or i32 %7, %9
br label %15
11: ; preds = %3
%12 = xor i32 %7, -1
%13 = load i32, ptr %0, align 4, !tbaa !10
%14 = and i32 %13, %12
br label %15
15: ; preds = %11, %8
%16 = phi i32 [ %14, %11 ], [ %10, %8 ]
store i32 %16, ptr %0, align 4, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ct_mixer", !7, i64 0}
|
fastsocket_kernel_sound_pci_ctxfi_extr_ctmixer.c_set_switch_state
|
; ModuleID = 'AnghaBench/radare2/libr/asm/arch/arm/winedbg/extr_be_arm.c_arm_disasm_singletrans.c'
source_filename = "AnghaBench/radare2/libr/asm/arch/arm/winedbg/extr_be_arm.c_arm_disasm_singletrans.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [9 x i8] c"%s%s%s%s\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"ldr\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"str\00", align 1
@.str.3 = private unnamed_addr constant [2 x i8] c"b\00", align 1
@.str.4 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.5 = private unnamed_addr constant [2 x i8] c"t\00", align 1
@.str.6 = private unnamed_addr constant [6 x i8] c" %s, \00", align 1
@tbl_regs = dso_local local_unnamed_addr global ptr null, align 8
@.str.7 = private unnamed_addr constant [10 x i8] c"[%s, #%d]\00", align 1
@.str.8 = private unnamed_addr constant [9 x i8] c"[%s, %s]\00", align 1
@.str.9 = private unnamed_addr constant [17 x i8] c"[%s, %s, %s #%d]\00", align 1
@tbl_shifts = dso_local local_unnamed_addr global ptr null, align 8
@.str.10 = private unnamed_addr constant [10 x i8] c"[%s], #%d\00", align 1
@.str.11 = private unnamed_addr constant [9 x i8] c"[%s], %s\00", align 1
@.str.12 = private unnamed_addr constant [17 x i8] c"[%s], %s, %s #%d\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @arm_disasm_singletrans], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @arm_disasm_singletrans(ptr nocapture noundef %0, i32 noundef %1) #0 {
%3 = and i32 %1, 33554432
%4 = icmp eq i32 %3, 0
%5 = trunc i32 %1 to i16
%6 = and i16 %5, 4095
%7 = and i32 %1, 8388608
%8 = icmp eq i32 %7, 0
%9 = sub nsw i16 0, %6
%10 = select i1 %8, i16 %9, i16 %6
%11 = load ptr, ptr %0, align 8, !tbaa !5
%12 = and i32 %1, 1048576
%13 = icmp eq i32 %12, 0
%14 = select i1 %13, ptr @.str.2, ptr @.str.1
%15 = and i32 %1, 4194304
%16 = icmp eq i32 %15, 0
%17 = select i1 %16, ptr @.str.4, ptr @.str.3
%18 = and i32 %1, 2097152
%19 = icmp eq i32 %18, 0
%20 = select i1 %19, ptr @.str.4, ptr @.str.5
%21 = tail call i32 @get_cond(i32 noundef %1) #2
%22 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %11, ptr noundef nonnull @.str, ptr noundef nonnull %14, ptr noundef nonnull %17, ptr noundef nonnull %20, i32 noundef %21) #2
store ptr %22, ptr %0, align 8, !tbaa !5
%23 = load ptr, ptr @tbl_regs, align 8, !tbaa !10
%24 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 3) #2
%25 = getelementptr inbounds ptr, ptr %23, i64 %24
%26 = load ptr, ptr %25, align 8, !tbaa !10
%27 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %22, ptr noundef nonnull @.str.6, ptr noundef %26) #2
store ptr %27, ptr %0, align 8, !tbaa !5
%28 = and i32 %1, 16777216
%29 = icmp eq i32 %28, 0
br i1 %29, label %72, label %30
30: ; preds = %2
br i1 %4, label %31, label %38
31: ; preds = %30
%32 = load ptr, ptr @tbl_regs, align 8, !tbaa !10
%33 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%34 = getelementptr inbounds ptr, ptr %32, i64 %33
%35 = load ptr, ptr %34, align 8, !tbaa !10
%36 = sext i16 %10 to i32
%37 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.7, ptr noundef %35, i32 noundef %36) #2
br label %114
38: ; preds = %30
%39 = and i32 %1, 4080
%40 = icmp eq i32 %39, 0
br i1 %40, label %41, label %51
41: ; preds = %38
%42 = load ptr, ptr @tbl_regs, align 8, !tbaa !10
%43 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%44 = getelementptr inbounds ptr, ptr %42, i64 %43
%45 = load ptr, ptr %44, align 8, !tbaa !10
%46 = load ptr, ptr @tbl_regs, align 8, !tbaa !10
%47 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 0) #2
%48 = getelementptr inbounds ptr, ptr %46, i64 %47
%49 = load ptr, ptr %48, align 8, !tbaa !10
%50 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.8, ptr noundef %45, ptr noundef %49) #2
br label %114
51: ; preds = %38
%52 = and i32 %1, 16
%53 = icmp eq i32 %52, 0
br i1 %53, label %54, label %116
54: ; preds = %51
%55 = load ptr, ptr @tbl_regs, align 8, !tbaa !10
%56 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%57 = getelementptr inbounds ptr, ptr %55, i64 %56
%58 = load ptr, ptr %57, align 8, !tbaa !10
%59 = load ptr, ptr @tbl_regs, align 8, !tbaa !10
%60 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 0) #2
%61 = getelementptr inbounds ptr, ptr %59, i64 %60
%62 = load ptr, ptr %61, align 8, !tbaa !10
%63 = load ptr, ptr @tbl_shifts, align 8, !tbaa !10
%64 = lshr i32 %1, 5
%65 = and i32 %64, 3
%66 = zext nneg i32 %65 to i64
%67 = getelementptr inbounds ptr, ptr %63, i64 %66
%68 = load ptr, ptr %67, align 8, !tbaa !10
%69 = lshr i32 %1, 7
%70 = and i32 %69, 31
%71 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.9, ptr noundef %58, ptr noundef %62, ptr noundef %68, i32 noundef %70) #2
br label %114
72: ; preds = %2
br i1 %4, label %73, label %80
73: ; preds = %72
%74 = load ptr, ptr @tbl_regs, align 8, !tbaa !10
%75 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%76 = getelementptr inbounds ptr, ptr %74, i64 %75
%77 = load ptr, ptr %76, align 8, !tbaa !10
%78 = sext i16 %10 to i32
%79 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.10, ptr noundef %77, i32 noundef %78) #2
br label %114
80: ; preds = %72
%81 = and i32 %1, 4080
%82 = icmp eq i32 %81, 0
br i1 %82, label %83, label %93
83: ; preds = %80
%84 = load ptr, ptr @tbl_regs, align 8, !tbaa !10
%85 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%86 = getelementptr inbounds ptr, ptr %84, i64 %85
%87 = load ptr, ptr %86, align 8, !tbaa !10
%88 = load ptr, ptr @tbl_regs, align 8, !tbaa !10
%89 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 0) #2
%90 = getelementptr inbounds ptr, ptr %88, i64 %89
%91 = load ptr, ptr %90, align 8, !tbaa !10
%92 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.11, ptr noundef %87, ptr noundef %91) #2
br label %114
93: ; preds = %80
%94 = and i32 %1, 16
%95 = icmp eq i32 %94, 0
br i1 %95, label %96, label %116
96: ; preds = %93
%97 = load ptr, ptr @tbl_regs, align 8, !tbaa !10
%98 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%99 = getelementptr inbounds ptr, ptr %97, i64 %98
%100 = load ptr, ptr %99, align 8, !tbaa !10
%101 = load ptr, ptr @tbl_regs, align 8, !tbaa !10
%102 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 0) #2
%103 = getelementptr inbounds ptr, ptr %101, i64 %102
%104 = load ptr, ptr %103, align 8, !tbaa !10
%105 = load ptr, ptr @tbl_shifts, align 8, !tbaa !10
%106 = lshr i32 %1, 5
%107 = and i32 %106, 3
%108 = zext nneg i32 %107 to i64
%109 = getelementptr inbounds ptr, ptr %105, i64 %108
%110 = load ptr, ptr %109, align 8, !tbaa !10
%111 = lshr i32 %1, 7
%112 = and i32 %111, 31
%113 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.12, ptr noundef %100, ptr noundef %104, ptr noundef %110, i32 noundef %112) #2
br label %114
114: ; preds = %73, %96, %83, %31, %54, %41
%115 = phi ptr [ %50, %41 ], [ %71, %54 ], [ %37, %31 ], [ %92, %83 ], [ %113, %96 ], [ %79, %73 ]
store ptr %115, ptr %0, align 8, !tbaa !5
br label %116
116: ; preds = %114, %93, %51
%117 = phi i32 [ %1, %51 ], [ %1, %93 ], [ 0, %114 ]
ret i32 %117
}
declare ptr @r_str_appendf(ptr noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @get_cond(i32 noundef) local_unnamed_addr #1
declare i64 @get_nibble(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"winedbg_arm_insn", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/radare2/libr/asm/arch/arm/winedbg/extr_be_arm.c_arm_disasm_singletrans.c'
source_filename = "AnghaBench/radare2/libr/asm/arch/arm/winedbg/extr_be_arm.c_arm_disasm_singletrans.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [9 x i8] c"%s%s%s%s\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"ldr\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"str\00", align 1
@.str.3 = private unnamed_addr constant [2 x i8] c"b\00", align 1
@.str.4 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.5 = private unnamed_addr constant [2 x i8] c"t\00", align 1
@.str.6 = private unnamed_addr constant [6 x i8] c" %s, \00", align 1
@tbl_regs = common local_unnamed_addr global ptr null, align 8
@.str.7 = private unnamed_addr constant [10 x i8] c"[%s, #%d]\00", align 1
@.str.8 = private unnamed_addr constant [9 x i8] c"[%s, %s]\00", align 1
@.str.9 = private unnamed_addr constant [17 x i8] c"[%s, %s, %s #%d]\00", align 1
@tbl_shifts = common local_unnamed_addr global ptr null, align 8
@.str.10 = private unnamed_addr constant [10 x i8] c"[%s], #%d\00", align 1
@.str.11 = private unnamed_addr constant [9 x i8] c"[%s], %s\00", align 1
@.str.12 = private unnamed_addr constant [17 x i8] c"[%s], %s, %s #%d\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @arm_disasm_singletrans], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @arm_disasm_singletrans(ptr nocapture noundef %0, i32 noundef %1) #0 {
%3 = and i32 %1, 33554432
%4 = icmp eq i32 %3, 0
%5 = trunc i32 %1 to i16
%6 = and i16 %5, 4095
%7 = and i32 %1, 8388608
%8 = icmp eq i32 %7, 0
%9 = sub nsw i16 0, %6
%10 = select i1 %8, i16 %9, i16 %6
%11 = load ptr, ptr %0, align 8, !tbaa !6
%12 = and i32 %1, 1048576
%13 = icmp eq i32 %12, 0
%14 = select i1 %13, ptr @.str.2, ptr @.str.1
%15 = and i32 %1, 4194304
%16 = icmp eq i32 %15, 0
%17 = select i1 %16, ptr @.str.4, ptr @.str.3
%18 = and i32 %1, 2097152
%19 = icmp eq i32 %18, 0
%20 = select i1 %19, ptr @.str.4, ptr @.str.5
%21 = tail call i32 @get_cond(i32 noundef %1) #2
%22 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %11, ptr noundef nonnull @.str, ptr noundef nonnull %14, ptr noundef nonnull %17, ptr noundef nonnull %20, i32 noundef %21) #2
store ptr %22, ptr %0, align 8, !tbaa !6
%23 = load ptr, ptr @tbl_regs, align 8, !tbaa !11
%24 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 3) #2
%25 = getelementptr inbounds ptr, ptr %23, i64 %24
%26 = load ptr, ptr %25, align 8, !tbaa !11
%27 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %22, ptr noundef nonnull @.str.6, ptr noundef %26) #2
store ptr %27, ptr %0, align 8, !tbaa !6
%28 = and i32 %1, 16777216
%29 = icmp eq i32 %28, 0
br i1 %29, label %72, label %30
30: ; preds = %2
br i1 %4, label %31, label %38
31: ; preds = %30
%32 = load ptr, ptr @tbl_regs, align 8, !tbaa !11
%33 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%34 = getelementptr inbounds ptr, ptr %32, i64 %33
%35 = load ptr, ptr %34, align 8, !tbaa !11
%36 = sext i16 %10 to i32
%37 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.7, ptr noundef %35, i32 noundef %36) #2
br label %114
38: ; preds = %30
%39 = and i32 %1, 4080
%40 = icmp eq i32 %39, 0
br i1 %40, label %41, label %51
41: ; preds = %38
%42 = load ptr, ptr @tbl_regs, align 8, !tbaa !11
%43 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%44 = getelementptr inbounds ptr, ptr %42, i64 %43
%45 = load ptr, ptr %44, align 8, !tbaa !11
%46 = load ptr, ptr @tbl_regs, align 8, !tbaa !11
%47 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 0) #2
%48 = getelementptr inbounds ptr, ptr %46, i64 %47
%49 = load ptr, ptr %48, align 8, !tbaa !11
%50 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.8, ptr noundef %45, ptr noundef %49) #2
br label %114
51: ; preds = %38
%52 = and i32 %1, 16
%53 = icmp eq i32 %52, 0
br i1 %53, label %54, label %116
54: ; preds = %51
%55 = load ptr, ptr @tbl_regs, align 8, !tbaa !11
%56 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%57 = getelementptr inbounds ptr, ptr %55, i64 %56
%58 = load ptr, ptr %57, align 8, !tbaa !11
%59 = load ptr, ptr @tbl_regs, align 8, !tbaa !11
%60 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 0) #2
%61 = getelementptr inbounds ptr, ptr %59, i64 %60
%62 = load ptr, ptr %61, align 8, !tbaa !11
%63 = load ptr, ptr @tbl_shifts, align 8, !tbaa !11
%64 = lshr i32 %1, 5
%65 = and i32 %64, 3
%66 = zext nneg i32 %65 to i64
%67 = getelementptr inbounds ptr, ptr %63, i64 %66
%68 = load ptr, ptr %67, align 8, !tbaa !11
%69 = lshr i32 %1, 7
%70 = and i32 %69, 31
%71 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.9, ptr noundef %58, ptr noundef %62, ptr noundef %68, i32 noundef %70) #2
br label %114
72: ; preds = %2
br i1 %4, label %73, label %80
73: ; preds = %72
%74 = load ptr, ptr @tbl_regs, align 8, !tbaa !11
%75 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%76 = getelementptr inbounds ptr, ptr %74, i64 %75
%77 = load ptr, ptr %76, align 8, !tbaa !11
%78 = sext i16 %10 to i32
%79 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.10, ptr noundef %77, i32 noundef %78) #2
br label %114
80: ; preds = %72
%81 = and i32 %1, 4080
%82 = icmp eq i32 %81, 0
br i1 %82, label %83, label %93
83: ; preds = %80
%84 = load ptr, ptr @tbl_regs, align 8, !tbaa !11
%85 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%86 = getelementptr inbounds ptr, ptr %84, i64 %85
%87 = load ptr, ptr %86, align 8, !tbaa !11
%88 = load ptr, ptr @tbl_regs, align 8, !tbaa !11
%89 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 0) #2
%90 = getelementptr inbounds ptr, ptr %88, i64 %89
%91 = load ptr, ptr %90, align 8, !tbaa !11
%92 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.11, ptr noundef %87, ptr noundef %91) #2
br label %114
93: ; preds = %80
%94 = and i32 %1, 16
%95 = icmp eq i32 %94, 0
br i1 %95, label %96, label %116
96: ; preds = %93
%97 = load ptr, ptr @tbl_regs, align 8, !tbaa !11
%98 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 4) #2
%99 = getelementptr inbounds ptr, ptr %97, i64 %98
%100 = load ptr, ptr %99, align 8, !tbaa !11
%101 = load ptr, ptr @tbl_regs, align 8, !tbaa !11
%102 = tail call i64 @get_nibble(i32 noundef %1, i32 noundef 0) #2
%103 = getelementptr inbounds ptr, ptr %101, i64 %102
%104 = load ptr, ptr %103, align 8, !tbaa !11
%105 = load ptr, ptr @tbl_shifts, align 8, !tbaa !11
%106 = lshr i32 %1, 5
%107 = and i32 %106, 3
%108 = zext nneg i32 %107 to i64
%109 = getelementptr inbounds ptr, ptr %105, i64 %108
%110 = load ptr, ptr %109, align 8, !tbaa !11
%111 = lshr i32 %1, 7
%112 = and i32 %111, 31
%113 = tail call ptr (ptr, ptr, ptr, ...) @r_str_appendf(ptr noundef %27, ptr noundef nonnull @.str.12, ptr noundef %100, ptr noundef %104, ptr noundef %110, i32 noundef %112) #2
br label %114
114: ; preds = %73, %96, %83, %31, %54, %41
%115 = phi ptr [ %50, %41 ], [ %71, %54 ], [ %37, %31 ], [ %92, %83 ], [ %113, %96 ], [ %79, %73 ]
store ptr %115, ptr %0, align 8, !tbaa !6
br label %116
116: ; preds = %114, %93, %51
%117 = phi i32 [ %1, %51 ], [ %1, %93 ], [ 0, %114 ]
ret i32 %117
}
declare ptr @r_str_appendf(ptr noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @get_cond(i32 noundef) local_unnamed_addr #1
declare i64 @get_nibble(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"winedbg_arm_insn", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
radare2_libr_asm_arch_arm_winedbg_extr_be_arm.c_arm_disasm_singletrans
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/netfilter/extr_core.c_nf_register_hooks.c'
source_filename = "AnghaBench/fastsocket/kernel/net/netfilter/extr_core.c_nf_register_hooks.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nf_hook_ops = type { i32 }
; Function Attrs: nounwind uwtable
define dso_local i32 @nf_register_hooks(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i32 %1, 0
br i1 %3, label %19, label %4
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %11
%7 = phi i64 [ 0, %4 ], [ %12, %11 ]
%8 = getelementptr inbounds %struct.nf_hook_ops, ptr %0, i64 %7
%9 = tail call i32 @nf_register_hook(ptr noundef %8) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %19, label %6, !llvm.loop !5
14: ; preds = %6
%15 = trunc i64 %7 to i32
%16 = icmp eq i32 %15, 0
br i1 %16, label %19, label %17
17: ; preds = %14
%18 = tail call i32 @nf_unregister_hooks(ptr noundef %0, i32 noundef %15) #2
br label %19
19: ; preds = %11, %2, %14, %17
%20 = phi i32 [ %9, %17 ], [ %9, %14 ], [ 0, %2 ], [ 0, %11 ]
ret i32 %20
}
declare i32 @nf_register_hook(ptr noundef) local_unnamed_addr #1
declare i32 @nf_unregister_hooks(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/netfilter/extr_core.c_nf_register_hooks.c'
source_filename = "AnghaBench/fastsocket/kernel/net/netfilter/extr_core.c_nf_register_hooks.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.nf_hook_ops = type { i32 }
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @nf_register_hooks(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i32 %1, 0
br i1 %3, label %19, label %4
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %11
%7 = phi i64 [ 0, %4 ], [ %12, %11 ]
%8 = getelementptr inbounds %struct.nf_hook_ops, ptr %0, i64 %7
%9 = tail call i32 @nf_register_hook(ptr noundef %8) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %19, label %6, !llvm.loop !6
14: ; preds = %6
%15 = icmp eq i64 %7, 0
br i1 %15, label %19, label %16
16: ; preds = %14
%17 = trunc nuw i64 %7 to i32
%18 = tail call i32 @nf_unregister_hooks(ptr noundef %0, i32 noundef %17) #2
br label %19
19: ; preds = %11, %2, %14, %16
%20 = phi i32 [ %9, %16 ], [ %9, %14 ], [ 0, %2 ], [ 0, %11 ]
ret i32 %20
}
declare i32 @nf_register_hook(ptr noundef) local_unnamed_addr #1
declare i32 @nf_unregister_hooks(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
|
fastsocket_kernel_net_netfilter_extr_core.c_nf_register_hooks
|
; ModuleID = 'AnghaBench/zstd/lib/legacy/extr_zstd_v02.c_HUF_decodeSymbolX2.c'
source_filename = "AnghaBench/zstd/lib/legacy/extr_zstd_v02.c_HUF_decodeSymbolX2.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @HUF_decodeSymbolX2], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @HUF_decodeSymbolX2(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 {
%4 = tail call i64 @BIT_lookBitsFast(ptr noundef %0, i32 noundef %2) #2
%5 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 %4
%6 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 %4, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !5
%8 = load i32, ptr %5, align 4, !tbaa !10
%9 = tail call i32 @BIT_skipBits(ptr noundef %0, i32 noundef %8) #2
ret i32 %7
}
declare i64 @BIT_lookBitsFast(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIT_skipBits(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/zstd/lib/legacy/extr_zstd_v02.c_HUF_decodeSymbolX2.c'
source_filename = "AnghaBench/zstd/lib/legacy/extr_zstd_v02.c_HUF_decodeSymbolX2.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i32, i32 }
@llvm.used = appending global [1 x ptr] [ptr @HUF_decodeSymbolX2], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @HUF_decodeSymbolX2(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 {
%4 = tail call i64 @BIT_lookBitsFast(ptr noundef %0, i32 noundef %2) #2
%5 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 %4
%6 = getelementptr inbounds i8, ptr %5, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !6
%8 = load i32, ptr %5, align 4, !tbaa !11
%9 = tail call i32 @BIT_skipBits(ptr noundef %0, i32 noundef %8) #2
ret i32 %7
}
declare i64 @BIT_lookBitsFast(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIT_skipBits(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
|
zstd_lib_legacy_extr_zstd_v02.c_HUF_decodeSymbolX2
|
; ModuleID = 'AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_entry.c_archive_entry_copy_symlink.c'
source_filename = "AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_entry.c_archive_entry_copy_symlink.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.archive_entry = type { i32, i32 }
@AE_SET_SYMLINK = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @archive_entry_copy_symlink(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.archive_entry, ptr %0, i64 0, i32 1
%4 = tail call i32 @archive_mstring_copy_mbs(ptr noundef nonnull %3, ptr noundef %1) #2
%5 = icmp eq ptr %1, null
%6 = load i32, ptr @AE_SET_SYMLINK, align 4, !tbaa !5
br i1 %5, label %10, label %7
7: ; preds = %2
%8 = load i32, ptr %0, align 4, !tbaa !9
%9 = or i32 %8, %6
br label %14
10: ; preds = %2
%11 = xor i32 %6, -1
%12 = load i32, ptr %0, align 4, !tbaa !9
%13 = and i32 %12, %11
br label %14
14: ; preds = %10, %7
%15 = phi i32 [ %13, %10 ], [ %9, %7 ]
store i32 %15, ptr %0, align 4, !tbaa !9
ret void
}
declare i32 @archive_mstring_copy_mbs(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"archive_entry", !6, i64 0, !6, i64 4}
|
; ModuleID = 'AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_entry.c_archive_entry_copy_symlink.c'
source_filename = "AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_entry.c_archive_entry_copy_symlink.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AE_SET_SYMLINK = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @archive_entry_copy_symlink(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = tail call i32 @archive_mstring_copy_mbs(ptr noundef nonnull %3, ptr noundef %1) #2
%5 = icmp eq ptr %1, null
%6 = load i32, ptr @AE_SET_SYMLINK, align 4, !tbaa !6
br i1 %5, label %10, label %7
7: ; preds = %2
%8 = load i32, ptr %0, align 4, !tbaa !10
%9 = or i32 %8, %6
br label %14
10: ; preds = %2
%11 = xor i32 %6, -1
%12 = load i32, ptr %0, align 4, !tbaa !10
%13 = and i32 %12, %11
br label %14
14: ; preds = %10, %7
%15 = phi i32 [ %13, %10 ], [ %9, %7 ]
store i32 %15, ptr %0, align 4, !tbaa !10
ret void
}
declare i32 @archive_mstring_copy_mbs(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"archive_entry", !7, i64 0, !7, i64 4}
|
freebsd_contrib_libarchive_libarchive_extr_archive_entry.c_archive_entry_copy_symlink
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb/extr_subr.c_power_sequence_xpak.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb/extr_subr.c_power_sequence_xpak.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@A_ELMER0_GPI_STAT = dso_local local_unnamed_addr global i32 0, align 4
@ELMER0_GP_BIT5 = dso_local local_unnamed_addr global i32 0, align 4
@A_ELMER0_GPO = dso_local local_unnamed_addr global i32 0, align 4
@ELMER0_GP_BIT18 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @power_sequence_xpak], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @power_sequence_xpak(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i32, ptr @A_ELMER0_GPI_STAT, align 4, !tbaa !5
%5 = call i32 @t1_tpi_read(ptr noundef %0, i32 noundef %4, ptr noundef nonnull %2) #3
%6 = load i32, ptr @ELMER0_GP_BIT5, align 4, !tbaa !5
%7 = load i32, ptr %2, align 4, !tbaa !5
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %1
%11 = load i32, ptr @A_ELMER0_GPO, align 4, !tbaa !5
%12 = call i32 @t1_tpi_read(ptr noundef %0, i32 noundef %11, ptr noundef nonnull %3) #3
%13 = load i32, ptr @ELMER0_GP_BIT18, align 4, !tbaa !5
%14 = load i32, ptr %3, align 4, !tbaa !5
%15 = or i32 %14, %13
store i32 %15, ptr %3, align 4, !tbaa !5
%16 = load i32, ptr @A_ELMER0_GPO, align 4, !tbaa !5
%17 = call i32 @t1_tpi_write(ptr noundef %0, i32 noundef %16, i32 noundef %15) #3
br label %18
18: ; preds = %10, %1
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @t1_tpi_read(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @t1_tpi_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb/extr_subr.c_power_sequence_xpak.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb/extr_subr.c_power_sequence_xpak.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@A_ELMER0_GPI_STAT = common local_unnamed_addr global i32 0, align 4
@ELMER0_GP_BIT5 = common local_unnamed_addr global i32 0, align 4
@A_ELMER0_GPO = common local_unnamed_addr global i32 0, align 4
@ELMER0_GP_BIT18 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @power_sequence_xpak], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @power_sequence_xpak(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i32, ptr @A_ELMER0_GPI_STAT, align 4, !tbaa !6
%5 = call i32 @t1_tpi_read(ptr noundef %0, i32 noundef %4, ptr noundef nonnull %2) #3
%6 = load i32, ptr @ELMER0_GP_BIT5, align 4, !tbaa !6
%7 = load i32, ptr %2, align 4, !tbaa !6
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %1
%11 = load i32, ptr @A_ELMER0_GPO, align 4, !tbaa !6
%12 = call i32 @t1_tpi_read(ptr noundef %0, i32 noundef %11, ptr noundef nonnull %3) #3
%13 = load i32, ptr @ELMER0_GP_BIT18, align 4, !tbaa !6
%14 = load i32, ptr %3, align 4, !tbaa !6
%15 = or i32 %14, %13
store i32 %15, ptr %3, align 4, !tbaa !6
%16 = load i32, ptr @A_ELMER0_GPO, align 4, !tbaa !6
%17 = call i32 @t1_tpi_write(ptr noundef %0, i32 noundef %16, i32 noundef %15) #3
br label %18
18: ; preds = %10, %1
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @t1_tpi_read(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @t1_tpi_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_net_ethernet_chelsio_cxgb_extr_subr.c_power_sequence_xpak
|
; ModuleID = 'AnghaBench/How-to-Make-a-Computer-Operating-System/src/sdk/src/libc/src/stdio/extr_feof.c_feof.c'
source_filename = "AnghaBench/How-to-Make-a-Computer-Operating-System/src/sdk/src/libc/src/stdio/extr_feof.c_feof.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i64 }
@__FILE_EOF = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local i32 @feof(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, ptr %0, align 8, !tbaa !11
%7 = load i32, ptr @__FILE_EOF, align 4, !tbaa !12
%8 = and i32 %7, %6
br label %9
9: ; preds = %1, %5
%10 = phi i32 [ %8, %5 ], [ 0, %1 ]
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/How-to-Make-a-Computer-Operating-System/src/sdk/src/libc/src/stdio/extr_feof.c_feof.c'
source_filename = "AnghaBench/How-to-Make-a-Computer-Operating-System/src/sdk/src/libc/src/stdio/extr_feof.c_feof.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@__FILE_EOF = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define i32 @feof(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, ptr %0, align 8, !tbaa !12
%7 = load i32, ptr @__FILE_EOF, align 4, !tbaa !13
%8 = and i32 %7, %6
br label %9
9: ; preds = %1, %5
%10 = phi i32 [ %8, %5 ], [ 0, %1 ]
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!8, !8, i64 0}
|
How-to-Make-a-Computer-Operating-System_src_sdk_src_libc_src_stdio_extr_feof.c_feof
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_router.c_mlxsw_sp_inetaddr_lag_event.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_router.c_mlxsw_sp_inetaddr_lag_event.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MLXSW_SP_DEFAULT_VID = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mlxsw_sp_inetaddr_lag_event], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mlxsw_sp_inetaddr_lag_event(ptr noundef %0, i64 noundef %1, ptr noundef %2) #0 {
%4 = tail call i64 @netif_is_bridge_port(ptr noundef %0) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @MLXSW_SP_DEFAULT_VID, align 4, !tbaa !5
%8 = tail call i32 @__mlxsw_sp_inetaddr_lag_event(ptr noundef %0, ptr noundef %0, i64 noundef %1, i32 noundef %7, ptr noundef %2) #2
br label %9
9: ; preds = %3, %6
%10 = phi i32 [ %8, %6 ], [ 0, %3 ]
ret i32 %10
}
declare i64 @netif_is_bridge_port(ptr noundef) local_unnamed_addr #1
declare i32 @__mlxsw_sp_inetaddr_lag_event(ptr noundef, ptr noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_router.c_mlxsw_sp_inetaddr_lag_event.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_router.c_mlxsw_sp_inetaddr_lag_event.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MLXSW_SP_DEFAULT_VID = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mlxsw_sp_inetaddr_lag_event], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mlxsw_sp_inetaddr_lag_event(ptr noundef %0, i64 noundef %1, ptr noundef %2) #0 {
%4 = tail call i64 @netif_is_bridge_port(ptr noundef %0) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @MLXSW_SP_DEFAULT_VID, align 4, !tbaa !6
%8 = tail call i32 @__mlxsw_sp_inetaddr_lag_event(ptr noundef %0, ptr noundef %0, i64 noundef %1, i32 noundef %7, ptr noundef %2) #2
br label %9
9: ; preds = %3, %6
%10 = phi i32 [ %8, %6 ], [ 0, %3 ]
ret i32 %10
}
declare i64 @netif_is_bridge_port(ptr noundef) local_unnamed_addr #1
declare i32 @__mlxsw_sp_inetaddr_lag_event(ptr noundef, ptr noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_net_ethernet_mellanox_mlxsw_extr_spectrum_router.c_mlxsw_sp_inetaddr_lag_event
|
; ModuleID = 'AnghaBench/linux/drivers/hid/extr_hid-saitek.c_saitek_probe.c'
source_filename = "AnghaBench/linux/drivers/hid/extr_hid-saitek.c_saitek_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.saitek_sc = type { i64, i32 }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"can't alloc saitek descriptor\0A\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [14 x i8] c"parse failed\0A\00", align 1
@HID_CONNECT_DEFAULT = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [17 x i8] c"hw start failed\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @saitek_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @saitek_probe(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !5
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !10
%5 = tail call ptr @devm_kzalloc(ptr noundef %0, i32 noundef 16, i32 noundef %4) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = tail call i32 @hid_err(ptr noundef %0, ptr noundef nonnull @.str) #2
%9 = load i32, ptr @ENOMEM, align 4, !tbaa !10
%10 = sub nsw i32 0, %9
br label %24
11: ; preds = %2
store i64 %3, ptr %5, align 8, !tbaa !12
%12 = getelementptr inbounds %struct.saitek_sc, ptr %5, i64 0, i32 1
store i32 -1, ptr %12, align 8, !tbaa !14
%13 = tail call i32 @hid_set_drvdata(ptr noundef %0, ptr noundef nonnull %5) #2
%14 = tail call i32 @hid_parse(ptr noundef %0) #2
%15 = icmp eq i32 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %11
%17 = tail call i32 @hid_err(ptr noundef %0, ptr noundef nonnull @.str.1) #2
br label %24
18: ; preds = %11
%19 = load i32, ptr @HID_CONNECT_DEFAULT, align 4, !tbaa !10
%20 = tail call i32 @hid_hw_start(ptr noundef %0, i32 noundef %19) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %24, label %22
22: ; preds = %18
%23 = tail call i32 @hid_err(ptr noundef %0, ptr noundef nonnull @.str.2) #2
br label %24
24: ; preds = %18, %22, %16, %7
%25 = phi i32 [ %10, %7 ], [ %14, %16 ], [ %20, %22 ], [ 0, %18 ]
ret i32 %25
}
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hid_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @hid_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @hid_parse(ptr noundef) local_unnamed_addr #1
declare i32 @hid_hw_start(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"hid_device_id", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"saitek_sc", !7, i64 0, !11, i64 8}
!14 = !{!13, !11, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/hid/extr_hid-saitek.c_saitek_probe.c'
source_filename = "AnghaBench/linux/drivers/hid/extr_hid-saitek.c_saitek_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"can't alloc saitek descriptor\0A\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [14 x i8] c"parse failed\0A\00", align 1
@HID_CONNECT_DEFAULT = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [17 x i8] c"hw start failed\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @saitek_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @saitek_probe(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !6
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !11
%5 = tail call ptr @devm_kzalloc(ptr noundef %0, i32 noundef 16, i32 noundef %4) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = tail call i32 @hid_err(ptr noundef %0, ptr noundef nonnull @.str) #2
%9 = load i32, ptr @ENOMEM, align 4, !tbaa !11
%10 = sub nsw i32 0, %9
br label %24
11: ; preds = %2
store i64 %3, ptr %5, align 8, !tbaa !13
%12 = getelementptr inbounds i8, ptr %5, i64 8
store i32 -1, ptr %12, align 8, !tbaa !15
%13 = tail call i32 @hid_set_drvdata(ptr noundef %0, ptr noundef nonnull %5) #2
%14 = tail call i32 @hid_parse(ptr noundef %0) #2
%15 = icmp eq i32 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %11
%17 = tail call i32 @hid_err(ptr noundef %0, ptr noundef nonnull @.str.1) #2
br label %24
18: ; preds = %11
%19 = load i32, ptr @HID_CONNECT_DEFAULT, align 4, !tbaa !11
%20 = tail call i32 @hid_hw_start(ptr noundef %0, i32 noundef %19) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %24, label %22
22: ; preds = %18
%23 = tail call i32 @hid_err(ptr noundef %0, ptr noundef nonnull @.str.2) #2
br label %24
24: ; preds = %18, %22, %16, %7
%25 = phi i32 [ %10, %7 ], [ %14, %16 ], [ %20, %22 ], [ 0, %18 ]
ret i32 %25
}
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hid_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @hid_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @hid_parse(ptr noundef) local_unnamed_addr #1
declare i32 @hid_hw_start(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"hid_device_id", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"saitek_sc", !8, i64 0, !12, i64 8}
!15 = !{!14, !12, i64 8}
|
linux_drivers_hid_extr_hid-saitek.c_saitek_probe
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_top.c_float_handler.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_top.c_float_handler.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SIGFPE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"Erroneous arithmetic operation.\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @float_handler], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @float_handler(i32 %0) #0 {
%2 = load i32, ptr @SIGFPE, align 4, !tbaa !5
%3 = tail call i32 @signal(i32 noundef %2, ptr noundef nonnull @float_handler) #2
%4 = tail call i32 @error(ptr noundef nonnull @.str) #2
ret void
}
declare i32 @signal(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @error(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_top.c_float_handler.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_top.c_float_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SIGFPE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"Erroneous arithmetic operation.\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @float_handler], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @float_handler(i32 %0) #0 {
%2 = load i32, ptr @SIGFPE, align 4, !tbaa !6
%3 = tail call i32 @signal(i32 noundef %2, ptr noundef nonnull @float_handler) #2
%4 = tail call i32 @error(ptr noundef nonnull @.str) #2
ret void
}
declare i32 @signal(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @error(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_contrib_gdb_gdb_extr_top.c_float_handler
|
; ModuleID = 'AnghaBench/postgres/src/backend/access/nbtree/extr_nbtxlog.c_btree_xlog_unlink_page.c'
source_filename = "AnghaBench/postgres/src/backend/access/nbtree/extr_nbtxlog.c_btree_xlog_unlink_page.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_17__ = type { i32 }
%struct.TYPE_15__ = type { i64, i64, i32, i64, i64, i32 }
%struct.TYPE_18__ = type { i32, i64, %struct.TYPE_14__, i64, i64 }
%struct.TYPE_14__ = type { i64, i32 }
@BLK_NEEDS_REDO = dso_local local_unnamed_addr global i64 0, align 8
@P_NONE = dso_local local_unnamed_addr global i64 0, align 8
@BTP_DELETED = dso_local local_unnamed_addr global i32 0, align 4
@BTP_HALF_DEAD = dso_local local_unnamed_addr global i32 0, align 4
@BTP_LEAF = dso_local local_unnamed_addr global i32 0, align 4
@P_HIKEY = dso_local local_unnamed_addr global i32 0, align 4
@InvalidOffsetNumber = dso_local local_unnamed_addr global i64 0, align 8
@ERROR = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [47 x i8] c"could not add dummy high key to half-dead page\00", align 1
@XLOG_BTREE_UNLINK_PAGE_META = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @btree_xlog_unlink_page], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @btree_xlog_unlink_page(i64 noundef %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
%4 = alloca %struct.TYPE_17__, align 4
%5 = load i32, ptr %1, align 4, !tbaa !5
%6 = tail call i64 @XLogRecGetData(ptr noundef nonnull %1) #4
%7 = inttoptr i64 %6 to ptr
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
%8 = load i64, ptr %7, align 8, !tbaa !10
%9 = getelementptr inbounds %struct.TYPE_15__, ptr %7, i64 0, i32 1
%10 = load i64, ptr %9, align 8, !tbaa !13
%11 = call i64 @XLogReadBufferForRedo(ptr noundef nonnull %1, i32 noundef 2, ptr noundef nonnull %3) #4
%12 = load i64, ptr @BLK_NEEDS_REDO, align 8, !tbaa !14
%13 = icmp eq i64 %11, %12
br i1 %13, label %14, label %23
14: ; preds = %2
%15 = load i32, ptr %3, align 4, !tbaa !15
%16 = call i64 @BufferGetPage(i32 noundef %15) #4
%17 = call i64 @PageGetSpecialPointer(i64 noundef %16) #4
%18 = inttoptr i64 %17 to ptr
%19 = getelementptr inbounds %struct.TYPE_18__, ptr %18, i64 0, i32 4
store i64 %8, ptr %19, align 8, !tbaa !16
%20 = call i32 @PageSetLSN(i64 noundef %16, i32 noundef %5) #4
%21 = load i32, ptr %3, align 4, !tbaa !15
%22 = call i32 @MarkBufferDirty(i32 noundef %21) #4
br label %23
23: ; preds = %14, %2
%24 = load i32, ptr %3, align 4, !tbaa !15
%25 = call i64 @BufferIsValid(i32 noundef %24) #4
%26 = icmp eq i64 %25, 0
br i1 %26, label %30, label %27
27: ; preds = %23
%28 = load i32, ptr %3, align 4, !tbaa !15
%29 = call i32 @UnlockReleaseBuffer(i32 noundef %28) #4
br label %30
30: ; preds = %27, %23
%31 = load i64, ptr @P_NONE, align 8, !tbaa !14
%32 = icmp eq i64 %8, %31
br i1 %32, label %53, label %33
33: ; preds = %30
%34 = call i64 @XLogReadBufferForRedo(ptr noundef nonnull %1, i32 noundef 1, ptr noundef nonnull %3) #4
%35 = load i64, ptr @BLK_NEEDS_REDO, align 8, !tbaa !14
%36 = icmp eq i64 %34, %35
br i1 %36, label %37, label %46
37: ; preds = %33
%38 = load i32, ptr %3, align 4, !tbaa !15
%39 = call i64 @BufferGetPage(i32 noundef %38) #4
%40 = call i64 @PageGetSpecialPointer(i64 noundef %39) #4
%41 = inttoptr i64 %40 to ptr
%42 = getelementptr inbounds %struct.TYPE_18__, ptr %41, i64 0, i32 3
store i64 %10, ptr %42, align 8, !tbaa !19
%43 = call i32 @PageSetLSN(i64 noundef %39, i32 noundef %5) #4
%44 = load i32, ptr %3, align 4, !tbaa !15
%45 = call i32 @MarkBufferDirty(i32 noundef %44) #4
br label %46
46: ; preds = %37, %33
%47 = load i32, ptr %3, align 4, !tbaa !15
%48 = call i64 @BufferIsValid(i32 noundef %47) #4
%49 = icmp eq i64 %48, 0
br i1 %49, label %53, label %50
50: ; preds = %46
%51 = load i32, ptr %3, align 4, !tbaa !15
%52 = call i32 @UnlockReleaseBuffer(i32 noundef %51) #4
br label %53
53: ; preds = %46, %50, %30
%54 = call i32 @XLogInitBufferForRedo(ptr noundef nonnull %1, i32 noundef 0) #4
store i32 %54, ptr %3, align 4, !tbaa !15
%55 = call i64 @BufferGetPage(i32 noundef %54) #4
%56 = load i32, ptr %3, align 4, !tbaa !15
%57 = call i32 @BufferGetPageSize(i32 noundef %56) #4
%58 = call i32 @_bt_pageinit(i64 noundef %55, i32 noundef %57) #4
%59 = call i64 @PageGetSpecialPointer(i64 noundef %55) #4
%60 = inttoptr i64 %59 to ptr
%61 = getelementptr inbounds %struct.TYPE_18__, ptr %60, i64 0, i32 4
store i64 %8, ptr %61, align 8, !tbaa !16
%62 = getelementptr inbounds %struct.TYPE_18__, ptr %60, i64 0, i32 3
store i64 %10, ptr %62, align 8, !tbaa !19
%63 = getelementptr inbounds %struct.TYPE_15__, ptr %7, i64 0, i32 5
%64 = load i32, ptr %63, align 8, !tbaa !20
%65 = getelementptr inbounds %struct.TYPE_18__, ptr %60, i64 0, i32 2, i32 1
store i32 %64, ptr %65, align 8, !tbaa !21
%66 = load i32, ptr @BTP_DELETED, align 4, !tbaa !15
store i32 %66, ptr %60, align 8, !tbaa !22
%67 = getelementptr inbounds %struct.TYPE_18__, ptr %60, i64 0, i32 1
store i64 0, ptr %67, align 8, !tbaa !23
%68 = call i32 @PageSetLSN(i64 noundef %55, i32 noundef %5) #4
%69 = load i32, ptr %3, align 4, !tbaa !15
%70 = call i32 @MarkBufferDirty(i32 noundef %69) #4
%71 = load i32, ptr %3, align 4, !tbaa !15
%72 = call i32 @UnlockReleaseBuffer(i32 noundef %71) #4
%73 = call i64 @XLogRecHasBlockRef(ptr noundef nonnull %1, i32 noundef 3) #4
%74 = icmp eq i64 %73, 0
br i1 %74, label %109, label %75
75: ; preds = %53
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
%76 = call i32 @XLogInitBufferForRedo(ptr noundef nonnull %1, i32 noundef 3) #4
store i32 %76, ptr %3, align 4, !tbaa !15
%77 = call i64 @BufferGetPage(i32 noundef %76) #4
%78 = load i32, ptr %3, align 4, !tbaa !15
%79 = call i32 @BufferGetPageSize(i32 noundef %78) #4
%80 = call i32 @_bt_pageinit(i64 noundef %77, i32 noundef %79) #4
%81 = call i64 @PageGetSpecialPointer(i64 noundef %77) #4
%82 = inttoptr i64 %81 to ptr
%83 = load i32, ptr @BTP_HALF_DEAD, align 4, !tbaa !15
%84 = load i32, ptr @BTP_LEAF, align 4, !tbaa !15
%85 = or i32 %84, %83
store i32 %85, ptr %82, align 8, !tbaa !22
%86 = getelementptr inbounds %struct.TYPE_15__, ptr %7, i64 0, i32 3
%87 = getelementptr inbounds %struct.TYPE_18__, ptr %82, i64 0, i32 3
%88 = load <2 x i64>, ptr %86, align 8, !tbaa !14
store <2 x i64> %88, ptr %87, align 8, !tbaa !14
%89 = getelementptr inbounds %struct.TYPE_18__, ptr %82, i64 0, i32 1
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %89, i8 0, i64 16, i1 false)
%90 = call i32 @MemSet(ptr noundef nonnull %4, i32 noundef 0, i32 noundef 4) #4
store i32 4, ptr %4, align 4, !tbaa !24
%91 = getelementptr inbounds %struct.TYPE_15__, ptr %7, i64 0, i32 2
%92 = load i32, ptr %91, align 8, !tbaa !26
%93 = call i32 @BTreeTupleSetTopParent(ptr noundef nonnull %4, i32 noundef %92) #4
%94 = ptrtoint ptr %4 to i64
%95 = trunc i64 %94 to i32
%96 = load i32, ptr @P_HIKEY, align 4, !tbaa !15
%97 = call i64 @PageAddItem(i64 noundef %77, i32 noundef %95, i32 noundef 4, i32 noundef %96, i32 noundef 0, i32 noundef 0) #4
%98 = load i64, ptr @InvalidOffsetNumber, align 8, !tbaa !14
%99 = icmp eq i64 %97, %98
br i1 %99, label %100, label %103
100: ; preds = %75
%101 = load i32, ptr @ERROR, align 4, !tbaa !15
%102 = call i32 @elog(i32 noundef %101, ptr noundef nonnull @.str) #4
br label %103
103: ; preds = %100, %75
%104 = call i32 @PageSetLSN(i64 noundef %77, i32 noundef %5) #4
%105 = load i32, ptr %3, align 4, !tbaa !15
%106 = call i32 @MarkBufferDirty(i32 noundef %105) #4
%107 = load i32, ptr %3, align 4, !tbaa !15
%108 = call i32 @UnlockReleaseBuffer(i32 noundef %107) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
br label %109
109: ; preds = %103, %53
%110 = load i64, ptr @XLOG_BTREE_UNLINK_PAGE_META, align 8, !tbaa !14
%111 = icmp eq i64 %110, %0
br i1 %111, label %112, label %114
112: ; preds = %109
%113 = call i32 @_bt_restore_meta(ptr noundef nonnull %1, i32 noundef 4) #4
br label %114
114: ; preds = %112, %109
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @XLogRecGetData(ptr noundef) local_unnamed_addr #2
declare i64 @XLogReadBufferForRedo(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @BufferGetPage(i32 noundef) local_unnamed_addr #2
declare i64 @PageGetSpecialPointer(i64 noundef) local_unnamed_addr #2
declare i32 @PageSetLSN(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @MarkBufferDirty(i32 noundef) local_unnamed_addr #2
declare i64 @BufferIsValid(i32 noundef) local_unnamed_addr #2
declare i32 @UnlockReleaseBuffer(i32 noundef) local_unnamed_addr #2
declare i32 @XLogInitBufferForRedo(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @_bt_pageinit(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BufferGetPageSize(i32 noundef) local_unnamed_addr #2
declare i64 @XLogRecHasBlockRef(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @MemSet(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BTreeTupleSetTopParent(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @PageAddItem(i64 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @elog(i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @_bt_restore_meta(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_16__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_15__", !12, i64 0, !12, i64 8, !7, i64 16, !12, i64 24, !12, i64 32, !7, i64 40}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!12, !12, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{!17, !12, i64 40}
!17 = !{!"TYPE_18__", !7, i64 0, !12, i64 8, !18, i64 16, !12, i64 32, !12, i64 40}
!18 = !{!"TYPE_14__", !12, i64 0, !7, i64 8}
!19 = !{!17, !12, i64 32}
!20 = !{!11, !7, i64 40}
!21 = !{!17, !7, i64 24}
!22 = !{!17, !7, i64 0}
!23 = !{!17, !12, i64 8}
!24 = !{!25, !7, i64 0}
!25 = !{!"TYPE_17__", !7, i64 0}
!26 = !{!11, !7, i64 16}
|
; ModuleID = 'AnghaBench/postgres/src/backend/access/nbtree/extr_nbtxlog.c_btree_xlog_unlink_page.c'
source_filename = "AnghaBench/postgres/src/backend/access/nbtree/extr_nbtxlog.c_btree_xlog_unlink_page.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_17__ = type { i32 }
@BLK_NEEDS_REDO = common local_unnamed_addr global i64 0, align 8
@P_NONE = common local_unnamed_addr global i64 0, align 8
@BTP_DELETED = common local_unnamed_addr global i32 0, align 4
@BTP_HALF_DEAD = common local_unnamed_addr global i32 0, align 4
@BTP_LEAF = common local_unnamed_addr global i32 0, align 4
@P_HIKEY = common local_unnamed_addr global i32 0, align 4
@InvalidOffsetNumber = common local_unnamed_addr global i64 0, align 8
@ERROR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [47 x i8] c"could not add dummy high key to half-dead page\00", align 1
@XLOG_BTREE_UNLINK_PAGE_META = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @btree_xlog_unlink_page], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @btree_xlog_unlink_page(i64 noundef %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
%4 = alloca %struct.TYPE_17__, align 4
%5 = load i32, ptr %1, align 4, !tbaa !6
%6 = tail call i64 @XLogRecGetData(ptr noundef nonnull %1) #4
%7 = inttoptr i64 %6 to ptr
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
%8 = load i64, ptr %7, align 8, !tbaa !11
%9 = getelementptr inbounds i8, ptr %7, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !14
%11 = call i64 @XLogReadBufferForRedo(ptr noundef nonnull %1, i32 noundef 2, ptr noundef nonnull %3) #4
%12 = load i64, ptr @BLK_NEEDS_REDO, align 8, !tbaa !15
%13 = icmp eq i64 %11, %12
br i1 %13, label %14, label %23
14: ; preds = %2
%15 = load i32, ptr %3, align 4, !tbaa !16
%16 = call i64 @BufferGetPage(i32 noundef %15) #4
%17 = call i64 @PageGetSpecialPointer(i64 noundef %16) #4
%18 = inttoptr i64 %17 to ptr
%19 = getelementptr inbounds i8, ptr %18, i64 40
store i64 %8, ptr %19, align 8, !tbaa !17
%20 = call i32 @PageSetLSN(i64 noundef %16, i32 noundef %5) #4
%21 = load i32, ptr %3, align 4, !tbaa !16
%22 = call i32 @MarkBufferDirty(i32 noundef %21) #4
br label %23
23: ; preds = %14, %2
%24 = load i32, ptr %3, align 4, !tbaa !16
%25 = call i64 @BufferIsValid(i32 noundef %24) #4
%26 = icmp eq i64 %25, 0
br i1 %26, label %30, label %27
27: ; preds = %23
%28 = load i32, ptr %3, align 4, !tbaa !16
%29 = call i32 @UnlockReleaseBuffer(i32 noundef %28) #4
br label %30
30: ; preds = %27, %23
%31 = load i64, ptr @P_NONE, align 8, !tbaa !15
%32 = icmp eq i64 %8, %31
br i1 %32, label %53, label %33
33: ; preds = %30
%34 = call i64 @XLogReadBufferForRedo(ptr noundef nonnull %1, i32 noundef 1, ptr noundef nonnull %3) #4
%35 = load i64, ptr @BLK_NEEDS_REDO, align 8, !tbaa !15
%36 = icmp eq i64 %34, %35
br i1 %36, label %37, label %46
37: ; preds = %33
%38 = load i32, ptr %3, align 4, !tbaa !16
%39 = call i64 @BufferGetPage(i32 noundef %38) #4
%40 = call i64 @PageGetSpecialPointer(i64 noundef %39) #4
%41 = inttoptr i64 %40 to ptr
%42 = getelementptr inbounds i8, ptr %41, i64 32
store i64 %10, ptr %42, align 8, !tbaa !20
%43 = call i32 @PageSetLSN(i64 noundef %39, i32 noundef %5) #4
%44 = load i32, ptr %3, align 4, !tbaa !16
%45 = call i32 @MarkBufferDirty(i32 noundef %44) #4
br label %46
46: ; preds = %37, %33
%47 = load i32, ptr %3, align 4, !tbaa !16
%48 = call i64 @BufferIsValid(i32 noundef %47) #4
%49 = icmp eq i64 %48, 0
br i1 %49, label %53, label %50
50: ; preds = %46
%51 = load i32, ptr %3, align 4, !tbaa !16
%52 = call i32 @UnlockReleaseBuffer(i32 noundef %51) #4
br label %53
53: ; preds = %46, %50, %30
%54 = call i32 @XLogInitBufferForRedo(ptr noundef nonnull %1, i32 noundef 0) #4
store i32 %54, ptr %3, align 4, !tbaa !16
%55 = call i64 @BufferGetPage(i32 noundef %54) #4
%56 = load i32, ptr %3, align 4, !tbaa !16
%57 = call i32 @BufferGetPageSize(i32 noundef %56) #4
%58 = call i32 @_bt_pageinit(i64 noundef %55, i32 noundef %57) #4
%59 = call i64 @PageGetSpecialPointer(i64 noundef %55) #4
%60 = inttoptr i64 %59 to ptr
%61 = getelementptr inbounds i8, ptr %60, i64 40
store i64 %8, ptr %61, align 8, !tbaa !17
%62 = getelementptr inbounds i8, ptr %60, i64 32
store i64 %10, ptr %62, align 8, !tbaa !20
%63 = getelementptr inbounds i8, ptr %7, i64 40
%64 = load i32, ptr %63, align 8, !tbaa !21
%65 = getelementptr inbounds i8, ptr %60, i64 24
store i32 %64, ptr %65, align 8, !tbaa !22
%66 = load i32, ptr @BTP_DELETED, align 4, !tbaa !16
store i32 %66, ptr %60, align 8, !tbaa !23
%67 = getelementptr inbounds i8, ptr %60, i64 8
store i64 0, ptr %67, align 8, !tbaa !24
%68 = call i32 @PageSetLSN(i64 noundef %55, i32 noundef %5) #4
%69 = load i32, ptr %3, align 4, !tbaa !16
%70 = call i32 @MarkBufferDirty(i32 noundef %69) #4
%71 = load i32, ptr %3, align 4, !tbaa !16
%72 = call i32 @UnlockReleaseBuffer(i32 noundef %71) #4
%73 = call i64 @XLogRecHasBlockRef(ptr noundef nonnull %1, i32 noundef 3) #4
%74 = icmp eq i64 %73, 0
br i1 %74, label %109, label %75
75: ; preds = %53
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
%76 = call i32 @XLogInitBufferForRedo(ptr noundef nonnull %1, i32 noundef 3) #4
store i32 %76, ptr %3, align 4, !tbaa !16
%77 = call i64 @BufferGetPage(i32 noundef %76) #4
%78 = load i32, ptr %3, align 4, !tbaa !16
%79 = call i32 @BufferGetPageSize(i32 noundef %78) #4
%80 = call i32 @_bt_pageinit(i64 noundef %77, i32 noundef %79) #4
%81 = call i64 @PageGetSpecialPointer(i64 noundef %77) #4
%82 = inttoptr i64 %81 to ptr
%83 = load i32, ptr @BTP_HALF_DEAD, align 4, !tbaa !16
%84 = load i32, ptr @BTP_LEAF, align 4, !tbaa !16
%85 = or i32 %84, %83
store i32 %85, ptr %82, align 8, !tbaa !23
%86 = getelementptr inbounds i8, ptr %7, i64 24
%87 = getelementptr inbounds i8, ptr %82, i64 32
%88 = load <2 x i64>, ptr %86, align 8, !tbaa !15
store <2 x i64> %88, ptr %87, align 8, !tbaa !15
%89 = getelementptr inbounds i8, ptr %82, i64 8
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %89, i8 0, i64 16, i1 false)
%90 = call i32 @MemSet(ptr noundef nonnull %4, i32 noundef 0, i32 noundef 4) #4
store i32 4, ptr %4, align 4, !tbaa !25
%91 = getelementptr inbounds i8, ptr %7, i64 16
%92 = load i32, ptr %91, align 8, !tbaa !27
%93 = call i32 @BTreeTupleSetTopParent(ptr noundef nonnull %4, i32 noundef %92) #4
%94 = ptrtoint ptr %4 to i64
%95 = trunc i64 %94 to i32
%96 = load i32, ptr @P_HIKEY, align 4, !tbaa !16
%97 = call i64 @PageAddItem(i64 noundef %77, i32 noundef %95, i32 noundef 4, i32 noundef %96, i32 noundef 0, i32 noundef 0) #4
%98 = load i64, ptr @InvalidOffsetNumber, align 8, !tbaa !15
%99 = icmp eq i64 %97, %98
br i1 %99, label %100, label %103
100: ; preds = %75
%101 = load i32, ptr @ERROR, align 4, !tbaa !16
%102 = call i32 @elog(i32 noundef %101, ptr noundef nonnull @.str) #4
br label %103
103: ; preds = %100, %75
%104 = call i32 @PageSetLSN(i64 noundef %77, i32 noundef %5) #4
%105 = load i32, ptr %3, align 4, !tbaa !16
%106 = call i32 @MarkBufferDirty(i32 noundef %105) #4
%107 = load i32, ptr %3, align 4, !tbaa !16
%108 = call i32 @UnlockReleaseBuffer(i32 noundef %107) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
br label %109
109: ; preds = %103, %53
%110 = load i64, ptr @XLOG_BTREE_UNLINK_PAGE_META, align 8, !tbaa !15
%111 = icmp eq i64 %110, %0
br i1 %111, label %112, label %114
112: ; preds = %109
%113 = call i32 @_bt_restore_meta(ptr noundef nonnull %1, i32 noundef 4) #4
br label %114
114: ; preds = %112, %109
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @XLogRecGetData(ptr noundef) local_unnamed_addr #2
declare i64 @XLogReadBufferForRedo(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @BufferGetPage(i32 noundef) local_unnamed_addr #2
declare i64 @PageGetSpecialPointer(i64 noundef) local_unnamed_addr #2
declare i32 @PageSetLSN(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @MarkBufferDirty(i32 noundef) local_unnamed_addr #2
declare i64 @BufferIsValid(i32 noundef) local_unnamed_addr #2
declare i32 @UnlockReleaseBuffer(i32 noundef) local_unnamed_addr #2
declare i32 @XLogInitBufferForRedo(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @_bt_pageinit(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BufferGetPageSize(i32 noundef) local_unnamed_addr #2
declare i64 @XLogRecHasBlockRef(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @MemSet(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BTreeTupleSetTopParent(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @PageAddItem(i64 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @elog(i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @_bt_restore_meta(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_16__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_15__", !13, i64 0, !13, i64 8, !8, i64 16, !13, i64 24, !13, i64 32, !8, i64 40}
!13 = !{!"long", !9, i64 0}
!14 = !{!12, !13, i64 8}
!15 = !{!13, !13, i64 0}
!16 = !{!8, !8, i64 0}
!17 = !{!18, !13, i64 40}
!18 = !{!"TYPE_18__", !8, i64 0, !13, i64 8, !19, i64 16, !13, i64 32, !13, i64 40}
!19 = !{!"TYPE_14__", !13, i64 0, !8, i64 8}
!20 = !{!18, !13, i64 32}
!21 = !{!12, !8, i64 40}
!22 = !{!18, !8, i64 24}
!23 = !{!18, !8, i64 0}
!24 = !{!18, !13, i64 8}
!25 = !{!26, !8, i64 0}
!26 = !{!"TYPE_17__", !8, i64 0}
!27 = !{!12, !8, i64 16}
|
postgres_src_backend_access_nbtree_extr_nbtxlog.c_btree_xlog_unlink_page
|
; ModuleID = 'AnghaBench/kphp-kdb/storage/extr_storage-engine.c_sigterm_handler.c'
source_filename = "AnghaBench/kphp-kdb/storage/extr_storage-engine.c_sigterm_handler.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@sigterm_handler.message = internal constant [18 x i8] c"SIGTERM handled.\0A\00", align 16
@force_interrupt = dso_local local_unnamed_addr global i32 0, align 4
@pending_signals = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sigterm_handler], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sigterm_handler(i32 noundef %0) #0 {
%2 = tail call i32 @kwrite(i32 noundef 2, ptr noundef nonnull @sigterm_handler.message, i32 noundef 17) #2
store i32 1, ptr @force_interrupt, align 4, !tbaa !5
%3 = shl nuw i32 1, %0
%4 = load i32, ptr @pending_signals, align 4, !tbaa !5
%5 = or i32 %4, %3
store i32 %5, ptr @pending_signals, align 4, !tbaa !5
ret void
}
declare i32 @kwrite(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/kphp-kdb/storage/extr_storage-engine.c_sigterm_handler.c'
source_filename = "AnghaBench/kphp-kdb/storage/extr_storage-engine.c_sigterm_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@sigterm_handler.message = internal constant [18 x i8] c"SIGTERM handled.\0A\00", align 1
@force_interrupt = common local_unnamed_addr global i32 0, align 4
@pending_signals = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sigterm_handler], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sigterm_handler(i32 noundef %0) #0 {
%2 = tail call i32 @kwrite(i32 noundef 2, ptr noundef nonnull @sigterm_handler.message, i32 noundef 17) #2
store i32 1, ptr @force_interrupt, align 4, !tbaa !6
%3 = shl nuw i32 1, %0
%4 = load i32, ptr @pending_signals, align 4, !tbaa !6
%5 = or i32 %4, %3
store i32 %5, ptr @pending_signals, align 4, !tbaa !6
ret void
}
declare i32 @kwrite(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
kphp-kdb_storage_extr_storage-engine.c_sigterm_handler
|
; ModuleID = 'AnghaBench/mpv/audio/out/extr_ao_null.c_reset.c'
source_filename = "AnghaBench/mpv/audio/out/extr_ao_null.c_reset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.priv = type { i32, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @reset], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable
define internal void @reset(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = getelementptr inbounds %struct.priv, ptr %2, i64 0, i32 1
store i64 0, ptr %3, align 8, !tbaa !10
store i32 0, ptr %2, align 8, !tbaa !14
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ao", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"priv", !12, i64 0, !13, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !12, i64 0}
|
; ModuleID = 'AnghaBench/mpv/audio/out/extr_ao_null.c_reset.c'
source_filename = "AnghaBench/mpv/audio/out/extr_ao_null.c_reset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @reset], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @reset(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = getelementptr inbounds i8, ptr %2, i64 8
store i64 0, ptr %3, align 8, !tbaa !11
store i32 0, ptr %2, align 8, !tbaa !15
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ao", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !14, i64 8}
!12 = !{!"priv", !13, i64 0, !14, i64 8}
!13 = !{!"int", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!12, !13, i64 0}
|
mpv_audio_out_extr_ao_null.c_reset
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qlogic/qede/extr_qede_dcbnl.c_qede_dcbnl_setstate.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/qlogic/qede/extr_qede_dcbnl.c_qede_dcbnl_setstate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.qede_dev = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @qede_dcbnl_setstate], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @qede_dcbnl_setstate(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = getelementptr inbounds %struct.qede_dev, ptr %3, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = load ptr, ptr %6, align 8, !tbaa !13
%8 = load i32, ptr %3, align 8, !tbaa !15
%9 = tail call i32 %7(i32 noundef %8, i32 noundef %1) #2
ret i32 %9
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"qede_dev", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_4__", !10, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"TYPE_3__", !10, i64 0}
!15 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qlogic/qede/extr_qede_dcbnl.c_qede_dcbnl_setstate.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/qlogic/qede/extr_qede_dcbnl.c_qede_dcbnl_setstate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @qede_dcbnl_setstate], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @qede_dcbnl_setstate(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = getelementptr inbounds i8, ptr %3, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = load ptr, ptr %6, align 8, !tbaa !14
%8 = load i32, ptr %3, align 8, !tbaa !16
%9 = tail call i32 %7(i32 noundef %8, i32 noundef %1) #2
ret i32 %9
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"qede_dev", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_4__", !11, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_3__", !11, i64 0}
!16 = !{!7, !8, i64 0}
|
linux_drivers_net_ethernet_qlogic_qede_extr_qede_dcbnl.c_qede_dcbnl_setstate
|
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/handwired/not_so_minidox/extr_serial.c_serial_write_byte.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/handwired/not_so_minidox/extr_serial.c_serial_write_byte.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @serial_write_byte], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @serial_write_byte(i32 noundef %0) #0 {
%2 = tail call i32 (...) @serial_output() #2
%3 = and i32 %0, 128
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @serial_high() #2
br label %9
7: ; preds = %1
%8 = tail call i32 (...) @serial_low() #2
br label %9
9: ; preds = %7, %5
%10 = tail call i32 (...) @serial_delay() #2
%11 = and i32 %0, 64
%12 = icmp eq i32 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %9
%14 = tail call i32 (...) @serial_high() #2
br label %17
15: ; preds = %9
%16 = tail call i32 (...) @serial_low() #2
br label %17
17: ; preds = %15, %13
%18 = tail call i32 (...) @serial_delay() #2
%19 = and i32 %0, 32
%20 = icmp eq i32 %19, 0
br i1 %20, label %23, label %21
21: ; preds = %17
%22 = tail call i32 (...) @serial_high() #2
br label %25
23: ; preds = %17
%24 = tail call i32 (...) @serial_low() #2
br label %25
25: ; preds = %23, %21
%26 = tail call i32 (...) @serial_delay() #2
%27 = and i32 %0, 16
%28 = icmp eq i32 %27, 0
br i1 %28, label %31, label %29
29: ; preds = %25
%30 = tail call i32 (...) @serial_high() #2
br label %33
31: ; preds = %25
%32 = tail call i32 (...) @serial_low() #2
br label %33
33: ; preds = %31, %29
%34 = tail call i32 (...) @serial_delay() #2
%35 = and i32 %0, 8
%36 = icmp eq i32 %35, 0
br i1 %36, label %39, label %37
37: ; preds = %33
%38 = tail call i32 (...) @serial_high() #2
br label %41
39: ; preds = %33
%40 = tail call i32 (...) @serial_low() #2
br label %41
41: ; preds = %39, %37
%42 = tail call i32 (...) @serial_delay() #2
%43 = and i32 %0, 4
%44 = icmp eq i32 %43, 0
br i1 %44, label %47, label %45
45: ; preds = %41
%46 = tail call i32 (...) @serial_high() #2
br label %49
47: ; preds = %41
%48 = tail call i32 (...) @serial_low() #2
br label %49
49: ; preds = %47, %45
%50 = tail call i32 (...) @serial_delay() #2
%51 = and i32 %0, 2
%52 = icmp eq i32 %51, 0
br i1 %52, label %55, label %53
53: ; preds = %49
%54 = tail call i32 (...) @serial_high() #2
br label %57
55: ; preds = %49
%56 = tail call i32 (...) @serial_low() #2
br label %57
57: ; preds = %55, %53
%58 = tail call i32 (...) @serial_delay() #2
%59 = and i32 %0, 1
%60 = icmp eq i32 %59, 0
br i1 %60, label %63, label %61
61: ; preds = %57
%62 = tail call i32 (...) @serial_high() #2
br label %65
63: ; preds = %57
%64 = tail call i32 (...) @serial_low() #2
br label %65
65: ; preds = %63, %61
%66 = tail call i32 (...) @serial_delay() #2
ret void
}
declare i32 @serial_output(...) local_unnamed_addr #1
declare i32 @serial_high(...) local_unnamed_addr #1
declare i32 @serial_low(...) local_unnamed_addr #1
declare i32 @serial_delay(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/handwired/not_so_minidox/extr_serial.c_serial_write_byte.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/handwired/not_so_minidox/extr_serial.c_serial_write_byte.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @serial_write_byte], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @serial_write_byte(i32 noundef %0) #0 {
%2 = tail call i32 @serial_output() #2
%3 = and i32 %0, 128
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @serial_high() #2
br label %9
7: ; preds = %1
%8 = tail call i32 @serial_low() #2
br label %9
9: ; preds = %7, %5
%10 = tail call i32 @serial_delay() #2
%11 = and i32 %0, 64
%12 = icmp eq i32 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %9
%14 = tail call i32 @serial_high() #2
br label %17
15: ; preds = %9
%16 = tail call i32 @serial_low() #2
br label %17
17: ; preds = %15, %13
%18 = tail call i32 @serial_delay() #2
%19 = and i32 %0, 32
%20 = icmp eq i32 %19, 0
br i1 %20, label %23, label %21
21: ; preds = %17
%22 = tail call i32 @serial_high() #2
br label %25
23: ; preds = %17
%24 = tail call i32 @serial_low() #2
br label %25
25: ; preds = %23, %21
%26 = tail call i32 @serial_delay() #2
%27 = and i32 %0, 16
%28 = icmp eq i32 %27, 0
br i1 %28, label %31, label %29
29: ; preds = %25
%30 = tail call i32 @serial_high() #2
br label %33
31: ; preds = %25
%32 = tail call i32 @serial_low() #2
br label %33
33: ; preds = %31, %29
%34 = tail call i32 @serial_delay() #2
%35 = and i32 %0, 8
%36 = icmp eq i32 %35, 0
br i1 %36, label %39, label %37
37: ; preds = %33
%38 = tail call i32 @serial_high() #2
br label %41
39: ; preds = %33
%40 = tail call i32 @serial_low() #2
br label %41
41: ; preds = %39, %37
%42 = tail call i32 @serial_delay() #2
%43 = and i32 %0, 4
%44 = icmp eq i32 %43, 0
br i1 %44, label %47, label %45
45: ; preds = %41
%46 = tail call i32 @serial_high() #2
br label %49
47: ; preds = %41
%48 = tail call i32 @serial_low() #2
br label %49
49: ; preds = %47, %45
%50 = tail call i32 @serial_delay() #2
%51 = and i32 %0, 2
%52 = icmp eq i32 %51, 0
br i1 %52, label %55, label %53
53: ; preds = %49
%54 = tail call i32 @serial_high() #2
br label %57
55: ; preds = %49
%56 = tail call i32 @serial_low() #2
br label %57
57: ; preds = %55, %53
%58 = tail call i32 @serial_delay() #2
%59 = and i32 %0, 1
%60 = icmp eq i32 %59, 0
br i1 %60, label %63, label %61
61: ; preds = %57
%62 = tail call i32 @serial_high() #2
br label %65
63: ; preds = %57
%64 = tail call i32 @serial_low() #2
br label %65
65: ; preds = %63, %61
%66 = tail call i32 @serial_delay() #2
ret void
}
declare i32 @serial_output(...) local_unnamed_addr #1
declare i32 @serial_high(...) local_unnamed_addr #1
declare i32 @serial_low(...) local_unnamed_addr #1
declare i32 @serial_delay(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
qmk_firmware_keyboards_handwired_not_so_minidox_extr_serial.c_serial_write_byte
|
; ModuleID = 'AnghaBench/linux/arch/nds32/kernel/extr_perf_event_cpu.c_validate_event.c'
source_filename = "AnghaBench/linux/arch/nds32/kernel/extr_perf_event_cpu.c_validate_event.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.perf_event = type { i64, %struct.TYPE_2__, ptr }
%struct.TYPE_2__ = type { i32 }
@PERF_EVENT_STATE_OFF = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @validate_event], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @validate_event(ptr noundef readnone %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds %struct.perf_event, ptr %2, i64 0, i32 2
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = tail call ptr @to_nds32_pmu(ptr noundef %5) #2
%7 = tail call i64 @is_software_event(ptr noundef %2) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %27
9: ; preds = %3
%10 = load ptr, ptr %4, align 8, !tbaa !5
%11 = icmp eq ptr %10, %0
br i1 %11, label %12, label %27
12: ; preds = %9
%13 = load i64, ptr %2, align 8, !tbaa !13
%14 = load i64, ptr @PERF_EVENT_STATE_OFF, align 8, !tbaa !14
%15 = icmp slt i64 %13, %14
br i1 %15, label %27, label %16
16: ; preds = %12
%17 = icmp eq i64 %13, %14
br i1 %17, label %18, label %22
18: ; preds = %16
%19 = getelementptr inbounds %struct.perf_event, ptr %2, i64 0, i32 1
%20 = load i32, ptr %19, align 8, !tbaa !15
%21 = icmp eq i32 %20, 0
br i1 %21, label %27, label %22
22: ; preds = %18, %16
%23 = load ptr, ptr %6, align 8, !tbaa !16
%24 = tail call i64 %23(ptr noundef %1, ptr noundef nonnull %2) #2
%25 = icmp sgt i64 %24, -1
%26 = zext i1 %25 to i32
br label %27
27: ; preds = %18, %12, %9, %3, %22
%28 = phi i32 [ %26, %22 ], [ 1, %3 ], [ 0, %9 ], [ 1, %12 ], [ 1, %18 ]
ret i32 %28
}
declare ptr @to_nds32_pmu(ptr noundef) local_unnamed_addr #1
declare i64 @is_software_event(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 16}
!6 = !{!"perf_event", !7, i64 0, !10, i64 8, !12, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!6, !11, i64 8}
!16 = !{!17, !12, i64 0}
!17 = !{!"nds32_pmu", !12, i64 0}
|
; ModuleID = 'AnghaBench/linux/arch/nds32/kernel/extr_perf_event_cpu.c_validate_event.c'
source_filename = "AnghaBench/linux/arch/nds32/kernel/extr_perf_event_cpu.c_validate_event.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PERF_EVENT_STATE_OFF = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @validate_event], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @validate_event(ptr noundef readnone %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %2, i64 16
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = tail call ptr @to_nds32_pmu(ptr noundef %5) #2
%7 = tail call i64 @is_software_event(ptr noundef %2) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %27
9: ; preds = %3
%10 = load ptr, ptr %4, align 8, !tbaa !6
%11 = icmp eq ptr %10, %0
br i1 %11, label %12, label %27
12: ; preds = %9
%13 = load i64, ptr %2, align 8, !tbaa !14
%14 = load i64, ptr @PERF_EVENT_STATE_OFF, align 8, !tbaa !15
%15 = icmp slt i64 %13, %14
br i1 %15, label %27, label %16
16: ; preds = %12
%17 = icmp eq i64 %13, %14
br i1 %17, label %18, label %22
18: ; preds = %16
%19 = getelementptr inbounds i8, ptr %2, i64 8
%20 = load i32, ptr %19, align 8, !tbaa !16
%21 = icmp eq i32 %20, 0
br i1 %21, label %27, label %22
22: ; preds = %18, %16
%23 = load ptr, ptr %6, align 8, !tbaa !17
%24 = tail call i64 %23(ptr noundef %1, ptr noundef nonnull %2) #2
%25 = icmp sgt i64 %24, -1
%26 = zext i1 %25 to i32
br label %27
27: ; preds = %18, %12, %9, %3, %22
%28 = phi i32 [ %26, %22 ], [ 1, %3 ], [ 0, %9 ], [ 1, %12 ], [ 1, %18 ]
ret i32 %28
}
declare ptr @to_nds32_pmu(ptr noundef) local_unnamed_addr #1
declare i64 @is_software_event(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 16}
!7 = !{!"perf_event", !8, i64 0, !11, i64 8, !13, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!7, !12, i64 8}
!17 = !{!18, !13, i64 0}
!18 = !{!"nds32_pmu", !13, i64 0}
|
linux_arch_nds32_kernel_extr_perf_event_cpu.c_validate_event
|
; ModuleID = 'AnghaBench/freebsd/lib/libc/iconv/extr_citrus_prop.c__citrus_prop_object_init.c'
source_filename = "AnghaBench/freebsd/lib/libc/iconv/extr_citrus_prop.c__citrus_prop_object_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @_citrus_prop_object_init], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @_citrus_prop_object_init(ptr noundef %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
store i32 %1, ptr %3, align 4, !tbaa !5
%4 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 4) #2
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/lib/libc/iconv/extr_citrus_prop.c__citrus_prop_object_init.c'
source_filename = "AnghaBench/freebsd/lib/libc/iconv/extr_citrus_prop.c__citrus_prop_object_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @_citrus_prop_object_init], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @_citrus_prop_object_init(ptr noundef %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %1, ptr %3, align 4, !tbaa !6
%4 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 4) #2
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
freebsd_lib_libc_iconv_extr_citrus_prop.c__citrus_prop_object_init
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_t3_hw.c_t3_check_tpsram.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_t3_hw.c_t3_check_tpsram.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [44 x i8] c"corrupted protocol SRAM image, checksum %u\0A\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @t3_check_tpsram(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = icmp ult i32 %2, 4
br i1 %4, label %20, label %5
5: ; preds = %3
%6 = lshr i32 %2, 2
%7 = zext nneg i32 %6 to i64
br label %8
8: ; preds = %5, %8
%9 = phi i64 [ 0, %5 ], [ %16, %8 ]
%10 = phi i32 [ 0, %5 ], [ %15, %8 ]
%11 = getelementptr inbounds i32, ptr %1, i64 %9
%12 = load i32, ptr %11, align 4, !tbaa !5
%13 = tail call i64 @ntohl(i32 noundef %12) #2
%14 = trunc i64 %13 to i32
%15 = add i32 %10, %14
%16 = add nuw nsw i64 %9, 1
%17 = icmp eq i64 %16, %7
br i1 %17, label %18, label %8, !llvm.loop !9
18: ; preds = %8
%19 = icmp eq i32 %15, -1
br i1 %19, label %25, label %20
20: ; preds = %3, %18
%21 = phi i32 [ %15, %18 ], [ 0, %3 ]
%22 = tail call i32 @CH_ERR(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %21) #2
%23 = load i32, ptr @EINVAL, align 4, !tbaa !5
%24 = sub nsw i32 0, %23
br label %25
25: ; preds = %18, %20
%26 = phi i32 [ %24, %20 ], [ 0, %18 ]
ret i32 %26
}
declare i64 @ntohl(i32 noundef) local_unnamed_addr #1
declare i32 @CH_ERR(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_t3_hw.c_t3_check_tpsram.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_t3_hw.c_t3_check_tpsram.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [44 x i8] c"corrupted protocol SRAM image, checksum %u\0A\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @t3_check_tpsram(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = icmp ult i32 %2, 4
br i1 %4, label %20, label %5
5: ; preds = %3
%6 = lshr i32 %2, 2
%7 = zext nneg i32 %6 to i64
br label %8
8: ; preds = %5, %8
%9 = phi i64 [ 0, %5 ], [ %16, %8 ]
%10 = phi i32 [ 0, %5 ], [ %15, %8 ]
%11 = getelementptr inbounds i32, ptr %1, i64 %9
%12 = load i32, ptr %11, align 4, !tbaa !6
%13 = tail call i64 @ntohl(i32 noundef %12) #2
%14 = trunc i64 %13 to i32
%15 = add i32 %10, %14
%16 = add nuw nsw i64 %9, 1
%17 = icmp eq i64 %16, %7
br i1 %17, label %18, label %8, !llvm.loop !10
18: ; preds = %8
%19 = icmp eq i32 %15, -1
br i1 %19, label %25, label %20
20: ; preds = %3, %18
%21 = phi i32 [ %15, %18 ], [ 0, %3 ]
%22 = tail call i32 @CH_ERR(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %21) #2
%23 = load i32, ptr @EINVAL, align 4, !tbaa !6
%24 = sub nsw i32 0, %23
br label %25
25: ; preds = %18, %20
%26 = phi i32 [ %24, %20 ], [ 0, %18 ]
ret i32 %26
}
declare i64 @ntohl(i32 noundef) local_unnamed_addr #1
declare i32 @CH_ERR(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_net_ethernet_chelsio_cxgb3_extr_t3_hw.c_t3_check_tpsram
|
; ModuleID = 'AnghaBench/linux/drivers/gpio/extr_gpio-mb86s7x.c_mb86s70_gpio_get.c'
source_filename = "AnghaBench/linux/drivers/gpio/extr_gpio-mb86s7x.c_mb86s70_gpio_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mb86s70_gpio_get], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mb86s70_gpio_get(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @gpiochip_get_data(ptr noundef %0) #2
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = tail call i64 @PDR(i32 noundef %1) #2
%6 = add nsw i64 %5, %4
%7 = tail call i32 @readl(i64 noundef %6) #2
%8 = tail call i32 @OFFSET(i32 noundef %1) #2
%9 = and i32 %8, %7
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
declare ptr @gpiochip_get_data(ptr noundef) local_unnamed_addr #1
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i64 @PDR(i32 noundef) local_unnamed_addr #1
declare i32 @OFFSET(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mb86s70_gpio_chip", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/gpio/extr_gpio-mb86s7x.c_mb86s70_gpio_get.c'
source_filename = "AnghaBench/linux/drivers/gpio/extr_gpio-mb86s7x.c_mb86s70_gpio_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mb86s70_gpio_get], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @mb86s70_gpio_get(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @gpiochip_get_data(ptr noundef %0) #2
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = tail call i64 @PDR(i32 noundef %1) #2
%6 = add nsw i64 %5, %4
%7 = tail call i32 @readl(i64 noundef %6) #2
%8 = tail call i32 @OFFSET(i32 noundef %1) #2
%9 = and i32 %8, %7
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
declare ptr @gpiochip_get_data(ptr noundef) local_unnamed_addr #1
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i64 @PDR(i32 noundef) local_unnamed_addr #1
declare i32 @OFFSET(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mb86s70_gpio_chip", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_gpio_extr_gpio-mb86s7x.c_mb86s70_gpio_get
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/aic7xxx/extr_aic7xxx_core.c_ahc_check_patch.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/aic7xxx/extr_aic7xxx_core.c_ahc_check_patch.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.patch = type { i64, ptr, i64, i32 }
@patches = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @ahc_check_patch], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ahc_check_patch(ptr noundef %0, ptr nocapture noundef %1, i64 noundef %2, ptr nocapture noundef %3) #0 {
%5 = load ptr, ptr @patches, align 8, !tbaa !5
%6 = tail call i64 @ARRAY_SIZE(ptr noundef %5) #2
%7 = load ptr, ptr @patches, align 8, !tbaa !5
%8 = getelementptr inbounds %struct.patch, ptr %7, i64 %6
%9 = load ptr, ptr %1, align 8, !tbaa !5
%10 = icmp ult ptr %9, %8
br i1 %10, label %11, label %31
11: ; preds = %4, %27
%12 = phi ptr [ %29, %27 ], [ %9, %4 ]
%13 = load i64, ptr %12, align 8, !tbaa !9
%14 = icmp eq i64 %13, %2
br i1 %14, label %15, label %31
15: ; preds = %11
%16 = getelementptr inbounds %struct.patch, ptr %12, i64 0, i32 1
%17 = load ptr, ptr %16, align 8, !tbaa !13
%18 = tail call i64 %17(ptr noundef %0) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %27
20: ; preds = %15
%21 = getelementptr inbounds %struct.patch, ptr %12, i64 0, i32 2
%22 = load i64, ptr %21, align 8, !tbaa !14
%23 = add i64 %22, %2
store i64 %23, ptr %3, align 8, !tbaa !15
%24 = getelementptr inbounds %struct.patch, ptr %12, i64 0, i32 3
%25 = load i32, ptr %24, align 8, !tbaa !16
%26 = sext i32 %25 to i64
br label %27
27: ; preds = %15, %20
%28 = phi i64 [ %26, %20 ], [ 1, %15 ]
%29 = getelementptr inbounds %struct.patch, ptr %12, i64 %28
%30 = icmp ult ptr %29, %8
br i1 %30, label %11, label %31, !llvm.loop !17
31: ; preds = %11, %27, %4
%32 = phi ptr [ %9, %4 ], [ %29, %27 ], [ %12, %11 ]
store ptr %32, ptr %1, align 8, !tbaa !5
%33 = load i64, ptr %3, align 8, !tbaa !15
%34 = icmp ule i64 %33, %2
%35 = zext i1 %34 to i32
ret i32 %35
}
declare i64 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"patch", !11, i64 0, !6, i64 8, !11, i64 16, !12, i64 24}
!11 = !{!"long", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!10, !6, i64 8}
!14 = !{!10, !11, i64 16}
!15 = !{!11, !11, i64 0}
!16 = !{!10, !12, i64 24}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/aic7xxx/extr_aic7xxx_core.c_ahc_check_patch.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/aic7xxx/extr_aic7xxx_core.c_ahc_check_patch.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.patch = type { i64, ptr, i64, i32 }
@patches = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @ahc_check_patch], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @ahc_check_patch(ptr noundef %0, ptr nocapture noundef %1, i64 noundef %2, ptr nocapture noundef %3) #0 {
%5 = load ptr, ptr @patches, align 8, !tbaa !6
%6 = tail call i64 @ARRAY_SIZE(ptr noundef %5) #2
%7 = load ptr, ptr @patches, align 8, !tbaa !6
%8 = getelementptr inbounds %struct.patch, ptr %7, i64 %6
%9 = load ptr, ptr %1, align 8, !tbaa !6
%10 = icmp ult ptr %9, %8
br i1 %10, label %11, label %33
11: ; preds = %4, %30
%12 = phi ptr [ %31, %30 ], [ %9, %4 ]
%13 = load i64, ptr %12, align 8, !tbaa !10
%14 = icmp eq i64 %13, %2
br i1 %14, label %15, label %33
15: ; preds = %11
%16 = getelementptr inbounds i8, ptr %12, i64 8
%17 = load ptr, ptr %16, align 8, !tbaa !14
%18 = tail call i64 %17(ptr noundef %0) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %28
20: ; preds = %15
%21 = getelementptr inbounds i8, ptr %12, i64 16
%22 = load i64, ptr %21, align 8, !tbaa !15
%23 = add i64 %22, %2
store i64 %23, ptr %3, align 8, !tbaa !16
%24 = getelementptr inbounds i8, ptr %12, i64 24
%25 = load i32, ptr %24, align 8, !tbaa !17
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds %struct.patch, ptr %12, i64 %26
br label %30
28: ; preds = %15
%29 = getelementptr inbounds i8, ptr %12, i64 32
br label %30
30: ; preds = %28, %20
%31 = phi ptr [ %27, %20 ], [ %29, %28 ]
%32 = icmp ult ptr %31, %8
br i1 %32, label %11, label %33, !llvm.loop !18
33: ; preds = %11, %30, %4
%34 = phi ptr [ %9, %4 ], [ %31, %30 ], [ %12, %11 ]
store ptr %34, ptr %1, align 8, !tbaa !6
%35 = load i64, ptr %3, align 8, !tbaa !16
%36 = icmp ule i64 %35, %2
%37 = zext i1 %36 to i32
ret i32 %37
}
declare i64 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"patch", !12, i64 0, !7, i64 8, !12, i64 16, !13, i64 24}
!12 = !{!"long", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!11, !7, i64 8}
!15 = !{!11, !12, i64 16}
!16 = !{!12, !12, i64 0}
!17 = !{!11, !13, i64 24}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
|
fastsocket_kernel_drivers_scsi_aic7xxx_extr_aic7xxx_core.c_ahc_check_patch
|
; ModuleID = 'AnghaBench/freebsd/sys/arm/ti/extr_ti_gpio.c_ti_gpio_intr.c'
source_filename = "AnghaBench/freebsd/sys/arm/ti/extr_ti_gpio.c_ti_gpio_intr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ti_gpio_softc = type { i64, i32, ptr }
%struct.ti_gpio_irqsrc = type { i32, i32 }
@curthread = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [23 x i8] c"Stray irq %u disabled\0A\00", align 1
@FILTER_HANDLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ti_gpio_intr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ti_gpio_intr(ptr noundef %0) #0 {
%2 = load ptr, ptr @curthread, align 8, !tbaa !5
%3 = load ptr, ptr %2, align 8, !tbaa !9
%4 = tail call i32 @ti_gpio_intr_status(ptr noundef %0) #2
%5 = load i64, ptr %0, align 8, !tbaa !11
%6 = icmp eq i64 %5, 0
br i1 %6, label %39, label %7
7: ; preds = %1
%8 = getelementptr inbounds %struct.ti_gpio_softc, ptr %0, i64 0, i32 2
%9 = getelementptr inbounds %struct.ti_gpio_softc, ptr %0, i64 0, i32 1
br label %10
10: ; preds = %7, %35
%11 = phi i64 [ 0, %7 ], [ %36, %35 ]
%12 = load ptr, ptr %8, align 8, !tbaa !15
%13 = getelementptr inbounds %struct.ti_gpio_irqsrc, ptr %12, i64 %11
%14 = load i32, ptr %13, align 4, !tbaa !16
%15 = and i32 %14, %4
%16 = icmp eq i32 %15, 0
br i1 %16, label %35, label %17
17: ; preds = %10
%18 = tail call i64 @ti_gpio_isrc_is_level(ptr noundef nonnull %13) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %17
%21 = tail call i32 @ti_gpio_isrc_eoi(ptr noundef nonnull %0, ptr noundef nonnull %13) #2
br label %22
22: ; preds = %20, %17
%23 = getelementptr inbounds %struct.ti_gpio_irqsrc, ptr %12, i64 %11, i32 1
%24 = tail call i64 @intr_isrc_dispatch(ptr noundef nonnull %23, ptr noundef %3) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %35, label %26
26: ; preds = %22
%27 = tail call i32 @ti_gpio_isrc_mask(ptr noundef nonnull %0, ptr noundef nonnull %13) #2
%28 = tail call i64 @ti_gpio_isrc_is_level(ptr noundef nonnull %13) #2
%29 = icmp eq i64 %28, 0
br i1 %29, label %32, label %30
30: ; preds = %26
%31 = tail call i32 @ti_gpio_isrc_eoi(ptr noundef nonnull %0, ptr noundef nonnull %13) #2
br label %32
32: ; preds = %30, %26
%33 = load i32, ptr %9, align 8, !tbaa !18
%34 = tail call i32 @device_printf(i32 noundef %33, ptr noundef nonnull @.str, i64 noundef %11) #2
br label %35
35: ; preds = %22, %32, %10
%36 = add nuw i64 %11, 1
%37 = load i64, ptr %0, align 8, !tbaa !11
%38 = icmp ult i64 %36, %37
br i1 %38, label %10, label %39, !llvm.loop !19
39: ; preds = %35, %1
%40 = load i32, ptr @FILTER_HANDLED, align 4, !tbaa !21
ret i32 %40
}
declare i32 @ti_gpio_intr_status(ptr noundef) local_unnamed_addr #1
declare i64 @ti_gpio_isrc_is_level(ptr noundef) local_unnamed_addr #1
declare i32 @ti_gpio_isrc_eoi(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @intr_isrc_dispatch(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ti_gpio_isrc_mask(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_2__", !6, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"ti_gpio_softc", !13, i64 0, !14, i64 8, !6, i64 16}
!13 = !{!"long", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !6, i64 16}
!16 = !{!17, !14, i64 0}
!17 = !{!"ti_gpio_irqsrc", !14, i64 0, !14, i64 4}
!18 = !{!12, !14, i64 8}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!14, !14, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/arm/ti/extr_ti_gpio.c_ti_gpio_intr.c'
source_filename = "AnghaBench/freebsd/sys/arm/ti/extr_ti_gpio.c_ti_gpio_intr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.ti_gpio_irqsrc = type { i32, i32 }
@curthread = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [23 x i8] c"Stray irq %u disabled\0A\00", align 1
@FILTER_HANDLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ti_gpio_intr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ti_gpio_intr(ptr noundef %0) #0 {
%2 = load ptr, ptr @curthread, align 8, !tbaa !6
%3 = load ptr, ptr %2, align 8, !tbaa !10
%4 = tail call i32 @ti_gpio_intr_status(ptr noundef %0) #2
%5 = load i64, ptr %0, align 8, !tbaa !12
%6 = icmp eq i64 %5, 0
br i1 %6, label %39, label %7
7: ; preds = %1
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = getelementptr inbounds i8, ptr %0, i64 8
br label %10
10: ; preds = %7, %35
%11 = phi i64 [ 0, %7 ], [ %36, %35 ]
%12 = load ptr, ptr %8, align 8, !tbaa !16
%13 = getelementptr inbounds %struct.ti_gpio_irqsrc, ptr %12, i64 %11
%14 = load i32, ptr %13, align 4, !tbaa !17
%15 = and i32 %14, %4
%16 = icmp eq i32 %15, 0
br i1 %16, label %35, label %17
17: ; preds = %10
%18 = tail call i64 @ti_gpio_isrc_is_level(ptr noundef nonnull %13) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %17
%21 = tail call i32 @ti_gpio_isrc_eoi(ptr noundef nonnull %0, ptr noundef nonnull %13) #2
br label %22
22: ; preds = %20, %17
%23 = getelementptr inbounds i8, ptr %13, i64 4
%24 = tail call i64 @intr_isrc_dispatch(ptr noundef nonnull %23, ptr noundef %3) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %35, label %26
26: ; preds = %22
%27 = tail call i32 @ti_gpio_isrc_mask(ptr noundef nonnull %0, ptr noundef nonnull %13) #2
%28 = tail call i64 @ti_gpio_isrc_is_level(ptr noundef nonnull %13) #2
%29 = icmp eq i64 %28, 0
br i1 %29, label %32, label %30
30: ; preds = %26
%31 = tail call i32 @ti_gpio_isrc_eoi(ptr noundef nonnull %0, ptr noundef nonnull %13) #2
br label %32
32: ; preds = %30, %26
%33 = load i32, ptr %9, align 8, !tbaa !19
%34 = tail call i32 @device_printf(i32 noundef %33, ptr noundef nonnull @.str, i64 noundef %11) #2
br label %35
35: ; preds = %22, %32, %10
%36 = add nuw i64 %11, 1
%37 = load i64, ptr %0, align 8, !tbaa !12
%38 = icmp ult i64 %36, %37
br i1 %38, label %10, label %39, !llvm.loop !20
39: ; preds = %35, %1
%40 = load i32, ptr @FILTER_HANDLED, align 4, !tbaa !22
ret i32 %40
}
declare i32 @ti_gpio_intr_status(ptr noundef) local_unnamed_addr #1
declare i64 @ti_gpio_isrc_is_level(ptr noundef) local_unnamed_addr #1
declare i32 @ti_gpio_isrc_eoi(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @intr_isrc_dispatch(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ti_gpio_isrc_mask(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"ti_gpio_softc", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"long", !8, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!13, !7, i64 16}
!17 = !{!18, !15, i64 0}
!18 = !{!"ti_gpio_irqsrc", !15, i64 0, !15, i64 4}
!19 = !{!13, !15, i64 8}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!15, !15, i64 0}
|
freebsd_sys_arm_ti_extr_ti_gpio.c_ti_gpio_intr
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/misc/eeprom/extr_eeprom_93cx6.c_eeprom_93cx6_pulse_high.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/misc/eeprom/extr_eeprom_93cx6.c_eeprom_93cx6_pulse_high.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.eeprom_93cx6 = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @eeprom_93cx6_pulse_high], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @eeprom_93cx6_pulse_high(ptr noundef %0) #0 {
store i32 1, ptr %0, align 8, !tbaa !5
%2 = getelementptr inbounds %struct.eeprom_93cx6, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !11
%4 = tail call i32 %3(ptr noundef nonnull %0) #2
%5 = tail call i32 @ndelay(i32 noundef 450) #2
ret void
}
declare i32 @ndelay(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"eeprom_93cx6", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/misc/eeprom/extr_eeprom_93cx6.c_eeprom_93cx6_pulse_high.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/misc/eeprom/extr_eeprom_93cx6.c_eeprom_93cx6_pulse_high.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @eeprom_93cx6_pulse_high], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @eeprom_93cx6_pulse_high(ptr noundef %0) #0 {
store i32 1, ptr %0, align 8, !tbaa !6
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !12
%4 = tail call i32 %3(ptr noundef nonnull %0) #2
%5 = tail call i32 @ndelay(i32 noundef 450) #2
ret void
}
declare i32 @ndelay(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"eeprom_93cx6", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
|
fastsocket_kernel_drivers_misc_eeprom_extr_eeprom_93cx6.c_eeprom_93cx6_pulse_high
|
; ModuleID = 'AnghaBench/postgres/contrib/pg_stat_statements/extr_pg_stat_statements.c_pgss_memsize.c'
source_filename = "AnghaBench/postgres/contrib/pg_stat_statements/extr_pg_stat_statements.c_pgss_memsize.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@pgss_max = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pgss_memsize], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pgss_memsize() #0 {
%1 = tail call i32 @MAXALIGN(i32 noundef 4) #2
%2 = load i32, ptr @pgss_max, align 4, !tbaa !5
%3 = tail call i32 @hash_estimate_size(i32 noundef %2, i32 noundef 4) #2
%4 = tail call i32 @add_size(i32 noundef %1, i32 noundef %3) #2
ret i32 %4
}
declare i32 @MAXALIGN(i32 noundef) local_unnamed_addr #1
declare i32 @add_size(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hash_estimate_size(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/postgres/contrib/pg_stat_statements/extr_pg_stat_statements.c_pgss_memsize.c'
source_filename = "AnghaBench/postgres/contrib/pg_stat_statements/extr_pg_stat_statements.c_pgss_memsize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@pgss_max = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pgss_memsize], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pgss_memsize() #0 {
%1 = tail call i32 @MAXALIGN(i32 noundef 4) #2
%2 = load i32, ptr @pgss_max, align 4, !tbaa !6
%3 = tail call i32 @hash_estimate_size(i32 noundef %2, i32 noundef 4) #2
%4 = tail call i32 @add_size(i32 noundef %1, i32 noundef %3) #2
ret i32 %4
}
declare i32 @MAXALIGN(i32 noundef) local_unnamed_addr #1
declare i32 @add_size(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hash_estimate_size(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
postgres_contrib_pg_stat_statements_extr_pg_stat_statements.c_pgss_memsize
|
; ModuleID = 'AnghaBench/RetroArch/deps/pthreads/platform/helper/extr_tls-helper.c_pteTlsAlloc.c'
source_filename = "AnghaBench/RetroArch/deps/pthreads/platform/helper/extr_tls-helper.c_pteTlsAlloc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PTE_OS_NO_RESOURCES = dso_local local_unnamed_addr global i32 0, align 4
@globalTlsLock = dso_local local_unnamed_addr global i32 0, align 4
@maxTlsValues = dso_local local_unnamed_addr global i32 0, align 4
@keysUsed = dso_local local_unnamed_addr global ptr null, align 8
@PTE_OS_OK = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @pteTlsAlloc(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @PTE_OS_NO_RESOURCES, align 4, !tbaa !5
%3 = load i32, ptr @globalTlsLock, align 4, !tbaa !5
%4 = tail call i32 @pte_osMutexLock(i32 noundef %3) #2
%5 = load i32, ptr @maxTlsValues, align 4, !tbaa !5
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %23
7: ; preds = %1
%8 = load ptr, ptr @keysUsed, align 8, !tbaa !9
%9 = zext nneg i32 %5 to i64
br label %10
10: ; preds = %7, %20
%11 = phi i64 [ 0, %7 ], [ %21, %20 ]
%12 = getelementptr inbounds i32, ptr %8, i64 %11
%13 = load i32, ptr %12, align 4, !tbaa !5
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %10
%16 = getelementptr inbounds i32, ptr %8, i64 %11
%17 = trunc i64 %11 to i32
store i32 1, ptr %16, align 4, !tbaa !5
%18 = add nuw nsw i32 %17, 1
store i32 %18, ptr %0, align 4, !tbaa !5
%19 = load i32, ptr @PTE_OS_OK, align 4, !tbaa !5
br label %23
20: ; preds = %10
%21 = add nuw nsw i64 %11, 1
%22 = icmp eq i64 %21, %9
br i1 %22, label %23, label %10, !llvm.loop !11
23: ; preds = %20, %1, %15
%24 = phi i32 [ %19, %15 ], [ %2, %1 ], [ %2, %20 ]
%25 = load i32, ptr @globalTlsLock, align 4, !tbaa !5
%26 = tail call i32 @pte_osMutexUnlock(i32 noundef %25) #2
ret i32 %24
}
declare i32 @pte_osMutexLock(i32 noundef) local_unnamed_addr #1
declare i32 @pte_osMutexUnlock(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/RetroArch/deps/pthreads/platform/helper/extr_tls-helper.c_pteTlsAlloc.c'
source_filename = "AnghaBench/RetroArch/deps/pthreads/platform/helper/extr_tls-helper.c_pteTlsAlloc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PTE_OS_NO_RESOURCES = common local_unnamed_addr global i32 0, align 4
@globalTlsLock = common local_unnamed_addr global i32 0, align 4
@maxTlsValues = common local_unnamed_addr global i32 0, align 4
@keysUsed = common local_unnamed_addr global ptr null, align 8
@PTE_OS_OK = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @pteTlsAlloc(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @PTE_OS_NO_RESOURCES, align 4, !tbaa !6
%3 = load i32, ptr @globalTlsLock, align 4, !tbaa !6
%4 = tail call i32 @pte_osMutexLock(i32 noundef %3) #2
%5 = load i32, ptr @maxTlsValues, align 4, !tbaa !6
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %23
7: ; preds = %1
%8 = load ptr, ptr @keysUsed, align 8, !tbaa !10
%9 = zext nneg i32 %5 to i64
br label %10
10: ; preds = %7, %20
%11 = phi i64 [ 0, %7 ], [ %21, %20 ]
%12 = getelementptr inbounds i32, ptr %8, i64 %11
%13 = load i32, ptr %12, align 4, !tbaa !6
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %10
%16 = getelementptr inbounds i32, ptr %8, i64 %11
%17 = trunc nuw nsw i64 %11 to i32
store i32 1, ptr %16, align 4, !tbaa !6
%18 = add nuw nsw i32 %17, 1
store i32 %18, ptr %0, align 4, !tbaa !6
%19 = load i32, ptr @PTE_OS_OK, align 4, !tbaa !6
br label %23
20: ; preds = %10
%21 = add nuw nsw i64 %11, 1
%22 = icmp eq i64 %21, %9
br i1 %22, label %23, label %10, !llvm.loop !12
23: ; preds = %20, %1, %15
%24 = phi i32 [ %19, %15 ], [ %2, %1 ], [ %2, %20 ]
%25 = load i32, ptr @globalTlsLock, align 4, !tbaa !6
%26 = tail call i32 @pte_osMutexUnlock(i32 noundef %25) #2
ret i32 %24
}
declare i32 @pte_osMutexLock(i32 noundef) local_unnamed_addr #1
declare i32 @pte_osMutexUnlock(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
|
RetroArch_deps_pthreads_platform_helper_extr_tls-helper.c_pteTlsAlloc
|
; ModuleID = 'AnghaBench/freebsd/lib/libc/stdlib/extr_atoi.c_atoi_l.c'
source_filename = "AnghaBench/freebsd/lib/libc/stdlib/extr_atoi.c_atoi_l.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @atoi_l(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i64 @strtol_l(ptr noundef %0, ptr noundef null, i32 noundef 10, i32 noundef %1) #2
%4 = trunc i64 %3 to i32
ret i32 %4
}
declare i64 @strtol_l(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/lib/libc/stdlib/extr_atoi.c_atoi_l.c'
source_filename = "AnghaBench/freebsd/lib/libc/stdlib/extr_atoi.c_atoi_l.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @atoi_l(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i64 @strtol_l(ptr noundef %0, ptr noundef null, i32 noundef 10, i32 noundef %1) #2
%4 = trunc i64 %3 to i32
ret i32 %4
}
declare i64 @strtol_l(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_lib_libc_stdlib_extr_atoi.c_atoi_l
|
; ModuleID = 'AnghaBench/linux/drivers/crypto/caam/extr_caamhash.c_caam_algapi_hash_init.c'
source_filename = "AnghaBench/linux/drivers/crypto/caam/extr_caamhash.c_caam_algapi_hash_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.caam_drv_private = type { i32, ptr }
%struct.TYPE_11__ = type { %struct.TYPE_10__, %struct.TYPE_9__ }
%struct.TYPE_10__ = type { i32 }
%struct.TYPE_9__ = type { i32, i32 }
%struct.caam_hash_template = type { i32, i32, i32, %struct.TYPE_13__ }
%struct.TYPE_13__ = type { %struct.TYPE_12__ }
%struct.TYPE_12__ = type { i32 }
%struct.caam_hash_alg = type { i32, %struct.TYPE_16__ }
%struct.TYPE_16__ = type { %struct.TYPE_15__ }
%struct.TYPE_15__ = type { %struct.TYPE_14__ }
%struct.TYPE_14__ = type { i32 }
@SHA512_DIGEST_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@CHA_ID_LS_MD_MASK = dso_local local_unnamed_addr global i32 0, align 4
@CHA_ID_LS_MD_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@CHA_VER_VID_MASK = dso_local local_unnamed_addr global i32 0, align 4
@CHA_VER_VID_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@CHA_VER_NUM_MASK = dso_local local_unnamed_addr global i32 0, align 4
@CHA_VER_VID_MD_LP256 = dso_local local_unnamed_addr global i32 0, align 4
@SHA256_DIGEST_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@hash_list = dso_local global i32 0, align 4
@driver_hash = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [26 x i8] c"%s alg allocation failed\0A\00", align 1
@.str.1 = private unnamed_addr constant [32 x i8] c"%s alg registration failed: %d\0A\00", align 1
@OP_ALG_ALGSEL_MASK = dso_local local_unnamed_addr global i32 0, align 4
@OP_ALG_ALGSEL_AES = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @caam_algapi_hash_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%3 = load i32, ptr @SHA512_DIGEST_SIZE, align 4, !tbaa !5
%4 = load i32, ptr %2, align 8, !tbaa !9
%5 = icmp slt i32 %4, 10
%6 = getelementptr inbounds %struct.caam_drv_private, ptr %2, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !12
br i1 %5, label %8, label %22
8: ; preds = %1
%9 = getelementptr inbounds %struct.TYPE_11__, ptr %7, i64 0, i32 1, i32 1
%10 = tail call i32 @rd_reg32(ptr noundef nonnull %9) #2
%11 = load i32, ptr @CHA_ID_LS_MD_MASK, align 4, !tbaa !5
%12 = and i32 %11, %10
%13 = load i32, ptr @CHA_ID_LS_MD_SHIFT, align 4, !tbaa !5
%14 = ashr i32 %12, %13
%15 = load ptr, ptr %6, align 8, !tbaa !12
%16 = getelementptr inbounds %struct.TYPE_11__, ptr %15, i64 0, i32 1
%17 = tail call i32 @rd_reg32(ptr noundef nonnull %16) #2
%18 = load i32, ptr @CHA_ID_LS_MD_MASK, align 4, !tbaa !5
%19 = and i32 %18, %17
%20 = load i32, ptr @CHA_ID_LS_MD_SHIFT, align 4, !tbaa !5
%21 = ashr i32 %19, %20
br label %30
22: ; preds = %1
%23 = tail call i32 @rd_reg32(ptr noundef %7) #2
%24 = load i32, ptr @CHA_VER_VID_MASK, align 4, !tbaa !5
%25 = and i32 %24, %23
%26 = load i32, ptr @CHA_VER_VID_SHIFT, align 4, !tbaa !5
%27 = ashr i32 %25, %26
%28 = load i32, ptr @CHA_VER_NUM_MASK, align 4, !tbaa !5
%29 = and i32 %28, %23
br label %30
30: ; preds = %22, %8
%31 = phi i32 [ %21, %8 ], [ %29, %22 ]
%32 = phi i32 [ %14, %8 ], [ %27, %22 ]
%33 = icmp eq i32 %31, 0
br i1 %33, label %106, label %34
34: ; preds = %30
%35 = load i32, ptr @CHA_VER_VID_MD_LP256, align 4, !tbaa !5
%36 = icmp eq i32 %32, %35
%37 = load i32, ptr @SHA256_DIGEST_SIZE, align 4
%38 = select i1 %36, i32 %37, i32 %3
%39 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull @hash_list) #2
%40 = load ptr, ptr @driver_hash, align 8, !tbaa !13
%41 = tail call i32 @ARRAY_SIZE(ptr noundef %40) #2
%42 = icmp sgt i32 %41, 0
br i1 %42, label %43, label %106
43: ; preds = %34, %99
%44 = phi i64 [ %101, %99 ], [ 0, %34 ]
%45 = phi i32 [ %100, %99 ], [ 0, %34 ]
%46 = load ptr, ptr @driver_hash, align 8, !tbaa !13
%47 = getelementptr inbounds %struct.caam_hash_template, ptr %46, i64 %44
%48 = load i32, ptr %47, align 4, !tbaa !14
%49 = tail call i64 @is_mdha(i32 noundef %48) #2
%50 = icmp eq i64 %49, 0
br i1 %50, label %55, label %51
51: ; preds = %43
%52 = getelementptr inbounds %struct.caam_hash_template, ptr %46, i64 %44, i32 3
%53 = load i32, ptr %52, align 4, !tbaa !18
%54 = icmp ugt i32 %53, %38
br i1 %54, label %99, label %55
55: ; preds = %51, %43
%56 = tail call ptr @caam_hash_alloc(ptr noundef nonnull %47, i32 noundef 1) #2
%57 = tail call i64 @IS_ERR(ptr noundef %56) #2
%58 = icmp eq i64 %57, 0
br i1 %58, label %64, label %59
59: ; preds = %55
%60 = tail call i32 @PTR_ERR(ptr noundef %56) #2
%61 = getelementptr inbounds %struct.caam_hash_template, ptr %46, i64 %44, i32 2
%62 = load i32, ptr %61, align 4, !tbaa !19
%63 = tail call i32 (ptr, i32, ...) @pr_warn(ptr noundef nonnull @.str, i32 noundef %62) #2
br label %99
64: ; preds = %55
%65 = getelementptr inbounds %struct.caam_hash_alg, ptr %56, i64 0, i32 1
%66 = tail call i32 @crypto_register_ahash(ptr noundef nonnull %65) #2
%67 = icmp eq i32 %66, 0
br i1 %67, label %72, label %68
68: ; preds = %64
%69 = load i32, ptr %65, align 4, !tbaa !20
%70 = tail call i32 (ptr, i32, ...) @pr_warn(ptr noundef nonnull @.str.1, i32 noundef %69, i32 noundef %66) #2
%71 = tail call i32 @kfree(ptr noundef %56) #2
br label %74
72: ; preds = %64
%73 = tail call i32 @list_add_tail(ptr noundef %56, ptr noundef nonnull @hash_list) #2
br label %74
74: ; preds = %72, %68
%75 = load i32, ptr %47, align 4, !tbaa !14
%76 = load i32, ptr @OP_ALG_ALGSEL_MASK, align 4, !tbaa !5
%77 = and i32 %76, %75
%78 = load i32, ptr @OP_ALG_ALGSEL_AES, align 4, !tbaa !5
%79 = icmp eq i32 %77, %78
br i1 %79, label %99, label %80
80: ; preds = %74
%81 = tail call ptr @caam_hash_alloc(ptr noundef nonnull %47, i32 noundef 0) #2
%82 = tail call i64 @IS_ERR(ptr noundef %81) #2
%83 = icmp eq i64 %82, 0
br i1 %83, label %89, label %84
84: ; preds = %80
%85 = tail call i32 @PTR_ERR(ptr noundef %81) #2
%86 = getelementptr inbounds %struct.caam_hash_template, ptr %46, i64 %44, i32 1
%87 = load i32, ptr %86, align 4, !tbaa !25
%88 = tail call i32 (ptr, i32, ...) @pr_warn(ptr noundef nonnull @.str, i32 noundef %87) #2
br label %99
89: ; preds = %80
%90 = getelementptr inbounds %struct.caam_hash_alg, ptr %81, i64 0, i32 1
%91 = tail call i32 @crypto_register_ahash(ptr noundef nonnull %90) #2
%92 = icmp eq i32 %91, 0
br i1 %92, label %97, label %93
93: ; preds = %89
%94 = load i32, ptr %90, align 4, !tbaa !20
%95 = tail call i32 (ptr, i32, ...) @pr_warn(ptr noundef nonnull @.str.1, i32 noundef %94, i32 noundef %91) #2
%96 = tail call i32 @kfree(ptr noundef %81) #2
br label %99
97: ; preds = %89
%98 = tail call i32 @list_add_tail(ptr noundef %81, ptr noundef nonnull @hash_list) #2
br label %99
99: ; preds = %93, %97, %74, %51, %84, %59
%100 = phi i32 [ %60, %59 ], [ %85, %84 ], [ %45, %51 ], [ %66, %74 ], [ 0, %97 ], [ %91, %93 ]
%101 = add nuw nsw i64 %44, 1
%102 = load ptr, ptr @driver_hash, align 8, !tbaa !13
%103 = tail call i32 @ARRAY_SIZE(ptr noundef %102) #2
%104 = sext i32 %103 to i64
%105 = icmp slt i64 %101, %104
br i1 %105, label %43, label %106, !llvm.loop !26
106: ; preds = %99, %34, %30
%107 = phi i32 [ 0, %30 ], [ 0, %34 ], [ %100, %99 ]
ret i32 %107
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @rd_reg32(ptr noundef) local_unnamed_addr #1
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i64 @is_mdha(i32 noundef) local_unnamed_addr #1
declare ptr @caam_hash_alloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @pr_warn(ptr noundef, i32 noundef, ...) local_unnamed_addr #1
declare i32 @crypto_register_ahash(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"caam_drv_private", !6, i64 0, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!11, !11, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"caam_hash_template", !6, i64 0, !6, i64 4, !6, i64 8, !16, i64 12}
!16 = !{!"TYPE_13__", !17, i64 0}
!17 = !{!"TYPE_12__", !6, i64 0}
!18 = !{!15, !6, i64 12}
!19 = !{!15, !6, i64 8}
!20 = !{!21, !6, i64 4}
!21 = !{!"caam_hash_alg", !6, i64 0, !22, i64 4}
!22 = !{!"TYPE_16__", !23, i64 0}
!23 = !{!"TYPE_15__", !24, i64 0}
!24 = !{!"TYPE_14__", !6, i64 0}
!25 = !{!15, !6, i64 4}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/crypto/caam/extr_caamhash.c_caam_algapi_hash_init.c'
source_filename = "AnghaBench/linux/drivers/crypto/caam/extr_caamhash.c_caam_algapi_hash_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.caam_hash_template = type { i32, i32, i32, %struct.TYPE_13__ }
%struct.TYPE_13__ = type { %struct.TYPE_12__ }
%struct.TYPE_12__ = type { i32 }
@SHA512_DIGEST_SIZE = common local_unnamed_addr global i32 0, align 4
@CHA_ID_LS_MD_MASK = common local_unnamed_addr global i32 0, align 4
@CHA_ID_LS_MD_SHIFT = common local_unnamed_addr global i32 0, align 4
@CHA_VER_VID_MASK = common local_unnamed_addr global i32 0, align 4
@CHA_VER_VID_SHIFT = common local_unnamed_addr global i32 0, align 4
@CHA_VER_NUM_MASK = common local_unnamed_addr global i32 0, align 4
@CHA_VER_VID_MD_LP256 = common local_unnamed_addr global i32 0, align 4
@SHA256_DIGEST_SIZE = common local_unnamed_addr global i32 0, align 4
@hash_list = common global i32 0, align 4
@driver_hash = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [26 x i8] c"%s alg allocation failed\0A\00", align 1
@.str.1 = private unnamed_addr constant [32 x i8] c"%s alg registration failed: %d\0A\00", align 1
@OP_ALG_ALGSEL_MASK = common local_unnamed_addr global i32 0, align 4
@OP_ALG_ALGSEL_AES = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @caam_algapi_hash_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%3 = load i32, ptr @SHA512_DIGEST_SIZE, align 4, !tbaa !6
%4 = load i32, ptr %2, align 8, !tbaa !10
%5 = icmp slt i32 %4, 10
%6 = getelementptr inbounds i8, ptr %2, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !13
br i1 %5, label %8, label %22
8: ; preds = %1
%9 = getelementptr inbounds i8, ptr %7, i64 8
%10 = tail call i32 @rd_reg32(ptr noundef nonnull %9) #2
%11 = load i32, ptr @CHA_ID_LS_MD_MASK, align 4, !tbaa !6
%12 = and i32 %11, %10
%13 = load i32, ptr @CHA_ID_LS_MD_SHIFT, align 4, !tbaa !6
%14 = ashr i32 %12, %13
%15 = load ptr, ptr %6, align 8, !tbaa !13
%16 = getelementptr inbounds i8, ptr %15, i64 4
%17 = tail call i32 @rd_reg32(ptr noundef nonnull %16) #2
%18 = load i32, ptr @CHA_ID_LS_MD_MASK, align 4, !tbaa !6
%19 = and i32 %18, %17
%20 = load i32, ptr @CHA_ID_LS_MD_SHIFT, align 4, !tbaa !6
%21 = ashr i32 %19, %20
br label %30
22: ; preds = %1
%23 = tail call i32 @rd_reg32(ptr noundef %7) #2
%24 = load i32, ptr @CHA_VER_VID_MASK, align 4, !tbaa !6
%25 = and i32 %24, %23
%26 = load i32, ptr @CHA_VER_VID_SHIFT, align 4, !tbaa !6
%27 = ashr i32 %25, %26
%28 = load i32, ptr @CHA_VER_NUM_MASK, align 4, !tbaa !6
%29 = and i32 %28, %23
br label %30
30: ; preds = %22, %8
%31 = phi i32 [ %21, %8 ], [ %29, %22 ]
%32 = phi i32 [ %14, %8 ], [ %27, %22 ]
%33 = icmp eq i32 %31, 0
br i1 %33, label %106, label %34
34: ; preds = %30
%35 = load i32, ptr @CHA_VER_VID_MD_LP256, align 4, !tbaa !6
%36 = icmp eq i32 %32, %35
%37 = load i32, ptr @SHA256_DIGEST_SIZE, align 4
%38 = select i1 %36, i32 %37, i32 %3
%39 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull @hash_list) #2
%40 = load ptr, ptr @driver_hash, align 8, !tbaa !14
%41 = tail call i32 @ARRAY_SIZE(ptr noundef %40) #2
%42 = icmp sgt i32 %41, 0
br i1 %42, label %43, label %106
43: ; preds = %34, %99
%44 = phi i64 [ %101, %99 ], [ 0, %34 ]
%45 = phi i32 [ %100, %99 ], [ 0, %34 ]
%46 = load ptr, ptr @driver_hash, align 8, !tbaa !14
%47 = getelementptr inbounds %struct.caam_hash_template, ptr %46, i64 %44
%48 = load i32, ptr %47, align 4, !tbaa !15
%49 = tail call i64 @is_mdha(i32 noundef %48) #2
%50 = icmp eq i64 %49, 0
br i1 %50, label %55, label %51
51: ; preds = %43
%52 = getelementptr inbounds i8, ptr %47, i64 12
%53 = load i32, ptr %52, align 4, !tbaa !19
%54 = icmp ugt i32 %53, %38
br i1 %54, label %99, label %55
55: ; preds = %51, %43
%56 = tail call ptr @caam_hash_alloc(ptr noundef nonnull %47, i32 noundef 1) #2
%57 = tail call i64 @IS_ERR(ptr noundef %56) #2
%58 = icmp eq i64 %57, 0
br i1 %58, label %64, label %59
59: ; preds = %55
%60 = tail call i32 @PTR_ERR(ptr noundef %56) #2
%61 = getelementptr inbounds i8, ptr %47, i64 8
%62 = load i32, ptr %61, align 4, !tbaa !20
%63 = tail call i32 (ptr, i32, ...) @pr_warn(ptr noundef nonnull @.str, i32 noundef %62) #2
br label %99
64: ; preds = %55
%65 = getelementptr inbounds i8, ptr %56, i64 4
%66 = tail call i32 @crypto_register_ahash(ptr noundef nonnull %65) #2
%67 = icmp eq i32 %66, 0
br i1 %67, label %72, label %68
68: ; preds = %64
%69 = load i32, ptr %65, align 4, !tbaa !21
%70 = tail call i32 (ptr, i32, ...) @pr_warn(ptr noundef nonnull @.str.1, i32 noundef %69, i32 noundef %66) #2
%71 = tail call i32 @kfree(ptr noundef %56) #2
br label %74
72: ; preds = %64
%73 = tail call i32 @list_add_tail(ptr noundef %56, ptr noundef nonnull @hash_list) #2
br label %74
74: ; preds = %72, %68
%75 = load i32, ptr %47, align 4, !tbaa !15
%76 = load i32, ptr @OP_ALG_ALGSEL_MASK, align 4, !tbaa !6
%77 = and i32 %76, %75
%78 = load i32, ptr @OP_ALG_ALGSEL_AES, align 4, !tbaa !6
%79 = icmp eq i32 %77, %78
br i1 %79, label %99, label %80
80: ; preds = %74
%81 = tail call ptr @caam_hash_alloc(ptr noundef nonnull %47, i32 noundef 0) #2
%82 = tail call i64 @IS_ERR(ptr noundef %81) #2
%83 = icmp eq i64 %82, 0
br i1 %83, label %89, label %84
84: ; preds = %80
%85 = tail call i32 @PTR_ERR(ptr noundef %81) #2
%86 = getelementptr inbounds i8, ptr %47, i64 4
%87 = load i32, ptr %86, align 4, !tbaa !26
%88 = tail call i32 (ptr, i32, ...) @pr_warn(ptr noundef nonnull @.str, i32 noundef %87) #2
br label %99
89: ; preds = %80
%90 = getelementptr inbounds i8, ptr %81, i64 4
%91 = tail call i32 @crypto_register_ahash(ptr noundef nonnull %90) #2
%92 = icmp eq i32 %91, 0
br i1 %92, label %97, label %93
93: ; preds = %89
%94 = load i32, ptr %90, align 4, !tbaa !21
%95 = tail call i32 (ptr, i32, ...) @pr_warn(ptr noundef nonnull @.str.1, i32 noundef %94, i32 noundef %91) #2
%96 = tail call i32 @kfree(ptr noundef %81) #2
br label %99
97: ; preds = %89
%98 = tail call i32 @list_add_tail(ptr noundef %81, ptr noundef nonnull @hash_list) #2
br label %99
99: ; preds = %93, %97, %74, %51, %84, %59
%100 = phi i32 [ %60, %59 ], [ %85, %84 ], [ %45, %51 ], [ %66, %74 ], [ 0, %97 ], [ %91, %93 ]
%101 = add nuw nsw i64 %44, 1
%102 = load ptr, ptr @driver_hash, align 8, !tbaa !14
%103 = tail call i32 @ARRAY_SIZE(ptr noundef %102) #2
%104 = sext i32 %103 to i64
%105 = icmp slt i64 %101, %104
br i1 %105, label %43, label %106, !llvm.loop !27
106: ; preds = %99, %34, %30
%107 = phi i32 [ 0, %30 ], [ 0, %34 ], [ %100, %99 ]
ret i32 %107
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @rd_reg32(ptr noundef) local_unnamed_addr #1
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i64 @is_mdha(i32 noundef) local_unnamed_addr #1
declare ptr @caam_hash_alloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @pr_warn(ptr noundef, i32 noundef, ...) local_unnamed_addr #1
declare i32 @crypto_register_ahash(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"caam_drv_private", !7, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!12, !12, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"caam_hash_template", !7, i64 0, !7, i64 4, !7, i64 8, !17, i64 12}
!17 = !{!"TYPE_13__", !18, i64 0}
!18 = !{!"TYPE_12__", !7, i64 0}
!19 = !{!16, !7, i64 12}
!20 = !{!16, !7, i64 8}
!21 = !{!22, !7, i64 4}
!22 = !{!"caam_hash_alg", !7, i64 0, !23, i64 4}
!23 = !{!"TYPE_16__", !24, i64 0}
!24 = !{!"TYPE_15__", !25, i64 0}
!25 = !{!"TYPE_14__", !7, i64 0}
!26 = !{!16, !7, i64 4}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_crypto_caam_extr_caamhash.c_caam_algapi_hash_init
|
; ModuleID = 'AnghaBench/reactos/dll/win32/urlmon/extr_gopher.c_GopherProtocol_close_connection.c'
source_filename = "AnghaBench/reactos/dll/win32/urlmon/extr_gopher.c_GopherProtocol_close_connection.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @GopherProtocol_close_connection], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @GopherProtocol_close_connection(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/reactos/dll/win32/urlmon/extr_gopher.c_GopherProtocol_close_connection.c'
source_filename = "AnghaBench/reactos/dll/win32/urlmon/extr_gopher.c_GopherProtocol_close_connection.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @GopherProtocol_close_connection], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @GopherProtocol_close_connection(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
reactos_dll_win32_urlmon_extr_gopher.c_GopherProtocol_close_connection
|
; ModuleID = 'AnghaBench/linux/drivers/cpufreq/extr_arm_big_little.c_bL_cpufreq_set_target.c'
source_filename = "AnghaBench/linux/drivers/cpufreq/extr_arm_big_little.c_bL_cpufreq_set_target.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32 }
%struct.cpufreq_policy = type { i64, %struct.TYPE_3__, i32 }
%struct.TYPE_3__ = type { i32 }
@physical_cluster = dso_local local_unnamed_addr global i32 0, align 4
@freq_table = dso_local local_unnamed_addr global ptr null, align 8
@A15_CLUSTER = dso_local local_unnamed_addr global i64 0, align 8
@clk_big_min = dso_local local_unnamed_addr global i32 0, align 4
@A7_CLUSTER = dso_local local_unnamed_addr global i64 0, align 8
@clk_little_max = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bL_cpufreq_set_target], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @bL_cpufreq_set_target(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = tail call i64 @cpu_to_cluster(i64 noundef %3) #2
%5 = load i32, ptr @physical_cluster, align 4, !tbaa !12
%6 = tail call i64 @per_cpu(i32 noundef %5, i64 noundef %3) #2
%7 = load ptr, ptr @freq_table, align 8, !tbaa !13
%8 = getelementptr inbounds ptr, ptr %7, i64 %4
%9 = load ptr, ptr %8, align 8, !tbaa !13
%10 = zext i32 %1 to i64
%11 = getelementptr inbounds %struct.TYPE_4__, ptr %9, i64 %10
%12 = load i32, ptr %11, align 4, !tbaa !15
%13 = tail call i64 (...) @is_bL_switching_enabled() #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %28, label %15
15: ; preds = %2
%16 = load i64, ptr @A15_CLUSTER, align 8
%17 = icmp eq i64 %6, %16
%18 = load i32, ptr @clk_big_min, align 4
%19 = icmp ult i32 %12, %18
%20 = select i1 %17, i1 %19, i1 false
%21 = load i64, ptr @A7_CLUSTER, align 8, !tbaa !17
br i1 %20, label %28, label %22
22: ; preds = %15
%23 = icmp eq i64 %6, %21
%24 = load i32, ptr @clk_little_max, align 4
%25 = icmp ugt i32 %12, %24
%26 = select i1 %23, i1 %25, i1 false
%27 = select i1 %26, i64 %16, i64 %6
br label %28
28: ; preds = %15, %22, %2
%29 = phi i64 [ %6, %2 ], [ %27, %22 ], [ %21, %15 ]
%30 = tail call i32 @bL_cpufreq_set_rate(i64 noundef %3, i64 noundef %6, i64 noundef %29, i32 noundef %12) #2
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %38
32: ; preds = %28
%33 = getelementptr inbounds %struct.cpufreq_policy, ptr %0, i64 0, i32 2
%34 = load i32, ptr %33, align 4, !tbaa !18
%35 = getelementptr inbounds %struct.cpufreq_policy, ptr %0, i64 0, i32 1
%36 = load i32, ptr %35, align 8, !tbaa !19
%37 = tail call i32 @arch_set_freq_scale(i32 noundef %34, i32 noundef %12, i32 noundef %36) #2
br label %38
38: ; preds = %32, %28
ret i32 %30
}
declare i64 @cpu_to_cluster(i64 noundef) local_unnamed_addr #1
declare i64 @per_cpu(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @is_bL_switching_enabled(...) local_unnamed_addr #1
declare i32 @bL_cpufreq_set_rate(i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @arch_set_freq_scale(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cpufreq_policy", !7, i64 0, !10, i64 8, !11, i64 12}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_3__", !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"TYPE_4__", !11, i64 0}
!17 = !{!7, !7, i64 0}
!18 = !{!6, !11, i64 12}
!19 = !{!6, !11, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/cpufreq/extr_arm_big_little.c_bL_cpufreq_set_target.c'
source_filename = "AnghaBench/linux/drivers/cpufreq/extr_arm_big_little.c_bL_cpufreq_set_target.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i32 }
@physical_cluster = common local_unnamed_addr global i32 0, align 4
@freq_table = common local_unnamed_addr global ptr null, align 8
@A15_CLUSTER = common local_unnamed_addr global i64 0, align 8
@clk_big_min = common local_unnamed_addr global i32 0, align 4
@A7_CLUSTER = common local_unnamed_addr global i64 0, align 8
@clk_little_max = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bL_cpufreq_set_target], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @bL_cpufreq_set_target(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = tail call i64 @cpu_to_cluster(i64 noundef %3) #2
%5 = load i32, ptr @physical_cluster, align 4, !tbaa !13
%6 = tail call i64 @per_cpu(i32 noundef %5, i64 noundef %3) #2
%7 = load ptr, ptr @freq_table, align 8, !tbaa !14
%8 = getelementptr inbounds ptr, ptr %7, i64 %4
%9 = load ptr, ptr %8, align 8, !tbaa !14
%10 = zext i32 %1 to i64
%11 = getelementptr inbounds %struct.TYPE_4__, ptr %9, i64 %10
%12 = load i32, ptr %11, align 4, !tbaa !16
%13 = tail call i64 @is_bL_switching_enabled() #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %28, label %15
15: ; preds = %2
%16 = load i64, ptr @A15_CLUSTER, align 8
%17 = icmp eq i64 %6, %16
%18 = load i32, ptr @clk_big_min, align 4
%19 = icmp ult i32 %12, %18
%20 = select i1 %17, i1 %19, i1 false
%21 = load i64, ptr @A7_CLUSTER, align 8, !tbaa !18
br i1 %20, label %28, label %22
22: ; preds = %15
%23 = icmp eq i64 %6, %21
%24 = load i32, ptr @clk_little_max, align 4
%25 = icmp ugt i32 %12, %24
%26 = select i1 %23, i1 %25, i1 false
%27 = select i1 %26, i64 %16, i64 %6
br label %28
28: ; preds = %15, %22, %2
%29 = phi i64 [ %6, %2 ], [ %27, %22 ], [ %21, %15 ]
%30 = tail call i32 @bL_cpufreq_set_rate(i64 noundef %3, i64 noundef %6, i64 noundef %29, i32 noundef %12) #2
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %38
32: ; preds = %28
%33 = getelementptr inbounds i8, ptr %0, i64 12
%34 = load i32, ptr %33, align 4, !tbaa !19
%35 = getelementptr inbounds i8, ptr %0, i64 8
%36 = load i32, ptr %35, align 8, !tbaa !20
%37 = tail call i32 @arch_set_freq_scale(i32 noundef %34, i32 noundef %12, i32 noundef %36) #2
br label %38
38: ; preds = %32, %28
ret i32 %30
}
declare i64 @cpu_to_cluster(i64 noundef) local_unnamed_addr #1
declare i64 @per_cpu(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @is_bL_switching_enabled(...) local_unnamed_addr #1
declare i32 @bL_cpufreq_set_rate(i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @arch_set_freq_scale(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cpufreq_policy", !8, i64 0, !11, i64 8, !12, i64 12}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_3__", !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!17, !12, i64 0}
!17 = !{!"TYPE_4__", !12, i64 0}
!18 = !{!8, !8, i64 0}
!19 = !{!7, !12, i64 12}
!20 = !{!7, !12, i64 8}
|
linux_drivers_cpufreq_extr_arm_big_little.c_bL_cpufreq_set_target
|
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/arm/extr_locks_arm.c_usimple_lock_init.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/arm/extr_locks_arm.c_usimple_lock_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @usimple_lock_init(ptr noundef %0, i16 noundef zeroext %1) local_unnamed_addr #0 {
%3 = tail call i32 @usld_lock_init(ptr noundef %0, i16 noundef zeroext %1) #2
%4 = tail call i32 @USLDBG(i32 noundef %3) #2
%5 = tail call i32 @hw_lock_init(ptr noundef %0) #2
ret void
}
declare i32 @USLDBG(i32 noundef) local_unnamed_addr #1
declare i32 @usld_lock_init(ptr noundef, i16 noundef zeroext) local_unnamed_addr #1
declare i32 @hw_lock_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/arm/extr_locks_arm.c_usimple_lock_init.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/arm/extr_locks_arm.c_usimple_lock_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @usimple_lock_init(ptr noundef %0, i16 noundef zeroext %1) local_unnamed_addr #0 {
%3 = tail call i32 @usld_lock_init(ptr noundef %0, i16 noundef zeroext %1) #2
%4 = tail call i32 @USLDBG(i32 noundef %3) #2
%5 = tail call i32 @hw_lock_init(ptr noundef %0) #2
ret void
}
declare i32 @USLDBG(i32 noundef) local_unnamed_addr #1
declare i32 @usld_lock_init(ptr noundef, i16 noundef zeroext) local_unnamed_addr #1
declare i32 @hw_lock_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
darwin-xnu_osfmk_arm_extr_locks_arm.c_usimple_lock_init
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/extr_farch.c_efx_farch_notify_tx_desc.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/extr_farch.c_efx_farch_notify_tx_desc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.efx_tx_queue = type { i32, i32, i32, i32 }
@FRF_AZ_TX_DESC_WPTR_DWORD = dso_local local_unnamed_addr global i32 0, align 4
@FR_AZ_TX_DESC_UPD_DWORD_P0 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @efx_farch_notify_tx_desc], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @efx_farch_notify_tx_desc(ptr nocapture noundef readonly %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.efx_tx_queue, ptr %0, i64 0, i32 1
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = and i32 %5, %3
%7 = load i32, ptr @FRF_AZ_TX_DESC_WPTR_DWORD, align 4, !tbaa !11
%8 = tail call i32 @EFX_POPULATE_DWORD_1(i32 noundef undef, i32 noundef %7, i32 noundef %6) #3
%9 = getelementptr inbounds %struct.efx_tx_queue, ptr %0, i64 0, i32 3
%10 = load i32, ptr %9, align 4, !tbaa !12
%11 = load i32, ptr @FR_AZ_TX_DESC_UPD_DWORD_P0, align 4, !tbaa !11
%12 = getelementptr inbounds %struct.efx_tx_queue, ptr %0, i64 0, i32 2
%13 = load i32, ptr %12, align 4, !tbaa !13
%14 = call i32 @efx_writed_page(i32 noundef %10, ptr noundef nonnull %2, i32 noundef %11, i32 noundef %13) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @EFX_POPULATE_DWORD_1(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @efx_writed_page(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"efx_tx_queue", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 12}
!13 = !{!6, !7, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/extr_farch.c_efx_farch_notify_tx_desc.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/extr_farch.c_efx_farch_notify_tx_desc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FRF_AZ_TX_DESC_WPTR_DWORD = common local_unnamed_addr global i32 0, align 4
@FR_AZ_TX_DESC_UPD_DWORD_P0 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @efx_farch_notify_tx_desc], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @efx_farch_notify_tx_desc(ptr nocapture noundef readonly %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = and i32 %5, %3
%7 = load i32, ptr @FRF_AZ_TX_DESC_WPTR_DWORD, align 4, !tbaa !12
%8 = tail call i32 @EFX_POPULATE_DWORD_1(i32 noundef undef, i32 noundef %7, i32 noundef %6) #3
%9 = getelementptr inbounds i8, ptr %0, i64 12
%10 = load i32, ptr %9, align 4, !tbaa !13
%11 = load i32, ptr @FR_AZ_TX_DESC_UPD_DWORD_P0, align 4, !tbaa !12
%12 = getelementptr inbounds i8, ptr %0, i64 8
%13 = load i32, ptr %12, align 4, !tbaa !14
%14 = call i32 @efx_writed_page(i32 noundef %10, ptr noundef nonnull %2, i32 noundef %11, i32 noundef %13) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @EFX_POPULATE_DWORD_1(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @efx_writed_page(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"efx_tx_queue", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 12}
!14 = !{!7, !8, i64 8}
|
linux_drivers_net_ethernet_sfc_extr_farch.c_efx_farch_notify_tx_desc
|
; ModuleID = 'AnghaBench/linux/drivers/phy/renesas/extr_phy-rcar-gen3-usb2.c_rcar_gen3_init_for_a_peri.c'
source_filename = "AnghaBench/linux/drivers/phy/renesas/extr_phy-rcar-gen3-usb2.c_rcar_gen3_init_for_a_peri.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @rcar_gen3_init_for_a_peri], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @rcar_gen3_init_for_a_peri(ptr noundef %0) #0 {
%2 = tail call i32 @rcar_gen3_set_linectrl(ptr noundef %0, i32 noundef 0, i32 noundef 1) #2
%3 = tail call i32 @rcar_gen3_set_host_mode(ptr noundef %0, i32 noundef 0) #2
%4 = tail call i32 @rcar_gen3_enable_vbus_ctrl(ptr noundef %0, i32 noundef 1) #2
ret void
}
declare i32 @rcar_gen3_set_linectrl(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rcar_gen3_set_host_mode(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rcar_gen3_enable_vbus_ctrl(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/phy/renesas/extr_phy-rcar-gen3-usb2.c_rcar_gen3_init_for_a_peri.c'
source_filename = "AnghaBench/linux/drivers/phy/renesas/extr_phy-rcar-gen3-usb2.c_rcar_gen3_init_for_a_peri.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rcar_gen3_init_for_a_peri], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @rcar_gen3_init_for_a_peri(ptr noundef %0) #0 {
%2 = tail call i32 @rcar_gen3_set_linectrl(ptr noundef %0, i32 noundef 0, i32 noundef 1) #2
%3 = tail call i32 @rcar_gen3_set_host_mode(ptr noundef %0, i32 noundef 0) #2
%4 = tail call i32 @rcar_gen3_enable_vbus_ctrl(ptr noundef %0, i32 noundef 1) #2
ret void
}
declare i32 @rcar_gen3_set_linectrl(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rcar_gen3_set_host_mode(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rcar_gen3_enable_vbus_ctrl(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_phy_renesas_extr_phy-rcar-gen3-usb2.c_rcar_gen3_init_for_a_peri
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/lasat/extr_interrupt.c_ls1bit32.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/lasat/extr_interrupt.c_ls1bit32.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ls1bit32], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal i32 @ls1bit32(i32 noundef %0) #0 {
%2 = and i32 %0, 65535
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 0, i32 16
%5 = xor i32 %4, 31
%6 = shl i32 %0, %4
%7 = and i32 %6, 16777215
%8 = icmp eq i32 %7, 0
%9 = select i1 %8, i32 0, i32 -8
%10 = select i1 %8, i32 0, i32 8
%11 = shl i32 %6, %10
%12 = and i32 %11, 268435455
%13 = icmp eq i32 %12, 0
%14 = select i1 %13, i32 0, i32 -4
%15 = select i1 %13, i32 0, i32 4
%16 = add nsw i32 %9, %14
%17 = shl i32 %11, %15
%18 = and i32 %17, 1073741823
%19 = icmp eq i32 %18, 0
%20 = select i1 %19, i32 0, i32 -2
%21 = select i1 %19, i32 2147483647, i32 536870911
%22 = and i32 %21, %17
%23 = icmp ne i32 %22, 0
%24 = sext i1 %23 to i32
%25 = add nsw i32 %16, %5
%26 = add nsw i32 %25, %20
%27 = add nsw i32 %26, %24
ret i32 %27
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/lasat/extr_interrupt.c_ls1bit32.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/lasat/extr_interrupt.c_ls1bit32.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ls1bit32], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 0, 32) i32 @ls1bit32(i32 noundef %0) #0 {
%2 = and i32 %0, 65535
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 0, i32 16
%5 = xor i32 %4, 31
%6 = shl i32 %0, %4
%7 = and i32 %6, 16777215
%8 = icmp eq i32 %7, 0
%9 = select i1 %8, i32 0, i32 -8
%10 = select i1 %8, i32 0, i32 8
%11 = shl i32 %6, %10
%12 = and i32 %11, 268435455
%13 = icmp eq i32 %12, 0
%14 = select i1 %13, i32 0, i32 -4
%15 = select i1 %13, i32 0, i32 4
%16 = add nsw i32 %9, %14
%17 = shl i32 %11, %15
%18 = and i32 %17, 1073741823
%19 = icmp eq i32 %18, 0
%20 = select i1 %19, i32 0, i32 -2
%21 = select i1 %19, i32 2147483647, i32 536870911
%22 = and i32 %21, %17
%23 = icmp ne i32 %22, 0
%24 = sext i1 %23 to i32
%25 = add nsw i32 %16, %5
%26 = add nsw i32 %25, %20
%27 = add nsw i32 %26, %24
ret i32 %27
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_arch_mips_lasat_extr_interrupt.c_ls1bit32
|
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Str.c_json_object_add.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Str.c_json_object_add.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { i32, i32, ptr, ptr }
@JSON_RET_ERROR = dso_local local_unnamed_addr global i64 0, align 8
@STARTING_CAPACITY = dso_local local_unnamed_addr global i32 0, align 4
@JSON_RET_OK = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @json_object_add], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @json_object_add(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = icmp eq ptr %0, null
%5 = icmp eq ptr %1, null
%6 = or i1 %4, %5
%7 = icmp eq ptr %2, null
%8 = or i1 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = load i64, ptr @JSON_RET_ERROR, align 8, !tbaa !5
br label %51
11: ; preds = %3
%12 = tail call ptr @JsonGet(ptr noundef nonnull %0, ptr noundef nonnull %1) #2
%13 = icmp eq ptr %12, null
br i1 %13, label %16, label %14
14: ; preds = %11
%15 = load i64, ptr @JSON_RET_ERROR, align 8, !tbaa !5
br label %51
16: ; preds = %11
%17 = load i32, ptr %0, align 8, !tbaa !9
%18 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 1
%19 = load i32, ptr %18, align 4, !tbaa !13
%20 = icmp slt i32 %17, %19
br i1 %20, label %30, label %21
21: ; preds = %16
%22 = shl nsw i32 %19, 1
%23 = load i32, ptr @STARTING_CAPACITY, align 4, !tbaa !14
%24 = tail call i64 @MAX(i32 noundef %22, i32 noundef %23) #2
%25 = tail call i64 @json_object_resize(ptr noundef nonnull %0, i64 noundef %24) #2
%26 = load i64, ptr @JSON_RET_ERROR, align 8, !tbaa !5
%27 = icmp eq i64 %25, %26
br i1 %27, label %51, label %28
28: ; preds = %21
%29 = load i32, ptr %0, align 8, !tbaa !9
br label %30
30: ; preds = %28, %16
%31 = phi i32 [ %29, %28 ], [ %17, %16 ]
%32 = sext i32 %31 to i64
%33 = tail call ptr @parson_strdup(ptr noundef nonnull %1) #2
%34 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 3
%35 = load ptr, ptr %34, align 8, !tbaa !15
%36 = getelementptr inbounds ptr, ptr %35, i64 %32
store ptr %33, ptr %36, align 8, !tbaa !16
%37 = load ptr, ptr %34, align 8, !tbaa !15
%38 = getelementptr inbounds ptr, ptr %37, i64 %32
%39 = load ptr, ptr %38, align 8, !tbaa !16
%40 = icmp eq ptr %39, null
br i1 %40, label %41, label %43
41: ; preds = %30
%42 = load i64, ptr @JSON_RET_ERROR, align 8, !tbaa !5
br label %51
43: ; preds = %30
%44 = tail call i32 @JsonGetWrappingValue(ptr noundef nonnull %0) #2
store i32 %44, ptr %2, align 4, !tbaa !17
%45 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 2
%46 = load ptr, ptr %45, align 8, !tbaa !19
%47 = getelementptr inbounds ptr, ptr %46, i64 %32
store ptr %2, ptr %47, align 8, !tbaa !16
%48 = load i32, ptr %0, align 8, !tbaa !9
%49 = add nsw i32 %48, 1
store i32 %49, ptr %0, align 8, !tbaa !9
%50 = load i64, ptr @JSON_RET_OK, align 8, !tbaa !5
br label %51
51: ; preds = %21, %43, %41, %14, %9
%52 = phi i64 [ %10, %9 ], [ %15, %14 ], [ %42, %41 ], [ %50, %43 ], [ %25, %21 ]
ret i64 %52
}
declare ptr @JsonGet(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @MAX(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @json_object_resize(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @parson_strdup(ptr noundef) local_unnamed_addr #1
declare i32 @JsonGetWrappingValue(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_9__", !11, i64 0, !11, i64 4, !12, i64 8, !12, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !11, i64 4}
!14 = !{!11, !11, i64 0}
!15 = !{!10, !12, i64 16}
!16 = !{!12, !12, i64 0}
!17 = !{!18, !11, i64 0}
!18 = !{!"TYPE_8__", !11, i64 0}
!19 = !{!10, !12, i64 8}
|
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Str.c_json_object_add.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Str.c_json_object_add.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@JSON_RET_ERROR = common local_unnamed_addr global i64 0, align 8
@STARTING_CAPACITY = common local_unnamed_addr global i32 0, align 4
@JSON_RET_OK = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @json_object_add], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @json_object_add(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = icmp eq ptr %0, null
%5 = icmp eq ptr %1, null
%6 = or i1 %4, %5
%7 = icmp eq ptr %2, null
%8 = or i1 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = load i64, ptr @JSON_RET_ERROR, align 8, !tbaa !6
br label %51
11: ; preds = %3
%12 = tail call ptr @JsonGet(ptr noundef nonnull %0, ptr noundef nonnull %1) #2
%13 = icmp eq ptr %12, null
br i1 %13, label %16, label %14
14: ; preds = %11
%15 = load i64, ptr @JSON_RET_ERROR, align 8, !tbaa !6
br label %51
16: ; preds = %11
%17 = load i32, ptr %0, align 8, !tbaa !10
%18 = getelementptr inbounds i8, ptr %0, i64 4
%19 = load i32, ptr %18, align 4, !tbaa !14
%20 = icmp slt i32 %17, %19
br i1 %20, label %30, label %21
21: ; preds = %16
%22 = shl nsw i32 %19, 1
%23 = load i32, ptr @STARTING_CAPACITY, align 4, !tbaa !15
%24 = tail call i64 @MAX(i32 noundef %22, i32 noundef %23) #2
%25 = tail call i64 @json_object_resize(ptr noundef nonnull %0, i64 noundef %24) #2
%26 = load i64, ptr @JSON_RET_ERROR, align 8, !tbaa !6
%27 = icmp eq i64 %25, %26
br i1 %27, label %51, label %28
28: ; preds = %21
%29 = load i32, ptr %0, align 8, !tbaa !10
br label %30
30: ; preds = %28, %16
%31 = phi i32 [ %29, %28 ], [ %17, %16 ]
%32 = sext i32 %31 to i64
%33 = tail call ptr @parson_strdup(ptr noundef nonnull %1) #2
%34 = getelementptr inbounds i8, ptr %0, i64 16
%35 = load ptr, ptr %34, align 8, !tbaa !16
%36 = getelementptr inbounds ptr, ptr %35, i64 %32
store ptr %33, ptr %36, align 8, !tbaa !17
%37 = load ptr, ptr %34, align 8, !tbaa !16
%38 = getelementptr inbounds ptr, ptr %37, i64 %32
%39 = load ptr, ptr %38, align 8, !tbaa !17
%40 = icmp eq ptr %39, null
br i1 %40, label %41, label %43
41: ; preds = %30
%42 = load i64, ptr @JSON_RET_ERROR, align 8, !tbaa !6
br label %51
43: ; preds = %30
%44 = tail call i32 @JsonGetWrappingValue(ptr noundef nonnull %0) #2
store i32 %44, ptr %2, align 4, !tbaa !18
%45 = getelementptr inbounds i8, ptr %0, i64 8
%46 = load ptr, ptr %45, align 8, !tbaa !20
%47 = getelementptr inbounds ptr, ptr %46, i64 %32
store ptr %2, ptr %47, align 8, !tbaa !17
%48 = load i32, ptr %0, align 8, !tbaa !10
%49 = add nsw i32 %48, 1
store i32 %49, ptr %0, align 8, !tbaa !10
%50 = load i64, ptr @JSON_RET_OK, align 8, !tbaa !6
br label %51
51: ; preds = %21, %43, %41, %14, %9
%52 = phi i64 [ %10, %9 ], [ %15, %14 ], [ %42, %41 ], [ %50, %43 ], [ %25, %21 ]
ret i64 %52
}
declare ptr @JsonGet(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @MAX(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @json_object_resize(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @parson_strdup(ptr noundef) local_unnamed_addr #1
declare i32 @JsonGetWrappingValue(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_9__", !12, i64 0, !12, i64 4, !13, i64 8, !13, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !12, i64 4}
!15 = !{!12, !12, i64 0}
!16 = !{!11, !13, i64 16}
!17 = !{!13, !13, i64 0}
!18 = !{!19, !12, i64 0}
!19 = !{!"TYPE_8__", !12, i64 0}
!20 = !{!11, !13, i64 8}
|
SoftEtherVPN_src_Mayaqua_extr_Str.c_json_object_add
|
; ModuleID = 'AnghaBench/linux/fs/nfs/extr_nfs4proc.c_nfs4_proc_setattr.c'
source_filename = "AnghaBench/linux/fs/nfs/extr_nfs4proc.c_nfs4_proc_setattr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.iattr = type { i32, i64, i32 }
@ATTR_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@ATTR_OPEN = dso_local local_unnamed_addr global i32 0, align 4
@ATTR_MTIME = dso_local local_unnamed_addr global i32 0, align 4
@ATTR_CTIME = dso_local local_unnamed_addr global i32 0, align 4
@ATTR_FILE = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ATTR_MODE = dso_local local_unnamed_addr global i32 0, align 4
@ATTR_UID = dso_local local_unnamed_addr global i32 0, align 4
@ATTR_GID = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nfs4_proc_setattr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nfs4_proc_setattr(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @d_inode(ptr noundef %0) #2
%5 = tail call i64 @pnfs_ld_layoutret_on_setattr(ptr noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %19, label %7
7: ; preds = %3
%8 = load i32, ptr %2, align 8, !tbaa !5
%9 = load i32, ptr @ATTR_SIZE, align 4, !tbaa !11
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %19, label %12
12: ; preds = %7
%13 = getelementptr inbounds %struct.iattr, ptr %2, i64 0, i32 1
%14 = load i64, ptr %13, align 8, !tbaa !12
%15 = tail call i64 @i_size_read(ptr noundef %4) #2
%16 = icmp slt i64 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %12
%18 = tail call i32 @pnfs_commit_and_return_layout(ptr noundef %4) #2
br label %19
19: ; preds = %17, %12, %7, %3
%20 = tail call i32 @nfs_fattr_init(ptr noundef %1) #2
%21 = load i32, ptr %2, align 8, !tbaa !5
%22 = load i32, ptr @ATTR_OPEN, align 4, !tbaa !11
%23 = and i32 %22, %21
%24 = icmp eq i32 %23, 0
br i1 %24, label %32, label %25
25: ; preds = %19
%26 = load i32, ptr @ATTR_MTIME, align 4, !tbaa !11
%27 = load i32, ptr @ATTR_CTIME, align 4, !tbaa !11
%28 = or i32 %27, %26
%29 = xor i32 %28, -1
%30 = and i32 %21, %29
store i32 %30, ptr %2, align 8, !tbaa !5
%31 = load i32, ptr @ATTR_OPEN, align 4, !tbaa !11
br label %32
32: ; preds = %25, %19
%33 = phi i32 [ %31, %25 ], [ %22, %19 ]
%34 = phi i32 [ %30, %25 ], [ %21, %19 ]
%35 = load i32, ptr @ATTR_FILE, align 4, !tbaa !11
%36 = or i32 %33, %35
%37 = xor i32 %36, -1
%38 = and i32 %34, %37
%39 = icmp eq i32 %38, 0
br i1 %39, label %79, label %40
40: ; preds = %32
%41 = and i32 %35, %34
%42 = icmp eq i32 %41, 0
br i1 %42, label %50, label %43
43: ; preds = %40
%44 = getelementptr inbounds %struct.iattr, ptr %2, i64 0, i32 2
%45 = load i32, ptr %44, align 8, !tbaa !13
%46 = tail call ptr @nfs_file_open_context(i32 noundef %45) #2
%47 = icmp eq ptr %46, null
br i1 %47, label %50, label %48
48: ; preds = %43
%49 = load ptr, ptr %46, align 8, !tbaa !14
br label %50
50: ; preds = %43, %48, %40
%51 = phi ptr [ %49, %48 ], [ null, %43 ], [ null, %40 ]
%52 = phi ptr [ %46, %48 ], [ null, %43 ], [ null, %40 ]
%53 = tail call i32 @NFS_SERVER(ptr noundef %4) #2
%54 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !11
%55 = tail call ptr @nfs4_label_alloc(i32 noundef %53, i32 noundef %54) #2
%56 = tail call i64 @IS_ERR(ptr noundef %55) #2
%57 = icmp eq i64 %56, 0
br i1 %57, label %60, label %58
58: ; preds = %50
%59 = tail call i32 @PTR_ERR(ptr noundef %55) #2
br label %79
60: ; preds = %50
%61 = load i32, ptr %2, align 8, !tbaa !5
%62 = load i32, ptr @ATTR_MODE, align 4, !tbaa !11
%63 = load i32, ptr @ATTR_UID, align 4, !tbaa !11
%64 = or i32 %63, %62
%65 = load i32, ptr @ATTR_GID, align 4, !tbaa !11
%66 = or i32 %64, %65
%67 = and i32 %66, %61
%68 = icmp eq i32 %67, 0
br i1 %68, label %71, label %69
69: ; preds = %60
%70 = tail call i32 @nfs4_inode_make_writeable(ptr noundef %4) #2
br label %71
71: ; preds = %69, %60
%72 = tail call i32 @nfs4_do_setattr(ptr noundef %4, ptr noundef %51, ptr noundef %1, ptr noundef nonnull %2, ptr noundef %52, ptr noundef null, ptr noundef %55) #2
%73 = icmp eq i32 %72, 0
br i1 %73, label %74, label %77
74: ; preds = %71
%75 = tail call i32 @nfs_setattr_update_inode(ptr noundef %4, ptr noundef nonnull %2, ptr noundef %1) #2
%76 = tail call i32 @nfs_setsecurity(ptr noundef %4, ptr noundef %1, ptr noundef %55) #2
br label %77
77: ; preds = %74, %71
%78 = tail call i32 @nfs4_label_free(ptr noundef %55) #2
br label %79
79: ; preds = %32, %77, %58
%80 = phi i32 [ %59, %58 ], [ %72, %77 ], [ 0, %32 ]
ret i32 %80
}
declare ptr @d_inode(ptr noundef) local_unnamed_addr #1
declare i64 @pnfs_ld_layoutret_on_setattr(ptr noundef) local_unnamed_addr #1
declare i64 @i_size_read(ptr noundef) local_unnamed_addr #1
declare i32 @pnfs_commit_and_return_layout(ptr noundef) local_unnamed_addr #1
declare i32 @nfs_fattr_init(ptr noundef) local_unnamed_addr #1
declare ptr @nfs_file_open_context(i32 noundef) local_unnamed_addr #1
declare ptr @nfs4_label_alloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @NFS_SERVER(ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @nfs4_inode_make_writeable(ptr noundef) local_unnamed_addr #1
declare i32 @nfs4_do_setattr(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nfs_setattr_update_inode(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nfs_setsecurity(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nfs4_label_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"iattr", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !7, i64 16}
!14 = !{!15, !16, i64 0}
!15 = !{!"nfs_open_context", !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/fs/nfs/extr_nfs4proc.c_nfs4_proc_setattr.c'
source_filename = "AnghaBench/linux/fs/nfs/extr_nfs4proc.c_nfs4_proc_setattr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ATTR_SIZE = common local_unnamed_addr global i32 0, align 4
@ATTR_OPEN = common local_unnamed_addr global i32 0, align 4
@ATTR_MTIME = common local_unnamed_addr global i32 0, align 4
@ATTR_CTIME = common local_unnamed_addr global i32 0, align 4
@ATTR_FILE = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ATTR_MODE = common local_unnamed_addr global i32 0, align 4
@ATTR_UID = common local_unnamed_addr global i32 0, align 4
@ATTR_GID = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nfs4_proc_setattr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @nfs4_proc_setattr(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @d_inode(ptr noundef %0) #2
%5 = tail call i64 @pnfs_ld_layoutret_on_setattr(ptr noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %19, label %7
7: ; preds = %3
%8 = load i32, ptr %2, align 8, !tbaa !6
%9 = load i32, ptr @ATTR_SIZE, align 4, !tbaa !12
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %19, label %12
12: ; preds = %7
%13 = getelementptr inbounds i8, ptr %2, i64 8
%14 = load i64, ptr %13, align 8, !tbaa !13
%15 = tail call i64 @i_size_read(ptr noundef %4) #2
%16 = icmp slt i64 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %12
%18 = tail call i32 @pnfs_commit_and_return_layout(ptr noundef %4) #2
br label %19
19: ; preds = %17, %12, %7, %3
%20 = tail call i32 @nfs_fattr_init(ptr noundef %1) #2
%21 = load i32, ptr %2, align 8, !tbaa !6
%22 = load i32, ptr @ATTR_OPEN, align 4, !tbaa !12
%23 = and i32 %22, %21
%24 = icmp eq i32 %23, 0
br i1 %24, label %32, label %25
25: ; preds = %19
%26 = load i32, ptr @ATTR_MTIME, align 4, !tbaa !12
%27 = load i32, ptr @ATTR_CTIME, align 4, !tbaa !12
%28 = or i32 %27, %26
%29 = xor i32 %28, -1
%30 = and i32 %21, %29
store i32 %30, ptr %2, align 8, !tbaa !6
%31 = load i32, ptr @ATTR_OPEN, align 4, !tbaa !12
br label %32
32: ; preds = %25, %19
%33 = phi i32 [ %31, %25 ], [ %22, %19 ]
%34 = phi i32 [ %30, %25 ], [ %21, %19 ]
%35 = load i32, ptr @ATTR_FILE, align 4, !tbaa !12
%36 = or i32 %33, %35
%37 = xor i32 %36, -1
%38 = and i32 %34, %37
%39 = icmp eq i32 %38, 0
br i1 %39, label %79, label %40
40: ; preds = %32
%41 = and i32 %35, %34
%42 = icmp eq i32 %41, 0
br i1 %42, label %50, label %43
43: ; preds = %40
%44 = getelementptr inbounds i8, ptr %2, i64 16
%45 = load i32, ptr %44, align 8, !tbaa !14
%46 = tail call ptr @nfs_file_open_context(i32 noundef %45) #2
%47 = icmp eq ptr %46, null
br i1 %47, label %50, label %48
48: ; preds = %43
%49 = load ptr, ptr %46, align 8, !tbaa !15
br label %50
50: ; preds = %43, %48, %40
%51 = phi ptr [ %49, %48 ], [ null, %43 ], [ null, %40 ]
%52 = phi ptr [ %46, %48 ], [ null, %43 ], [ null, %40 ]
%53 = tail call i32 @NFS_SERVER(ptr noundef %4) #2
%54 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !12
%55 = tail call ptr @nfs4_label_alloc(i32 noundef %53, i32 noundef %54) #2
%56 = tail call i64 @IS_ERR(ptr noundef %55) #2
%57 = icmp eq i64 %56, 0
br i1 %57, label %60, label %58
58: ; preds = %50
%59 = tail call i32 @PTR_ERR(ptr noundef %55) #2
br label %79
60: ; preds = %50
%61 = load i32, ptr %2, align 8, !tbaa !6
%62 = load i32, ptr @ATTR_MODE, align 4, !tbaa !12
%63 = load i32, ptr @ATTR_UID, align 4, !tbaa !12
%64 = or i32 %63, %62
%65 = load i32, ptr @ATTR_GID, align 4, !tbaa !12
%66 = or i32 %64, %65
%67 = and i32 %66, %61
%68 = icmp eq i32 %67, 0
br i1 %68, label %71, label %69
69: ; preds = %60
%70 = tail call i32 @nfs4_inode_make_writeable(ptr noundef %4) #2
br label %71
71: ; preds = %69, %60
%72 = tail call i32 @nfs4_do_setattr(ptr noundef %4, ptr noundef %51, ptr noundef %1, ptr noundef nonnull %2, ptr noundef %52, ptr noundef null, ptr noundef %55) #2
%73 = icmp eq i32 %72, 0
br i1 %73, label %74, label %77
74: ; preds = %71
%75 = tail call i32 @nfs_setattr_update_inode(ptr noundef %4, ptr noundef nonnull %2, ptr noundef %1) #2
%76 = tail call i32 @nfs_setsecurity(ptr noundef %4, ptr noundef %1, ptr noundef %55) #2
br label %77
77: ; preds = %74, %71
%78 = tail call i32 @nfs4_label_free(ptr noundef %55) #2
br label %79
79: ; preds = %32, %77, %58
%80 = phi i32 [ %59, %58 ], [ %72, %77 ], [ 0, %32 ]
ret i32 %80
}
declare ptr @d_inode(ptr noundef) local_unnamed_addr #1
declare i64 @pnfs_ld_layoutret_on_setattr(ptr noundef) local_unnamed_addr #1
declare i64 @i_size_read(ptr noundef) local_unnamed_addr #1
declare i32 @pnfs_commit_and_return_layout(ptr noundef) local_unnamed_addr #1
declare i32 @nfs_fattr_init(ptr noundef) local_unnamed_addr #1
declare ptr @nfs_file_open_context(i32 noundef) local_unnamed_addr #1
declare ptr @nfs4_label_alloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @NFS_SERVER(ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @nfs4_inode_make_writeable(ptr noundef) local_unnamed_addr #1
declare i32 @nfs4_do_setattr(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nfs_setattr_update_inode(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nfs_setsecurity(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nfs4_label_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"iattr", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!7, !8, i64 16}
!15 = !{!16, !17, i64 0}
!16 = !{!"nfs_open_context", !17, i64 0}
!17 = !{!"any pointer", !9, i64 0}
|
linux_fs_nfs_extr_nfs4proc.c_nfs4_proc_setattr
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_sge.c_queue_set.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_sge.c_queue_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @queue_set], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal i32 @queue_set(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = ashr i32 %2, 1
ret i32 %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sk_buff", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_sge.c_queue_set.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_sge.c_queue_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @queue_set], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 -1073741824, 1073741824) i32 @queue_set(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = ashr i32 %2, 1
ret i32 %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sk_buff", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_net_ethernet_chelsio_cxgb3_extr_sge.c_queue_set
|
; ModuleID = 'AnghaBench/linux/drivers/scsi/bfa/extr_bfa_svc.c_bfa_fcxp_get_rspbuf.c'
source_filename = "AnghaBench/linux/drivers/scsi/bfa/extr_bfa_svc.c_bfa_fcxp_get_rspbuf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bfa_fcxp_s = type { i32, i32, ptr }
%struct.bfa_fcxp_mod_s = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local ptr @bfa_fcxp_get_rspbuf(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.bfa_fcxp_s, ptr %0, i64 0, i32 2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i32, ptr %0, align 8, !tbaa !11
%5 = icmp ne i32 %4, 1
%6 = zext i1 %5 to i32
%7 = tail call i32 @WARN_ON(i32 noundef %6) #2
%8 = getelementptr inbounds %struct.bfa_fcxp_s, ptr %0, i64 0, i32 1
%9 = load i32, ptr %8, align 4, !tbaa !12
%10 = load i32, ptr %3, align 4, !tbaa !13
%11 = getelementptr inbounds %struct.bfa_fcxp_mod_s, ptr %3, i64 0, i32 1
%12 = load i32, ptr %11, align 4, !tbaa !15
%13 = add nsw i32 %12, %10
%14 = tail call ptr @bfa_mem_get_dmabuf_kva(ptr noundef nonnull %3, i32 noundef %9, i32 noundef %13) #2
%15 = load i32, ptr %3, align 4, !tbaa !13
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, ptr %14, i64 %16
ret ptr %17
}
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare ptr @bfa_mem_get_dmabuf_kva(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"bfa_fcxp_s", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!6, !7, i64 4}
!13 = !{!14, !7, i64 0}
!14 = !{!"bfa_fcxp_mod_s", !7, i64 0, !7, i64 4}
!15 = !{!14, !7, i64 4}
|
; ModuleID = 'AnghaBench/linux/drivers/scsi/bfa/extr_bfa_svc.c_bfa_fcxp_get_rspbuf.c'
source_filename = "AnghaBench/linux/drivers/scsi/bfa/extr_bfa_svc.c_bfa_fcxp_get_rspbuf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @bfa_fcxp_get_rspbuf(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i32, ptr %0, align 8, !tbaa !12
%5 = icmp ne i32 %4, 1
%6 = zext i1 %5 to i32
%7 = tail call i32 @WARN_ON(i32 noundef %6) #2
%8 = getelementptr inbounds i8, ptr %0, i64 4
%9 = load i32, ptr %8, align 4, !tbaa !13
%10 = load i32, ptr %3, align 4, !tbaa !14
%11 = getelementptr inbounds i8, ptr %3, i64 4
%12 = load i32, ptr %11, align 4, !tbaa !16
%13 = add nsw i32 %12, %10
%14 = tail call ptr @bfa_mem_get_dmabuf_kva(ptr noundef nonnull %3, i32 noundef %9, i32 noundef %13) #2
%15 = load i32, ptr %3, align 4, !tbaa !14
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, ptr %14, i64 %16
ret ptr %17
}
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare ptr @bfa_mem_get_dmabuf_kva(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"bfa_fcxp_s", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!7, !8, i64 4}
!14 = !{!15, !8, i64 0}
!15 = !{!"bfa_fcxp_mod_s", !8, i64 0, !8, i64 4}
!16 = !{!15, !8, i64 4}
|
linux_drivers_scsi_bfa_extr_bfa_svc.c_bfa_fcxp_get_rspbuf
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/video/extr_cirrusfb.c_cirrusfb_pan_display.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/video/extr_cirrusfb.c_cirrusfb_pan_display.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fb_info = type { %struct.TYPE_5__, %struct.TYPE_4__, ptr }
%struct.TYPE_5__ = type { i32 }
%struct.TYPE_4__ = type { i32 }
%struct.fb_var_screeninfo = type { i32, i32, i32 }
%struct.cirrusfb_info = type { i64, i32 }
%struct.TYPE_6__ = type { i64 }
@FB_VMODE_YWRAP = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@VGA_CRTC_START_LO = dso_local local_unnamed_addr global i32 0, align 4
@VGA_CRTC_START_HI = dso_local local_unnamed_addr global i32 0, align 4
@CL_CRT1B = dso_local local_unnamed_addr global i32 0, align 4
@cirrusfb_board_info = dso_local local_unnamed_addr global ptr null, align 8
@CL_CRT1D = dso_local local_unnamed_addr global i32 0, align 4
@CL_AR33 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cirrusfb_pan_display], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @cirrusfb_pan_display(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds %struct.fb_info, ptr %1, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load i32, ptr %0, align 4, !tbaa !13
%6 = load i32, ptr @FB_VMODE_YWRAP, align 4, !tbaa !15
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %2
%10 = load i32, ptr @EINVAL, align 4, !tbaa !15
%11 = sub nsw i32 0, %10
br label %105
12: ; preds = %2
%13 = getelementptr inbounds %struct.fb_var_screeninfo, ptr %0, i64 0, i32 1
%14 = load i32, ptr %13, align 4, !tbaa !16
%15 = load i32, ptr %1, align 8, !tbaa !17
%16 = mul nsw i32 %15, %14
%17 = sdiv i32 %16, 8
%18 = getelementptr inbounds %struct.fb_var_screeninfo, ptr %0, i64 0, i32 2
%19 = load i32, ptr %18, align 4, !tbaa !18
%20 = getelementptr inbounds %struct.fb_info, ptr %1, i64 0, i32 1
%21 = load i32, ptr %20, align 4, !tbaa !19
%22 = mul nsw i32 %21, %19
%23 = add nsw i32 %22, %17
%24 = zext i32 %23 to i64
%25 = icmp eq i32 %15, 1
br i1 %25, label %26, label %29
26: ; preds = %12
%27 = srem i32 %14, 8
%28 = trunc i32 %27 to i8
br label %34
29: ; preds = %12
%30 = lshr i64 %24, 2
%31 = srem i32 %17, 4
%32 = trunc i32 %31 to i8
%33 = shl nsw i8 %32, 1
br label %34
34: ; preds = %29, %26
%35 = phi i64 [ %24, %26 ], [ %30, %29 ]
%36 = phi i8 [ %28, %26 ], [ %33, %29 ]
%37 = tail call i64 @is_laguna(ptr noundef %4) #2
%38 = icmp eq i64 %37, 0
br i1 %38, label %39, label %43
39: ; preds = %34
%40 = getelementptr inbounds %struct.cirrusfb_info, ptr %4, i64 0, i32 1
%41 = load i32, ptr %40, align 8, !tbaa !20
%42 = tail call i32 @cirrusfb_WaitBLT(i32 noundef %41) #2
br label %43
43: ; preds = %39, %34
%44 = getelementptr inbounds %struct.cirrusfb_info, ptr %4, i64 0, i32 1
%45 = load i32, ptr %44, align 8, !tbaa !20
%46 = load i32, ptr @VGA_CRTC_START_LO, align 4, !tbaa !15
%47 = trunc i64 %35 to i8
%48 = tail call i32 @vga_wcrt(i32 noundef %45, i32 noundef %46, i8 noundef zeroext %47) #2
%49 = load i32, ptr %44, align 8, !tbaa !20
%50 = load i32, ptr @VGA_CRTC_START_HI, align 4, !tbaa !15
%51 = lshr i64 %35, 8
%52 = trunc i64 %51 to i8
%53 = tail call i32 @vga_wcrt(i32 noundef %49, i32 noundef %50, i8 noundef zeroext %52) #2
%54 = load i32, ptr %44, align 8, !tbaa !20
%55 = load i32, ptr @CL_CRT1B, align 4, !tbaa !15
%56 = tail call i32 @vga_rcrt(i32 noundef %54, i32 noundef %55) #2
%57 = trunc i32 %56 to i8
%58 = and i8 %57, -14
%59 = lshr i64 %35, 16
%60 = trunc i64 %59 to i8
%61 = and i8 %60, 1
%62 = lshr i64 %35, 15
%63 = trunc i64 %62 to i8
%64 = and i8 %63, 12
%65 = or disjoint i8 %64, %61
%66 = or disjoint i8 %65, %58
%67 = load i32, ptr %44, align 8, !tbaa !20
%68 = load i32, ptr @CL_CRT1B, align 4, !tbaa !15
%69 = tail call i32 @vga_wcrt(i32 noundef %67, i32 noundef %68, i8 noundef zeroext %66) #2
%70 = load ptr, ptr @cirrusfb_board_info, align 8, !tbaa !23
%71 = load i64, ptr %4, align 8, !tbaa !24
%72 = getelementptr inbounds %struct.TYPE_6__, ptr %70, i64 %71
%73 = load i64, ptr %72, align 8, !tbaa !25
%74 = icmp eq i64 %73, 0
br i1 %74, label %98, label %75
75: ; preds = %43
%76 = load i32, ptr %44, align 8, !tbaa !20
%77 = load i32, ptr @CL_CRT1D, align 4, !tbaa !15
%78 = tail call i32 @vga_rcrt(i32 noundef %76, i32 noundef %77) #2
%79 = tail call i64 @is_laguna(ptr noundef nonnull %4) #2
%80 = icmp eq i64 %79, 0
br i1 %80, label %86, label %81
81: ; preds = %75
%82 = and i32 %78, 231
%83 = zext nneg i32 %82 to i64
%84 = and i64 %59, 24
%85 = or disjoint i64 %84, %83
br label %92
86: ; preds = %75
%87 = and i32 %78, 127
%88 = zext nneg i32 %87 to i64
%89 = lshr i64 %35, 12
%90 = and i64 %89, 128
%91 = or disjoint i64 %90, %88
br label %92
92: ; preds = %86, %81
%93 = phi i64 [ %85, %81 ], [ %91, %86 ]
%94 = trunc i64 %93 to i8
%95 = load i32, ptr %44, align 8, !tbaa !20
%96 = load i32, ptr @CL_CRT1D, align 4, !tbaa !15
%97 = tail call i32 @vga_wcrt(i32 noundef %95, i32 noundef %96, i8 noundef zeroext %94) #2
br label %98
98: ; preds = %92, %43
%99 = load i32, ptr %1, align 8, !tbaa !17
%100 = icmp eq i32 %99, 1
br i1 %100, label %101, label %105
101: ; preds = %98
%102 = load i32, ptr %44, align 8, !tbaa !20
%103 = load i32, ptr @CL_AR33, align 4, !tbaa !15
%104 = tail call i32 @vga_wattr(i32 noundef %102, i32 noundef %103, i8 noundef zeroext %36) #2
br label %105
105: ; preds = %98, %101, %9
%106 = phi i32 [ %11, %9 ], [ 0, %101 ], [ 0, %98 ]
ret i32 %106
}
declare i64 @is_laguna(ptr noundef) local_unnamed_addr #1
declare i32 @cirrusfb_WaitBLT(i32 noundef) local_unnamed_addr #1
declare i32 @vga_wcrt(i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @vga_rcrt(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vga_wattr(i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 8}
!6 = !{!"fb_info", !7, i64 0, !11, i64 4, !12, i64 8}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !8, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"fb_var_screeninfo", !8, i64 0, !8, i64 4, !8, i64 8}
!15 = !{!8, !8, i64 0}
!16 = !{!14, !8, i64 4}
!17 = !{!6, !8, i64 0}
!18 = !{!14, !8, i64 8}
!19 = !{!6, !8, i64 4}
!20 = !{!21, !8, i64 8}
!21 = !{!"cirrusfb_info", !22, i64 0, !8, i64 8}
!22 = !{!"long", !9, i64 0}
!23 = !{!12, !12, i64 0}
!24 = !{!21, !22, i64 0}
!25 = !{!26, !22, i64 0}
!26 = !{!"TYPE_6__", !22, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/video/extr_cirrusfb.c_cirrusfb_pan_display.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/video/extr_cirrusfb.c_cirrusfb_pan_display.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_6__ = type { i64 }
@FB_VMODE_YWRAP = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@VGA_CRTC_START_LO = common local_unnamed_addr global i32 0, align 4
@VGA_CRTC_START_HI = common local_unnamed_addr global i32 0, align 4
@CL_CRT1B = common local_unnamed_addr global i32 0, align 4
@cirrusfb_board_info = common local_unnamed_addr global ptr null, align 8
@CL_CRT1D = common local_unnamed_addr global i32 0, align 4
@CL_AR33 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cirrusfb_pan_display], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @cirrusfb_pan_display(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load i32, ptr %0, align 4, !tbaa !14
%6 = load i32, ptr @FB_VMODE_YWRAP, align 4, !tbaa !16
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %2
%10 = load i32, ptr @EINVAL, align 4, !tbaa !16
%11 = sub nsw i32 0, %10
br label %105
12: ; preds = %2
%13 = getelementptr inbounds i8, ptr %0, i64 4
%14 = load i32, ptr %13, align 4, !tbaa !17
%15 = load i32, ptr %1, align 8, !tbaa !18
%16 = mul nsw i32 %15, %14
%17 = sdiv i32 %16, 8
%18 = getelementptr inbounds i8, ptr %0, i64 8
%19 = load i32, ptr %18, align 4, !tbaa !19
%20 = getelementptr inbounds i8, ptr %1, i64 4
%21 = load i32, ptr %20, align 4, !tbaa !20
%22 = mul nsw i32 %21, %19
%23 = add nsw i32 %22, %17
%24 = zext i32 %23 to i64
%25 = icmp eq i32 %15, 1
br i1 %25, label %26, label %29
26: ; preds = %12
%27 = srem i32 %14, 8
%28 = trunc nsw i32 %27 to i8
br label %34
29: ; preds = %12
%30 = lshr i64 %24, 2
%31 = srem i32 %17, 4
%32 = trunc nsw i32 %31 to i8
%33 = shl nsw i8 %32, 1
br label %34
34: ; preds = %29, %26
%35 = phi i64 [ %24, %26 ], [ %30, %29 ]
%36 = phi i8 [ %28, %26 ], [ %33, %29 ]
%37 = tail call i64 @is_laguna(ptr noundef %4) #2
%38 = icmp eq i64 %37, 0
br i1 %38, label %39, label %43
39: ; preds = %34
%40 = getelementptr inbounds i8, ptr %4, i64 8
%41 = load i32, ptr %40, align 8, !tbaa !21
%42 = tail call i32 @cirrusfb_WaitBLT(i32 noundef %41) #2
br label %43
43: ; preds = %39, %34
%44 = getelementptr inbounds i8, ptr %4, i64 8
%45 = load i32, ptr %44, align 8, !tbaa !21
%46 = load i32, ptr @VGA_CRTC_START_LO, align 4, !tbaa !16
%47 = trunc i64 %35 to i8
%48 = tail call i32 @vga_wcrt(i32 noundef %45, i32 noundef %46, i8 noundef zeroext %47) #2
%49 = load i32, ptr %44, align 8, !tbaa !21
%50 = load i32, ptr @VGA_CRTC_START_HI, align 4, !tbaa !16
%51 = lshr i64 %35, 8
%52 = trunc i64 %51 to i8
%53 = tail call i32 @vga_wcrt(i32 noundef %49, i32 noundef %50, i8 noundef zeroext %52) #2
%54 = load i32, ptr %44, align 8, !tbaa !21
%55 = load i32, ptr @CL_CRT1B, align 4, !tbaa !16
%56 = tail call i32 @vga_rcrt(i32 noundef %54, i32 noundef %55) #2
%57 = trunc i32 %56 to i8
%58 = and i8 %57, -14
%59 = lshr i64 %35, 16
%60 = trunc i64 %59 to i8
%61 = and i8 %60, 1
%62 = lshr i64 %35, 15
%63 = trunc i64 %62 to i8
%64 = and i8 %63, 12
%65 = or disjoint i8 %64, %61
%66 = or disjoint i8 %65, %58
%67 = load i32, ptr %44, align 8, !tbaa !21
%68 = load i32, ptr @CL_CRT1B, align 4, !tbaa !16
%69 = tail call i32 @vga_wcrt(i32 noundef %67, i32 noundef %68, i8 noundef zeroext %66) #2
%70 = load ptr, ptr @cirrusfb_board_info, align 8, !tbaa !24
%71 = load i64, ptr %4, align 8, !tbaa !25
%72 = getelementptr inbounds %struct.TYPE_6__, ptr %70, i64 %71
%73 = load i64, ptr %72, align 8, !tbaa !26
%74 = icmp eq i64 %73, 0
br i1 %74, label %98, label %75
75: ; preds = %43
%76 = load i32, ptr %44, align 8, !tbaa !21
%77 = load i32, ptr @CL_CRT1D, align 4, !tbaa !16
%78 = tail call i32 @vga_rcrt(i32 noundef %76, i32 noundef %77) #2
%79 = tail call i64 @is_laguna(ptr noundef nonnull %4) #2
%80 = icmp eq i64 %79, 0
br i1 %80, label %86, label %81
81: ; preds = %75
%82 = and i32 %78, 231
%83 = zext nneg i32 %82 to i64
%84 = and i64 %59, 24
%85 = or disjoint i64 %84, %83
br label %92
86: ; preds = %75
%87 = and i32 %78, 127
%88 = zext nneg i32 %87 to i64
%89 = lshr i64 %35, 12
%90 = and i64 %89, 128
%91 = or disjoint i64 %90, %88
br label %92
92: ; preds = %86, %81
%93 = phi i64 [ %85, %81 ], [ %91, %86 ]
%94 = trunc i64 %93 to i8
%95 = load i32, ptr %44, align 8, !tbaa !21
%96 = load i32, ptr @CL_CRT1D, align 4, !tbaa !16
%97 = tail call i32 @vga_wcrt(i32 noundef %95, i32 noundef %96, i8 noundef zeroext %94) #2
br label %98
98: ; preds = %92, %43
%99 = load i32, ptr %1, align 8, !tbaa !18
%100 = icmp eq i32 %99, 1
br i1 %100, label %101, label %105
101: ; preds = %98
%102 = load i32, ptr %44, align 8, !tbaa !21
%103 = load i32, ptr @CL_AR33, align 4, !tbaa !16
%104 = tail call i32 @vga_wattr(i32 noundef %102, i32 noundef %103, i8 noundef zeroext %36) #2
br label %105
105: ; preds = %98, %101, %9
%106 = phi i32 [ %11, %9 ], [ 0, %101 ], [ 0, %98 ]
ret i32 %106
}
declare i64 @is_laguna(ptr noundef) local_unnamed_addr #1
declare i32 @cirrusfb_WaitBLT(i32 noundef) local_unnamed_addr #1
declare i32 @vga_wcrt(i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @vga_rcrt(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vga_wattr(i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 8}
!7 = !{!"fb_info", !8, i64 0, !12, i64 4, !13, i64 8}
!8 = !{!"TYPE_5__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"TYPE_4__", !9, i64 0}
!13 = !{!"any pointer", !10, i64 0}
!14 = !{!15, !9, i64 0}
!15 = !{!"fb_var_screeninfo", !9, i64 0, !9, i64 4, !9, i64 8}
!16 = !{!9, !9, i64 0}
!17 = !{!15, !9, i64 4}
!18 = !{!7, !9, i64 0}
!19 = !{!15, !9, i64 8}
!20 = !{!7, !9, i64 4}
!21 = !{!22, !9, i64 8}
!22 = !{!"cirrusfb_info", !23, i64 0, !9, i64 8}
!23 = !{!"long", !10, i64 0}
!24 = !{!13, !13, i64 0}
!25 = !{!22, !23, i64 0}
!26 = !{!27, !23, i64 0}
!27 = !{!"TYPE_6__", !23, i64 0}
|
fastsocket_kernel_drivers_video_extr_cirrusfb.c_cirrusfb_pan_display
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/storage/extr_shuttle_usbat.c_usbat_execute_command.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/storage/extr_shuttle_usbat.c_usbat_execute_command.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@USBAT_CMD_EXEC_CMD = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @usbat_execute_command], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @usbat_execute_command(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr %0, align 4, !tbaa !5
%5 = load i32, ptr @USBAT_CMD_EXEC_CMD, align 4, !tbaa !10
%6 = tail call i32 @usb_stor_ctrl_transfer(ptr noundef nonnull %0, i32 noundef %4, i32 noundef %5, i32 noundef 64, i32 noundef 0, i32 noundef 0, ptr noundef %1, i32 noundef %2) #2
ret i32 %6
}
declare i32 @usb_stor_ctrl_transfer(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"us_data", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/storage/extr_shuttle_usbat.c_usbat_execute_command.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/storage/extr_shuttle_usbat.c_usbat_execute_command.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@USBAT_CMD_EXEC_CMD = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @usbat_execute_command], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @usbat_execute_command(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = load i32, ptr @USBAT_CMD_EXEC_CMD, align 4, !tbaa !11
%6 = tail call i32 @usb_stor_ctrl_transfer(ptr noundef nonnull %0, i32 noundef %4, i32 noundef %5, i32 noundef 64, i32 noundef 0, i32 noundef 0, ptr noundef %1, i32 noundef %2) #2
ret i32 %6
}
declare i32 @usb_stor_ctrl_transfer(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"us_data", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
fastsocket_kernel_drivers_usb_storage_extr_shuttle_usbat.c_usbat_execute_command
|
; ModuleID = 'AnghaBench/freebsd/sys/powerpc/powermac/extr_pmu.c_pmu_intr.c'
source_filename = "AnghaBench/freebsd/sys/powerpc/powermac/extr_pmu.c_pmu_intr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pmu_softc = type { i32, i32, i32, i32 }
@vIFR = dso_local local_unnamed_addr global i32 0, align 4
@PMU_INT_ACK = dso_local local_unnamed_addr global i32 0, align 4
@PMU_INT_ADB = dso_local local_unnamed_addr global i32 0, align 4
@ADB_COMMAND_TALK = dso_local local_unnamed_addr global i32 0, align 4
@PMU_SET_POLL_MASK = dso_local local_unnamed_addr global i32 0, align 4
@PMU_ADB_CMD = dso_local local_unnamed_addr global i32 0, align 4
@PMU_INT_ENVIRONMENT = dso_local local_unnamed_addr global i32 0, align 4
@PMU_ENV_LID_CLOSED = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"PMU\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"lid\00", align 1
@.str.2 = private unnamed_addr constant [6 x i8] c"close\00", align 1
@.str.3 = private unnamed_addr constant [5 x i8] c"open\00", align 1
@PMU_ENV_POWER = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [7 x i8] c"Button\00", align 1
@.str.5 = private unnamed_addr constant [8 x i8] c"pressed\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @pmu_intr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @pmu_intr(ptr noundef %0) #0 {
%2 = alloca [16 x i32], align 16
%3 = alloca [16 x i32], align 16
%4 = alloca [4 x i32], align 16
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %3) #3
%5 = ptrtoint ptr %0 to i64
%6 = tail call ptr @device_get_softc(i64 noundef %5) #3
%7 = getelementptr inbounds %struct.pmu_softc, ptr %6, i64 0, i32 3
%8 = tail call i32 @mtx_lock(ptr noundef nonnull %7) #3
%9 = load i32, ptr @vIFR, align 4, !tbaa !5
%10 = tail call i32 @pmu_write_reg(ptr noundef %6, i32 noundef %9, i32 noundef 144) #3
%11 = load i32, ptr @PMU_INT_ACK, align 4, !tbaa !5
%12 = call i32 @pmu_send(ptr noundef %6, i32 noundef %11, i32 noundef 0, ptr noundef null, i32 noundef 16, ptr noundef nonnull %2) #3
%13 = call i32 @mtx_unlock(ptr noundef nonnull %7) #3
%14 = icmp eq i32 %12, 0
%15 = getelementptr inbounds [16 x i32], ptr %2, i64 0, i64 1
%16 = load i32, ptr %15, align 4
%17 = icmp eq i32 %16, 0
%18 = select i1 %14, i1 true, i1 %17
br i1 %18, label %81, label %19
19: ; preds = %1
%20 = load i32, ptr @PMU_INT_ADB, align 4, !tbaa !5
%21 = and i32 %20, %16
%22 = icmp eq i32 %21, 0
br i1 %22, label %54, label %23
23: ; preds = %19
%24 = call i32 @mtx_lock(ptr noundef nonnull %7) #3
%25 = getelementptr inbounds [16 x i32], ptr %2, i64 0, i64 2
%26 = load i32, ptr %25, align 8, !tbaa !5
%27 = and i32 %26, 15
%28 = load i32, ptr @ADB_COMMAND_TALK, align 4, !tbaa !5
%29 = shl i32 %28, 2
%30 = icmp eq i32 %27, %29
br i1 %30, label %44, label %31
31: ; preds = %23
%32 = load i32, ptr %6, align 4, !tbaa !9
%33 = icmp eq i32 %32, 0
br i1 %33, label %44, label %34
34: ; preds = %31
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
store i32 0, ptr %4, align 16, !tbaa !5
%35 = getelementptr inbounds i32, ptr %4, i64 1
%36 = load i32, ptr @PMU_SET_POLL_MASK, align 4, !tbaa !5
store i32 %36, ptr %35, align 4, !tbaa !5
%37 = getelementptr inbounds i32, ptr %4, i64 2
%38 = lshr i32 %32, 8
%39 = and i32 %38, 255
store i32 %39, ptr %37, align 8, !tbaa !5
%40 = getelementptr inbounds i32, ptr %4, i64 3
%41 = and i32 %32, 255
store i32 %41, ptr %40, align 4, !tbaa !5
%42 = load i32, ptr @PMU_ADB_CMD, align 4, !tbaa !5
%43 = call i32 @pmu_send(ptr noundef nonnull %6, i32 noundef %42, i32 noundef 4, ptr noundef nonnull %4, i32 noundef 16, ptr noundef nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
br label %44
44: ; preds = %31, %34, %23
%45 = call i32 @mtx_unlock(ptr noundef nonnull %7) #3
%46 = getelementptr inbounds %struct.pmu_softc, ptr %6, i64 0, i32 2
%47 = load i32, ptr %46, align 4, !tbaa !11
%48 = load i32, ptr %15, align 4, !tbaa !5
%49 = load i32, ptr %25, align 8, !tbaa !5
%50 = add i32 %12, -3
%51 = getelementptr inbounds [16 x i32], ptr %2, i64 0, i64 3
%52 = call i32 @adb_receive_raw_packet(i32 noundef %47, i32 noundef %48, i32 noundef %49, i32 noundef %50, ptr noundef nonnull %51) #3
%53 = load i32, ptr %15, align 4, !tbaa !5
br label %54
54: ; preds = %44, %19
%55 = phi i32 [ %53, %44 ], [ %16, %19 ]
%56 = load i32, ptr @PMU_INT_ENVIRONMENT, align 4, !tbaa !5
%57 = and i32 %56, %55
%58 = icmp eq i32 %57, 0
br i1 %58, label %81, label %59
59: ; preds = %54
%60 = getelementptr inbounds [16 x i32], ptr %2, i64 0, i64 2
%61 = load i32, ptr %60, align 8, !tbaa !5
%62 = load i32, ptr @PMU_ENV_LID_CLOSED, align 4, !tbaa !5
%63 = and i32 %62, %61
%64 = icmp eq i32 %63, 0
%65 = getelementptr inbounds %struct.pmu_softc, ptr %6, i64 0, i32 1
%66 = load i32, ptr %65, align 4, !tbaa !12
%67 = icmp eq i32 %66, 0
br i1 %64, label %69, label %68
68: ; preds = %59
br i1 %67, label %70, label %74
69: ; preds = %59
br i1 %67, label %74, label %70
70: ; preds = %69, %68
%71 = phi i32 [ 1, %68 ], [ 0, %69 ]
%72 = phi ptr [ @.str.2, %68 ], [ @.str.3, %69 ]
store i32 %71, ptr %65, align 4, !tbaa !12
%73 = call i32 @devctl_notify(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, ptr noundef nonnull %72, ptr noundef null) #3
br label %74
74: ; preds = %70, %68, %69
%75 = load i32, ptr %60, align 8, !tbaa !5
%76 = load i32, ptr @PMU_ENV_POWER, align 4, !tbaa !5
%77 = and i32 %76, %75
%78 = icmp eq i32 %77, 0
br i1 %78, label %81, label %79
79: ; preds = %74
%80 = call i32 @devctl_notify(ptr noundef nonnull @.str, ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.5, ptr noundef null) #3
br label %81
81: ; preds = %54, %79, %74, %1
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @device_get_softc(i64 noundef) local_unnamed_addr #2
declare i32 @mtx_lock(ptr noundef) local_unnamed_addr #2
declare i32 @pmu_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pmu_send(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mtx_unlock(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @adb_receive_raw_packet(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @devctl_notify(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"pmu_softc", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!11 = !{!10, !6, i64 8}
!12 = !{!10, !6, i64 4}
|
; ModuleID = 'AnghaBench/freebsd/sys/powerpc/powermac/extr_pmu.c_pmu_intr.c'
source_filename = "AnghaBench/freebsd/sys/powerpc/powermac/extr_pmu.c_pmu_intr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@vIFR = common local_unnamed_addr global i32 0, align 4
@PMU_INT_ACK = common local_unnamed_addr global i32 0, align 4
@PMU_INT_ADB = common local_unnamed_addr global i32 0, align 4
@ADB_COMMAND_TALK = common local_unnamed_addr global i32 0, align 4
@PMU_SET_POLL_MASK = common local_unnamed_addr global i32 0, align 4
@PMU_ADB_CMD = common local_unnamed_addr global i32 0, align 4
@PMU_INT_ENVIRONMENT = common local_unnamed_addr global i32 0, align 4
@PMU_ENV_LID_CLOSED = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"PMU\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"lid\00", align 1
@.str.2 = private unnamed_addr constant [6 x i8] c"close\00", align 1
@.str.3 = private unnamed_addr constant [5 x i8] c"open\00", align 1
@PMU_ENV_POWER = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [7 x i8] c"Button\00", align 1
@.str.5 = private unnamed_addr constant [8 x i8] c"pressed\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @pmu_intr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @pmu_intr(ptr noundef %0) #0 {
%2 = alloca [16 x i32], align 4
%3 = alloca [16 x i32], align 4
%4 = alloca [4 x i32], align 4
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %3) #3
%5 = ptrtoint ptr %0 to i64
%6 = tail call ptr @device_get_softc(i64 noundef %5) #3
%7 = getelementptr inbounds i8, ptr %6, i64 12
%8 = tail call i32 @mtx_lock(ptr noundef nonnull %7) #3
%9 = load i32, ptr @vIFR, align 4, !tbaa !6
%10 = tail call i32 @pmu_write_reg(ptr noundef %6, i32 noundef %9, i32 noundef 144) #3
%11 = load i32, ptr @PMU_INT_ACK, align 4, !tbaa !6
%12 = call i32 @pmu_send(ptr noundef %6, i32 noundef %11, i32 noundef 0, ptr noundef null, i32 noundef 16, ptr noundef nonnull %2) #3
%13 = call i32 @mtx_unlock(ptr noundef nonnull %7) #3
%14 = icmp eq i32 %12, 0
%15 = getelementptr inbounds i8, ptr %2, i64 4
%16 = load i32, ptr %15, align 4
%17 = icmp eq i32 %16, 0
%18 = select i1 %14, i1 true, i1 %17
br i1 %18, label %81, label %19
19: ; preds = %1
%20 = load i32, ptr @PMU_INT_ADB, align 4, !tbaa !6
%21 = and i32 %20, %16
%22 = icmp eq i32 %21, 0
br i1 %22, label %54, label %23
23: ; preds = %19
%24 = call i32 @mtx_lock(ptr noundef nonnull %7) #3
%25 = getelementptr inbounds i8, ptr %2, i64 8
%26 = load i32, ptr %25, align 4, !tbaa !6
%27 = and i32 %26, 15
%28 = load i32, ptr @ADB_COMMAND_TALK, align 4, !tbaa !6
%29 = shl i32 %28, 2
%30 = icmp eq i32 %27, %29
br i1 %30, label %44, label %31
31: ; preds = %23
%32 = load i32, ptr %6, align 4, !tbaa !10
%33 = icmp eq i32 %32, 0
br i1 %33, label %44, label %34
34: ; preds = %31
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
store i32 0, ptr %4, align 4, !tbaa !6
%35 = getelementptr inbounds i8, ptr %4, i64 4
%36 = load i32, ptr @PMU_SET_POLL_MASK, align 4, !tbaa !6
store i32 %36, ptr %35, align 4, !tbaa !6
%37 = getelementptr inbounds i8, ptr %4, i64 8
%38 = lshr i32 %32, 8
%39 = and i32 %38, 255
store i32 %39, ptr %37, align 4, !tbaa !6
%40 = getelementptr inbounds i8, ptr %4, i64 12
%41 = and i32 %32, 255
store i32 %41, ptr %40, align 4, !tbaa !6
%42 = load i32, ptr @PMU_ADB_CMD, align 4, !tbaa !6
%43 = call i32 @pmu_send(ptr noundef nonnull %6, i32 noundef %42, i32 noundef 4, ptr noundef nonnull %4, i32 noundef 16, ptr noundef nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
br label %44
44: ; preds = %31, %34, %23
%45 = call i32 @mtx_unlock(ptr noundef nonnull %7) #3
%46 = getelementptr inbounds i8, ptr %6, i64 8
%47 = load i32, ptr %46, align 4, !tbaa !12
%48 = load i32, ptr %15, align 4, !tbaa !6
%49 = load i32, ptr %25, align 4, !tbaa !6
%50 = add i32 %12, -3
%51 = getelementptr inbounds i8, ptr %2, i64 12
%52 = call i32 @adb_receive_raw_packet(i32 noundef %47, i32 noundef %48, i32 noundef %49, i32 noundef %50, ptr noundef nonnull %51) #3
%53 = load i32, ptr %15, align 4, !tbaa !6
br label %54
54: ; preds = %44, %19
%55 = phi i32 [ %53, %44 ], [ %16, %19 ]
%56 = load i32, ptr @PMU_INT_ENVIRONMENT, align 4, !tbaa !6
%57 = and i32 %56, %55
%58 = icmp eq i32 %57, 0
br i1 %58, label %81, label %59
59: ; preds = %54
%60 = getelementptr inbounds i8, ptr %2, i64 8
%61 = load i32, ptr %60, align 4, !tbaa !6
%62 = load i32, ptr @PMU_ENV_LID_CLOSED, align 4, !tbaa !6
%63 = and i32 %62, %61
%64 = icmp eq i32 %63, 0
%65 = getelementptr inbounds i8, ptr %6, i64 4
%66 = load i32, ptr %65, align 4, !tbaa !13
%67 = icmp eq i32 %66, 0
br i1 %64, label %69, label %68
68: ; preds = %59
br i1 %67, label %70, label %74
69: ; preds = %59
br i1 %67, label %74, label %70
70: ; preds = %69, %68
%71 = phi i32 [ 1, %68 ], [ 0, %69 ]
%72 = phi ptr [ @.str.2, %68 ], [ @.str.3, %69 ]
store i32 %71, ptr %65, align 4, !tbaa !13
%73 = call i32 @devctl_notify(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, ptr noundef nonnull %72, ptr noundef null) #3
br label %74
74: ; preds = %70, %68, %69
%75 = load i32, ptr %60, align 4, !tbaa !6
%76 = load i32, ptr @PMU_ENV_POWER, align 4, !tbaa !6
%77 = and i32 %76, %75
%78 = icmp eq i32 %77, 0
br i1 %78, label %81, label %79
79: ; preds = %74
%80 = call i32 @devctl_notify(ptr noundef nonnull @.str, ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.5, ptr noundef null) #3
br label %81
81: ; preds = %54, %79, %74, %1
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @device_get_softc(i64 noundef) local_unnamed_addr #2
declare i32 @mtx_lock(ptr noundef) local_unnamed_addr #2
declare i32 @pmu_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pmu_send(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mtx_unlock(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @adb_receive_raw_packet(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @devctl_notify(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"pmu_softc", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!12 = !{!11, !7, i64 8}
!13 = !{!11, !7, i64 4}
|
freebsd_sys_powerpc_powermac_extr_pmu.c_pmu_intr
|
; ModuleID = 'AnghaBench/freebsd/sys/netgraph/extr_ng_parse.c_ng_sizedstring_parse.c'
source_filename = "AnghaBench/freebsd/sys/netgraph/extr_ng_parse.c_ng_sizedstring_parse.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@USHRT_MAX = dso_local local_unnamed_addr global i32 0, align 4
@M_NETGRAPH_PARSE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ng_sizedstring_parse], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ng_sizedstring_parse(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2, ptr nocapture readnone %3, ptr noundef %4, ptr nocapture noundef writeonly %5) #0 {
%7 = alloca i32, align 4
%8 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
%9 = call ptr @ng_get_string_token(ptr noundef %1, ptr noundef %2, ptr noundef nonnull %7, ptr noundef nonnull %8) #3
%10 = icmp eq ptr %9, null
br i1 %10, label %11, label %13
11: ; preds = %6
%12 = load i32, ptr @EINVAL, align 4, !tbaa !5
br label %32
13: ; preds = %6
%14 = load i32, ptr %8, align 4, !tbaa !5
%15 = load i32, ptr @USHRT_MAX, align 4, !tbaa !5
%16 = icmp sgt i32 %14, %15
br i1 %16, label %17, label %21
17: ; preds = %13
%18 = load i32, ptr @M_NETGRAPH_PARSE, align 4, !tbaa !5
%19 = call i32 @free(ptr noundef nonnull %9, i32 noundef %18) #3
%20 = load i32, ptr @EINVAL, align 4, !tbaa !5
br label %32
21: ; preds = %13
%22 = load i32, ptr %7, align 4, !tbaa !5
%23 = load i32, ptr %2, align 4, !tbaa !5
%24 = add nsw i32 %23, %22
store i32 %24, ptr %2, align 4, !tbaa !5
%25 = sext i32 %14 to i64
store i64 %25, ptr %4, align 8, !tbaa !9
%26 = getelementptr inbounds i32, ptr %4, i64 2
%27 = call i32 @bcopy(ptr noundef nonnull %9, ptr noundef nonnull %26, i32 noundef %14) #3
%28 = load i32, ptr @M_NETGRAPH_PARSE, align 4, !tbaa !5
%29 = call i32 @free(ptr noundef nonnull %9, i32 noundef %28) #3
%30 = load i32, ptr %8, align 4, !tbaa !5
%31 = add nsw i32 %30, 2
store i32 %31, ptr %5, align 4, !tbaa !5
br label %32
32: ; preds = %21, %17, %11
%33 = phi i32 [ %12, %11 ], [ %20, %17 ], [ 0, %21 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
ret i32 %33
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @ng_get_string_token(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bcopy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/netgraph/extr_ng_parse.c_ng_sizedstring_parse.c'
source_filename = "AnghaBench/freebsd/sys/netgraph/extr_ng_parse.c_ng_sizedstring_parse.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@USHRT_MAX = common local_unnamed_addr global i32 0, align 4
@M_NETGRAPH_PARSE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ng_sizedstring_parse], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ng_sizedstring_parse(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2, ptr nocapture readnone %3, ptr noundef %4, ptr nocapture noundef writeonly %5) #0 {
%7 = alloca i32, align 4
%8 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
%9 = call ptr @ng_get_string_token(ptr noundef %1, ptr noundef %2, ptr noundef nonnull %7, ptr noundef nonnull %8) #3
%10 = icmp eq ptr %9, null
br i1 %10, label %11, label %13
11: ; preds = %6
%12 = load i32, ptr @EINVAL, align 4, !tbaa !6
br label %32
13: ; preds = %6
%14 = load i32, ptr %8, align 4, !tbaa !6
%15 = load i32, ptr @USHRT_MAX, align 4, !tbaa !6
%16 = icmp sgt i32 %14, %15
br i1 %16, label %17, label %21
17: ; preds = %13
%18 = load i32, ptr @M_NETGRAPH_PARSE, align 4, !tbaa !6
%19 = call i32 @free(ptr noundef nonnull %9, i32 noundef %18) #3
%20 = load i32, ptr @EINVAL, align 4, !tbaa !6
br label %32
21: ; preds = %13
%22 = load i32, ptr %7, align 4, !tbaa !6
%23 = load i32, ptr %2, align 4, !tbaa !6
%24 = add nsw i32 %23, %22
store i32 %24, ptr %2, align 4, !tbaa !6
%25 = sext i32 %14 to i64
store i64 %25, ptr %4, align 8, !tbaa !10
%26 = getelementptr inbounds i8, ptr %4, i64 8
%27 = call i32 @bcopy(ptr noundef nonnull %9, ptr noundef nonnull %26, i32 noundef %14) #3
%28 = load i32, ptr @M_NETGRAPH_PARSE, align 4, !tbaa !6
%29 = call i32 @free(ptr noundef nonnull %9, i32 noundef %28) #3
%30 = load i32, ptr %8, align 4, !tbaa !6
%31 = add nsw i32 %30, 2
store i32 %31, ptr %5, align 4, !tbaa !6
br label %32
32: ; preds = %21, %17, %11
%33 = phi i32 [ %12, %11 ], [ %20, %17 ], [ 0, %21 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
ret i32 %33
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @ng_get_string_token(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bcopy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
|
freebsd_sys_netgraph_extr_ng_parse.c_ng_sizedstring_parse
|
; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_svm.c_dump_vmcb.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/extr_svm.c_dump_vmcb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_22__ = type { %struct.vmcb_save_area, %struct.vmcb_control_area }
%struct.vmcb_save_area = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.TYPE_21__, %struct.TYPE_20__, %struct.TYPE_19__, %struct.TYPE_18__, %struct.TYPE_17__, %struct.TYPE_16__, %struct.TYPE_15__, %struct.TYPE_14__, %struct.TYPE_13__, %struct.TYPE_12__ }
%struct.TYPE_21__ = type { i32, i32, i32, i32 }
%struct.TYPE_20__ = type { i32, i32, i32, i32 }
%struct.TYPE_19__ = type { i32, i32, i32, i32 }
%struct.TYPE_18__ = type { i32, i32, i32, i32 }
%struct.TYPE_17__ = type { i32, i32, i32, i32 }
%struct.TYPE_16__ = type { i32, i32, i32, i32 }
%struct.TYPE_15__ = type { i32, i32, i32, i32 }
%struct.TYPE_14__ = type { i32, i32, i32, i32 }
%struct.TYPE_13__ = type { i32, i32, i32, i32 }
%struct.TYPE_12__ = type { i32, i32, i32, i32 }
%struct.vmcb_control_area = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
@dump_invalid_vmcb = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [61 x i8] c"set kvm_amd.dump_invalid_vmcb=1 to dump internal KVM state.\0A\00", align 1
@.str.1 = private unnamed_addr constant [20 x i8] c"VMCB Control Area:\0A\00", align 1
@.str.2 = private unnamed_addr constant [11 x i8] c"%-20s%04x\0A\00", align 1
@.str.3 = private unnamed_addr constant [9 x i8] c"cr_read:\00", align 1
@.str.4 = private unnamed_addr constant [10 x i8] c"cr_write:\00", align 1
@.str.5 = private unnamed_addr constant [9 x i8] c"dr_read:\00", align 1
@.str.6 = private unnamed_addr constant [10 x i8] c"dr_write:\00", align 1
@.str.7 = private unnamed_addr constant [11 x i8] c"%-20s%08x\0A\00", align 1
@.str.8 = private unnamed_addr constant [12 x i8] c"exceptions:\00", align 1
@.str.9 = private unnamed_addr constant [14 x i8] c"%-20s%016llx\0A\00", align 1
@.str.10 = private unnamed_addr constant [12 x i8] c"intercepts:\00", align 1
@.str.11 = private unnamed_addr constant [9 x i8] c"%-20s%d\0A\00", align 1
@.str.12 = private unnamed_addr constant [20 x i8] c"pause filter count:\00", align 1
@.str.13 = private unnamed_addr constant [24 x i8] c"pause filter threshold:\00", align 1
@.str.14 = private unnamed_addr constant [14 x i8] c"iopm_base_pa:\00", align 1
@.str.15 = private unnamed_addr constant [15 x i8] c"msrpm_base_pa:\00", align 1
@.str.16 = private unnamed_addr constant [12 x i8] c"tsc_offset:\00", align 1
@.str.17 = private unnamed_addr constant [6 x i8] c"asid:\00", align 1
@.str.18 = private unnamed_addr constant [9 x i8] c"tlb_ctl:\00", align 1
@.str.19 = private unnamed_addr constant [9 x i8] c"int_ctl:\00", align 1
@.str.20 = private unnamed_addr constant [12 x i8] c"int_vector:\00", align 1
@.str.21 = private unnamed_addr constant [11 x i8] c"int_state:\00", align 1
@.str.22 = private unnamed_addr constant [11 x i8] c"exit_code:\00", align 1
@.str.23 = private unnamed_addr constant [12 x i8] c"exit_info1:\00", align 1
@.str.24 = private unnamed_addr constant [12 x i8] c"exit_info2:\00", align 1
@.str.25 = private unnamed_addr constant [15 x i8] c"exit_int_info:\00", align 1
@.str.26 = private unnamed_addr constant [19 x i8] c"exit_int_info_err:\00", align 1
@.str.27 = private unnamed_addr constant [11 x i8] c"%-20s%lld\0A\00", align 1
@.str.28 = private unnamed_addr constant [12 x i8] c"nested_ctl:\00", align 1
@.str.29 = private unnamed_addr constant [12 x i8] c"nested_cr3:\00", align 1
@.str.30 = private unnamed_addr constant [16 x i8] c"avic_vapic_bar:\00", align 1
@.str.31 = private unnamed_addr constant [11 x i8] c"event_inj:\00", align 1
@.str.32 = private unnamed_addr constant [15 x i8] c"event_inj_err:\00", align 1
@.str.33 = private unnamed_addr constant [10 x i8] c"virt_ext:\00", align 1
@.str.34 = private unnamed_addr constant [10 x i8] c"next_rip:\00", align 1
@.str.35 = private unnamed_addr constant [19 x i8] c"avic_backing_page:\00", align 1
@.str.36 = private unnamed_addr constant [17 x i8] c"avic_logical_id:\00", align 1
@.str.37 = private unnamed_addr constant [18 x i8] c"avic_physical_id:\00", align 1
@.str.38 = private unnamed_addr constant [23 x i8] c"VMCB State Save Area:\0A\00", align 1
@.str.39 = private unnamed_addr constant [41 x i8] c"%-5s s: %04x a: %04x l: %08x b: %016llx\0A\00", align 1
@.str.40 = private unnamed_addr constant [4 x i8] c"es:\00", align 1
@.str.41 = private unnamed_addr constant [4 x i8] c"cs:\00", align 1
@.str.42 = private unnamed_addr constant [4 x i8] c"ss:\00", align 1
@.str.43 = private unnamed_addr constant [4 x i8] c"ds:\00", align 1
@.str.44 = private unnamed_addr constant [4 x i8] c"fs:\00", align 1
@.str.45 = private unnamed_addr constant [4 x i8] c"gs:\00", align 1
@.str.46 = private unnamed_addr constant [6 x i8] c"gdtr:\00", align 1
@.str.47 = private unnamed_addr constant [6 x i8] c"ldtr:\00", align 1
@.str.48 = private unnamed_addr constant [6 x i8] c"idtr:\00", align 1
@.str.49 = private unnamed_addr constant [4 x i8] c"tr:\00", align 1
@.str.50 = private unnamed_addr constant [57 x i8] c"cpl: %d efer: %016llx\0A\00", align 1
@.str.51 = private unnamed_addr constant [29 x i8] c"%-15s %016llx %-13s %016llx\0A\00", align 1
@.str.52 = private unnamed_addr constant [5 x i8] c"cr0:\00", align 1
@.str.53 = private unnamed_addr constant [5 x i8] c"cr2:\00", align 1
@.str.54 = private unnamed_addr constant [5 x i8] c"cr3:\00", align 1
@.str.55 = private unnamed_addr constant [5 x i8] c"cr4:\00", align 1
@.str.56 = private unnamed_addr constant [5 x i8] c"dr6:\00", align 1
@.str.57 = private unnamed_addr constant [5 x i8] c"dr7:\00", align 1
@.str.58 = private unnamed_addr constant [5 x i8] c"rip:\00", align 1
@.str.59 = private unnamed_addr constant [8 x i8] c"rflags:\00", align 1
@.str.60 = private unnamed_addr constant [5 x i8] c"rsp:\00", align 1
@.str.61 = private unnamed_addr constant [5 x i8] c"rax:\00", align 1
@.str.62 = private unnamed_addr constant [6 x i8] c"star:\00", align 1
@.str.63 = private unnamed_addr constant [7 x i8] c"lstar:\00", align 1
@.str.64 = private unnamed_addr constant [7 x i8] c"cstar:\00", align 1
@.str.65 = private unnamed_addr constant [8 x i8] c"sfmask:\00", align 1
@.str.66 = private unnamed_addr constant [16 x i8] c"kernel_gs_base:\00", align 1
@.str.67 = private unnamed_addr constant [13 x i8] c"sysenter_cs:\00", align 1
@.str.68 = private unnamed_addr constant [14 x i8] c"sysenter_esp:\00", align 1
@.str.69 = private unnamed_addr constant [14 x i8] c"sysenter_eip:\00", align 1
@.str.70 = private unnamed_addr constant [6 x i8] c"gpat:\00", align 1
@.str.71 = private unnamed_addr constant [8 x i8] c"dbgctl:\00", align 1
@.str.72 = private unnamed_addr constant [9 x i8] c"br_from:\00", align 1
@.str.73 = private unnamed_addr constant [7 x i8] c"br_to:\00", align 1
@.str.74 = private unnamed_addr constant [11 x i8] c"excp_from:\00", align 1
@.str.75 = private unnamed_addr constant [9 x i8] c"excp_to:\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @dump_vmcb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @dump_vmcb(ptr noundef %0) #0 {
%2 = tail call ptr @to_svm(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i32, ptr @dump_invalid_vmcb, align 4, !tbaa !10
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @pr_warn_ratelimited(ptr noundef nonnull @.str) #2
br label %260
8: ; preds = %1
%9 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1
%10 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.1) #2
%11 = load i32, ptr %9, align 4, !tbaa !12
%12 = and i32 %11, 65535
%13 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef %12) #2
%14 = load i32, ptr %9, align 4, !tbaa !12
%15 = ashr i32 %14, 16
%16 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.4, i32 noundef %15) #2
%17 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 1
%18 = load i32, ptr %17, align 4, !tbaa !14
%19 = and i32 %18, 65535
%20 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.5, i32 noundef %19) #2
%21 = load i32, ptr %17, align 4, !tbaa !14
%22 = ashr i32 %21, 16
%23 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.6, i32 noundef %22) #2
%24 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 28
%25 = load i32, ptr %24, align 4, !tbaa !15
%26 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.8, i32 noundef %25) #2
%27 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 27
%28 = load i32, ptr %27, align 4, !tbaa !16
%29 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.10, i32 noundef %28) #2
%30 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 26
%31 = load i32, ptr %30, align 4, !tbaa !17
%32 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.12, i32 noundef %31) #2
%33 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 25
%34 = load i32, ptr %33, align 4, !tbaa !18
%35 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.13, i32 noundef %34) #2
%36 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 24
%37 = load i32, ptr %36, align 4, !tbaa !19
%38 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.14, i32 noundef %37) #2
%39 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 23
%40 = load i32, ptr %39, align 4, !tbaa !20
%41 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.15, i32 noundef %40) #2
%42 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 22
%43 = load i32, ptr %42, align 4, !tbaa !21
%44 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.16, i32 noundef %43) #2
%45 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 21
%46 = load i32, ptr %45, align 4, !tbaa !22
%47 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.17, i32 noundef %46) #2
%48 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 20
%49 = load i32, ptr %48, align 4, !tbaa !23
%50 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.18, i32 noundef %49) #2
%51 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 19
%52 = load i32, ptr %51, align 4, !tbaa !24
%53 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.19, i32 noundef %52) #2
%54 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 18
%55 = load i32, ptr %54, align 4, !tbaa !25
%56 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.20, i32 noundef %55) #2
%57 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 17
%58 = load i32, ptr %57, align 4, !tbaa !26
%59 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.21, i32 noundef %58) #2
%60 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 16
%61 = load i32, ptr %60, align 4, !tbaa !27
%62 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.22, i32 noundef %61) #2
%63 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 15
%64 = load i32, ptr %63, align 4, !tbaa !28
%65 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.23, i32 noundef %64) #2
%66 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 14
%67 = load i32, ptr %66, align 4, !tbaa !29
%68 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.24, i32 noundef %67) #2
%69 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 13
%70 = load i32, ptr %69, align 4, !tbaa !30
%71 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.25, i32 noundef %70) #2
%72 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 12
%73 = load i32, ptr %72, align 4, !tbaa !31
%74 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.26, i32 noundef %73) #2
%75 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 11
%76 = load i32, ptr %75, align 4, !tbaa !32
%77 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.27, ptr noundef nonnull @.str.28, i32 noundef %76) #2
%78 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 10
%79 = load i32, ptr %78, align 4, !tbaa !33
%80 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.29, i32 noundef %79) #2
%81 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 9
%82 = load i32, ptr %81, align 4, !tbaa !34
%83 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.30, i32 noundef %82) #2
%84 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 8
%85 = load i32, ptr %84, align 4, !tbaa !35
%86 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.31, i32 noundef %85) #2
%87 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 7
%88 = load i32, ptr %87, align 4, !tbaa !36
%89 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.32, i32 noundef %88) #2
%90 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 6
%91 = load i32, ptr %90, align 4, !tbaa !37
%92 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.27, ptr noundef nonnull @.str.33, i32 noundef %91) #2
%93 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 5
%94 = load i32, ptr %93, align 4, !tbaa !38
%95 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.34, i32 noundef %94) #2
%96 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 4
%97 = load i32, ptr %96, align 4, !tbaa !39
%98 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.35, i32 noundef %97) #2
%99 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 3
%100 = load i32, ptr %99, align 4, !tbaa !40
%101 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.36, i32 noundef %100) #2
%102 = getelementptr inbounds %struct.TYPE_22__, ptr %3, i64 0, i32 1, i32 2
%103 = load i32, ptr %102, align 4, !tbaa !41
%104 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.37, i32 noundef %103) #2
%105 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.38) #2
%106 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 35
%107 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 35, i32 3
%108 = load i32, ptr %107, align 4, !tbaa !42
%109 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 35, i32 2
%110 = load i32, ptr %109, align 4, !tbaa !54
%111 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 35, i32 1
%112 = load i32, ptr %111, align 4, !tbaa !55
%113 = load i32, ptr %106, align 4, !tbaa !56
%114 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.40, i32 noundef %108, i32 noundef %110, i32 noundef %112, i32 noundef %113) #2
%115 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 34
%116 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 34, i32 3
%117 = load i32, ptr %116, align 4, !tbaa !57
%118 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 34, i32 2
%119 = load i32, ptr %118, align 4, !tbaa !58
%120 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 34, i32 1
%121 = load i32, ptr %120, align 4, !tbaa !59
%122 = load i32, ptr %115, align 4, !tbaa !60
%123 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.41, i32 noundef %117, i32 noundef %119, i32 noundef %121, i32 noundef %122) #2
%124 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 33
%125 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 33, i32 3
%126 = load i32, ptr %125, align 4, !tbaa !61
%127 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 33, i32 2
%128 = load i32, ptr %127, align 4, !tbaa !62
%129 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 33, i32 1
%130 = load i32, ptr %129, align 4, !tbaa !63
%131 = load i32, ptr %124, align 4, !tbaa !64
%132 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.42, i32 noundef %126, i32 noundef %128, i32 noundef %130, i32 noundef %131) #2
%133 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 32
%134 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 32, i32 3
%135 = load i32, ptr %134, align 4, !tbaa !65
%136 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 32, i32 2
%137 = load i32, ptr %136, align 4, !tbaa !66
%138 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 32, i32 1
%139 = load i32, ptr %138, align 4, !tbaa !67
%140 = load i32, ptr %133, align 4, !tbaa !68
%141 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.43, i32 noundef %135, i32 noundef %137, i32 noundef %139, i32 noundef %140) #2
%142 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 31
%143 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 31, i32 3
%144 = load i32, ptr %143, align 4, !tbaa !69
%145 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 31, i32 2
%146 = load i32, ptr %145, align 4, !tbaa !70
%147 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 31, i32 1
%148 = load i32, ptr %147, align 4, !tbaa !71
%149 = load i32, ptr %142, align 4, !tbaa !72
%150 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.44, i32 noundef %144, i32 noundef %146, i32 noundef %148, i32 noundef %149) #2
%151 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 30
%152 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 30, i32 3
%153 = load i32, ptr %152, align 4, !tbaa !73
%154 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 30, i32 2
%155 = load i32, ptr %154, align 4, !tbaa !74
%156 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 30, i32 1
%157 = load i32, ptr %156, align 4, !tbaa !75
%158 = load i32, ptr %151, align 4, !tbaa !76
%159 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.45, i32 noundef %153, i32 noundef %155, i32 noundef %157, i32 noundef %158) #2
%160 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 29
%161 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 29, i32 3
%162 = load i32, ptr %161, align 4, !tbaa !77
%163 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 29, i32 2
%164 = load i32, ptr %163, align 4, !tbaa !78
%165 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 29, i32 1
%166 = load i32, ptr %165, align 4, !tbaa !79
%167 = load i32, ptr %160, align 4, !tbaa !80
%168 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.46, i32 noundef %162, i32 noundef %164, i32 noundef %166, i32 noundef %167) #2
%169 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 28
%170 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 28, i32 3
%171 = load i32, ptr %170, align 4, !tbaa !81
%172 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 28, i32 2
%173 = load i32, ptr %172, align 4, !tbaa !82
%174 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 28, i32 1
%175 = load i32, ptr %174, align 4, !tbaa !83
%176 = load i32, ptr %169, align 4, !tbaa !84
%177 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.47, i32 noundef %171, i32 noundef %173, i32 noundef %175, i32 noundef %176) #2
%178 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 27
%179 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 27, i32 3
%180 = load i32, ptr %179, align 4, !tbaa !85
%181 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 27, i32 2
%182 = load i32, ptr %181, align 4, !tbaa !86
%183 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 27, i32 1
%184 = load i32, ptr %183, align 4, !tbaa !87
%185 = load i32, ptr %178, align 4, !tbaa !88
%186 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.48, i32 noundef %180, i32 noundef %182, i32 noundef %184, i32 noundef %185) #2
%187 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 26
%188 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 26, i32 3
%189 = load i32, ptr %188, align 4, !tbaa !89
%190 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 26, i32 2
%191 = load i32, ptr %190, align 4, !tbaa !90
%192 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 26, i32 1
%193 = load i32, ptr %192, align 4, !tbaa !91
%194 = load i32, ptr %187, align 4, !tbaa !92
%195 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.49, i32 noundef %189, i32 noundef %191, i32 noundef %193, i32 noundef %194) #2
%196 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 25
%197 = load i32, ptr %196, align 4, !tbaa !93
%198 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 24
%199 = load i32, ptr %198, align 4, !tbaa !94
%200 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.50, i32 noundef %197, i32 noundef %199) #2
%201 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 23
%202 = load i32, ptr %201, align 4, !tbaa !95
%203 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 22
%204 = load i32, ptr %203, align 4, !tbaa !96
%205 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.52, i32 noundef %202, ptr noundef nonnull @.str.53, i32 noundef %204) #2
%206 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 21
%207 = load i32, ptr %206, align 4, !tbaa !97
%208 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 20
%209 = load i32, ptr %208, align 4, !tbaa !98
%210 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.54, i32 noundef %207, ptr noundef nonnull @.str.55, i32 noundef %209) #2
%211 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 19
%212 = load i32, ptr %211, align 4, !tbaa !99
%213 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 18
%214 = load i32, ptr %213, align 4, !tbaa !100
%215 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.56, i32 noundef %212, ptr noundef nonnull @.str.57, i32 noundef %214) #2
%216 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 17
%217 = load i32, ptr %216, align 4, !tbaa !101
%218 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 16
%219 = load i32, ptr %218, align 4, !tbaa !102
%220 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.58, i32 noundef %217, ptr noundef nonnull @.str.59, i32 noundef %219) #2
%221 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 15
%222 = load i32, ptr %221, align 4, !tbaa !103
%223 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 14
%224 = load i32, ptr %223, align 4, !tbaa !104
%225 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.60, i32 noundef %222, ptr noundef nonnull @.str.61, i32 noundef %224) #2
%226 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 13
%227 = load i32, ptr %226, align 4, !tbaa !105
%228 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 12
%229 = load i32, ptr %228, align 4, !tbaa !106
%230 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.62, i32 noundef %227, ptr noundef nonnull @.str.63, i32 noundef %229) #2
%231 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 11
%232 = load i32, ptr %231, align 4, !tbaa !107
%233 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 10
%234 = load i32, ptr %233, align 4, !tbaa !108
%235 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.64, i32 noundef %232, ptr noundef nonnull @.str.65, i32 noundef %234) #2
%236 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 9
%237 = load i32, ptr %236, align 4, !tbaa !109
%238 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 8
%239 = load i32, ptr %238, align 4, !tbaa !110
%240 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.66, i32 noundef %237, ptr noundef nonnull @.str.67, i32 noundef %239) #2
%241 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 7
%242 = load i32, ptr %241, align 4, !tbaa !111
%243 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 6
%244 = load i32, ptr %243, align 4, !tbaa !112
%245 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.68, i32 noundef %242, ptr noundef nonnull @.str.69, i32 noundef %244) #2
%246 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 5
%247 = load i32, ptr %246, align 4, !tbaa !113
%248 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 4
%249 = load i32, ptr %248, align 4, !tbaa !114
%250 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.70, i32 noundef %247, ptr noundef nonnull @.str.71, i32 noundef %249) #2
%251 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 3
%252 = load i32, ptr %251, align 4, !tbaa !115
%253 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 2
%254 = load i32, ptr %253, align 4, !tbaa !116
%255 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.72, i32 noundef %252, ptr noundef nonnull @.str.73, i32 noundef %254) #2
%256 = getelementptr inbounds %struct.vmcb_save_area, ptr %3, i64 0, i32 1
%257 = load i32, ptr %256, align 4, !tbaa !117
%258 = load i32, ptr %3, align 4, !tbaa !118
%259 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.74, i32 noundef %257, ptr noundef nonnull @.str.75, i32 noundef %258) #2
br label %260
260: ; preds = %8, %6
ret void
}
declare ptr @to_svm(ptr noundef) local_unnamed_addr #1
declare i32 @pr_warn_ratelimited(ptr noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vcpu_svm", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"vmcb_control_area", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112}
!14 = !{!13, !11, i64 4}
!15 = !{!13, !11, i64 112}
!16 = !{!13, !11, i64 108}
!17 = !{!13, !11, i64 104}
!18 = !{!13, !11, i64 100}
!19 = !{!13, !11, i64 96}
!20 = !{!13, !11, i64 92}
!21 = !{!13, !11, i64 88}
!22 = !{!13, !11, i64 84}
!23 = !{!13, !11, i64 80}
!24 = !{!13, !11, i64 76}
!25 = !{!13, !11, i64 72}
!26 = !{!13, !11, i64 68}
!27 = !{!13, !11, i64 64}
!28 = !{!13, !11, i64 60}
!29 = !{!13, !11, i64 56}
!30 = !{!13, !11, i64 52}
!31 = !{!13, !11, i64 48}
!32 = !{!13, !11, i64 44}
!33 = !{!13, !11, i64 40}
!34 = !{!13, !11, i64 36}
!35 = !{!13, !11, i64 32}
!36 = !{!13, !11, i64 28}
!37 = !{!13, !11, i64 24}
!38 = !{!13, !11, i64 20}
!39 = !{!13, !11, i64 16}
!40 = !{!13, !11, i64 12}
!41 = !{!13, !11, i64 8}
!42 = !{!43, !11, i64 260}
!43 = !{!"vmcb_save_area", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !44, i64 104, !45, i64 120, !46, i64 136, !47, i64 152, !48, i64 168, !49, i64 184, !50, i64 200, !51, i64 216, !52, i64 232, !53, i64 248}
!44 = !{!"TYPE_21__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!45 = !{!"TYPE_20__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!46 = !{!"TYPE_19__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!47 = !{!"TYPE_18__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!48 = !{!"TYPE_17__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!49 = !{!"TYPE_16__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!50 = !{!"TYPE_15__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!51 = !{!"TYPE_14__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!52 = !{!"TYPE_13__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!53 = !{!"TYPE_12__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!54 = !{!43, !11, i64 256}
!55 = !{!43, !11, i64 252}
!56 = !{!43, !11, i64 248}
!57 = !{!43, !11, i64 244}
!58 = !{!43, !11, i64 240}
!59 = !{!43, !11, i64 236}
!60 = !{!43, !11, i64 232}
!61 = !{!43, !11, i64 228}
!62 = !{!43, !11, i64 224}
!63 = !{!43, !11, i64 220}
!64 = !{!43, !11, i64 216}
!65 = !{!43, !11, i64 212}
!66 = !{!43, !11, i64 208}
!67 = !{!43, !11, i64 204}
!68 = !{!43, !11, i64 200}
!69 = !{!43, !11, i64 196}
!70 = !{!43, !11, i64 192}
!71 = !{!43, !11, i64 188}
!72 = !{!43, !11, i64 184}
!73 = !{!43, !11, i64 180}
!74 = !{!43, !11, i64 176}
!75 = !{!43, !11, i64 172}
!76 = !{!43, !11, i64 168}
!77 = !{!43, !11, i64 164}
!78 = !{!43, !11, i64 160}
!79 = !{!43, !11, i64 156}
!80 = !{!43, !11, i64 152}
!81 = !{!43, !11, i64 148}
!82 = !{!43, !11, i64 144}
!83 = !{!43, !11, i64 140}
!84 = !{!43, !11, i64 136}
!85 = !{!43, !11, i64 132}
!86 = !{!43, !11, i64 128}
!87 = !{!43, !11, i64 124}
!88 = !{!43, !11, i64 120}
!89 = !{!43, !11, i64 116}
!90 = !{!43, !11, i64 112}
!91 = !{!43, !11, i64 108}
!92 = !{!43, !11, i64 104}
!93 = !{!43, !11, i64 100}
!94 = !{!43, !11, i64 96}
!95 = !{!43, !11, i64 92}
!96 = !{!43, !11, i64 88}
!97 = !{!43, !11, i64 84}
!98 = !{!43, !11, i64 80}
!99 = !{!43, !11, i64 76}
!100 = !{!43, !11, i64 72}
!101 = !{!43, !11, i64 68}
!102 = !{!43, !11, i64 64}
!103 = !{!43, !11, i64 60}
!104 = !{!43, !11, i64 56}
!105 = !{!43, !11, i64 52}
!106 = !{!43, !11, i64 48}
!107 = !{!43, !11, i64 44}
!108 = !{!43, !11, i64 40}
!109 = !{!43, !11, i64 36}
!110 = !{!43, !11, i64 32}
!111 = !{!43, !11, i64 28}
!112 = !{!43, !11, i64 24}
!113 = !{!43, !11, i64 20}
!114 = !{!43, !11, i64 16}
!115 = !{!43, !11, i64 12}
!116 = !{!43, !11, i64 8}
!117 = !{!43, !11, i64 4}
!118 = !{!43, !11, i64 0}
|
; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_svm.c_dump_vmcb.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/extr_svm.c_dump_vmcb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@dump_invalid_vmcb = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [61 x i8] c"set kvm_amd.dump_invalid_vmcb=1 to dump internal KVM state.\0A\00", align 1
@.str.1 = private unnamed_addr constant [20 x i8] c"VMCB Control Area:\0A\00", align 1
@.str.2 = private unnamed_addr constant [11 x i8] c"%-20s%04x\0A\00", align 1
@.str.3 = private unnamed_addr constant [9 x i8] c"cr_read:\00", align 1
@.str.4 = private unnamed_addr constant [10 x i8] c"cr_write:\00", align 1
@.str.5 = private unnamed_addr constant [9 x i8] c"dr_read:\00", align 1
@.str.6 = private unnamed_addr constant [10 x i8] c"dr_write:\00", align 1
@.str.7 = private unnamed_addr constant [11 x i8] c"%-20s%08x\0A\00", align 1
@.str.8 = private unnamed_addr constant [12 x i8] c"exceptions:\00", align 1
@.str.9 = private unnamed_addr constant [14 x i8] c"%-20s%016llx\0A\00", align 1
@.str.10 = private unnamed_addr constant [12 x i8] c"intercepts:\00", align 1
@.str.11 = private unnamed_addr constant [9 x i8] c"%-20s%d\0A\00", align 1
@.str.12 = private unnamed_addr constant [20 x i8] c"pause filter count:\00", align 1
@.str.13 = private unnamed_addr constant [24 x i8] c"pause filter threshold:\00", align 1
@.str.14 = private unnamed_addr constant [14 x i8] c"iopm_base_pa:\00", align 1
@.str.15 = private unnamed_addr constant [15 x i8] c"msrpm_base_pa:\00", align 1
@.str.16 = private unnamed_addr constant [12 x i8] c"tsc_offset:\00", align 1
@.str.17 = private unnamed_addr constant [6 x i8] c"asid:\00", align 1
@.str.18 = private unnamed_addr constant [9 x i8] c"tlb_ctl:\00", align 1
@.str.19 = private unnamed_addr constant [9 x i8] c"int_ctl:\00", align 1
@.str.20 = private unnamed_addr constant [12 x i8] c"int_vector:\00", align 1
@.str.21 = private unnamed_addr constant [11 x i8] c"int_state:\00", align 1
@.str.22 = private unnamed_addr constant [11 x i8] c"exit_code:\00", align 1
@.str.23 = private unnamed_addr constant [12 x i8] c"exit_info1:\00", align 1
@.str.24 = private unnamed_addr constant [12 x i8] c"exit_info2:\00", align 1
@.str.25 = private unnamed_addr constant [15 x i8] c"exit_int_info:\00", align 1
@.str.26 = private unnamed_addr constant [19 x i8] c"exit_int_info_err:\00", align 1
@.str.27 = private unnamed_addr constant [11 x i8] c"%-20s%lld\0A\00", align 1
@.str.28 = private unnamed_addr constant [12 x i8] c"nested_ctl:\00", align 1
@.str.29 = private unnamed_addr constant [12 x i8] c"nested_cr3:\00", align 1
@.str.30 = private unnamed_addr constant [16 x i8] c"avic_vapic_bar:\00", align 1
@.str.31 = private unnamed_addr constant [11 x i8] c"event_inj:\00", align 1
@.str.32 = private unnamed_addr constant [15 x i8] c"event_inj_err:\00", align 1
@.str.33 = private unnamed_addr constant [10 x i8] c"virt_ext:\00", align 1
@.str.34 = private unnamed_addr constant [10 x i8] c"next_rip:\00", align 1
@.str.35 = private unnamed_addr constant [19 x i8] c"avic_backing_page:\00", align 1
@.str.36 = private unnamed_addr constant [17 x i8] c"avic_logical_id:\00", align 1
@.str.37 = private unnamed_addr constant [18 x i8] c"avic_physical_id:\00", align 1
@.str.38 = private unnamed_addr constant [23 x i8] c"VMCB State Save Area:\0A\00", align 1
@.str.39 = private unnamed_addr constant [41 x i8] c"%-5s s: %04x a: %04x l: %08x b: %016llx\0A\00", align 1
@.str.40 = private unnamed_addr constant [4 x i8] c"es:\00", align 1
@.str.41 = private unnamed_addr constant [4 x i8] c"cs:\00", align 1
@.str.42 = private unnamed_addr constant [4 x i8] c"ss:\00", align 1
@.str.43 = private unnamed_addr constant [4 x i8] c"ds:\00", align 1
@.str.44 = private unnamed_addr constant [4 x i8] c"fs:\00", align 1
@.str.45 = private unnamed_addr constant [4 x i8] c"gs:\00", align 1
@.str.46 = private unnamed_addr constant [6 x i8] c"gdtr:\00", align 1
@.str.47 = private unnamed_addr constant [6 x i8] c"ldtr:\00", align 1
@.str.48 = private unnamed_addr constant [6 x i8] c"idtr:\00", align 1
@.str.49 = private unnamed_addr constant [4 x i8] c"tr:\00", align 1
@.str.50 = private unnamed_addr constant [57 x i8] c"cpl: %d efer: %016llx\0A\00", align 1
@.str.51 = private unnamed_addr constant [29 x i8] c"%-15s %016llx %-13s %016llx\0A\00", align 1
@.str.52 = private unnamed_addr constant [5 x i8] c"cr0:\00", align 1
@.str.53 = private unnamed_addr constant [5 x i8] c"cr2:\00", align 1
@.str.54 = private unnamed_addr constant [5 x i8] c"cr3:\00", align 1
@.str.55 = private unnamed_addr constant [5 x i8] c"cr4:\00", align 1
@.str.56 = private unnamed_addr constant [5 x i8] c"dr6:\00", align 1
@.str.57 = private unnamed_addr constant [5 x i8] c"dr7:\00", align 1
@.str.58 = private unnamed_addr constant [5 x i8] c"rip:\00", align 1
@.str.59 = private unnamed_addr constant [8 x i8] c"rflags:\00", align 1
@.str.60 = private unnamed_addr constant [5 x i8] c"rsp:\00", align 1
@.str.61 = private unnamed_addr constant [5 x i8] c"rax:\00", align 1
@.str.62 = private unnamed_addr constant [6 x i8] c"star:\00", align 1
@.str.63 = private unnamed_addr constant [7 x i8] c"lstar:\00", align 1
@.str.64 = private unnamed_addr constant [7 x i8] c"cstar:\00", align 1
@.str.65 = private unnamed_addr constant [8 x i8] c"sfmask:\00", align 1
@.str.66 = private unnamed_addr constant [16 x i8] c"kernel_gs_base:\00", align 1
@.str.67 = private unnamed_addr constant [13 x i8] c"sysenter_cs:\00", align 1
@.str.68 = private unnamed_addr constant [14 x i8] c"sysenter_esp:\00", align 1
@.str.69 = private unnamed_addr constant [14 x i8] c"sysenter_eip:\00", align 1
@.str.70 = private unnamed_addr constant [6 x i8] c"gpat:\00", align 1
@.str.71 = private unnamed_addr constant [8 x i8] c"dbgctl:\00", align 1
@.str.72 = private unnamed_addr constant [9 x i8] c"br_from:\00", align 1
@.str.73 = private unnamed_addr constant [7 x i8] c"br_to:\00", align 1
@.str.74 = private unnamed_addr constant [11 x i8] c"excp_from:\00", align 1
@.str.75 = private unnamed_addr constant [9 x i8] c"excp_to:\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @dump_vmcb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @dump_vmcb(ptr noundef %0) #0 {
%2 = tail call ptr @to_svm(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i32, ptr @dump_invalid_vmcb, align 4, !tbaa !11
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @pr_warn_ratelimited(ptr noundef nonnull @.str) #2
br label %260
8: ; preds = %1
%9 = getelementptr inbounds i8, ptr %3, i64 264
%10 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.1) #2
%11 = load i32, ptr %9, align 4, !tbaa !13
%12 = and i32 %11, 65535
%13 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef %12) #2
%14 = load i32, ptr %9, align 4, !tbaa !13
%15 = ashr i32 %14, 16
%16 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.4, i32 noundef %15) #2
%17 = getelementptr inbounds i8, ptr %3, i64 268
%18 = load i32, ptr %17, align 4, !tbaa !15
%19 = and i32 %18, 65535
%20 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.5, i32 noundef %19) #2
%21 = load i32, ptr %17, align 4, !tbaa !15
%22 = ashr i32 %21, 16
%23 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.6, i32 noundef %22) #2
%24 = getelementptr inbounds i8, ptr %3, i64 376
%25 = load i32, ptr %24, align 4, !tbaa !16
%26 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.8, i32 noundef %25) #2
%27 = getelementptr inbounds i8, ptr %3, i64 372
%28 = load i32, ptr %27, align 4, !tbaa !17
%29 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.10, i32 noundef %28) #2
%30 = getelementptr inbounds i8, ptr %3, i64 368
%31 = load i32, ptr %30, align 4, !tbaa !18
%32 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.12, i32 noundef %31) #2
%33 = getelementptr inbounds i8, ptr %3, i64 364
%34 = load i32, ptr %33, align 4, !tbaa !19
%35 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.13, i32 noundef %34) #2
%36 = getelementptr inbounds i8, ptr %3, i64 360
%37 = load i32, ptr %36, align 4, !tbaa !20
%38 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.14, i32 noundef %37) #2
%39 = getelementptr inbounds i8, ptr %3, i64 356
%40 = load i32, ptr %39, align 4, !tbaa !21
%41 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.15, i32 noundef %40) #2
%42 = getelementptr inbounds i8, ptr %3, i64 352
%43 = load i32, ptr %42, align 4, !tbaa !22
%44 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.16, i32 noundef %43) #2
%45 = getelementptr inbounds i8, ptr %3, i64 348
%46 = load i32, ptr %45, align 4, !tbaa !23
%47 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.17, i32 noundef %46) #2
%48 = getelementptr inbounds i8, ptr %3, i64 344
%49 = load i32, ptr %48, align 4, !tbaa !24
%50 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.18, i32 noundef %49) #2
%51 = getelementptr inbounds i8, ptr %3, i64 340
%52 = load i32, ptr %51, align 4, !tbaa !25
%53 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.19, i32 noundef %52) #2
%54 = getelementptr inbounds i8, ptr %3, i64 336
%55 = load i32, ptr %54, align 4, !tbaa !26
%56 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.20, i32 noundef %55) #2
%57 = getelementptr inbounds i8, ptr %3, i64 332
%58 = load i32, ptr %57, align 4, !tbaa !27
%59 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.21, i32 noundef %58) #2
%60 = getelementptr inbounds i8, ptr %3, i64 328
%61 = load i32, ptr %60, align 4, !tbaa !28
%62 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.22, i32 noundef %61) #2
%63 = getelementptr inbounds i8, ptr %3, i64 324
%64 = load i32, ptr %63, align 4, !tbaa !29
%65 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.23, i32 noundef %64) #2
%66 = getelementptr inbounds i8, ptr %3, i64 320
%67 = load i32, ptr %66, align 4, !tbaa !30
%68 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.24, i32 noundef %67) #2
%69 = getelementptr inbounds i8, ptr %3, i64 316
%70 = load i32, ptr %69, align 4, !tbaa !31
%71 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.25, i32 noundef %70) #2
%72 = getelementptr inbounds i8, ptr %3, i64 312
%73 = load i32, ptr %72, align 4, !tbaa !32
%74 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.26, i32 noundef %73) #2
%75 = getelementptr inbounds i8, ptr %3, i64 308
%76 = load i32, ptr %75, align 4, !tbaa !33
%77 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.27, ptr noundef nonnull @.str.28, i32 noundef %76) #2
%78 = getelementptr inbounds i8, ptr %3, i64 304
%79 = load i32, ptr %78, align 4, !tbaa !34
%80 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.29, i32 noundef %79) #2
%81 = getelementptr inbounds i8, ptr %3, i64 300
%82 = load i32, ptr %81, align 4, !tbaa !35
%83 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.30, i32 noundef %82) #2
%84 = getelementptr inbounds i8, ptr %3, i64 296
%85 = load i32, ptr %84, align 4, !tbaa !36
%86 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.31, i32 noundef %85) #2
%87 = getelementptr inbounds i8, ptr %3, i64 292
%88 = load i32, ptr %87, align 4, !tbaa !37
%89 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.32, i32 noundef %88) #2
%90 = getelementptr inbounds i8, ptr %3, i64 288
%91 = load i32, ptr %90, align 4, !tbaa !38
%92 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.27, ptr noundef nonnull @.str.33, i32 noundef %91) #2
%93 = getelementptr inbounds i8, ptr %3, i64 284
%94 = load i32, ptr %93, align 4, !tbaa !39
%95 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.34, i32 noundef %94) #2
%96 = getelementptr inbounds i8, ptr %3, i64 280
%97 = load i32, ptr %96, align 4, !tbaa !40
%98 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.35, i32 noundef %97) #2
%99 = getelementptr inbounds i8, ptr %3, i64 276
%100 = load i32, ptr %99, align 4, !tbaa !41
%101 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.36, i32 noundef %100) #2
%102 = getelementptr inbounds i8, ptr %3, i64 272
%103 = load i32, ptr %102, align 4, !tbaa !42
%104 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.37, i32 noundef %103) #2
%105 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.38) #2
%106 = getelementptr inbounds i8, ptr %3, i64 248
%107 = getelementptr inbounds i8, ptr %3, i64 260
%108 = load i32, ptr %107, align 4, !tbaa !43
%109 = getelementptr inbounds i8, ptr %3, i64 256
%110 = load i32, ptr %109, align 4, !tbaa !55
%111 = getelementptr inbounds i8, ptr %3, i64 252
%112 = load i32, ptr %111, align 4, !tbaa !56
%113 = load i32, ptr %106, align 4, !tbaa !57
%114 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.40, i32 noundef %108, i32 noundef %110, i32 noundef %112, i32 noundef %113) #2
%115 = getelementptr inbounds i8, ptr %3, i64 232
%116 = getelementptr inbounds i8, ptr %3, i64 244
%117 = load i32, ptr %116, align 4, !tbaa !58
%118 = getelementptr inbounds i8, ptr %3, i64 240
%119 = load i32, ptr %118, align 4, !tbaa !59
%120 = getelementptr inbounds i8, ptr %3, i64 236
%121 = load i32, ptr %120, align 4, !tbaa !60
%122 = load i32, ptr %115, align 4, !tbaa !61
%123 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.41, i32 noundef %117, i32 noundef %119, i32 noundef %121, i32 noundef %122) #2
%124 = getelementptr inbounds i8, ptr %3, i64 216
%125 = getelementptr inbounds i8, ptr %3, i64 228
%126 = load i32, ptr %125, align 4, !tbaa !62
%127 = getelementptr inbounds i8, ptr %3, i64 224
%128 = load i32, ptr %127, align 4, !tbaa !63
%129 = getelementptr inbounds i8, ptr %3, i64 220
%130 = load i32, ptr %129, align 4, !tbaa !64
%131 = load i32, ptr %124, align 4, !tbaa !65
%132 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.42, i32 noundef %126, i32 noundef %128, i32 noundef %130, i32 noundef %131) #2
%133 = getelementptr inbounds i8, ptr %3, i64 200
%134 = getelementptr inbounds i8, ptr %3, i64 212
%135 = load i32, ptr %134, align 4, !tbaa !66
%136 = getelementptr inbounds i8, ptr %3, i64 208
%137 = load i32, ptr %136, align 4, !tbaa !67
%138 = getelementptr inbounds i8, ptr %3, i64 204
%139 = load i32, ptr %138, align 4, !tbaa !68
%140 = load i32, ptr %133, align 4, !tbaa !69
%141 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.43, i32 noundef %135, i32 noundef %137, i32 noundef %139, i32 noundef %140) #2
%142 = getelementptr inbounds i8, ptr %3, i64 184
%143 = getelementptr inbounds i8, ptr %3, i64 196
%144 = load i32, ptr %143, align 4, !tbaa !70
%145 = getelementptr inbounds i8, ptr %3, i64 192
%146 = load i32, ptr %145, align 4, !tbaa !71
%147 = getelementptr inbounds i8, ptr %3, i64 188
%148 = load i32, ptr %147, align 4, !tbaa !72
%149 = load i32, ptr %142, align 4, !tbaa !73
%150 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.44, i32 noundef %144, i32 noundef %146, i32 noundef %148, i32 noundef %149) #2
%151 = getelementptr inbounds i8, ptr %3, i64 168
%152 = getelementptr inbounds i8, ptr %3, i64 180
%153 = load i32, ptr %152, align 4, !tbaa !74
%154 = getelementptr inbounds i8, ptr %3, i64 176
%155 = load i32, ptr %154, align 4, !tbaa !75
%156 = getelementptr inbounds i8, ptr %3, i64 172
%157 = load i32, ptr %156, align 4, !tbaa !76
%158 = load i32, ptr %151, align 4, !tbaa !77
%159 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.45, i32 noundef %153, i32 noundef %155, i32 noundef %157, i32 noundef %158) #2
%160 = getelementptr inbounds i8, ptr %3, i64 152
%161 = getelementptr inbounds i8, ptr %3, i64 164
%162 = load i32, ptr %161, align 4, !tbaa !78
%163 = getelementptr inbounds i8, ptr %3, i64 160
%164 = load i32, ptr %163, align 4, !tbaa !79
%165 = getelementptr inbounds i8, ptr %3, i64 156
%166 = load i32, ptr %165, align 4, !tbaa !80
%167 = load i32, ptr %160, align 4, !tbaa !81
%168 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.46, i32 noundef %162, i32 noundef %164, i32 noundef %166, i32 noundef %167) #2
%169 = getelementptr inbounds i8, ptr %3, i64 136
%170 = getelementptr inbounds i8, ptr %3, i64 148
%171 = load i32, ptr %170, align 4, !tbaa !82
%172 = getelementptr inbounds i8, ptr %3, i64 144
%173 = load i32, ptr %172, align 4, !tbaa !83
%174 = getelementptr inbounds i8, ptr %3, i64 140
%175 = load i32, ptr %174, align 4, !tbaa !84
%176 = load i32, ptr %169, align 4, !tbaa !85
%177 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.47, i32 noundef %171, i32 noundef %173, i32 noundef %175, i32 noundef %176) #2
%178 = getelementptr inbounds i8, ptr %3, i64 120
%179 = getelementptr inbounds i8, ptr %3, i64 132
%180 = load i32, ptr %179, align 4, !tbaa !86
%181 = getelementptr inbounds i8, ptr %3, i64 128
%182 = load i32, ptr %181, align 4, !tbaa !87
%183 = getelementptr inbounds i8, ptr %3, i64 124
%184 = load i32, ptr %183, align 4, !tbaa !88
%185 = load i32, ptr %178, align 4, !tbaa !89
%186 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.48, i32 noundef %180, i32 noundef %182, i32 noundef %184, i32 noundef %185) #2
%187 = getelementptr inbounds i8, ptr %3, i64 104
%188 = getelementptr inbounds i8, ptr %3, i64 116
%189 = load i32, ptr %188, align 4, !tbaa !90
%190 = getelementptr inbounds i8, ptr %3, i64 112
%191 = load i32, ptr %190, align 4, !tbaa !91
%192 = getelementptr inbounds i8, ptr %3, i64 108
%193 = load i32, ptr %192, align 4, !tbaa !92
%194 = load i32, ptr %187, align 4, !tbaa !93
%195 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.39, ptr noundef nonnull @.str.49, i32 noundef %189, i32 noundef %191, i32 noundef %193, i32 noundef %194) #2
%196 = getelementptr inbounds i8, ptr %3, i64 100
%197 = load i32, ptr %196, align 4, !tbaa !94
%198 = getelementptr inbounds i8, ptr %3, i64 96
%199 = load i32, ptr %198, align 4, !tbaa !95
%200 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.50, i32 noundef %197, i32 noundef %199) #2
%201 = getelementptr inbounds i8, ptr %3, i64 92
%202 = load i32, ptr %201, align 4, !tbaa !96
%203 = getelementptr inbounds i8, ptr %3, i64 88
%204 = load i32, ptr %203, align 4, !tbaa !97
%205 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.52, i32 noundef %202, ptr noundef nonnull @.str.53, i32 noundef %204) #2
%206 = getelementptr inbounds i8, ptr %3, i64 84
%207 = load i32, ptr %206, align 4, !tbaa !98
%208 = getelementptr inbounds i8, ptr %3, i64 80
%209 = load i32, ptr %208, align 4, !tbaa !99
%210 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.54, i32 noundef %207, ptr noundef nonnull @.str.55, i32 noundef %209) #2
%211 = getelementptr inbounds i8, ptr %3, i64 76
%212 = load i32, ptr %211, align 4, !tbaa !100
%213 = getelementptr inbounds i8, ptr %3, i64 72
%214 = load i32, ptr %213, align 4, !tbaa !101
%215 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.56, i32 noundef %212, ptr noundef nonnull @.str.57, i32 noundef %214) #2
%216 = getelementptr inbounds i8, ptr %3, i64 68
%217 = load i32, ptr %216, align 4, !tbaa !102
%218 = getelementptr inbounds i8, ptr %3, i64 64
%219 = load i32, ptr %218, align 4, !tbaa !103
%220 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.58, i32 noundef %217, ptr noundef nonnull @.str.59, i32 noundef %219) #2
%221 = getelementptr inbounds i8, ptr %3, i64 60
%222 = load i32, ptr %221, align 4, !tbaa !104
%223 = getelementptr inbounds i8, ptr %3, i64 56
%224 = load i32, ptr %223, align 4, !tbaa !105
%225 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.60, i32 noundef %222, ptr noundef nonnull @.str.61, i32 noundef %224) #2
%226 = getelementptr inbounds i8, ptr %3, i64 52
%227 = load i32, ptr %226, align 4, !tbaa !106
%228 = getelementptr inbounds i8, ptr %3, i64 48
%229 = load i32, ptr %228, align 4, !tbaa !107
%230 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.62, i32 noundef %227, ptr noundef nonnull @.str.63, i32 noundef %229) #2
%231 = getelementptr inbounds i8, ptr %3, i64 44
%232 = load i32, ptr %231, align 4, !tbaa !108
%233 = getelementptr inbounds i8, ptr %3, i64 40
%234 = load i32, ptr %233, align 4, !tbaa !109
%235 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.64, i32 noundef %232, ptr noundef nonnull @.str.65, i32 noundef %234) #2
%236 = getelementptr inbounds i8, ptr %3, i64 36
%237 = load i32, ptr %236, align 4, !tbaa !110
%238 = getelementptr inbounds i8, ptr %3, i64 32
%239 = load i32, ptr %238, align 4, !tbaa !111
%240 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.66, i32 noundef %237, ptr noundef nonnull @.str.67, i32 noundef %239) #2
%241 = getelementptr inbounds i8, ptr %3, i64 28
%242 = load i32, ptr %241, align 4, !tbaa !112
%243 = getelementptr inbounds i8, ptr %3, i64 24
%244 = load i32, ptr %243, align 4, !tbaa !113
%245 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.68, i32 noundef %242, ptr noundef nonnull @.str.69, i32 noundef %244) #2
%246 = getelementptr inbounds i8, ptr %3, i64 20
%247 = load i32, ptr %246, align 4, !tbaa !114
%248 = getelementptr inbounds i8, ptr %3, i64 16
%249 = load i32, ptr %248, align 4, !tbaa !115
%250 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.70, i32 noundef %247, ptr noundef nonnull @.str.71, i32 noundef %249) #2
%251 = getelementptr inbounds i8, ptr %3, i64 12
%252 = load i32, ptr %251, align 4, !tbaa !116
%253 = getelementptr inbounds i8, ptr %3, i64 8
%254 = load i32, ptr %253, align 4, !tbaa !117
%255 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.72, i32 noundef %252, ptr noundef nonnull @.str.73, i32 noundef %254) #2
%256 = getelementptr inbounds i8, ptr %3, i64 4
%257 = load i32, ptr %256, align 4, !tbaa !118
%258 = load i32, ptr %3, align 4, !tbaa !119
%259 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.74, i32 noundef %257, ptr noundef nonnull @.str.75, i32 noundef %258) #2
br label %260
260: ; preds = %8, %6
ret void
}
declare ptr @to_svm(ptr noundef) local_unnamed_addr #1
declare i32 @pr_warn_ratelimited(ptr noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vcpu_svm", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"vmcb_control_area", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84, !12, i64 88, !12, i64 92, !12, i64 96, !12, i64 100, !12, i64 104, !12, i64 108, !12, i64 112}
!15 = !{!14, !12, i64 4}
!16 = !{!14, !12, i64 112}
!17 = !{!14, !12, i64 108}
!18 = !{!14, !12, i64 104}
!19 = !{!14, !12, i64 100}
!20 = !{!14, !12, i64 96}
!21 = !{!14, !12, i64 92}
!22 = !{!14, !12, i64 88}
!23 = !{!14, !12, i64 84}
!24 = !{!14, !12, i64 80}
!25 = !{!14, !12, i64 76}
!26 = !{!14, !12, i64 72}
!27 = !{!14, !12, i64 68}
!28 = !{!14, !12, i64 64}
!29 = !{!14, !12, i64 60}
!30 = !{!14, !12, i64 56}
!31 = !{!14, !12, i64 52}
!32 = !{!14, !12, i64 48}
!33 = !{!14, !12, i64 44}
!34 = !{!14, !12, i64 40}
!35 = !{!14, !12, i64 36}
!36 = !{!14, !12, i64 32}
!37 = !{!14, !12, i64 28}
!38 = !{!14, !12, i64 24}
!39 = !{!14, !12, i64 20}
!40 = !{!14, !12, i64 16}
!41 = !{!14, !12, i64 12}
!42 = !{!14, !12, i64 8}
!43 = !{!44, !12, i64 260}
!44 = !{!"vmcb_save_area", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84, !12, i64 88, !12, i64 92, !12, i64 96, !12, i64 100, !45, i64 104, !46, i64 120, !47, i64 136, !48, i64 152, !49, i64 168, !50, i64 184, !51, i64 200, !52, i64 216, !53, i64 232, !54, i64 248}
!45 = !{!"TYPE_21__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!46 = !{!"TYPE_20__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!47 = !{!"TYPE_19__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!48 = !{!"TYPE_18__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!49 = !{!"TYPE_17__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!50 = !{!"TYPE_16__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!51 = !{!"TYPE_15__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!52 = !{!"TYPE_14__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!53 = !{!"TYPE_13__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!54 = !{!"TYPE_12__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!55 = !{!44, !12, i64 256}
!56 = !{!44, !12, i64 252}
!57 = !{!44, !12, i64 248}
!58 = !{!44, !12, i64 244}
!59 = !{!44, !12, i64 240}
!60 = !{!44, !12, i64 236}
!61 = !{!44, !12, i64 232}
!62 = !{!44, !12, i64 228}
!63 = !{!44, !12, i64 224}
!64 = !{!44, !12, i64 220}
!65 = !{!44, !12, i64 216}
!66 = !{!44, !12, i64 212}
!67 = !{!44, !12, i64 208}
!68 = !{!44, !12, i64 204}
!69 = !{!44, !12, i64 200}
!70 = !{!44, !12, i64 196}
!71 = !{!44, !12, i64 192}
!72 = !{!44, !12, i64 188}
!73 = !{!44, !12, i64 184}
!74 = !{!44, !12, i64 180}
!75 = !{!44, !12, i64 176}
!76 = !{!44, !12, i64 172}
!77 = !{!44, !12, i64 168}
!78 = !{!44, !12, i64 164}
!79 = !{!44, !12, i64 160}
!80 = !{!44, !12, i64 156}
!81 = !{!44, !12, i64 152}
!82 = !{!44, !12, i64 148}
!83 = !{!44, !12, i64 144}
!84 = !{!44, !12, i64 140}
!85 = !{!44, !12, i64 136}
!86 = !{!44, !12, i64 132}
!87 = !{!44, !12, i64 128}
!88 = !{!44, !12, i64 124}
!89 = !{!44, !12, i64 120}
!90 = !{!44, !12, i64 116}
!91 = !{!44, !12, i64 112}
!92 = !{!44, !12, i64 108}
!93 = !{!44, !12, i64 104}
!94 = !{!44, !12, i64 100}
!95 = !{!44, !12, i64 96}
!96 = !{!44, !12, i64 92}
!97 = !{!44, !12, i64 88}
!98 = !{!44, !12, i64 84}
!99 = !{!44, !12, i64 80}
!100 = !{!44, !12, i64 76}
!101 = !{!44, !12, i64 72}
!102 = !{!44, !12, i64 68}
!103 = !{!44, !12, i64 64}
!104 = !{!44, !12, i64 60}
!105 = !{!44, !12, i64 56}
!106 = !{!44, !12, i64 52}
!107 = !{!44, !12, i64 48}
!108 = !{!44, !12, i64 44}
!109 = !{!44, !12, i64 40}
!110 = !{!44, !12, i64 36}
!111 = !{!44, !12, i64 32}
!112 = !{!44, !12, i64 28}
!113 = !{!44, !12, i64 24}
!114 = !{!44, !12, i64 20}
!115 = !{!44, !12, i64 16}
!116 = !{!44, !12, i64 12}
!117 = !{!44, !12, i64 8}
!118 = !{!44, !12, i64 4}
!119 = !{!44, !12, i64 0}
|
linux_arch_x86_kvm_extr_svm.c_dump_vmcb
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/qlge/extr_qlge_mpi.c_ql_hard_reset_mpi_risc.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/qlge/extr_qlge_mpi.c_ql_hard_reset_mpi_risc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@UDELAY_COUNT = dso_local local_unnamed_addr global i32 0, align 4
@CSR = dso_local local_unnamed_addr global i32 0, align 4
@CSR_CMD_SET_RST = dso_local local_unnamed_addr global i32 0, align 4
@CSR_RR = dso_local local_unnamed_addr global i32 0, align 4
@CSR_CMD_CLR_RST = dso_local local_unnamed_addr global i32 0, align 4
@UDELAY_DELAY = dso_local local_unnamed_addr global i32 0, align 4
@ETIMEDOUT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @ql_hard_reset_mpi_risc(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @UDELAY_COUNT, align 4, !tbaa !5
%3 = load i32, ptr @CSR, align 4, !tbaa !5
%4 = load i32, ptr @CSR_CMD_SET_RST, align 4, !tbaa !5
%5 = tail call i32 @ql_write32(ptr noundef %0, i32 noundef %3, i32 noundef %4) #2
%6 = freeze i32 %2
br label %7
7: ; preds = %14, %1
%8 = phi i32 [ %6, %1 ], [ %17, %14 ]
%9 = load i32, ptr @CSR, align 4, !tbaa !5
%10 = tail call i32 @ql_read32(ptr noundef %0, i32 noundef %9) #2
%11 = load i32, ptr @CSR_RR, align 4, !tbaa !5
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %22
14: ; preds = %7
%15 = load i32, ptr @UDELAY_DELAY, align 4, !tbaa !5
%16 = tail call i32 @mdelay(i32 noundef %15) #2
%17 = add i32 %8, -1
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %7, !llvm.loop !9
19: ; preds = %14
%20 = load i32, ptr @ETIMEDOUT, align 4
%21 = sub nsw i32 0, %20
br label %30
22: ; preds = %7
%23 = load i32, ptr @CSR, align 4, !tbaa !5
%24 = load i32, ptr @CSR_CMD_CLR_RST, align 4, !tbaa !5
%25 = tail call i32 @ql_write32(ptr noundef %0, i32 noundef %23, i32 noundef %24) #2
%26 = icmp eq i32 %8, 0
%27 = load i32, ptr @ETIMEDOUT, align 4
%28 = sub nsw i32 0, %27
%29 = select i1 %26, i32 %28, i32 0
br label %30
30: ; preds = %22, %19
%31 = phi i32 [ %21, %19 ], [ %29, %22 ]
ret i32 %31
}
declare i32 @ql_write32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ql_read32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mdelay(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/qlge/extr_qlge_mpi.c_ql_hard_reset_mpi_risc.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/qlge/extr_qlge_mpi.c_ql_hard_reset_mpi_risc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UDELAY_COUNT = common local_unnamed_addr global i32 0, align 4
@CSR = common local_unnamed_addr global i32 0, align 4
@CSR_CMD_SET_RST = common local_unnamed_addr global i32 0, align 4
@CSR_RR = common local_unnamed_addr global i32 0, align 4
@CSR_CMD_CLR_RST = common local_unnamed_addr global i32 0, align 4
@UDELAY_DELAY = common local_unnamed_addr global i32 0, align 4
@ETIMEDOUT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @ql_hard_reset_mpi_risc(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @UDELAY_COUNT, align 4, !tbaa !6
%3 = load i32, ptr @CSR, align 4, !tbaa !6
%4 = load i32, ptr @CSR_CMD_SET_RST, align 4, !tbaa !6
%5 = tail call i32 @ql_write32(ptr noundef %0, i32 noundef %3, i32 noundef %4) #2
%6 = freeze i32 %2
br label %7
7: ; preds = %14, %1
%8 = phi i32 [ %6, %1 ], [ %17, %14 ]
%9 = load i32, ptr @CSR, align 4, !tbaa !6
%10 = tail call i32 @ql_read32(ptr noundef %0, i32 noundef %9) #2
%11 = load i32, ptr @CSR_RR, align 4, !tbaa !6
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %7
%15 = load i32, ptr @UDELAY_DELAY, align 4, !tbaa !6
%16 = tail call i32 @mdelay(i32 noundef %15) #2
%17 = add i32 %8, -1
%18 = icmp eq i32 %17, 0
br i1 %18, label %24, label %7, !llvm.loop !10
19: ; preds = %7
%20 = load i32, ptr @CSR, align 4, !tbaa !6
%21 = load i32, ptr @CSR_CMD_CLR_RST, align 4, !tbaa !6
%22 = tail call i32 @ql_write32(ptr noundef %0, i32 noundef %20, i32 noundef %21) #2
%23 = icmp eq i32 %8, 0
br i1 %23, label %24, label %27
24: ; preds = %14, %19
%25 = load i32, ptr @ETIMEDOUT, align 4
%26 = sub nsw i32 0, %25
br label %27
27: ; preds = %19, %24
%28 = phi i32 [ %26, %24 ], [ 0, %19 ]
ret i32 %28
}
declare i32 @ql_write32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ql_read32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mdelay(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
|
fastsocket_kernel_drivers_net_qlge_extr_qlge_mpi.c_ql_hard_reset_mpi_risc
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_display.c_i9xx_disable_plane.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_display.c_i9xx_disable_plane.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.intel_plane = type { i32, %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @i9xx_disable_plane], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @i9xx_disable_plane(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.intel_plane, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call ptr @to_i915(i32 noundef %4) #2
%6 = load i32, ptr %0, align 4, !tbaa !11
%7 = tail call i32 @i9xx_plane_ctl_crtc(ptr noundef %1) #2
%8 = tail call i32 @spin_lock_irqsave(ptr noundef %5, i64 noundef undef) #2
%9 = tail call i32 @DSPCNTR(i32 noundef %6) #2
%10 = tail call i32 @I915_WRITE_FW(i32 noundef %9, i32 noundef %7) #2
%11 = tail call i32 @INTEL_GEN(ptr noundef %5) #2
%12 = icmp sgt i32 %11, 3
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = tail call i32 @DSPSURF(i32 noundef %6) #2
br label %17
15: ; preds = %2
%16 = tail call i32 @DSPADDR(i32 noundef %6) #2
br label %17
17: ; preds = %15, %13
%18 = phi i32 [ %16, %15 ], [ %14, %13 ]
%19 = tail call i32 @I915_WRITE_FW(i32 noundef %18, i32 noundef 0) #2
%20 = tail call i32 @spin_unlock_irqrestore(ptr noundef %5, i64 noundef undef) #2
ret void
}
declare ptr @to_i915(i32 noundef) local_unnamed_addr #1
declare i32 @i9xx_plane_ctl_crtc(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @I915_WRITE_FW(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DSPCNTR(i32 noundef) local_unnamed_addr #1
declare i32 @INTEL_GEN(ptr noundef) local_unnamed_addr #1
declare i32 @DSPSURF(i32 noundef) local_unnamed_addr #1
declare i32 @DSPADDR(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"intel_plane", !7, i64 0, !10, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_3__", !7, i64 0}
!11 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_display.c_i9xx_disable_plane.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_display.c_i9xx_disable_plane.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @i9xx_disable_plane], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @i9xx_disable_plane(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call ptr @to_i915(i32 noundef %4) #2
%6 = load i32, ptr %0, align 4, !tbaa !12
%7 = tail call i32 @i9xx_plane_ctl_crtc(ptr noundef %1) #2
%8 = tail call i32 @spin_lock_irqsave(ptr noundef %5, i64 noundef undef) #2
%9 = tail call i32 @DSPCNTR(i32 noundef %6) #2
%10 = tail call i32 @I915_WRITE_FW(i32 noundef %9, i32 noundef %7) #2
%11 = tail call i32 @INTEL_GEN(ptr noundef %5) #2
%12 = icmp sgt i32 %11, 3
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = tail call i32 @DSPSURF(i32 noundef %6) #2
br label %17
15: ; preds = %2
%16 = tail call i32 @DSPADDR(i32 noundef %6) #2
br label %17
17: ; preds = %15, %13
%18 = phi i32 [ %16, %15 ], [ %14, %13 ]
%19 = tail call i32 @I915_WRITE_FW(i32 noundef %18, i32 noundef 0) #2
%20 = tail call i32 @spin_unlock_irqrestore(ptr noundef %5, i64 noundef undef) #2
ret void
}
declare ptr @to_i915(i32 noundef) local_unnamed_addr #1
declare i32 @i9xx_plane_ctl_crtc(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @I915_WRITE_FW(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DSPCNTR(i32 noundef) local_unnamed_addr #1
declare i32 @INTEL_GEN(ptr noundef) local_unnamed_addr #1
declare i32 @DSPSURF(i32 noundef) local_unnamed_addr #1
declare i32 @DSPADDR(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"intel_plane", !8, i64 0, !11, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_3__", !8, i64 0}
!12 = !{!7, !8, i64 0}
|
linux_drivers_gpu_drm_i915_display_extr_intel_display.c_i9xx_disable_plane
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_lin-lwp.c_find_lwp_pid.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_lin-lwp.c_find_lwp_pid.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.lwp_info = type { i32, ptr }
@lwp_list = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @find_lwp_pid], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef ptr @find_lwp_pid(i32 noundef %0) #0 {
%2 = tail call i64 @is_lwp(i32 noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @GET_LWP(i32 noundef %0) #2
br label %8
6: ; preds = %1
%7 = tail call i32 @GET_PID(i32 noundef %0) #2
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %5, %4 ], [ %7, %6 ]
%10 = load ptr, ptr @lwp_list, align 8, !tbaa !5
%11 = icmp eq ptr %10, null
br i1 %11, label %21, label %12
12: ; preds = %8, %17
%13 = phi ptr [ %19, %17 ], [ %10, %8 ]
%14 = load i32, ptr %13, align 8, !tbaa !9
%15 = tail call i32 @GET_LWP(i32 noundef %14) #2
%16 = icmp eq i32 %9, %15
br i1 %16, label %21, label %17
17: ; preds = %12
%18 = getelementptr inbounds %struct.lwp_info, ptr %13, i64 0, i32 1
%19 = load ptr, ptr %18, align 8, !tbaa !5
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %12, !llvm.loop !12
21: ; preds = %12, %17, %8
%22 = phi ptr [ null, %8 ], [ null, %17 ], [ %13, %12 ]
ret ptr %22
}
declare i64 @is_lwp(i32 noundef) local_unnamed_addr #1
declare i32 @GET_LWP(i32 noundef) local_unnamed_addr #1
declare i32 @GET_PID(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"lwp_info", !11, i64 0, !6, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_lin-lwp.c_find_lwp_pid.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_lin-lwp.c_find_lwp_pid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@lwp_list = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @find_lwp_pid], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef ptr @find_lwp_pid(i32 noundef %0) #0 {
%2 = tail call i64 @is_lwp(i32 noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @GET_LWP(i32 noundef %0) #2
br label %8
6: ; preds = %1
%7 = tail call i32 @GET_PID(i32 noundef %0) #2
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %5, %4 ], [ %7, %6 ]
%10 = load ptr, ptr @lwp_list, align 8, !tbaa !6
%11 = icmp eq ptr %10, null
br i1 %11, label %21, label %12
12: ; preds = %8, %17
%13 = phi ptr [ %19, %17 ], [ %10, %8 ]
%14 = load i32, ptr %13, align 8, !tbaa !10
%15 = tail call i32 @GET_LWP(i32 noundef %14) #2
%16 = icmp eq i32 %9, %15
br i1 %16, label %21, label %17
17: ; preds = %12
%18 = getelementptr inbounds i8, ptr %13, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !6
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %12, !llvm.loop !13
21: ; preds = %12, %17, %8
%22 = phi ptr [ null, %8 ], [ null, %17 ], [ %13, %12 ]
ret ptr %22
}
declare i64 @is_lwp(i32 noundef) local_unnamed_addr #1
declare i32 @GET_LWP(i32 noundef) local_unnamed_addr #1
declare i32 @GET_PID(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"lwp_info", !12, i64 0, !7, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
|
freebsd_contrib_gdb_gdb_extr_lin-lwp.c_find_lwp_pid
|
; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-lantiq-ssc.c_lantiq_ssc_maskl.c'
source_filename = "AnghaBench/linux/drivers/spi/extr_spi-lantiq-ssc.c_lantiq_ssc_maskl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @lantiq_ssc_maskl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @lantiq_ssc_maskl(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2, i64 noundef %3) #0 {
%5 = load i64, ptr %0, align 8, !tbaa !5
%6 = add nsw i64 %5, %3
%7 = tail call i64 @__raw_readl(i64 noundef %6) #2
%8 = xor i64 %1, -1
%9 = and i64 %7, %8
%10 = or i64 %9, %2
%11 = load i64, ptr %0, align 8, !tbaa !5
%12 = add nsw i64 %11, %3
%13 = tail call i32 @__raw_writel(i64 noundef %10, i64 noundef %12) #2
ret void
}
declare i64 @__raw_readl(i64 noundef) local_unnamed_addr #1
declare i32 @__raw_writel(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"lantiq_ssc_spi", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-lantiq-ssc.c_lantiq_ssc_maskl.c'
source_filename = "AnghaBench/linux/drivers/spi/extr_spi-lantiq-ssc.c_lantiq_ssc_maskl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @lantiq_ssc_maskl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @lantiq_ssc_maskl(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2, i64 noundef %3) #0 {
%5 = load i64, ptr %0, align 8, !tbaa !6
%6 = add nsw i64 %5, %3
%7 = tail call i64 @__raw_readl(i64 noundef %6) #2
%8 = xor i64 %1, -1
%9 = and i64 %7, %8
%10 = or i64 %9, %2
%11 = load i64, ptr %0, align 8, !tbaa !6
%12 = add nsw i64 %11, %3
%13 = tail call i32 @__raw_writel(i64 noundef %10, i64 noundef %12) #2
ret void
}
declare i64 @__raw_readl(i64 noundef) local_unnamed_addr #1
declare i32 @__raw_writel(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"lantiq_ssc_spi", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_spi_extr_spi-lantiq-ssc.c_lantiq_ssc_maskl
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx.xml.h_REG_A6XX_VPC_VARYING_INTERP_MODE.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx.xml.h_REG_A6XX_VPC_VARYING_INTERP_MODE.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @REG_A6XX_VPC_VARYING_INTERP_MODE], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal i32 @REG_A6XX_VPC_VARYING_INTERP_MODE(i32 noundef %0) #0 {
%2 = add nsw i32 %0, 37376
ret i32 %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx.xml.h_REG_A6XX_VPC_VARYING_INTERP_MODE.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx.xml.h_REG_A6XX_VPC_VARYING_INTERP_MODE.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @REG_A6XX_VPC_VARYING_INTERP_MODE], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 -2147446272, -2147483648) i32 @REG_A6XX_VPC_VARYING_INTERP_MODE(i32 noundef %0) #0 {
%2 = add nsw i32 %0, 37376
ret i32 %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_gpu_drm_msm_adreno_extr_a6xx.xml.h_REG_A6XX_VPC_VARYING_INTERP_MODE
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/pohmelfs/extr_config.c_pohmelfs_config_eql.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/pohmelfs/extr_config.c_pohmelfs_config_eql.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pohmelfs_ctl = type { i64, i64, i64, i64, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @pohmelfs_config_eql], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree nounwind willreturn memory(argmem: read) uwtable
define internal noundef i32 @pohmelfs_config_eql(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = load i64, ptr %1, align 8, !tbaa !5
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %29
6: ; preds = %2
%7 = getelementptr inbounds %struct.pohmelfs_ctl, ptr %0, i64 0, i32 1
%8 = load i64, ptr %7, align 8, !tbaa !11
%9 = getelementptr inbounds %struct.pohmelfs_ctl, ptr %1, i64 0, i32 1
%10 = load i64, ptr %9, align 8, !tbaa !11
%11 = icmp eq i64 %8, %10
br i1 %11, label %12, label %29
12: ; preds = %6
%13 = getelementptr inbounds %struct.pohmelfs_ctl, ptr %0, i64 0, i32 2
%14 = load i64, ptr %13, align 8, !tbaa !12
%15 = getelementptr inbounds %struct.pohmelfs_ctl, ptr %1, i64 0, i32 2
%16 = load i64, ptr %15, align 8, !tbaa !12
%17 = icmp eq i64 %14, %16
br i1 %17, label %18, label %29
18: ; preds = %12
%19 = getelementptr inbounds %struct.pohmelfs_ctl, ptr %0, i64 0, i32 3
%20 = load i64, ptr %19, align 8, !tbaa !13
%21 = getelementptr inbounds %struct.pohmelfs_ctl, ptr %1, i64 0, i32 3
%22 = load i64, ptr %21, align 8, !tbaa !13
%23 = icmp eq i64 %20, %22
br i1 %23, label %24, label %29
24: ; preds = %18
%25 = getelementptr inbounds %struct.pohmelfs_ctl, ptr %0, i64 0, i32 4
%26 = getelementptr inbounds %struct.pohmelfs_ctl, ptr %1, i64 0, i32 4
%27 = tail call i32 @bcmp(ptr nonnull %25, ptr nonnull %26, i64 %20)
%28 = icmp eq i32 %27, 0
br i1 %28, label %30, label %29
29: ; preds = %24, %18, %12, %6, %2
br label %30
30: ; preds = %24, %29
%31 = phi i32 [ 0, %29 ], [ 1, %24 ]
ret i32 %31
}
; Function Attrs: nofree nounwind willreturn memory(argmem: read)
declare i32 @bcmp(ptr nocapture, ptr nocapture, i64) local_unnamed_addr #1
attributes #0 = { inlinehint mustprogress nofree nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind willreturn memory(argmem: read) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pohmelfs_ctl", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !10, i64 32}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !7, i64 24}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/pohmelfs/extr_config.c_pohmelfs_config_eql.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/pohmelfs/extr_config.c_pohmelfs_config_eql.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pohmelfs_config_eql], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 0, 2) i32 @pohmelfs_config_eql(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = load i64, ptr %1, align 8, !tbaa !6
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %29
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i64, ptr %7, align 8, !tbaa !12
%9 = getelementptr inbounds i8, ptr %1, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !12
%11 = icmp eq i64 %8, %10
br i1 %11, label %12, label %29
12: ; preds = %6
%13 = getelementptr inbounds i8, ptr %0, i64 16
%14 = load i64, ptr %13, align 8, !tbaa !13
%15 = getelementptr inbounds i8, ptr %1, i64 16
%16 = load i64, ptr %15, align 8, !tbaa !13
%17 = icmp eq i64 %14, %16
br i1 %17, label %18, label %29
18: ; preds = %12
%19 = getelementptr inbounds i8, ptr %0, i64 24
%20 = load i64, ptr %19, align 8, !tbaa !14
%21 = getelementptr inbounds i8, ptr %1, i64 24
%22 = load i64, ptr %21, align 8, !tbaa !14
%23 = icmp eq i64 %20, %22
br i1 %23, label %24, label %29
24: ; preds = %18
%25 = getelementptr inbounds i8, ptr %0, i64 32
%26 = getelementptr inbounds i8, ptr %1, i64 32
%27 = tail call i32 @memcmp(ptr noundef nonnull %25, ptr noundef nonnull %26, i64 noundef %20)
%28 = icmp eq i32 %27, 0
br i1 %28, label %30, label %29
29: ; preds = %24, %18, %12, %6, %2
br label %30
30: ; preds = %24, %29
%31 = phi i32 [ 0, %29 ], [ 1, %24 ]
ret i32 %31
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @memcmp(ptr nocapture noundef, ptr nocapture noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint mustprogress nofree nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pohmelfs_ctl", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !11, i64 32}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 8}
!13 = !{!7, !8, i64 16}
!14 = !{!7, !8, i64 24}
|
fastsocket_kernel_drivers_staging_pohmelfs_extr_config.c_pohmelfs_config_eql
|
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ice1712/extr_ice1712.c_snd_ice1712_playback_pro_open.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ice1712/extr_ice1712.c_snd_ice1712_playback_pro_open.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.snd_ice1712 = type { %struct.TYPE_4__, ptr }
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { ptr }
@snd_ice1712_playback_pro = dso_local local_unnamed_addr global i32 0, align 4
@SNDRV_PCM_HW_PARAM_RATE = dso_local local_unnamed_addr global i32 0, align 4
@hw_constraints_rates = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_ice1712_playback_pro_open], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @snd_ice1712_playback_pro_open(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = tail call ptr @snd_pcm_substream_chip(ptr noundef nonnull %0) #2
%4 = getelementptr inbounds %struct.snd_ice1712, ptr %3, i64 0, i32 1
store ptr %0, ptr %4, align 8, !tbaa !10
%5 = load i32, ptr @snd_ice1712_playback_pro, align 4, !tbaa !14
store i32 %5, ptr %2, align 4, !tbaa !16
%6 = tail call i32 @snd_pcm_set_sync(ptr noundef nonnull %0) #2
%7 = tail call i32 @snd_pcm_hw_constraint_msbits(ptr noundef nonnull %2, i32 noundef 0, i32 noundef 32, i32 noundef 24) #2
%8 = load i32, ptr @SNDRV_PCM_HW_PARAM_RATE, align 4, !tbaa !14
%9 = tail call i32 @snd_pcm_hw_constraint_list(ptr noundef nonnull %2, i32 noundef 0, i32 noundef %8, ptr noundef nonnull @hw_constraints_rates) #2
%10 = load ptr, ptr %3, align 8, !tbaa !18
%11 = icmp eq ptr %10, null
br i1 %11, label %14, label %12
12: ; preds = %1
%13 = tail call i32 %10(ptr noundef nonnull %3, ptr noundef nonnull %0) #2
br label %14
14: ; preds = %12, %1
ret i32 0
}
declare ptr @snd_pcm_substream_chip(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_set_sync(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_hw_constraint_msbits(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_pcm_hw_constraint_list(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_pcm_substream", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"snd_ice1712", !12, i64 0, !7, i64 8}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!17, !15, i64 0}
!17 = !{!"snd_pcm_runtime", !15, i64 0}
!18 = !{!11, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ice1712/extr_ice1712.c_snd_ice1712_playback_pro_open.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ice1712/extr_ice1712.c_snd_ice1712_playback_pro_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@snd_ice1712_playback_pro = common local_unnamed_addr global i32 0, align 4
@SNDRV_PCM_HW_PARAM_RATE = common local_unnamed_addr global i32 0, align 4
@hw_constraints_rates = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_ice1712_playback_pro_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @snd_ice1712_playback_pro_open(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call ptr @snd_pcm_substream_chip(ptr noundef nonnull %0) #2
%4 = getelementptr inbounds i8, ptr %3, i64 8
store ptr %0, ptr %4, align 8, !tbaa !11
%5 = load i32, ptr @snd_ice1712_playback_pro, align 4, !tbaa !15
store i32 %5, ptr %2, align 4, !tbaa !17
%6 = tail call i32 @snd_pcm_set_sync(ptr noundef nonnull %0) #2
%7 = tail call i32 @snd_pcm_hw_constraint_msbits(ptr noundef nonnull %2, i32 noundef 0, i32 noundef 32, i32 noundef 24) #2
%8 = load i32, ptr @SNDRV_PCM_HW_PARAM_RATE, align 4, !tbaa !15
%9 = tail call i32 @snd_pcm_hw_constraint_list(ptr noundef nonnull %2, i32 noundef 0, i32 noundef %8, ptr noundef nonnull @hw_constraints_rates) #2
%10 = load ptr, ptr %3, align 8, !tbaa !19
%11 = icmp eq ptr %10, null
br i1 %11, label %14, label %12
12: ; preds = %1
%13 = tail call i32 %10(ptr noundef nonnull %3, ptr noundef nonnull %0) #2
br label %14
14: ; preds = %12, %1
ret i32 0
}
declare ptr @snd_pcm_substream_chip(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_set_sync(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_hw_constraint_msbits(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_pcm_hw_constraint_list(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_pcm_substream", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"snd_ice1712", !13, i64 0, !8, i64 8}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"TYPE_3__", !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !9, i64 0}
!17 = !{!18, !16, i64 0}
!18 = !{!"snd_pcm_runtime", !16, i64 0}
!19 = !{!12, !8, i64 0}
|
fastsocket_kernel_sound_pci_ice1712_extr_ice1712.c_snd_ice1712_playback_pro_open
|
; ModuleID = 'AnghaBench/fastsocket/kernel/kernel/trace/extr_trace_printk.c_ftrace_formats_open.c'
source_filename = "AnghaBench/fastsocket/kernel/kernel/trace/extr_trace_printk.c_ftrace_formats_open.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@show_format_seq_ops = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ftrace_formats_open], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ftrace_formats_open(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = tail call i32 @seq_open(ptr noundef %1, ptr noundef nonnull @show_format_seq_ops) #2
ret i32 %3
}
declare i32 @seq_open(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/kernel/trace/extr_trace_printk.c_ftrace_formats_open.c'
source_filename = "AnghaBench/fastsocket/kernel/kernel/trace/extr_trace_printk.c_ftrace_formats_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@show_format_seq_ops = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ftrace_formats_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ftrace_formats_open(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = tail call i32 @seq_open(ptr noundef %1, ptr noundef nonnull @show_format_seq_ops) #2
ret i32 %3
}
declare i32 @seq_open(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_kernel_trace_extr_trace_printk.c_ftrace_formats_open
|
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/qedr/extr_qedr.h_qedr_get_dmac.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/qedr/extr_qedr.h_qedr_get_dmac.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%union.ib_gid = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
%struct.in6_addr = type { i32 }
@.str = private unnamed_addr constant [30 x i8] c"Local port GID not supported\0A\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @qedr_get_dmac], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @qedr_get_dmac(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca %union.ib_gid, align 4
%5 = alloca %struct.in6_addr, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
store i32 0, ptr %4, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = tail call ptr @rdma_ah_read_grh(ptr noundef %1) #3
%7 = call i32 @memcmp(ptr noundef %6, ptr noundef nonnull %4, i32 noundef 4) #3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = call i32 @DP_ERR(ptr noundef %0, ptr noundef nonnull @.str) #3
%11 = call i32 @eth_zero_addr(ptr noundef %2) #3
%12 = load i32, ptr @EINVAL, align 4, !tbaa !5
%13 = sub nsw i32 0, %12
br label %24
14: ; preds = %3
%15 = load i32, ptr %6, align 4, !tbaa !9
%16 = call i32 @memcpy(ptr noundef nonnull %5, i32 noundef %15, i32 noundef 4) #3
%17 = call ptr @rdma_ah_retrieve_dmac(ptr noundef %1) #3
%18 = icmp eq ptr %17, null
br i1 %18, label %19, label %22
19: ; preds = %14
%20 = load i32, ptr @EINVAL, align 4, !tbaa !5
%21 = sub nsw i32 0, %20
br label %24
22: ; preds = %14
%23 = call i32 @ether_addr_copy(ptr noundef %2, ptr noundef nonnull %17) #3
br label %24
24: ; preds = %22, %19, %9
%25 = phi i32 [ 0, %22 ], [ %21, %19 ], [ %13, %9 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %25
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @rdma_ah_read_grh(ptr noundef) local_unnamed_addr #2
declare i32 @memcmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DP_ERR(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @eth_zero_addr(ptr noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @rdma_ah_retrieve_dmac(ptr noundef) local_unnamed_addr #2
declare i32 @ether_addr_copy(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"ib_global_route", !11, i64 0}
!11 = !{!"TYPE_4__", !6, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/qedr/extr_qedr.h_qedr_get_dmac.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/qedr/extr_qedr.h_qedr_get_dmac.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%union.ib_gid = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
%struct.in6_addr = type { i32 }
@.str = private unnamed_addr constant [30 x i8] c"Local port GID not supported\0A\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @qedr_get_dmac], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @qedr_get_dmac(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca %union.ib_gid, align 4
%5 = alloca %struct.in6_addr, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
store i32 0, ptr %4, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = tail call ptr @rdma_ah_read_grh(ptr noundef %1) #3
%7 = call i32 @memcmp(ptr noundef %6, ptr noundef nonnull %4, i32 noundef 4) #3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = call i32 @DP_ERR(ptr noundef %0, ptr noundef nonnull @.str) #3
%11 = call i32 @eth_zero_addr(ptr noundef %2) #3
%12 = load i32, ptr @EINVAL, align 4, !tbaa !6
%13 = sub nsw i32 0, %12
br label %24
14: ; preds = %3
%15 = load i32, ptr %6, align 4, !tbaa !10
%16 = call i32 @memcpy(ptr noundef nonnull %5, i32 noundef %15, i32 noundef 4) #3
%17 = call ptr @rdma_ah_retrieve_dmac(ptr noundef %1) #3
%18 = icmp eq ptr %17, null
br i1 %18, label %19, label %22
19: ; preds = %14
%20 = load i32, ptr @EINVAL, align 4, !tbaa !6
%21 = sub nsw i32 0, %20
br label %24
22: ; preds = %14
%23 = call i32 @ether_addr_copy(ptr noundef %2, ptr noundef nonnull %17) #3
br label %24
24: ; preds = %22, %19, %9
%25 = phi i32 [ 0, %22 ], [ %21, %19 ], [ %13, %9 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %25
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @rdma_ah_read_grh(ptr noundef) local_unnamed_addr #2
declare i32 @memcmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DP_ERR(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @eth_zero_addr(ptr noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @rdma_ah_retrieve_dmac(ptr noundef) local_unnamed_addr #2
declare i32 @ether_addr_copy(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ib_global_route", !12, i64 0}
!12 = !{!"TYPE_4__", !7, i64 0}
|
linux_drivers_infiniband_hw_qedr_extr_qedr.h_qedr_get_dmac
|
; ModuleID = 'AnghaBench/darwin-xnu/bsd/net/extr_pf.c_pf_purge_expired_states.c'
source_filename = "AnghaBench/darwin-xnu/bsd/net/extr_pf.c_pf_purge_expired_states.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@pf_purge_expired_states.cur = internal unnamed_addr global ptr null, align 8
@pf_lock = dso_local local_unnamed_addr global i32 0, align 4
@LCK_MTX_ASSERT_OWNED = dso_local local_unnamed_addr global i32 0, align 4
@state_list = dso_local global i32 0, align 4
@entry_list = dso_local local_unnamed_addr global i32 0, align 4
@PFTM_UNLINKED = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @pf_purge_expired_states(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @pf_lock, align 4, !tbaa !5
%3 = load i32, ptr @LCK_MTX_ASSERT_OWNED, align 4, !tbaa !5
%4 = tail call i32 @LCK_MTX_ASSERT(i32 noundef %2, i32 noundef %3) #2
%5 = icmp eq i32 %0, 0
br i1 %5, label %37, label %6
6: ; preds = %1
%7 = load ptr, ptr @pf_purge_expired_states.cur, align 8, !tbaa !9
br label %8
8: ; preds = %6, %35
%9 = phi ptr [ %19, %35 ], [ %7, %6 ]
%10 = phi i32 [ %11, %35 ], [ %0, %6 ]
%11 = add nsw i32 %10, -1
%12 = icmp eq ptr %9, null
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = tail call ptr @TAILQ_FIRST(ptr noundef nonnull @state_list) #2
store ptr %14, ptr @pf_purge_expired_states.cur, align 8, !tbaa !9
%15 = icmp eq ptr %14, null
br i1 %15, label %37, label %16
16: ; preds = %13, %8
%17 = phi ptr [ %14, %13 ], [ %9, %8 ]
%18 = load i32, ptr @entry_list, align 4, !tbaa !5
%19 = tail call ptr @TAILQ_NEXT(ptr noundef nonnull %17, i32 noundef %18) #2
%20 = load ptr, ptr @pf_purge_expired_states.cur, align 8, !tbaa !9
%21 = load i64, ptr %20, align 8, !tbaa !11
%22 = load i64, ptr @PFTM_UNLINKED, align 8, !tbaa !14
%23 = icmp eq i64 %21, %22
br i1 %23, label %24, label %26
24: ; preds = %16
%25 = tail call i32 @pf_free_state(ptr noundef nonnull %20) #2
br label %35
26: ; preds = %16
%27 = tail call i64 @pf_state_expires(ptr noundef nonnull %20) #2
%28 = tail call i64 (...) @pf_time_second() #2
%29 = icmp sgt i64 %27, %28
br i1 %29, label %35, label %30
30: ; preds = %26
%31 = load ptr, ptr @pf_purge_expired_states.cur, align 8, !tbaa !9
%32 = tail call i32 @pf_unlink_state(ptr noundef %31) #2
%33 = load ptr, ptr @pf_purge_expired_states.cur, align 8, !tbaa !9
%34 = tail call i32 @pf_free_state(ptr noundef %33) #2
br label %35
35: ; preds = %26, %30, %24
store ptr %19, ptr @pf_purge_expired_states.cur, align 8, !tbaa !9
%36 = icmp eq i32 %11, 0
br i1 %36, label %37, label %8, !llvm.loop !15
37: ; preds = %35, %13, %1
ret void
}
declare i32 @LCK_MTX_ASSERT(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @TAILQ_FIRST(ptr noundef) local_unnamed_addr #1
declare ptr @TAILQ_NEXT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pf_free_state(ptr noundef) local_unnamed_addr #1
declare i64 @pf_state_expires(ptr noundef) local_unnamed_addr #1
declare i64 @pf_time_second(...) local_unnamed_addr #1
declare i32 @pf_unlink_state(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"pf_state", !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!13, !13, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/darwin-xnu/bsd/net/extr_pf.c_pf_purge_expired_states.c'
source_filename = "AnghaBench/darwin-xnu/bsd/net/extr_pf.c_pf_purge_expired_states.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@pf_purge_expired_states.cur = internal unnamed_addr global ptr null, align 8
@pf_lock = common local_unnamed_addr global i32 0, align 4
@LCK_MTX_ASSERT_OWNED = common local_unnamed_addr global i32 0, align 4
@state_list = common global i32 0, align 4
@entry_list = common local_unnamed_addr global i32 0, align 4
@PFTM_UNLINKED = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @pf_purge_expired_states(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @pf_lock, align 4, !tbaa !6
%3 = load i32, ptr @LCK_MTX_ASSERT_OWNED, align 4, !tbaa !6
%4 = tail call i32 @LCK_MTX_ASSERT(i32 noundef %2, i32 noundef %3) #2
%5 = icmp eq i32 %0, 0
br i1 %5, label %37, label %6
6: ; preds = %1
%7 = load ptr, ptr @pf_purge_expired_states.cur, align 8, !tbaa !10
br label %8
8: ; preds = %6, %35
%9 = phi ptr [ %19, %35 ], [ %7, %6 ]
%10 = phi i32 [ %11, %35 ], [ %0, %6 ]
%11 = add nsw i32 %10, -1
%12 = icmp eq ptr %9, null
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = tail call ptr @TAILQ_FIRST(ptr noundef nonnull @state_list) #2
store ptr %14, ptr @pf_purge_expired_states.cur, align 8, !tbaa !10
%15 = icmp eq ptr %14, null
br i1 %15, label %37, label %16
16: ; preds = %13, %8
%17 = phi ptr [ %14, %13 ], [ %9, %8 ]
%18 = load i32, ptr @entry_list, align 4, !tbaa !6
%19 = tail call ptr @TAILQ_NEXT(ptr noundef nonnull %17, i32 noundef %18) #2
%20 = load ptr, ptr @pf_purge_expired_states.cur, align 8, !tbaa !10
%21 = load i64, ptr %20, align 8, !tbaa !12
%22 = load i64, ptr @PFTM_UNLINKED, align 8, !tbaa !15
%23 = icmp eq i64 %21, %22
br i1 %23, label %24, label %26
24: ; preds = %16
%25 = tail call i32 @pf_free_state(ptr noundef nonnull %20) #2
br label %35
26: ; preds = %16
%27 = tail call i64 @pf_state_expires(ptr noundef nonnull %20) #2
%28 = tail call i64 @pf_time_second() #2
%29 = icmp sgt i64 %27, %28
br i1 %29, label %35, label %30
30: ; preds = %26
%31 = load ptr, ptr @pf_purge_expired_states.cur, align 8, !tbaa !10
%32 = tail call i32 @pf_unlink_state(ptr noundef %31) #2
%33 = load ptr, ptr @pf_purge_expired_states.cur, align 8, !tbaa !10
%34 = tail call i32 @pf_free_state(ptr noundef %33) #2
br label %35
35: ; preds = %26, %30, %24
store ptr %19, ptr @pf_purge_expired_states.cur, align 8, !tbaa !10
%36 = icmp eq i32 %11, 0
br i1 %36, label %37, label %8, !llvm.loop !16
37: ; preds = %35, %13, %1
ret void
}
declare i32 @LCK_MTX_ASSERT(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @TAILQ_FIRST(ptr noundef) local_unnamed_addr #1
declare ptr @TAILQ_NEXT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pf_free_state(ptr noundef) local_unnamed_addr #1
declare i64 @pf_state_expires(ptr noundef) local_unnamed_addr #1
declare i64 @pf_time_second(...) local_unnamed_addr #1
declare i32 @pf_unlink_state(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"pf_state", !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
|
darwin-xnu_bsd_net_extr_pf.c_pf_purge_expired_states
|
; ModuleID = 'AnghaBench/reactos/dll/win32/riched20/extr_string.c_ME_AppendString.c'
source_filename = "AnghaBench/reactos/dll/win32/riched20/extr_string.c_ME_AppendString.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @ME_AppendString(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr %0, align 4, !tbaa !5
%5 = tail call i32 @ME_InsertString(ptr noundef nonnull %0, i32 noundef %4, ptr noundef %1, i32 noundef %2) #2
ret i32 %5
}
declare i32 @ME_InsertString(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/reactos/dll/win32/riched20/extr_string.c_ME_AppendString.c'
source_filename = "AnghaBench/reactos/dll/win32/riched20/extr_string.c_ME_AppendString.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ME_AppendString(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = tail call i32 @ME_InsertString(ptr noundef nonnull %0, i32 noundef %4, ptr noundef %1, i32 noundef %2) #2
ret i32 %5
}
declare i32 @ME_InsertString(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
reactos_dll_win32_riched20_extr_string.c_ME_AppendString
|
; ModuleID = 'AnghaBench/freebsd/sys/ofed/drivers/infiniband/ulp/sdp/extr_sdp.h_sdp_cleanup_sdp_buf.c'
source_filename = "AnghaBench/freebsd/sys/ofed/drivers/infiniband/ulp/sdp/extr_sdp.h_sdp_cleanup_sdp_buf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sdp_buf = type { ptr, ptr }
%struct.mbuf = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @sdp_cleanup_sdp_buf], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @sdp_cleanup_sdp_buf(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.sdp_buf, ptr %1, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !10
%7 = icmp eq ptr %6, null
br i1 %7, label %20, label %8
8: ; preds = %3, %8
%9 = phi i64 [ %17, %8 ], [ 0, %3 ]
%10 = phi ptr [ %18, %8 ], [ %6, %3 ]
%11 = load ptr, ptr %1, align 8, !tbaa !11
%12 = getelementptr inbounds i32, ptr %11, i64 %9
%13 = load i32, ptr %12, align 4, !tbaa !13
%14 = load i32, ptr %10, align 8, !tbaa !15
%15 = tail call i32 @ib_dma_unmap_single(ptr noundef %4, i32 noundef %13, i32 noundef %14, i32 noundef %2) #2
%16 = getelementptr inbounds %struct.mbuf, ptr %10, i64 0, i32 1
%17 = add nuw i64 %9, 1
%18 = load ptr, ptr %16, align 8, !tbaa !10
%19 = icmp eq ptr %18, null
br i1 %19, label %20, label %8, !llvm.loop !17
20: ; preds = %8, %3
ret void
}
declare i32 @ib_dma_unmap_single(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sdp_sock", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"sdp_buf", !7, i64 0, !7, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"mbuf", !14, i64 0, !7, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/freebsd/sys/ofed/drivers/infiniband/ulp/sdp/extr_sdp.h_sdp_cleanup_sdp_buf.c'
source_filename = "AnghaBench/freebsd/sys/ofed/drivers/infiniband/ulp/sdp/extr_sdp.h_sdp_cleanup_sdp_buf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sdp_cleanup_sdp_buf], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @sdp_cleanup_sdp_buf(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %1, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = icmp eq ptr %6, null
br i1 %7, label %20, label %8
8: ; preds = %3, %8
%9 = phi i64 [ %16, %8 ], [ 0, %3 ]
%10 = phi ptr [ %18, %8 ], [ %6, %3 ]
%11 = load ptr, ptr %1, align 8, !tbaa !12
%12 = getelementptr inbounds i32, ptr %11, i64 %9
%13 = load i32, ptr %12, align 4, !tbaa !14
%14 = load i32, ptr %10, align 8, !tbaa !16
%15 = tail call i32 @ib_dma_unmap_single(ptr noundef %4, i32 noundef %13, i32 noundef %14, i32 noundef %2) #2
%16 = add nuw nsw i64 %9, 1
%17 = getelementptr inbounds i8, ptr %10, i64 8
%18 = load ptr, ptr %17, align 8, !tbaa !11
%19 = icmp eq ptr %18, null
br i1 %19, label %20, label %8, !llvm.loop !18
20: ; preds = %8, %3
ret void
}
declare i32 @ib_dma_unmap_single(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sdp_sock", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"sdp_buf", !8, i64 0, !8, i64 8}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !9, i64 0}
!16 = !{!17, !15, i64 0}
!17 = !{!"mbuf", !15, i64 0, !8, i64 8}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
|
freebsd_sys_ofed_drivers_infiniband_ulp_sdp_extr_sdp.h_sdp_cleanup_sdp_buf
|
; ModuleID = 'AnghaBench/torch7/lib/TH/extr_THAtomic.c_THAtomicGet.c'
source_filename = "AnghaBench/torch7/lib/TH/extr_THAtomic.c_THAtomicGet.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @THAtomicGet(ptr noundef %0) local_unnamed_addr #0 {
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, ptr %0, align 4, !tbaa !5
%4 = tail call i32 @THAtomicCompareAndSwap(ptr noundef nonnull %0, i32 noundef %3, i32 noundef %3) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %2, label %6, !llvm.loop !9
6: ; preds = %2
ret i32 %3
}
declare i32 @THAtomicCompareAndSwap(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/torch7/lib/TH/extr_THAtomic.c_THAtomicGet.c'
source_filename = "AnghaBench/torch7/lib/TH/extr_THAtomic.c_THAtomicGet.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @THAtomicGet(ptr noundef %0) local_unnamed_addr #0 {
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, ptr %0, align 4, !tbaa !6
%4 = tail call i32 @THAtomicCompareAndSwap(ptr noundef nonnull %0, i32 noundef %3, i32 noundef %3) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %2, label %6, !llvm.loop !10
6: ; preds = %2
ret i32 %3
}
declare i32 @THAtomicCompareAndSwap(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
|
torch7_lib_TH_extr_THAtomic.c_THAtomicGet
|
; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_sparc_vt_read_pmc.c'
source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_sparc_vt_read_pmc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@pcr_ops = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @sparc_vt_read_pmc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @sparc_vt_read_pmc(i32 noundef %0) #0 {
%2 = load ptr, ptr @pcr_ops, align 8, !tbaa !5
%3 = load ptr, ptr %2, align 8, !tbaa !9
%4 = tail call i32 %3(i32 noundef %0) #1
ret i32 %4
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_2__", !6, i64 0}
|
; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_sparc_vt_read_pmc.c'
source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_sparc_vt_read_pmc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@pcr_ops = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @sparc_vt_read_pmc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @sparc_vt_read_pmc(i32 noundef %0) #0 {
%2 = load ptr, ptr @pcr_ops, align 8, !tbaa !6
%3 = load ptr, ptr %2, align 8, !tbaa !10
%4 = tail call i32 %3(i32 noundef %0) #1
ret i32 %4
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
|
linux_arch_sparc_kernel_extr_perf_event.c_sparc_vt_read_pmc
|
; ModuleID = 'AnghaBench/linux/drivers/md/bcache/extr_extents.c_bch_ptr_status.c'
source_filename = "AnghaBench/linux/drivers/md/bcache/extr_extents.c_bch_ptr_status.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i64, i64 }
@.str = private unnamed_addr constant [20 x i8] c"bad, length too big\00", align 1
@.str.1 = private unnamed_addr constant [18 x i8] c"bad, short offset\00", align 1
@.str.2 = private unnamed_addr constant [31 x i8] c"bad, offset past end of device\00", align 1
@.str.3 = private unnamed_addr constant [6 x i8] c"stale\00", align 1
@ZERO_KEY = dso_local global i32 0, align 4
@.str.4 = private unnamed_addr constant [14 x i8] c"bad, null key\00", align 1
@.str.5 = private unnamed_addr constant [17 x i8] c"bad, no pointers\00", align 1
@.str.6 = private unnamed_addr constant [11 x i8] c"zeroed key\00", align 1
@.str.7 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @bch_ptr_status], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal nonnull ptr @bch_ptr_status(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @KEY_PTRS(ptr noundef %1) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %32, label %5
5: ; preds = %2, %28
%6 = phi i32 [ %29, %28 ], [ 0, %2 ]
%7 = tail call i64 @ptr_available(ptr noundef %0, ptr noundef %1, i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %28, label %9
9: ; preds = %5
%10 = tail call ptr @PTR_CACHE(ptr noundef %0, ptr noundef %1, i32 noundef %6) #2
%11 = tail call i64 @PTR_BUCKET_NR(ptr noundef %0, ptr noundef %1, i32 noundef %6) #2
%12 = tail call i32 @PTR_OFFSET(ptr noundef %1, i32 noundef %6) #2
%13 = tail call i64 @bucket_remainder(ptr noundef %0, i32 noundef %12) #2
%14 = tail call i64 @KEY_SIZE(ptr noundef %1) #2
%15 = add i64 %14, %13
%16 = load i64, ptr %0, align 8, !tbaa !5
%17 = icmp ugt i64 %15, %16
br i1 %17, label %42, label %18
18: ; preds = %9
%19 = load i64, ptr %10, align 8, !tbaa !11
%20 = icmp ult i64 %11, %19
br i1 %20, label %42, label %21
21: ; preds = %18
%22 = getelementptr inbounds %struct.TYPE_4__, ptr %10, i64 0, i32 1
%23 = load i64, ptr %22, align 8, !tbaa !14
%24 = icmp ult i64 %11, %23
br i1 %24, label %25, label %42
25: ; preds = %21
%26 = tail call i64 @ptr_stale(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %6) #2
%27 = icmp eq i64 %26, 0
br i1 %27, label %28, label %42
28: ; preds = %5, %25
%29 = add nuw i32 %6, 1
%30 = tail call i32 @KEY_PTRS(ptr noundef %1) #2
%31 = icmp ult i32 %29, %30
br i1 %31, label %5, label %32, !llvm.loop !15
32: ; preds = %28, %2
%33 = tail call i32 @bkey_cmp(ptr noundef %1, ptr noundef nonnull @ZERO_KEY) #2
%34 = icmp eq i32 %33, 0
br i1 %34, label %42, label %35
35: ; preds = %32
%36 = tail call i32 @KEY_PTRS(ptr noundef %1) #2
%37 = icmp eq i32 %36, 0
br i1 %37, label %42, label %38
38: ; preds = %35
%39 = tail call i64 @KEY_SIZE(ptr noundef %1) #2
%40 = icmp eq i64 %39, 0
%41 = select i1 %40, ptr @.str.6, ptr @.str.7
br label %42
42: ; preds = %21, %18, %9, %25, %38, %35, %32
%43 = phi ptr [ @.str.4, %32 ], [ @.str.5, %35 ], [ %41, %38 ], [ @.str, %9 ], [ @.str.1, %18 ], [ @.str.2, %21 ], [ @.str.3, %25 ]
ret ptr %43
}
declare i32 @KEY_PTRS(ptr noundef) local_unnamed_addr #1
declare i64 @ptr_available(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @PTR_CACHE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @PTR_BUCKET_NR(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @bucket_remainder(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PTR_OFFSET(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @KEY_SIZE(ptr noundef) local_unnamed_addr #1
declare i64 @ptr_stale(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bkey_cmp(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"cache_set", !7, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"cache", !13, i64 0}
!13 = !{!"TYPE_4__", !8, i64 0, !8, i64 8}
!14 = !{!12, !8, i64 8}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/md/bcache/extr_extents.c_bch_ptr_status.c'
source_filename = "AnghaBench/linux/drivers/md/bcache/extr_extents.c_bch_ptr_status.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [20 x i8] c"bad, length too big\00", align 1
@.str.1 = private unnamed_addr constant [18 x i8] c"bad, short offset\00", align 1
@.str.2 = private unnamed_addr constant [31 x i8] c"bad, offset past end of device\00", align 1
@.str.3 = private unnamed_addr constant [6 x i8] c"stale\00", align 1
@ZERO_KEY = common global i32 0, align 4
@.str.4 = private unnamed_addr constant [14 x i8] c"bad, null key\00", align 1
@.str.5 = private unnamed_addr constant [17 x i8] c"bad, no pointers\00", align 1
@.str.6 = private unnamed_addr constant [11 x i8] c"zeroed key\00", align 1
@.str.7 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@llvm.used = appending global [1 x ptr] [ptr @bch_ptr_status], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal nonnull ptr @bch_ptr_status(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @KEY_PTRS(ptr noundef %1) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %32, label %5
5: ; preds = %2, %28
%6 = phi i32 [ %29, %28 ], [ 0, %2 ]
%7 = tail call i64 @ptr_available(ptr noundef %0, ptr noundef %1, i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %28, label %9
9: ; preds = %5
%10 = tail call ptr @PTR_CACHE(ptr noundef %0, ptr noundef %1, i32 noundef %6) #2
%11 = tail call i64 @PTR_BUCKET_NR(ptr noundef %0, ptr noundef %1, i32 noundef %6) #2
%12 = tail call i32 @PTR_OFFSET(ptr noundef %1, i32 noundef %6) #2
%13 = tail call i64 @bucket_remainder(ptr noundef %0, i32 noundef %12) #2
%14 = tail call i64 @KEY_SIZE(ptr noundef %1) #2
%15 = add i64 %14, %13
%16 = load i64, ptr %0, align 8, !tbaa !6
%17 = icmp ugt i64 %15, %16
br i1 %17, label %42, label %18
18: ; preds = %9
%19 = load i64, ptr %10, align 8, !tbaa !12
%20 = icmp ult i64 %11, %19
br i1 %20, label %42, label %21
21: ; preds = %18
%22 = getelementptr inbounds i8, ptr %10, i64 8
%23 = load i64, ptr %22, align 8, !tbaa !15
%24 = icmp ult i64 %11, %23
br i1 %24, label %25, label %42
25: ; preds = %21
%26 = tail call i64 @ptr_stale(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %6) #2
%27 = icmp eq i64 %26, 0
br i1 %27, label %28, label %42
28: ; preds = %5, %25
%29 = add nuw i32 %6, 1
%30 = tail call i32 @KEY_PTRS(ptr noundef %1) #2
%31 = icmp ult i32 %29, %30
br i1 %31, label %5, label %32, !llvm.loop !16
32: ; preds = %28, %2
%33 = tail call i32 @bkey_cmp(ptr noundef %1, ptr noundef nonnull @ZERO_KEY) #2
%34 = icmp eq i32 %33, 0
br i1 %34, label %42, label %35
35: ; preds = %32
%36 = tail call i32 @KEY_PTRS(ptr noundef %1) #2
%37 = icmp eq i32 %36, 0
br i1 %37, label %42, label %38
38: ; preds = %35
%39 = tail call i64 @KEY_SIZE(ptr noundef %1) #2
%40 = icmp eq i64 %39, 0
%41 = select i1 %40, ptr @.str.6, ptr @.str.7
br label %42
42: ; preds = %21, %18, %9, %25, %38, %35, %32
%43 = phi ptr [ @.str.4, %32 ], [ @.str.5, %35 ], [ %41, %38 ], [ @.str, %9 ], [ @.str.1, %18 ], [ @.str.2, %21 ], [ @.str.3, %25 ]
ret ptr %43
}
declare i32 @KEY_PTRS(ptr noundef) local_unnamed_addr #1
declare i64 @ptr_available(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @PTR_CACHE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @PTR_BUCKET_NR(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @bucket_remainder(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PTR_OFFSET(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @KEY_SIZE(ptr noundef) local_unnamed_addr #1
declare i64 @ptr_stale(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bkey_cmp(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"cache_set", !8, i64 0}
!8 = !{!"TYPE_3__", !9, i64 0}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !9, i64 0}
!13 = !{!"cache", !14, i64 0}
!14 = !{!"TYPE_4__", !9, i64 0, !9, i64 8}
!15 = !{!13, !9, i64 8}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_md_bcache_extr_extents.c_bch_ptr_status
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/mmc/core/extr_core.c_mmc_set_driver_type.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/mmc/core/extr_core.c_mmc_set_driver_type.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @mmc_set_driver_type(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
store i32 %1, ptr %0, align 4, !tbaa !5
%3 = tail call i32 @mmc_set_ios(ptr noundef nonnull %0) #2
ret void
}
declare i32 @mmc_set_ios(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"mmc_host", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/mmc/core/extr_core.c_mmc_set_driver_type.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/mmc/core/extr_core.c_mmc_set_driver_type.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @mmc_set_driver_type(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
store i32 %1, ptr %0, align 4, !tbaa !6
%3 = tail call i32 @mmc_set_ios(ptr noundef nonnull %0) #2
ret void
}
declare i32 @mmc_set_ios(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"mmc_host", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_drivers_mmc_core_extr_core.c_mmc_set_driver_type
|
; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_ldc.c_ldc_disconnect.c'
source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_ldc.c_ldc_disconnect.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ldc_channel = type { i32, i32, %struct.TYPE_2__, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_2__ = type { i64, i32, i32 }
@LDC_MODE_RAW = dso_local local_unnamed_addr global i64 0, align 8
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@LDC_FLAG_ALLOCED_QUEUES = dso_local local_unnamed_addr global i32 0, align 4
@LDC_FLAG_REGISTERED_QUEUES = dso_local local_unnamed_addr global i32 0, align 4
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@LDC_STATE_BOUND = dso_local local_unnamed_addr global i32 0, align 4
@LDC_HS_OPEN = dso_local local_unnamed_addr global i32 0, align 4
@LDC_FLAG_RESET = dso_local local_unnamed_addr global i32 0, align 4
@LDC_FLAG_REGISTERED_IRQS = dso_local local_unnamed_addr global i32 0, align 4
@LDC_STATE_INIT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @ldc_disconnect(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.ldc_channel, ptr %0, i64 0, i32 2
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = load i64, ptr @LDC_MODE_RAW, align 8, !tbaa !12
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, ptr @EINVAL, align 4, !tbaa !13
%8 = sub nsw i32 0, %7
br label %79
9: ; preds = %1
%10 = load i32, ptr %0, align 8, !tbaa !14
%11 = load i32, ptr @LDC_FLAG_ALLOCED_QUEUES, align 4, !tbaa !13
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %18, label %14
14: ; preds = %9
%15 = load i32, ptr @LDC_FLAG_REGISTERED_QUEUES, align 4, !tbaa !13
%16 = and i32 %15, %10
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %14, %9
%19 = load i32, ptr @EINVAL, align 4, !tbaa !13
%20 = sub nsw i32 0, %19
br label %79
21: ; preds = %14
%22 = getelementptr inbounds %struct.ldc_channel, ptr %0, i64 0, i32 1
%23 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %22, i64 noundef undef) #2
%24 = load i32, ptr @ENODEV, align 4, !tbaa !13
%25 = sub nsw i32 0, %24
%26 = getelementptr inbounds %struct.ldc_channel, ptr %0, i64 0, i32 3
%27 = load i32, ptr %26, align 8, !tbaa !15
%28 = tail call i64 @sun4v_ldc_tx_qconf(i32 noundef %27, i32 noundef 0, i32 noundef 0) #2
%29 = icmp eq i64 %28, 0
br i1 %29, label %30, label %59
30: ; preds = %21
%31 = load i32, ptr %26, align 8, !tbaa !15
%32 = getelementptr inbounds %struct.ldc_channel, ptr %0, i64 0, i32 8
%33 = load i32, ptr %32, align 4, !tbaa !16
%34 = getelementptr inbounds %struct.ldc_channel, ptr %0, i64 0, i32 7
%35 = load i32, ptr %34, align 8, !tbaa !17
%36 = tail call i64 @sun4v_ldc_tx_qconf(i32 noundef %31, i32 noundef %33, i32 noundef %35) #2
%37 = icmp eq i64 %36, 0
br i1 %37, label %38, label %59
38: ; preds = %30
%39 = load i32, ptr %26, align 8, !tbaa !15
%40 = tail call i64 @sun4v_ldc_rx_qconf(i32 noundef %39, i32 noundef 0, i32 noundef 0) #2
%41 = icmp eq i64 %40, 0
br i1 %41, label %42, label %59
42: ; preds = %38
%43 = load i32, ptr %26, align 8, !tbaa !15
%44 = getelementptr inbounds %struct.ldc_channel, ptr %0, i64 0, i32 6
%45 = load i32, ptr %44, align 4, !tbaa !18
%46 = getelementptr inbounds %struct.ldc_channel, ptr %0, i64 0, i32 5
%47 = load i32, ptr %46, align 8, !tbaa !19
%48 = tail call i64 @sun4v_ldc_rx_qconf(i32 noundef %43, i32 noundef %45, i32 noundef %47) #2
%49 = icmp eq i64 %48, 0
br i1 %49, label %50, label %59
50: ; preds = %42
%51 = load i32, ptr @LDC_STATE_BOUND, align 4, !tbaa !13
%52 = tail call i32 @ldc_set_state(ptr noundef nonnull %0, i32 noundef %51) #2
%53 = load i32, ptr @LDC_HS_OPEN, align 4, !tbaa !13
%54 = getelementptr inbounds %struct.ldc_channel, ptr %0, i64 0, i32 4
store i32 %53, ptr %54, align 4, !tbaa !20
%55 = load i32, ptr @LDC_FLAG_RESET, align 4, !tbaa !13
%56 = load i32, ptr %0, align 8, !tbaa !14
%57 = or i32 %56, %55
store i32 %57, ptr %0, align 8, !tbaa !14
%58 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %22, i64 noundef undef) #2
br label %79
59: ; preds = %42, %38, %30, %21
%60 = load i32, ptr %26, align 8, !tbaa !15
%61 = tail call i64 @sun4v_ldc_tx_qconf(i32 noundef %60, i32 noundef 0, i32 noundef 0) #2
%62 = load i32, ptr %26, align 8, !tbaa !15
%63 = tail call i64 @sun4v_ldc_rx_qconf(i32 noundef %62, i32 noundef 0, i32 noundef 0) #2
%64 = getelementptr inbounds %struct.ldc_channel, ptr %0, i64 0, i32 2, i32 2
%65 = load i32, ptr %64, align 4, !tbaa !21
%66 = tail call i32 @free_irq(i32 noundef %65, ptr noundef nonnull %0) #2
%67 = getelementptr inbounds %struct.ldc_channel, ptr %0, i64 0, i32 2, i32 1
%68 = load i32, ptr %67, align 8, !tbaa !22
%69 = tail call i32 @free_irq(i32 noundef %68, ptr noundef nonnull %0) #2
%70 = load i32, ptr @LDC_FLAG_REGISTERED_IRQS, align 4, !tbaa !13
%71 = load i32, ptr @LDC_FLAG_REGISTERED_QUEUES, align 4, !tbaa !13
%72 = or i32 %71, %70
%73 = xor i32 %72, -1
%74 = load i32, ptr %0, align 8, !tbaa !14
%75 = and i32 %74, %73
store i32 %75, ptr %0, align 8, !tbaa !14
%76 = load i32, ptr @LDC_STATE_INIT, align 4, !tbaa !13
%77 = tail call i32 @ldc_set_state(ptr noundef nonnull %0, i32 noundef %76) #2
%78 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %22, i64 noundef undef) #2
br label %79
79: ; preds = %59, %50, %18, %6
%80 = phi i32 [ %8, %6 ], [ %25, %59 ], [ 0, %50 ], [ %20, %18 ]
ret i32 %80
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @sun4v_ldc_tx_qconf(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @sun4v_ldc_rx_qconf(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ldc_set_state(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @free_irq(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"ldc_channel", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !11, i64 0, !7, i64 8, !7, i64 12}
!11 = !{!"long", !8, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !7, i64 0}
!15 = !{!6, !7, i64 24}
!16 = !{!6, !7, i64 44}
!17 = !{!6, !7, i64 40}
!18 = !{!6, !7, i64 36}
!19 = !{!6, !7, i64 32}
!20 = !{!6, !7, i64 28}
!21 = !{!6, !7, i64 20}
!22 = !{!6, !7, i64 16}
|
; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_ldc.c_ldc_disconnect.c'
source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_ldc.c_ldc_disconnect.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LDC_MODE_RAW = common local_unnamed_addr global i64 0, align 8
@EINVAL = common local_unnamed_addr global i32 0, align 4
@LDC_FLAG_ALLOCED_QUEUES = common local_unnamed_addr global i32 0, align 4
@LDC_FLAG_REGISTERED_QUEUES = common local_unnamed_addr global i32 0, align 4
@ENODEV = common local_unnamed_addr global i32 0, align 4
@LDC_STATE_BOUND = common local_unnamed_addr global i32 0, align 4
@LDC_HS_OPEN = common local_unnamed_addr global i32 0, align 4
@LDC_FLAG_RESET = common local_unnamed_addr global i32 0, align 4
@LDC_FLAG_REGISTERED_IRQS = common local_unnamed_addr global i32 0, align 4
@LDC_STATE_INIT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @ldc_disconnect(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = load i64, ptr @LDC_MODE_RAW, align 8, !tbaa !13
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, ptr @EINVAL, align 4, !tbaa !14
%8 = sub nsw i32 0, %7
br label %79
9: ; preds = %1
%10 = load i32, ptr %0, align 8, !tbaa !15
%11 = load i32, ptr @LDC_FLAG_ALLOCED_QUEUES, align 4, !tbaa !14
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %18, label %14
14: ; preds = %9
%15 = load i32, ptr @LDC_FLAG_REGISTERED_QUEUES, align 4, !tbaa !14
%16 = and i32 %15, %10
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %14, %9
%19 = load i32, ptr @EINVAL, align 4, !tbaa !14
%20 = sub nsw i32 0, %19
br label %79
21: ; preds = %14
%22 = getelementptr inbounds i8, ptr %0, i64 4
%23 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %22, i64 noundef undef) #2
%24 = load i32, ptr @ENODEV, align 4, !tbaa !14
%25 = sub nsw i32 0, %24
%26 = getelementptr inbounds i8, ptr %0, i64 24
%27 = load i32, ptr %26, align 8, !tbaa !16
%28 = tail call i64 @sun4v_ldc_tx_qconf(i32 noundef %27, i32 noundef 0, i32 noundef 0) #2
%29 = icmp eq i64 %28, 0
br i1 %29, label %30, label %59
30: ; preds = %21
%31 = load i32, ptr %26, align 8, !tbaa !16
%32 = getelementptr inbounds i8, ptr %0, i64 44
%33 = load i32, ptr %32, align 4, !tbaa !17
%34 = getelementptr inbounds i8, ptr %0, i64 40
%35 = load i32, ptr %34, align 8, !tbaa !18
%36 = tail call i64 @sun4v_ldc_tx_qconf(i32 noundef %31, i32 noundef %33, i32 noundef %35) #2
%37 = icmp eq i64 %36, 0
br i1 %37, label %38, label %59
38: ; preds = %30
%39 = load i32, ptr %26, align 8, !tbaa !16
%40 = tail call i64 @sun4v_ldc_rx_qconf(i32 noundef %39, i32 noundef 0, i32 noundef 0) #2
%41 = icmp eq i64 %40, 0
br i1 %41, label %42, label %59
42: ; preds = %38
%43 = load i32, ptr %26, align 8, !tbaa !16
%44 = getelementptr inbounds i8, ptr %0, i64 36
%45 = load i32, ptr %44, align 4, !tbaa !19
%46 = getelementptr inbounds i8, ptr %0, i64 32
%47 = load i32, ptr %46, align 8, !tbaa !20
%48 = tail call i64 @sun4v_ldc_rx_qconf(i32 noundef %43, i32 noundef %45, i32 noundef %47) #2
%49 = icmp eq i64 %48, 0
br i1 %49, label %50, label %59
50: ; preds = %42
%51 = load i32, ptr @LDC_STATE_BOUND, align 4, !tbaa !14
%52 = tail call i32 @ldc_set_state(ptr noundef nonnull %0, i32 noundef %51) #2
%53 = load i32, ptr @LDC_HS_OPEN, align 4, !tbaa !14
%54 = getelementptr inbounds i8, ptr %0, i64 28
store i32 %53, ptr %54, align 4, !tbaa !21
%55 = load i32, ptr @LDC_FLAG_RESET, align 4, !tbaa !14
%56 = load i32, ptr %0, align 8, !tbaa !15
%57 = or i32 %56, %55
store i32 %57, ptr %0, align 8, !tbaa !15
%58 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %22, i64 noundef undef) #2
br label %79
59: ; preds = %42, %38, %30, %21
%60 = load i32, ptr %26, align 8, !tbaa !16
%61 = tail call i64 @sun4v_ldc_tx_qconf(i32 noundef %60, i32 noundef 0, i32 noundef 0) #2
%62 = load i32, ptr %26, align 8, !tbaa !16
%63 = tail call i64 @sun4v_ldc_rx_qconf(i32 noundef %62, i32 noundef 0, i32 noundef 0) #2
%64 = getelementptr inbounds i8, ptr %0, i64 20
%65 = load i32, ptr %64, align 4, !tbaa !22
%66 = tail call i32 @free_irq(i32 noundef %65, ptr noundef nonnull %0) #2
%67 = getelementptr inbounds i8, ptr %0, i64 16
%68 = load i32, ptr %67, align 8, !tbaa !23
%69 = tail call i32 @free_irq(i32 noundef %68, ptr noundef nonnull %0) #2
%70 = load i32, ptr @LDC_FLAG_REGISTERED_IRQS, align 4, !tbaa !14
%71 = load i32, ptr @LDC_FLAG_REGISTERED_QUEUES, align 4, !tbaa !14
%72 = or i32 %71, %70
%73 = xor i32 %72, -1
%74 = load i32, ptr %0, align 8, !tbaa !15
%75 = and i32 %74, %73
store i32 %75, ptr %0, align 8, !tbaa !15
%76 = load i32, ptr @LDC_STATE_INIT, align 4, !tbaa !14
%77 = tail call i32 @ldc_set_state(ptr noundef nonnull %0, i32 noundef %76) #2
%78 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %22, i64 noundef undef) #2
br label %79
79: ; preds = %59, %50, %18, %6
%80 = phi i32 [ %8, %6 ], [ %25, %59 ], [ 0, %50 ], [ %20, %18 ]
ret i32 %80
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @sun4v_ldc_tx_qconf(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @sun4v_ldc_rx_qconf(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ldc_set_state(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @free_irq(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"ldc_channel", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36, !8, i64 40, !8, i64 44}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !12, i64 0, !8, i64 8, !8, i64 12}
!12 = !{!"long", !9, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !8, i64 0}
!16 = !{!7, !8, i64 24}
!17 = !{!7, !8, i64 44}
!18 = !{!7, !8, i64 40}
!19 = !{!7, !8, i64 36}
!20 = !{!7, !8, i64 32}
!21 = !{!7, !8, i64 28}
!22 = !{!7, !8, i64 20}
!23 = !{!7, !8, i64 16}
|
linux_arch_sparc_kernel_extr_ldc.c_ldc_disconnect
|
; ModuleID = 'AnghaBench/linux/drivers/mmc/host/extr_sdhci.c_sdhci_can_64bit_dma.c'
source_filename = "AnghaBench/linux/drivers/mmc/host/extr_sdhci.c_sdhci_can_64bit_dma.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sdhci_host = type { i64, i32, i64 }
@SDHCI_SPEC_410 = dso_local local_unnamed_addr global i64 0, align 8
@SDHCI_CAN_64BIT_V4 = dso_local local_unnamed_addr global i32 0, align 4
@SDHCI_CAN_64BIT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sdhci_can_64bit_dma], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @sdhci_can_64bit_dma(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @SDHCI_SPEC_410, align 8, !tbaa !11
%4 = icmp slt i64 %2, %3
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = getelementptr inbounds %struct.sdhci_host, ptr %0, i64 0, i32 2
%7 = load i64, ptr %6, align 8, !tbaa !12
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5, %1
br label %10
10: ; preds = %5, %9
%11 = phi ptr [ @SDHCI_CAN_64BIT, %9 ], [ @SDHCI_CAN_64BIT_V4, %5 ]
%12 = getelementptr inbounds %struct.sdhci_host, ptr %0, i64 0, i32 1
%13 = load i32, ptr %12, align 8, !tbaa !13
%14 = load i32, ptr %11, align 4, !tbaa !14
%15 = and i32 %14, %13
ret i32 %15
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sdhci_host", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !10, i64 8}
!14 = !{!10, !10, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/mmc/host/extr_sdhci.c_sdhci_can_64bit_dma.c'
source_filename = "AnghaBench/linux/drivers/mmc/host/extr_sdhci.c_sdhci_can_64bit_dma.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SDHCI_SPEC_410 = common local_unnamed_addr global i64 0, align 8
@SDHCI_CAN_64BIT_V4 = common local_unnamed_addr global i32 0, align 4
@SDHCI_CAN_64BIT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sdhci_can_64bit_dma], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @sdhci_can_64bit_dma(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @SDHCI_SPEC_410, align 8, !tbaa !12
%4 = icmp slt i64 %2, %3
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 16
%7 = load i64, ptr %6, align 8, !tbaa !13
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5, %1
br label %10
10: ; preds = %5, %9
%11 = phi ptr [ @SDHCI_CAN_64BIT, %9 ], [ @SDHCI_CAN_64BIT_V4, %5 ]
%12 = getelementptr inbounds i8, ptr %0, i64 8
%13 = load i32, ptr %12, align 8, !tbaa !14
%14 = load i32, ptr %11, align 4, !tbaa !15
%15 = and i32 %14, %13
ret i32 %15
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sdhci_host", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 16}
!14 = !{!7, !11, i64 8}
!15 = !{!11, !11, i64 0}
|
linux_drivers_mmc_host_extr_sdhci.c_sdhci_can_64bit_dma
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sunrpc/extr_xprt.c___xprt_put_cong.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sunrpc/extr_xprt.c___xprt_put_cong.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@RPC_CWNDSCALE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @__xprt_put_cong], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @__xprt_put_cong(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %2
store i64 0, ptr %1, align 8, !tbaa !5
%6 = load i64, ptr @RPC_CWNDSCALE, align 8, !tbaa !10
%7 = load i32, ptr %0, align 4, !tbaa !11
%8 = trunc i64 %6 to i32
%9 = sub i32 %7, %8
store i32 %9, ptr %0, align 4, !tbaa !11
%10 = tail call i32 @__xprt_lock_write_next_cong(ptr noundef nonnull %0) #2
br label %11
11: ; preds = %2, %5
ret void
}
declare i32 @__xprt_lock_write_next_cong(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"rpc_rqst", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"rpc_xprt", !13, i64 0}
!13 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sunrpc/extr_xprt.c___xprt_put_cong.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sunrpc/extr_xprt.c___xprt_put_cong.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RPC_CWNDSCALE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @__xprt_put_cong], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @__xprt_put_cong(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %2
store i64 0, ptr %1, align 8, !tbaa !6
%6 = load i64, ptr @RPC_CWNDSCALE, align 8, !tbaa !11
%7 = load i32, ptr %0, align 4, !tbaa !12
%8 = trunc i64 %6 to i32
%9 = sub i32 %7, %8
store i32 %9, ptr %0, align 4, !tbaa !12
%10 = tail call i32 @__xprt_lock_write_next_cong(ptr noundef nonnull %0) #2
br label %11
11: ; preds = %2, %5
ret void
}
declare i32 @__xprt_lock_write_next_cong(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rpc_rqst", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"rpc_xprt", !14, i64 0}
!14 = !{!"int", !9, i64 0}
|
fastsocket_kernel_net_sunrpc_extr_xprt.c___xprt_put_cong
|
; ModuleID = 'AnghaBench/anypixel/firmware/controller/ThirdParty/SPL/src/extr_stm32f4xx_tim.c_TIM_CounterModeConfig.c'
source_filename = "AnghaBench/anypixel/firmware/controller/ThirdParty/SPL/src/extr_stm32f4xx_tim.c_TIM_CounterModeConfig.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TIM_CR1_DIR = dso_local local_unnamed_addr global i32 0, align 4
@TIM_CR1_CMS = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @TIM_CounterModeConfig(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @IS_TIM_LIST3_PERIPH(ptr noundef %0) #2
%4 = tail call i32 @assert_param(i32 noundef %3) #2
%5 = tail call i32 @IS_TIM_COUNTER_MODE(i32 noundef %1) #2
%6 = tail call i32 @assert_param(i32 noundef %5) #2
%7 = load i32, ptr %0, align 4, !tbaa !5
%8 = load i32, ptr @TIM_CR1_DIR, align 4, !tbaa !10
%9 = load i32, ptr @TIM_CR1_CMS, align 4, !tbaa !10
%10 = or i32 %9, %8
%11 = xor i32 %10, -1
%12 = and i32 %7, %11
%13 = or i32 %12, %1
store i32 %13, ptr %0, align 4, !tbaa !5
ret void
}
declare i32 @assert_param(i32 noundef) local_unnamed_addr #1
declare i32 @IS_TIM_LIST3_PERIPH(ptr noundef) local_unnamed_addr #1
declare i32 @IS_TIM_COUNTER_MODE(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/anypixel/firmware/controller/ThirdParty/SPL/src/extr_stm32f4xx_tim.c_TIM_CounterModeConfig.c'
source_filename = "AnghaBench/anypixel/firmware/controller/ThirdParty/SPL/src/extr_stm32f4xx_tim.c_TIM_CounterModeConfig.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TIM_CR1_DIR = common local_unnamed_addr global i32 0, align 4
@TIM_CR1_CMS = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @TIM_CounterModeConfig(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @IS_TIM_LIST3_PERIPH(ptr noundef %0) #2
%4 = tail call i32 @assert_param(i32 noundef %3) #2
%5 = tail call i32 @IS_TIM_COUNTER_MODE(i32 noundef %1) #2
%6 = tail call i32 @assert_param(i32 noundef %5) #2
%7 = load i32, ptr %0, align 4, !tbaa !6
%8 = load i32, ptr @TIM_CR1_DIR, align 4, !tbaa !11
%9 = load i32, ptr @TIM_CR1_CMS, align 4, !tbaa !11
%10 = or i32 %9, %8
%11 = xor i32 %10, -1
%12 = and i32 %7, %11
%13 = or i32 %12, %1
store i32 %13, ptr %0, align 4, !tbaa !6
ret void
}
declare i32 @assert_param(i32 noundef) local_unnamed_addr #1
declare i32 @IS_TIM_LIST3_PERIPH(ptr noundef) local_unnamed_addr #1
declare i32 @IS_TIM_COUNTER_MODE(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
anypixel_firmware_controller_ThirdParty_SPL_src_extr_stm32f4xx_tim.c_TIM_CounterModeConfig
|
; ModuleID = 'AnghaBench/nginx/src/http/extr_ngx_http_file_cache.c_ngx_http_file_cache_loader_sleep.c'
source_filename = "AnghaBench/nginx/src/http/extr_ngx_http_file_cache.c_ngx_http_file_cache_loader_sleep.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i64, i32, i32 }
@ngx_current_msec = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ngx_http_file_cache_loader_sleep], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ngx_http_file_cache_loader_sleep(ptr nocapture noundef %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = tail call i32 @ngx_msleep(i32 noundef %3) #2
%5 = tail call i32 (...) @ngx_time_update() #2
%6 = load i32, ptr @ngx_current_msec, align 4, !tbaa !11
%7 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
store i32 %6, ptr %7, align 8, !tbaa !12
store i64 0, ptr %0, align 8, !tbaa !13
ret void
}
declare i32 @ngx_msleep(i32 noundef) local_unnamed_addr #1
declare i32 @ngx_time_update(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 12}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8, !10, i64 12}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/nginx/src/http/extr_ngx_http_file_cache.c_ngx_http_file_cache_loader_sleep.c'
source_filename = "AnghaBench/nginx/src/http/extr_ngx_http_file_cache.c_ngx_http_file_cache_loader_sleep.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ngx_current_msec = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ngx_http_file_cache_loader_sleep], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ngx_http_file_cache_loader_sleep(ptr nocapture noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 12
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = tail call i32 @ngx_msleep(i32 noundef %3) #2
%5 = tail call i32 @ngx_time_update() #2
%6 = load i32, ptr @ngx_current_msec, align 4, !tbaa !12
%7 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %6, ptr %7, align 8, !tbaa !13
store i64 0, ptr %0, align 8, !tbaa !14
ret void
}
declare i32 @ngx_msleep(i32 noundef) local_unnamed_addr #1
declare i32 @ngx_time_update(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 12}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8, !11, i64 12}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!7, !8, i64 0}
|
nginx_src_http_extr_ngx_http_file_cache.c_ngx_http_file_cache_loader_sleep
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/net/extr_if_axe.c_axe_csum_cfg.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/net/extr_if_axe.c_axe_csum_cfg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MA_OWNED = dso_local local_unnamed_addr global i32 0, align 4
@AXE_FLAG_772B = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_TXCSUM = dso_local local_unnamed_addr global i32 0, align 4
@AXE_TXCSUM_IP = dso_local local_unnamed_addr global i32 0, align 4
@AXE_TXCSUM_TCP = dso_local local_unnamed_addr global i32 0, align 4
@AXE_TXCSUM_UDP = dso_local local_unnamed_addr global i32 0, align 4
@AXE_772B_CMD_WRITE_TXCSUM = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_RXCSUM = dso_local local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_IP = dso_local local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_IPVE = dso_local local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_TCP = dso_local local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_UDP = dso_local local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_ICMP = dso_local local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_IGMP = dso_local local_unnamed_addr global i32 0, align 4
@AXE_772B_CMD_WRITE_RXCSUM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @axe_csum_cfg], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @axe_csum_cfg(ptr noundef %0) #0 {
%2 = tail call ptr @uether_getsc(ptr noundef %0) #2
%3 = load i32, ptr @MA_OWNED, align 4, !tbaa !5
%4 = tail call i32 @AXE_LOCK_ASSERT(ptr noundef %2, i32 noundef %3) #2
%5 = load i32, ptr %2, align 4, !tbaa !9
%6 = load i32, ptr @AXE_FLAG_772B, align 4, !tbaa !5
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %45, label %9
9: ; preds = %1
%10 = tail call ptr @uether_getifp(ptr noundef %0) #2
%11 = load i32, ptr %10, align 4, !tbaa !11
%12 = load i32, ptr @IFCAP_TXCSUM, align 4, !tbaa !5
%13 = and i32 %12, %11
%14 = icmp eq i32 %13, 0
br i1 %14, label %21, label %15
15: ; preds = %9
%16 = load i32, ptr @AXE_TXCSUM_IP, align 4, !tbaa !5
%17 = load i32, ptr @AXE_TXCSUM_TCP, align 4, !tbaa !5
%18 = or i32 %17, %16
%19 = load i32, ptr @AXE_TXCSUM_UDP, align 4, !tbaa !5
%20 = or i32 %18, %19
br label %21
21: ; preds = %15, %9
%22 = phi i32 [ %20, %15 ], [ 0, %9 ]
%23 = load i32, ptr @AXE_772B_CMD_WRITE_TXCSUM, align 4, !tbaa !5
%24 = tail call i32 @axe_cmd(ptr noundef nonnull %2, i32 noundef %23, i32 noundef 0, i32 noundef %22, ptr noundef null) #2
%25 = load i32, ptr %10, align 4, !tbaa !11
%26 = load i32, ptr @IFCAP_RXCSUM, align 4, !tbaa !5
%27 = and i32 %26, %25
%28 = icmp eq i32 %27, 0
br i1 %28, label %41, label %29
29: ; preds = %21
%30 = load i32, ptr @AXE_RXCSUM_IP, align 4, !tbaa !5
%31 = load i32, ptr @AXE_RXCSUM_IPVE, align 4, !tbaa !5
%32 = or i32 %31, %30
%33 = load i32, ptr @AXE_RXCSUM_TCP, align 4, !tbaa !5
%34 = or i32 %32, %33
%35 = load i32, ptr @AXE_RXCSUM_UDP, align 4, !tbaa !5
%36 = or i32 %34, %35
%37 = load i32, ptr @AXE_RXCSUM_ICMP, align 4, !tbaa !5
%38 = or i32 %36, %37
%39 = load i32, ptr @AXE_RXCSUM_IGMP, align 4, !tbaa !5
%40 = or i32 %38, %39
br label %41
41: ; preds = %29, %21
%42 = phi i32 [ %40, %29 ], [ 0, %21 ]
%43 = load i32, ptr @AXE_772B_CMD_WRITE_RXCSUM, align 4, !tbaa !5
%44 = tail call i32 @axe_cmd(ptr noundef nonnull %2, i32 noundef %43, i32 noundef 0, i32 noundef %42, ptr noundef null) #2
br label %45
45: ; preds = %41, %1
ret void
}
declare ptr @uether_getsc(ptr noundef) local_unnamed_addr #1
declare i32 @AXE_LOCK_ASSERT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @uether_getifp(ptr noundef) local_unnamed_addr #1
declare i32 @axe_cmd(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"axe_softc", !6, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"ifnet", !6, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/net/extr_if_axe.c_axe_csum_cfg.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/net/extr_if_axe.c_axe_csum_cfg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MA_OWNED = common local_unnamed_addr global i32 0, align 4
@AXE_FLAG_772B = common local_unnamed_addr global i32 0, align 4
@IFCAP_TXCSUM = common local_unnamed_addr global i32 0, align 4
@AXE_TXCSUM_IP = common local_unnamed_addr global i32 0, align 4
@AXE_TXCSUM_TCP = common local_unnamed_addr global i32 0, align 4
@AXE_TXCSUM_UDP = common local_unnamed_addr global i32 0, align 4
@AXE_772B_CMD_WRITE_TXCSUM = common local_unnamed_addr global i32 0, align 4
@IFCAP_RXCSUM = common local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_IP = common local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_IPVE = common local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_TCP = common local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_UDP = common local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_ICMP = common local_unnamed_addr global i32 0, align 4
@AXE_RXCSUM_IGMP = common local_unnamed_addr global i32 0, align 4
@AXE_772B_CMD_WRITE_RXCSUM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @axe_csum_cfg], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @axe_csum_cfg(ptr noundef %0) #0 {
%2 = tail call ptr @uether_getsc(ptr noundef %0) #2
%3 = load i32, ptr @MA_OWNED, align 4, !tbaa !6
%4 = tail call i32 @AXE_LOCK_ASSERT(ptr noundef %2, i32 noundef %3) #2
%5 = load i32, ptr %2, align 4, !tbaa !10
%6 = load i32, ptr @AXE_FLAG_772B, align 4, !tbaa !6
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %45, label %9
9: ; preds = %1
%10 = tail call ptr @uether_getifp(ptr noundef %0) #2
%11 = load i32, ptr %10, align 4, !tbaa !12
%12 = load i32, ptr @IFCAP_TXCSUM, align 4, !tbaa !6
%13 = and i32 %12, %11
%14 = icmp eq i32 %13, 0
br i1 %14, label %21, label %15
15: ; preds = %9
%16 = load i32, ptr @AXE_TXCSUM_IP, align 4, !tbaa !6
%17 = load i32, ptr @AXE_TXCSUM_TCP, align 4, !tbaa !6
%18 = or i32 %17, %16
%19 = load i32, ptr @AXE_TXCSUM_UDP, align 4, !tbaa !6
%20 = or i32 %18, %19
br label %21
21: ; preds = %15, %9
%22 = phi i32 [ %20, %15 ], [ 0, %9 ]
%23 = load i32, ptr @AXE_772B_CMD_WRITE_TXCSUM, align 4, !tbaa !6
%24 = tail call i32 @axe_cmd(ptr noundef nonnull %2, i32 noundef %23, i32 noundef 0, i32 noundef %22, ptr noundef null) #2
%25 = load i32, ptr %10, align 4, !tbaa !12
%26 = load i32, ptr @IFCAP_RXCSUM, align 4, !tbaa !6
%27 = and i32 %26, %25
%28 = icmp eq i32 %27, 0
br i1 %28, label %41, label %29
29: ; preds = %21
%30 = load i32, ptr @AXE_RXCSUM_IP, align 4, !tbaa !6
%31 = load i32, ptr @AXE_RXCSUM_IPVE, align 4, !tbaa !6
%32 = or i32 %31, %30
%33 = load i32, ptr @AXE_RXCSUM_TCP, align 4, !tbaa !6
%34 = or i32 %32, %33
%35 = load i32, ptr @AXE_RXCSUM_UDP, align 4, !tbaa !6
%36 = or i32 %34, %35
%37 = load i32, ptr @AXE_RXCSUM_ICMP, align 4, !tbaa !6
%38 = or i32 %36, %37
%39 = load i32, ptr @AXE_RXCSUM_IGMP, align 4, !tbaa !6
%40 = or i32 %38, %39
br label %41
41: ; preds = %29, %21
%42 = phi i32 [ %40, %29 ], [ 0, %21 ]
%43 = load i32, ptr @AXE_772B_CMD_WRITE_RXCSUM, align 4, !tbaa !6
%44 = tail call i32 @axe_cmd(ptr noundef nonnull %2, i32 noundef %43, i32 noundef 0, i32 noundef %42, ptr noundef null) #2
br label %45
45: ; preds = %41, %1
ret void
}
declare ptr @uether_getsc(ptr noundef) local_unnamed_addr #1
declare i32 @AXE_LOCK_ASSERT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @uether_getifp(ptr noundef) local_unnamed_addr #1
declare i32 @axe_cmd(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"axe_softc", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"ifnet", !7, i64 0}
|
freebsd_sys_dev_usb_net_extr_if_axe.c_axe_csum_cfg
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v8_0.c_gfx_v8_0_read_wave_data.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v8_0.c_gfx_v8_0_read_wave_data.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ixSQ_WAVE_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_PC_LO = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_PC_HI = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_EXEC_LO = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_EXEC_HI = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_HW_ID = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_INST_DW0 = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_INST_DW1 = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_GPR_ALLOC = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_LDS_ALLOC = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_TRAPSTS = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_IB_STS = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_TBA_LO = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_TBA_HI = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_TMA_LO = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_TMA_HI = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_IB_DBG0 = dso_local local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_M0 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @gfx_v8_0_read_wave_data], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @gfx_v8_0_read_wave_data(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr nocapture noundef writeonly %3, ptr nocapture noundef %4) #0 {
%6 = load i32, ptr %4, align 4, !tbaa !5
%7 = add nsw i32 %6, 1
store i32 %7, ptr %4, align 4, !tbaa !5
%8 = sext i32 %6 to i64
%9 = getelementptr inbounds i64, ptr %3, i64 %8
store i64 0, ptr %9, align 8, !tbaa !9
%10 = load i32, ptr @ixSQ_WAVE_STATUS, align 4, !tbaa !5
%11 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %10) #2
%12 = load i32, ptr %4, align 4, !tbaa !5
%13 = add nsw i32 %12, 1
store i32 %13, ptr %4, align 4, !tbaa !5
%14 = sext i32 %12 to i64
%15 = getelementptr inbounds i64, ptr %3, i64 %14
store i64 %11, ptr %15, align 8, !tbaa !9
%16 = load i32, ptr @ixSQ_WAVE_PC_LO, align 4, !tbaa !5
%17 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %16) #2
%18 = load i32, ptr %4, align 4, !tbaa !5
%19 = add nsw i32 %18, 1
store i32 %19, ptr %4, align 4, !tbaa !5
%20 = sext i32 %18 to i64
%21 = getelementptr inbounds i64, ptr %3, i64 %20
store i64 %17, ptr %21, align 8, !tbaa !9
%22 = load i32, ptr @ixSQ_WAVE_PC_HI, align 4, !tbaa !5
%23 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %22) #2
%24 = load i32, ptr %4, align 4, !tbaa !5
%25 = add nsw i32 %24, 1
store i32 %25, ptr %4, align 4, !tbaa !5
%26 = sext i32 %24 to i64
%27 = getelementptr inbounds i64, ptr %3, i64 %26
store i64 %23, ptr %27, align 8, !tbaa !9
%28 = load i32, ptr @ixSQ_WAVE_EXEC_LO, align 4, !tbaa !5
%29 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %28) #2
%30 = load i32, ptr %4, align 4, !tbaa !5
%31 = add nsw i32 %30, 1
store i32 %31, ptr %4, align 4, !tbaa !5
%32 = sext i32 %30 to i64
%33 = getelementptr inbounds i64, ptr %3, i64 %32
store i64 %29, ptr %33, align 8, !tbaa !9
%34 = load i32, ptr @ixSQ_WAVE_EXEC_HI, align 4, !tbaa !5
%35 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %34) #2
%36 = load i32, ptr %4, align 4, !tbaa !5
%37 = add nsw i32 %36, 1
store i32 %37, ptr %4, align 4, !tbaa !5
%38 = sext i32 %36 to i64
%39 = getelementptr inbounds i64, ptr %3, i64 %38
store i64 %35, ptr %39, align 8, !tbaa !9
%40 = load i32, ptr @ixSQ_WAVE_HW_ID, align 4, !tbaa !5
%41 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %40) #2
%42 = load i32, ptr %4, align 4, !tbaa !5
%43 = add nsw i32 %42, 1
store i32 %43, ptr %4, align 4, !tbaa !5
%44 = sext i32 %42 to i64
%45 = getelementptr inbounds i64, ptr %3, i64 %44
store i64 %41, ptr %45, align 8, !tbaa !9
%46 = load i32, ptr @ixSQ_WAVE_INST_DW0, align 4, !tbaa !5
%47 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %46) #2
%48 = load i32, ptr %4, align 4, !tbaa !5
%49 = add nsw i32 %48, 1
store i32 %49, ptr %4, align 4, !tbaa !5
%50 = sext i32 %48 to i64
%51 = getelementptr inbounds i64, ptr %3, i64 %50
store i64 %47, ptr %51, align 8, !tbaa !9
%52 = load i32, ptr @ixSQ_WAVE_INST_DW1, align 4, !tbaa !5
%53 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %52) #2
%54 = load i32, ptr %4, align 4, !tbaa !5
%55 = add nsw i32 %54, 1
store i32 %55, ptr %4, align 4, !tbaa !5
%56 = sext i32 %54 to i64
%57 = getelementptr inbounds i64, ptr %3, i64 %56
store i64 %53, ptr %57, align 8, !tbaa !9
%58 = load i32, ptr @ixSQ_WAVE_GPR_ALLOC, align 4, !tbaa !5
%59 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %58) #2
%60 = load i32, ptr %4, align 4, !tbaa !5
%61 = add nsw i32 %60, 1
store i32 %61, ptr %4, align 4, !tbaa !5
%62 = sext i32 %60 to i64
%63 = getelementptr inbounds i64, ptr %3, i64 %62
store i64 %59, ptr %63, align 8, !tbaa !9
%64 = load i32, ptr @ixSQ_WAVE_LDS_ALLOC, align 4, !tbaa !5
%65 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %64) #2
%66 = load i32, ptr %4, align 4, !tbaa !5
%67 = add nsw i32 %66, 1
store i32 %67, ptr %4, align 4, !tbaa !5
%68 = sext i32 %66 to i64
%69 = getelementptr inbounds i64, ptr %3, i64 %68
store i64 %65, ptr %69, align 8, !tbaa !9
%70 = load i32, ptr @ixSQ_WAVE_TRAPSTS, align 4, !tbaa !5
%71 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %70) #2
%72 = load i32, ptr %4, align 4, !tbaa !5
%73 = add nsw i32 %72, 1
store i32 %73, ptr %4, align 4, !tbaa !5
%74 = sext i32 %72 to i64
%75 = getelementptr inbounds i64, ptr %3, i64 %74
store i64 %71, ptr %75, align 8, !tbaa !9
%76 = load i32, ptr @ixSQ_WAVE_IB_STS, align 4, !tbaa !5
%77 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %76) #2
%78 = load i32, ptr %4, align 4, !tbaa !5
%79 = add nsw i32 %78, 1
store i32 %79, ptr %4, align 4, !tbaa !5
%80 = sext i32 %78 to i64
%81 = getelementptr inbounds i64, ptr %3, i64 %80
store i64 %77, ptr %81, align 8, !tbaa !9
%82 = load i32, ptr @ixSQ_WAVE_TBA_LO, align 4, !tbaa !5
%83 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %82) #2
%84 = load i32, ptr %4, align 4, !tbaa !5
%85 = add nsw i32 %84, 1
store i32 %85, ptr %4, align 4, !tbaa !5
%86 = sext i32 %84 to i64
%87 = getelementptr inbounds i64, ptr %3, i64 %86
store i64 %83, ptr %87, align 8, !tbaa !9
%88 = load i32, ptr @ixSQ_WAVE_TBA_HI, align 4, !tbaa !5
%89 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %88) #2
%90 = load i32, ptr %4, align 4, !tbaa !5
%91 = add nsw i32 %90, 1
store i32 %91, ptr %4, align 4, !tbaa !5
%92 = sext i32 %90 to i64
%93 = getelementptr inbounds i64, ptr %3, i64 %92
store i64 %89, ptr %93, align 8, !tbaa !9
%94 = load i32, ptr @ixSQ_WAVE_TMA_LO, align 4, !tbaa !5
%95 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %94) #2
%96 = load i32, ptr %4, align 4, !tbaa !5
%97 = add nsw i32 %96, 1
store i32 %97, ptr %4, align 4, !tbaa !5
%98 = sext i32 %96 to i64
%99 = getelementptr inbounds i64, ptr %3, i64 %98
store i64 %95, ptr %99, align 8, !tbaa !9
%100 = load i32, ptr @ixSQ_WAVE_TMA_HI, align 4, !tbaa !5
%101 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %100) #2
%102 = load i32, ptr %4, align 4, !tbaa !5
%103 = add nsw i32 %102, 1
store i32 %103, ptr %4, align 4, !tbaa !5
%104 = sext i32 %102 to i64
%105 = getelementptr inbounds i64, ptr %3, i64 %104
store i64 %101, ptr %105, align 8, !tbaa !9
%106 = load i32, ptr @ixSQ_WAVE_IB_DBG0, align 4, !tbaa !5
%107 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %106) #2
%108 = load i32, ptr %4, align 4, !tbaa !5
%109 = add nsw i32 %108, 1
store i32 %109, ptr %4, align 4, !tbaa !5
%110 = sext i32 %108 to i64
%111 = getelementptr inbounds i64, ptr %3, i64 %110
store i64 %107, ptr %111, align 8, !tbaa !9
%112 = load i32, ptr @ixSQ_WAVE_M0, align 4, !tbaa !5
%113 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %112) #2
%114 = load i32, ptr %4, align 4, !tbaa !5
%115 = add nsw i32 %114, 1
store i32 %115, ptr %4, align 4, !tbaa !5
%116 = sext i32 %114 to i64
%117 = getelementptr inbounds i64, ptr %3, i64 %116
store i64 %113, ptr %117, align 8, !tbaa !9
ret void
}
declare i64 @wave_read_ind(ptr noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v8_0.c_gfx_v8_0_read_wave_data.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v8_0.c_gfx_v8_0_read_wave_data.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ixSQ_WAVE_STATUS = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_PC_LO = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_PC_HI = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_EXEC_LO = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_EXEC_HI = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_HW_ID = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_INST_DW0 = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_INST_DW1 = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_GPR_ALLOC = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_LDS_ALLOC = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_TRAPSTS = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_IB_STS = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_TBA_LO = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_TBA_HI = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_TMA_LO = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_TMA_HI = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_IB_DBG0 = common local_unnamed_addr global i32 0, align 4
@ixSQ_WAVE_M0 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @gfx_v8_0_read_wave_data], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @gfx_v8_0_read_wave_data(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr nocapture noundef writeonly %3, ptr nocapture noundef %4) #0 {
%6 = load i32, ptr %4, align 4, !tbaa !6
%7 = add nsw i32 %6, 1
store i32 %7, ptr %4, align 4, !tbaa !6
%8 = sext i32 %6 to i64
%9 = getelementptr inbounds i64, ptr %3, i64 %8
store i64 0, ptr %9, align 8, !tbaa !10
%10 = load i32, ptr @ixSQ_WAVE_STATUS, align 4, !tbaa !6
%11 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %10) #2
%12 = load i32, ptr %4, align 4, !tbaa !6
%13 = add nsw i32 %12, 1
store i32 %13, ptr %4, align 4, !tbaa !6
%14 = sext i32 %12 to i64
%15 = getelementptr inbounds i64, ptr %3, i64 %14
store i64 %11, ptr %15, align 8, !tbaa !10
%16 = load i32, ptr @ixSQ_WAVE_PC_LO, align 4, !tbaa !6
%17 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %16) #2
%18 = load i32, ptr %4, align 4, !tbaa !6
%19 = add nsw i32 %18, 1
store i32 %19, ptr %4, align 4, !tbaa !6
%20 = sext i32 %18 to i64
%21 = getelementptr inbounds i64, ptr %3, i64 %20
store i64 %17, ptr %21, align 8, !tbaa !10
%22 = load i32, ptr @ixSQ_WAVE_PC_HI, align 4, !tbaa !6
%23 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %22) #2
%24 = load i32, ptr %4, align 4, !tbaa !6
%25 = add nsw i32 %24, 1
store i32 %25, ptr %4, align 4, !tbaa !6
%26 = sext i32 %24 to i64
%27 = getelementptr inbounds i64, ptr %3, i64 %26
store i64 %23, ptr %27, align 8, !tbaa !10
%28 = load i32, ptr @ixSQ_WAVE_EXEC_LO, align 4, !tbaa !6
%29 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %28) #2
%30 = load i32, ptr %4, align 4, !tbaa !6
%31 = add nsw i32 %30, 1
store i32 %31, ptr %4, align 4, !tbaa !6
%32 = sext i32 %30 to i64
%33 = getelementptr inbounds i64, ptr %3, i64 %32
store i64 %29, ptr %33, align 8, !tbaa !10
%34 = load i32, ptr @ixSQ_WAVE_EXEC_HI, align 4, !tbaa !6
%35 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %34) #2
%36 = load i32, ptr %4, align 4, !tbaa !6
%37 = add nsw i32 %36, 1
store i32 %37, ptr %4, align 4, !tbaa !6
%38 = sext i32 %36 to i64
%39 = getelementptr inbounds i64, ptr %3, i64 %38
store i64 %35, ptr %39, align 8, !tbaa !10
%40 = load i32, ptr @ixSQ_WAVE_HW_ID, align 4, !tbaa !6
%41 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %40) #2
%42 = load i32, ptr %4, align 4, !tbaa !6
%43 = add nsw i32 %42, 1
store i32 %43, ptr %4, align 4, !tbaa !6
%44 = sext i32 %42 to i64
%45 = getelementptr inbounds i64, ptr %3, i64 %44
store i64 %41, ptr %45, align 8, !tbaa !10
%46 = load i32, ptr @ixSQ_WAVE_INST_DW0, align 4, !tbaa !6
%47 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %46) #2
%48 = load i32, ptr %4, align 4, !tbaa !6
%49 = add nsw i32 %48, 1
store i32 %49, ptr %4, align 4, !tbaa !6
%50 = sext i32 %48 to i64
%51 = getelementptr inbounds i64, ptr %3, i64 %50
store i64 %47, ptr %51, align 8, !tbaa !10
%52 = load i32, ptr @ixSQ_WAVE_INST_DW1, align 4, !tbaa !6
%53 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %52) #2
%54 = load i32, ptr %4, align 4, !tbaa !6
%55 = add nsw i32 %54, 1
store i32 %55, ptr %4, align 4, !tbaa !6
%56 = sext i32 %54 to i64
%57 = getelementptr inbounds i64, ptr %3, i64 %56
store i64 %53, ptr %57, align 8, !tbaa !10
%58 = load i32, ptr @ixSQ_WAVE_GPR_ALLOC, align 4, !tbaa !6
%59 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %58) #2
%60 = load i32, ptr %4, align 4, !tbaa !6
%61 = add nsw i32 %60, 1
store i32 %61, ptr %4, align 4, !tbaa !6
%62 = sext i32 %60 to i64
%63 = getelementptr inbounds i64, ptr %3, i64 %62
store i64 %59, ptr %63, align 8, !tbaa !10
%64 = load i32, ptr @ixSQ_WAVE_LDS_ALLOC, align 4, !tbaa !6
%65 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %64) #2
%66 = load i32, ptr %4, align 4, !tbaa !6
%67 = add nsw i32 %66, 1
store i32 %67, ptr %4, align 4, !tbaa !6
%68 = sext i32 %66 to i64
%69 = getelementptr inbounds i64, ptr %3, i64 %68
store i64 %65, ptr %69, align 8, !tbaa !10
%70 = load i32, ptr @ixSQ_WAVE_TRAPSTS, align 4, !tbaa !6
%71 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %70) #2
%72 = load i32, ptr %4, align 4, !tbaa !6
%73 = add nsw i32 %72, 1
store i32 %73, ptr %4, align 4, !tbaa !6
%74 = sext i32 %72 to i64
%75 = getelementptr inbounds i64, ptr %3, i64 %74
store i64 %71, ptr %75, align 8, !tbaa !10
%76 = load i32, ptr @ixSQ_WAVE_IB_STS, align 4, !tbaa !6
%77 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %76) #2
%78 = load i32, ptr %4, align 4, !tbaa !6
%79 = add nsw i32 %78, 1
store i32 %79, ptr %4, align 4, !tbaa !6
%80 = sext i32 %78 to i64
%81 = getelementptr inbounds i64, ptr %3, i64 %80
store i64 %77, ptr %81, align 8, !tbaa !10
%82 = load i32, ptr @ixSQ_WAVE_TBA_LO, align 4, !tbaa !6
%83 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %82) #2
%84 = load i32, ptr %4, align 4, !tbaa !6
%85 = add nsw i32 %84, 1
store i32 %85, ptr %4, align 4, !tbaa !6
%86 = sext i32 %84 to i64
%87 = getelementptr inbounds i64, ptr %3, i64 %86
store i64 %83, ptr %87, align 8, !tbaa !10
%88 = load i32, ptr @ixSQ_WAVE_TBA_HI, align 4, !tbaa !6
%89 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %88) #2
%90 = load i32, ptr %4, align 4, !tbaa !6
%91 = add nsw i32 %90, 1
store i32 %91, ptr %4, align 4, !tbaa !6
%92 = sext i32 %90 to i64
%93 = getelementptr inbounds i64, ptr %3, i64 %92
store i64 %89, ptr %93, align 8, !tbaa !10
%94 = load i32, ptr @ixSQ_WAVE_TMA_LO, align 4, !tbaa !6
%95 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %94) #2
%96 = load i32, ptr %4, align 4, !tbaa !6
%97 = add nsw i32 %96, 1
store i32 %97, ptr %4, align 4, !tbaa !6
%98 = sext i32 %96 to i64
%99 = getelementptr inbounds i64, ptr %3, i64 %98
store i64 %95, ptr %99, align 8, !tbaa !10
%100 = load i32, ptr @ixSQ_WAVE_TMA_HI, align 4, !tbaa !6
%101 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %100) #2
%102 = load i32, ptr %4, align 4, !tbaa !6
%103 = add nsw i32 %102, 1
store i32 %103, ptr %4, align 4, !tbaa !6
%104 = sext i32 %102 to i64
%105 = getelementptr inbounds i64, ptr %3, i64 %104
store i64 %101, ptr %105, align 8, !tbaa !10
%106 = load i32, ptr @ixSQ_WAVE_IB_DBG0, align 4, !tbaa !6
%107 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %106) #2
%108 = load i32, ptr %4, align 4, !tbaa !6
%109 = add nsw i32 %108, 1
store i32 %109, ptr %4, align 4, !tbaa !6
%110 = sext i32 %108 to i64
%111 = getelementptr inbounds i64, ptr %3, i64 %110
store i64 %107, ptr %111, align 8, !tbaa !10
%112 = load i32, ptr @ixSQ_WAVE_M0, align 4, !tbaa !6
%113 = tail call i64 @wave_read_ind(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %112) #2
%114 = load i32, ptr %4, align 4, !tbaa !6
%115 = add nsw i32 %114, 1
store i32 %115, ptr %4, align 4, !tbaa !6
%116 = sext i32 %114 to i64
%117 = getelementptr inbounds i64, ptr %3, i64 %116
store i64 %113, ptr %117, align 8, !tbaa !10
ret void
}
declare i64 @wave_read_ind(ptr noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
|
linux_drivers_gpu_drm_amd_amdgpu_extr_gfx_v8_0.c_gfx_v8_0_read_wave_data
|
; ModuleID = 'AnghaBench/kphp-kdb/text/extr_text-data.c_tree_ext_insert.c'
source_filename = "AnghaBench/kphp-kdb/text/extr_text-data.c_tree_ext_insert.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { i32, i32, ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @tree_ext_insert], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @tree_ext_insert(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = load i32, ptr %0, align 8, !tbaa !5
%6 = icmp sgt i32 %5, %2
br i1 %6, label %9, label %19
7: ; preds = %19, %9
%8 = phi ptr [ %0, %9 ], [ %20, %19 ]
ret ptr %8
9: ; preds = %4
%10 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 1
%11 = load i32, ptr %10, align 4, !tbaa !11
%12 = icmp sgt i32 %11, %1
%13 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 2
%14 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 3
%15 = select i1 %12, ptr %14, ptr %13
%16 = load ptr, ptr %15, align 8, !tbaa !12
%17 = tail call ptr @tree_ext_insert(ptr noundef %16, i32 noundef %1, i32 noundef %2, i32 noundef %3)
store ptr %17, ptr %15, align 8, !tbaa !12
%18 = tail call i32 @tree_ext_relax(ptr noundef nonnull %0) #2
br label %7
19: ; preds = %4
%20 = tail call ptr @new_tree_ext_node(i32 noundef %1, i32 noundef %2, i32 noundef %3) #2
%21 = getelementptr inbounds %struct.TYPE_9__, ptr %20, i64 0, i32 3
%22 = getelementptr inbounds %struct.TYPE_9__, ptr %20, i64 0, i32 2
%23 = tail call i32 @tree_ext_split(ptr noundef nonnull %21, ptr noundef nonnull %22, ptr noundef nonnull %0, i32 noundef %1) #2
%24 = tail call i32 @tree_ext_relax(ptr noundef %20) #2
br label %7
}
declare i32 @tree_ext_relax(ptr noundef) local_unnamed_addr #1
declare ptr @new_tree_ext_node(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tree_ext_split(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_9__", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!10, !10, i64 0}
|
; ModuleID = 'AnghaBench/kphp-kdb/text/extr_text-data.c_tree_ext_insert.c'
source_filename = "AnghaBench/kphp-kdb/text/extr_text-data.c_tree_ext_insert.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @tree_ext_insert], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @tree_ext_insert(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = load i32, ptr %0, align 8, !tbaa !6
%6 = icmp sgt i32 %5, %2
br i1 %6, label %9, label %18
7: ; preds = %18, %9
%8 = phi ptr [ %0, %9 ], [ %19, %18 ]
ret ptr %8
9: ; preds = %4
%10 = getelementptr inbounds i8, ptr %0, i64 4
%11 = load i32, ptr %10, align 4, !tbaa !12
%12 = icmp sgt i32 %11, %1
%13 = select i1 %12, i64 16, i64 8
%14 = getelementptr inbounds i8, ptr %0, i64 %13
%15 = load ptr, ptr %14, align 8, !tbaa !13
%16 = tail call ptr @tree_ext_insert(ptr noundef %15, i32 noundef %1, i32 noundef %2, i32 noundef %3)
store ptr %16, ptr %14, align 8, !tbaa !13
%17 = tail call i32 @tree_ext_relax(ptr noundef nonnull %0) #2
br label %7
18: ; preds = %4
%19 = tail call ptr @new_tree_ext_node(i32 noundef %1, i32 noundef %2, i32 noundef %3) #2
%20 = getelementptr inbounds i8, ptr %19, i64 16
%21 = getelementptr inbounds i8, ptr %19, i64 8
%22 = tail call i32 @tree_ext_split(ptr noundef nonnull %20, ptr noundef nonnull %21, ptr noundef nonnull %0, i32 noundef %1) #2
%23 = tail call i32 @tree_ext_relax(ptr noundef %19) #2
br label %7
}
declare i32 @tree_ext_relax(ptr noundef) local_unnamed_addr #1
declare ptr @new_tree_ext_node(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tree_ext_split(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_9__", !8, i64 0, !8, i64 4, !11, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!11, !11, i64 0}
|
kphp-kdb_text_extr_text-data.c_tree_ext_insert
|
; ModuleID = 'AnghaBench/libevent/test/extr_regress_http.c_http_negative_content_length_test.c'
source_filename = "AnghaBench/libevent/test/extr_regress_http.c_http_negative_content_length_test.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@test_ok = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [10 x i8] c"127.0.0.1\00", align 1
@http_request_bad = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [11 x i8] c"X-Negative\00", align 1
@.str.2 = private unnamed_addr constant [9 x i8] c"makeitso\00", align 1
@EVHTTP_REQ_GET = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [6 x i8] c"/test\00", align 1
@.str.4 = private unnamed_addr constant [22 x i8] c"Couldn't make request\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @http_negative_content_length_test], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @http_negative_content_length_test(ptr nocapture noundef readonly %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !5
%3 = load i32, ptr %0, align 4, !tbaa !9
%4 = call ptr @http_setup(ptr noundef nonnull %2, i32 noundef %3, i32 noundef 0) #3
store i64 0, ptr @test_ok, align 8, !tbaa !11
%5 = load i32, ptr %0, align 4, !tbaa !9
%6 = load i32, ptr %2, align 4, !tbaa !5
%7 = call ptr @evhttp_connection_base_new(i32 noundef %5, ptr noundef null, ptr noundef nonnull @.str, i32 noundef %6) #3
%8 = call i32 @tt_assert(ptr noundef %7) #3
%9 = load i32, ptr @http_request_bad, align 4, !tbaa !5
%10 = load i32, ptr %0, align 4, !tbaa !9
%11 = call ptr @evhttp_request_new(i32 noundef %9, i32 noundef %10) #3
%12 = call i32 @evhttp_request_get_output_headers(ptr noundef %11) #3
%13 = call i32 @evhttp_add_header(i32 noundef %12, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2) #3
%14 = load i32, ptr @EVHTTP_REQ_GET, align 4, !tbaa !5
%15 = call i32 @evhttp_make_request(ptr noundef %7, ptr noundef %11, i32 noundef %14, ptr noundef nonnull @.str.3) #3
%16 = icmp eq i32 %15, -1
br i1 %16, label %17, label %19
17: ; preds = %1
%18 = call i32 @tt_abort_msg(ptr noundef nonnull @.str.4) #3
br label %19
19: ; preds = %17, %1
%20 = load i32, ptr %0, align 4, !tbaa !9
%21 = call i32 @event_base_dispatch(i32 noundef %20) #3
%22 = icmp eq ptr %7, null
br i1 %22, label %25, label %23
23: ; preds = %19
%24 = call i32 @evhttp_connection_free(ptr noundef nonnull %7) #3
br label %25
25: ; preds = %23, %19
%26 = icmp eq ptr %4, null
br i1 %26, label %29, label %27
27: ; preds = %25
%28 = call i32 @evhttp_free(ptr noundef nonnull %4) #3
br label %29
29: ; preds = %27, %25
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @http_setup(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @evhttp_connection_base_new(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @tt_assert(ptr noundef) local_unnamed_addr #2
declare ptr @evhttp_request_new(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @evhttp_add_header(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @evhttp_request_get_output_headers(ptr noundef) local_unnamed_addr #2
declare i32 @evhttp_make_request(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @tt_abort_msg(ptr noundef) local_unnamed_addr #2
declare i32 @event_base_dispatch(i32 noundef) local_unnamed_addr #2
declare i32 @evhttp_connection_free(ptr noundef) local_unnamed_addr #2
declare i32 @evhttp_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"basic_test_data", !6, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/libevent/test/extr_regress_http.c_http_negative_content_length_test.c'
source_filename = "AnghaBench/libevent/test/extr_regress_http.c_http_negative_content_length_test.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@test_ok = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [10 x i8] c"127.0.0.1\00", align 1
@http_request_bad = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [11 x i8] c"X-Negative\00", align 1
@.str.2 = private unnamed_addr constant [9 x i8] c"makeitso\00", align 1
@EVHTTP_REQ_GET = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [6 x i8] c"/test\00", align 1
@.str.4 = private unnamed_addr constant [22 x i8] c"Couldn't make request\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @http_negative_content_length_test], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @http_negative_content_length_test(ptr nocapture noundef readonly %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !6
%3 = load i32, ptr %0, align 4, !tbaa !10
%4 = call ptr @http_setup(ptr noundef nonnull %2, i32 noundef %3, i32 noundef 0) #3
store i64 0, ptr @test_ok, align 8, !tbaa !12
%5 = load i32, ptr %0, align 4, !tbaa !10
%6 = load i32, ptr %2, align 4, !tbaa !6
%7 = call ptr @evhttp_connection_base_new(i32 noundef %5, ptr noundef null, ptr noundef nonnull @.str, i32 noundef %6) #3
%8 = call i32 @tt_assert(ptr noundef %7) #3
%9 = load i32, ptr @http_request_bad, align 4, !tbaa !6
%10 = load i32, ptr %0, align 4, !tbaa !10
%11 = call ptr @evhttp_request_new(i32 noundef %9, i32 noundef %10) #3
%12 = call i32 @evhttp_request_get_output_headers(ptr noundef %11) #3
%13 = call i32 @evhttp_add_header(i32 noundef %12, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2) #3
%14 = load i32, ptr @EVHTTP_REQ_GET, align 4, !tbaa !6
%15 = call i32 @evhttp_make_request(ptr noundef %7, ptr noundef %11, i32 noundef %14, ptr noundef nonnull @.str.3) #3
%16 = icmp eq i32 %15, -1
br i1 %16, label %17, label %19
17: ; preds = %1
%18 = call i32 @tt_abort_msg(ptr noundef nonnull @.str.4) #3
br label %19
19: ; preds = %17, %1
%20 = load i32, ptr %0, align 4, !tbaa !10
%21 = call i32 @event_base_dispatch(i32 noundef %20) #3
%22 = icmp eq ptr %7, null
br i1 %22, label %25, label %23
23: ; preds = %19
%24 = call i32 @evhttp_connection_free(ptr noundef nonnull %7) #3
br label %25
25: ; preds = %23, %19
%26 = icmp eq ptr %4, null
br i1 %26, label %29, label %27
27: ; preds = %25
%28 = call i32 @evhttp_free(ptr noundef nonnull %4) #3
br label %29
29: ; preds = %27, %25
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @http_setup(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @evhttp_connection_base_new(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @tt_assert(ptr noundef) local_unnamed_addr #2
declare ptr @evhttp_request_new(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @evhttp_add_header(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @evhttp_request_get_output_headers(ptr noundef) local_unnamed_addr #2
declare i32 @evhttp_make_request(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @tt_abort_msg(ptr noundef) local_unnamed_addr #2
declare i32 @event_base_dispatch(i32 noundef) local_unnamed_addr #2
declare i32 @evhttp_connection_free(ptr noundef) local_unnamed_addr #2
declare i32 @evhttp_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"basic_test_data", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
|
libevent_test_extr_regress_http.c_http_negative_content_length_test
|
; ModuleID = 'AnghaBench/libsodium/src/libsodium/sodium/extr_runtime.c_sodium_runtime_has_sse41.c'
source_filename = "AnghaBench/libsodium/src/libsodium/sodium/extr_runtime.c_sodium_runtime_has_sse41.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
@_cpu_features = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local i32 @sodium_runtime_has_sse41() local_unnamed_addr #0 {
%1 = load i32, ptr @_cpu_features, align 4, !tbaa !5
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/libsodium/src/libsodium/sodium/extr_runtime.c_sodium_runtime_has_sse41.c'
source_filename = "AnghaBench/libsodium/src/libsodium/sodium/extr_runtime.c_sodium_runtime_has_sse41.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@_cpu_features = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i32 @sodium_runtime_has_sse41() local_unnamed_addr #0 {
%1 = load i32, ptr @_cpu_features, align 4, !tbaa !6
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
libsodium_src_libsodium_sodium_extr_runtime.c_sodium_runtime_has_sse41
|
; ModuleID = 'AnghaBench/linux/fs/extr_io_uring.c_io_uring_release.c'
source_filename = "AnghaBench/linux/fs/extr_io_uring.c_io_uring_release.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @io_uring_release], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @io_uring_release(ptr nocapture readnone %0, ptr nocapture noundef %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !5
store ptr null, ptr %1, align 8, !tbaa !5
%4 = tail call i32 @io_ring_ctx_wait_and_kill(ptr noundef %3) #2
ret i32 0
}
declare i32 @io_ring_ctx_wait_and_kill(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"file", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/fs/extr_io_uring.c_io_uring_release.c'
source_filename = "AnghaBench/linux/fs/extr_io_uring.c_io_uring_release.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @io_uring_release], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @io_uring_release(ptr nocapture readnone %0, ptr nocapture noundef %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !6
store ptr null, ptr %1, align 8, !tbaa !6
%4 = tail call i32 @io_ring_ctx_wait_and_kill(ptr noundef %3) #2
ret i32 0
}
declare i32 @io_ring_ctx_wait_and_kill(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"file", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
linux_fs_extr_io_uring.c_io_uring_release
|
; ModuleID = 'AnghaBench/openpilot/phonelibs/json/src/extr_json.c_json_remove_from_parent.c'
source_filename = "AnghaBench/openpilot/phonelibs/json/src/extr_json.c_json_remove_from_parent.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { ptr, ptr, ptr, ptr, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { ptr, ptr }
; Function Attrs: nounwind uwtable
define dso_local void @json_remove_from_parent(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 3
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %18, label %5
5: ; preds = %1
%6 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 2
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = icmp eq ptr %7, null
%9 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !12
%11 = getelementptr inbounds %struct.TYPE_9__, ptr %3, i64 0, i32 4, i32 1
%12 = select i1 %8, ptr %11, ptr %7
store ptr %10, ptr %12, align 8, !tbaa !13
%13 = icmp eq ptr %10, null
%14 = getelementptr inbounds %struct.TYPE_9__, ptr %3, i64 0, i32 4
%15 = select i1 %13, ptr %14, ptr %10
store ptr %7, ptr %15, align 8, !tbaa !13
%16 = load ptr, ptr %0, align 8, !tbaa !14
%17 = tail call i32 @free(ptr noundef %16) #3
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %0, i8 0, i64 32, i1 false)
br label %18
18: ; preds = %5, %1
ret void
}
declare i32 @free(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"TYPE_9__", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !10, i64 32}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_6__", !7, i64 0, !7, i64 8}
!11 = !{!6, !7, i64 16}
!12 = !{!6, !7, i64 8}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/openpilot/phonelibs/json/src/extr_json.c_json_remove_from_parent.c'
source_filename = "AnghaBench/openpilot/phonelibs/json/src/extr_json.c_json_remove_from_parent.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @json_remove_from_parent(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 24
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %18, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 16
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = icmp eq ptr %7, null
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = getelementptr inbounds i8, ptr %3, i64 40
%12 = select i1 %8, ptr %11, ptr %7
store ptr %10, ptr %12, align 8, !tbaa !14
%13 = icmp eq ptr %10, null
%14 = getelementptr inbounds i8, ptr %3, i64 32
%15 = select i1 %13, ptr %14, ptr %10
store ptr %7, ptr %15, align 8, !tbaa !14
%16 = load ptr, ptr %0, align 8, !tbaa !15
%17 = tail call i32 @free(ptr noundef %16) #3
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %0, i8 0, i64 32, i1 false)
br label %18
18: ; preds = %5, %1
ret void
}
declare i32 @free(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 24}
!7 = !{!"TYPE_9__", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !11, i64 32}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_6__", !8, i64 0, !8, i64 8}
!12 = !{!7, !8, i64 16}
!13 = !{!7, !8, i64 8}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !8, i64 0}
|
openpilot_phonelibs_json_src_extr_json.c_json_remove_from_parent
|
; ModuleID = 'AnghaBench/linux/net/ipv6/extr_udp.c_udp_v6_get_port.c'
source_filename = "AnghaBench/linux/net/ipv6/extr_udp.c_udp_v6_get_port.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@in6addr_any = dso_local global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @udp_v6_get_port(ptr noundef %0, i16 noundef zeroext %1) local_unnamed_addr #0 {
%3 = tail call i32 @sock_net(ptr noundef %0) #2
%4 = tail call i32 @ipv6_portaddr_hash(i32 noundef %3, ptr noundef nonnull @in6addr_any, i16 noundef zeroext %1) #2
%5 = tail call i32 @sock_net(ptr noundef %0) #2
%6 = tail call i32 @ipv6_portaddr_hash(i32 noundef %5, ptr noundef %0, i16 noundef zeroext 0) #2
%7 = tail call ptr @udp_sk(ptr noundef %0) #2
store i32 %6, ptr %7, align 4, !tbaa !5
%8 = tail call i32 @udp_lib_get_port(ptr noundef %0, i16 noundef zeroext %1, i32 noundef %4) #2
ret i32 %8
}
declare i32 @ipv6_portaddr_hash(i32 noundef, ptr noundef, i16 noundef zeroext) local_unnamed_addr #1
declare i32 @sock_net(ptr noundef) local_unnamed_addr #1
declare ptr @udp_sk(ptr noundef) local_unnamed_addr #1
declare i32 @udp_lib_get_port(ptr noundef, i16 noundef zeroext, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/net/ipv6/extr_udp.c_udp_v6_get_port.c'
source_filename = "AnghaBench/linux/net/ipv6/extr_udp.c_udp_v6_get_port.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@in6addr_any = common global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @udp_v6_get_port(ptr noundef %0, i16 noundef zeroext %1) local_unnamed_addr #0 {
%3 = tail call i32 @sock_net(ptr noundef %0) #2
%4 = tail call i32 @ipv6_portaddr_hash(i32 noundef %3, ptr noundef nonnull @in6addr_any, i16 noundef zeroext %1) #2
%5 = tail call i32 @sock_net(ptr noundef %0) #2
%6 = tail call i32 @ipv6_portaddr_hash(i32 noundef %5, ptr noundef %0, i16 noundef zeroext 0) #2
%7 = tail call ptr @udp_sk(ptr noundef %0) #2
store i32 %6, ptr %7, align 4, !tbaa !6
%8 = tail call i32 @udp_lib_get_port(ptr noundef %0, i16 noundef zeroext %1, i32 noundef %4) #2
ret i32 %8
}
declare i32 @ipv6_portaddr_hash(i32 noundef, ptr noundef, i16 noundef zeroext) local_unnamed_addr #1
declare i32 @sock_net(ptr noundef) local_unnamed_addr #1
declare ptr @udp_sk(ptr noundef) local_unnamed_addr #1
declare i32 @udp_lib_get_port(ptr noundef, i16 noundef zeroext, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
linux_net_ipv6_extr_udp.c_udp_v6_get_port
|
; ModuleID = 'AnghaBench/linux/mm/extr_memory-failure.c_identify_page_state.c'
source_filename = "AnghaBench/linux/mm/extr_memory-failure.c_identify_page_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.page_state = type { i32, i32 }
@error_states = dso_local local_unnamed_addr global ptr null, align 8
@PG_dirty = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @identify_page_state], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @identify_page_state(i64 noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = load ptr, ptr @error_states, align 8, !tbaa !5
%5 = load i32, ptr %1, align 4, !tbaa !9
br label %6
6: ; preds = %6, %3
%7 = phi ptr [ %4, %3 ], [ %13, %6 ]
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = and i32 %8, %5
%10 = getelementptr inbounds %struct.page_state, ptr %7, i64 0, i32 1
%11 = load i32, ptr %10, align 4, !tbaa !14
%12 = icmp eq i32 %9, %11
%13 = getelementptr inbounds %struct.page_state, ptr %7, i64 1
br i1 %12, label %14, label %6
14: ; preds = %6
%15 = sext i32 %5 to i64
%16 = load i64, ptr @PG_dirty, align 8, !tbaa !15
%17 = shl nuw i64 1, %16
%18 = and i64 %17, %15
%19 = or i64 %18, %2
%20 = icmp eq i32 %8, 0
br i1 %20, label %21, label %31
21: ; preds = %14, %21
%22 = phi ptr [ %30, %21 ], [ %4, %14 ]
%23 = load i32, ptr %22, align 4, !tbaa !12
%24 = sext i32 %23 to i64
%25 = and i64 %19, %24
%26 = getelementptr inbounds %struct.page_state, ptr %22, i64 0, i32 1
%27 = load i32, ptr %26, align 4, !tbaa !14
%28 = sext i32 %27 to i64
%29 = icmp eq i64 %25, %28
%30 = getelementptr inbounds %struct.page_state, ptr %22, i64 1
br i1 %29, label %31, label %21
31: ; preds = %21, %14
%32 = phi ptr [ %7, %14 ], [ %22, %21 ]
%33 = tail call i32 @page_action(ptr noundef nonnull %32, ptr noundef nonnull %1, i64 noundef %0) #2
ret i32 %33
}
declare i32 @page_action(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"page", !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"page_state", !11, i64 0, !11, i64 4}
!14 = !{!13, !11, i64 4}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/mm/extr_memory-failure.c_identify_page_state.c'
source_filename = "AnghaBench/linux/mm/extr_memory-failure.c_identify_page_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@error_states = common local_unnamed_addr global ptr null, align 8
@PG_dirty = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @identify_page_state], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @identify_page_state(i64 noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = load ptr, ptr @error_states, align 8, !tbaa !6
%5 = load i32, ptr %1, align 4, !tbaa !10
br label %6
6: ; preds = %6, %3
%7 = phi ptr [ %4, %3 ], [ %13, %6 ]
%8 = load i32, ptr %7, align 4, !tbaa !13
%9 = and i32 %8, %5
%10 = getelementptr inbounds i8, ptr %7, i64 4
%11 = load i32, ptr %10, align 4, !tbaa !15
%12 = icmp eq i32 %9, %11
%13 = getelementptr inbounds i8, ptr %7, i64 8
br i1 %12, label %14, label %6
14: ; preds = %6
%15 = sext i32 %5 to i64
%16 = load i64, ptr @PG_dirty, align 8, !tbaa !16
%17 = shl nuw i64 1, %16
%18 = and i64 %17, %15
%19 = or i64 %18, %2
%20 = icmp eq i32 %8, 0
br i1 %20, label %21, label %31
21: ; preds = %14, %21
%22 = phi ptr [ %30, %21 ], [ %4, %14 ]
%23 = load i32, ptr %22, align 4, !tbaa !13
%24 = sext i32 %23 to i64
%25 = and i64 %19, %24
%26 = getelementptr inbounds i8, ptr %22, i64 4
%27 = load i32, ptr %26, align 4, !tbaa !15
%28 = sext i32 %27 to i64
%29 = icmp eq i64 %25, %28
%30 = getelementptr inbounds i8, ptr %22, i64 8
br i1 %29, label %31, label %21
31: ; preds = %21, %14
%32 = phi ptr [ %7, %14 ], [ %22, %21 ]
%33 = tail call i32 @page_action(ptr noundef nonnull %32, ptr noundef nonnull %1, i64 noundef %0) #2
ret i32 %33
}
declare i32 @page_action(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"page", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"page_state", !12, i64 0, !12, i64 4}
!15 = !{!14, !12, i64 4}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !8, i64 0}
|
linux_mm_extr_memory-failure.c_identify_page_state
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_l3_1tr6.c_l3_1tr6_alert_req.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_l3_1tr6.c_l3_1tr6_alert_req.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MT_N1_ALERT = dso_local local_unnamed_addr global i32 0, align 4
@PROTO_DIS_N1 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @l3_1tr6_alert_req], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @l3_1tr6_alert_req(ptr noundef %0, i32 %1, ptr nocapture readnone %2) #0 {
%4 = tail call i32 @newl3state(ptr noundef %0, i32 noundef 7) #2
%5 = load i32, ptr @MT_N1_ALERT, align 4, !tbaa !5
%6 = load i32, ptr @PROTO_DIS_N1, align 4, !tbaa !5
%7 = tail call i32 @l3_1TR6_message(ptr noundef %0, i32 noundef %5, i32 noundef %6) #2
ret void
}
declare i32 @newl3state(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @l3_1TR6_message(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_l3_1tr6.c_l3_1tr6_alert_req.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_l3_1tr6.c_l3_1tr6_alert_req.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MT_N1_ALERT = common local_unnamed_addr global i32 0, align 4
@PROTO_DIS_N1 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @l3_1tr6_alert_req], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @l3_1tr6_alert_req(ptr noundef %0, i32 %1, ptr nocapture readnone %2) #0 {
%4 = tail call i32 @newl3state(ptr noundef %0, i32 noundef 7) #2
%5 = load i32, ptr @MT_N1_ALERT, align 4, !tbaa !6
%6 = load i32, ptr @PROTO_DIS_N1, align 4, !tbaa !6
%7 = tail call i32 @l3_1TR6_message(ptr noundef %0, i32 noundef %5, i32 noundef %6) #2
ret void
}
declare i32 @newl3state(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @l3_1TR6_message(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_drivers_isdn_hisax_extr_l3_1tr6.c_l3_1tr6_alert_req
|
; ModuleID = 'AnghaBench/linux/drivers/scsi/smartpqi/extr_smartpqi_init.c_pqi_get_device_id.c'
source_filename = "AnghaBench/linux/drivers/scsi/smartpqi/extr_smartpqi_init.c_pqi_get_device_id.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SCSI_VPD_DEVICE_ID = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@VPD_PAGE = dso_local local_unnamed_addr global i32 0, align 4
@SCSI_VPD_DEVICE_ID_IDX = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @pqi_get_device_id], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pqi_get_device_id(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = load i32, ptr @SCSI_VPD_DEVICE_ID, align 4, !tbaa !5
%6 = tail call i32 @pqi_vpd_page_supported(ptr noundef %0, ptr noundef %1, i32 noundef %5) #3
%7 = icmp eq i32 %6, 0
br i1 %7, label %28, label %8
8: ; preds = %4
%9 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%10 = tail call ptr @kzalloc(i32 noundef 64, i32 noundef %9) #3
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %15
12: ; preds = %8
%13 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%14 = sub nsw i32 0, %13
br label %28
15: ; preds = %8
%16 = load i32, ptr @VPD_PAGE, align 4, !tbaa !5
%17 = load i32, ptr @SCSI_VPD_DEVICE_ID, align 4, !tbaa !5
%18 = or i32 %17, %16
%19 = tail call i32 @pqi_scsi_inquiry(ptr noundef %0, ptr noundef %1, i32 noundef %18, ptr noundef nonnull %10, i32 noundef 64) #3
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %26
21: ; preds = %15
%22 = tail call i32 @llvm.smin.i32(i32 %3, i32 16)
%23 = load i64, ptr @SCSI_VPD_DEVICE_ID_IDX, align 8, !tbaa !9
%24 = getelementptr inbounds i8, ptr %10, i64 %23
%25 = tail call i32 @memcpy(ptr noundef %2, ptr noundef nonnull %24, i32 noundef %22) #3
br label %26
26: ; preds = %21, %15
%27 = tail call i32 @kfree(ptr noundef nonnull %10) #3
br label %28
28: ; preds = %4, %26, %12
%29 = phi i32 [ %19, %26 ], [ %14, %12 ], [ 1, %4 ]
ret i32 %29
}
declare i32 @pqi_vpd_page_supported(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pqi_scsi_inquiry(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/scsi/smartpqi/extr_smartpqi_init.c_pqi_get_device_id.c'
source_filename = "AnghaBench/linux/drivers/scsi/smartpqi/extr_smartpqi_init.c_pqi_get_device_id.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SCSI_VPD_DEVICE_ID = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@VPD_PAGE = common local_unnamed_addr global i32 0, align 4
@SCSI_VPD_DEVICE_ID_IDX = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @pqi_get_device_id], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pqi_get_device_id(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = load i32, ptr @SCSI_VPD_DEVICE_ID, align 4, !tbaa !6
%6 = tail call i32 @pqi_vpd_page_supported(ptr noundef %0, ptr noundef %1, i32 noundef %5) #3
%7 = icmp eq i32 %6, 0
br i1 %7, label %28, label %8
8: ; preds = %4
%9 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%10 = tail call ptr @kzalloc(i32 noundef 64, i32 noundef %9) #3
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %15
12: ; preds = %8
%13 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%14 = sub nsw i32 0, %13
br label %28
15: ; preds = %8
%16 = load i32, ptr @VPD_PAGE, align 4, !tbaa !6
%17 = load i32, ptr @SCSI_VPD_DEVICE_ID, align 4, !tbaa !6
%18 = or i32 %17, %16
%19 = tail call i32 @pqi_scsi_inquiry(ptr noundef %0, ptr noundef %1, i32 noundef %18, ptr noundef nonnull %10, i32 noundef 64) #3
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %26
21: ; preds = %15
%22 = tail call i32 @llvm.smin.i32(i32 %3, i32 16)
%23 = load i64, ptr @SCSI_VPD_DEVICE_ID_IDX, align 8, !tbaa !10
%24 = getelementptr inbounds i8, ptr %10, i64 %23
%25 = tail call i32 @memcpy(ptr noundef %2, ptr noundef nonnull %24, i32 noundef %22) #3
br label %26
26: ; preds = %21, %15
%27 = tail call i32 @kfree(ptr noundef nonnull %10) #3
br label %28
28: ; preds = %4, %26, %12
%29 = phi i32 [ %19, %26 ], [ %14, %12 ], [ 1, %4 ]
ret i32 %29
}
declare i32 @pqi_vpd_page_supported(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pqi_scsi_inquiry(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
|
linux_drivers_scsi_smartpqi_extr_smartpqi_init.c_pqi_get_device_id
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dss.c_dss_probe.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dss.c_dss_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dss_device = type { i64, i64, %struct.TYPE_14__, i32, i32, ptr }
%struct.TYPE_14__ = type { ptr, ptr }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"Failed to set the DMA mask\0A\00", align 1
@dss_soc_devices = dso_local local_unnamed_addr global i32 0, align 4
@dss_of_match = dso_local local_unnamed_addr global i32 0, align 4
@IORESOURCE_MEM = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [4 x i8] c"clk\00", align 1
@dss_debug_dump_clocks = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [4 x i8] c"dss\00", align 1
@dss_dump_regs = dso_local local_unnamed_addr global i32 0, align 4
@dss_add_child_component = dso_local local_unnamed_addr global i32 0, align 4
@dss_component_ops = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dss_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dss_probe(ptr noundef %0) #0 {
%2 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
store ptr null, ptr %2, align 8, !tbaa !5
%3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !9
%4 = tail call ptr @kzalloc(i32 noundef 48, i32 noundef %3) #3
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, ptr @ENOMEM, align 4, !tbaa !9
%8 = sub nsw i32 0, %7
br label %104
9: ; preds = %1
%10 = getelementptr inbounds %struct.dss_device, ptr %4, i64 0, i32 5
store ptr %0, ptr %10, align 8, !tbaa !11
%11 = tail call i32 @platform_set_drvdata(ptr noundef %0, ptr noundef nonnull %4) #3
%12 = tail call i32 @DMA_BIT_MASK(i32 noundef 32) #3
%13 = tail call i32 @dma_set_coherent_mask(ptr noundef %0, i32 noundef %12) #3
%14 = icmp eq i32 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %9
%16 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str) #3
br label %101
17: ; preds = %9
%18 = load i32, ptr @dss_soc_devices, align 4, !tbaa !9
%19 = tail call ptr @soc_device_match(i32 noundef %18) #3
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %24
21: ; preds = %17
%22 = load i32, ptr @dss_of_match, align 4, !tbaa !9
%23 = tail call ptr @of_match_device(i32 noundef %22, ptr noundef %0) #3
br label %24
24: ; preds = %17, %21
%25 = phi ptr [ %23, %21 ], [ %19, %17 ]
%26 = load i32, ptr %25, align 4, !tbaa !9
%27 = getelementptr inbounds %struct.dss_device, ptr %4, i64 0, i32 4
store i32 %26, ptr %27, align 4
%28 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !9
%29 = tail call ptr @platform_get_resource(ptr noundef %0, i32 noundef %28, i32 noundef 0) #3
%30 = tail call i32 @devm_ioremap_resource(ptr noundef %0, ptr noundef %29) #3
%31 = getelementptr inbounds %struct.dss_device, ptr %4, i64 0, i32 3
store i32 %30, ptr %31, align 8, !tbaa !15
%32 = tail call i64 @IS_ERR(i32 noundef %30) #3
%33 = icmp eq i64 %32, 0
br i1 %33, label %37, label %34
34: ; preds = %24
%35 = load i32, ptr %31, align 8, !tbaa !15
%36 = tail call i32 @PTR_ERR(i32 noundef %35) #3
br label %101
37: ; preds = %24
%38 = tail call i32 @dss_get_clocks(ptr noundef nonnull %4) #3
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %101
40: ; preds = %37
%41 = tail call i32 @dss_setup_default_clock(ptr noundef nonnull %4) #3
%42 = icmp eq i32 %41, 0
br i1 %42, label %43, label %98
43: ; preds = %40
%44 = tail call i32 @dss_video_pll_probe(ptr noundef nonnull %4) #3
%45 = icmp eq i32 %44, 0
br i1 %45, label %46, label %98
46: ; preds = %43
%47 = tail call i32 @dss_init_ports(ptr noundef nonnull %4) #3
%48 = icmp eq i32 %47, 0
br i1 %48, label %49, label %86
49: ; preds = %46
%50 = tail call i32 @pm_runtime_enable(ptr noundef %0) #3
%51 = tail call i32 @dss_probe_hardware(ptr noundef nonnull %4) #3
%52 = icmp eq i32 %51, 0
br i1 %52, label %53, label %82
53: ; preds = %49
%54 = tail call i32 @dss_initialize_debugfs(ptr noundef nonnull %4) #3
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %82
56: ; preds = %53
%57 = load i32, ptr @dss_debug_dump_clocks, align 4, !tbaa !9
%58 = tail call ptr @dss_debugfs_create_file(ptr noundef nonnull %4, ptr noundef nonnull @.str.1, i32 noundef %57, ptr noundef nonnull %4) #3
%59 = getelementptr inbounds %struct.dss_device, ptr %4, i64 0, i32 2
%60 = getelementptr inbounds %struct.dss_device, ptr %4, i64 0, i32 2, i32 1
store ptr %58, ptr %60, align 8, !tbaa !16
%61 = load i32, ptr @dss_dump_regs, align 4, !tbaa !9
%62 = tail call ptr @dss_debugfs_create_file(ptr noundef nonnull %4, ptr noundef nonnull @.str.2, i32 noundef %61, ptr noundef nonnull %4) #3
store ptr %62, ptr %59, align 8, !tbaa !17
%63 = load i32, ptr %0, align 4, !tbaa !18
%64 = tail call i32 @of_platform_populate(i32 noundef %63, ptr noundef null, ptr noundef null, ptr noundef nonnull %0) #3
%65 = icmp eq i32 %64, 0
br i1 %65, label %66, label %75
66: ; preds = %56
%67 = tail call i32 @omapdss_gather_components(ptr noundef nonnull %0) #3
%68 = load i32, ptr @dss_add_child_component, align 4, !tbaa !9
%69 = call i32 @device_for_each_child(ptr noundef nonnull %0, ptr noundef nonnull %2, i32 noundef %68) #3
%70 = load ptr, ptr %2, align 8, !tbaa !5
%71 = call i32 @component_master_add_with_match(ptr noundef nonnull %0, ptr noundef nonnull @dss_component_ops, ptr noundef %70) #3
%72 = icmp eq i32 %71, 0
br i1 %72, label %104, label %73
73: ; preds = %66
%74 = call i32 @of_platform_depopulate(ptr noundef nonnull %0) #3
br label %75
75: ; preds = %56, %73
%76 = phi i32 [ %64, %56 ], [ %71, %73 ]
%77 = load ptr, ptr %60, align 8, !tbaa !16
%78 = call i32 @dss_debugfs_remove_file(ptr noundef %77) #3
%79 = load ptr, ptr %59, align 8, !tbaa !17
%80 = call i32 @dss_debugfs_remove_file(ptr noundef %79) #3
%81 = call i32 @dss_uninitialize_debugfs(ptr noundef nonnull %4) #3
br label %82
82: ; preds = %53, %49, %75
%83 = phi i32 [ %51, %49 ], [ %54, %53 ], [ %76, %75 ]
%84 = call i32 @pm_runtime_disable(ptr noundef %0) #3
%85 = call i32 @dss_uninit_ports(ptr noundef nonnull %4) #3
br label %86
86: ; preds = %46, %82
%87 = phi i32 [ %47, %46 ], [ %83, %82 ]
%88 = getelementptr inbounds %struct.dss_device, ptr %4, i64 0, i32 1
%89 = load i64, ptr %88, align 8, !tbaa !21
%90 = icmp eq i64 %89, 0
br i1 %90, label %93, label %91
91: ; preds = %86
%92 = call i32 @dss_video_pll_uninit(i64 noundef %89) #3
br label %93
93: ; preds = %91, %86
%94 = load i64, ptr %4, align 8, !tbaa !22
%95 = icmp eq i64 %94, 0
br i1 %95, label %98, label %96
96: ; preds = %93
%97 = call i32 @dss_video_pll_uninit(i64 noundef %94) #3
br label %98
98: ; preds = %93, %96, %43, %40
%99 = phi i32 [ %41, %40 ], [ %44, %43 ], [ %87, %96 ], [ %87, %93 ]
%100 = call i32 @dss_put_clocks(ptr noundef nonnull %4) #3
br label %101
101: ; preds = %37, %98, %34, %15
%102 = phi i32 [ %13, %15 ], [ %36, %34 ], [ %38, %37 ], [ %99, %98 ]
%103 = call i32 @kfree(ptr noundef nonnull %4) #3
br label %104
104: ; preds = %66, %101, %6
%105 = phi i32 [ %102, %101 ], [ %8, %6 ], [ 0, %66 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %105
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dma_set_coherent_mask(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DMA_BIT_MASK(i32 noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @soc_device_match(i32 noundef) local_unnamed_addr #2
declare ptr @of_match_device(i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @platform_get_resource(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @devm_ioremap_resource(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @IS_ERR(i32 noundef) local_unnamed_addr #2
declare i32 @PTR_ERR(i32 noundef) local_unnamed_addr #2
declare i32 @dss_get_clocks(ptr noundef) local_unnamed_addr #2
declare i32 @dss_setup_default_clock(ptr noundef) local_unnamed_addr #2
declare i32 @dss_video_pll_probe(ptr noundef) local_unnamed_addr #2
declare i32 @dss_init_ports(ptr noundef) local_unnamed_addr #2
declare i32 @pm_runtime_enable(ptr noundef) local_unnamed_addr #2
declare i32 @dss_probe_hardware(ptr noundef) local_unnamed_addr #2
declare i32 @dss_initialize_debugfs(ptr noundef) local_unnamed_addr #2
declare ptr @dss_debugfs_create_file(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @of_platform_populate(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @omapdss_gather_components(ptr noundef) local_unnamed_addr #2
declare i32 @device_for_each_child(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @component_master_add_with_match(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @of_platform_depopulate(ptr noundef) local_unnamed_addr #2
declare i32 @dss_debugfs_remove_file(ptr noundef) local_unnamed_addr #2
declare i32 @dss_uninitialize_debugfs(ptr noundef) local_unnamed_addr #2
declare i32 @pm_runtime_disable(ptr noundef) local_unnamed_addr #2
declare i32 @dss_uninit_ports(ptr noundef) local_unnamed_addr #2
declare i32 @dss_video_pll_uninit(i64 noundef) local_unnamed_addr #2
declare i32 @dss_put_clocks(ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 40}
!12 = !{!"dss_device", !13, i64 0, !13, i64 8, !14, i64 16, !10, i64 32, !10, i64 36, !6, i64 40}
!13 = !{!"long", !7, i64 0}
!14 = !{!"TYPE_14__", !6, i64 0, !6, i64 8}
!15 = !{!12, !10, i64 32}
!16 = !{!12, !6, i64 24}
!17 = !{!12, !6, i64 16}
!18 = !{!19, !10, i64 0}
!19 = !{!"platform_device", !20, i64 0}
!20 = !{!"TYPE_15__", !10, i64 0}
!21 = !{!12, !13, i64 8}
!22 = !{!12, !13, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dss.c_dss_probe.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dss.c_dss_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"Failed to set the DMA mask\0A\00", align 1
@dss_soc_devices = common local_unnamed_addr global i32 0, align 4
@dss_of_match = common local_unnamed_addr global i32 0, align 4
@IORESOURCE_MEM = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [4 x i8] c"clk\00", align 1
@dss_debug_dump_clocks = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [4 x i8] c"dss\00", align 1
@dss_dump_regs = common local_unnamed_addr global i32 0, align 4
@dss_add_child_component = common local_unnamed_addr global i32 0, align 4
@dss_component_ops = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dss_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @dss_probe(ptr noundef %0) #0 {
%2 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
store ptr null, ptr %2, align 8, !tbaa !6
%3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !10
%4 = tail call ptr @kzalloc(i32 noundef 48, i32 noundef %3) #3
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, ptr @ENOMEM, align 4, !tbaa !10
%8 = sub nsw i32 0, %7
br label %104
9: ; preds = %1
%10 = getelementptr inbounds i8, ptr %4, i64 40
store ptr %0, ptr %10, align 8, !tbaa !12
%11 = tail call i32 @platform_set_drvdata(ptr noundef %0, ptr noundef nonnull %4) #3
%12 = tail call i32 @DMA_BIT_MASK(i32 noundef 32) #3
%13 = tail call i32 @dma_set_coherent_mask(ptr noundef %0, i32 noundef %12) #3
%14 = icmp eq i32 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %9
%16 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str) #3
br label %101
17: ; preds = %9
%18 = load i32, ptr @dss_soc_devices, align 4, !tbaa !10
%19 = tail call ptr @soc_device_match(i32 noundef %18) #3
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %24
21: ; preds = %17
%22 = load i32, ptr @dss_of_match, align 4, !tbaa !10
%23 = tail call ptr @of_match_device(i32 noundef %22, ptr noundef %0) #3
br label %24
24: ; preds = %17, %21
%25 = phi ptr [ %23, %21 ], [ %19, %17 ]
%26 = load i32, ptr %25, align 4, !tbaa !10
%27 = getelementptr inbounds i8, ptr %4, i64 36
store i32 %26, ptr %27, align 4
%28 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !10
%29 = tail call ptr @platform_get_resource(ptr noundef %0, i32 noundef %28, i32 noundef 0) #3
%30 = tail call i32 @devm_ioremap_resource(ptr noundef %0, ptr noundef %29) #3
%31 = getelementptr inbounds i8, ptr %4, i64 32
store i32 %30, ptr %31, align 8, !tbaa !16
%32 = tail call i64 @IS_ERR(i32 noundef %30) #3
%33 = icmp eq i64 %32, 0
br i1 %33, label %37, label %34
34: ; preds = %24
%35 = load i32, ptr %31, align 8, !tbaa !16
%36 = tail call i32 @PTR_ERR(i32 noundef %35) #3
br label %101
37: ; preds = %24
%38 = tail call i32 @dss_get_clocks(ptr noundef nonnull %4) #3
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %101
40: ; preds = %37
%41 = tail call i32 @dss_setup_default_clock(ptr noundef nonnull %4) #3
%42 = icmp eq i32 %41, 0
br i1 %42, label %43, label %98
43: ; preds = %40
%44 = tail call i32 @dss_video_pll_probe(ptr noundef nonnull %4) #3
%45 = icmp eq i32 %44, 0
br i1 %45, label %46, label %98
46: ; preds = %43
%47 = tail call i32 @dss_init_ports(ptr noundef nonnull %4) #3
%48 = icmp eq i32 %47, 0
br i1 %48, label %49, label %86
49: ; preds = %46
%50 = tail call i32 @pm_runtime_enable(ptr noundef %0) #3
%51 = tail call i32 @dss_probe_hardware(ptr noundef nonnull %4) #3
%52 = icmp eq i32 %51, 0
br i1 %52, label %53, label %82
53: ; preds = %49
%54 = tail call i32 @dss_initialize_debugfs(ptr noundef nonnull %4) #3
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %82
56: ; preds = %53
%57 = load i32, ptr @dss_debug_dump_clocks, align 4, !tbaa !10
%58 = tail call ptr @dss_debugfs_create_file(ptr noundef nonnull %4, ptr noundef nonnull @.str.1, i32 noundef %57, ptr noundef nonnull %4) #3
%59 = getelementptr inbounds i8, ptr %4, i64 16
%60 = getelementptr inbounds i8, ptr %4, i64 24
store ptr %58, ptr %60, align 8, !tbaa !17
%61 = load i32, ptr @dss_dump_regs, align 4, !tbaa !10
%62 = tail call ptr @dss_debugfs_create_file(ptr noundef nonnull %4, ptr noundef nonnull @.str.2, i32 noundef %61, ptr noundef nonnull %4) #3
store ptr %62, ptr %59, align 8, !tbaa !18
%63 = load i32, ptr %0, align 4, !tbaa !19
%64 = tail call i32 @of_platform_populate(i32 noundef %63, ptr noundef null, ptr noundef null, ptr noundef nonnull %0) #3
%65 = icmp eq i32 %64, 0
br i1 %65, label %66, label %75
66: ; preds = %56
%67 = tail call i32 @omapdss_gather_components(ptr noundef nonnull %0) #3
%68 = load i32, ptr @dss_add_child_component, align 4, !tbaa !10
%69 = call i32 @device_for_each_child(ptr noundef nonnull %0, ptr noundef nonnull %2, i32 noundef %68) #3
%70 = load ptr, ptr %2, align 8, !tbaa !6
%71 = call i32 @component_master_add_with_match(ptr noundef nonnull %0, ptr noundef nonnull @dss_component_ops, ptr noundef %70) #3
%72 = icmp eq i32 %71, 0
br i1 %72, label %104, label %73
73: ; preds = %66
%74 = call i32 @of_platform_depopulate(ptr noundef nonnull %0) #3
br label %75
75: ; preds = %56, %73
%76 = phi i32 [ %64, %56 ], [ %71, %73 ]
%77 = load ptr, ptr %60, align 8, !tbaa !17
%78 = call i32 @dss_debugfs_remove_file(ptr noundef %77) #3
%79 = load ptr, ptr %59, align 8, !tbaa !18
%80 = call i32 @dss_debugfs_remove_file(ptr noundef %79) #3
%81 = call i32 @dss_uninitialize_debugfs(ptr noundef nonnull %4) #3
br label %82
82: ; preds = %53, %49, %75
%83 = phi i32 [ %51, %49 ], [ %54, %53 ], [ %76, %75 ]
%84 = call i32 @pm_runtime_disable(ptr noundef %0) #3
%85 = call i32 @dss_uninit_ports(ptr noundef nonnull %4) #3
br label %86
86: ; preds = %46, %82
%87 = phi i32 [ %47, %46 ], [ %83, %82 ]
%88 = getelementptr inbounds i8, ptr %4, i64 8
%89 = load i64, ptr %88, align 8, !tbaa !22
%90 = icmp eq i64 %89, 0
br i1 %90, label %93, label %91
91: ; preds = %86
%92 = call i32 @dss_video_pll_uninit(i64 noundef %89) #3
br label %93
93: ; preds = %91, %86
%94 = load i64, ptr %4, align 8, !tbaa !23
%95 = icmp eq i64 %94, 0
br i1 %95, label %98, label %96
96: ; preds = %93
%97 = call i32 @dss_video_pll_uninit(i64 noundef %94) #3
br label %98
98: ; preds = %93, %96, %43, %40
%99 = phi i32 [ %41, %40 ], [ %44, %43 ], [ %87, %96 ], [ %87, %93 ]
%100 = call i32 @dss_put_clocks(ptr noundef nonnull %4) #3
br label %101
101: ; preds = %37, %98, %34, %15
%102 = phi i32 [ %13, %15 ], [ %36, %34 ], [ %38, %37 ], [ %99, %98 ]
%103 = call i32 @kfree(ptr noundef nonnull %4) #3
br label %104
104: ; preds = %66, %101, %6
%105 = phi i32 [ %102, %101 ], [ %8, %6 ], [ 0, %66 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %105
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dma_set_coherent_mask(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DMA_BIT_MASK(i32 noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @soc_device_match(i32 noundef) local_unnamed_addr #2
declare ptr @of_match_device(i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @platform_get_resource(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @devm_ioremap_resource(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @IS_ERR(i32 noundef) local_unnamed_addr #2
declare i32 @PTR_ERR(i32 noundef) local_unnamed_addr #2
declare i32 @dss_get_clocks(ptr noundef) local_unnamed_addr #2
declare i32 @dss_setup_default_clock(ptr noundef) local_unnamed_addr #2
declare i32 @dss_video_pll_probe(ptr noundef) local_unnamed_addr #2
declare i32 @dss_init_ports(ptr noundef) local_unnamed_addr #2
declare i32 @pm_runtime_enable(ptr noundef) local_unnamed_addr #2
declare i32 @dss_probe_hardware(ptr noundef) local_unnamed_addr #2
declare i32 @dss_initialize_debugfs(ptr noundef) local_unnamed_addr #2
declare ptr @dss_debugfs_create_file(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @of_platform_populate(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @omapdss_gather_components(ptr noundef) local_unnamed_addr #2
declare i32 @device_for_each_child(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @component_master_add_with_match(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @of_platform_depopulate(ptr noundef) local_unnamed_addr #2
declare i32 @dss_debugfs_remove_file(ptr noundef) local_unnamed_addr #2
declare i32 @dss_uninitialize_debugfs(ptr noundef) local_unnamed_addr #2
declare i32 @pm_runtime_disable(ptr noundef) local_unnamed_addr #2
declare i32 @dss_uninit_ports(ptr noundef) local_unnamed_addr #2
declare i32 @dss_video_pll_uninit(i64 noundef) local_unnamed_addr #2
declare i32 @dss_put_clocks(ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !7, i64 40}
!13 = !{!"dss_device", !14, i64 0, !14, i64 8, !15, i64 16, !11, i64 32, !11, i64 36, !7, i64 40}
!14 = !{!"long", !8, i64 0}
!15 = !{!"TYPE_14__", !7, i64 0, !7, i64 8}
!16 = !{!13, !11, i64 32}
!17 = !{!13, !7, i64 24}
!18 = !{!13, !7, i64 16}
!19 = !{!20, !11, i64 0}
!20 = !{!"platform_device", !21, i64 0}
!21 = !{!"TYPE_15__", !11, i64 0}
!22 = !{!13, !14, i64 8}
!23 = !{!13, !14, i64 0}
|
linux_drivers_gpu_drm_omapdrm_dss_extr_dss.c_dss_probe
|
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