IR_x86
stringlengths 592
249k
| IR_arm
stringlengths 558
250k
| filename
stringlengths 17
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|---|---|---|
; ModuleID = 'AnghaBench/glfw/src/extr_wl_window.c__glfwPlatformWaitEvents.c'
source_filename = "AnghaBench/glfw/src/extr_wl_window.c__glfwPlatformWaitEvents.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @_glfwPlatformWaitEvents() local_unnamed_addr #0 {
%1 = tail call i32 @handleEvents(i32 noundef -1) #2
ret void
}
declare i32 @handleEvents(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/glfw/src/extr_wl_window.c__glfwPlatformWaitEvents.c'
source_filename = "AnghaBench/glfw/src/extr_wl_window.c__glfwPlatformWaitEvents.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @_glfwPlatformWaitEvents() local_unnamed_addr #0 {
%1 = tail call i32 @handleEvents(i32 noundef -1) #2
ret void
}
declare i32 @handleEvents(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
glfw_src_extr_wl_window.c__glfwPlatformWaitEvents
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/char/extr_tty_io.c_tty_pair_get_pty.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/char/extr_tty_io.c_tty_pair_get_pty.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.tty_struct = type { ptr, ptr }
%struct.TYPE_2__ = type { i64, i64 }
@TTY_DRIVER_TYPE_PTY = dso_local local_unnamed_addr global i64 0, align 8
@PTY_TYPE_MASTER = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local ptr @tty_pair_get_pty(ptr noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.tty_struct, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i64, ptr %3, align 8, !tbaa !10
%5 = load i64, ptr @TTY_DRIVER_TYPE_PTY, align 8, !tbaa !13
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = getelementptr inbounds %struct.TYPE_2__, ptr %3, i64 0, i32 1
%9 = load i64, ptr %8, align 8, !tbaa !14
%10 = load i64, ptr @PTY_TYPE_MASTER, align 8, !tbaa !13
%11 = icmp eq i64 %9, %10
br i1 %11, label %14, label %12
12: ; preds = %7, %1
%13 = load ptr, ptr %0, align 8, !tbaa !15
br label %14
14: ; preds = %7, %12
%15 = phi ptr [ %13, %12 ], [ %0, %7 ]
ret ptr %15
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"tty_struct", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0, !12, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!11, !12, i64 8}
!15 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/char/extr_tty_io.c_tty_pair_get_pty.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/char/extr_tty_io.c_tty_pair_get_pty.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TTY_DRIVER_TYPE_PTY = common local_unnamed_addr global i64 0, align 8
@PTY_TYPE_MASTER = common local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define ptr @tty_pair_get_pty(ptr noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i64, ptr %3, align 8, !tbaa !11
%5 = load i64, ptr @TTY_DRIVER_TYPE_PTY, align 8, !tbaa !14
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = getelementptr inbounds i8, ptr %3, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !15
%10 = load i64, ptr @PTY_TYPE_MASTER, align 8, !tbaa !14
%11 = icmp eq i64 %9, %10
br i1 %11, label %14, label %12
12: ; preds = %7, %1
%13 = load ptr, ptr %0, align 8, !tbaa !16
br label %14
14: ; preds = %7, %12
%15 = phi ptr [ %13, %12 ], [ %0, %7 ]
ret ptr %15
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"tty_struct", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0, !13, i64 8}
!13 = !{!"long", !9, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!12, !13, i64 8}
!16 = !{!7, !8, i64 0}
|
fastsocket_kernel_drivers_char_extr_tty_io.c_tty_pair_get_pty
|
; ModuleID = 'AnghaBench/fastsocket/kernel/crypto/extr_api.c_crypto_probing_notify.c'
source_filename = "AnghaBench/fastsocket/kernel/crypto/extr_api.c_crypto_probing_notify.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@crypto_chain = dso_local global i32 0, align 4
@NOTIFY_DONE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"cryptomgr\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @crypto_probing_notify(i64 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @blocking_notifier_call_chain(ptr noundef nonnull @crypto_chain, i64 noundef %0, ptr noundef %1) #2
%4 = load i32, ptr @NOTIFY_DONE, align 4, !tbaa !5
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = tail call i32 @request_module(ptr noundef nonnull @.str) #2
%8 = tail call i32 @blocking_notifier_call_chain(ptr noundef nonnull @crypto_chain, i64 noundef %0, ptr noundef %1) #2
br label %9
9: ; preds = %6, %2
%10 = phi i32 [ %8, %6 ], [ %3, %2 ]
ret i32 %10
}
declare i32 @blocking_notifier_call_chain(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @request_module(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/crypto/extr_api.c_crypto_probing_notify.c'
source_filename = "AnghaBench/fastsocket/kernel/crypto/extr_api.c_crypto_probing_notify.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@crypto_chain = common global i32 0, align 4
@NOTIFY_DONE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"cryptomgr\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @crypto_probing_notify(i64 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @blocking_notifier_call_chain(ptr noundef nonnull @crypto_chain, i64 noundef %0, ptr noundef %1) #2
%4 = load i32, ptr @NOTIFY_DONE, align 4, !tbaa !6
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = tail call i32 @request_module(ptr noundef nonnull @.str) #2
%8 = tail call i32 @blocking_notifier_call_chain(ptr noundef nonnull @crypto_chain, i64 noundef %0, ptr noundef %1) #2
br label %9
9: ; preds = %6, %2
%10 = phi i32 [ %8, %6 ], [ %3, %2 ]
ret i32 %10
}
declare i32 @blocking_notifier_call_chain(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @request_module(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_crypto_extr_api.c_crypto_probing_notify
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2100.c_isr_rx_complete_command.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2100.c_isr_rx_complete_command.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ipw2100_priv = type { i32, i32 }
@HOST_COMPLETE = dso_local local_unnamed_addr global i64 0, align 8
@STATUS_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
@CARD_DISABLE = dso_local local_unnamed_addr global i64 0, align 8
@STATUS_CMD_ACTIVE = dso_local local_unnamed_addr global i32 0, align 4
@command_types = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @isr_rx_complete_command], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @isr_rx_complete_command(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !5
%4 = load i64, ptr @HOST_COMPLETE, align 8, !tbaa !10
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %11
6: ; preds = %2
%7 = load i32, ptr @STATUS_ENABLED, align 4, !tbaa !11
%8 = getelementptr inbounds %struct.ipw2100_priv, ptr %0, i64 0, i32 1
%9 = load i32, ptr %8, align 4, !tbaa !13
%10 = or i32 %9, %7
store i32 %10, ptr %8, align 4, !tbaa !13
br label %11
11: ; preds = %6, %2
%12 = load i64, ptr @CARD_DISABLE, align 8, !tbaa !10
%13 = icmp eq i64 %3, %12
br i1 %13, label %17, label %14
14: ; preds = %11
%15 = getelementptr inbounds %struct.ipw2100_priv, ptr %0, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !13
br label %23
17: ; preds = %11
%18 = load i32, ptr @STATUS_ENABLED, align 4, !tbaa !11
%19 = xor i32 %18, -1
%20 = getelementptr inbounds %struct.ipw2100_priv, ptr %0, i64 0, i32 1
%21 = load i32, ptr %20, align 4, !tbaa !13
%22 = and i32 %21, %19
br label %23
23: ; preds = %14, %17
%24 = phi i32 [ %16, %14 ], [ %22, %17 ]
%25 = load i32, ptr @STATUS_CMD_ACTIVE, align 4, !tbaa !11
%26 = xor i32 %25, -1
%27 = getelementptr inbounds %struct.ipw2100_priv, ptr %0, i64 0, i32 1
%28 = and i32 %24, %26
store i32 %28, ptr %27, align 4, !tbaa !13
%29 = tail call i32 @wake_up_interruptible(ptr noundef nonnull %0) #2
ret void
}
declare i32 @wake_up_interruptible(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ipw2100_cmd_header", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !12, i64 4}
!14 = !{!"ipw2100_priv", !12, i64 0, !12, i64 4}
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2100.c_isr_rx_complete_command.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2100.c_isr_rx_complete_command.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HOST_COMPLETE = common local_unnamed_addr global i64 0, align 8
@STATUS_ENABLED = common local_unnamed_addr global i32 0, align 4
@CARD_DISABLE = common local_unnamed_addr global i64 0, align 8
@STATUS_CMD_ACTIVE = common local_unnamed_addr global i32 0, align 4
@command_types = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @isr_rx_complete_command], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @isr_rx_complete_command(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !6
%4 = load i64, ptr @HOST_COMPLETE, align 8, !tbaa !11
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %11
6: ; preds = %2
%7 = load i32, ptr @STATUS_ENABLED, align 4, !tbaa !12
%8 = getelementptr inbounds i8, ptr %0, i64 4
%9 = load i32, ptr %8, align 4, !tbaa !14
%10 = or i32 %9, %7
store i32 %10, ptr %8, align 4, !tbaa !14
br label %11
11: ; preds = %6, %2
%12 = load i64, ptr @CARD_DISABLE, align 8, !tbaa !11
%13 = icmp eq i64 %3, %12
br i1 %13, label %17, label %14
14: ; preds = %11
%15 = getelementptr inbounds i8, ptr %0, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !14
br label %23
17: ; preds = %11
%18 = load i32, ptr @STATUS_ENABLED, align 4, !tbaa !12
%19 = xor i32 %18, -1
%20 = getelementptr inbounds i8, ptr %0, i64 4
%21 = load i32, ptr %20, align 4, !tbaa !14
%22 = and i32 %21, %19
br label %23
23: ; preds = %14, %17
%24 = phi i32 [ %16, %14 ], [ %22, %17 ]
%25 = load i32, ptr @STATUS_CMD_ACTIVE, align 4, !tbaa !12
%26 = xor i32 %25, -1
%27 = getelementptr inbounds i8, ptr %0, i64 4
%28 = and i32 %24, %26
store i32 %28, ptr %27, align 4, !tbaa !14
%29 = tail call i32 @wake_up_interruptible(ptr noundef nonnull %0) #2
ret void
}
declare i32 @wake_up_interruptible(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ipw2100_cmd_header", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!15, !13, i64 4}
!15 = !{!"ipw2100_priv", !13, i64 0, !13, i64 4}
|
linux_drivers_net_wireless_intel_ipw2x00_extr_ipw2100.c_isr_rx_complete_command
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_err_ev7.c_ev7_collect_logout_frame_subpackets.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_err_ev7.c_ev7_collect_logout_frame_subpackets.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.el_subpacket = type { i64, i64, %struct.TYPE_4__, i64 }
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
%struct.ev7_lf_subpackets = type { ptr, ptr, ptr, ptr, ptr, ptr }
@EL_CLASS__HEADER = dso_local local_unnamed_addr global i64 0, align 8
@EL_TYPE__HEADER__LOGOUT_FRAME = dso_local local_unnamed_addr global i64 0, align 8
@EL_CLASS__PAL = dso_local local_unnamed_addr global i64 0, align 8
@EL_TYPE__PAL__LOGOUT_FRAME = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [62 x i8] c"%s**UNEXPECTED SUBPACKET CLASS %d IN LOGOUT FRAME (packet %d\0A\00", align 1
@err_print_prefix = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef ptr @ev7_collect_logout_frame_subpackets(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = load i64, ptr @EL_CLASS__HEADER, align 8, !tbaa !12
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %86
6: ; preds = %2
%7 = getelementptr inbounds %struct.el_subpacket, ptr %0, i64 0, i32 1
%8 = load i64, ptr %7, align 8, !tbaa !13
%9 = load i64, ptr @EL_TYPE__HEADER__LOGOUT_FRAME, align 8, !tbaa !12
%10 = icmp eq i64 %8, %9
br i1 %10, label %11, label %86
11: ; preds = %6
%12 = ptrtoint ptr %0 to i64
%13 = getelementptr inbounds %struct.el_subpacket, ptr %0, i64 0, i32 3
%14 = load i64, ptr %13, align 8, !tbaa !14
%15 = add i64 %14, %12
%16 = inttoptr i64 %15 to ptr
%17 = load i64, ptr %16, align 8, !tbaa !5
%18 = load i64, ptr @EL_CLASS__PAL, align 8, !tbaa !12
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %86
20: ; preds = %11
%21 = getelementptr inbounds %struct.el_subpacket, ptr %16, i64 0, i32 1
%22 = load i64, ptr %21, align 8, !tbaa !13
%23 = load i64, ptr @EL_TYPE__PAL__LOGOUT_FRAME, align 8, !tbaa !12
%24 = icmp eq i64 %22, %23
br i1 %24, label %25, label %86
25: ; preds = %20
%26 = getelementptr inbounds %struct.el_subpacket, ptr %16, i64 0, i32 2
%27 = load i64, ptr %26, align 8, !tbaa !15
%28 = inttoptr i64 %27 to ptr
%29 = getelementptr inbounds %struct.ev7_lf_subpackets, ptr %1, i64 0, i32 5
store ptr %28, ptr %29, align 8, !tbaa !16
%30 = getelementptr inbounds %struct.el_subpacket, ptr %16, i64 0, i32 3
%31 = load i64, ptr %30, align 8, !tbaa !14
%32 = add i64 %31, %15
%33 = icmp eq i64 %32, 0
br i1 %33, label %86, label %34
34: ; preds = %25
%35 = getelementptr inbounds %struct.ev7_lf_subpackets, ptr %1, i64 0, i32 1
%36 = getelementptr inbounds %struct.ev7_lf_subpackets, ptr %1, i64 0, i32 2
%37 = getelementptr inbounds %struct.ev7_lf_subpackets, ptr %1, i64 0, i32 3
%38 = getelementptr inbounds %struct.ev7_lf_subpackets, ptr %1, i64 0, i32 4
br label %39
39: ; preds = %34, %80
%40 = phi i32 [ 0, %34 ], [ %84, %80 ]
%41 = phi i64 [ %32, %34 ], [ %83, %80 ]
%42 = inttoptr i64 %41 to ptr
%43 = load ptr, ptr %29, align 8, !tbaa !16
%44 = load i32, ptr %43, align 4, !tbaa !19
%45 = icmp slt i32 %40, %44
br i1 %45, label %46, label %86
46: ; preds = %39
%47 = load i64, ptr %42, align 8, !tbaa !5
%48 = load i64, ptr @EL_CLASS__PAL, align 8, !tbaa !12
%49 = icmp eq i64 %47, %48
br i1 %49, label %53, label %50
50: ; preds = %46
%51 = load i32, ptr @err_print_prefix, align 4, !tbaa !22
%52 = tail call i32 @printk(ptr noundef nonnull @.str, i32 noundef %51, i64 noundef %47, i32 noundef %40) #2
br label %86
53: ; preds = %46
%54 = getelementptr inbounds %struct.el_subpacket, ptr %42, i64 0, i32 1
%55 = load i64, ptr %54, align 8, !tbaa !13
switch i64 %55, label %86 [
i64 130, label %56
i64 129, label %60
i64 128, label %64
i64 131, label %68
i64 137, label %72
i64 138, label %72
i64 132, label %72
i64 135, label %72
i64 133, label %72
i64 134, label %72
i64 136, label %72
]
56: ; preds = %53
%57 = getelementptr inbounds %struct.el_subpacket, ptr %42, i64 0, i32 2
%58 = load i64, ptr %57, align 8, !tbaa !15
%59 = inttoptr i64 %58 to ptr
store ptr %59, ptr %38, align 8, !tbaa !23
br label %80
60: ; preds = %53
%61 = getelementptr inbounds %struct.el_subpacket, ptr %42, i64 0, i32 2
%62 = load i64, ptr %61, align 8, !tbaa !15
%63 = inttoptr i64 %62 to ptr
store ptr %63, ptr %37, align 8, !tbaa !24
br label %80
64: ; preds = %53
%65 = getelementptr inbounds %struct.el_subpacket, ptr %42, i64 0, i32 2
%66 = load i64, ptr %65, align 8, !tbaa !15
%67 = inttoptr i64 %66 to ptr
store ptr %67, ptr %36, align 8, !tbaa !25
br label %80
68: ; preds = %53
%69 = getelementptr inbounds %struct.el_subpacket, ptr %42, i64 0, i32 2
%70 = load i64, ptr %69, align 8, !tbaa !15
%71 = inttoptr i64 %70 to ptr
store ptr %71, ptr %35, align 8, !tbaa !26
br label %80
72: ; preds = %53, %53, %53, %53, %53, %53, %53
%73 = getelementptr inbounds %struct.el_subpacket, ptr %42, i64 0, i32 2
%74 = load i64, ptr %73, align 8, !tbaa !15
%75 = inttoptr i64 %74 to ptr
%76 = load ptr, ptr %1, align 8, !tbaa !27
%77 = trunc i64 %55 to i32
%78 = tail call i64 @ev7_lf_env_index(i32 noundef %77) #2
%79 = getelementptr inbounds ptr, ptr %76, i64 %78
store ptr %75, ptr %79, align 8, !tbaa !28
br label %80
80: ; preds = %56, %60, %64, %68, %72
%81 = getelementptr inbounds %struct.el_subpacket, ptr %42, i64 0, i32 3
%82 = load i64, ptr %81, align 8, !tbaa !14
%83 = add i64 %82, %41
%84 = add nuw nsw i32 %40, 1
%85 = icmp eq i64 %83, 0
br i1 %85, label %86, label %39, !llvm.loop !29
86: ; preds = %53, %80, %39, %25, %11, %20, %2, %6, %50
%87 = phi ptr [ null, %50 ], [ null, %6 ], [ null, %2 ], [ null, %20 ], [ null, %11 ], [ %1, %25 ], [ null, %53 ], [ %1, %80 ], [ %1, %39 ]
ret ptr %87
}
declare i32 @printk(ptr noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ev7_lf_env_index(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"el_subpacket", !7, i64 0, !7, i64 8, !10, i64 16, !7, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_4__", !11, i64 0}
!11 = !{!"TYPE_3__", !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 8}
!14 = !{!6, !7, i64 24}
!15 = !{!6, !7, i64 16}
!16 = !{!17, !18, i64 40}
!17 = !{!"ev7_lf_subpackets", !18, i64 0, !18, i64 8, !18, i64 16, !18, i64 24, !18, i64 32, !18, i64 40}
!18 = !{!"any pointer", !8, i64 0}
!19 = !{!20, !21, i64 0}
!20 = !{!"ev7_pal_logout_subpacket", !21, i64 0}
!21 = !{!"int", !8, i64 0}
!22 = !{!21, !21, i64 0}
!23 = !{!17, !18, i64 32}
!24 = !{!17, !18, i64 24}
!25 = !{!17, !18, i64 16}
!26 = !{!17, !18, i64 8}
!27 = !{!17, !18, i64 0}
!28 = !{!18, !18, i64 0}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_err_ev7.c_ev7_collect_logout_frame_subpackets.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_err_ev7.c_ev7_collect_logout_frame_subpackets.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EL_CLASS__HEADER = common local_unnamed_addr global i64 0, align 8
@EL_TYPE__HEADER__LOGOUT_FRAME = common local_unnamed_addr global i64 0, align 8
@EL_CLASS__PAL = common local_unnamed_addr global i64 0, align 8
@EL_TYPE__PAL__LOGOUT_FRAME = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [62 x i8] c"%s**UNEXPECTED SUBPACKET CLASS %d IN LOGOUT FRAME (packet %d\0A\00", align 1
@err_print_prefix = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @ev7_collect_logout_frame_subpackets(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = load i64, ptr @EL_CLASS__HEADER, align 8, !tbaa !13
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %86
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i64, ptr %7, align 8, !tbaa !14
%9 = load i64, ptr @EL_TYPE__HEADER__LOGOUT_FRAME, align 8, !tbaa !13
%10 = icmp eq i64 %8, %9
br i1 %10, label %11, label %86
11: ; preds = %6
%12 = ptrtoint ptr %0 to i64
%13 = getelementptr inbounds i8, ptr %0, i64 24
%14 = load i64, ptr %13, align 8, !tbaa !15
%15 = add i64 %14, %12
%16 = inttoptr i64 %15 to ptr
%17 = load i64, ptr %16, align 8, !tbaa !6
%18 = load i64, ptr @EL_CLASS__PAL, align 8, !tbaa !13
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %86
20: ; preds = %11
%21 = getelementptr inbounds i8, ptr %16, i64 8
%22 = load i64, ptr %21, align 8, !tbaa !14
%23 = load i64, ptr @EL_TYPE__PAL__LOGOUT_FRAME, align 8, !tbaa !13
%24 = icmp eq i64 %22, %23
br i1 %24, label %25, label %86
25: ; preds = %20
%26 = getelementptr inbounds i8, ptr %16, i64 16
%27 = load i64, ptr %26, align 8, !tbaa !16
%28 = inttoptr i64 %27 to ptr
%29 = getelementptr inbounds i8, ptr %1, i64 40
store ptr %28, ptr %29, align 8, !tbaa !17
%30 = getelementptr inbounds i8, ptr %16, i64 24
%31 = load i64, ptr %30, align 8, !tbaa !15
%32 = add i64 %31, %15
%33 = icmp eq i64 %32, 0
br i1 %33, label %86, label %34
34: ; preds = %25
%35 = getelementptr inbounds i8, ptr %1, i64 8
%36 = getelementptr inbounds i8, ptr %1, i64 16
%37 = getelementptr inbounds i8, ptr %1, i64 24
%38 = getelementptr inbounds i8, ptr %1, i64 32
br label %39
39: ; preds = %34, %80
%40 = phi i32 [ 0, %34 ], [ %84, %80 ]
%41 = phi i64 [ %32, %34 ], [ %83, %80 ]
%42 = inttoptr i64 %41 to ptr
%43 = load ptr, ptr %29, align 8, !tbaa !17
%44 = load i32, ptr %43, align 4, !tbaa !20
%45 = icmp slt i32 %40, %44
br i1 %45, label %46, label %86
46: ; preds = %39
%47 = load i64, ptr %42, align 8, !tbaa !6
%48 = load i64, ptr @EL_CLASS__PAL, align 8, !tbaa !13
%49 = icmp eq i64 %47, %48
br i1 %49, label %53, label %50
50: ; preds = %46
%51 = load i32, ptr @err_print_prefix, align 4, !tbaa !23
%52 = tail call i32 @printk(ptr noundef nonnull @.str, i32 noundef %51, i64 noundef %47, i32 noundef %40) #2
br label %86
53: ; preds = %46
%54 = getelementptr inbounds i8, ptr %42, i64 8
%55 = load i64, ptr %54, align 8, !tbaa !14
switch i64 %55, label %86 [
i64 130, label %56
i64 129, label %60
i64 128, label %64
i64 131, label %68
i64 137, label %72
i64 138, label %72
i64 132, label %72
i64 135, label %72
i64 133, label %72
i64 134, label %72
i64 136, label %72
]
56: ; preds = %53
%57 = getelementptr inbounds i8, ptr %42, i64 16
%58 = load i64, ptr %57, align 8, !tbaa !16
%59 = inttoptr i64 %58 to ptr
store ptr %59, ptr %38, align 8, !tbaa !24
br label %80
60: ; preds = %53
%61 = getelementptr inbounds i8, ptr %42, i64 16
%62 = load i64, ptr %61, align 8, !tbaa !16
%63 = inttoptr i64 %62 to ptr
store ptr %63, ptr %37, align 8, !tbaa !25
br label %80
64: ; preds = %53
%65 = getelementptr inbounds i8, ptr %42, i64 16
%66 = load i64, ptr %65, align 8, !tbaa !16
%67 = inttoptr i64 %66 to ptr
store ptr %67, ptr %36, align 8, !tbaa !26
br label %80
68: ; preds = %53
%69 = getelementptr inbounds i8, ptr %42, i64 16
%70 = load i64, ptr %69, align 8, !tbaa !16
%71 = inttoptr i64 %70 to ptr
store ptr %71, ptr %35, align 8, !tbaa !27
br label %80
72: ; preds = %53, %53, %53, %53, %53, %53, %53
%73 = getelementptr inbounds i8, ptr %42, i64 16
%74 = load i64, ptr %73, align 8, !tbaa !16
%75 = inttoptr i64 %74 to ptr
%76 = load ptr, ptr %1, align 8, !tbaa !28
%77 = trunc i64 %55 to i32
%78 = tail call i64 @ev7_lf_env_index(i32 noundef %77) #2
%79 = getelementptr inbounds ptr, ptr %76, i64 %78
store ptr %75, ptr %79, align 8, !tbaa !29
br label %80
80: ; preds = %56, %60, %64, %68, %72
%81 = getelementptr inbounds i8, ptr %42, i64 24
%82 = load i64, ptr %81, align 8, !tbaa !15
%83 = add i64 %82, %41
%84 = add nuw nsw i32 %40, 1
%85 = icmp eq i64 %83, 0
br i1 %85, label %86, label %39, !llvm.loop !30
86: ; preds = %53, %80, %39, %25, %11, %20, %2, %6, %50
%87 = phi ptr [ null, %50 ], [ null, %6 ], [ null, %2 ], [ null, %20 ], [ null, %11 ], [ %1, %25 ], [ null, %53 ], [ %1, %80 ], [ %1, %39 ]
ret ptr %87
}
declare i32 @printk(ptr noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ev7_lf_env_index(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"el_subpacket", !8, i64 0, !8, i64 8, !11, i64 16, !8, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !8, i64 8}
!15 = !{!7, !8, i64 24}
!16 = !{!7, !8, i64 16}
!17 = !{!18, !19, i64 40}
!18 = !{!"ev7_lf_subpackets", !19, i64 0, !19, i64 8, !19, i64 16, !19, i64 24, !19, i64 32, !19, i64 40}
!19 = !{!"any pointer", !9, i64 0}
!20 = !{!21, !22, i64 0}
!21 = !{!"ev7_pal_logout_subpacket", !22, i64 0}
!22 = !{!"int", !9, i64 0}
!23 = !{!22, !22, i64 0}
!24 = !{!18, !19, i64 32}
!25 = !{!18, !19, i64 24}
!26 = !{!18, !19, i64 16}
!27 = !{!18, !19, i64 8}
!28 = !{!18, !19, i64 0}
!29 = !{!19, !19, i64 0}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
|
fastsocket_kernel_arch_alpha_kernel_extr_err_ev7.c_ev7_collect_logout_frame_subpackets
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/net/extr_ctcm_main.c_ctcmpc_send_sweep_req.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/net/extr_ctcm_main.c_ctcmpc_send_sweep_req.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.channel = type { i32, i32, i32, ptr }
%struct.net_device = type { i32, ptr }
%struct.ctcm_priv = type { ptr, ptr }
%struct.mpc_group = type { i32, i32, ptr, i32, i32 }
%struct.th_sweep = type { %struct.TYPE_4__, %struct.TYPE_3__ }
%struct.TYPE_4__ = type { i32 }
%struct.TYPE_3__ = type { i32, i32, i32, i32, i32 }
@WRITE = dso_local local_unnamed_addr global i64 0, align 8
@READ = dso_local local_unnamed_addr global i64 0, align 8
@MPC_BUFSIZE_DEFAULT = dso_local local_unnamed_addr global i32 0, align 4
@GFP_ATOMIC = dso_local local_unnamed_addr global i32 0, align 4
@GFP_DMA = dso_local local_unnamed_addr global i32 0, align 4
@TH_SWEEP_LENGTH = dso_local local_unnamed_addr global i32 0, align 4
@TH_SWEEP_REQ = dso_local local_unnamed_addr global i32 0, align 4
@jiffies = dso_local local_unnamed_addr global i32 0, align 4
@CTC_EVENT_RSWEEP_TIMER = dso_local local_unnamed_addr global i32 0, align 4
@MPCG_EVENT_INOP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ctcmpc_send_sweep_req], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ctcmpc_send_sweep_req(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.channel, ptr %0, i64 0, i32 3
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.net_device, ptr %3, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = getelementptr inbounds %struct.ctcm_priv, ptr %5, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !13
%8 = load ptr, ptr %5, align 8, !tbaa !15
%9 = load i64, ptr @WRITE, align 8, !tbaa !16
%10 = getelementptr inbounds ptr, ptr %8, i64 %9
%11 = load ptr, ptr %10, align 8, !tbaa !18
%12 = load i32, ptr %7, align 8, !tbaa !19
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %22
14: ; preds = %1
store i32 1, ptr %7, align 8, !tbaa !19
%15 = getelementptr inbounds %struct.mpc_group, ptr %7, i64 0, i32 2
%16 = load ptr, ptr %15, align 8, !tbaa !21
%17 = load i64, ptr @READ, align 8, !tbaa !16
%18 = getelementptr inbounds i32, ptr %16, i64 %17
%19 = load i32, ptr %18, align 4, !tbaa !22
%20 = getelementptr inbounds %struct.mpc_group, ptr %7, i64 0, i32 4
store i32 %19, ptr %20, align 4, !tbaa !23
%21 = getelementptr inbounds %struct.mpc_group, ptr %7, i64 0, i32 3
store i32 %19, ptr %21, align 8, !tbaa !24
br label %22
22: ; preds = %14, %1
%23 = load i32, ptr @MPC_BUFSIZE_DEFAULT, align 4, !tbaa !22
%24 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !22
%25 = load i32, ptr @GFP_DMA, align 4, !tbaa !22
%26 = or i32 %25, %24
%27 = tail call ptr @__dev_alloc_skb(i32 noundef %23, i32 noundef %26) #2
%28 = icmp eq ptr %27, null
br i1 %28, label %52, label %29
29: ; preds = %22
%30 = load i32, ptr @TH_SWEEP_LENGTH, align 4, !tbaa !22
%31 = tail call i32 (...) @gfp_type() #2
%32 = tail call ptr @kmalloc(i32 noundef %30, i32 noundef %31) #2
%33 = icmp eq ptr %32, null
br i1 %33, label %34, label %36
34: ; preds = %29
%35 = tail call i32 @dev_kfree_skb_any(ptr noundef nonnull %27) #2
br label %52
36: ; preds = %29
%37 = getelementptr inbounds %struct.th_sweep, ptr %32, i64 0, i32 1
%38 = load i32, ptr @TH_SWEEP_REQ, align 4, !tbaa !22
%39 = getelementptr inbounds %struct.th_sweep, ptr %32, i64 0, i32 1, i32 4
store i32 %38, ptr %39, align 4, !tbaa !25
store <4 x i32> zeroinitializer, ptr %37, align 4, !tbaa !22
%40 = getelementptr inbounds %struct.channel, ptr %11, i64 0, i32 2
%41 = load i32, ptr %40, align 8, !tbaa !29
store i32 %41, ptr %32, align 4, !tbaa !30
%42 = load i32, ptr @TH_SWEEP_LENGTH, align 4, !tbaa !22
%43 = tail call i32 @skb_put(ptr noundef nonnull %27, i32 noundef %42) #2
%44 = load i32, ptr @TH_SWEEP_LENGTH, align 4, !tbaa !22
%45 = tail call i32 @memcpy(i32 noundef %43, ptr noundef nonnull %32, i32 noundef %44) #2
%46 = tail call i32 @kfree(ptr noundef nonnull %32) #2
%47 = load i32, ptr @jiffies, align 4, !tbaa !22
store i32 %47, ptr %3, align 8, !tbaa !31
%48 = getelementptr inbounds %struct.channel, ptr %11, i64 0, i32 1
%49 = tail call i32 @skb_queue_tail(ptr noundef nonnull %48, ptr noundef nonnull %27) #2
%50 = load i32, ptr @CTC_EVENT_RSWEEP_TIMER, align 4, !tbaa !22
%51 = tail call i32 @fsm_addtimer(ptr noundef %11, i32 noundef 100, i32 noundef %50, ptr noundef %11) #2
br label %58
52: ; preds = %22, %34
store i32 0, ptr %7, align 8, !tbaa !19
%53 = tail call i32 @ctcm_clear_busy(ptr noundef nonnull %3) #2
%54 = getelementptr inbounds %struct.mpc_group, ptr %7, i64 0, i32 1
%55 = load i32, ptr %54, align 4, !tbaa !32
%56 = load i32, ptr @MPCG_EVENT_INOP, align 4, !tbaa !22
%57 = tail call i32 @fsm_event(i32 noundef %55, i32 noundef %56, ptr noundef nonnull %3) #2
br label %58
58: ; preds = %52, %36
ret void
}
declare ptr @__dev_alloc_skb(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @gfp_type(...) local_unnamed_addr #1
declare i32 @dev_kfree_skb_any(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @skb_put(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @skb_queue_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fsm_addtimer(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ctcm_clear_busy(ptr noundef) local_unnamed_addr #1
declare i32 @fsm_event(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"channel", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"net_device", !7, i64 0, !10, i64 8}
!13 = !{!14, !10, i64 8}
!14 = !{!"ctcm_priv", !10, i64 0, !10, i64 8}
!15 = !{!14, !10, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !8, i64 0}
!18 = !{!10, !10, i64 0}
!19 = !{!20, !7, i64 0}
!20 = !{!"mpc_group", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16, !7, i64 20}
!21 = !{!20, !10, i64 8}
!22 = !{!7, !7, i64 0}
!23 = !{!20, !7, i64 20}
!24 = !{!20, !7, i64 16}
!25 = !{!26, !7, i64 20}
!26 = !{!"th_sweep", !27, i64 0, !28, i64 4}
!27 = !{!"TYPE_4__", !7, i64 0}
!28 = !{!"TYPE_3__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16}
!29 = !{!6, !7, i64 8}
!30 = !{!26, !7, i64 0}
!31 = !{!12, !7, i64 0}
!32 = !{!20, !7, i64 4}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/net/extr_ctcm_main.c_ctcmpc_send_sweep_req.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/net/extr_ctcm_main.c_ctcmpc_send_sweep_req.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@WRITE = common local_unnamed_addr global i64 0, align 8
@READ = common local_unnamed_addr global i64 0, align 8
@MPC_BUFSIZE_DEFAULT = common local_unnamed_addr global i32 0, align 4
@GFP_ATOMIC = common local_unnamed_addr global i32 0, align 4
@GFP_DMA = common local_unnamed_addr global i32 0, align 4
@TH_SWEEP_LENGTH = common local_unnamed_addr global i32 0, align 4
@TH_SWEEP_REQ = common local_unnamed_addr global i32 0, align 4
@jiffies = common local_unnamed_addr global i32 0, align 4
@CTC_EVENT_RSWEEP_TIMER = common local_unnamed_addr global i32 0, align 4
@MPCG_EVENT_INOP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ctcmpc_send_sweep_req], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ctcmpc_send_sweep_req(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %3, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !12
%6 = getelementptr inbounds i8, ptr %5, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !14
%8 = load ptr, ptr %5, align 8, !tbaa !16
%9 = load i64, ptr @WRITE, align 8, !tbaa !17
%10 = getelementptr inbounds ptr, ptr %8, i64 %9
%11 = load ptr, ptr %10, align 8, !tbaa !19
%12 = load i32, ptr %7, align 8, !tbaa !20
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %22
14: ; preds = %1
store i32 1, ptr %7, align 8, !tbaa !20
%15 = getelementptr inbounds i8, ptr %7, i64 8
%16 = load ptr, ptr %15, align 8, !tbaa !22
%17 = load i64, ptr @READ, align 8, !tbaa !17
%18 = getelementptr inbounds i32, ptr %16, i64 %17
%19 = load i32, ptr %18, align 4, !tbaa !23
%20 = getelementptr inbounds i8, ptr %7, i64 20
store i32 %19, ptr %20, align 4, !tbaa !24
%21 = getelementptr inbounds i8, ptr %7, i64 16
store i32 %19, ptr %21, align 8, !tbaa !25
br label %22
22: ; preds = %14, %1
%23 = load i32, ptr @MPC_BUFSIZE_DEFAULT, align 4, !tbaa !23
%24 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !23
%25 = load i32, ptr @GFP_DMA, align 4, !tbaa !23
%26 = or i32 %25, %24
%27 = tail call ptr @__dev_alloc_skb(i32 noundef %23, i32 noundef %26) #2
%28 = icmp eq ptr %27, null
br i1 %28, label %52, label %29
29: ; preds = %22
%30 = load i32, ptr @TH_SWEEP_LENGTH, align 4, !tbaa !23
%31 = tail call i32 @gfp_type() #2
%32 = tail call ptr @kmalloc(i32 noundef %30, i32 noundef %31) #2
%33 = icmp eq ptr %32, null
br i1 %33, label %34, label %36
34: ; preds = %29
%35 = tail call i32 @dev_kfree_skb_any(ptr noundef nonnull %27) #2
br label %52
36: ; preds = %29
%37 = getelementptr inbounds i8, ptr %32, i64 4
%38 = load i32, ptr @TH_SWEEP_REQ, align 4, !tbaa !23
%39 = getelementptr inbounds i8, ptr %32, i64 20
store i32 %38, ptr %39, align 4, !tbaa !26
store <4 x i32> zeroinitializer, ptr %37, align 4, !tbaa !23
%40 = getelementptr inbounds i8, ptr %11, i64 8
%41 = load i32, ptr %40, align 8, !tbaa !30
store i32 %41, ptr %32, align 4, !tbaa !31
%42 = load i32, ptr @TH_SWEEP_LENGTH, align 4, !tbaa !23
%43 = tail call i32 @skb_put(ptr noundef nonnull %27, i32 noundef %42) #2
%44 = load i32, ptr @TH_SWEEP_LENGTH, align 4, !tbaa !23
%45 = tail call i32 @memcpy(i32 noundef %43, ptr noundef nonnull %32, i32 noundef %44) #2
%46 = tail call i32 @kfree(ptr noundef nonnull %32) #2
%47 = load i32, ptr @jiffies, align 4, !tbaa !23
store i32 %47, ptr %3, align 8, !tbaa !32
%48 = getelementptr inbounds i8, ptr %11, i64 4
%49 = tail call i32 @skb_queue_tail(ptr noundef nonnull %48, ptr noundef nonnull %27) #2
%50 = load i32, ptr @CTC_EVENT_RSWEEP_TIMER, align 4, !tbaa !23
%51 = tail call i32 @fsm_addtimer(ptr noundef %11, i32 noundef 100, i32 noundef %50, ptr noundef %11) #2
br label %58
52: ; preds = %22, %34
store i32 0, ptr %7, align 8, !tbaa !20
%53 = tail call i32 @ctcm_clear_busy(ptr noundef nonnull %3) #2
%54 = getelementptr inbounds i8, ptr %7, i64 4
%55 = load i32, ptr %54, align 4, !tbaa !33
%56 = load i32, ptr @MPCG_EVENT_INOP, align 4, !tbaa !23
%57 = tail call i32 @fsm_event(i32 noundef %55, i32 noundef %56, ptr noundef nonnull %3) #2
br label %58
58: ; preds = %52, %36
ret void
}
declare ptr @__dev_alloc_skb(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @gfp_type(...) local_unnamed_addr #1
declare i32 @dev_kfree_skb_any(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @skb_put(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @skb_queue_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fsm_addtimer(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ctcm_clear_busy(ptr noundef) local_unnamed_addr #1
declare i32 @fsm_event(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"channel", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"net_device", !8, i64 0, !11, i64 8}
!14 = !{!15, !11, i64 8}
!15 = !{!"ctcm_priv", !11, i64 0, !11, i64 8}
!16 = !{!15, !11, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"long", !9, i64 0}
!19 = !{!11, !11, i64 0}
!20 = !{!21, !8, i64 0}
!21 = !{!"mpc_group", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16, !8, i64 20}
!22 = !{!21, !11, i64 8}
!23 = !{!8, !8, i64 0}
!24 = !{!21, !8, i64 20}
!25 = !{!21, !8, i64 16}
!26 = !{!27, !8, i64 20}
!27 = !{!"th_sweep", !28, i64 0, !29, i64 4}
!28 = !{!"TYPE_4__", !8, i64 0}
!29 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16}
!30 = !{!7, !8, i64 8}
!31 = !{!27, !8, i64 0}
!32 = !{!13, !8, i64 0}
!33 = !{!21, !8, i64 4}
|
fastsocket_kernel_drivers_s390_net_extr_ctcm_main.c_ctcmpc_send_sweep_req
|
; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_unaligned_64.c_decode_direction.c'
source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_unaligned_64.c_decode_direction.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@load = dso_local local_unnamed_addr global i32 0, align 4
@both = dso_local local_unnamed_addr global i32 0, align 4
@store = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @decode_direction], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @decode_direction(i32 noundef %0) #0 {
%2 = and i32 %0, 2097152
%3 = icmp eq i32 %2, 0
%4 = and i32 %0, 7864320
%5 = icmp eq i32 %4, 7864320
%6 = load i32, ptr @load, align 4
%7 = load i32, ptr @both, align 4
%8 = load i32, ptr @store, align 4
%9 = select i1 %5, i32 %7, i32 %8
%10 = select i1 %3, i32 %6, i32 %9
ret i32 %10
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_unaligned_64.c_decode_direction.c'
source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_unaligned_64.c_decode_direction.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@load = common local_unnamed_addr global i32 0, align 4
@both = common local_unnamed_addr global i32 0, align 4
@store = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @decode_direction], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @decode_direction(i32 noundef %0) #0 {
%2 = and i32 %0, 2097152
%3 = icmp eq i32 %2, 0
%4 = and i32 %0, 7864320
%5 = icmp eq i32 %4, 7864320
%6 = load i32, ptr @load, align 4
%7 = load i32, ptr @both, align 4
%8 = load i32, ptr @store, align 4
%9 = select i1 %5, i32 %7, i32 %8
%10 = select i1 %3, i32 %6, i32 %9
ret i32 %10
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_arch_sparc_kernel_extr_unaligned_64.c_decode_direction
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/cxgbe/common/extr_t4_hw.c_t4_clr_port_stats.c'
source_filename = "AnghaBench/freebsd/sys/dev/cxgbe/common/extr_t4_hw.c_t4_clr_port_stats.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@A_MPS_PORT_STAT_TX_PORT_BYTES_L = dso_local local_unnamed_addr global i32 0, align 4
@A_MPS_PORT_STAT_TX_PORT_PPP7_H = dso_local local_unnamed_addr global i32 0, align 4
@A_MPS_PORT_STAT_RX_PORT_BYTES_L = dso_local local_unnamed_addr global i32 0, align 4
@A_MPS_PORT_STAT_RX_PORT_LESS_64B_H = dso_local local_unnamed_addr global i32 0, align 4
@A_MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L = dso_local local_unnamed_addr global i32 0, align 4
@A_MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @t4_clr_port_stats(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @adap2pinfo(ptr noundef %0, i32 noundef %1) #2
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i64 @is_t4(ptr noundef %0) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @PORT_BASE(i32 noundef %1) #2
br label %11
9: ; preds = %2
%10 = tail call i32 @T5_PORT_BASE(i32 noundef %1) #2
br label %11
11: ; preds = %9, %7
%12 = phi i32 [ %8, %7 ], [ %10, %9 ]
%13 = load i32, ptr @A_MPS_PORT_STAT_TX_PORT_BYTES_L, align 4, !tbaa !10
%14 = load i32, ptr @A_MPS_PORT_STAT_TX_PORT_PPP7_H, align 4, !tbaa !10
%15 = icmp ugt i32 %13, %14
br i1 %15, label %23, label %16
16: ; preds = %11, %16
%17 = phi i32 [ %20, %16 ], [ %13, %11 ]
%18 = add i32 %17, %12
%19 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %18, i32 noundef 0) #2
%20 = add i32 %17, 8
%21 = load i32, ptr @A_MPS_PORT_STAT_TX_PORT_PPP7_H, align 4, !tbaa !10
%22 = icmp ugt i32 %20, %21
br i1 %22, label %23, label %16, !llvm.loop !11
23: ; preds = %16, %11
%24 = load i32, ptr @A_MPS_PORT_STAT_RX_PORT_BYTES_L, align 4, !tbaa !10
%25 = load i32, ptr @A_MPS_PORT_STAT_RX_PORT_LESS_64B_H, align 4, !tbaa !10
%26 = icmp ugt i32 %24, %25
br i1 %26, label %27, label %30
27: ; preds = %30, %23
%28 = and i32 %4, 1
%29 = icmp eq i32 %28, 0
br i1 %29, label %42, label %37
30: ; preds = %23, %30
%31 = phi i32 [ %34, %30 ], [ %24, %23 ]
%32 = add i32 %31, %12
%33 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %32, i32 noundef 0) #2
%34 = add i32 %31, 8
%35 = load i32, ptr @A_MPS_PORT_STAT_RX_PORT_LESS_64B_H, align 4, !tbaa !10
%36 = icmp ugt i32 %34, %35
br i1 %36, label %27, label %30, !llvm.loop !13
37: ; preds = %27
%38 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L, align 4, !tbaa !10
%39 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %38, i32 noundef 0) #2
%40 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L, align 4, !tbaa !10
%41 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %40, i32 noundef 0) #2
br label %42
42: ; preds = %27, %37
%43 = and i32 %4, 2
%44 = icmp eq i32 %43, 0
br i1 %44, label %52, label %45
45: ; preds = %42
%46 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L, align 4, !tbaa !10
%47 = add i32 %46, 8
%48 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %47, i32 noundef 0) #2
%49 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L, align 4, !tbaa !10
%50 = add i32 %49, 8
%51 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %50, i32 noundef 0) #2
br label %52
52: ; preds = %45, %42
%53 = and i32 %4, 4
%54 = icmp eq i32 %53, 0
br i1 %54, label %62, label %55
55: ; preds = %52
%56 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L, align 4, !tbaa !10
%57 = add i32 %56, 16
%58 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %57, i32 noundef 0) #2
%59 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L, align 4, !tbaa !10
%60 = add i32 %59, 16
%61 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %60, i32 noundef 0) #2
br label %62
62: ; preds = %55, %52
%63 = and i32 %4, 8
%64 = icmp eq i32 %63, 0
br i1 %64, label %72, label %65
65: ; preds = %62
%66 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L, align 4, !tbaa !10
%67 = add i32 %66, 24
%68 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %67, i32 noundef 0) #2
%69 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L, align 4, !tbaa !10
%70 = add i32 %69, 24
%71 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %70, i32 noundef 0) #2
br label %72
72: ; preds = %65, %62
ret void
}
declare ptr @adap2pinfo(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @is_t4(ptr noundef) local_unnamed_addr #1
declare i32 @PORT_BASE(i32 noundef) local_unnamed_addr #1
declare i32 @T5_PORT_BASE(i32 noundef) local_unnamed_addr #1
declare i32 @t4_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/cxgbe/common/extr_t4_hw.c_t4_clr_port_stats.c'
source_filename = "AnghaBench/freebsd/sys/dev/cxgbe/common/extr_t4_hw.c_t4_clr_port_stats.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@A_MPS_PORT_STAT_TX_PORT_BYTES_L = common local_unnamed_addr global i32 0, align 4
@A_MPS_PORT_STAT_TX_PORT_PPP7_H = common local_unnamed_addr global i32 0, align 4
@A_MPS_PORT_STAT_RX_PORT_BYTES_L = common local_unnamed_addr global i32 0, align 4
@A_MPS_PORT_STAT_RX_PORT_LESS_64B_H = common local_unnamed_addr global i32 0, align 4
@A_MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L = common local_unnamed_addr global i32 0, align 4
@A_MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @t4_clr_port_stats(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @adap2pinfo(ptr noundef %0, i32 noundef %1) #2
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i64 @is_t4(ptr noundef %0) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @PORT_BASE(i32 noundef %1) #2
br label %11
9: ; preds = %2
%10 = tail call i32 @T5_PORT_BASE(i32 noundef %1) #2
br label %11
11: ; preds = %9, %7
%12 = phi i32 [ %8, %7 ], [ %10, %9 ]
%13 = load i32, ptr @A_MPS_PORT_STAT_TX_PORT_BYTES_L, align 4, !tbaa !11
%14 = load i32, ptr @A_MPS_PORT_STAT_TX_PORT_PPP7_H, align 4, !tbaa !11
%15 = icmp ugt i32 %13, %14
br i1 %15, label %23, label %16
16: ; preds = %11, %16
%17 = phi i32 [ %20, %16 ], [ %13, %11 ]
%18 = add i32 %17, %12
%19 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %18, i32 noundef 0) #2
%20 = add i32 %17, 8
%21 = load i32, ptr @A_MPS_PORT_STAT_TX_PORT_PPP7_H, align 4, !tbaa !11
%22 = icmp ugt i32 %20, %21
br i1 %22, label %23, label %16, !llvm.loop !12
23: ; preds = %16, %11
%24 = load i32, ptr @A_MPS_PORT_STAT_RX_PORT_BYTES_L, align 4, !tbaa !11
%25 = load i32, ptr @A_MPS_PORT_STAT_RX_PORT_LESS_64B_H, align 4, !tbaa !11
%26 = icmp ugt i32 %24, %25
br i1 %26, label %27, label %30
27: ; preds = %30, %23
%28 = and i32 %4, 1
%29 = icmp eq i32 %28, 0
br i1 %29, label %42, label %37
30: ; preds = %23, %30
%31 = phi i32 [ %34, %30 ], [ %24, %23 ]
%32 = add i32 %31, %12
%33 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %32, i32 noundef 0) #2
%34 = add i32 %31, 8
%35 = load i32, ptr @A_MPS_PORT_STAT_RX_PORT_LESS_64B_H, align 4, !tbaa !11
%36 = icmp ugt i32 %34, %35
br i1 %36, label %27, label %30, !llvm.loop !14
37: ; preds = %27
%38 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L, align 4, !tbaa !11
%39 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %38, i32 noundef 0) #2
%40 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L, align 4, !tbaa !11
%41 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %40, i32 noundef 0) #2
br label %42
42: ; preds = %27, %37
%43 = and i32 %4, 2
%44 = icmp eq i32 %43, 0
br i1 %44, label %52, label %45
45: ; preds = %42
%46 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L, align 4, !tbaa !11
%47 = add i32 %46, 8
%48 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %47, i32 noundef 0) #2
%49 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L, align 4, !tbaa !11
%50 = add i32 %49, 8
%51 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %50, i32 noundef 0) #2
br label %52
52: ; preds = %45, %42
%53 = and i32 %4, 4
%54 = icmp eq i32 %53, 0
br i1 %54, label %62, label %55
55: ; preds = %52
%56 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L, align 4, !tbaa !11
%57 = add i32 %56, 16
%58 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %57, i32 noundef 0) #2
%59 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L, align 4, !tbaa !11
%60 = add i32 %59, 16
%61 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %60, i32 noundef 0) #2
br label %62
62: ; preds = %55, %52
%63 = and i32 %4, 8
%64 = icmp eq i32 %63, 0
br i1 %64, label %72, label %65
65: ; preds = %62
%66 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L, align 4, !tbaa !11
%67 = add i32 %66, 24
%68 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %67, i32 noundef 0) #2
%69 = load i32, ptr @A_MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L, align 4, !tbaa !11
%70 = add i32 %69, 24
%71 = tail call i32 @t4_write_reg(ptr noundef %0, i32 noundef %70, i32 noundef 0) #2
br label %72
72: ; preds = %65, %62
ret void
}
declare ptr @adap2pinfo(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @is_t4(ptr noundef) local_unnamed_addr #1
declare i32 @PORT_BASE(i32 noundef) local_unnamed_addr #1
declare i32 @T5_PORT_BASE(i32 noundef) local_unnamed_addr #1
declare i32 @t4_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
|
freebsd_sys_dev_cxgbe_common_extr_t4_hw.c_t4_clr_port_stats
|
; ModuleID = 'AnghaBench/h2o/lib/handler/compress/extr_brotli.c_compress_core.c'
source_filename = "AnghaBench/h2o/lib/handler/compress/extr_brotli.c_compress_core.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.st_brotli_context_t = type { i64, %struct.TYPE_4__, i32 }
%struct.TYPE_4__ = type { i32, ptr }
%struct.TYPE_3__ = type { i64, i64 }
@.str = private unnamed_addr constant [28 x i8] c"BrotliEncoderCompressStream\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @compress_core], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @compress_core(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = alloca ptr, align 8
%6 = alloca i64, align 8
%7 = getelementptr inbounds %struct.st_brotli_context_t, ptr %0, i64 0, i32 1
%8 = load i32, ptr %7, align 8, !tbaa !5
%9 = add nsw i32 %8, -1
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds %struct.st_brotli_context_t, ptr %0, i64 0, i32 1, i32 1
%12 = load ptr, ptr %11, align 8, !tbaa !13
%13 = getelementptr inbounds %struct.TYPE_3__, ptr %12, i64 %10
%14 = load i64, ptr %13, align 8, !tbaa !14
%15 = load i64, ptr %0, align 8, !tbaa !16
%16 = icmp eq i64 %14, %15
br i1 %16, label %17, label %24
17: ; preds = %4
%18 = tail call i32 @expand_buf(ptr noundef nonnull %0) #3
%19 = add nsw i64 %10, 1
%20 = load ptr, ptr %11, align 8, !tbaa !13
%21 = getelementptr inbounds %struct.TYPE_3__, ptr %20, i64 %19
%22 = load i64, ptr %21, align 8, !tbaa !14
%23 = load i64, ptr %0, align 8, !tbaa !16
br label %24
24: ; preds = %17, %4
%25 = phi i64 [ %23, %17 ], [ %15, %4 ]
%26 = phi i64 [ %22, %17 ], [ %14, %4 ]
%27 = phi ptr [ %20, %17 ], [ %12, %4 ]
%28 = phi i64 [ %19, %17 ], [ %10, %4 ]
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%29 = getelementptr inbounds %struct.TYPE_3__, ptr %27, i64 %28, i32 1
%30 = load i64, ptr %29, align 8, !tbaa !17
%31 = inttoptr i64 %30 to ptr
%32 = getelementptr inbounds i32, ptr %31, i64 %26
store ptr %32, ptr %5, align 8, !tbaa !18
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%33 = sub nsw i64 %25, %26
store i64 %33, ptr %6, align 8, !tbaa !19
%34 = getelementptr inbounds %struct.st_brotli_context_t, ptr %0, i64 0, i32 2
%35 = load i32, ptr %34, align 8, !tbaa !20
%36 = call i32 @BrotliEncoderCompressStream(i32 noundef %35, i32 noundef %1, ptr noundef %3, ptr noundef %2, ptr noundef nonnull %6, ptr noundef nonnull %5, ptr noundef null) #3
%37 = icmp eq i32 %36, 0
br i1 %37, label %38, label %40
38: ; preds = %24
%39 = call i32 @h2o_fatal(ptr noundef nonnull @.str) #3
br label %40
40: ; preds = %38, %24
%41 = load i64, ptr %0, align 8, !tbaa !16
%42 = load i64, ptr %6, align 8, !tbaa !19
%43 = sub i64 %41, %42
%44 = load ptr, ptr %11, align 8, !tbaa !13
%45 = getelementptr inbounds %struct.TYPE_3__, ptr %44, i64 %28
store i64 %43, ptr %45, align 8, !tbaa !14
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @expand_buf(ptr noundef) local_unnamed_addr #2
declare i32 @BrotliEncoderCompressStream(i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @h2o_fatal(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"st_brotli_context_t", !7, i64 0, !10, i64 8, !11, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_4__", !11, i64 0, !12, i64 8}
!11 = !{!"int", !8, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !12, i64 16}
!14 = !{!15, !7, i64 0}
!15 = !{!"TYPE_3__", !7, i64 0, !7, i64 8}
!16 = !{!6, !7, i64 0}
!17 = !{!15, !7, i64 8}
!18 = !{!12, !12, i64 0}
!19 = !{!7, !7, i64 0}
!20 = !{!6, !11, i64 24}
|
; ModuleID = 'AnghaBench/h2o/lib/handler/compress/extr_brotli.c_compress_core.c'
source_filename = "AnghaBench/h2o/lib/handler/compress/extr_brotli.c_compress_core.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i64, i64 }
@.str = private unnamed_addr constant [28 x i8] c"BrotliEncoderCompressStream\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @compress_core], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @compress_core(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = alloca ptr, align 8
%6 = alloca i64, align 8
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i32, ptr %7, align 8, !tbaa !6
%9 = add nsw i32 %8, -1
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, ptr %0, i64 16
%12 = load ptr, ptr %11, align 8, !tbaa !14
%13 = getelementptr inbounds %struct.TYPE_3__, ptr %12, i64 %10
%14 = load i64, ptr %13, align 8, !tbaa !15
%15 = load i64, ptr %0, align 8, !tbaa !17
%16 = icmp eq i64 %14, %15
br i1 %16, label %17, label %24
17: ; preds = %4
%18 = tail call i32 @expand_buf(ptr noundef nonnull %0) #3
%19 = add nsw i64 %10, 1
%20 = load ptr, ptr %11, align 8, !tbaa !14
%21 = getelementptr inbounds %struct.TYPE_3__, ptr %20, i64 %19
%22 = load i64, ptr %21, align 8, !tbaa !15
%23 = load i64, ptr %0, align 8, !tbaa !17
br label %24
24: ; preds = %17, %4
%25 = phi i64 [ %23, %17 ], [ %15, %4 ]
%26 = phi i64 [ %22, %17 ], [ %14, %4 ]
%27 = phi ptr [ %20, %17 ], [ %12, %4 ]
%28 = phi i64 [ %19, %17 ], [ %10, %4 ]
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%29 = getelementptr inbounds %struct.TYPE_3__, ptr %27, i64 %28, i32 1
%30 = load i64, ptr %29, align 8, !tbaa !18
%31 = inttoptr i64 %30 to ptr
%32 = getelementptr inbounds i32, ptr %31, i64 %26
store ptr %32, ptr %5, align 8, !tbaa !19
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%33 = sub nsw i64 %25, %26
store i64 %33, ptr %6, align 8, !tbaa !20
%34 = getelementptr inbounds i8, ptr %0, i64 24
%35 = load i32, ptr %34, align 8, !tbaa !21
%36 = call i32 @BrotliEncoderCompressStream(i32 noundef %35, i32 noundef %1, ptr noundef %3, ptr noundef %2, ptr noundef nonnull %6, ptr noundef nonnull %5, ptr noundef null) #3
%37 = icmp eq i32 %36, 0
br i1 %37, label %38, label %40
38: ; preds = %24
%39 = call i32 @h2o_fatal(ptr noundef nonnull @.str) #3
br label %40
40: ; preds = %38, %24
%41 = load i64, ptr %0, align 8, !tbaa !17
%42 = load i64, ptr %6, align 8, !tbaa !20
%43 = sub i64 %41, %42
%44 = load ptr, ptr %11, align 8, !tbaa !14
%45 = getelementptr inbounds %struct.TYPE_3__, ptr %44, i64 %28
store i64 %43, ptr %45, align 8, !tbaa !15
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @expand_buf(ptr noundef) local_unnamed_addr #2
declare i32 @BrotliEncoderCompressStream(i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @h2o_fatal(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"st_brotli_context_t", !8, i64 0, !11, i64 8, !12, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !12, i64 0, !13, i64 8}
!12 = !{!"int", !9, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!7, !13, i64 16}
!15 = !{!16, !8, i64 0}
!16 = !{!"TYPE_3__", !8, i64 0, !8, i64 8}
!17 = !{!7, !8, i64 0}
!18 = !{!16, !8, i64 8}
!19 = !{!13, !13, i64 0}
!20 = !{!8, !8, i64 0}
!21 = !{!7, !12, i64 24}
|
h2o_lib_handler_compress_extr_brotli.c_compress_core
|
; ModuleID = 'AnghaBench/freebsd/contrib/openpam/bin/pamtest/extr_pamtest.c_opt_num_once.c'
source_filename = "AnghaBench/freebsd/contrib/openpam/bin/pamtest/extr_pamtest.c_opt_num_once.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@optarg = dso_local local_unnamed_addr global ptr null, align 8
@stderr = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [43 x i8] c"The -%c option expects a numeric argument\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @opt_num_once], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @opt_num_once(i32 noundef %0, ptr nocapture noundef writeonly %1, ptr noundef %2) #0 {
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
%5 = call i64 @strtol(ptr noundef %2, ptr noundef nonnull %4, i32 noundef 0)
%6 = load ptr, ptr %4, align 8, !tbaa !5
%7 = load ptr, ptr @optarg, align 8, !tbaa !5
%8 = icmp eq ptr %6, %7
br i1 %8, label %12, label %9
9: ; preds = %3
%10 = load i8, ptr %6, align 1, !tbaa !9
%11 = icmp eq i8 %10, 0
br i1 %11, label %16, label %12
12: ; preds = %9, %3
%13 = load i32, ptr @stderr, align 4, !tbaa !10
%14 = tail call i32 @fprintf(i32 noundef %13, ptr noundef nonnull @.str, i32 noundef %0) #4
%15 = tail call i32 (...) @usage() #4
br label %16
16: ; preds = %12, %9
store i64 %5, ptr %1, align 8, !tbaa !12
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nofree nounwind willreturn
declare i64 @strtol(ptr noundef readonly, ptr nocapture noundef, i32 noundef) local_unnamed_addr #2
declare i32 @fprintf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @usage(...) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nofree nounwind willreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/openpam/bin/pamtest/extr_pamtest.c_opt_num_once.c'
source_filename = "AnghaBench/freebsd/contrib/openpam/bin/pamtest/extr_pamtest.c_opt_num_once.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@optarg = common local_unnamed_addr global ptr null, align 8
@stderr = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [43 x i8] c"The -%c option expects a numeric argument\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @opt_num_once], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @opt_num_once(i32 noundef %0, ptr nocapture noundef writeonly %1, ptr noundef %2) #0 {
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
%5 = call i64 @strtol(ptr noundef %2, ptr noundef nonnull %4, i32 noundef 0)
%6 = load ptr, ptr %4, align 8, !tbaa !6
%7 = load ptr, ptr @optarg, align 8, !tbaa !6
%8 = icmp eq ptr %6, %7
br i1 %8, label %12, label %9
9: ; preds = %3
%10 = load i8, ptr %6, align 1, !tbaa !10
%11 = icmp eq i8 %10, 0
br i1 %11, label %16, label %12
12: ; preds = %9, %3
%13 = load i32, ptr @stderr, align 4, !tbaa !11
%14 = tail call i32 @fprintf(i32 noundef %13, ptr noundef nonnull @.str, i32 noundef %0) #4
%15 = tail call i32 @usage() #4
br label %16
16: ; preds = %12, %9
store i64 %5, ptr %1, align 8, !tbaa !13
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nofree nounwind willreturn
declare i64 @strtol(ptr noundef readonly, ptr nocapture noundef, i32 noundef) local_unnamed_addr #2
declare i32 @fprintf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @usage(...) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nofree nounwind willreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !8, i64 0}
|
freebsd_contrib_openpam_bin_pamtest_extr_pamtest.c_opt_num_once
|
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/oxygen/extr_oxygen.c_ak4396_init.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/oxygen/extr_oxygen.c_ak4396_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.oxygen = type { i32, %struct.TYPE_2__, ptr }
%struct.TYPE_2__ = type { i32 }
%struct.generic_data = type { i32, ptr }
@AK4396_SMUTE = dso_local local_unnamed_addr global i32 0, align 4
@AK4396_DEM_OFF = dso_local local_unnamed_addr global i32 0, align 4
@AK4396_DFS_NORMAL = dso_local local_unnamed_addr global i32 0, align 4
@AK4396_CONTROL_2 = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [7 x i8] c"AK4396\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ak4396_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ak4396_init(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.oxygen, ptr %0, i64 0, i32 2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.oxygen, ptr %0, i64 0, i32 1
%5 = load i32, ptr %4, align 4, !tbaa !12
%6 = sdiv i32 %5, 2
store i32 %6, ptr %3, align 8, !tbaa !13
%7 = load i32, ptr @AK4396_SMUTE, align 4, !tbaa !15
%8 = load i32, ptr @AK4396_DEM_OFF, align 4, !tbaa !15
%9 = or i32 %8, %7
%10 = load i32, ptr @AK4396_DFS_NORMAL, align 4, !tbaa !15
%11 = or i32 %9, %10
%12 = getelementptr inbounds %struct.generic_data, ptr %3, i64 0, i32 1
%13 = load ptr, ptr %12, align 8, !tbaa !16
%14 = load ptr, ptr %13, align 8, !tbaa !17
%15 = load i64, ptr @AK4396_CONTROL_2, align 8, !tbaa !18
%16 = getelementptr inbounds i32, ptr %14, i64 %15
store i32 %11, ptr %16, align 4, !tbaa !15
%17 = tail call i32 @ak4396_registers_init(ptr noundef %0) #2
%18 = load i32, ptr %0, align 8, !tbaa !20
%19 = tail call i32 @snd_component_add(i32 noundef %18, ptr noundef nonnull @.str) #2
ret void
}
declare i32 @ak4396_registers_init(ptr noundef) local_unnamed_addr #1
declare i32 @snd_component_add(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"oxygen", !7, i64 0, !10, i64 4, !11, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !7, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !7, i64 4}
!13 = !{!14, !7, i64 0}
!14 = !{!"generic_data", !7, i64 0, !11, i64 8}
!15 = !{!7, !7, i64 0}
!16 = !{!14, !11, i64 8}
!17 = !{!11, !11, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"long", !8, i64 0}
!20 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/oxygen/extr_oxygen.c_ak4396_init.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/oxygen/extr_oxygen.c_ak4396_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AK4396_SMUTE = common local_unnamed_addr global i32 0, align 4
@AK4396_DEM_OFF = common local_unnamed_addr global i32 0, align 4
@AK4396_DFS_NORMAL = common local_unnamed_addr global i32 0, align 4
@AK4396_CONTROL_2 = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [7 x i8] c"AK4396\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ak4396_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ak4396_init(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !13
%6 = sdiv i32 %5, 2
store i32 %6, ptr %3, align 8, !tbaa !14
%7 = load i32, ptr @AK4396_SMUTE, align 4, !tbaa !16
%8 = load i32, ptr @AK4396_DEM_OFF, align 4, !tbaa !16
%9 = or i32 %8, %7
%10 = load i32, ptr @AK4396_DFS_NORMAL, align 4, !tbaa !16
%11 = or i32 %9, %10
%12 = getelementptr inbounds i8, ptr %3, i64 8
%13 = load ptr, ptr %12, align 8, !tbaa !17
%14 = load ptr, ptr %13, align 8, !tbaa !18
%15 = load i64, ptr @AK4396_CONTROL_2, align 8, !tbaa !19
%16 = getelementptr inbounds i32, ptr %14, i64 %15
store i32 %11, ptr %16, align 4, !tbaa !16
%17 = tail call i32 @ak4396_registers_init(ptr noundef %0) #2
%18 = load i32, ptr %0, align 8, !tbaa !21
%19 = tail call i32 @snd_component_add(i32 noundef %18, ptr noundef nonnull @.str) #2
ret void
}
declare i32 @ak4396_registers_init(ptr noundef) local_unnamed_addr #1
declare i32 @snd_component_add(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"oxygen", !8, i64 0, !11, i64 4, !12, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !8, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !8, i64 4}
!14 = !{!15, !8, i64 0}
!15 = !{!"generic_data", !8, i64 0, !12, i64 8}
!16 = !{!8, !8, i64 0}
!17 = !{!15, !12, i64 8}
!18 = !{!12, !12, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"long", !9, i64 0}
!21 = !{!7, !8, i64 0}
|
fastsocket_kernel_sound_pci_oxygen_extr_oxygen.c_ak4396_init
|
; ModuleID = 'AnghaBench/linux/security/tomoyo/extr_util.c_tomoyo_convert_time.c'
source_filename = "AnghaBench/linux/security/tomoyo/extr_util.c_tomoyo_convert_time.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.tm = type { i64, i64, i32, i32, i32, i32 }
%struct.tomoyo_time = type { i64, i64, i32, i32, i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @tomoyo_convert_time(i32 noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = alloca %struct.tm, align 16
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %3) #3
%4 = call i32 @time64_to_tm(i32 noundef %0, i32 noundef 0, ptr noundef nonnull %3) #3
%5 = getelementptr inbounds %struct.tm, ptr %3, i64 0, i32 2
%6 = getelementptr inbounds %struct.tomoyo_time, ptr %1, i64 0, i32 2
%7 = load <4 x i32>, ptr %5, align 16, !tbaa !5
store <4 x i32> %7, ptr %6, align 8, !tbaa !5
%8 = load <2 x i64>, ptr %3, align 16, !tbaa !9
%9 = add nsw <2 x i64> %8, <i64 1900, i64 1>
store <2 x i64> %9, ptr %1, align 8, !tbaa !9
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @time64_to_tm(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/security/tomoyo/extr_util.c_tomoyo_convert_time.c'
source_filename = "AnghaBench/linux/security/tomoyo/extr_util.c_tomoyo_convert_time.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.tm = type { i64, i64, i32, i32, i32, i32 }
; Function Attrs: nounwind ssp uwtable(sync)
define void @tomoyo_convert_time(i32 noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = alloca %struct.tm, align 16
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %3) #3
%4 = call i32 @time64_to_tm(i32 noundef %0, i32 noundef 0, ptr noundef nonnull %3) #3
%5 = getelementptr inbounds i8, ptr %3, i64 16
%6 = getelementptr inbounds i8, ptr %1, i64 16
%7 = load <4 x i32>, ptr %5, align 16, !tbaa !6
store <4 x i32> %7, ptr %6, align 8, !tbaa !6
%8 = load <2 x i64>, ptr %3, align 16, !tbaa !10
%9 = add nsw <2 x i64> %8, <i64 1900, i64 1>
store <2 x i64> %9, ptr %1, align 8, !tbaa !10
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @time64_to_tm(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
|
linux_security_tomoyo_extr_util.c_tomoyo_convert_time
|
; ModuleID = 'AnghaBench/seafile/lib/extr_utils.c_ccnet_expand_path.c'
source_filename = "AnghaBench/seafile/lib/extr_utils.c_ccnet_expand_path.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SEAF_PATH_MAX = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noalias ptr @ccnet_expand_path(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @SEAF_PATH_MAX, align 4, !tbaa !5
%3 = add nsw i32 %2, 1
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4, align 16
%6 = ptrtoint ptr %5 to i64
%7 = icmp eq ptr %0, null
br i1 %7, label %134, label %8
8: ; preds = %1
%9 = load i8, ptr %0, align 1, !tbaa !9
%10 = icmp eq i8 %9, 0
br i1 %10, label %134, label %11
11: ; preds = %8
%12 = tail call i32 @strlen(ptr noundef nonnull %0) #4
%13 = load i32, ptr @SEAF_PATH_MAX, align 4, !tbaa !5
%14 = icmp sgt i32 %12, %13
br i1 %14, label %134, label %15
15: ; preds = %11
store i8 0, ptr %5, align 16, !tbaa !9
%16 = load i8, ptr %0, align 1, !tbaa !9
switch i8 %16, label %51 [
i8 126, label %17
i8 47, label %61
]
17: ; preds = %15, %20
%18 = phi i8 [ %22, %20 ], [ %16, %15 ]
%19 = phi ptr [ %21, %20 ], [ %0, %15 ]
switch i8 %18, label %20 [
i8 47, label %23
i8 0, label %23
]
20: ; preds = %17
%21 = getelementptr inbounds i8, ptr %19, i64 1
%22 = load i8, ptr %21, align 1, !tbaa !9
br label %17, !llvm.loop !10
23: ; preds = %17, %17
%24 = ptrtoint ptr %19 to i64
%25 = ptrtoint ptr %0 to i64
%26 = sub i64 %24, %25
%27 = trunc i64 %26 to i32
%28 = icmp eq i32 %27, 1
br i1 %28, label %29, label %32
29: ; preds = %23
%30 = tail call i32 (...) @geteuid() #4
%31 = tail call ptr @getpwuid(i32 noundef %30) #4
br label %39
32: ; preds = %23
%33 = call i32 @memcpy(ptr noundef nonnull %5, ptr noundef nonnull %0, i32 noundef %27) #4
%34 = shl i64 %26, 32
%35 = ashr exact i64 %34, 32
%36 = getelementptr inbounds i8, ptr %5, i64 %35
store i8 0, ptr %36, align 1, !tbaa !9
%37 = getelementptr inbounds i8, ptr %5, i64 1
%38 = call ptr @getpwnam(ptr noundef nonnull %37)
br label %39
39: ; preds = %32, %29
%40 = phi ptr [ %31, %29 ], [ %38, %32 ]
%41 = icmp eq ptr %40, null
br i1 %41, label %134, label %42
42: ; preds = %39
%43 = load ptr, ptr %40, align 8, !tbaa !12
%44 = call i32 @strlen(ptr noundef %43) #4
%45 = load ptr, ptr %40, align 8, !tbaa !12
%46 = call i32 @memcpy(ptr noundef nonnull %5, ptr noundef %45, i32 noundef %44) #4
%47 = sext i32 %44 to i64
%48 = getelementptr inbounds i8, ptr %5, i64 %47
store i8 0, ptr %48, align 1, !tbaa !9
%49 = load i8, ptr %19, align 1, !tbaa !9
%50 = icmp eq i8 %49, 0
br i1 %50, label %132, label %61
51: ; preds = %15
%52 = call i32 @getcwd(ptr noundef nonnull %5, i32 noundef %13) #4
br label %53
53: ; preds = %53, %51
%54 = phi ptr [ %5, %51 ], [ %57, %53 ]
%55 = load i8, ptr %54, align 1, !tbaa !9
%56 = icmp eq i8 %55, 0
%57 = getelementptr inbounds i8, ptr %54, i64 1
br i1 %56, label %58, label %53, !llvm.loop !15
58: ; preds = %53
%59 = load i8, ptr %0, align 1, !tbaa !9
%60 = icmp eq i8 %59, 0
br i1 %60, label %127, label %61
61: ; preds = %42, %15, %58
%62 = phi i8 [ %16, %15 ], [ %49, %42 ], [ %59, %58 ]
%63 = phi ptr [ %5, %15 ], [ %48, %42 ], [ %54, %58 ]
%64 = phi ptr [ %0, %15 ], [ %19, %42 ], [ %0, %58 ]
br label %65
65: ; preds = %61, %123
%66 = phi i8 [ %125, %123 ], [ %62, %61 ]
%67 = phi ptr [ %124, %123 ], [ %63, %61 ]
%68 = phi ptr [ %81, %123 ], [ %64, %61 ]
%69 = ptrtoint ptr %67 to i64
%70 = icmp eq i8 %66, 47
br i1 %70, label %74, label %71
71: ; preds = %74, %65
%72 = phi i8 [ %66, %65 ], [ %77, %74 ]
%73 = phi ptr [ %68, %65 ], [ %76, %74 ]
br label %79
74: ; preds = %65, %74
%75 = phi ptr [ %76, %74 ], [ %68, %65 ]
%76 = getelementptr inbounds i8, ptr %75, i64 1
%77 = load i8, ptr %76, align 1, !tbaa !9
%78 = icmp eq i8 %77, 47
br i1 %78, label %74, label %71, !llvm.loop !16
79: ; preds = %71, %82
%80 = phi i8 [ %84, %82 ], [ %72, %71 ]
%81 = phi ptr [ %83, %82 ], [ %73, %71 ]
switch i8 %80, label %82 [
i8 47, label %85
i8 0, label %85
]
82: ; preds = %79
%83 = getelementptr inbounds i8, ptr %81, i64 1
%84 = load i8, ptr %83, align 1, !tbaa !9
br label %79, !llvm.loop !17
85: ; preds = %79, %79
%86 = ptrtoint ptr %81 to i64
%87 = ptrtoint ptr %73 to i64
%88 = sub i64 %86, %87
%89 = trunc i64 %88 to i32
switch i32 %89, label %111 [
i32 0, label %90
i32 2, label %92
]
90: ; preds = %85
%91 = getelementptr inbounds i8, ptr %67, i64 1
store i8 47, ptr %67, align 1, !tbaa !9
store i8 0, ptr %91, align 1, !tbaa !9
br label %127
92: ; preds = %85
%93 = icmp eq i8 %72, 46
br i1 %93, label %94, label %115
94: ; preds = %92
%95 = getelementptr inbounds i8, ptr %73, i64 1
%96 = load i8, ptr %95, align 1, !tbaa !9
%97 = icmp eq i8 %96, 46
br i1 %97, label %98, label %115
98: ; preds = %94
%99 = icmp ugt ptr %67, %5
br i1 %99, label %100, label %121
100: ; preds = %98
%101 = getelementptr i8, ptr %67, i64 %6
%102 = sub i64 0, %69
%103 = getelementptr i8, ptr %101, i64 %102
br label %104
104: ; preds = %100, %108
%105 = phi ptr [ %109, %108 ], [ %67, %100 ]
%106 = load i8, ptr %105, align 1, !tbaa !9
%107 = icmp eq i8 %106, 47
br i1 %107, label %121, label %108
108: ; preds = %104
%109 = getelementptr inbounds i8, ptr %105, i64 -1
%110 = icmp ugt ptr %109, %5
br i1 %110, label %104, label %121, !llvm.loop !18
111: ; preds = %85
%112 = icmp ne i8 %72, 46
%113 = icmp ne i32 %89, 1
%114 = or i1 %112, %113
br i1 %114, label %115, label %123
115: ; preds = %94, %92, %111
%116 = getelementptr inbounds i8, ptr %67, i64 1
store i8 47, ptr %67, align 1, !tbaa !9
%117 = call i32 @memcpy(ptr noundef nonnull %116, ptr noundef nonnull %73, i32 noundef %89) #4
%118 = shl i64 %88, 32
%119 = ashr exact i64 %118, 32
%120 = getelementptr inbounds i8, ptr %116, i64 %119
br label %121
121: ; preds = %108, %104, %98, %115
%122 = phi ptr [ %120, %115 ], [ %67, %98 ], [ %103, %108 ], [ %105, %104 ]
store i8 0, ptr %122, align 1, !tbaa !9
br label %123
123: ; preds = %121, %111
%124 = phi ptr [ %67, %111 ], [ %122, %121 ]
%125 = load i8, ptr %81, align 1, !tbaa !9
%126 = icmp eq i8 %125, 0
br i1 %126, label %127, label %65, !llvm.loop !19
127: ; preds = %123, %58, %90
%128 = load i8, ptr %5, align 16, !tbaa !9
%129 = icmp eq i8 %128, 0
br i1 %129, label %130, label %132
130: ; preds = %127
store i8 47, ptr %5, align 16, !tbaa !9
%131 = getelementptr inbounds i8, ptr %5, i64 1
store i8 0, ptr %131, align 1, !tbaa !9
br label %132
132: ; preds = %127, %130, %42
%133 = call ptr @strdup(ptr noundef nonnull %5)
br label %134
134: ; preds = %132, %39, %11, %1, %8
%135 = phi ptr [ null, %8 ], [ null, %1 ], [ null, %11 ], [ null, %39 ], [ %133, %132 ]
ret ptr %135
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare ptr @getpwuid(i32 noundef) local_unnamed_addr #1
declare i32 @geteuid(...) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef ptr @getpwnam(ptr nocapture noundef readonly) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias ptr @strdup(ptr nocapture noundef readonly) local_unnamed_addr #3
declare i32 @getcwd(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !14, i64 0}
!13 = !{!"passwd", !14, i64 0}
!14 = !{!"any pointer", !7, i64 0}
!15 = distinct !{!15, !11}
!16 = distinct !{!16, !11}
!17 = distinct !{!17, !11}
!18 = distinct !{!18, !11}
!19 = distinct !{!19, !11}
|
; ModuleID = 'AnghaBench/seafile/lib/extr_utils.c_ccnet_expand_path.c'
source_filename = "AnghaBench/seafile/lib/extr_utils.c_ccnet_expand_path.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SEAF_PATH_MAX = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @ccnet_expand_path(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @SEAF_PATH_MAX, align 4, !tbaa !6
%3 = add nsw i32 %2, 1
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4, align 1
%6 = ptrtoint ptr %5 to i64
%7 = icmp eq ptr %0, null
br i1 %7, label %134, label %8
8: ; preds = %1
%9 = load i8, ptr %0, align 1, !tbaa !10
%10 = icmp eq i8 %9, 0
br i1 %10, label %134, label %11
11: ; preds = %8
%12 = tail call i32 @strlen(ptr noundef nonnull %0) #4
%13 = load i32, ptr @SEAF_PATH_MAX, align 4, !tbaa !6
%14 = icmp sgt i32 %12, %13
br i1 %14, label %134, label %15
15: ; preds = %11
store i8 0, ptr %5, align 1, !tbaa !10
%16 = load i8, ptr %0, align 1, !tbaa !10
switch i8 %16, label %51 [
i8 126, label %17
i8 47, label %61
]
17: ; preds = %15, %20
%18 = phi i8 [ %22, %20 ], [ %16, %15 ]
%19 = phi ptr [ %21, %20 ], [ %0, %15 ]
switch i8 %18, label %20 [
i8 47, label %23
i8 0, label %23
]
20: ; preds = %17
%21 = getelementptr inbounds i8, ptr %19, i64 1
%22 = load i8, ptr %21, align 1, !tbaa !10
br label %17, !llvm.loop !11
23: ; preds = %17, %17
%24 = ptrtoint ptr %19 to i64
%25 = ptrtoint ptr %0 to i64
%26 = sub i64 %24, %25
%27 = trunc i64 %26 to i32
%28 = icmp eq i32 %27, 1
br i1 %28, label %29, label %32
29: ; preds = %23
%30 = tail call i32 @geteuid() #4
%31 = tail call ptr @getpwuid(i32 noundef %30) #4
br label %39
32: ; preds = %23
%33 = call i32 @memcpy(ptr noundef nonnull %5, ptr noundef nonnull %0, i32 noundef %27) #4
%34 = shl i64 %26, 32
%35 = ashr exact i64 %34, 32
%36 = getelementptr inbounds i8, ptr %5, i64 %35
store i8 0, ptr %36, align 1, !tbaa !10
%37 = getelementptr inbounds i8, ptr %5, i64 1
%38 = call ptr @getpwnam(ptr noundef nonnull %37)
br label %39
39: ; preds = %32, %29
%40 = phi ptr [ %31, %29 ], [ %38, %32 ]
%41 = icmp eq ptr %40, null
br i1 %41, label %134, label %42
42: ; preds = %39
%43 = load ptr, ptr %40, align 8, !tbaa !13
%44 = call i32 @strlen(ptr noundef %43) #4
%45 = load ptr, ptr %40, align 8, !tbaa !13
%46 = call i32 @memcpy(ptr noundef nonnull %5, ptr noundef %45, i32 noundef %44) #4
%47 = sext i32 %44 to i64
%48 = getelementptr inbounds i8, ptr %5, i64 %47
store i8 0, ptr %48, align 1, !tbaa !10
%49 = load i8, ptr %19, align 1, !tbaa !10
%50 = icmp eq i8 %49, 0
br i1 %50, label %132, label %61
51: ; preds = %15
%52 = call i32 @getcwd(ptr noundef nonnull %5, i32 noundef %13) #4
br label %53
53: ; preds = %53, %51
%54 = phi ptr [ %5, %51 ], [ %57, %53 ]
%55 = load i8, ptr %54, align 1, !tbaa !10
%56 = icmp eq i8 %55, 0
%57 = getelementptr inbounds i8, ptr %54, i64 1
br i1 %56, label %58, label %53, !llvm.loop !16
58: ; preds = %53
%59 = load i8, ptr %0, align 1, !tbaa !10
%60 = icmp eq i8 %59, 0
br i1 %60, label %127, label %61
61: ; preds = %42, %15, %58
%62 = phi i8 [ %16, %15 ], [ %49, %42 ], [ %59, %58 ]
%63 = phi ptr [ %5, %15 ], [ %48, %42 ], [ %54, %58 ]
%64 = phi ptr [ %0, %15 ], [ %19, %42 ], [ %0, %58 ]
br label %65
65: ; preds = %61, %123
%66 = phi i8 [ %125, %123 ], [ %62, %61 ]
%67 = phi ptr [ %124, %123 ], [ %63, %61 ]
%68 = phi ptr [ %81, %123 ], [ %64, %61 ]
%69 = ptrtoint ptr %67 to i64
%70 = icmp eq i8 %66, 47
br i1 %70, label %74, label %71
71: ; preds = %74, %65
%72 = phi i8 [ %66, %65 ], [ %77, %74 ]
%73 = phi ptr [ %68, %65 ], [ %76, %74 ]
br label %79
74: ; preds = %65, %74
%75 = phi ptr [ %76, %74 ], [ %68, %65 ]
%76 = getelementptr inbounds i8, ptr %75, i64 1
%77 = load i8, ptr %76, align 1, !tbaa !10
%78 = icmp eq i8 %77, 47
br i1 %78, label %74, label %71, !llvm.loop !17
79: ; preds = %71, %82
%80 = phi i8 [ %84, %82 ], [ %72, %71 ]
%81 = phi ptr [ %83, %82 ], [ %73, %71 ]
switch i8 %80, label %82 [
i8 47, label %85
i8 0, label %85
]
82: ; preds = %79
%83 = getelementptr inbounds i8, ptr %81, i64 1
%84 = load i8, ptr %83, align 1, !tbaa !10
br label %79, !llvm.loop !18
85: ; preds = %79, %79
%86 = ptrtoint ptr %81 to i64
%87 = ptrtoint ptr %73 to i64
%88 = sub i64 %86, %87
%89 = trunc i64 %88 to i32
switch i32 %89, label %111 [
i32 0, label %90
i32 2, label %92
]
90: ; preds = %85
%91 = getelementptr inbounds i8, ptr %67, i64 1
store i8 47, ptr %67, align 1, !tbaa !10
store i8 0, ptr %91, align 1, !tbaa !10
br label %127
92: ; preds = %85
%93 = icmp eq i8 %72, 46
br i1 %93, label %94, label %115
94: ; preds = %92
%95 = getelementptr inbounds i8, ptr %73, i64 1
%96 = load i8, ptr %95, align 1, !tbaa !10
%97 = icmp eq i8 %96, 46
br i1 %97, label %98, label %115
98: ; preds = %94
%99 = icmp ugt ptr %67, %5
br i1 %99, label %100, label %121
100: ; preds = %98
%101 = getelementptr i8, ptr %67, i64 %6
%102 = sub i64 0, %69
%103 = getelementptr i8, ptr %101, i64 %102
br label %104
104: ; preds = %100, %108
%105 = phi ptr [ %109, %108 ], [ %67, %100 ]
%106 = load i8, ptr %105, align 1, !tbaa !10
%107 = icmp eq i8 %106, 47
br i1 %107, label %121, label %108
108: ; preds = %104
%109 = getelementptr inbounds i8, ptr %105, i64 -1
%110 = icmp ugt ptr %109, %5
br i1 %110, label %104, label %121, !llvm.loop !19
111: ; preds = %85
%112 = icmp ne i8 %72, 46
%113 = icmp ne i32 %89, 1
%114 = or i1 %112, %113
br i1 %114, label %115, label %123
115: ; preds = %94, %92, %111
%116 = getelementptr inbounds i8, ptr %67, i64 1
store i8 47, ptr %67, align 1, !tbaa !10
%117 = call i32 @memcpy(ptr noundef nonnull %116, ptr noundef nonnull %73, i32 noundef %89) #4
%118 = shl i64 %88, 32
%119 = ashr exact i64 %118, 32
%120 = getelementptr inbounds i8, ptr %116, i64 %119
br label %121
121: ; preds = %108, %104, %98, %115
%122 = phi ptr [ %120, %115 ], [ %67, %98 ], [ %103, %108 ], [ %105, %104 ]
store i8 0, ptr %122, align 1, !tbaa !10
br label %123
123: ; preds = %121, %111
%124 = phi ptr [ %67, %111 ], [ %122, %121 ]
%125 = load i8, ptr %81, align 1, !tbaa !10
%126 = icmp eq i8 %125, 0
br i1 %126, label %127, label %65, !llvm.loop !20
127: ; preds = %123, %58, %90
%128 = load i8, ptr %5, align 1, !tbaa !10
%129 = icmp eq i8 %128, 0
br i1 %129, label %130, label %132
130: ; preds = %127
store i8 47, ptr %5, align 1, !tbaa !10
%131 = getelementptr inbounds i8, ptr %5, i64 1
store i8 0, ptr %131, align 1, !tbaa !10
br label %132
132: ; preds = %127, %130, %42
%133 = call ptr @strdup(ptr noundef nonnull %5)
br label %134
134: ; preds = %132, %39, %11, %1, %8
%135 = phi ptr [ null, %8 ], [ null, %1 ], [ null, %11 ], [ null, %39 ], [ %133, %132 ]
ret ptr %135
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare ptr @getpwuid(i32 noundef) local_unnamed_addr #1
declare i32 @geteuid(...) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef ptr @getpwnam(ptr nocapture noundef readonly) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias ptr @strdup(ptr nocapture noundef readonly) local_unnamed_addr #3
declare i32 @getcwd(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !15, i64 0}
!14 = !{!"passwd", !15, i64 0}
!15 = !{!"any pointer", !8, i64 0}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}
!18 = distinct !{!18, !12}
!19 = distinct !{!19, !12}
!20 = distinct !{!20, !12}
|
seafile_lib_extr_utils.c_ccnet_expand_path
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/ezchip/extr_nps_enet.c_nps_enet_open.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/ezchip/extr_nps_enet.c_nps_enet_open.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nps_enet_priv = type { i32, i32, i32, i64, ptr }
@NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH = dso_local local_unnamed_addr global i32 0, align 4
@CFG_3_RX_IFG_TH_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@NPS_ENET_GE_MAC_CFG_3_MAX_LEN = dso_local local_unnamed_addr global i32 0, align 4
@CFG_3_MAX_LEN_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@nps_enet_irq_handler = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [11 x i8] c"enet-rx-tx\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @nps_enet_open], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @nps_enet_open(ptr noundef %0) #0 {
%2 = tail call ptr @netdev_priv(ptr noundef %0) #3
%3 = getelementptr inbounds %struct.nps_enet_priv, ptr %2, i64 0, i32 3
store i32 0, ptr %2, align 8, !tbaa !5
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %3, i8 0, i64 16, i1 false)
%4 = load i32, ptr @NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH, align 4, !tbaa !12
%5 = load i32, ptr @CFG_3_RX_IFG_TH_SHIFT, align 4, !tbaa !12
%6 = shl i32 %4, %5
store i32 %6, ptr %2, align 8, !tbaa !5
%7 = load i32, ptr @NPS_ENET_GE_MAC_CFG_3_MAX_LEN, align 4, !tbaa !12
%8 = load i32, ptr @CFG_3_MAX_LEN_SHIFT, align 4, !tbaa !12
%9 = shl i32 %7, %8
%10 = or i32 %9, %6
store i32 %10, ptr %2, align 8, !tbaa !5
%11 = tail call i32 @nps_enet_hw_disable_control(ptr noundef %0) #3
%12 = getelementptr inbounds %struct.nps_enet_priv, ptr %2, i64 0, i32 2
%13 = load i32, ptr %12, align 8, !tbaa !13
%14 = load i32, ptr @nps_enet_irq_handler, align 4, !tbaa !12
%15 = tail call i64 @request_irq(i32 noundef %13, i32 noundef %14, i32 noundef 0, ptr noundef nonnull @.str, ptr noundef %0) #3
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %23
17: ; preds = %1
%18 = getelementptr inbounds %struct.nps_enet_priv, ptr %2, i64 0, i32 1
%19 = tail call i32 @napi_enable(ptr noundef nonnull %18) #3
%20 = tail call i32 @nps_enet_hw_reset(ptr noundef %0) #3
%21 = tail call i32 @nps_enet_hw_enable_control(ptr noundef %0) #3
%22 = tail call i32 @netif_start_queue(ptr noundef %0) #3
br label %23
23: ; preds = %1, %17
ret i64 %15
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @nps_enet_hw_disable_control(ptr noundef) local_unnamed_addr #1
declare i64 @request_irq(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @napi_enable(ptr noundef) local_unnamed_addr #1
declare i32 @nps_enet_hw_reset(ptr noundef) local_unnamed_addr #1
declare i32 @nps_enet_hw_enable_control(ptr noundef) local_unnamed_addr #1
declare i32 @netif_start_queue(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"nps_enet_priv", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !11, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/ezchip/extr_nps_enet.c_nps_enet_open.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/ezchip/extr_nps_enet.c_nps_enet_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH = common local_unnamed_addr global i32 0, align 4
@CFG_3_RX_IFG_TH_SHIFT = common local_unnamed_addr global i32 0, align 4
@NPS_ENET_GE_MAC_CFG_3_MAX_LEN = common local_unnamed_addr global i32 0, align 4
@CFG_3_MAX_LEN_SHIFT = common local_unnamed_addr global i32 0, align 4
@nps_enet_irq_handler = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [11 x i8] c"enet-rx-tx\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @nps_enet_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @nps_enet_open(ptr noundef %0) #0 {
%2 = tail call ptr @netdev_priv(ptr noundef %0) #3
%3 = getelementptr inbounds i8, ptr %2, i64 16
store i32 0, ptr %2, align 8, !tbaa !6
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %3, i8 0, i64 16, i1 false)
%4 = load i32, ptr @NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH, align 4, !tbaa !13
%5 = load i32, ptr @CFG_3_RX_IFG_TH_SHIFT, align 4, !tbaa !13
%6 = shl i32 %4, %5
store i32 %6, ptr %2, align 8, !tbaa !6
%7 = load i32, ptr @NPS_ENET_GE_MAC_CFG_3_MAX_LEN, align 4, !tbaa !13
%8 = load i32, ptr @CFG_3_MAX_LEN_SHIFT, align 4, !tbaa !13
%9 = shl i32 %7, %8
%10 = or i32 %9, %6
store i32 %10, ptr %2, align 8, !tbaa !6
%11 = tail call i32 @nps_enet_hw_disable_control(ptr noundef %0) #3
%12 = getelementptr inbounds i8, ptr %2, i64 8
%13 = load i32, ptr %12, align 8, !tbaa !14
%14 = load i32, ptr @nps_enet_irq_handler, align 4, !tbaa !13
%15 = tail call i64 @request_irq(i32 noundef %13, i32 noundef %14, i32 noundef 0, ptr noundef nonnull @.str, ptr noundef %0) #3
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %23
17: ; preds = %1
%18 = getelementptr inbounds i8, ptr %2, i64 4
%19 = tail call i32 @napi_enable(ptr noundef nonnull %18) #3
%20 = tail call i32 @nps_enet_hw_reset(ptr noundef %0) #3
%21 = tail call i32 @nps_enet_hw_enable_control(ptr noundef %0) #3
%22 = tail call i32 @netif_start_queue(ptr noundef %0) #3
br label %23
23: ; preds = %1, %17
ret i64 %15
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @nps_enet_hw_disable_control(ptr noundef) local_unnamed_addr #1
declare i64 @request_irq(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @napi_enable(ptr noundef) local_unnamed_addr #1
declare i32 @nps_enet_hw_reset(ptr noundef) local_unnamed_addr #1
declare i32 @nps_enet_hw_enable_control(ptr noundef) local_unnamed_addr #1
declare i32 @netif_start_queue(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"nps_enet_priv", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16, !12, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !8, i64 8}
|
linux_drivers_net_ethernet_ezchip_extr_nps_enet.c_nps_enet_open
|
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/common/nvpair/extr_opensolaris_nvpair.c_nvs_xdr_nvl_fini.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/common/nvpair/extr_opensolaris_nvpair.c_nvs_xdr_nvl_fini.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i64, ptr }
@NVS_OP_ENCODE = dso_local local_unnamed_addr global i64 0, align 8
@EFAULT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nvs_xdr_nvl_fini], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nvs_xdr_nvl_fini(ptr nocapture noundef readonly %0) #0 {
%2 = alloca i32, align 4
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = load i64, ptr @NVS_OP_ENCODE, align 8, !tbaa !11
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %17
6: ; preds = %1
%7 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%8 = load ptr, ptr %7, align 8, !tbaa !12
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !13
%9 = call i32 @xdr_int(ptr noundef %8, ptr noundef nonnull %2) #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %6
%12 = call i32 @xdr_int(ptr noundef %8, ptr noundef nonnull %2) #3
%13 = icmp eq i32 %12, 0
br i1 %13, label %15, label %14
14: ; preds = %11
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %17
15: ; preds = %6, %11
%16 = load i32, ptr @EFAULT, align 4, !tbaa !13
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %17
17: ; preds = %1, %14, %15
%18 = phi i32 [ %16, %15 ], [ 0, %14 ], [ 0, %1 ]
ret i32 %18
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @xdr_int(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/common/nvpair/extr_opensolaris_nvpair.c_nvs_xdr_nvl_fini.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/common/nvpair/extr_opensolaris_nvpair.c_nvs_xdr_nvl_fini.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NVS_OP_ENCODE = common local_unnamed_addr global i64 0, align 8
@EFAULT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nvs_xdr_nvl_fini], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @nvs_xdr_nvl_fini(ptr nocapture noundef readonly %0) #0 {
%2 = alloca i32, align 4
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = load i64, ptr @NVS_OP_ENCODE, align 8, !tbaa !12
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %17
6: ; preds = %1
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load ptr, ptr %7, align 8, !tbaa !13
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !14
%9 = call i32 @xdr_int(ptr noundef %8, ptr noundef nonnull %2) #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %6
%12 = call i32 @xdr_int(ptr noundef %8, ptr noundef nonnull %2) #3
%13 = icmp eq i32 %12, 0
br i1 %13, label %15, label %14
14: ; preds = %11
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %17
15: ; preds = %6, %11
%16 = load i32, ptr @EFAULT, align 4, !tbaa !14
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %17
17: ; preds = %1, %14, %15
%18 = phi i32 [ %16, %15 ], [ 0, %14 ], [ 0, %1 ]
ret i32 %18
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @xdr_int(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !9, i64 0}
|
freebsd_sys_cddl_contrib_opensolaris_common_nvpair_extr_opensolaris_nvpair.c_nvs_xdr_nvl_fini
|
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_cfgrtl.c_need_fake_edge_p.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_cfgrtl.c_need_fake_edge_p.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@REG_NORETURN = dso_local local_unnamed_addr global i32 0, align 4
@ASM_OPERANDS = dso_local local_unnamed_addr global i64 0, align 8
@PARALLEL = dso_local local_unnamed_addr global i64 0, align 8
@ASM_INPUT = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @need_fake_edge_p], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @need_fake_edge_p(i32 noundef %0) #0 {
%2 = tail call i32 @INSN_P(i32 noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %45, label %4
4: ; preds = %1
%5 = tail call i64 @CALL_P(i32 noundef %0) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %17, label %7
7: ; preds = %4
%8 = tail call i32 @SIBLING_CALL_P(i32 noundef %0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = load i32, ptr @REG_NORETURN, align 4, !tbaa !5
%12 = tail call i32 @find_reg_note(i32 noundef %0, i32 noundef %11, ptr noundef null) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %10
%15 = tail call i32 @CONST_OR_PURE_CALL_P(i32 noundef %0) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %45, label %17
17: ; preds = %14, %10, %7, %4
%18 = tail call i32 @PATTERN(i32 noundef %0) #2
%19 = tail call i64 @GET_CODE(i32 noundef %18) #2
%20 = load i64, ptr @ASM_OPERANDS, align 8, !tbaa !9
%21 = icmp eq i64 %19, %20
br i1 %21, label %22, label %26
22: ; preds = %17
%23 = tail call i32 @PATTERN(i32 noundef %0) #2
%24 = tail call i64 @MEM_VOLATILE_P(i32 noundef %23) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %26, label %45
26: ; preds = %22, %17
%27 = tail call i32 @PATTERN(i32 noundef %0) #2
%28 = tail call i64 @GET_CODE(i32 noundef %27) #2
%29 = load i64, ptr @PARALLEL, align 8, !tbaa !9
%30 = icmp eq i64 %28, %29
br i1 %30, label %31, label %39
31: ; preds = %26
%32 = tail call i32 @asm_noperands(i32 noundef %0) #2
%33 = icmp eq i32 %32, -1
br i1 %33, label %39, label %34
34: ; preds = %31
%35 = tail call i32 @PATTERN(i32 noundef %0) #2
%36 = tail call i32 @XVECEXP(i32 noundef %35, i32 noundef 0, i32 noundef 0) #2
%37 = tail call i64 @MEM_VOLATILE_P(i32 noundef %36) #2
%38 = icmp eq i64 %37, 0
br i1 %38, label %39, label %45
39: ; preds = %34, %31, %26
%40 = tail call i32 @PATTERN(i32 noundef %0) #2
%41 = tail call i64 @GET_CODE(i32 noundef %40) #2
%42 = load i64, ptr @ASM_INPUT, align 8, !tbaa !9
%43 = icmp eq i64 %41, %42
%44 = zext i1 %43 to i32
br label %45
45: ; preds = %22, %34, %39, %14, %1
%46 = phi i32 [ 0, %1 ], [ 1, %14 ], [ 1, %34 ], [ 1, %22 ], [ %44, %39 ]
ret i32 %46
}
declare i32 @INSN_P(i32 noundef) local_unnamed_addr #1
declare i64 @CALL_P(i32 noundef) local_unnamed_addr #1
declare i32 @SIBLING_CALL_P(i32 noundef) local_unnamed_addr #1
declare i32 @find_reg_note(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @CONST_OR_PURE_CALL_P(i32 noundef) local_unnamed_addr #1
declare i64 @GET_CODE(i32 noundef) local_unnamed_addr #1
declare i32 @PATTERN(i32 noundef) local_unnamed_addr #1
declare i64 @MEM_VOLATILE_P(i32 noundef) local_unnamed_addr #1
declare i32 @asm_noperands(i32 noundef) local_unnamed_addr #1
declare i32 @XVECEXP(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_cfgrtl.c_need_fake_edge_p.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_cfgrtl.c_need_fake_edge_p.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REG_NORETURN = common local_unnamed_addr global i32 0, align 4
@ASM_OPERANDS = common local_unnamed_addr global i64 0, align 8
@PARALLEL = common local_unnamed_addr global i64 0, align 8
@ASM_INPUT = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @need_fake_edge_p], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @need_fake_edge_p(i32 noundef %0) #0 {
%2 = tail call i32 @INSN_P(i32 noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %45, label %4
4: ; preds = %1
%5 = tail call i64 @CALL_P(i32 noundef %0) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %17, label %7
7: ; preds = %4
%8 = tail call i32 @SIBLING_CALL_P(i32 noundef %0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = load i32, ptr @REG_NORETURN, align 4, !tbaa !6
%12 = tail call i32 @find_reg_note(i32 noundef %0, i32 noundef %11, ptr noundef null) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %10
%15 = tail call i32 @CONST_OR_PURE_CALL_P(i32 noundef %0) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %45, label %17
17: ; preds = %14, %10, %7, %4
%18 = tail call i32 @PATTERN(i32 noundef %0) #2
%19 = tail call i64 @GET_CODE(i32 noundef %18) #2
%20 = load i64, ptr @ASM_OPERANDS, align 8, !tbaa !10
%21 = icmp eq i64 %19, %20
br i1 %21, label %22, label %26
22: ; preds = %17
%23 = tail call i32 @PATTERN(i32 noundef %0) #2
%24 = tail call i64 @MEM_VOLATILE_P(i32 noundef %23) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %26, label %45
26: ; preds = %22, %17
%27 = tail call i32 @PATTERN(i32 noundef %0) #2
%28 = tail call i64 @GET_CODE(i32 noundef %27) #2
%29 = load i64, ptr @PARALLEL, align 8, !tbaa !10
%30 = icmp eq i64 %28, %29
br i1 %30, label %31, label %39
31: ; preds = %26
%32 = tail call i32 @asm_noperands(i32 noundef %0) #2
%33 = icmp eq i32 %32, -1
br i1 %33, label %39, label %34
34: ; preds = %31
%35 = tail call i32 @PATTERN(i32 noundef %0) #2
%36 = tail call i32 @XVECEXP(i32 noundef %35, i32 noundef 0, i32 noundef 0) #2
%37 = tail call i64 @MEM_VOLATILE_P(i32 noundef %36) #2
%38 = icmp eq i64 %37, 0
br i1 %38, label %39, label %45
39: ; preds = %34, %31, %26
%40 = tail call i32 @PATTERN(i32 noundef %0) #2
%41 = tail call i64 @GET_CODE(i32 noundef %40) #2
%42 = load i64, ptr @ASM_INPUT, align 8, !tbaa !10
%43 = icmp eq i64 %41, %42
%44 = zext i1 %43 to i32
br label %45
45: ; preds = %22, %34, %39, %14, %1
%46 = phi i32 [ 0, %1 ], [ 1, %14 ], [ 1, %34 ], [ 1, %22 ], [ %44, %39 ]
ret i32 %46
}
declare i32 @INSN_P(i32 noundef) local_unnamed_addr #1
declare i64 @CALL_P(i32 noundef) local_unnamed_addr #1
declare i32 @SIBLING_CALL_P(i32 noundef) local_unnamed_addr #1
declare i32 @find_reg_note(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @CONST_OR_PURE_CALL_P(i32 noundef) local_unnamed_addr #1
declare i64 @GET_CODE(i32 noundef) local_unnamed_addr #1
declare i32 @PATTERN(i32 noundef) local_unnamed_addr #1
declare i64 @MEM_VOLATILE_P(i32 noundef) local_unnamed_addr #1
declare i32 @asm_noperands(i32 noundef) local_unnamed_addr #1
declare i32 @XVECEXP(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
|
freebsd_contrib_gcc_extr_cfgrtl.c_need_fake_edge_p
|
; ModuleID = 'AnghaBench/freebsd/sys/powerpc/powerpc/extr_intr_machdep.c_powerpc_intr_mask.c'
source_filename = "AnghaBench/freebsd/sys/powerpc/powerpc/extr_intr_machdep.c_powerpc_intr_mask.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.powerpc_intr = type { i32, i32, ptr }
; Function Attrs: nounwind uwtable
define dso_local void @powerpc_intr_mask(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @intr_lookup(i32 noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.powerpc_intr, ptr %2, i64 0, i32 2
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = icmp eq ptr %6, null
br i1 %7, label %13, label %8
8: ; preds = %4
%9 = getelementptr inbounds %struct.powerpc_intr, ptr %2, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !11
%11 = load i32, ptr %2, align 8, !tbaa !12
%12 = tail call i32 @PIC_MASK(ptr noundef nonnull %6, i32 noundef %10, i32 noundef %11) #2
br label %13
13: ; preds = %1, %4, %8
ret void
}
declare ptr @intr_lookup(i32 noundef) local_unnamed_addr #1
declare i32 @PIC_MASK(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"powerpc_intr", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/powerpc/powerpc/extr_intr_machdep.c_powerpc_intr_mask.c'
source_filename = "AnghaBench/freebsd/sys/powerpc/powerpc/extr_intr_machdep.c_powerpc_intr_mask.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @powerpc_intr_mask(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @intr_lookup(i32 noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %2, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = icmp eq ptr %6, null
br i1 %7, label %13, label %8
8: ; preds = %4
%9 = getelementptr inbounds i8, ptr %2, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !12
%11 = load i32, ptr %2, align 8, !tbaa !13
%12 = tail call i32 @PIC_MASK(ptr noundef nonnull %6, i32 noundef %10, i32 noundef %11) #2
br label %13
13: ; preds = %1, %4, %8
ret void
}
declare ptr @intr_lookup(i32 noundef) local_unnamed_addr #1
declare i32 @PIC_MASK(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"powerpc_intr", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!7, !8, i64 0}
|
freebsd_sys_powerpc_powerpc_extr_intr_machdep.c_powerpc_intr_mask
|
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/crypt32/extr_encode.c_test_encodeFiletime.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/crypt32/extr_encode.c_test_encodeFiletime.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@times = dso_local local_unnamed_addr global ptr null, align 8
@X509_CHOICE_OF_TIME = dso_local local_unnamed_addr global i32 0, align 4
@PKCS_UTC_TIME = dso_local local_unnamed_addr global i32 0, align 4
@szOID_RSA_signingTime = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @test_encodeFiletime], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @test_encodeFiletime(i64 noundef %0) #0 {
%2 = load ptr, ptr @times, align 8, !tbaa !5
%3 = tail call i64 @ARRAY_SIZE(ptr noundef %2) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %23, label %5
5: ; preds = %1, %5
%6 = phi i64 [ %19, %5 ], [ 0, %1 ]
%7 = load i32, ptr @X509_CHOICE_OF_TIME, align 4, !tbaa !9
%8 = load ptr, ptr @times, align 8, !tbaa !5
%9 = getelementptr inbounds i32, ptr %8, i64 %6
%10 = tail call i32 @testTimeEncoding(i64 noundef %0, i32 noundef %7, ptr noundef %9) #2
%11 = load i32, ptr @PKCS_UTC_TIME, align 4, !tbaa !9
%12 = load ptr, ptr @times, align 8, !tbaa !5
%13 = getelementptr inbounds i32, ptr %12, i64 %6
%14 = tail call i32 @testTimeEncoding(i64 noundef %0, i32 noundef %11, ptr noundef %13) #2
%15 = load i32, ptr @szOID_RSA_signingTime, align 4, !tbaa !9
%16 = load ptr, ptr @times, align 8, !tbaa !5
%17 = getelementptr inbounds i32, ptr %16, i64 %6
%18 = tail call i32 @testTimeEncoding(i64 noundef %0, i32 noundef %15, ptr noundef %17) #2
%19 = add nuw i64 %6, 1
%20 = load ptr, ptr @times, align 8, !tbaa !5
%21 = tail call i64 @ARRAY_SIZE(ptr noundef %20) #2
%22 = icmp ult i64 %19, %21
br i1 %22, label %5, label %23, !llvm.loop !11
23: ; preds = %5, %1
ret void
}
declare i64 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @testTimeEncoding(i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/crypt32/extr_encode.c_test_encodeFiletime.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/crypt32/extr_encode.c_test_encodeFiletime.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@times = common local_unnamed_addr global ptr null, align 8
@X509_CHOICE_OF_TIME = common local_unnamed_addr global i32 0, align 4
@PKCS_UTC_TIME = common local_unnamed_addr global i32 0, align 4
@szOID_RSA_signingTime = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @test_encodeFiletime], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @test_encodeFiletime(i64 noundef %0) #0 {
%2 = load ptr, ptr @times, align 8, !tbaa !6
%3 = tail call i64 @ARRAY_SIZE(ptr noundef %2) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %23, label %5
5: ; preds = %1, %5
%6 = phi i64 [ %19, %5 ], [ 0, %1 ]
%7 = load i32, ptr @X509_CHOICE_OF_TIME, align 4, !tbaa !10
%8 = load ptr, ptr @times, align 8, !tbaa !6
%9 = getelementptr inbounds i32, ptr %8, i64 %6
%10 = tail call i32 @testTimeEncoding(i64 noundef %0, i32 noundef %7, ptr noundef %9) #2
%11 = load i32, ptr @PKCS_UTC_TIME, align 4, !tbaa !10
%12 = load ptr, ptr @times, align 8, !tbaa !6
%13 = getelementptr inbounds i32, ptr %12, i64 %6
%14 = tail call i32 @testTimeEncoding(i64 noundef %0, i32 noundef %11, ptr noundef %13) #2
%15 = load i32, ptr @szOID_RSA_signingTime, align 4, !tbaa !10
%16 = load ptr, ptr @times, align 8, !tbaa !6
%17 = getelementptr inbounds i32, ptr %16, i64 %6
%18 = tail call i32 @testTimeEncoding(i64 noundef %0, i32 noundef %15, ptr noundef %17) #2
%19 = add nuw i64 %6, 1
%20 = load ptr, ptr @times, align 8, !tbaa !6
%21 = tail call i64 @ARRAY_SIZE(ptr noundef %20) #2
%22 = icmp ult i64 %19, %21
br i1 %22, label %5, label %23, !llvm.loop !12
23: ; preds = %5, %1
ret void
}
declare i64 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @testTimeEncoding(i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
|
reactos_modules_rostests_winetests_crypt32_extr_encode.c_test_encodeFiletime
|
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_scsp.c_ScspChangeSoundCore.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_scsp.c_ScspChangeSoundCore.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, ptr, ptr, ptr, ptr, i64, ptr }
@SNDCore = dso_local local_unnamed_addr global ptr null, align 8
@SNDCORE_DEFAULT = dso_local local_unnamed_addr global i32 0, align 4
@SNDCoreList = dso_local local_unnamed_addr global ptr null, align 8
@SNDDummy = dso_local global %struct.TYPE_4__ zeroinitializer, align 8
@YAB_ERR_CANNOTINIT = dso_local local_unnamed_addr global i32 0, align 4
@scsp_mute_flags = dso_local local_unnamed_addr global i64 0, align 8
@scsp_volume = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @ScspChangeSoundCore(i32 noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr @SNDCore, align 8, !tbaa !5
%3 = icmp eq ptr %2, null
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.TYPE_4__, ptr %2, i64 0, i32 6
%6 = load ptr, ptr %5, align 8, !tbaa !9
%7 = tail call i32 (...) %6() #2
br label %8
8: ; preds = %4, %1
%9 = load i32, ptr @SNDCORE_DEFAULT, align 4, !tbaa !13
%10 = icmp eq i32 %9, %0
%11 = select i1 %10, i32 0, i32 %0
%12 = load ptr, ptr @SNDCoreList, align 8, !tbaa !5
%13 = load ptr, ptr %12, align 8, !tbaa !5
%14 = icmp eq ptr %13, null
br i1 %14, label %26, label %20
15: ; preds = %20
%16 = add nuw i64 %21, 1
%17 = getelementptr inbounds ptr, ptr %12, i64 %16
%18 = load ptr, ptr %17, align 8, !tbaa !5
%19 = icmp eq ptr %18, null
br i1 %19, label %26, label %20, !llvm.loop !14
20: ; preds = %8, %15
%21 = phi i64 [ %16, %15 ], [ 0, %8 ]
%22 = phi ptr [ %18, %15 ], [ %13, %8 ]
%23 = load i32, ptr %22, align 8, !tbaa !16
%24 = icmp eq i32 %23, %11
br i1 %24, label %25, label %15
25: ; preds = %20
store ptr %22, ptr @SNDCore, align 8, !tbaa !5
br label %30
26: ; preds = %15, %8
%27 = load ptr, ptr @SNDCore, align 8, !tbaa !5
%28 = icmp eq ptr %27, null
br i1 %28, label %29, label %30
29: ; preds = %26
store ptr @SNDDummy, ptr @SNDCore, align 8, !tbaa !5
br label %60
30: ; preds = %25, %26
%31 = phi ptr [ %22, %25 ], [ %27, %26 ]
%32 = getelementptr inbounds %struct.TYPE_4__, ptr %31, i64 0, i32 1
%33 = load ptr, ptr %32, align 8, !tbaa !17
%34 = tail call i32 (...) %33() #2
%35 = icmp eq i32 %34, -1
br i1 %35, label %36, label %43
36: ; preds = %30
%37 = load i32, ptr @YAB_ERR_CANNOTINIT, align 4, !tbaa !13
%38 = load ptr, ptr @SNDCore, align 8, !tbaa !5
%39 = getelementptr inbounds %struct.TYPE_4__, ptr %38, i64 0, i32 5
%40 = load i64, ptr %39, align 8, !tbaa !18
%41 = inttoptr i64 %40 to ptr
%42 = tail call i32 @YabSetError(i32 noundef %37, ptr noundef %41) #2
store ptr @SNDDummy, ptr @SNDCore, align 8, !tbaa !5
br label %46
43: ; preds = %30
%44 = load ptr, ptr @SNDCore, align 8, !tbaa !5
%45 = icmp eq ptr %44, null
br i1 %45, label %60, label %46
46: ; preds = %36, %43
%47 = phi ptr [ @SNDDummy, %36 ], [ %44, %43 ]
%48 = load i64, ptr @scsp_mute_flags, align 8, !tbaa !19
%49 = icmp eq i64 %48, 0
%50 = getelementptr inbounds %struct.TYPE_4__, ptr %47, i64 0, i32 3
%51 = getelementptr inbounds %struct.TYPE_4__, ptr %47, i64 0, i32 4
%52 = select i1 %49, ptr %50, ptr %51
%53 = load ptr, ptr %52, align 8, !tbaa !5
%54 = tail call i32 (...) %53() #2
%55 = load ptr, ptr @SNDCore, align 8, !tbaa !5
%56 = getelementptr inbounds %struct.TYPE_4__, ptr %55, i64 0, i32 2
%57 = load ptr, ptr %56, align 8, !tbaa !20
%58 = load i32, ptr @scsp_volume, align 4, !tbaa !13
%59 = tail call i32 %57(i32 noundef %58) #2
br label %60
60: ; preds = %43, %46, %29
%61 = phi i32 [ -1, %29 ], [ 0, %46 ], [ 0, %43 ]
ret i32 %61
}
declare i32 @YabSetError(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 48}
!10 = !{!"TYPE_4__", !11, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !12, i64 40, !6, i64 48}
!11 = !{!"int", !7, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!11, !11, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!10, !11, i64 0}
!17 = !{!10, !6, i64 8}
!18 = !{!10, !12, i64 40}
!19 = !{!12, !12, i64 0}
!20 = !{!10, !6, i64 16}
|
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_scsp.c_ScspChangeSoundCore.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_scsp.c_ScspChangeSoundCore.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i32, ptr, ptr, ptr, ptr, i64, ptr }
@SNDCore = common local_unnamed_addr global ptr null, align 8
@SNDCORE_DEFAULT = common local_unnamed_addr global i32 0, align 4
@SNDCoreList = common local_unnamed_addr global ptr null, align 8
@SNDDummy = common global %struct.TYPE_4__ zeroinitializer, align 8
@YAB_ERR_CANNOTINIT = common local_unnamed_addr global i32 0, align 4
@scsp_mute_flags = common local_unnamed_addr global i64 0, align 8
@scsp_volume = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -1, 1) i32 @ScspChangeSoundCore(i32 noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr @SNDCore, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %2, i64 48
%6 = load ptr, ptr %5, align 8, !tbaa !10
%7 = tail call i32 %6() #2
br label %8
8: ; preds = %4, %1
%9 = load i32, ptr @SNDCORE_DEFAULT, align 4, !tbaa !14
%10 = icmp eq i32 %9, %0
%11 = select i1 %10, i32 0, i32 %0
%12 = load ptr, ptr @SNDCoreList, align 8, !tbaa !6
%13 = load ptr, ptr %12, align 8, !tbaa !6
%14 = icmp eq ptr %13, null
br i1 %14, label %26, label %20
15: ; preds = %20
%16 = add nuw nsw i64 %21, 1
%17 = getelementptr inbounds ptr, ptr %12, i64 %16
%18 = load ptr, ptr %17, align 8, !tbaa !6
%19 = icmp eq ptr %18, null
br i1 %19, label %26, label %20, !llvm.loop !15
20: ; preds = %8, %15
%21 = phi i64 [ %16, %15 ], [ 0, %8 ]
%22 = phi ptr [ %18, %15 ], [ %13, %8 ]
%23 = load i32, ptr %22, align 8, !tbaa !17
%24 = icmp eq i32 %23, %11
br i1 %24, label %25, label %15
25: ; preds = %20
store ptr %22, ptr @SNDCore, align 8, !tbaa !6
br label %30
26: ; preds = %15, %8
%27 = load ptr, ptr @SNDCore, align 8, !tbaa !6
%28 = icmp eq ptr %27, null
br i1 %28, label %29, label %30
29: ; preds = %26
store ptr @SNDDummy, ptr @SNDCore, align 8, !tbaa !6
br label %59
30: ; preds = %25, %26
%31 = phi ptr [ %22, %25 ], [ %27, %26 ]
%32 = getelementptr inbounds i8, ptr %31, i64 8
%33 = load ptr, ptr %32, align 8, !tbaa !18
%34 = tail call i32 %33() #2
%35 = icmp eq i32 %34, -1
br i1 %35, label %36, label %43
36: ; preds = %30
%37 = load i32, ptr @YAB_ERR_CANNOTINIT, align 4, !tbaa !14
%38 = load ptr, ptr @SNDCore, align 8, !tbaa !6
%39 = getelementptr inbounds i8, ptr %38, i64 40
%40 = load i64, ptr %39, align 8, !tbaa !19
%41 = inttoptr i64 %40 to ptr
%42 = tail call i32 @YabSetError(i32 noundef %37, ptr noundef %41) #2
store ptr @SNDDummy, ptr @SNDCore, align 8, !tbaa !6
br label %46
43: ; preds = %30
%44 = load ptr, ptr @SNDCore, align 8, !tbaa !6
%45 = icmp eq ptr %44, null
br i1 %45, label %59, label %46
46: ; preds = %36, %43
%47 = phi ptr [ @SNDDummy, %36 ], [ %44, %43 ]
%48 = load i64, ptr @scsp_mute_flags, align 8, !tbaa !20
%49 = icmp eq i64 %48, 0
%50 = select i1 %49, i64 24, i64 32
%51 = getelementptr inbounds i8, ptr %47, i64 %50
%52 = load ptr, ptr %51, align 8, !tbaa !6
%53 = tail call i32 %52() #2
%54 = load ptr, ptr @SNDCore, align 8, !tbaa !6
%55 = getelementptr inbounds i8, ptr %54, i64 16
%56 = load ptr, ptr %55, align 8, !tbaa !21
%57 = load i32, ptr @scsp_volume, align 4, !tbaa !14
%58 = tail call i32 %56(i32 noundef %57) #2
br label %59
59: ; preds = %43, %46, %29
%60 = phi i32 [ -1, %29 ], [ 0, %46 ], [ 0, %43 ]
ret i32 %60
}
declare i32 @YabSetError(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 48}
!11 = !{!"TYPE_4__", !12, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !13, i64 40, !7, i64 48}
!12 = !{!"int", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!12, !12, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!11, !12, i64 0}
!18 = !{!11, !7, i64 8}
!19 = !{!11, !13, i64 40}
!20 = !{!13, !13, i64 0}
!21 = !{!11, !7, i64 16}
|
Provenance_Cores_Yabause_yabause_src_extr_scsp.c_ScspChangeSoundCore
|
; ModuleID = 'AnghaBench/postgres/src/backend/catalog/extr_namespace.c_check_search_path.c'
source_filename = "AnghaBench/postgres/src/backend/catalog/extr_namespace.c_check_search_path.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [24 x i8] c"List syntax is invalid.\00", align 1
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @check_search_path(ptr nocapture noundef readonly %0, ptr nocapture noundef readnone %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%5 = load ptr, ptr %0, align 8, !tbaa !5
%6 = tail call ptr @pstrdup(ptr noundef %5) #3
%7 = call i32 @SplitIdentifierString(ptr noundef %6, i8 noundef signext 44, ptr noundef nonnull %4) #3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = call i32 @GUC_check_errdetail(ptr noundef nonnull @.str) #3
br label %11
11: ; preds = %3, %9
%12 = phi i32 [ 0, %9 ], [ 1, %3 ]
%13 = call i32 @pfree(ptr noundef %6) #3
%14 = load ptr, ptr %4, align 8, !tbaa !5
%15 = call i32 @list_free(ptr noundef %14) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i32 %12
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @pstrdup(ptr noundef) local_unnamed_addr #2
declare i32 @SplitIdentifierString(ptr noundef, i8 noundef signext, ptr noundef) local_unnamed_addr #2
declare i32 @GUC_check_errdetail(ptr noundef) local_unnamed_addr #2
declare i32 @pfree(ptr noundef) local_unnamed_addr #2
declare i32 @list_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/postgres/src/backend/catalog/extr_namespace.c_check_search_path.c'
source_filename = "AnghaBench/postgres/src/backend/catalog/extr_namespace.c_check_search_path.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [24 x i8] c"List syntax is invalid.\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @check_search_path(ptr nocapture noundef readonly %0, ptr nocapture noundef readnone %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = tail call ptr @pstrdup(ptr noundef %5) #3
%7 = call i32 @SplitIdentifierString(ptr noundef %6, i8 noundef signext 44, ptr noundef nonnull %4) #3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = call i32 @GUC_check_errdetail(ptr noundef nonnull @.str) #3
br label %11
11: ; preds = %3, %9
%12 = phi i32 [ 0, %9 ], [ 1, %3 ]
%13 = call i32 @pfree(ptr noundef %6) #3
%14 = load ptr, ptr %4, align 8, !tbaa !6
%15 = call i32 @list_free(ptr noundef %14) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i32 %12
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @pstrdup(ptr noundef) local_unnamed_addr #2
declare i32 @SplitIdentifierString(ptr noundef, i8 noundef signext, ptr noundef) local_unnamed_addr #2
declare i32 @GUC_check_errdetail(ptr noundef) local_unnamed_addr #2
declare i32 @pfree(ptr noundef) local_unnamed_addr #2
declare i32 @list_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
postgres_src_backend_catalog_extr_namespace.c_check_search_path
|
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/i386/extr_rtclock.c_rtc_export_speed.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/i386/extr_rtclock.c_rtc_export_speed.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i64 }
%struct.TYPE_5__ = type { i32, i32 }
@pal_rtc_nanotime_info = dso_local local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@.str = private unnamed_addr constant [36 x i8] c"Slow TSC, rtc_nanotime.shift == %d\0A\00", align 1
@UI_CPUFREQ_ROUNDING_FACTOR = dso_local local_unnamed_addr global i32 0, align 4
@gPEClockFrequencyInfo = dso_local local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 4
@.str.1 = private unnamed_addr constant [33 x i8] c"[RTCLOCK] frequency %llu (%llu)\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @rtc_export_speed], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @rtc_export_speed(i32 noundef %0) #0 {
%2 = load i64, ptr @pal_rtc_nanotime_info, align 8, !tbaa !5
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @printf(ptr noundef nonnull @.str, i64 noundef %2) #3
br label %6
6: ; preds = %4, %1
%7 = load i32, ptr @UI_CPUFREQ_ROUNDING_FACTOR, align 4, !tbaa !10
%8 = freeze i32 %7
%9 = sdiv i32 %8, 2
%10 = add i32 %9, %0
%11 = srem i32 %10, %8
%12 = sub nsw i32 %10, %11
%13 = tail call i32 @llvm.smax.i32(i32 %12, i32 -1)
store i32 %13, ptr @gPEClockFrequencyInfo, align 4, !tbaa !12
store i32 %12, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @gPEClockFrequencyInfo, i64 0, i32 1), align 4, !tbaa !14
%14 = tail call i32 @kprintf(ptr noundef nonnull @.str.1, i32 noundef %12, i32 noundef %0) #3
ret i32 %12
}
declare i32 @printf(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @kprintf(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_5__", !11, i64 0, !11, i64 4}
!14 = !{!13, !11, i64 4}
|
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/i386/extr_rtclock.c_rtc_export_speed.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/i386/extr_rtclock.c_rtc_export_speed.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i64 }
%struct.TYPE_5__ = type { i32, i32 }
@pal_rtc_nanotime_info = common local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@.str = private unnamed_addr constant [36 x i8] c"Slow TSC, rtc_nanotime.shift == %d\0A\00", align 1
@UI_CPUFREQ_ROUNDING_FACTOR = common local_unnamed_addr global i32 0, align 4
@gPEClockFrequencyInfo = common local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 4
@.str.1 = private unnamed_addr constant [33 x i8] c"[RTCLOCK] frequency %llu (%llu)\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @rtc_export_speed], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @rtc_export_speed(i32 noundef %0) #0 {
%2 = load i64, ptr @pal_rtc_nanotime_info, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @printf(ptr noundef nonnull @.str, i64 noundef %2) #3
br label %6
6: ; preds = %4, %1
%7 = load i32, ptr @UI_CPUFREQ_ROUNDING_FACTOR, align 4, !tbaa !11
%8 = freeze i32 %7
%9 = sdiv i32 %8, 2
%10 = add i32 %9, %0
%11 = srem i32 %10, %8
%12 = sub nsw i32 %10, %11
%13 = tail call i32 @llvm.smax.i32(i32 %12, i32 -1)
store i32 %13, ptr @gPEClockFrequencyInfo, align 4, !tbaa !13
store i32 %12, ptr getelementptr inbounds (i8, ptr @gPEClockFrequencyInfo, i64 4), align 4, !tbaa !15
%14 = tail call i32 @kprintf(ptr noundef nonnull @.str.1, i32 noundef %12, i32 noundef %0) #3
ret i32 %12
}
declare i32 @printf(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @kprintf(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_5__", !12, i64 0, !12, i64 4}
!15 = !{!14, !12, i64 4}
|
darwin-xnu_osfmk_i386_extr_rtclock.c_rtc_export_speed
|
; ModuleID = 'AnghaBench/esp-idf/components/protocomm/proto-c/extr_session.pb-c.c_session_data__pack.c'
source_filename = "AnghaBench/esp-idf/components/protocomm/proto-c/extr_session.pb-c.c_session_data__pack.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@session_data__descriptor = dso_local global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i64 @session_data__pack(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = icmp eq ptr %3, @session_data__descriptor
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 noundef %5) #2
%7 = tail call i64 @protobuf_c_message_pack(ptr noundef nonnull %0, ptr noundef %1) #2
ret i64 %7
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i64 @protobuf_c_message_pack(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/esp-idf/components/protocomm/proto-c/extr_session.pb-c.c_session_data__pack.c'
source_filename = "AnghaBench/esp-idf/components/protocomm/proto-c/extr_session.pb-c.c_session_data__pack.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@session_data__descriptor = common global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @session_data__pack(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = icmp eq ptr %3, @session_data__descriptor
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 noundef %5) #2
%7 = tail call i64 @protobuf_c_message_pack(ptr noundef nonnull %0, ptr noundef %1) #2
ret i64 %7
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i64 @protobuf_c_message_pack(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
|
esp-idf_components_protocomm_proto-c_extr_session.pb-c.c_session_data__pack
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v10_0.c_gfx_v10_0_cp_gfx_load_pfp_microcode.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v10_0.c_gfx_v10_0_cp_gfx_load_pfp_microcode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { %struct.TYPE_8__, ptr }
%struct.TYPE_8__ = type { i32, i32, i32 }
%struct.TYPE_10__ = type { i32, i32 }
%struct.amdgpu_device = type { %struct.TYPE_9__, ptr, i32 }
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@AMDGPU_GEM_DOMAIN_GTT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"(%d) failed to create pfp fw bo\0A\00", align 1
@GC = dso_local local_unnamed_addr global i32 0, align 4
@mmCP_PFP_IC_OP_CNTL = dso_local local_unnamed_addr global i32 0, align 4
@CP_PFP_IC_OP_CNTL = dso_local local_unnamed_addr global i32 0, align 4
@INVALIDATE_CACHE = dso_local local_unnamed_addr global i32 0, align 4
@INVALIDATE_CACHE_COMPLETE = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [40 x i8] c"failed to invalidate instruction cache\0A\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@amdgpu_emu_mode = dso_local local_unnamed_addr global i32 0, align 4
@mmCP_PFP_IC_BASE_CNTL = dso_local local_unnamed_addr global i32 0, align 4
@CP_PFP_IC_BASE_CNTL = dso_local local_unnamed_addr global i32 0, align 4
@VMID = dso_local local_unnamed_addr global i32 0, align 4
@CACHE_POLICY = dso_local local_unnamed_addr global i32 0, align 4
@EXE_DISABLE = dso_local local_unnamed_addr global i32 0, align 4
@ADDRESS_CLAMP = dso_local local_unnamed_addr global i32 0, align 4
@mmCP_PFP_IC_BASE_LO = dso_local local_unnamed_addr global i32 0, align 4
@mmCP_PFP_IC_BASE_HI = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @gfx_v10_0_cp_gfx_load_pfp_microcode], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @gfx_v10_0_cp_gfx_load_pfp_microcode(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i64, ptr %3, align 8, !tbaa !13
%5 = inttoptr i64 %4 to ptr
%6 = tail call i32 @amdgpu_ucode_print_gfx_hdr(ptr noundef %5) #2
%7 = load ptr, ptr %2, align 8, !tbaa !5
%8 = load i64, ptr %7, align 8, !tbaa !13
%9 = getelementptr inbounds %struct.TYPE_10__, ptr %5, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !16
%11 = tail call i32 @le32_to_cpu(i32 noundef %10) #2
%12 = load i32, ptr %5, align 4, !tbaa !19
%13 = tail call i32 @le32_to_cpu(i32 noundef %12) #2
%14 = load i32, ptr %5, align 4, !tbaa !19
%15 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !20
%16 = load i32, ptr @AMDGPU_GEM_DOMAIN_GTT, align 4, !tbaa !20
%17 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%18 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 2
%19 = tail call i32 @amdgpu_bo_create_reserved(ptr noundef %0, i32 noundef %14, i32 noundef %15, i32 noundef %16, ptr noundef nonnull %17, ptr noundef %0, ptr noundef nonnull %18) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %26, label %21
21: ; preds = %1
%22 = getelementptr inbounds %struct.amdgpu_device, ptr %0, i64 0, i32 2
%23 = load i32, ptr %22, align 8, !tbaa !21
%24 = tail call i32 (i32, ptr, ...) @dev_err(i32 noundef %23, ptr noundef nonnull @.str, i32 noundef %19) #2
%25 = tail call i32 @gfx_v10_0_pfp_fini(ptr noundef nonnull %0) #2
br label %101
26: ; preds = %1
%27 = zext i32 %11 to i64
%28 = add nsw i64 %8, %27
%29 = inttoptr i64 %28 to ptr
%30 = load i32, ptr %18, align 8, !tbaa !22
%31 = tail call i32 @memcpy(i32 noundef %30, ptr noundef %29, i32 noundef %13) #2
%32 = load i32, ptr %17, align 4, !tbaa !23
%33 = tail call i32 @amdgpu_bo_kunmap(i32 noundef %32) #2
%34 = load i32, ptr %17, align 4, !tbaa !23
%35 = tail call i32 @amdgpu_bo_unreserve(i32 noundef %34) #2
%36 = load i32, ptr @GC, align 4, !tbaa !20
%37 = load i32, ptr @mmCP_PFP_IC_OP_CNTL, align 4, !tbaa !20
%38 = tail call i32 @RREG32_SOC15(i32 noundef %36, i32 noundef 0, i32 noundef %37) #2
%39 = load i32, ptr @CP_PFP_IC_OP_CNTL, align 4, !tbaa !20
%40 = load i32, ptr @INVALIDATE_CACHE, align 4, !tbaa !20
%41 = tail call i32 @REG_SET_FIELD(i32 noundef %38, i32 noundef %39, i32 noundef %40, i32 noundef 1) #2
%42 = load i32, ptr @GC, align 4, !tbaa !20
%43 = load i32, ptr @mmCP_PFP_IC_OP_CNTL, align 4, !tbaa !20
%44 = tail call i32 @WREG32_SOC15(i32 noundef %42, i32 noundef 0, i32 noundef %43, i32 noundef %41) #2
br label %45
45: ; preds = %26, %54
%46 = phi i32 [ 0, %26 ], [ %56, %54 ]
%47 = load i32, ptr @GC, align 4, !tbaa !20
%48 = load i32, ptr @mmCP_PFP_IC_OP_CNTL, align 4, !tbaa !20
%49 = tail call i32 @RREG32_SOC15(i32 noundef %47, i32 noundef 0, i32 noundef %48) #2
%50 = load i32, ptr @CP_PFP_IC_OP_CNTL, align 4, !tbaa !20
%51 = load i32, ptr @INVALIDATE_CACHE_COMPLETE, align 4, !tbaa !20
%52 = tail call i32 @REG_GET_FIELD(i32 noundef %49, i32 noundef %50, i32 noundef %51) #2
%53 = icmp eq i32 %52, 1
br i1 %53, label %64, label %54
54: ; preds = %45
%55 = tail call i32 @udelay(i32 noundef 1) #2
%56 = add nuw nsw i32 %46, 1
%57 = icmp eq i32 %56, 50000
br i1 %57, label %58, label %45, !llvm.loop !24
58: ; preds = %54
%59 = getelementptr inbounds %struct.amdgpu_device, ptr %0, i64 0, i32 2
%60 = load i32, ptr %59, align 8, !tbaa !21
%61 = tail call i32 (i32, ptr, ...) @dev_err(i32 noundef %60, ptr noundef nonnull @.str.1) #2
%62 = load i32, ptr @EINVAL, align 4, !tbaa !20
%63 = sub nsw i32 0, %62
br label %101
64: ; preds = %45
%65 = load i32, ptr @amdgpu_emu_mode, align 4, !tbaa !20
%66 = icmp eq i32 %65, 1
br i1 %66, label %67, label %72
67: ; preds = %64
%68 = getelementptr inbounds %struct.amdgpu_device, ptr %0, i64 0, i32 1
%69 = load ptr, ptr %68, align 8, !tbaa !26
%70 = load ptr, ptr %69, align 8, !tbaa !27
%71 = tail call i32 %70(ptr noundef %0, ptr noundef null) #2
br label %72
72: ; preds = %67, %64
%73 = load i32, ptr @GC, align 4, !tbaa !20
%74 = load i32, ptr @mmCP_PFP_IC_BASE_CNTL, align 4, !tbaa !20
%75 = tail call i32 @RREG32_SOC15(i32 noundef %73, i32 noundef 0, i32 noundef %74) #2
%76 = load i32, ptr @CP_PFP_IC_BASE_CNTL, align 4, !tbaa !20
%77 = load i32, ptr @VMID, align 4, !tbaa !20
%78 = tail call i32 @REG_SET_FIELD(i32 noundef %75, i32 noundef %76, i32 noundef %77, i32 noundef 0) #2
%79 = load i32, ptr @CP_PFP_IC_BASE_CNTL, align 4, !tbaa !20
%80 = load i32, ptr @CACHE_POLICY, align 4, !tbaa !20
%81 = tail call i32 @REG_SET_FIELD(i32 noundef %78, i32 noundef %79, i32 noundef %80, i32 noundef 0) #2
%82 = load i32, ptr @CP_PFP_IC_BASE_CNTL, align 4, !tbaa !20
%83 = load i32, ptr @EXE_DISABLE, align 4, !tbaa !20
%84 = tail call i32 @REG_SET_FIELD(i32 noundef %81, i32 noundef %82, i32 noundef %83, i32 noundef 0) #2
%85 = load i32, ptr @CP_PFP_IC_BASE_CNTL, align 4, !tbaa !20
%86 = load i32, ptr @ADDRESS_CLAMP, align 4, !tbaa !20
%87 = tail call i32 @REG_SET_FIELD(i32 noundef %84, i32 noundef %85, i32 noundef %86, i32 noundef 1) #2
%88 = load i32, ptr @GC, align 4, !tbaa !20
%89 = load i32, ptr @mmCP_PFP_IC_BASE_CNTL, align 4, !tbaa !20
%90 = tail call i32 @WREG32_SOC15(i32 noundef %88, i32 noundef 0, i32 noundef %89, i32 noundef %87) #2
%91 = load i32, ptr @GC, align 4, !tbaa !20
%92 = load i32, ptr @mmCP_PFP_IC_BASE_LO, align 4, !tbaa !20
%93 = load i32, ptr %0, align 8, !tbaa !29
%94 = and i32 %93, -4096
%95 = tail call i32 @WREG32_SOC15(i32 noundef %91, i32 noundef 0, i32 noundef %92, i32 noundef %94) #2
%96 = load i32, ptr @GC, align 4, !tbaa !20
%97 = load i32, ptr @mmCP_PFP_IC_BASE_HI, align 4, !tbaa !20
%98 = load i32, ptr %0, align 8, !tbaa !29
%99 = tail call i32 @upper_32_bits(i32 noundef %98) #2
%100 = tail call i32 @WREG32_SOC15(i32 noundef %96, i32 noundef 0, i32 noundef %97, i32 noundef %99) #2
br label %101
101: ; preds = %72, %58, %21
%102 = phi i32 [ %19, %21 ], [ %63, %58 ], [ 0, %72 ]
ret i32 %102
}
declare i32 @amdgpu_ucode_print_gfx_hdr(ptr noundef) local_unnamed_addr #1
declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @amdgpu_bo_create_reserved(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @gfx_v10_0_pfp_fini(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @amdgpu_bo_kunmap(i32 noundef) local_unnamed_addr #1
declare i32 @amdgpu_bo_unreserve(i32 noundef) local_unnamed_addr #1
declare i32 @RREG32_SOC15(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @REG_SET_FIELD(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @WREG32_SOC15(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @REG_GET_FIELD(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @upper_32_bits(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 16}
!6 = !{!"amdgpu_device", !7, i64 0, !12, i64 24, !9, i64 32}
!7 = !{!"TYPE_9__", !8, i64 0, !12, i64 16}
!8 = !{!"TYPE_8__", !9, i64 0, !9, i64 4, !9, i64 8}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_6__", !15, i64 0}
!15 = !{!"long", !10, i64 0}
!16 = !{!17, !9, i64 4}
!17 = !{!"gfx_firmware_header_v1_0", !18, i64 0}
!18 = !{!"TYPE_10__", !9, i64 0, !9, i64 4}
!19 = !{!17, !9, i64 0}
!20 = !{!9, !9, i64 0}
!21 = !{!6, !9, i64 32}
!22 = !{!6, !9, i64 8}
!23 = !{!6, !9, i64 4}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
!26 = !{!6, !12, i64 24}
!27 = !{!28, !12, i64 0}
!28 = !{!"TYPE_7__", !12, i64 0}
!29 = !{!6, !9, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v10_0.c_gfx_v10_0_cp_gfx_load_pfp_microcode.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v10_0.c_gfx_v10_0_cp_gfx_load_pfp_microcode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@AMDGPU_GEM_DOMAIN_GTT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"(%d) failed to create pfp fw bo\0A\00", align 1
@GC = common local_unnamed_addr global i32 0, align 4
@mmCP_PFP_IC_OP_CNTL = common local_unnamed_addr global i32 0, align 4
@CP_PFP_IC_OP_CNTL = common local_unnamed_addr global i32 0, align 4
@INVALIDATE_CACHE = common local_unnamed_addr global i32 0, align 4
@INVALIDATE_CACHE_COMPLETE = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [40 x i8] c"failed to invalidate instruction cache\0A\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
@amdgpu_emu_mode = common local_unnamed_addr global i32 0, align 4
@mmCP_PFP_IC_BASE_CNTL = common local_unnamed_addr global i32 0, align 4
@CP_PFP_IC_BASE_CNTL = common local_unnamed_addr global i32 0, align 4
@VMID = common local_unnamed_addr global i32 0, align 4
@CACHE_POLICY = common local_unnamed_addr global i32 0, align 4
@EXE_DISABLE = common local_unnamed_addr global i32 0, align 4
@ADDRESS_CLAMP = common local_unnamed_addr global i32 0, align 4
@mmCP_PFP_IC_BASE_LO = common local_unnamed_addr global i32 0, align 4
@mmCP_PFP_IC_BASE_HI = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @gfx_v10_0_cp_gfx_load_pfp_microcode], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @gfx_v10_0_cp_gfx_load_pfp_microcode(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i64, ptr %3, align 8, !tbaa !14
%5 = inttoptr i64 %4 to ptr
%6 = tail call i32 @amdgpu_ucode_print_gfx_hdr(ptr noundef %5) #2
%7 = load ptr, ptr %2, align 8, !tbaa !6
%8 = load i64, ptr %7, align 8, !tbaa !14
%9 = getelementptr inbounds i8, ptr %5, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !17
%11 = tail call i32 @le32_to_cpu(i32 noundef %10) #2
%12 = load i32, ptr %5, align 4, !tbaa !20
%13 = tail call i32 @le32_to_cpu(i32 noundef %12) #2
%14 = load i32, ptr %5, align 4, !tbaa !20
%15 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !21
%16 = load i32, ptr @AMDGPU_GEM_DOMAIN_GTT, align 4, !tbaa !21
%17 = getelementptr inbounds i8, ptr %0, i64 4
%18 = getelementptr inbounds i8, ptr %0, i64 8
%19 = tail call i32 @amdgpu_bo_create_reserved(ptr noundef %0, i32 noundef %14, i32 noundef %15, i32 noundef %16, ptr noundef nonnull %17, ptr noundef %0, ptr noundef nonnull %18) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %26, label %21
21: ; preds = %1
%22 = getelementptr inbounds i8, ptr %0, i64 32
%23 = load i32, ptr %22, align 8, !tbaa !22
%24 = tail call i32 (i32, ptr, ...) @dev_err(i32 noundef %23, ptr noundef nonnull @.str, i32 noundef %19) #2
%25 = tail call i32 @gfx_v10_0_pfp_fini(ptr noundef nonnull %0) #2
br label %101
26: ; preds = %1
%27 = zext i32 %11 to i64
%28 = add nsw i64 %8, %27
%29 = inttoptr i64 %28 to ptr
%30 = load i32, ptr %18, align 8, !tbaa !23
%31 = tail call i32 @memcpy(i32 noundef %30, ptr noundef %29, i32 noundef %13) #2
%32 = load i32, ptr %17, align 4, !tbaa !24
%33 = tail call i32 @amdgpu_bo_kunmap(i32 noundef %32) #2
%34 = load i32, ptr %17, align 4, !tbaa !24
%35 = tail call i32 @amdgpu_bo_unreserve(i32 noundef %34) #2
%36 = load i32, ptr @GC, align 4, !tbaa !21
%37 = load i32, ptr @mmCP_PFP_IC_OP_CNTL, align 4, !tbaa !21
%38 = tail call i32 @RREG32_SOC15(i32 noundef %36, i32 noundef 0, i32 noundef %37) #2
%39 = load i32, ptr @CP_PFP_IC_OP_CNTL, align 4, !tbaa !21
%40 = load i32, ptr @INVALIDATE_CACHE, align 4, !tbaa !21
%41 = tail call i32 @REG_SET_FIELD(i32 noundef %38, i32 noundef %39, i32 noundef %40, i32 noundef 1) #2
%42 = load i32, ptr @GC, align 4, !tbaa !21
%43 = load i32, ptr @mmCP_PFP_IC_OP_CNTL, align 4, !tbaa !21
%44 = tail call i32 @WREG32_SOC15(i32 noundef %42, i32 noundef 0, i32 noundef %43, i32 noundef %41) #2
br label %45
45: ; preds = %26, %54
%46 = phi i32 [ 0, %26 ], [ %56, %54 ]
%47 = load i32, ptr @GC, align 4, !tbaa !21
%48 = load i32, ptr @mmCP_PFP_IC_OP_CNTL, align 4, !tbaa !21
%49 = tail call i32 @RREG32_SOC15(i32 noundef %47, i32 noundef 0, i32 noundef %48) #2
%50 = load i32, ptr @CP_PFP_IC_OP_CNTL, align 4, !tbaa !21
%51 = load i32, ptr @INVALIDATE_CACHE_COMPLETE, align 4, !tbaa !21
%52 = tail call i32 @REG_GET_FIELD(i32 noundef %49, i32 noundef %50, i32 noundef %51) #2
%53 = icmp eq i32 %52, 1
br i1 %53, label %64, label %54
54: ; preds = %45
%55 = tail call i32 @udelay(i32 noundef 1) #2
%56 = add nuw nsw i32 %46, 1
%57 = icmp eq i32 %56, 50000
br i1 %57, label %58, label %45, !llvm.loop !25
58: ; preds = %54
%59 = getelementptr inbounds i8, ptr %0, i64 32
%60 = load i32, ptr %59, align 8, !tbaa !22
%61 = tail call i32 (i32, ptr, ...) @dev_err(i32 noundef %60, ptr noundef nonnull @.str.1) #2
%62 = load i32, ptr @EINVAL, align 4, !tbaa !21
%63 = sub nsw i32 0, %62
br label %101
64: ; preds = %45
%65 = load i32, ptr @amdgpu_emu_mode, align 4, !tbaa !21
%66 = icmp eq i32 %65, 1
br i1 %66, label %67, label %72
67: ; preds = %64
%68 = getelementptr inbounds i8, ptr %0, i64 24
%69 = load ptr, ptr %68, align 8, !tbaa !27
%70 = load ptr, ptr %69, align 8, !tbaa !28
%71 = tail call i32 %70(ptr noundef %0, ptr noundef null) #2
br label %72
72: ; preds = %67, %64
%73 = load i32, ptr @GC, align 4, !tbaa !21
%74 = load i32, ptr @mmCP_PFP_IC_BASE_CNTL, align 4, !tbaa !21
%75 = tail call i32 @RREG32_SOC15(i32 noundef %73, i32 noundef 0, i32 noundef %74) #2
%76 = load i32, ptr @CP_PFP_IC_BASE_CNTL, align 4, !tbaa !21
%77 = load i32, ptr @VMID, align 4, !tbaa !21
%78 = tail call i32 @REG_SET_FIELD(i32 noundef %75, i32 noundef %76, i32 noundef %77, i32 noundef 0) #2
%79 = load i32, ptr @CP_PFP_IC_BASE_CNTL, align 4, !tbaa !21
%80 = load i32, ptr @CACHE_POLICY, align 4, !tbaa !21
%81 = tail call i32 @REG_SET_FIELD(i32 noundef %78, i32 noundef %79, i32 noundef %80, i32 noundef 0) #2
%82 = load i32, ptr @CP_PFP_IC_BASE_CNTL, align 4, !tbaa !21
%83 = load i32, ptr @EXE_DISABLE, align 4, !tbaa !21
%84 = tail call i32 @REG_SET_FIELD(i32 noundef %81, i32 noundef %82, i32 noundef %83, i32 noundef 0) #2
%85 = load i32, ptr @CP_PFP_IC_BASE_CNTL, align 4, !tbaa !21
%86 = load i32, ptr @ADDRESS_CLAMP, align 4, !tbaa !21
%87 = tail call i32 @REG_SET_FIELD(i32 noundef %84, i32 noundef %85, i32 noundef %86, i32 noundef 1) #2
%88 = load i32, ptr @GC, align 4, !tbaa !21
%89 = load i32, ptr @mmCP_PFP_IC_BASE_CNTL, align 4, !tbaa !21
%90 = tail call i32 @WREG32_SOC15(i32 noundef %88, i32 noundef 0, i32 noundef %89, i32 noundef %87) #2
%91 = load i32, ptr @GC, align 4, !tbaa !21
%92 = load i32, ptr @mmCP_PFP_IC_BASE_LO, align 4, !tbaa !21
%93 = load i32, ptr %0, align 8, !tbaa !30
%94 = and i32 %93, -4096
%95 = tail call i32 @WREG32_SOC15(i32 noundef %91, i32 noundef 0, i32 noundef %92, i32 noundef %94) #2
%96 = load i32, ptr @GC, align 4, !tbaa !21
%97 = load i32, ptr @mmCP_PFP_IC_BASE_HI, align 4, !tbaa !21
%98 = load i32, ptr %0, align 8, !tbaa !30
%99 = tail call i32 @upper_32_bits(i32 noundef %98) #2
%100 = tail call i32 @WREG32_SOC15(i32 noundef %96, i32 noundef 0, i32 noundef %97, i32 noundef %99) #2
br label %101
101: ; preds = %72, %58, %21
%102 = phi i32 [ %19, %21 ], [ %63, %58 ], [ 0, %72 ]
ret i32 %102
}
declare i32 @amdgpu_ucode_print_gfx_hdr(ptr noundef) local_unnamed_addr #1
declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @amdgpu_bo_create_reserved(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @gfx_v10_0_pfp_fini(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @amdgpu_bo_kunmap(i32 noundef) local_unnamed_addr #1
declare i32 @amdgpu_bo_unreserve(i32 noundef) local_unnamed_addr #1
declare i32 @RREG32_SOC15(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @REG_SET_FIELD(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @WREG32_SOC15(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @REG_GET_FIELD(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @upper_32_bits(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 16}
!7 = !{!"amdgpu_device", !8, i64 0, !13, i64 24, !10, i64 32}
!8 = !{!"TYPE_9__", !9, i64 0, !13, i64 16}
!9 = !{!"TYPE_8__", !10, i64 0, !10, i64 4, !10, i64 8}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!"any pointer", !11, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"TYPE_6__", !16, i64 0}
!16 = !{!"long", !11, i64 0}
!17 = !{!18, !10, i64 4}
!18 = !{!"gfx_firmware_header_v1_0", !19, i64 0}
!19 = !{!"TYPE_10__", !10, i64 0, !10, i64 4}
!20 = !{!18, !10, i64 0}
!21 = !{!10, !10, i64 0}
!22 = !{!7, !10, i64 32}
!23 = !{!7, !10, i64 8}
!24 = !{!7, !10, i64 4}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = !{!7, !13, i64 24}
!28 = !{!29, !13, i64 0}
!29 = !{!"TYPE_7__", !13, i64 0}
!30 = !{!7, !10, i64 0}
|
linux_drivers_gpu_drm_amd_amdgpu_extr_gfx_v10_0.c_gfx_v10_0_cp_gfx_load_pfp_microcode
|
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_auth_zones_notify.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_auth_zones_notify.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @auth_zones_notify(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr nocapture noundef writeonly %9) local_unnamed_addr #0 {
%11 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %11) #3
store ptr null, ptr %11, align 8, !tbaa !5
%12 = tail call i32 @lock_rw_rdlock(ptr noundef %0) #3
%13 = tail call ptr @auth_xfer_find(ptr noundef %0, ptr noundef %2, i64 noundef %3, i32 noundef %4) #3
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = tail call i32 @lock_rw_unlock(ptr noundef %0) #3
store i32 1, ptr %9, align 4, !tbaa !9
br label %27
17: ; preds = %10
%18 = tail call i32 @lock_basic_lock(ptr noundef nonnull %13) #3
%19 = tail call i32 @lock_rw_unlock(ptr noundef %0) #3
%20 = call i32 @az_xfr_allowed_notify(ptr noundef nonnull %13, ptr noundef %5, i32 noundef %6, ptr noundef nonnull %11) #3
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %24
22: ; preds = %17
%23 = call i32 @lock_basic_unlock(ptr noundef nonnull %13) #3
store i32 1, ptr %9, align 4, !tbaa !9
br label %27
24: ; preds = %17
%25 = load ptr, ptr %11, align 8, !tbaa !5
%26 = call i32 @xfr_process_notify(ptr noundef nonnull %13, ptr noundef %1, i32 noundef %7, i32 noundef %8, ptr noundef %25) #3
br label %27
27: ; preds = %24, %22, %15
%28 = phi i32 [ 1, %24 ], [ 0, %22 ], [ 0, %15 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %11) #3
ret i32 %28
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @lock_rw_rdlock(ptr noundef) local_unnamed_addr #2
declare ptr @auth_xfer_find(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @lock_rw_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @lock_basic_lock(ptr noundef) local_unnamed_addr #2
declare i32 @az_xfr_allowed_notify(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @lock_basic_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @xfr_process_notify(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_auth_zones_notify.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_auth_zones_notify.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @auth_zones_notify(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr nocapture noundef writeonly %9) local_unnamed_addr #0 {
%11 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %11) #3
store ptr null, ptr %11, align 8, !tbaa !6
%12 = tail call i32 @lock_rw_rdlock(ptr noundef %0) #3
%13 = tail call ptr @auth_xfer_find(ptr noundef %0, ptr noundef %2, i64 noundef %3, i32 noundef %4) #3
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = tail call i32 @lock_rw_unlock(ptr noundef %0) #3
store i32 1, ptr %9, align 4, !tbaa !10
br label %27
17: ; preds = %10
%18 = tail call i32 @lock_basic_lock(ptr noundef nonnull %13) #3
%19 = tail call i32 @lock_rw_unlock(ptr noundef %0) #3
%20 = call i32 @az_xfr_allowed_notify(ptr noundef nonnull %13, ptr noundef %5, i32 noundef %6, ptr noundef nonnull %11) #3
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %24
22: ; preds = %17
%23 = call i32 @lock_basic_unlock(ptr noundef nonnull %13) #3
store i32 1, ptr %9, align 4, !tbaa !10
br label %27
24: ; preds = %17
%25 = load ptr, ptr %11, align 8, !tbaa !6
%26 = call i32 @xfr_process_notify(ptr noundef nonnull %13, ptr noundef %1, i32 noundef %7, i32 noundef %8, ptr noundef %25) #3
br label %27
27: ; preds = %24, %22, %15
%28 = phi i32 [ 1, %24 ], [ 0, %22 ], [ 0, %15 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %11) #3
ret i32 %28
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @lock_rw_rdlock(ptr noundef) local_unnamed_addr #2
declare ptr @auth_xfer_find(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @lock_rw_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @lock_basic_lock(ptr noundef) local_unnamed_addr #2
declare i32 @az_xfr_allowed_notify(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @lock_basic_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @xfr_process_notify(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
|
freebsd_contrib_unbound_services_extr_authzone.c_auth_zones_notify
|
; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_sec.c_btm_pair_state_descr.c'
source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_sec.c_btm_pair_state_descr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { ptr }
@.str = private unnamed_addr constant [5 x i8] c"IDLE\00", align 1
@.str.1 = private unnamed_addr constant [13 x i8] c"GET_REM_NAME\00", align 1
@.str.2 = private unnamed_addr constant [13 x i8] c"WAIT_PIN_REQ\00", align 1
@.str.3 = private unnamed_addr constant [15 x i8] c"WAIT_LOCAL_PIN\00", align 1
@.str.4 = private unnamed_addr constant [17 x i8] c"WAIT_NUM_CONFIRM\00", align 1
@.str.5 = private unnamed_addr constant [10 x i8] c"KEY_ENTRY\00", align 1
@.str.6 = private unnamed_addr constant [19 x i8] c"WAIT_LOCAL_OOB_RSP\00", align 1
@.str.7 = private unnamed_addr constant [18 x i8] c"WAIT_LOCAL_IOCAPS\00", align 1
@.str.8 = private unnamed_addr constant [13 x i8] c"INCOMING_SSP\00", align 1
@.str.9 = private unnamed_addr constant [19 x i8] c"WAIT_AUTH_COMPLETE\00", align 1
@.str.10 = private unnamed_addr constant [16 x i8] c"WAIT_DISCONNECT\00", align 1
@.str.11 = private unnamed_addr constant [4 x i8] c"???\00", align 1
@btm_cb = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @btm_pair_state_descr], section "llvm.metadata"
@reltable.btm_pair_state_descr = private unnamed_addr constant [11 x i32] [i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.2 to i64), i64 ptrtoint (ptr @reltable.btm_pair_state_descr to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.4 to i64), i64 ptrtoint (ptr @reltable.btm_pair_state_descr to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.3 to i64), i64 ptrtoint (ptr @reltable.btm_pair_state_descr to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.6 to i64), i64 ptrtoint (ptr @reltable.btm_pair_state_descr to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.7 to i64), i64 ptrtoint (ptr @reltable.btm_pair_state_descr to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.10 to i64), i64 ptrtoint (ptr @reltable.btm_pair_state_descr to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.9 to i64), i64 ptrtoint (ptr @reltable.btm_pair_state_descr to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.5 to i64), i64 ptrtoint (ptr @reltable.btm_pair_state_descr to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.8 to i64), i64 ptrtoint (ptr @reltable.btm_pair_state_descr to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str to i64), i64 ptrtoint (ptr @reltable.btm_pair_state_descr to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.1 to i64), i64 ptrtoint (ptr @reltable.btm_pair_state_descr to i64)) to i32)], align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef nonnull ptr @btm_pair_state_descr(i32 noundef %0) #0 {
%2 = add i32 %0, -128
%3 = icmp ult i32 %2, 11
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = zext nneg i32 %2 to i64
%6 = shl i64 %5, 2
%7 = call ptr @llvm.load.relative.i64(ptr @reltable.btm_pair_state_descr, i64 %6)
br label %8
8: ; preds = %1, %4
%9 = phi ptr [ %7, %4 ], [ @.str.11, %1 ]
ret ptr %9
}
; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: read)
declare ptr @llvm.load.relative.i64(ptr, i64) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: read) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_sec.c_btm_pair_state_descr.c'
source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_sec.c_btm_pair_state_descr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { ptr }
@.str = private unnamed_addr constant [5 x i8] c"IDLE\00", align 1
@.str.1 = private unnamed_addr constant [13 x i8] c"GET_REM_NAME\00", align 1
@.str.2 = private unnamed_addr constant [13 x i8] c"WAIT_PIN_REQ\00", align 1
@.str.3 = private unnamed_addr constant [15 x i8] c"WAIT_LOCAL_PIN\00", align 1
@.str.4 = private unnamed_addr constant [17 x i8] c"WAIT_NUM_CONFIRM\00", align 1
@.str.5 = private unnamed_addr constant [10 x i8] c"KEY_ENTRY\00", align 1
@.str.6 = private unnamed_addr constant [19 x i8] c"WAIT_LOCAL_OOB_RSP\00", align 1
@.str.7 = private unnamed_addr constant [18 x i8] c"WAIT_LOCAL_IOCAPS\00", align 1
@.str.8 = private unnamed_addr constant [13 x i8] c"INCOMING_SSP\00", align 1
@.str.9 = private unnamed_addr constant [19 x i8] c"WAIT_AUTH_COMPLETE\00", align 1
@.str.10 = private unnamed_addr constant [16 x i8] c"WAIT_DISCONNECT\00", align 1
@.str.11 = private unnamed_addr constant [4 x i8] c"???\00", align 1
@btm_cb = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@llvm.used = appending global [1 x ptr] [ptr @btm_pair_state_descr], section "llvm.metadata"
@switch.table.btm_pair_state_descr = private unnamed_addr constant [11 x ptr] [ptr @.str.2, ptr @.str.4, ptr @.str.3, ptr @.str.6, ptr @.str.7, ptr @.str.10, ptr @.str.9, ptr @.str.5, ptr @.str.8, ptr @.str, ptr @.str.1], align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef nonnull ptr @btm_pair_state_descr(i32 noundef %0) #0 {
%2 = add i32 %0, -128
%3 = icmp ult i32 %2, 11
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = zext nneg i32 %2 to i64
%6 = getelementptr inbounds [11 x ptr], ptr @switch.table.btm_pair_state_descr, i64 0, i64 %5
%7 = load ptr, ptr %6, align 8
br label %8
8: ; preds = %1, %4
%9 = phi ptr [ %7, %4 ], [ @.str.11, %1 ]
ret ptr %9
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
esp-idf_components_bt_host_bluedroid_stack_btm_extr_btm_sec.c_btm_pair_state_descr
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_dbg_fw_funcs.c_ecore_find_nvram_image.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_dbg_fw_funcs.c_ecore_find_nvram_image.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mcp_file_att = type { i32, i32 }
@DRV_MSG_CODE_NVM_GET_FILE_ATT = dso_local local_unnamed_addr global i32 0, align 4
@FW_MSG_CODE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@FW_MSG_CODE_NVM_OK = dso_local local_unnamed_addr global i32 0, align 4
@DBG_STATUS_NVRAM_GET_IMAGE_FAILED = dso_local local_unnamed_addr global i32 0, align 4
@ECORE_MSG_DEBUG = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [92 x i8] c"find_nvram_image: found NVRAM image of type %d in NVRAM offset %d bytes with size %d bytes\0A\00", align 1
@DBG_STATUS_NON_ALIGNED_NVRAM_IMAGE = dso_local local_unnamed_addr global i32 0, align 4
@DBG_STATUS_OK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ecore_find_nvram_image], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ecore_find_nvram_image(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr nocapture noundef %3, ptr nocapture noundef %4) #0 {
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
%9 = alloca %struct.mcp_file_att, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #3
%10 = load i32, ptr @DRV_MSG_CODE_NVM_GET_FILE_ATT, align 4, !tbaa !5
%11 = call i32 @ecore_mcp_nvm_rd_cmd(ptr noundef %0, ptr noundef %1, i32 noundef %10, i32 noundef %2, ptr noundef nonnull %6, ptr noundef nonnull %7, ptr noundef nonnull %8, ptr noundef nonnull %9) #3
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %30
13: ; preds = %5
%14 = load i32, ptr %6, align 4, !tbaa !5
%15 = load i32, ptr @FW_MSG_CODE_MASK, align 4, !tbaa !5
%16 = and i32 %15, %14
%17 = load i32, ptr @FW_MSG_CODE_NVM_OK, align 4, !tbaa !5
%18 = icmp eq i32 %16, %17
br i1 %18, label %19, label %30
19: ; preds = %13
%20 = load i32, ptr %9, align 4, !tbaa !9
store i32 %20, ptr %3, align 4, !tbaa !5
%21 = getelementptr inbounds %struct.mcp_file_att, ptr %9, i64 0, i32 1
%22 = load i32, ptr %21, align 4, !tbaa !11
store i32 %22, ptr %4, align 4, !tbaa !5
%23 = load i32, ptr @ECORE_MSG_DEBUG, align 4, !tbaa !5
%24 = load i32, ptr %3, align 4, !tbaa !5
%25 = call i32 @DP_VERBOSE(ptr noundef %0, i32 noundef %23, ptr noundef nonnull @.str, i32 noundef %2, i32 noundef %24, i32 noundef %22) #3
%26 = load i32, ptr %4, align 4, !tbaa !5
%27 = and i32 %26, 3
%28 = icmp eq i32 %27, 0
%29 = select i1 %28, ptr @DBG_STATUS_OK, ptr @DBG_STATUS_NON_ALIGNED_NVRAM_IMAGE
br label %30
30: ; preds = %19, %5, %13
%31 = phi ptr [ @DBG_STATUS_NVRAM_GET_IMAGE_FAILED, %13 ], [ @DBG_STATUS_NVRAM_GET_IMAGE_FAILED, %5 ], [ %29, %19 ]
%32 = load i32, ptr %31, align 4, !tbaa !5
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
ret i32 %32
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ecore_mcp_nvm_rd_cmd(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @DP_VERBOSE(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"mcp_file_att", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_dbg_fw_funcs.c_ecore_find_nvram_image.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_dbg_fw_funcs.c_ecore_find_nvram_image.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.mcp_file_att = type { i32, i32 }
@DRV_MSG_CODE_NVM_GET_FILE_ATT = common local_unnamed_addr global i32 0, align 4
@FW_MSG_CODE_MASK = common local_unnamed_addr global i32 0, align 4
@FW_MSG_CODE_NVM_OK = common local_unnamed_addr global i32 0, align 4
@DBG_STATUS_NVRAM_GET_IMAGE_FAILED = common local_unnamed_addr global i32 0, align 4
@ECORE_MSG_DEBUG = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [92 x i8] c"find_nvram_image: found NVRAM image of type %d in NVRAM offset %d bytes with size %d bytes\0A\00", align 1
@DBG_STATUS_NON_ALIGNED_NVRAM_IMAGE = common local_unnamed_addr global i32 0, align 4
@DBG_STATUS_OK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ecore_find_nvram_image], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ecore_find_nvram_image(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr nocapture noundef %3, ptr nocapture noundef %4) #0 {
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
%9 = alloca %struct.mcp_file_att, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #3
%10 = load i32, ptr @DRV_MSG_CODE_NVM_GET_FILE_ATT, align 4, !tbaa !6
%11 = call i32 @ecore_mcp_nvm_rd_cmd(ptr noundef %0, ptr noundef %1, i32 noundef %10, i32 noundef %2, ptr noundef nonnull %6, ptr noundef nonnull %7, ptr noundef nonnull %8, ptr noundef nonnull %9) #3
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %30
13: ; preds = %5
%14 = load i32, ptr %6, align 4, !tbaa !6
%15 = load i32, ptr @FW_MSG_CODE_MASK, align 4, !tbaa !6
%16 = and i32 %15, %14
%17 = load i32, ptr @FW_MSG_CODE_NVM_OK, align 4, !tbaa !6
%18 = icmp eq i32 %16, %17
br i1 %18, label %19, label %30
19: ; preds = %13
%20 = load i32, ptr %9, align 4, !tbaa !10
store i32 %20, ptr %3, align 4, !tbaa !6
%21 = getelementptr inbounds i8, ptr %9, i64 4
%22 = load i32, ptr %21, align 4, !tbaa !12
store i32 %22, ptr %4, align 4, !tbaa !6
%23 = load i32, ptr @ECORE_MSG_DEBUG, align 4, !tbaa !6
%24 = load i32, ptr %3, align 4, !tbaa !6
%25 = call i32 @DP_VERBOSE(ptr noundef %0, i32 noundef %23, ptr noundef nonnull @.str, i32 noundef %2, i32 noundef %24, i32 noundef %22) #3
%26 = load i32, ptr %4, align 4, !tbaa !6
%27 = and i32 %26, 3
%28 = icmp eq i32 %27, 0
%29 = select i1 %28, ptr @DBG_STATUS_OK, ptr @DBG_STATUS_NON_ALIGNED_NVRAM_IMAGE
br label %30
30: ; preds = %19, %5, %13
%31 = phi ptr [ @DBG_STATUS_NVRAM_GET_IMAGE_FAILED, %13 ], [ @DBG_STATUS_NVRAM_GET_IMAGE_FAILED, %5 ], [ %29, %19 ]
%32 = load i32, ptr %31, align 4, !tbaa !6
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
ret i32 %32
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ecore_mcp_nvm_rd_cmd(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @DP_VERBOSE(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"mcp_file_att", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 4}
|
freebsd_sys_dev_qlnx_qlnxe_extr_ecore_dbg_fw_funcs.c_ecore_find_nvram_image
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.c_pci_allocate_cap_save_buffers.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.c_pci_allocate_cap_save_buffers.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PCI_CAP_ID_EXP = dso_local local_unnamed_addr global i32 0, align 4
@PCI_EXP_SAVE_REGS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [47 x i8] c"unable to preallocate PCI Express save buffer\0A\00", align 1
@PCI_CAP_ID_PCIX = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [41 x i8] c"unable to preallocate PCI-X save buffer\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @pci_allocate_cap_save_buffers(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @PCI_CAP_ID_EXP, align 4, !tbaa !5
%3 = load i32, ptr @PCI_EXP_SAVE_REGS, align 4, !tbaa !5
%4 = shl i32 %3, 2
%5 = tail call i32 @pci_add_cap_save_buffer(ptr noundef %0, i32 noundef %2, i32 noundef %4) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str) #2
br label %9
9: ; preds = %7, %1
%10 = load i32, ptr @PCI_CAP_ID_PCIX, align 4, !tbaa !5
%11 = tail call i32 @pci_add_cap_save_buffer(ptr noundef %0, i32 noundef %10, i32 noundef 4) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %9
%14 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str.1) #2
br label %15
15: ; preds = %13, %9
ret void
}
declare i32 @pci_add_cap_save_buffer(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.c_pci_allocate_cap_save_buffers.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.c_pci_allocate_cap_save_buffers.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PCI_CAP_ID_EXP = common local_unnamed_addr global i32 0, align 4
@PCI_EXP_SAVE_REGS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [47 x i8] c"unable to preallocate PCI Express save buffer\0A\00", align 1
@PCI_CAP_ID_PCIX = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [41 x i8] c"unable to preallocate PCI-X save buffer\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @pci_allocate_cap_save_buffers(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @PCI_CAP_ID_EXP, align 4, !tbaa !6
%3 = load i32, ptr @PCI_EXP_SAVE_REGS, align 4, !tbaa !6
%4 = shl i32 %3, 2
%5 = tail call i32 @pci_add_cap_save_buffer(ptr noundef %0, i32 noundef %2, i32 noundef %4) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str) #2
br label %9
9: ; preds = %7, %1
%10 = load i32, ptr @PCI_CAP_ID_PCIX, align 4, !tbaa !6
%11 = tail call i32 @pci_add_cap_save_buffer(ptr noundef %0, i32 noundef %10, i32 noundef 4) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %9
%14 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str.1) #2
br label %15
15: ; preds = %13, %9
ret void
}
declare i32 @pci_add_cap_save_buffer(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_drivers_pci_extr_pci.c_pci_allocate_cap_save_buffers
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/plat-pxa/extr_mfp.c_mfp_config.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/plat-pxa/extr_mfp.c_mfp_config.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mfp_pin = type { i64, i64, i64 }
@mfp_spin_lock = dso_local global i32 0, align 4
@MFP_PIN_MAX = dso_local local_unnamed_addr global i32 0, align 4
@mfp_table = dso_local local_unnamed_addr global ptr null, align 8
@MFP_PULL_NONE = dso_local local_unnamed_addr global i32 0, align 4
@mfpr_lpm = dso_local local_unnamed_addr global ptr null, align 8
@mfpr_edge = dso_local local_unnamed_addr global ptr null, align 8
@mfpr_pull = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @mfp_config(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull @mfp_spin_lock, i64 noundef undef) #2
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %54
5: ; preds = %2, %47
%6 = phi ptr [ %52, %47 ], [ %0, %2 ]
%7 = phi i32 [ %51, %47 ], [ 0, %2 ]
%8 = load i64, ptr %6, align 8, !tbaa !5
%9 = tail call i32 @MFP_PIN(i64 noundef %8) #2
%10 = load i32, ptr @MFP_PIN_MAX, align 4, !tbaa !9
%11 = icmp sge i32 %9, %10
%12 = zext i1 %11 to i32
%13 = tail call i32 @BUG_ON(i32 noundef %12) #2
%14 = load ptr, ptr @mfp_table, align 8, !tbaa !11
%15 = sext i32 %9 to i64
%16 = getelementptr inbounds %struct.mfp_pin, ptr %14, i64 %15
%17 = tail call i32 @MFP_AF(i64 noundef %8) #2
%18 = tail call i32 @MFP_DS(i64 noundef %8) #2
%19 = tail call i32 @MFP_LPM_STATE(i64 noundef %8) #2
%20 = tail call i32 @MFP_LPM_EDGE(i64 noundef %8) #2
%21 = tail call i32 @MFP_PULL(i64 noundef %8) #2
%22 = tail call i64 @MFPR_AF_SEL(i32 noundef %17) #2
%23 = tail call i64 @MFPR_DRIVE(i32 noundef %18) #2
%24 = or i64 %23, %22
%25 = load i32, ptr @MFP_PULL_NONE, align 4, !tbaa !9
%26 = icmp eq i32 %21, %25
%27 = zext i1 %26 to i32
%28 = tail call i64 @likely(i32 noundef %27) #2
%29 = icmp eq i64 %28, 0
%30 = load ptr, ptr @mfpr_lpm, align 8, !tbaa !11
%31 = sext i32 %19 to i64
%32 = getelementptr inbounds i64, ptr %30, i64 %31
%33 = load i64, ptr %32, align 8, !tbaa !5
%34 = load ptr, ptr @mfpr_edge, align 8, !tbaa !11
%35 = sext i32 %20 to i64
%36 = getelementptr inbounds i64, ptr %34, i64 %35
%37 = load i64, ptr %36, align 8, !tbaa !5
%38 = or i64 %33, %37
%39 = or i64 %38, %24
%40 = getelementptr inbounds %struct.mfp_pin, ptr %14, i64 %15, i32 1
store i64 %39, ptr %40, align 8, !tbaa !13
br i1 %29, label %41, label %47
41: ; preds = %5
%42 = load ptr, ptr @mfpr_pull, align 8, !tbaa !11
%43 = sext i32 %21 to i64
%44 = getelementptr inbounds i64, ptr %42, i64 %43
%45 = load i64, ptr %44, align 8, !tbaa !5
%46 = or i64 %45, %24
br label %47
47: ; preds = %5, %41
%48 = phi i64 [ %46, %41 ], [ %39, %5 ]
store i64 %48, ptr %16, align 8
%49 = getelementptr inbounds %struct.mfp_pin, ptr %14, i64 %15, i32 2
store i64 %8, ptr %49, align 8, !tbaa !15
%50 = tail call i32 @__mfp_config_run(ptr noundef nonnull %16) #2
%51 = add nuw nsw i32 %7, 1
%52 = getelementptr inbounds i64, ptr %6, i64 1
%53 = icmp eq i32 %51, %1
br i1 %53, label %54, label %5, !llvm.loop !16
54: ; preds = %47, %2
%55 = tail call i32 (...) @mfpr_sync() #2
%56 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull @mfp_spin_lock, i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @MFP_PIN(i64 noundef) local_unnamed_addr #1
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
declare i32 @MFP_AF(i64 noundef) local_unnamed_addr #1
declare i32 @MFP_DS(i64 noundef) local_unnamed_addr #1
declare i32 @MFP_LPM_STATE(i64 noundef) local_unnamed_addr #1
declare i32 @MFP_LPM_EDGE(i64 noundef) local_unnamed_addr #1
declare i32 @MFP_PULL(i64 noundef) local_unnamed_addr #1
declare i64 @MFPR_AF_SEL(i32 noundef) local_unnamed_addr #1
declare i64 @MFPR_DRIVE(i32 noundef) local_unnamed_addr #1
declare i64 @likely(i32 noundef) local_unnamed_addr #1
declare i32 @__mfp_config_run(ptr noundef) local_unnamed_addr #1
declare i32 @mfpr_sync(...) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !6, i64 8}
!14 = !{!"mfp_pin", !6, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!14, !6, i64 16}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/plat-pxa/extr_mfp.c_mfp_config.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/plat-pxa/extr_mfp.c_mfp_config.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.mfp_pin = type { i64, i64, i64 }
@mfp_spin_lock = common global i32 0, align 4
@MFP_PIN_MAX = common local_unnamed_addr global i32 0, align 4
@mfp_table = common local_unnamed_addr global ptr null, align 8
@MFP_PULL_NONE = common local_unnamed_addr global i32 0, align 4
@mfpr_lpm = common local_unnamed_addr global ptr null, align 8
@mfpr_edge = common local_unnamed_addr global ptr null, align 8
@mfpr_pull = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @mfp_config(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull @mfp_spin_lock, i64 noundef undef) #2
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %54
5: ; preds = %2, %47
%6 = phi ptr [ %52, %47 ], [ %0, %2 ]
%7 = phi i32 [ %51, %47 ], [ 0, %2 ]
%8 = load i64, ptr %6, align 8, !tbaa !6
%9 = tail call i32 @MFP_PIN(i64 noundef %8) #2
%10 = load i32, ptr @MFP_PIN_MAX, align 4, !tbaa !10
%11 = icmp sge i32 %9, %10
%12 = zext i1 %11 to i32
%13 = tail call i32 @BUG_ON(i32 noundef %12) #2
%14 = load ptr, ptr @mfp_table, align 8, !tbaa !12
%15 = sext i32 %9 to i64
%16 = getelementptr inbounds %struct.mfp_pin, ptr %14, i64 %15
%17 = tail call i32 @MFP_AF(i64 noundef %8) #2
%18 = tail call i32 @MFP_DS(i64 noundef %8) #2
%19 = tail call i32 @MFP_LPM_STATE(i64 noundef %8) #2
%20 = tail call i32 @MFP_LPM_EDGE(i64 noundef %8) #2
%21 = tail call i32 @MFP_PULL(i64 noundef %8) #2
%22 = tail call i64 @MFPR_AF_SEL(i32 noundef %17) #2
%23 = tail call i64 @MFPR_DRIVE(i32 noundef %18) #2
%24 = or i64 %23, %22
%25 = load i32, ptr @MFP_PULL_NONE, align 4, !tbaa !10
%26 = icmp eq i32 %21, %25
%27 = zext i1 %26 to i32
%28 = tail call i64 @likely(i32 noundef %27) #2
%29 = icmp eq i64 %28, 0
%30 = load ptr, ptr @mfpr_lpm, align 8, !tbaa !12
%31 = sext i32 %19 to i64
%32 = getelementptr inbounds i64, ptr %30, i64 %31
%33 = load i64, ptr %32, align 8, !tbaa !6
%34 = load ptr, ptr @mfpr_edge, align 8, !tbaa !12
%35 = sext i32 %20 to i64
%36 = getelementptr inbounds i64, ptr %34, i64 %35
%37 = load i64, ptr %36, align 8, !tbaa !6
%38 = or i64 %33, %37
%39 = or i64 %38, %24
%40 = getelementptr inbounds i8, ptr %16, i64 8
store i64 %39, ptr %40, align 8, !tbaa !14
br i1 %29, label %41, label %47
41: ; preds = %5
%42 = load ptr, ptr @mfpr_pull, align 8, !tbaa !12
%43 = sext i32 %21 to i64
%44 = getelementptr inbounds i64, ptr %42, i64 %43
%45 = load i64, ptr %44, align 8, !tbaa !6
%46 = or i64 %45, %24
br label %47
47: ; preds = %5, %41
%48 = phi i64 [ %46, %41 ], [ %39, %5 ]
store i64 %48, ptr %16, align 8
%49 = getelementptr inbounds i8, ptr %16, i64 16
store i64 %8, ptr %49, align 8, !tbaa !16
%50 = tail call i32 @__mfp_config_run(ptr noundef nonnull %16) #2
%51 = add nuw nsw i32 %7, 1
%52 = getelementptr inbounds i8, ptr %6, i64 8
%53 = icmp eq i32 %51, %1
br i1 %53, label %54, label %5, !llvm.loop !17
54: ; preds = %47, %2
%55 = tail call i32 @mfpr_sync() #2
%56 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull @mfp_spin_lock, i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @MFP_PIN(i64 noundef) local_unnamed_addr #1
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
declare i32 @MFP_AF(i64 noundef) local_unnamed_addr #1
declare i32 @MFP_DS(i64 noundef) local_unnamed_addr #1
declare i32 @MFP_LPM_STATE(i64 noundef) local_unnamed_addr #1
declare i32 @MFP_LPM_EDGE(i64 noundef) local_unnamed_addr #1
declare i32 @MFP_PULL(i64 noundef) local_unnamed_addr #1
declare i64 @MFPR_AF_SEL(i32 noundef) local_unnamed_addr #1
declare i64 @MFPR_DRIVE(i32 noundef) local_unnamed_addr #1
declare i64 @likely(i32 noundef) local_unnamed_addr #1
declare i32 @__mfp_config_run(ptr noundef) local_unnamed_addr #1
declare i32 @mfpr_sync(...) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !7, i64 8}
!15 = !{!"mfp_pin", !7, i64 0, !7, i64 8, !7, i64 16}
!16 = !{!15, !7, i64 16}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
|
fastsocket_kernel_arch_arm_plat-pxa_extr_mfp.c_mfp_config
|
; ModuleID = 'AnghaBench/DOOM/linuxdoom-1.10/extr_p_telept.c_EV_Teleport.c'
source_filename = "AnghaBench/DOOM/linuxdoom-1.10/extr_p_telept.c_EV_Teleport.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_18__ = type { %struct.TYPE_15__, ptr }
%struct.TYPE_15__ = type { i64 }
%struct.TYPE_19__ = type { i32 }
%struct.TYPE_20__ = type { i32, i64, i32, i32, i64, i64, i64, ptr, i64, i64, i64, i64, ptr }
%struct.TYPE_17__ = type { i64, i64 }
@MF_MISSILE = dso_local local_unnamed_addr global i32 0, align 4
@numsectors = dso_local local_unnamed_addr global i32 0, align 4
@sectors = dso_local local_unnamed_addr global ptr null, align 8
@thinkercap = dso_local global %struct.TYPE_18__ zeroinitializer, align 8
@P_MobjThinker = dso_local local_unnamed_addr global i64 0, align 8
@MT_TELEPORTMAN = dso_local local_unnamed_addr global i64 0, align 8
@MT_TFOG = dso_local local_unnamed_addr global i32 0, align 4
@sfx_telept = dso_local local_unnamed_addr global i32 0, align 4
@ANGLETOFINESHIFT = dso_local local_unnamed_addr global i32 0, align 4
@finecosine = dso_local local_unnamed_addr global ptr null, align 8
@finesine = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @EV_Teleport(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr %2, align 8, !tbaa !5
%5 = load i32, ptr @MF_MISSILE, align 4, !tbaa !12
%6 = and i32 %5, %4
%7 = icmp ne i32 %6, 0
%8 = icmp eq i32 %1, 1
%9 = or i1 %8, %7
br i1 %9, label %114, label %10
10: ; preds = %3
%11 = load i32, ptr %0, align 4, !tbaa !13
%12 = load i32, ptr @numsectors, align 4, !tbaa !12
%13 = icmp sgt i32 %12, 0
br i1 %13, label %14, label %114
14: ; preds = %10
%15 = load ptr, ptr @sectors, align 8, !tbaa !15
%16 = load ptr, ptr getelementptr inbounds (%struct.TYPE_18__, ptr @thinkercap, i64 0, i32 1), align 8
%17 = icmp eq ptr %16, @thinkercap
%18 = load i64, ptr @P_MobjThinker, align 8
%19 = load i64, ptr @MT_TELEPORTMAN, align 8
%20 = ptrtoint ptr %15 to i64
%21 = zext nneg i32 %12 to i64
br label %22
22: ; preds = %14, %111
%23 = phi i64 [ 0, %14 ], [ %112, %111 ]
%24 = getelementptr inbounds %struct.TYPE_19__, ptr %15, i64 %23
%25 = load i32, ptr %24, align 4, !tbaa !16
%26 = icmp ne i32 %25, %11
%27 = select i1 %26, i1 true, i1 %17
br i1 %27, label %111, label %28
28: ; preds = %22, %108
%29 = phi ptr [ %109, %108 ], [ %16, %22 ]
%30 = load i64, ptr %29, align 8, !tbaa !18
%31 = icmp eq i64 %30, %18
br i1 %31, label %35, label %32
32: ; preds = %28
%33 = getelementptr inbounds %struct.TYPE_18__, ptr %29, i64 0, i32 1
%34 = load ptr, ptr %33, align 8, !tbaa !21
br label %108
35: ; preds = %28
%36 = getelementptr inbounds %struct.TYPE_20__, ptr %29, i64 0, i32 1
%37 = load i64, ptr %36, align 8
%38 = icmp eq i64 %37, %19
%39 = inttoptr i64 %37 to ptr
br i1 %38, label %40, label %108
40: ; preds = %35
%41 = getelementptr inbounds %struct.TYPE_20__, ptr %29, i64 0, i32 12
%42 = load ptr, ptr %41, align 8, !tbaa !22
%43 = load ptr, ptr %42, align 8, !tbaa !23
%44 = ptrtoint ptr %43 to i64
%45 = sub i64 %44, %20
%46 = ashr exact i64 %45, 2
%47 = icmp eq i64 %46, %23
br i1 %47, label %48, label %108
48: ; preds = %40
%49 = getelementptr inbounds %struct.TYPE_20__, ptr %2, i64 0, i32 10
%50 = load i64, ptr %49, align 8, !tbaa !25
%51 = getelementptr inbounds %struct.TYPE_20__, ptr %2, i64 0, i32 9
%52 = load i64, ptr %51, align 8, !tbaa !26
%53 = getelementptr inbounds %struct.TYPE_20__, ptr %2, i64 0, i32 8
%54 = load i64, ptr %53, align 8, !tbaa !27
%55 = getelementptr inbounds %struct.TYPE_20__, ptr %29, i64 0, i32 10
%56 = load i64, ptr %55, align 8, !tbaa !25
%57 = getelementptr inbounds %struct.TYPE_20__, ptr %29, i64 0, i32 9
%58 = load i64, ptr %57, align 8, !tbaa !26
%59 = tail call i32 @P_TeleportMove(ptr noundef nonnull %2, i64 noundef %56, i64 noundef %58) #3
%60 = icmp eq i32 %59, 0
br i1 %60, label %114, label %61
61: ; preds = %48
%62 = getelementptr inbounds %struct.TYPE_20__, ptr %2, i64 0, i32 11
%63 = load i64, ptr %62, align 8, !tbaa !28
store i64 %63, ptr %53, align 8, !tbaa !27
%64 = getelementptr inbounds %struct.TYPE_20__, ptr %2, i64 0, i32 7
%65 = load ptr, ptr %64, align 8, !tbaa !29
%66 = icmp eq ptr %65, null
br i1 %66, label %71, label %67
67: ; preds = %61
%68 = load i64, ptr %65, align 8, !tbaa !30
%69 = add nsw i64 %68, %63
%70 = getelementptr inbounds %struct.TYPE_17__, ptr %65, i64 0, i32 1
store i64 %69, ptr %70, align 8, !tbaa !32
br label %71
71: ; preds = %67, %61
%72 = load i32, ptr @MT_TFOG, align 4, !tbaa !12
%73 = tail call ptr @P_SpawnMobj(i64 noundef %50, i64 noundef %52, i64 noundef %54, i32 noundef %72) #3
%74 = load i32, ptr @sfx_telept, align 4, !tbaa !12
%75 = tail call i32 @S_StartSound(ptr noundef %73, i32 noundef %74) #3
%76 = getelementptr inbounds %struct.TYPE_20__, ptr %29, i64 0, i32 2
%77 = load i32, ptr %76, align 8, !tbaa !33
%78 = load i32, ptr @ANGLETOFINESHIFT, align 4, !tbaa !12
%79 = lshr i32 %77, %78
%80 = load i64, ptr %55, align 8, !tbaa !25
%81 = load ptr, ptr @finecosine, align 8, !tbaa !15
%82 = zext i32 %79 to i64
%83 = getelementptr inbounds i32, ptr %81, i64 %82
%84 = load i32, ptr %83, align 4, !tbaa !12
%85 = mul nsw i32 %84, 20
%86 = sext i32 %85 to i64
%87 = add nsw i64 %80, %86
%88 = load i64, ptr %57, align 8, !tbaa !26
%89 = load ptr, ptr @finesine, align 8, !tbaa !15
%90 = getelementptr inbounds i32, ptr %89, i64 %82
%91 = load i32, ptr %90, align 4, !tbaa !12
%92 = mul nsw i32 %91, 20
%93 = sext i32 %92 to i64
%94 = add nsw i64 %88, %93
%95 = load i64, ptr %53, align 8, !tbaa !27
%96 = load i32, ptr @MT_TFOG, align 4, !tbaa !12
%97 = tail call ptr @P_SpawnMobj(i64 noundef %87, i64 noundef %94, i64 noundef %95, i32 noundef %96) #3
%98 = load i32, ptr @sfx_telept, align 4, !tbaa !12
%99 = tail call i32 @S_StartSound(ptr noundef %97, i32 noundef %98) #3
%100 = load ptr, ptr %64, align 8, !tbaa !29
%101 = icmp eq ptr %100, null
br i1 %101, label %104, label %102
102: ; preds = %71
%103 = getelementptr inbounds %struct.TYPE_20__, ptr %2, i64 0, i32 3
store i32 18, ptr %103, align 4, !tbaa !34
br label %104
104: ; preds = %102, %71
%105 = load i32, ptr %76, align 8, !tbaa !33
%106 = getelementptr inbounds %struct.TYPE_20__, ptr %2, i64 0, i32 2
store i32 %105, ptr %106, align 8, !tbaa !33
%107 = getelementptr inbounds %struct.TYPE_20__, ptr %2, i64 0, i32 4
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %107, i8 0, i64 24, i1 false)
br label %114
108: ; preds = %32, %40, %35
%109 = phi ptr [ %34, %32 ], [ %39, %40 ], [ %39, %35 ]
%110 = icmp eq ptr %109, @thinkercap
br i1 %110, label %111, label %28, !llvm.loop !35
111: ; preds = %108, %22
%112 = add nuw nsw i64 %23, 1
%113 = icmp eq i64 %112, %21
br i1 %113, label %114, label %22, !llvm.loop !37
114: ; preds = %111, %10, %48, %3, %104
%115 = phi i32 [ 1, %104 ], [ 0, %3 ], [ 0, %48 ], [ 0, %10 ], [ 0, %111 ]
ret i32 %115
}
declare i32 @P_TeleportMove(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare ptr @P_SpawnMobj(i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @S_StartSound(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_20__", !7, i64 0, !10, i64 8, !7, i64 16, !7, i64 20, !10, i64 24, !10, i64 32, !10, i64 40, !11, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !11, i64 88}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_21__", !7, i64 0}
!15 = !{!11, !11, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_19__", !7, i64 0}
!18 = !{!19, !10, i64 0}
!19 = !{!"TYPE_18__", !20, i64 0, !11, i64 8}
!20 = !{!"TYPE_15__", !10, i64 0}
!21 = !{!19, !11, i64 8}
!22 = !{!6, !11, i64 88}
!23 = !{!24, !11, i64 0}
!24 = !{!"TYPE_16__", !11, i64 0}
!25 = !{!6, !10, i64 72}
!26 = !{!6, !10, i64 64}
!27 = !{!6, !10, i64 56}
!28 = !{!6, !10, i64 80}
!29 = !{!6, !11, i64 48}
!30 = !{!31, !10, i64 0}
!31 = !{!"TYPE_17__", !10, i64 0, !10, i64 8}
!32 = !{!31, !10, i64 8}
!33 = !{!6, !7, i64 16}
!34 = !{!6, !7, i64 20}
!35 = distinct !{!35, !36}
!36 = !{!"llvm.loop.mustprogress"}
!37 = distinct !{!37, !36}
|
; ModuleID = 'AnghaBench/DOOM/linuxdoom-1.10/extr_p_telept.c_EV_Teleport.c'
source_filename = "AnghaBench/DOOM/linuxdoom-1.10/extr_p_telept.c_EV_Teleport.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_18__ = type { %struct.TYPE_15__, ptr }
%struct.TYPE_15__ = type { i64 }
%struct.TYPE_19__ = type { i32 }
@MF_MISSILE = common local_unnamed_addr global i32 0, align 4
@numsectors = common local_unnamed_addr global i32 0, align 4
@sectors = common local_unnamed_addr global ptr null, align 8
@thinkercap = common global %struct.TYPE_18__ zeroinitializer, align 8
@P_MobjThinker = common local_unnamed_addr global i64 0, align 8
@MT_TELEPORTMAN = common local_unnamed_addr global i64 0, align 8
@MT_TFOG = common local_unnamed_addr global i32 0, align 4
@sfx_telept = common local_unnamed_addr global i32 0, align 4
@ANGLETOFINESHIFT = common local_unnamed_addr global i32 0, align 4
@finecosine = common local_unnamed_addr global ptr null, align 8
@finesine = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @EV_Teleport(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr %2, align 8, !tbaa !6
%5 = load i32, ptr @MF_MISSILE, align 4, !tbaa !13
%6 = and i32 %5, %4
%7 = icmp ne i32 %6, 0
%8 = icmp eq i32 %1, 1
%9 = or i1 %8, %7
br i1 %9, label %113, label %10
10: ; preds = %3
%11 = load i32, ptr %0, align 4, !tbaa !14
%12 = load i32, ptr @numsectors, align 4, !tbaa !13
%13 = icmp sgt i32 %12, 0
br i1 %13, label %14, label %113
14: ; preds = %10
%15 = load ptr, ptr @sectors, align 8, !tbaa !16
%16 = load ptr, ptr getelementptr inbounds (i8, ptr @thinkercap, i64 8), align 8
%17 = icmp eq ptr %16, @thinkercap
%18 = load i64, ptr @P_MobjThinker, align 8
%19 = load i64, ptr @MT_TELEPORTMAN, align 8
%20 = ptrtoint ptr %15 to i64
%21 = zext nneg i32 %12 to i64
br label %22
22: ; preds = %14, %110
%23 = phi i64 [ 0, %14 ], [ %111, %110 ]
%24 = getelementptr inbounds %struct.TYPE_19__, ptr %15, i64 %23
%25 = load i32, ptr %24, align 4, !tbaa !17
%26 = icmp ne i32 %25, %11
%27 = select i1 %26, i1 true, i1 %17
br i1 %27, label %110, label %28
28: ; preds = %22, %107
%29 = phi ptr [ %108, %107 ], [ %16, %22 ]
%30 = load i64, ptr %29, align 8, !tbaa !19
%31 = icmp eq i64 %30, %18
%32 = getelementptr inbounds i8, ptr %29, i64 8
br i1 %31, label %35, label %33
33: ; preds = %28
%34 = load ptr, ptr %32, align 8, !tbaa !22
br label %107
35: ; preds = %28
%36 = load i64, ptr %32, align 8
%37 = icmp eq i64 %36, %19
%38 = inttoptr i64 %36 to ptr
br i1 %37, label %39, label %107
39: ; preds = %35
%40 = getelementptr inbounds i8, ptr %29, i64 88
%41 = load ptr, ptr %40, align 8, !tbaa !23
%42 = load ptr, ptr %41, align 8, !tbaa !24
%43 = ptrtoint ptr %42 to i64
%44 = sub i64 %43, %20
%45 = ashr exact i64 %44, 2
%46 = icmp eq i64 %45, %23
br i1 %46, label %47, label %107
47: ; preds = %39
%48 = getelementptr inbounds i8, ptr %2, i64 72
%49 = load i64, ptr %48, align 8, !tbaa !26
%50 = getelementptr inbounds i8, ptr %2, i64 64
%51 = load i64, ptr %50, align 8, !tbaa !27
%52 = getelementptr inbounds i8, ptr %2, i64 56
%53 = load i64, ptr %52, align 8, !tbaa !28
%54 = getelementptr inbounds i8, ptr %29, i64 72
%55 = load i64, ptr %54, align 8, !tbaa !26
%56 = getelementptr inbounds i8, ptr %29, i64 64
%57 = load i64, ptr %56, align 8, !tbaa !27
%58 = tail call i32 @P_TeleportMove(ptr noundef nonnull %2, i64 noundef %55, i64 noundef %57) #3
%59 = icmp eq i32 %58, 0
br i1 %59, label %113, label %60
60: ; preds = %47
%61 = getelementptr inbounds i8, ptr %2, i64 80
%62 = load i64, ptr %61, align 8, !tbaa !29
store i64 %62, ptr %52, align 8, !tbaa !28
%63 = getelementptr inbounds i8, ptr %2, i64 48
%64 = load ptr, ptr %63, align 8, !tbaa !30
%65 = icmp eq ptr %64, null
br i1 %65, label %70, label %66
66: ; preds = %60
%67 = load i64, ptr %64, align 8, !tbaa !31
%68 = add nsw i64 %67, %62
%69 = getelementptr inbounds i8, ptr %64, i64 8
store i64 %68, ptr %69, align 8, !tbaa !33
br label %70
70: ; preds = %66, %60
%71 = load i32, ptr @MT_TFOG, align 4, !tbaa !13
%72 = tail call ptr @P_SpawnMobj(i64 noundef %49, i64 noundef %51, i64 noundef %53, i32 noundef %71) #3
%73 = load i32, ptr @sfx_telept, align 4, !tbaa !13
%74 = tail call i32 @S_StartSound(ptr noundef %72, i32 noundef %73) #3
%75 = getelementptr inbounds i8, ptr %29, i64 16
%76 = load i32, ptr %75, align 8, !tbaa !34
%77 = load i32, ptr @ANGLETOFINESHIFT, align 4, !tbaa !13
%78 = lshr i32 %76, %77
%79 = load i64, ptr %54, align 8, !tbaa !26
%80 = load ptr, ptr @finecosine, align 8, !tbaa !16
%81 = zext i32 %78 to i64
%82 = getelementptr inbounds i32, ptr %80, i64 %81
%83 = load i32, ptr %82, align 4, !tbaa !13
%84 = mul nsw i32 %83, 20
%85 = sext i32 %84 to i64
%86 = add nsw i64 %79, %85
%87 = load i64, ptr %56, align 8, !tbaa !27
%88 = load ptr, ptr @finesine, align 8, !tbaa !16
%89 = getelementptr inbounds i32, ptr %88, i64 %81
%90 = load i32, ptr %89, align 4, !tbaa !13
%91 = mul nsw i32 %90, 20
%92 = sext i32 %91 to i64
%93 = add nsw i64 %87, %92
%94 = load i64, ptr %52, align 8, !tbaa !28
%95 = load i32, ptr @MT_TFOG, align 4, !tbaa !13
%96 = tail call ptr @P_SpawnMobj(i64 noundef %86, i64 noundef %93, i64 noundef %94, i32 noundef %95) #3
%97 = load i32, ptr @sfx_telept, align 4, !tbaa !13
%98 = tail call i32 @S_StartSound(ptr noundef %96, i32 noundef %97) #3
%99 = load ptr, ptr %63, align 8, !tbaa !30
%100 = icmp eq ptr %99, null
br i1 %100, label %103, label %101
101: ; preds = %70
%102 = getelementptr inbounds i8, ptr %2, i64 20
store i32 18, ptr %102, align 4, !tbaa !35
br label %103
103: ; preds = %101, %70
%104 = load i32, ptr %75, align 8, !tbaa !34
%105 = getelementptr inbounds i8, ptr %2, i64 16
store i32 %104, ptr %105, align 8, !tbaa !34
%106 = getelementptr inbounds i8, ptr %2, i64 24
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %106, i8 0, i64 24, i1 false)
br label %113
107: ; preds = %33, %39, %35
%108 = phi ptr [ %34, %33 ], [ %38, %39 ], [ %38, %35 ]
%109 = icmp eq ptr %108, @thinkercap
br i1 %109, label %110, label %28, !llvm.loop !36
110: ; preds = %107, %22
%111 = add nuw nsw i64 %23, 1
%112 = icmp eq i64 %111, %21
br i1 %112, label %113, label %22, !llvm.loop !38
113: ; preds = %110, %10, %47, %3, %103
%114 = phi i32 [ 1, %103 ], [ 0, %3 ], [ 0, %47 ], [ 0, %10 ], [ 0, %110 ]
ret i32 %114
}
declare i32 @P_TeleportMove(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare ptr @P_SpawnMobj(i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @S_StartSound(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_20__", !8, i64 0, !11, i64 8, !8, i64 16, !8, i64 20, !11, i64 24, !11, i64 32, !11, i64 40, !12, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !12, i64 88}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"TYPE_21__", !8, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!18, !8, i64 0}
!18 = !{!"TYPE_19__", !8, i64 0}
!19 = !{!20, !11, i64 0}
!20 = !{!"TYPE_18__", !21, i64 0, !12, i64 8}
!21 = !{!"TYPE_15__", !11, i64 0}
!22 = !{!20, !12, i64 8}
!23 = !{!7, !12, i64 88}
!24 = !{!25, !12, i64 0}
!25 = !{!"TYPE_16__", !12, i64 0}
!26 = !{!7, !11, i64 72}
!27 = !{!7, !11, i64 64}
!28 = !{!7, !11, i64 56}
!29 = !{!7, !11, i64 80}
!30 = !{!7, !12, i64 48}
!31 = !{!32, !11, i64 0}
!32 = !{!"TYPE_17__", !11, i64 0, !11, i64 8}
!33 = !{!32, !11, i64 8}
!34 = !{!7, !8, i64 16}
!35 = !{!7, !8, i64 20}
!36 = distinct !{!36, !37}
!37 = !{!"llvm.loop.mustprogress"}
!38 = distinct !{!38, !37}
|
DOOM_linuxdoom-1.10_extr_p_telept.c_EV_Teleport
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/ide/extr_ide-cd.c_idecd_open.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/ide/extr_ide-cd.c_idecd_open.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @idecd_open], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @idecd_open(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call ptr @ide_cd_get(i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load i32, ptr @ENXIO, align 4, !tbaa !10
%8 = sub nsw i32 0, %7
br label %14
9: ; preds = %2
%10 = tail call i32 @cdrom_open(ptr noundef nonnull %4, ptr noundef nonnull %0, i32 noundef %1) #2
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %9
%13 = tail call i32 @ide_cd_put(ptr noundef nonnull %4) #2
br label %14
14: ; preds = %9, %12, %6
%15 = phi i32 [ %8, %6 ], [ %10, %12 ], [ %10, %9 ]
ret i32 %15
}
declare ptr @ide_cd_get(i32 noundef) local_unnamed_addr #1
declare i32 @cdrom_open(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ide_cd_put(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"block_device", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/ide/extr_ide-cd.c_idecd_open.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/ide/extr_ide-cd.c_idecd_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@ENXIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @idecd_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @idecd_open(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call ptr @ide_cd_get(i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load i32, ptr @ENXIO, align 4, !tbaa !11
%8 = sub nsw i32 0, %7
br label %14
9: ; preds = %2
%10 = tail call i32 @cdrom_open(ptr noundef nonnull %4, ptr noundef nonnull %0, i32 noundef %1) #2
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %9
%13 = tail call i32 @ide_cd_put(ptr noundef nonnull %4) #2
br label %14
14: ; preds = %9, %12, %6
%15 = phi i32 [ %8, %6 ], [ %10, %12 ], [ %10, %9 ]
ret i32 %15
}
declare ptr @ide_cd_get(i32 noundef) local_unnamed_addr #1
declare i32 @cdrom_open(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ide_cd_put(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"block_device", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
fastsocket_kernel_drivers_ide_extr_ide-cd.c_idecd_open
|
; ModuleID = 'AnghaBench/linux/drivers/atm/extr_lanai.c_intr_enable.c'
source_filename = "AnghaBench/linux/drivers/atm/extr_lanai.c_intr_enable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@IntControlEna_Reg = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @intr_enable], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @intr_enable(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @IntControlEna_Reg, align 4, !tbaa !5
%4 = tail call i32 @reg_write(ptr noundef %0, i32 noundef %1, i32 noundef %3) #2
ret void
}
declare i32 @reg_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/atm/extr_lanai.c_intr_enable.c'
source_filename = "AnghaBench/linux/drivers/atm/extr_lanai.c_intr_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IntControlEna_Reg = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @intr_enable], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @intr_enable(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @IntControlEna_Reg, align 4, !tbaa !6
%4 = tail call i32 @reg_write(ptr noundef %0, i32 noundef %1, i32 noundef %3) #2
ret void
}
declare i32 @reg_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_atm_extr_lanai.c_intr_enable
|
; ModuleID = 'AnghaBench/linux/net/can/j1939/extr_j1939-priv.h_j1939_pgn_is_pdu1.c'
source_filename = "AnghaBench/linux/net/can/j1939/extr_j1939-priv.h_j1939_pgn_is_pdu1.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @j1939_pgn_is_pdu1], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @j1939_pgn_is_pdu1(i32 noundef %0) #0 {
%2 = and i32 %0, 61440
%3 = icmp ne i32 %2, 61440
%4 = zext i1 %3 to i32
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/net/can/j1939/extr_j1939-priv.h_j1939_pgn_is_pdu1.c'
source_filename = "AnghaBench/linux/net/can/j1939/extr_j1939-priv.h_j1939_pgn_is_pdu1.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @j1939_pgn_is_pdu1], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 0, 2) i32 @j1939_pgn_is_pdu1(i32 noundef %0) #0 {
%2 = and i32 %0, 61440
%3 = icmp ne i32 %2, 61440
%4 = zext i1 %3 to i32
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_net_can_j1939_extr_j1939-priv.h_j1939_pgn_is_pdu1
|
; ModuleID = 'AnghaBench/freebsd/usr.bin/ncal/extr_ncal.c_sdateb.c'
source_filename = "AnghaBench/freebsd/usr.bin/ncal/extr_ncal.c_sdateb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@nswitchb = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sdateb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @sdateb(i32 noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @nswitchb, align 4, !tbaa !5
%4 = icmp slt i32 %3, %0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call ptr @gdate(i32 noundef %0, ptr noundef %1) #2
br label %9
7: ; preds = %2
%8 = tail call ptr @jdate(i32 noundef %0, ptr noundef %1) #2
br label %9
9: ; preds = %7, %5
%10 = phi ptr [ %6, %5 ], [ %8, %7 ]
ret ptr %10
}
declare ptr @gdate(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @jdate(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/usr.bin/ncal/extr_ncal.c_sdateb.c'
source_filename = "AnghaBench/freebsd/usr.bin/ncal/extr_ncal.c_sdateb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@nswitchb = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sdateb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @sdateb(i32 noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @nswitchb, align 4, !tbaa !6
%4 = icmp slt i32 %3, %0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call ptr @gdate(i32 noundef %0, ptr noundef %1) #2
br label %9
7: ; preds = %2
%8 = tail call ptr @jdate(i32 noundef %0, ptr noundef %1) #2
br label %9
9: ; preds = %7, %5
%10 = phi ptr [ %6, %5 ], [ %8, %7 ]
ret ptr %10
}
declare ptr @gdate(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @jdate(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_usr.bin_ncal_extr_ncal.c_sdateb
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ocfs2/extr_refcounttree.c_ocfs2_create_refcount_tree.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ocfs2/extr_refcounttree.c_ocfs2_create_refcount_tree.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.inode = type { i32, ptr }
%struct.ocfs2_refcount_tree = type { i64, i32 }
%struct.ocfs2_refcount_block = type { i64, %struct.TYPE_4__, ptr, ptr, ptr, ptr, ptr }
%struct.TYPE_4__ = type { ptr }
%struct.ocfs2_super = type { i32, i32, i32, i32, i32 }
%struct.ocfs2_inode_info = type { i32, i32 }
%struct.ocfs2_dinode = type { ptr, ptr }
@OCFS2_HAS_REFCOUNT_FL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [27 x i8] c"create tree for inode %lu\0A\00", align 1
@OCFS2_REFCOUNT_TREE_CREATE_CREDITS = dso_local local_unnamed_addr global i32 0, align 4
@OCFS2_JOURNAL_ACCESS_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@OCFS2_JOURNAL_ACCESS_CREATE = dso_local local_unnamed_addr global i32 0, align 4
@OCFS2_REFCOUNT_BLOCK_SIGNATURE = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [43 x i8] c"created tree for inode %lu, refblock %llu\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ocfs2_create_refcount_tree], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ocfs2_create_refcount_tree(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
store ptr null, ptr %3, align 8, !tbaa !5
%7 = load i64, ptr %1, align 8, !tbaa !9
%8 = inttoptr i64 %7 to ptr
%9 = tail call ptr @OCFS2_I(ptr noundef %0) #3
%10 = getelementptr inbounds %struct.inode, ptr %0, i64 0, i32 1
%11 = load ptr, ptr %10, align 8, !tbaa !12
%12 = tail call ptr @OCFS2_SB(ptr noundef %11) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%13 = load i32, ptr %9, align 4, !tbaa !15
%14 = load i32, ptr @OCFS2_HAS_REFCOUNT_FL, align 4, !tbaa !17
%15 = and i32 %14, %13
%16 = tail call i32 @BUG_ON(i32 noundef %15) #3
%17 = load i32, ptr %0, align 8, !tbaa !18
%18 = tail call i32 (i32, ptr, i32, ...) @mlog(i32 noundef 0, ptr noundef nonnull @.str, i32 noundef %17) #3
%19 = call i32 @ocfs2_reserve_new_metadata_blocks(ptr noundef %12, i32 noundef 1, ptr noundef nonnull %3) #3
%20 = icmp eq i32 %19, 0
br i1 %20, label %23, label %21
21: ; preds = %2
%22 = call i32 @mlog_errno(i32 noundef %19) #3
br label %142
23: ; preds = %2
%24 = load i32, ptr @OCFS2_REFCOUNT_TREE_CREATE_CREDITS, align 4, !tbaa !17
%25 = call ptr @ocfs2_start_trans(ptr noundef %12, i32 noundef %24) #3
%26 = call i64 @IS_ERR(ptr noundef %25) #3
%27 = icmp eq i64 %26, 0
br i1 %27, label %31, label %28
28: ; preds = %23
%29 = call i32 @PTR_ERR(ptr noundef %25) #3
%30 = call i32 @mlog_errno(i32 noundef %29) #3
br label %142
31: ; preds = %23
%32 = call i32 @INODE_CACHE(ptr noundef nonnull %0) #3
%33 = load i32, ptr @OCFS2_JOURNAL_ACCESS_WRITE, align 4, !tbaa !17
%34 = call i32 @ocfs2_journal_access_di(ptr noundef %25, i32 noundef %32, ptr noundef nonnull %1, i32 noundef %33) #3
%35 = icmp eq i32 %34, 0
br i1 %35, label %38, label %36
36: ; preds = %31
%37 = call i32 @mlog_errno(i32 noundef %34) #3
br label %133
38: ; preds = %31
%39 = load ptr, ptr %3, align 8, !tbaa !5
%40 = call i32 @ocfs2_claim_metadata(ptr noundef %12, ptr noundef %25, ptr noundef %39, i32 noundef 1, ptr noundef nonnull %4, ptr noundef nonnull %5, ptr noundef nonnull %6) #3
%41 = icmp eq i32 %40, 0
br i1 %41, label %44, label %42
42: ; preds = %38
%43 = call i32 @mlog_errno(i32 noundef %40) #3
br label %133
44: ; preds = %38
%45 = load i64, ptr %6, align 8, !tbaa !19
%46 = call ptr @ocfs2_allocate_refcount_tree(ptr noundef %12, i64 noundef %45) #3
%47 = icmp eq ptr %46, null
br i1 %47, label %48, label %52
48: ; preds = %44
%49 = load i32, ptr @ENOMEM, align 4, !tbaa !17
%50 = sub nsw i32 0, %49
%51 = call i32 @mlog_errno(i32 noundef %50) #3
br label %133
52: ; preds = %44
%53 = load ptr, ptr %10, align 8, !tbaa !12
%54 = load i64, ptr %6, align 8, !tbaa !19
%55 = call ptr @sb_getblk(ptr noundef %53, i64 noundef %54) #3
%56 = getelementptr inbounds %struct.ocfs2_refcount_tree, ptr %46, i64 0, i32 1
%57 = call i32 @ocfs2_set_new_buffer_uptodate(ptr noundef nonnull %56, ptr noundef %55) #3
%58 = load i32, ptr @OCFS2_JOURNAL_ACCESS_CREATE, align 4, !tbaa !17
%59 = call i32 @ocfs2_journal_access_rb(ptr noundef %25, ptr noundef nonnull %56, ptr noundef %55, i32 noundef %58) #3
%60 = icmp eq i32 %59, 0
br i1 %60, label %61, label %137
61: ; preds = %52
%62 = load i64, ptr %55, align 8, !tbaa !9
%63 = inttoptr i64 %62 to ptr
%64 = load ptr, ptr %10, align 8, !tbaa !12
%65 = load i32, ptr %64, align 4, !tbaa !20
%66 = call i32 @memset(ptr noundef %63, i32 noundef 0, i32 noundef %65) #3
%67 = load i32, ptr @OCFS2_REFCOUNT_BLOCK_SIGNATURE, align 4, !tbaa !17
%68 = call i32 @strcpy(ptr noundef %63, i32 noundef %67) #3
%69 = load i32, ptr %12, align 4, !tbaa !22
%70 = call ptr @cpu_to_le16(i32 noundef %69) #3
%71 = getelementptr inbounds %struct.ocfs2_refcount_block, ptr %63, i64 0, i32 6
store ptr %70, ptr %71, align 8, !tbaa !24
%72 = load i32, ptr %4, align 4, !tbaa !17
%73 = call ptr @cpu_to_le16(i32 noundef %72) #3
%74 = getelementptr inbounds %struct.ocfs2_refcount_block, ptr %63, i64 0, i32 5
store ptr %73, ptr %74, align 8, !tbaa !27
%75 = getelementptr inbounds %struct.ocfs2_super, ptr %12, i64 0, i32 1
%76 = load i32, ptr %75, align 4, !tbaa !28
%77 = call ptr @cpu_to_le32(i32 noundef %76) #3
%78 = getelementptr inbounds %struct.ocfs2_refcount_block, ptr %63, i64 0, i32 4
store ptr %77, ptr %78, align 8, !tbaa !29
%79 = load i64, ptr %6, align 8, !tbaa !19
%80 = call ptr @cpu_to_le64(i64 noundef %79) #3
%81 = getelementptr inbounds %struct.ocfs2_refcount_block, ptr %63, i64 0, i32 3
store ptr %80, ptr %81, align 8, !tbaa !30
%82 = call ptr @cpu_to_le32(i32 noundef 1) #3
%83 = getelementptr inbounds %struct.ocfs2_refcount_block, ptr %63, i64 0, i32 2
store ptr %82, ptr %83, align 8, !tbaa !31
%84 = getelementptr inbounds %struct.ocfs2_super, ptr %12, i64 0, i32 4
%85 = load i32, ptr %84, align 4, !tbaa !32
%86 = call i32 @ocfs2_refcount_recs_per_rb(i32 noundef %85) #3
%87 = call ptr @cpu_to_le16(i32 noundef %86) #3
%88 = getelementptr inbounds %struct.ocfs2_refcount_block, ptr %63, i64 0, i32 1
store ptr %87, ptr %88, align 8, !tbaa !33
%89 = getelementptr inbounds %struct.ocfs2_super, ptr %12, i64 0, i32 2
%90 = call i32 @spin_lock(ptr noundef nonnull %89) #3
%91 = getelementptr inbounds %struct.ocfs2_super, ptr %12, i64 0, i32 3
%92 = load i32, ptr %91, align 4, !tbaa !34
%93 = add nsw i32 %92, 1
store i32 %93, ptr %91, align 4, !tbaa !34
%94 = sext i32 %92 to i64
store i64 %94, ptr %63, align 8, !tbaa !35
%95 = call i32 @spin_unlock(ptr noundef nonnull %89) #3
%96 = call i32 @ocfs2_journal_dirty(ptr noundef %25, ptr noundef nonnull %55) #3
%97 = getelementptr inbounds %struct.ocfs2_inode_info, ptr %9, i64 0, i32 1
%98 = call i32 @spin_lock(ptr noundef nonnull %97) #3
%99 = load i32, ptr @OCFS2_HAS_REFCOUNT_FL, align 4, !tbaa !17
%100 = load i32, ptr %9, align 4, !tbaa !15
%101 = or i32 %100, %99
store i32 %101, ptr %9, align 4, !tbaa !15
%102 = call ptr @cpu_to_le16(i32 noundef %101) #3
%103 = getelementptr inbounds %struct.ocfs2_dinode, ptr %8, i64 0, i32 1
store ptr %102, ptr %103, align 8, !tbaa !36
%104 = load i64, ptr %6, align 8, !tbaa !19
%105 = call ptr @cpu_to_le64(i64 noundef %104) #3
store ptr %105, ptr %8, align 8, !tbaa !38
%106 = call i32 @spin_unlock(ptr noundef nonnull %97) #3
%107 = load i32, ptr %0, align 8, !tbaa !18
%108 = load i64, ptr %6, align 8, !tbaa !19
%109 = call i32 (i32, ptr, i32, ...) @mlog(i32 noundef 0, ptr noundef nonnull @.str.1, i32 noundef %107, i64 noundef %108) #3
%110 = call i32 @ocfs2_journal_dirty(ptr noundef %25, ptr noundef nonnull %1) #3
%111 = load i64, ptr %63, align 8, !tbaa !35
%112 = call i64 @le32_to_cpu(i64 noundef %111) #3
store i64 %112, ptr %46, align 8, !tbaa !39
%113 = load i64, ptr %6, align 8, !tbaa !19
%114 = call i32 @ocfs2_init_refcount_tree_lock(ptr noundef nonnull %12, ptr noundef nonnull %46, i64 noundef %113, i64 noundef %112) #3
%115 = call i32 @spin_lock(ptr noundef nonnull %89) #3
%116 = load i64, ptr %6, align 8, !tbaa !19
%117 = call ptr @ocfs2_find_refcount_tree(ptr noundef nonnull %12, i64 noundef %116) #3
%118 = icmp eq ptr %117, null
br i1 %118, label %126, label %119
119: ; preds = %61
%120 = load i64, ptr %117, align 8, !tbaa !39
%121 = load i64, ptr %46, align 8, !tbaa !39
%122 = icmp eq i64 %120, %121
%123 = zext i1 %122 to i32
%124 = call i32 @BUG_ON(i32 noundef %123) #3
%125 = call i32 @ocfs2_erase_refcount_tree_from_list_no_lock(ptr noundef nonnull %12, ptr noundef nonnull %117) #3
br label %128
126: ; preds = %61
%127 = call i32 @BUG_ON(i32 noundef 0) #3
br label %128
128: ; preds = %126, %119
%129 = call i32 @ocfs2_insert_refcount_tree(ptr noundef nonnull %12, ptr noundef nonnull %46) #3
%130 = call i32 @spin_unlock(ptr noundef nonnull %89) #3
br i1 %118, label %133, label %131
131: ; preds = %128
%132 = call i32 @ocfs2_refcount_tree_put(ptr noundef nonnull %117) #3
br label %133
133: ; preds = %36, %42, %131, %128, %48
%134 = phi ptr [ null, %48 ], [ %55, %128 ], [ %55, %131 ], [ null, %42 ], [ null, %36 ]
%135 = phi i32 [ %50, %48 ], [ 0, %128 ], [ 0, %131 ], [ %40, %42 ], [ %34, %36 ]
%136 = call i32 @ocfs2_commit_trans(ptr noundef %12, ptr noundef %25) #3
br label %142
137: ; preds = %52
%138 = call i32 @mlog_errno(i32 noundef %59) #3
%139 = call i32 @ocfs2_commit_trans(ptr noundef %12, ptr noundef %25) #3
%140 = call i32 @ocfs2_metadata_cache_exit(ptr noundef nonnull %56) #3
%141 = call i32 @kfree(ptr noundef nonnull %46) #3
br label %142
142: ; preds = %28, %21, %133, %137
%143 = phi i32 [ %59, %137 ], [ %135, %133 ], [ %29, %28 ], [ %19, %21 ]
%144 = phi ptr [ %55, %137 ], [ %134, %133 ], [ null, %28 ], [ null, %21 ]
%145 = call i32 @brelse(ptr noundef %144) #3
%146 = load ptr, ptr %3, align 8, !tbaa !5
%147 = icmp eq ptr %146, null
br i1 %147, label %150, label %148
148: ; preds = %142
%149 = call i32 @ocfs2_free_alloc_context(ptr noundef nonnull %146) #3
br label %150
150: ; preds = %148, %142
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %143
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @OCFS2_I(ptr noundef) local_unnamed_addr #2
declare ptr @OCFS2_SB(ptr noundef) local_unnamed_addr #2
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2
declare i32 @mlog(i32 noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @ocfs2_reserve_new_metadata_blocks(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mlog_errno(i32 noundef) local_unnamed_addr #2
declare ptr @ocfs2_start_trans(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_journal_access_di(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @INODE_CACHE(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_claim_metadata(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @ocfs2_allocate_refcount_tree(ptr noundef, i64 noundef) local_unnamed_addr #2
declare ptr @sb_getblk(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ocfs2_set_new_buffer_uptodate(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_journal_access_rb(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strcpy(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_le16(i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_le32(i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_le64(i64 noundef) local_unnamed_addr #2
declare i32 @ocfs2_refcount_recs_per_rb(i32 noundef) local_unnamed_addr #2
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #2
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_journal_dirty(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @le32_to_cpu(i64 noundef) local_unnamed_addr #2
declare i32 @ocfs2_init_refcount_tree_lock(ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #2
declare ptr @ocfs2_find_refcount_tree(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ocfs2_erase_refcount_tree_from_list_no_lock(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_insert_refcount_tree(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_refcount_tree_put(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_commit_trans(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_metadata_cache_exit(ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
declare i32 @brelse(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_free_alloc_context(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"buffer_head", !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!13, !6, i64 8}
!13 = !{!"inode", !14, i64 0, !6, i64 8}
!14 = !{!"int", !7, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"ocfs2_inode_info", !14, i64 0, !14, i64 4}
!17 = !{!14, !14, i64 0}
!18 = !{!13, !14, i64 0}
!19 = !{!11, !11, i64 0}
!20 = !{!21, !14, i64 0}
!21 = !{!"TYPE_5__", !14, i64 0}
!22 = !{!23, !14, i64 0}
!23 = !{!"ocfs2_super", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16}
!24 = !{!25, !6, i64 48}
!25 = !{!"ocfs2_refcount_block", !11, i64 0, !26, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48}
!26 = !{!"TYPE_4__", !6, i64 0}
!27 = !{!25, !6, i64 40}
!28 = !{!23, !14, i64 4}
!29 = !{!25, !6, i64 32}
!30 = !{!25, !6, i64 24}
!31 = !{!25, !6, i64 16}
!32 = !{!23, !14, i64 16}
!33 = !{!25, !6, i64 8}
!34 = !{!23, !14, i64 12}
!35 = !{!25, !11, i64 0}
!36 = !{!37, !6, i64 8}
!37 = !{!"ocfs2_dinode", !6, i64 0, !6, i64 8}
!38 = !{!37, !6, i64 0}
!39 = !{!40, !11, i64 0}
!40 = !{!"ocfs2_refcount_tree", !11, i64 0, !14, i64 8}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ocfs2/extr_refcounttree.c_ocfs2_create_refcount_tree.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ocfs2/extr_refcounttree.c_ocfs2_create_refcount_tree.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OCFS2_HAS_REFCOUNT_FL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [27 x i8] c"create tree for inode %lu\0A\00", align 1
@OCFS2_REFCOUNT_TREE_CREATE_CREDITS = common local_unnamed_addr global i32 0, align 4
@OCFS2_JOURNAL_ACCESS_WRITE = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@OCFS2_JOURNAL_ACCESS_CREATE = common local_unnamed_addr global i32 0, align 4
@OCFS2_REFCOUNT_BLOCK_SIGNATURE = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [43 x i8] c"created tree for inode %lu, refblock %llu\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ocfs2_create_refcount_tree], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ocfs2_create_refcount_tree(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
store ptr null, ptr %3, align 8, !tbaa !6
%7 = load i64, ptr %1, align 8, !tbaa !10
%8 = inttoptr i64 %7 to ptr
%9 = tail call ptr @OCFS2_I(ptr noundef %0) #3
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = tail call ptr @OCFS2_SB(ptr noundef %11) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%13 = load i32, ptr %9, align 4, !tbaa !16
%14 = load i32, ptr @OCFS2_HAS_REFCOUNT_FL, align 4, !tbaa !18
%15 = and i32 %14, %13
%16 = tail call i32 @BUG_ON(i32 noundef %15) #3
%17 = load i32, ptr %0, align 8, !tbaa !19
%18 = tail call i32 (i32, ptr, i32, ...) @mlog(i32 noundef 0, ptr noundef nonnull @.str, i32 noundef %17) #3
%19 = call i32 @ocfs2_reserve_new_metadata_blocks(ptr noundef %12, i32 noundef 1, ptr noundef nonnull %3) #3
%20 = icmp eq i32 %19, 0
br i1 %20, label %23, label %21
21: ; preds = %2
%22 = call i32 @mlog_errno(i32 noundef %19) #3
br label %142
23: ; preds = %2
%24 = load i32, ptr @OCFS2_REFCOUNT_TREE_CREATE_CREDITS, align 4, !tbaa !18
%25 = call ptr @ocfs2_start_trans(ptr noundef %12, i32 noundef %24) #3
%26 = call i64 @IS_ERR(ptr noundef %25) #3
%27 = icmp eq i64 %26, 0
br i1 %27, label %31, label %28
28: ; preds = %23
%29 = call i32 @PTR_ERR(ptr noundef %25) #3
%30 = call i32 @mlog_errno(i32 noundef %29) #3
br label %142
31: ; preds = %23
%32 = call i32 @INODE_CACHE(ptr noundef nonnull %0) #3
%33 = load i32, ptr @OCFS2_JOURNAL_ACCESS_WRITE, align 4, !tbaa !18
%34 = call i32 @ocfs2_journal_access_di(ptr noundef %25, i32 noundef %32, ptr noundef nonnull %1, i32 noundef %33) #3
%35 = icmp eq i32 %34, 0
br i1 %35, label %38, label %36
36: ; preds = %31
%37 = call i32 @mlog_errno(i32 noundef %34) #3
br label %133
38: ; preds = %31
%39 = load ptr, ptr %3, align 8, !tbaa !6
%40 = call i32 @ocfs2_claim_metadata(ptr noundef %12, ptr noundef %25, ptr noundef %39, i32 noundef 1, ptr noundef nonnull %4, ptr noundef nonnull %5, ptr noundef nonnull %6) #3
%41 = icmp eq i32 %40, 0
br i1 %41, label %44, label %42
42: ; preds = %38
%43 = call i32 @mlog_errno(i32 noundef %40) #3
br label %133
44: ; preds = %38
%45 = load i64, ptr %6, align 8, !tbaa !20
%46 = call ptr @ocfs2_allocate_refcount_tree(ptr noundef %12, i64 noundef %45) #3
%47 = icmp eq ptr %46, null
br i1 %47, label %48, label %52
48: ; preds = %44
%49 = load i32, ptr @ENOMEM, align 4, !tbaa !18
%50 = sub nsw i32 0, %49
%51 = call i32 @mlog_errno(i32 noundef %50) #3
br label %133
52: ; preds = %44
%53 = load ptr, ptr %10, align 8, !tbaa !13
%54 = load i64, ptr %6, align 8, !tbaa !20
%55 = call ptr @sb_getblk(ptr noundef %53, i64 noundef %54) #3
%56 = getelementptr inbounds i8, ptr %46, i64 8
%57 = call i32 @ocfs2_set_new_buffer_uptodate(ptr noundef nonnull %56, ptr noundef %55) #3
%58 = load i32, ptr @OCFS2_JOURNAL_ACCESS_CREATE, align 4, !tbaa !18
%59 = call i32 @ocfs2_journal_access_rb(ptr noundef %25, ptr noundef nonnull %56, ptr noundef %55, i32 noundef %58) #3
%60 = icmp eq i32 %59, 0
br i1 %60, label %61, label %137
61: ; preds = %52
%62 = load i64, ptr %55, align 8, !tbaa !10
%63 = inttoptr i64 %62 to ptr
%64 = load ptr, ptr %10, align 8, !tbaa !13
%65 = load i32, ptr %64, align 4, !tbaa !21
%66 = call i32 @memset(ptr noundef %63, i32 noundef 0, i32 noundef %65) #3
%67 = load i32, ptr @OCFS2_REFCOUNT_BLOCK_SIGNATURE, align 4, !tbaa !18
%68 = call i32 @strcpy(ptr noundef %63, i32 noundef %67) #3
%69 = load i32, ptr %12, align 4, !tbaa !23
%70 = call ptr @cpu_to_le16(i32 noundef %69) #3
%71 = getelementptr inbounds i8, ptr %63, i64 48
store ptr %70, ptr %71, align 8, !tbaa !25
%72 = load i32, ptr %4, align 4, !tbaa !18
%73 = call ptr @cpu_to_le16(i32 noundef %72) #3
%74 = getelementptr inbounds i8, ptr %63, i64 40
store ptr %73, ptr %74, align 8, !tbaa !28
%75 = getelementptr inbounds i8, ptr %12, i64 4
%76 = load i32, ptr %75, align 4, !tbaa !29
%77 = call ptr @cpu_to_le32(i32 noundef %76) #3
%78 = getelementptr inbounds i8, ptr %63, i64 32
store ptr %77, ptr %78, align 8, !tbaa !30
%79 = load i64, ptr %6, align 8, !tbaa !20
%80 = call ptr @cpu_to_le64(i64 noundef %79) #3
%81 = getelementptr inbounds i8, ptr %63, i64 24
store ptr %80, ptr %81, align 8, !tbaa !31
%82 = call ptr @cpu_to_le32(i32 noundef 1) #3
%83 = getelementptr inbounds i8, ptr %63, i64 16
store ptr %82, ptr %83, align 8, !tbaa !32
%84 = getelementptr inbounds i8, ptr %12, i64 16
%85 = load i32, ptr %84, align 4, !tbaa !33
%86 = call i32 @ocfs2_refcount_recs_per_rb(i32 noundef %85) #3
%87 = call ptr @cpu_to_le16(i32 noundef %86) #3
%88 = getelementptr inbounds i8, ptr %63, i64 8
store ptr %87, ptr %88, align 8, !tbaa !34
%89 = getelementptr inbounds i8, ptr %12, i64 8
%90 = call i32 @spin_lock(ptr noundef nonnull %89) #3
%91 = getelementptr inbounds i8, ptr %12, i64 12
%92 = load i32, ptr %91, align 4, !tbaa !35
%93 = add nsw i32 %92, 1
store i32 %93, ptr %91, align 4, !tbaa !35
%94 = sext i32 %92 to i64
store i64 %94, ptr %63, align 8, !tbaa !36
%95 = call i32 @spin_unlock(ptr noundef nonnull %89) #3
%96 = call i32 @ocfs2_journal_dirty(ptr noundef %25, ptr noundef nonnull %55) #3
%97 = getelementptr inbounds i8, ptr %9, i64 4
%98 = call i32 @spin_lock(ptr noundef nonnull %97) #3
%99 = load i32, ptr @OCFS2_HAS_REFCOUNT_FL, align 4, !tbaa !18
%100 = load i32, ptr %9, align 4, !tbaa !16
%101 = or i32 %100, %99
store i32 %101, ptr %9, align 4, !tbaa !16
%102 = call ptr @cpu_to_le16(i32 noundef %101) #3
%103 = getelementptr inbounds i8, ptr %8, i64 8
store ptr %102, ptr %103, align 8, !tbaa !37
%104 = load i64, ptr %6, align 8, !tbaa !20
%105 = call ptr @cpu_to_le64(i64 noundef %104) #3
store ptr %105, ptr %8, align 8, !tbaa !39
%106 = call i32 @spin_unlock(ptr noundef nonnull %97) #3
%107 = load i32, ptr %0, align 8, !tbaa !19
%108 = load i64, ptr %6, align 8, !tbaa !20
%109 = call i32 (i32, ptr, i32, ...) @mlog(i32 noundef 0, ptr noundef nonnull @.str.1, i32 noundef %107, i64 noundef %108) #3
%110 = call i32 @ocfs2_journal_dirty(ptr noundef %25, ptr noundef nonnull %1) #3
%111 = load i64, ptr %63, align 8, !tbaa !36
%112 = call i64 @le32_to_cpu(i64 noundef %111) #3
store i64 %112, ptr %46, align 8, !tbaa !40
%113 = load i64, ptr %6, align 8, !tbaa !20
%114 = call i32 @ocfs2_init_refcount_tree_lock(ptr noundef nonnull %12, ptr noundef nonnull %46, i64 noundef %113, i64 noundef %112) #3
%115 = call i32 @spin_lock(ptr noundef nonnull %89) #3
%116 = load i64, ptr %6, align 8, !tbaa !20
%117 = call ptr @ocfs2_find_refcount_tree(ptr noundef nonnull %12, i64 noundef %116) #3
%118 = icmp eq ptr %117, null
br i1 %118, label %126, label %119
119: ; preds = %61
%120 = load i64, ptr %117, align 8, !tbaa !40
%121 = load i64, ptr %46, align 8, !tbaa !40
%122 = icmp eq i64 %120, %121
%123 = zext i1 %122 to i32
%124 = call i32 @BUG_ON(i32 noundef %123) #3
%125 = call i32 @ocfs2_erase_refcount_tree_from_list_no_lock(ptr noundef nonnull %12, ptr noundef nonnull %117) #3
br label %128
126: ; preds = %61
%127 = call i32 @BUG_ON(i32 noundef 0) #3
br label %128
128: ; preds = %126, %119
%129 = call i32 @ocfs2_insert_refcount_tree(ptr noundef nonnull %12, ptr noundef nonnull %46) #3
%130 = call i32 @spin_unlock(ptr noundef nonnull %89) #3
br i1 %118, label %133, label %131
131: ; preds = %128
%132 = call i32 @ocfs2_refcount_tree_put(ptr noundef nonnull %117) #3
br label %133
133: ; preds = %36, %42, %131, %128, %48
%134 = phi ptr [ null, %48 ], [ %55, %128 ], [ %55, %131 ], [ null, %42 ], [ null, %36 ]
%135 = phi i32 [ %50, %48 ], [ 0, %128 ], [ 0, %131 ], [ %40, %42 ], [ %34, %36 ]
%136 = call i32 @ocfs2_commit_trans(ptr noundef %12, ptr noundef %25) #3
br label %142
137: ; preds = %52
%138 = call i32 @mlog_errno(i32 noundef %59) #3
%139 = call i32 @ocfs2_commit_trans(ptr noundef %12, ptr noundef %25) #3
%140 = call i32 @ocfs2_metadata_cache_exit(ptr noundef nonnull %56) #3
%141 = call i32 @kfree(ptr noundef nonnull %46) #3
br label %142
142: ; preds = %28, %21, %133, %137
%143 = phi i32 [ %59, %137 ], [ %135, %133 ], [ %29, %28 ], [ %19, %21 ]
%144 = phi ptr [ %55, %137 ], [ %134, %133 ], [ null, %28 ], [ null, %21 ]
%145 = call i32 @brelse(ptr noundef %144) #3
%146 = load ptr, ptr %3, align 8, !tbaa !6
%147 = icmp eq ptr %146, null
br i1 %147, label %150, label %148
148: ; preds = %142
%149 = call i32 @ocfs2_free_alloc_context(ptr noundef nonnull %146) #3
br label %150
150: ; preds = %148, %142
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %143
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @OCFS2_I(ptr noundef) local_unnamed_addr #2
declare ptr @OCFS2_SB(ptr noundef) local_unnamed_addr #2
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2
declare i32 @mlog(i32 noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @ocfs2_reserve_new_metadata_blocks(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mlog_errno(i32 noundef) local_unnamed_addr #2
declare ptr @ocfs2_start_trans(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_journal_access_di(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @INODE_CACHE(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_claim_metadata(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @ocfs2_allocate_refcount_tree(ptr noundef, i64 noundef) local_unnamed_addr #2
declare ptr @sb_getblk(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ocfs2_set_new_buffer_uptodate(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_journal_access_rb(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strcpy(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_le16(i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_le32(i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_le64(i64 noundef) local_unnamed_addr #2
declare i32 @ocfs2_refcount_recs_per_rb(i32 noundef) local_unnamed_addr #2
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #2
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_journal_dirty(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @le32_to_cpu(i64 noundef) local_unnamed_addr #2
declare i32 @ocfs2_init_refcount_tree_lock(ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #2
declare ptr @ocfs2_find_refcount_tree(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ocfs2_erase_refcount_tree_from_list_no_lock(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_insert_refcount_tree(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_refcount_tree_put(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_commit_trans(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_metadata_cache_exit(ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
declare i32 @brelse(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_free_alloc_context(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"buffer_head", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!14, !7, i64 8}
!14 = !{!"inode", !15, i64 0, !7, i64 8}
!15 = !{!"int", !8, i64 0}
!16 = !{!17, !15, i64 0}
!17 = !{!"ocfs2_inode_info", !15, i64 0, !15, i64 4}
!18 = !{!15, !15, i64 0}
!19 = !{!14, !15, i64 0}
!20 = !{!12, !12, i64 0}
!21 = !{!22, !15, i64 0}
!22 = !{!"TYPE_5__", !15, i64 0}
!23 = !{!24, !15, i64 0}
!24 = !{!"ocfs2_super", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16}
!25 = !{!26, !7, i64 48}
!26 = !{!"ocfs2_refcount_block", !12, i64 0, !27, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48}
!27 = !{!"TYPE_4__", !7, i64 0}
!28 = !{!26, !7, i64 40}
!29 = !{!24, !15, i64 4}
!30 = !{!26, !7, i64 32}
!31 = !{!26, !7, i64 24}
!32 = !{!26, !7, i64 16}
!33 = !{!24, !15, i64 16}
!34 = !{!26, !7, i64 8}
!35 = !{!24, !15, i64 12}
!36 = !{!26, !12, i64 0}
!37 = !{!38, !7, i64 8}
!38 = !{!"ocfs2_dinode", !7, i64 0, !7, i64 8}
!39 = !{!38, !7, i64 0}
!40 = !{!41, !12, i64 0}
!41 = !{!"ocfs2_refcount_tree", !12, i64 0, !15, i64 8}
|
fastsocket_kernel_fs_ocfs2_extr_refcounttree.c_ocfs2_create_refcount_tree
|
; ModuleID = 'AnghaBench/RetroArch/griffin/extr_..libretro-commonformatsjsonjsonsax_full.c_JSON_Parser_SetErrorAtToken.c'
source_filename = "AnghaBench/RetroArch/griffin/extr_..libretro-commonformatsjsonjsonsax_full.c_JSON_Parser_SetErrorAtToken.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
@ERROR_LOCATION_IS_TOKEN_START = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @JSON_Parser_SetErrorAtToken], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable
define internal void @JSON_Parser_SetErrorAtToken(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
store i32 %1, ptr %3, align 4, !tbaa !5
%4 = load i32, ptr @ERROR_LOCATION_IS_TOKEN_START, align 4, !tbaa !10
store i32 %4, ptr %0, align 4, !tbaa !11
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/RetroArch/griffin/extr_..libretro-commonformatsjsonjsonsax_full.c_JSON_Parser_SetErrorAtToken.c'
source_filename = "AnghaBench/RetroArch/griffin/extr_..libretro-commonformatsjsonjsonsax_full.c_JSON_Parser_SetErrorAtToken.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ERROR_LOCATION_IS_TOKEN_START = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @JSON_Parser_SetErrorAtToken], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define internal void @JSON_Parser_SetErrorAtToken(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %1, ptr %3, align 4, !tbaa !6
%4 = load i32, ptr @ERROR_LOCATION_IS_TOKEN_START, align 4, !tbaa !11
store i32 %4, ptr %0, align 4, !tbaa !12
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 0}
|
RetroArch_griffin_extr_..libretro-commonformatsjsonjsonsax_full.c_JSON_Parser_SetErrorAtToken
|
; ModuleID = 'AnghaBench/freebsd/usr.bin/mkimg/extr_image.c_image_cleanup.c'
source_filename = "AnghaBench/freebsd/usr.bin/mkimg/extr_image.c_image_cleanup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.chunk = type { i32, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { %struct.TYPE_5__, %struct.TYPE_4__ }
%struct.TYPE_5__ = type { ptr }
%struct.TYPE_4__ = type { i32 }
@image_chunks = dso_local global i32 0, align 4
@ch_list = dso_local local_unnamed_addr global i32 0, align 4
@image_swap_fd = dso_local local_unnamed_addr global i32 0, align 4
@image_swap_file = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @image_cleanup], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @image_cleanup() #0 {
%1 = tail call ptr @TAILQ_FIRST(ptr noundef nonnull @image_chunks) #2
%2 = icmp eq ptr %1, null
br i1 %2, label %22, label %3
3: ; preds = %0, %16
%4 = phi ptr [ %20, %16 ], [ %1, %0 ]
%5 = load i32, ptr %4, align 8, !tbaa !5
switch i32 %5, label %16 [
i32 129, label %6
i32 128, label %12
]
6: ; preds = %3
%7 = getelementptr inbounds %struct.chunk, ptr %4, i64 0, i32 1, i32 1
%8 = load i32, ptr %7, align 8, !tbaa !14
%9 = icmp eq i32 %8, -1
br i1 %9, label %16, label %10
10: ; preds = %6
%11 = tail call i32 @close(i32 noundef %8) #2
br label %16
12: ; preds = %3
%13 = getelementptr inbounds %struct.chunk, ptr %4, i64 0, i32 1
%14 = load ptr, ptr %13, align 8, !tbaa !15
%15 = tail call i32 @free(ptr noundef %14) #2
br label %16
16: ; preds = %3, %6, %10, %12
%17 = load i32, ptr @ch_list, align 4, !tbaa !16
%18 = tail call i32 @TAILQ_REMOVE(ptr noundef nonnull @image_chunks, ptr noundef nonnull %4, i32 noundef %17) #2
%19 = tail call i32 @free(ptr noundef nonnull %4) #2
%20 = tail call ptr @TAILQ_FIRST(ptr noundef nonnull @image_chunks) #2
%21 = icmp eq ptr %20, null
br i1 %21, label %22, label %3, !llvm.loop !17
22: ; preds = %16, %0
%23 = load i32, ptr @image_swap_fd, align 4, !tbaa !16
%24 = icmp eq i32 %23, -1
br i1 %24, label %27, label %25
25: ; preds = %22
%26 = tail call i32 @close(i32 noundef %23) #2
br label %27
27: ; preds = %25, %22
%28 = load i32, ptr @image_swap_file, align 4, !tbaa !16
%29 = tail call i32 @unlink(i32 noundef %28) #2
ret void
}
declare ptr @TAILQ_FIRST(ptr noundef) local_unnamed_addr #1
declare i32 @close(i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
declare i32 @TAILQ_REMOVE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @unlink(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"chunk", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_6__", !11, i64 0, !13, i64 8}
!11 = !{!"TYPE_5__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"TYPE_4__", !7, i64 0}
!14 = !{!6, !7, i64 16}
!15 = !{!6, !12, i64 8}
!16 = !{!7, !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/freebsd/usr.bin/mkimg/extr_image.c_image_cleanup.c'
source_filename = "AnghaBench/freebsd/usr.bin/mkimg/extr_image.c_image_cleanup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@image_chunks = common global i32 0, align 4
@ch_list = common local_unnamed_addr global i32 0, align 4
@image_swap_fd = common local_unnamed_addr global i32 0, align 4
@image_swap_file = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @image_cleanup], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @image_cleanup() #0 {
%1 = tail call ptr @TAILQ_FIRST(ptr noundef nonnull @image_chunks) #2
%2 = icmp eq ptr %1, null
br i1 %2, label %22, label %3
3: ; preds = %0, %16
%4 = phi ptr [ %20, %16 ], [ %1, %0 ]
%5 = load i32, ptr %4, align 8, !tbaa !6
switch i32 %5, label %16 [
i32 129, label %6
i32 128, label %12
]
6: ; preds = %3
%7 = getelementptr inbounds i8, ptr %4, i64 16
%8 = load i32, ptr %7, align 8, !tbaa !15
%9 = icmp eq i32 %8, -1
br i1 %9, label %16, label %10
10: ; preds = %6
%11 = tail call i32 @close(i32 noundef %8) #2
br label %16
12: ; preds = %3
%13 = getelementptr inbounds i8, ptr %4, i64 8
%14 = load ptr, ptr %13, align 8, !tbaa !16
%15 = tail call i32 @free(ptr noundef %14) #2
br label %16
16: ; preds = %3, %6, %10, %12
%17 = load i32, ptr @ch_list, align 4, !tbaa !17
%18 = tail call i32 @TAILQ_REMOVE(ptr noundef nonnull @image_chunks, ptr noundef nonnull %4, i32 noundef %17) #2
%19 = tail call i32 @free(ptr noundef nonnull %4) #2
%20 = tail call ptr @TAILQ_FIRST(ptr noundef nonnull @image_chunks) #2
%21 = icmp eq ptr %20, null
br i1 %21, label %22, label %3, !llvm.loop !18
22: ; preds = %16, %0
%23 = load i32, ptr @image_swap_fd, align 4, !tbaa !17
%24 = icmp eq i32 %23, -1
br i1 %24, label %27, label %25
25: ; preds = %22
%26 = tail call i32 @close(i32 noundef %23) #2
br label %27
27: ; preds = %25, %22
%28 = load i32, ptr @image_swap_file, align 4, !tbaa !17
%29 = tail call i32 @unlink(i32 noundef %28) #2
ret void
}
declare ptr @TAILQ_FIRST(ptr noundef) local_unnamed_addr #1
declare i32 @close(i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
declare i32 @TAILQ_REMOVE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @unlink(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"chunk", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_6__", !12, i64 0, !14, i64 8}
!12 = !{!"TYPE_5__", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!"TYPE_4__", !8, i64 0}
!15 = !{!7, !8, i64 16}
!16 = !{!7, !13, i64 8}
!17 = !{!8, !8, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
|
freebsd_usr.bin_mkimg_extr_image.c_image_cleanup
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_si.c_si_disable_interrupt_state.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_si.c_si_disable_interrupt_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CP_INT_CNTL_RING0 = dso_local local_unnamed_addr global i64 0, align 8
@CNTX_BUSY_INT_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@CNTX_EMPTY_INT_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@CP_INT_CNTL_RING1 = dso_local local_unnamed_addr global i64 0, align 8
@CP_INT_CNTL_RING2 = dso_local local_unnamed_addr global i64 0, align 8
@DMA_CNTL = dso_local local_unnamed_addr global i64 0, align 8
@DMA0_REGISTER_OFFSET = dso_local local_unnamed_addr global i64 0, align 8
@TRAP_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@DMA1_REGISTER_OFFSET = dso_local local_unnamed_addr global i64 0, align 8
@GRBM_INT_CNTL = dso_local local_unnamed_addr global i64 0, align 8
@INT_MASK = dso_local local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC0_REGISTER_OFFSET = dso_local local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC1_REGISTER_OFFSET = dso_local local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC2_REGISTER_OFFSET = dso_local local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC3_REGISTER_OFFSET = dso_local local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC4_REGISTER_OFFSET = dso_local local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC5_REGISTER_OFFSET = dso_local local_unnamed_addr global i64 0, align 8
@GRPH_INT_CONTROL = dso_local local_unnamed_addr global i64 0, align 8
@DACA_AUTODETECT_INT_CONTROL = dso_local local_unnamed_addr global i64 0, align 8
@DC_HPD1_INT_CONTROL = dso_local local_unnamed_addr global i64 0, align 8
@DC_HPDx_INT_POLARITY = dso_local local_unnamed_addr global i32 0, align 4
@DC_HPD2_INT_CONTROL = dso_local local_unnamed_addr global i64 0, align 8
@DC_HPD3_INT_CONTROL = dso_local local_unnamed_addr global i64 0, align 8
@DC_HPD4_INT_CONTROL = dso_local local_unnamed_addr global i64 0, align 8
@DC_HPD5_INT_CONTROL = dso_local local_unnamed_addr global i64 0, align 8
@DC_HPD6_INT_CONTROL = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @si_disable_interrupt_state], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @si_disable_interrupt_state(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr @CP_INT_CNTL_RING0, align 8, !tbaa !5
%3 = load i32, ptr @CNTX_BUSY_INT_ENABLE, align 4, !tbaa !9
%4 = load i32, ptr @CNTX_EMPTY_INT_ENABLE, align 4, !tbaa !9
%5 = or i32 %4, %3
%6 = tail call i32 @WREG32(i64 noundef %2, i32 noundef %5) #2
%7 = load i64, ptr @CP_INT_CNTL_RING1, align 8, !tbaa !5
%8 = tail call i32 @WREG32(i64 noundef %7, i32 noundef 0) #2
%9 = load i64, ptr @CP_INT_CNTL_RING2, align 8, !tbaa !5
%10 = tail call i32 @WREG32(i64 noundef %9, i32 noundef 0) #2
%11 = load i64, ptr @DMA_CNTL, align 8, !tbaa !5
%12 = load i64, ptr @DMA0_REGISTER_OFFSET, align 8, !tbaa !5
%13 = add nsw i64 %12, %11
%14 = tail call i32 @RREG32(i64 noundef %13) #2
%15 = load i32, ptr @TRAP_ENABLE, align 4, !tbaa !9
%16 = xor i32 %15, -1
%17 = and i32 %14, %16
%18 = load i64, ptr @DMA_CNTL, align 8, !tbaa !5
%19 = load i64, ptr @DMA0_REGISTER_OFFSET, align 8, !tbaa !5
%20 = add nsw i64 %19, %18
%21 = tail call i32 @WREG32(i64 noundef %20, i32 noundef %17) #2
%22 = load i64, ptr @DMA_CNTL, align 8, !tbaa !5
%23 = load i64, ptr @DMA1_REGISTER_OFFSET, align 8, !tbaa !5
%24 = add nsw i64 %23, %22
%25 = tail call i32 @RREG32(i64 noundef %24) #2
%26 = load i32, ptr @TRAP_ENABLE, align 4, !tbaa !9
%27 = xor i32 %26, -1
%28 = and i32 %25, %27
%29 = load i64, ptr @DMA_CNTL, align 8, !tbaa !5
%30 = load i64, ptr @DMA1_REGISTER_OFFSET, align 8, !tbaa !5
%31 = add nsw i64 %30, %29
%32 = tail call i32 @WREG32(i64 noundef %31, i32 noundef %28) #2
%33 = load i64, ptr @GRBM_INT_CNTL, align 8, !tbaa !5
%34 = tail call i32 @WREG32(i64 noundef %33, i32 noundef 0) #2
%35 = load i64, ptr @INT_MASK, align 8, !tbaa !5
%36 = load i64, ptr @EVERGREEN_CRTC0_REGISTER_OFFSET, align 8, !tbaa !5
%37 = add nsw i64 %36, %35
%38 = tail call i32 @WREG32(i64 noundef %37, i32 noundef 0) #2
%39 = load i64, ptr @INT_MASK, align 8, !tbaa !5
%40 = load i64, ptr @EVERGREEN_CRTC1_REGISTER_OFFSET, align 8, !tbaa !5
%41 = add nsw i64 %40, %39
%42 = tail call i32 @WREG32(i64 noundef %41, i32 noundef 0) #2
%43 = load i32, ptr %0, align 4, !tbaa !11
%44 = icmp sgt i32 %43, 3
br i1 %44, label %45, label %65
45: ; preds = %1
%46 = load i64, ptr @INT_MASK, align 8, !tbaa !5
%47 = load i64, ptr @EVERGREEN_CRTC2_REGISTER_OFFSET, align 8, !tbaa !5
%48 = add nsw i64 %47, %46
%49 = tail call i32 @WREG32(i64 noundef %48, i32 noundef 0) #2
%50 = load i64, ptr @INT_MASK, align 8, !tbaa !5
%51 = load i64, ptr @EVERGREEN_CRTC3_REGISTER_OFFSET, align 8, !tbaa !5
%52 = add nsw i64 %51, %50
%53 = tail call i32 @WREG32(i64 noundef %52, i32 noundef 0) #2
%54 = load i32, ptr %0, align 4, !tbaa !11
%55 = icmp sgt i32 %54, 5
br i1 %55, label %56, label %65
56: ; preds = %45
%57 = load i64, ptr @INT_MASK, align 8, !tbaa !5
%58 = load i64, ptr @EVERGREEN_CRTC4_REGISTER_OFFSET, align 8, !tbaa !5
%59 = add nsw i64 %58, %57
%60 = tail call i32 @WREG32(i64 noundef %59, i32 noundef 0) #2
%61 = load i64, ptr @INT_MASK, align 8, !tbaa !5
%62 = load i64, ptr @EVERGREEN_CRTC5_REGISTER_OFFSET, align 8, !tbaa !5
%63 = add nsw i64 %62, %61
%64 = tail call i32 @WREG32(i64 noundef %63, i32 noundef 0) #2
br label %65
65: ; preds = %1, %56, %45
%66 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !5
%67 = load i64, ptr @EVERGREEN_CRTC0_REGISTER_OFFSET, align 8, !tbaa !5
%68 = add nsw i64 %67, %66
%69 = tail call i32 @WREG32(i64 noundef %68, i32 noundef 0) #2
%70 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !5
%71 = load i64, ptr @EVERGREEN_CRTC1_REGISTER_OFFSET, align 8, !tbaa !5
%72 = add nsw i64 %71, %70
%73 = tail call i32 @WREG32(i64 noundef %72, i32 noundef 0) #2
%74 = load i32, ptr %0, align 4, !tbaa !11
%75 = icmp sgt i32 %74, 3
br i1 %75, label %76, label %96
76: ; preds = %65
%77 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !5
%78 = load i64, ptr @EVERGREEN_CRTC2_REGISTER_OFFSET, align 8, !tbaa !5
%79 = add nsw i64 %78, %77
%80 = tail call i32 @WREG32(i64 noundef %79, i32 noundef 0) #2
%81 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !5
%82 = load i64, ptr @EVERGREEN_CRTC3_REGISTER_OFFSET, align 8, !tbaa !5
%83 = add nsw i64 %82, %81
%84 = tail call i32 @WREG32(i64 noundef %83, i32 noundef 0) #2
%85 = load i32, ptr %0, align 4, !tbaa !11
%86 = icmp sgt i32 %85, 5
br i1 %86, label %87, label %96
87: ; preds = %76
%88 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !5
%89 = load i64, ptr @EVERGREEN_CRTC4_REGISTER_OFFSET, align 8, !tbaa !5
%90 = add nsw i64 %89, %88
%91 = tail call i32 @WREG32(i64 noundef %90, i32 noundef 0) #2
%92 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !5
%93 = load i64, ptr @EVERGREEN_CRTC5_REGISTER_OFFSET, align 8, !tbaa !5
%94 = add nsw i64 %93, %92
%95 = tail call i32 @WREG32(i64 noundef %94, i32 noundef 0) #2
br label %96
96: ; preds = %65, %87, %76
%97 = load i64, ptr @DACA_AUTODETECT_INT_CONTROL, align 8, !tbaa !5
%98 = tail call i32 @WREG32(i64 noundef %97, i32 noundef 0) #2
%99 = load i64, ptr @DC_HPD1_INT_CONTROL, align 8, !tbaa !5
%100 = tail call i32 @RREG32(i64 noundef %99) #2
%101 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !9
%102 = and i32 %101, %100
%103 = load i64, ptr @DC_HPD1_INT_CONTROL, align 8, !tbaa !5
%104 = tail call i32 @WREG32(i64 noundef %103, i32 noundef %102) #2
%105 = load i64, ptr @DC_HPD2_INT_CONTROL, align 8, !tbaa !5
%106 = tail call i32 @RREG32(i64 noundef %105) #2
%107 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !9
%108 = and i32 %107, %106
%109 = load i64, ptr @DC_HPD2_INT_CONTROL, align 8, !tbaa !5
%110 = tail call i32 @WREG32(i64 noundef %109, i32 noundef %108) #2
%111 = load i64, ptr @DC_HPD3_INT_CONTROL, align 8, !tbaa !5
%112 = tail call i32 @RREG32(i64 noundef %111) #2
%113 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !9
%114 = and i32 %113, %112
%115 = load i64, ptr @DC_HPD3_INT_CONTROL, align 8, !tbaa !5
%116 = tail call i32 @WREG32(i64 noundef %115, i32 noundef %114) #2
%117 = load i64, ptr @DC_HPD4_INT_CONTROL, align 8, !tbaa !5
%118 = tail call i32 @RREG32(i64 noundef %117) #2
%119 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !9
%120 = and i32 %119, %118
%121 = load i64, ptr @DC_HPD4_INT_CONTROL, align 8, !tbaa !5
%122 = tail call i32 @WREG32(i64 noundef %121, i32 noundef %120) #2
%123 = load i64, ptr @DC_HPD5_INT_CONTROL, align 8, !tbaa !5
%124 = tail call i32 @RREG32(i64 noundef %123) #2
%125 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !9
%126 = and i32 %125, %124
%127 = load i64, ptr @DC_HPD5_INT_CONTROL, align 8, !tbaa !5
%128 = tail call i32 @WREG32(i64 noundef %127, i32 noundef %126) #2
%129 = load i64, ptr @DC_HPD6_INT_CONTROL, align 8, !tbaa !5
%130 = tail call i32 @RREG32(i64 noundef %129) #2
%131 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !9
%132 = and i32 %131, %130
%133 = load i64, ptr @DC_HPD6_INT_CONTROL, align 8, !tbaa !5
%134 = tail call i32 @WREG32(i64 noundef %133, i32 noundef %132) #2
ret void
}
declare i32 @WREG32(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RREG32(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"radeon_device", !10, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_si.c_si_disable_interrupt_state.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_si.c_si_disable_interrupt_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CP_INT_CNTL_RING0 = common local_unnamed_addr global i64 0, align 8
@CNTX_BUSY_INT_ENABLE = common local_unnamed_addr global i32 0, align 4
@CNTX_EMPTY_INT_ENABLE = common local_unnamed_addr global i32 0, align 4
@CP_INT_CNTL_RING1 = common local_unnamed_addr global i64 0, align 8
@CP_INT_CNTL_RING2 = common local_unnamed_addr global i64 0, align 8
@DMA_CNTL = common local_unnamed_addr global i64 0, align 8
@DMA0_REGISTER_OFFSET = common local_unnamed_addr global i64 0, align 8
@TRAP_ENABLE = common local_unnamed_addr global i32 0, align 4
@DMA1_REGISTER_OFFSET = common local_unnamed_addr global i64 0, align 8
@GRBM_INT_CNTL = common local_unnamed_addr global i64 0, align 8
@INT_MASK = common local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC0_REGISTER_OFFSET = common local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC1_REGISTER_OFFSET = common local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC2_REGISTER_OFFSET = common local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC3_REGISTER_OFFSET = common local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC4_REGISTER_OFFSET = common local_unnamed_addr global i64 0, align 8
@EVERGREEN_CRTC5_REGISTER_OFFSET = common local_unnamed_addr global i64 0, align 8
@GRPH_INT_CONTROL = common local_unnamed_addr global i64 0, align 8
@DACA_AUTODETECT_INT_CONTROL = common local_unnamed_addr global i64 0, align 8
@DC_HPD1_INT_CONTROL = common local_unnamed_addr global i64 0, align 8
@DC_HPDx_INT_POLARITY = common local_unnamed_addr global i32 0, align 4
@DC_HPD2_INT_CONTROL = common local_unnamed_addr global i64 0, align 8
@DC_HPD3_INT_CONTROL = common local_unnamed_addr global i64 0, align 8
@DC_HPD4_INT_CONTROL = common local_unnamed_addr global i64 0, align 8
@DC_HPD5_INT_CONTROL = common local_unnamed_addr global i64 0, align 8
@DC_HPD6_INT_CONTROL = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @si_disable_interrupt_state], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @si_disable_interrupt_state(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr @CP_INT_CNTL_RING0, align 8, !tbaa !6
%3 = load i32, ptr @CNTX_BUSY_INT_ENABLE, align 4, !tbaa !10
%4 = load i32, ptr @CNTX_EMPTY_INT_ENABLE, align 4, !tbaa !10
%5 = or i32 %4, %3
%6 = tail call i32 @WREG32(i64 noundef %2, i32 noundef %5) #2
%7 = load i64, ptr @CP_INT_CNTL_RING1, align 8, !tbaa !6
%8 = tail call i32 @WREG32(i64 noundef %7, i32 noundef 0) #2
%9 = load i64, ptr @CP_INT_CNTL_RING2, align 8, !tbaa !6
%10 = tail call i32 @WREG32(i64 noundef %9, i32 noundef 0) #2
%11 = load i64, ptr @DMA_CNTL, align 8, !tbaa !6
%12 = load i64, ptr @DMA0_REGISTER_OFFSET, align 8, !tbaa !6
%13 = add nsw i64 %12, %11
%14 = tail call i32 @RREG32(i64 noundef %13) #2
%15 = load i32, ptr @TRAP_ENABLE, align 4, !tbaa !10
%16 = xor i32 %15, -1
%17 = and i32 %14, %16
%18 = load i64, ptr @DMA_CNTL, align 8, !tbaa !6
%19 = load i64, ptr @DMA0_REGISTER_OFFSET, align 8, !tbaa !6
%20 = add nsw i64 %19, %18
%21 = tail call i32 @WREG32(i64 noundef %20, i32 noundef %17) #2
%22 = load i64, ptr @DMA_CNTL, align 8, !tbaa !6
%23 = load i64, ptr @DMA1_REGISTER_OFFSET, align 8, !tbaa !6
%24 = add nsw i64 %23, %22
%25 = tail call i32 @RREG32(i64 noundef %24) #2
%26 = load i32, ptr @TRAP_ENABLE, align 4, !tbaa !10
%27 = xor i32 %26, -1
%28 = and i32 %25, %27
%29 = load i64, ptr @DMA_CNTL, align 8, !tbaa !6
%30 = load i64, ptr @DMA1_REGISTER_OFFSET, align 8, !tbaa !6
%31 = add nsw i64 %30, %29
%32 = tail call i32 @WREG32(i64 noundef %31, i32 noundef %28) #2
%33 = load i64, ptr @GRBM_INT_CNTL, align 8, !tbaa !6
%34 = tail call i32 @WREG32(i64 noundef %33, i32 noundef 0) #2
%35 = load i64, ptr @INT_MASK, align 8, !tbaa !6
%36 = load i64, ptr @EVERGREEN_CRTC0_REGISTER_OFFSET, align 8, !tbaa !6
%37 = add nsw i64 %36, %35
%38 = tail call i32 @WREG32(i64 noundef %37, i32 noundef 0) #2
%39 = load i64, ptr @INT_MASK, align 8, !tbaa !6
%40 = load i64, ptr @EVERGREEN_CRTC1_REGISTER_OFFSET, align 8, !tbaa !6
%41 = add nsw i64 %40, %39
%42 = tail call i32 @WREG32(i64 noundef %41, i32 noundef 0) #2
%43 = load i32, ptr %0, align 4, !tbaa !12
%44 = icmp sgt i32 %43, 3
br i1 %44, label %45, label %65
45: ; preds = %1
%46 = load i64, ptr @INT_MASK, align 8, !tbaa !6
%47 = load i64, ptr @EVERGREEN_CRTC2_REGISTER_OFFSET, align 8, !tbaa !6
%48 = add nsw i64 %47, %46
%49 = tail call i32 @WREG32(i64 noundef %48, i32 noundef 0) #2
%50 = load i64, ptr @INT_MASK, align 8, !tbaa !6
%51 = load i64, ptr @EVERGREEN_CRTC3_REGISTER_OFFSET, align 8, !tbaa !6
%52 = add nsw i64 %51, %50
%53 = tail call i32 @WREG32(i64 noundef %52, i32 noundef 0) #2
%54 = load i32, ptr %0, align 4, !tbaa !12
%55 = icmp sgt i32 %54, 5
br i1 %55, label %56, label %65
56: ; preds = %45
%57 = load i64, ptr @INT_MASK, align 8, !tbaa !6
%58 = load i64, ptr @EVERGREEN_CRTC4_REGISTER_OFFSET, align 8, !tbaa !6
%59 = add nsw i64 %58, %57
%60 = tail call i32 @WREG32(i64 noundef %59, i32 noundef 0) #2
%61 = load i64, ptr @INT_MASK, align 8, !tbaa !6
%62 = load i64, ptr @EVERGREEN_CRTC5_REGISTER_OFFSET, align 8, !tbaa !6
%63 = add nsw i64 %62, %61
%64 = tail call i32 @WREG32(i64 noundef %63, i32 noundef 0) #2
br label %65
65: ; preds = %1, %56, %45
%66 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !6
%67 = load i64, ptr @EVERGREEN_CRTC0_REGISTER_OFFSET, align 8, !tbaa !6
%68 = add nsw i64 %67, %66
%69 = tail call i32 @WREG32(i64 noundef %68, i32 noundef 0) #2
%70 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !6
%71 = load i64, ptr @EVERGREEN_CRTC1_REGISTER_OFFSET, align 8, !tbaa !6
%72 = add nsw i64 %71, %70
%73 = tail call i32 @WREG32(i64 noundef %72, i32 noundef 0) #2
%74 = load i32, ptr %0, align 4, !tbaa !12
%75 = icmp sgt i32 %74, 3
br i1 %75, label %76, label %96
76: ; preds = %65
%77 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !6
%78 = load i64, ptr @EVERGREEN_CRTC2_REGISTER_OFFSET, align 8, !tbaa !6
%79 = add nsw i64 %78, %77
%80 = tail call i32 @WREG32(i64 noundef %79, i32 noundef 0) #2
%81 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !6
%82 = load i64, ptr @EVERGREEN_CRTC3_REGISTER_OFFSET, align 8, !tbaa !6
%83 = add nsw i64 %82, %81
%84 = tail call i32 @WREG32(i64 noundef %83, i32 noundef 0) #2
%85 = load i32, ptr %0, align 4, !tbaa !12
%86 = icmp sgt i32 %85, 5
br i1 %86, label %87, label %96
87: ; preds = %76
%88 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !6
%89 = load i64, ptr @EVERGREEN_CRTC4_REGISTER_OFFSET, align 8, !tbaa !6
%90 = add nsw i64 %89, %88
%91 = tail call i32 @WREG32(i64 noundef %90, i32 noundef 0) #2
%92 = load i64, ptr @GRPH_INT_CONTROL, align 8, !tbaa !6
%93 = load i64, ptr @EVERGREEN_CRTC5_REGISTER_OFFSET, align 8, !tbaa !6
%94 = add nsw i64 %93, %92
%95 = tail call i32 @WREG32(i64 noundef %94, i32 noundef 0) #2
br label %96
96: ; preds = %65, %87, %76
%97 = load i64, ptr @DACA_AUTODETECT_INT_CONTROL, align 8, !tbaa !6
%98 = tail call i32 @WREG32(i64 noundef %97, i32 noundef 0) #2
%99 = load i64, ptr @DC_HPD1_INT_CONTROL, align 8, !tbaa !6
%100 = tail call i32 @RREG32(i64 noundef %99) #2
%101 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !10
%102 = and i32 %101, %100
%103 = load i64, ptr @DC_HPD1_INT_CONTROL, align 8, !tbaa !6
%104 = tail call i32 @WREG32(i64 noundef %103, i32 noundef %102) #2
%105 = load i64, ptr @DC_HPD2_INT_CONTROL, align 8, !tbaa !6
%106 = tail call i32 @RREG32(i64 noundef %105) #2
%107 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !10
%108 = and i32 %107, %106
%109 = load i64, ptr @DC_HPD2_INT_CONTROL, align 8, !tbaa !6
%110 = tail call i32 @WREG32(i64 noundef %109, i32 noundef %108) #2
%111 = load i64, ptr @DC_HPD3_INT_CONTROL, align 8, !tbaa !6
%112 = tail call i32 @RREG32(i64 noundef %111) #2
%113 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !10
%114 = and i32 %113, %112
%115 = load i64, ptr @DC_HPD3_INT_CONTROL, align 8, !tbaa !6
%116 = tail call i32 @WREG32(i64 noundef %115, i32 noundef %114) #2
%117 = load i64, ptr @DC_HPD4_INT_CONTROL, align 8, !tbaa !6
%118 = tail call i32 @RREG32(i64 noundef %117) #2
%119 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !10
%120 = and i32 %119, %118
%121 = load i64, ptr @DC_HPD4_INT_CONTROL, align 8, !tbaa !6
%122 = tail call i32 @WREG32(i64 noundef %121, i32 noundef %120) #2
%123 = load i64, ptr @DC_HPD5_INT_CONTROL, align 8, !tbaa !6
%124 = tail call i32 @RREG32(i64 noundef %123) #2
%125 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !10
%126 = and i32 %125, %124
%127 = load i64, ptr @DC_HPD5_INT_CONTROL, align 8, !tbaa !6
%128 = tail call i32 @WREG32(i64 noundef %127, i32 noundef %126) #2
%129 = load i64, ptr @DC_HPD6_INT_CONTROL, align 8, !tbaa !6
%130 = tail call i32 @RREG32(i64 noundef %129) #2
%131 = load i32, ptr @DC_HPDx_INT_POLARITY, align 4, !tbaa !10
%132 = and i32 %131, %130
%133 = load i64, ptr @DC_HPD6_INT_CONTROL, align 8, !tbaa !6
%134 = tail call i32 @WREG32(i64 noundef %133, i32 noundef %132) #2
ret void
}
declare i32 @WREG32(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RREG32(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"radeon_device", !11, i64 0}
|
fastsocket_kernel_drivers_gpu_drm_radeon_extr_si.c_si_disable_interrupt_state
|
; ModuleID = 'AnghaBench/micropython/lib/littlefs/extr_lfs1.c_lfs1_bd_erase.c'
source_filename = "AnghaBench/micropython/lib/littlefs/extr_lfs1.c_lfs1_bd_erase.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @lfs1_bd_erase], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @lfs1_bd_erase(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = tail call i32 %4(ptr noundef nonnull %3, i32 noundef %1) #1
ret i32 %5
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_5__", !7, i64 0}
|
; ModuleID = 'AnghaBench/micropython/lib/littlefs/extr_lfs1.c_lfs1_bd_erase.c'
source_filename = "AnghaBench/micropython/lib/littlefs/extr_lfs1.c_lfs1_bd_erase.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @lfs1_bd_erase], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @lfs1_bd_erase(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = tail call i32 %4(ptr noundef nonnull %3, i32 noundef %1) #1
ret i32 %5
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_5__", !8, i64 0}
|
micropython_lib_littlefs_extr_lfs1.c_lfs1_bd_erase
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/xl/extr_if_xl.c_xl_reset.c'
source_filename = "AnghaBench/freebsd/sys/dev/xl/extr_if_xl.c_xl_reset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.xl_softc = type { i32, i32 }
@XL_COMMAND = dso_local local_unnamed_addr global i32 0, align 4
@XL_CMD_RESET = dso_local local_unnamed_addr global i32 0, align 4
@XL_FLAG_WEIRDRESET = dso_local local_unnamed_addr global i32 0, align 4
@XL_RESETOPT_DISADVFD = dso_local local_unnamed_addr global i32 0, align 4
@XL_FLAG_USE_MMIO = dso_local local_unnamed_addr global i32 0, align 4
@XL_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@XL_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@XL_STAT_CMDBUSY = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [23 x i8] c"reset didn't complete\0A\00", align 1
@XL_CMD_RX_RESET = dso_local local_unnamed_addr global i32 0, align 4
@XL_CMD_TX_RESET = dso_local local_unnamed_addr global i32 0, align 4
@XL_FLAG_INVERT_LED_PWR = dso_local local_unnamed_addr global i32 0, align 4
@XL_FLAG_INVERT_MII_PWR = dso_local local_unnamed_addr global i32 0, align 4
@XL_W2_RESET_OPTIONS = dso_local local_unnamed_addr global i32 0, align 4
@XL_RESETOPT_INVERT_LED = dso_local local_unnamed_addr global i32 0, align 4
@XL_RESETOPT_INVERT_MII = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @xl_reset], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @xl_reset(ptr noundef %0) #0 {
%2 = tail call i32 @XL_LOCK_ASSERT(ptr noundef %0) #2
%3 = tail call i32 @XL_SEL_WIN(i32 noundef 0) #2
%4 = load i32, ptr @XL_COMMAND, align 4, !tbaa !5
%5 = load i32, ptr @XL_CMD_RESET, align 4, !tbaa !5
%6 = load i32, ptr %0, align 4, !tbaa !9
%7 = load i32, ptr @XL_FLAG_WEIRDRESET, align 4, !tbaa !5
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, 0
%10 = load i32, ptr @XL_RESETOPT_DISADVFD, align 4
%11 = select i1 %9, i32 0, i32 %10
%12 = or i32 %11, %5
%13 = tail call i32 @CSR_WRITE_2(ptr noundef nonnull %0, i32 noundef %4, i32 noundef %12) #2
%14 = load i32, ptr %0, align 4, !tbaa !9
%15 = load i32, ptr @XL_FLAG_USE_MMIO, align 4, !tbaa !5
%16 = and i32 %15, %14
%17 = icmp eq i32 %16, 0
br i1 %17, label %20, label %18
18: ; preds = %1
%19 = tail call i32 @DELAY(i32 noundef 100000) #2
br label %20
20: ; preds = %18, %1
%21 = load i32, ptr @XL_TIMEOUT, align 4, !tbaa !5
%22 = icmp sgt i32 %21, 0
br i1 %22, label %23, label %35
23: ; preds = %20, %32
%24 = phi i32 [ %33, %32 ], [ 0, %20 ]
%25 = tail call i32 @DELAY(i32 noundef 10) #2
%26 = load i32, ptr @XL_STATUS, align 4, !tbaa !5
%27 = tail call i32 @CSR_READ_2(ptr noundef nonnull %0, i32 noundef %26) #2
%28 = load i32, ptr @XL_STAT_CMDBUSY, align 4, !tbaa !5
%29 = and i32 %28, %27
%30 = icmp eq i32 %29, 0
%31 = load i32, ptr @XL_TIMEOUT, align 4, !tbaa !5
br i1 %30, label %35, label %32
32: ; preds = %23
%33 = add nuw nsw i32 %24, 1
%34 = icmp slt i32 %33, %31
br i1 %34, label %23, label %35, !llvm.loop !11
35: ; preds = %32, %23, %20
%36 = phi i32 [ %21, %20 ], [ %31, %23 ], [ %31, %32 ]
%37 = phi i32 [ 0, %20 ], [ %33, %32 ], [ %24, %23 ]
%38 = icmp eq i32 %37, %36
br i1 %38, label %39, label %43
39: ; preds = %35
%40 = getelementptr inbounds %struct.xl_softc, ptr %0, i64 0, i32 1
%41 = load i32, ptr %40, align 4, !tbaa !13
%42 = tail call i32 @device_printf(i32 noundef %41, ptr noundef nonnull @.str) #2
br label %43
43: ; preds = %39, %35
%44 = load i32, ptr @XL_COMMAND, align 4, !tbaa !5
%45 = load i32, ptr @XL_CMD_RX_RESET, align 4, !tbaa !5
%46 = tail call i32 @CSR_WRITE_2(ptr noundef nonnull %0, i32 noundef %44, i32 noundef %45) #2
%47 = tail call i32 @DELAY(i32 noundef 100000) #2
%48 = tail call i32 @xl_wait(ptr noundef nonnull %0) #2
%49 = load i32, ptr @XL_COMMAND, align 4, !tbaa !5
%50 = load i32, ptr @XL_CMD_TX_RESET, align 4, !tbaa !5
%51 = tail call i32 @CSR_WRITE_2(ptr noundef nonnull %0, i32 noundef %49, i32 noundef %50) #2
%52 = tail call i32 @xl_wait(ptr noundef nonnull %0) #2
%53 = load i32, ptr %0, align 4, !tbaa !9
%54 = load i32, ptr @XL_FLAG_INVERT_LED_PWR, align 4, !tbaa !5
%55 = and i32 %54, %53
%56 = icmp eq i32 %55, 0
br i1 %56, label %57, label %61
57: ; preds = %43
%58 = load i32, ptr @XL_FLAG_INVERT_MII_PWR, align 4, !tbaa !5
%59 = and i32 %58, %53
%60 = icmp eq i32 %59, 0
br i1 %60, label %79, label %61
61: ; preds = %57, %43
%62 = tail call i32 @XL_SEL_WIN(i32 noundef 2) #2
%63 = load i32, ptr @XL_W2_RESET_OPTIONS, align 4, !tbaa !5
%64 = tail call i32 @CSR_READ_2(ptr noundef nonnull %0, i32 noundef %63) #2
%65 = load i32, ptr %0, align 4, !tbaa !9
%66 = load i32, ptr @XL_FLAG_INVERT_LED_PWR, align 4, !tbaa !5
%67 = and i32 %66, %65
%68 = icmp eq i32 %67, 0
%69 = load i32, ptr @XL_RESETOPT_INVERT_LED, align 4
%70 = select i1 %68, i32 0, i32 %69
%71 = or i32 %70, %64
%72 = load i32, ptr @XL_FLAG_INVERT_MII_PWR, align 4, !tbaa !5
%73 = and i32 %72, %65
%74 = icmp eq i32 %73, 0
%75 = load i32, ptr @XL_RESETOPT_INVERT_MII, align 4
%76 = select i1 %74, i32 0, i32 %75
%77 = or i32 %71, %76
%78 = tail call i32 @CSR_WRITE_2(ptr noundef nonnull %0, i32 noundef %63, i32 noundef %77) #2
br label %79
79: ; preds = %61, %57
%80 = tail call i32 @DELAY(i32 noundef 100000) #2
ret void
}
declare i32 @XL_LOCK_ASSERT(ptr noundef) local_unnamed_addr #1
declare i32 @XL_SEL_WIN(i32 noundef) local_unnamed_addr #1
declare i32 @CSR_WRITE_2(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DELAY(i32 noundef) local_unnamed_addr #1
declare i32 @CSR_READ_2(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xl_wait(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"xl_softc", !6, i64 0, !6, i64 4}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!10, !6, i64 4}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/xl/extr_if_xl.c_xl_reset.c'
source_filename = "AnghaBench/freebsd/sys/dev/xl/extr_if_xl.c_xl_reset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@XL_COMMAND = common local_unnamed_addr global i32 0, align 4
@XL_CMD_RESET = common local_unnamed_addr global i32 0, align 4
@XL_FLAG_WEIRDRESET = common local_unnamed_addr global i32 0, align 4
@XL_RESETOPT_DISADVFD = common local_unnamed_addr global i32 0, align 4
@XL_FLAG_USE_MMIO = common local_unnamed_addr global i32 0, align 4
@XL_TIMEOUT = common local_unnamed_addr global i32 0, align 4
@XL_STATUS = common local_unnamed_addr global i32 0, align 4
@XL_STAT_CMDBUSY = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [23 x i8] c"reset didn't complete\0A\00", align 1
@XL_CMD_RX_RESET = common local_unnamed_addr global i32 0, align 4
@XL_CMD_TX_RESET = common local_unnamed_addr global i32 0, align 4
@XL_FLAG_INVERT_LED_PWR = common local_unnamed_addr global i32 0, align 4
@XL_FLAG_INVERT_MII_PWR = common local_unnamed_addr global i32 0, align 4
@XL_W2_RESET_OPTIONS = common local_unnamed_addr global i32 0, align 4
@XL_RESETOPT_INVERT_LED = common local_unnamed_addr global i32 0, align 4
@XL_RESETOPT_INVERT_MII = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @xl_reset], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @xl_reset(ptr noundef %0) #0 {
%2 = tail call i32 @XL_LOCK_ASSERT(ptr noundef %0) #2
%3 = tail call i32 @XL_SEL_WIN(i32 noundef 0) #2
%4 = load i32, ptr @XL_COMMAND, align 4, !tbaa !6
%5 = load i32, ptr @XL_CMD_RESET, align 4, !tbaa !6
%6 = load i32, ptr %0, align 4, !tbaa !10
%7 = load i32, ptr @XL_FLAG_WEIRDRESET, align 4, !tbaa !6
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, 0
%10 = load i32, ptr @XL_RESETOPT_DISADVFD, align 4
%11 = select i1 %9, i32 0, i32 %10
%12 = or i32 %11, %5
%13 = tail call i32 @CSR_WRITE_2(ptr noundef nonnull %0, i32 noundef %4, i32 noundef %12) #2
%14 = load i32, ptr %0, align 4, !tbaa !10
%15 = load i32, ptr @XL_FLAG_USE_MMIO, align 4, !tbaa !6
%16 = and i32 %15, %14
%17 = icmp eq i32 %16, 0
br i1 %17, label %20, label %18
18: ; preds = %1
%19 = tail call i32 @DELAY(i32 noundef 100000) #2
br label %20
20: ; preds = %18, %1
%21 = load i32, ptr @XL_TIMEOUT, align 4, !tbaa !6
%22 = icmp sgt i32 %21, 0
br i1 %22, label %23, label %35
23: ; preds = %20, %32
%24 = phi i32 [ %33, %32 ], [ 0, %20 ]
%25 = tail call i32 @DELAY(i32 noundef 10) #2
%26 = load i32, ptr @XL_STATUS, align 4, !tbaa !6
%27 = tail call i32 @CSR_READ_2(ptr noundef nonnull %0, i32 noundef %26) #2
%28 = load i32, ptr @XL_STAT_CMDBUSY, align 4, !tbaa !6
%29 = and i32 %28, %27
%30 = icmp eq i32 %29, 0
%31 = load i32, ptr @XL_TIMEOUT, align 4, !tbaa !6
br i1 %30, label %35, label %32
32: ; preds = %23
%33 = add nuw nsw i32 %24, 1
%34 = icmp slt i32 %33, %31
br i1 %34, label %23, label %35, !llvm.loop !12
35: ; preds = %32, %23, %20
%36 = phi i32 [ %21, %20 ], [ %31, %23 ], [ %31, %32 ]
%37 = phi i32 [ 0, %20 ], [ %33, %32 ], [ %24, %23 ]
%38 = icmp eq i32 %37, %36
br i1 %38, label %39, label %43
39: ; preds = %35
%40 = getelementptr inbounds i8, ptr %0, i64 4
%41 = load i32, ptr %40, align 4, !tbaa !14
%42 = tail call i32 @device_printf(i32 noundef %41, ptr noundef nonnull @.str) #2
br label %43
43: ; preds = %39, %35
%44 = load i32, ptr @XL_COMMAND, align 4, !tbaa !6
%45 = load i32, ptr @XL_CMD_RX_RESET, align 4, !tbaa !6
%46 = tail call i32 @CSR_WRITE_2(ptr noundef nonnull %0, i32 noundef %44, i32 noundef %45) #2
%47 = tail call i32 @DELAY(i32 noundef 100000) #2
%48 = tail call i32 @xl_wait(ptr noundef nonnull %0) #2
%49 = load i32, ptr @XL_COMMAND, align 4, !tbaa !6
%50 = load i32, ptr @XL_CMD_TX_RESET, align 4, !tbaa !6
%51 = tail call i32 @CSR_WRITE_2(ptr noundef nonnull %0, i32 noundef %49, i32 noundef %50) #2
%52 = tail call i32 @xl_wait(ptr noundef nonnull %0) #2
%53 = load i32, ptr %0, align 4, !tbaa !10
%54 = load i32, ptr @XL_FLAG_INVERT_LED_PWR, align 4, !tbaa !6
%55 = and i32 %54, %53
%56 = icmp eq i32 %55, 0
br i1 %56, label %57, label %61
57: ; preds = %43
%58 = load i32, ptr @XL_FLAG_INVERT_MII_PWR, align 4, !tbaa !6
%59 = and i32 %58, %53
%60 = icmp eq i32 %59, 0
br i1 %60, label %79, label %61
61: ; preds = %57, %43
%62 = tail call i32 @XL_SEL_WIN(i32 noundef 2) #2
%63 = load i32, ptr @XL_W2_RESET_OPTIONS, align 4, !tbaa !6
%64 = tail call i32 @CSR_READ_2(ptr noundef nonnull %0, i32 noundef %63) #2
%65 = load i32, ptr %0, align 4, !tbaa !10
%66 = load i32, ptr @XL_FLAG_INVERT_LED_PWR, align 4, !tbaa !6
%67 = and i32 %66, %65
%68 = icmp eq i32 %67, 0
%69 = load i32, ptr @XL_RESETOPT_INVERT_LED, align 4
%70 = select i1 %68, i32 0, i32 %69
%71 = or i32 %70, %64
%72 = load i32, ptr @XL_FLAG_INVERT_MII_PWR, align 4, !tbaa !6
%73 = and i32 %72, %65
%74 = icmp eq i32 %73, 0
%75 = load i32, ptr @XL_RESETOPT_INVERT_MII, align 4
%76 = select i1 %74, i32 0, i32 %75
%77 = or i32 %71, %76
%78 = tail call i32 @CSR_WRITE_2(ptr noundef nonnull %0, i32 noundef %63, i32 noundef %77) #2
br label %79
79: ; preds = %61, %57
%80 = tail call i32 @DELAY(i32 noundef 100000) #2
ret void
}
declare i32 @XL_LOCK_ASSERT(ptr noundef) local_unnamed_addr #1
declare i32 @XL_SEL_WIN(i32 noundef) local_unnamed_addr #1
declare i32 @CSR_WRITE_2(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DELAY(i32 noundef) local_unnamed_addr #1
declare i32 @CSR_READ_2(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xl_wait(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"xl_softc", !7, i64 0, !7, i64 4}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!11, !7, i64 4}
|
freebsd_sys_dev_xl_extr_if_xl.c_xl_reset
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_procfs.c_proc_kill.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_procfs.c_proc_kill.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@FD_CTL = dso_local local_unnamed_addr global i32 0, align 4
@PIOCKILL = dso_local local_unnamed_addr global i32 0, align 4
@PCKILL = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @proc_kill(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
store i32 %1, ptr %3, align 4, !tbaa !5
%4 = load i64, ptr %0, align 8, !tbaa !9
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %2
%7 = load i32, ptr @FD_CTL, align 4, !tbaa !5
%8 = tail call i64 @open_procinfo_files(ptr noundef nonnull %0, i32 noundef %7) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i64, ptr %0, align 8, !tbaa !9
br label %12
12: ; preds = %10, %2
%13 = phi i64 [ %11, %10 ], [ %4, %2 ]
%14 = load i32, ptr @PIOCKILL, align 4, !tbaa !5
%15 = call i64 @ioctl(i64 noundef %13, i32 noundef %14, ptr noundef nonnull %3) #2
%16 = icmp sgt i64 %15, -1
%17 = zext i1 %16 to i32
br label %18
18: ; preds = %6, %12
%19 = phi i32 [ %17, %12 ], [ 0, %6 ]
ret i32 %19
}
declare i64 @open_procinfo_files(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ioctl(i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_4__", !11, i64 0}
!11 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_procfs.c_proc_kill.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_procfs.c_proc_kill.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FD_CTL = common local_unnamed_addr global i32 0, align 4
@PIOCKILL = common local_unnamed_addr global i32 0, align 4
@PCKILL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @proc_kill(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
store i32 %1, ptr %3, align 4, !tbaa !6
%4 = load i64, ptr %0, align 8, !tbaa !10
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %2
%7 = load i32, ptr @FD_CTL, align 4, !tbaa !6
%8 = tail call i64 @open_procinfo_files(ptr noundef nonnull %0, i32 noundef %7) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i64, ptr %0, align 8, !tbaa !10
br label %12
12: ; preds = %10, %2
%13 = phi i64 [ %11, %10 ], [ %4, %2 ]
%14 = load i32, ptr @PIOCKILL, align 4, !tbaa !6
%15 = call i64 @ioctl(i64 noundef %13, i32 noundef %14, ptr noundef nonnull %3) #2
%16 = icmp sgt i64 %15, -1
%17 = zext i1 %16 to i32
br label %18
18: ; preds = %6, %12
%19 = phi i32 [ %17, %12 ], [ 0, %6 ]
ret i32 %19
}
declare i64 @open_procinfo_files(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ioctl(i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
|
freebsd_contrib_gdb_gdb_extr_procfs.c_proc_kill
|
; ModuleID = 'AnghaBench/freebsd/contrib/bearssl/src/hash/extr_ghash_pwr8.c_br_ghash_pwr8_get.c'
source_filename = "AnghaBench/freebsd/contrib/bearssl/src/hash/extr_ghash_pwr8.c_br_ghash_pwr8_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @br_ghash_pwr8_get() local_unnamed_addr #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/bearssl/src/hash/extr_ghash_pwr8.c_br_ghash_pwr8_get.c'
source_filename = "AnghaBench/freebsd/contrib/bearssl/src/hash/extr_ghash_pwr8.c_br_ghash_pwr8_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i32 @br_ghash_pwr8_get() local_unnamed_addr #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_contrib_bearssl_src_hash_extr_ghash_pwr8.c_br_ghash_pwr8_get
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/ui/extr_ui_syscalls.c_trap_Key_IsDown.c'
source_filename = "AnghaBench/Quake-III-Arena/code/ui/extr_ui_syscalls.c_trap_Key_IsDown.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@UI_KEY_ISDOWN = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @trap_Key_IsDown(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @UI_KEY_ISDOWN, align 4, !tbaa !5
%3 = tail call i32 @syscall(i32 noundef %2, i32 noundef %0) #2
ret i32 %3
}
declare i32 @syscall(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/ui/extr_ui_syscalls.c_trap_Key_IsDown.c'
source_filename = "AnghaBench/Quake-III-Arena/code/ui/extr_ui_syscalls.c_trap_Key_IsDown.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UI_KEY_ISDOWN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @trap_Key_IsDown(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @UI_KEY_ISDOWN, align 4, !tbaa !6
%3 = tail call i32 @syscall(i32 noundef %2, i32 noundef %0) #2
ret i32 %3
}
declare i32 @syscall(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
Quake-III-Arena_code_ui_extr_ui_syscalls.c_trap_Key_IsDown
|
; ModuleID = 'AnghaBench/linux/sound/pci/rme9652/extr_hdsp.c_snd_hdsp_create_pcm.c'
source_filename = "AnghaBench/linux/sound/pci/rme9652/extr_hdsp.c_snd_hdsp_create_pcm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hdsp = type { i32, ptr }
%struct.snd_pcm = type { i32, i32, ptr }
@SNDRV_PCM_STREAM_PLAYBACK = dso_local local_unnamed_addr global i32 0, align 4
@snd_hdsp_playback_ops = dso_local global i32 0, align 4
@SNDRV_PCM_STREAM_CAPTURE = dso_local local_unnamed_addr global i32 0, align 4
@snd_hdsp_capture_ops = dso_local global i32 0, align 4
@SNDRV_PCM_INFO_JOINT_DUPLEX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_hdsp_create_pcm], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @snd_hdsp_create_pcm(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = load i32, ptr %1, align 8, !tbaa !5
%5 = call i32 @snd_pcm_new(ptr noundef %0, i32 noundef %4, i32 noundef 0, i32 noundef 1, i32 noundef 1, ptr noundef nonnull %3) #3
%6 = icmp slt i32 %5, 0
br i1 %6, label %23, label %7
7: ; preds = %2
%8 = load ptr, ptr %3, align 8, !tbaa !11
%9 = getelementptr inbounds %struct.hdsp, ptr %1, i64 0, i32 1
store ptr %8, ptr %9, align 8, !tbaa !12
%10 = getelementptr inbounds %struct.snd_pcm, ptr %8, i64 0, i32 2
store ptr %1, ptr %10, align 8, !tbaa !13
%11 = getelementptr inbounds %struct.snd_pcm, ptr %8, i64 0, i32 1
%12 = load i32, ptr %11, align 4, !tbaa !15
%13 = load i32, ptr %1, align 8, !tbaa !5
%14 = call i32 @strcpy(i32 noundef %12, i32 noundef %13) #3
%15 = load ptr, ptr %3, align 8, !tbaa !11
%16 = load i32, ptr @SNDRV_PCM_STREAM_PLAYBACK, align 4, !tbaa !16
%17 = call i32 @snd_pcm_set_ops(ptr noundef %15, i32 noundef %16, ptr noundef nonnull @snd_hdsp_playback_ops) #3
%18 = load ptr, ptr %3, align 8, !tbaa !11
%19 = load i32, ptr @SNDRV_PCM_STREAM_CAPTURE, align 4, !tbaa !16
%20 = call i32 @snd_pcm_set_ops(ptr noundef %18, i32 noundef %19, ptr noundef nonnull @snd_hdsp_capture_ops) #3
%21 = load i32, ptr @SNDRV_PCM_INFO_JOINT_DUPLEX, align 4, !tbaa !16
%22 = load ptr, ptr %3, align 8, !tbaa !11
store i32 %21, ptr %22, align 8, !tbaa !17
br label %23
23: ; preds = %2, %7
%24 = phi i32 [ 0, %7 ], [ %5, %2 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @snd_pcm_new(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @snd_pcm_set_ops(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"hdsp", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!14, !10, i64 8}
!14 = !{!"snd_pcm", !7, i64 0, !7, i64 4, !10, i64 8}
!15 = !{!14, !7, i64 4}
!16 = !{!7, !7, i64 0}
!17 = !{!14, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/sound/pci/rme9652/extr_hdsp.c_snd_hdsp_create_pcm.c'
source_filename = "AnghaBench/linux/sound/pci/rme9652/extr_hdsp.c_snd_hdsp_create_pcm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SNDRV_PCM_STREAM_PLAYBACK = common local_unnamed_addr global i32 0, align 4
@snd_hdsp_playback_ops = common global i32 0, align 4
@SNDRV_PCM_STREAM_CAPTURE = common local_unnamed_addr global i32 0, align 4
@snd_hdsp_capture_ops = common global i32 0, align 4
@SNDRV_PCM_INFO_JOINT_DUPLEX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_hdsp_create_pcm], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483648, 1) i32 @snd_hdsp_create_pcm(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = load i32, ptr %1, align 8, !tbaa !6
%5 = call i32 @snd_pcm_new(ptr noundef %0, i32 noundef %4, i32 noundef 0, i32 noundef 1, i32 noundef 1, ptr noundef nonnull %3) #3
%6 = icmp slt i32 %5, 0
br i1 %6, label %23, label %7
7: ; preds = %2
%8 = load ptr, ptr %3, align 8, !tbaa !12
%9 = getelementptr inbounds i8, ptr %1, i64 8
store ptr %8, ptr %9, align 8, !tbaa !13
%10 = getelementptr inbounds i8, ptr %8, i64 8
store ptr %1, ptr %10, align 8, !tbaa !14
%11 = getelementptr inbounds i8, ptr %8, i64 4
%12 = load i32, ptr %11, align 4, !tbaa !16
%13 = load i32, ptr %1, align 8, !tbaa !6
%14 = call i32 @strcpy(i32 noundef %12, i32 noundef %13) #3
%15 = load ptr, ptr %3, align 8, !tbaa !12
%16 = load i32, ptr @SNDRV_PCM_STREAM_PLAYBACK, align 4, !tbaa !17
%17 = call i32 @snd_pcm_set_ops(ptr noundef %15, i32 noundef %16, ptr noundef nonnull @snd_hdsp_playback_ops) #3
%18 = load ptr, ptr %3, align 8, !tbaa !12
%19 = load i32, ptr @SNDRV_PCM_STREAM_CAPTURE, align 4, !tbaa !17
%20 = call i32 @snd_pcm_set_ops(ptr noundef %18, i32 noundef %19, ptr noundef nonnull @snd_hdsp_capture_ops) #3
%21 = load i32, ptr @SNDRV_PCM_INFO_JOINT_DUPLEX, align 4, !tbaa !17
%22 = load ptr, ptr %3, align 8, !tbaa !12
store i32 %21, ptr %22, align 8, !tbaa !18
br label %23
23: ; preds = %2, %7
%24 = phi i32 [ 0, %7 ], [ %5, %2 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @snd_pcm_new(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @snd_pcm_set_ops(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"hdsp", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!15, !11, i64 8}
!15 = !{!"snd_pcm", !8, i64 0, !8, i64 4, !11, i64 8}
!16 = !{!15, !8, i64 4}
!17 = !{!8, !8, i64 0}
!18 = !{!15, !8, i64 0}
|
linux_sound_pci_rme9652_extr_hdsp.c_snd_hdsp_create_pcm
|
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/opcodes/extr_cgen-opc.c_cgen_lookup_get_insn_operands.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/opcodes/extr_cgen-opc.c_cgen_lookup_get_insn_operands.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local ptr @cgen_lookup_get_insn_operands(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5, ptr noundef %6) local_unnamed_addr #0 {
%8 = icmp ne ptr %1, null
%9 = zext i1 %8 to i32
%10 = tail call ptr @cgen_lookup_insn(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %6, i32 noundef %9) #2
%11 = icmp eq ptr %10, null
br i1 %11, label %14, label %12
12: ; preds = %7
%13 = tail call i32 @cgen_get_insn_operands(i32 noundef %0, ptr noundef nonnull %10, ptr noundef %6, ptr noundef %5) #2
br label %14
14: ; preds = %7, %12
ret ptr %10
}
declare ptr @cgen_lookup_insn(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cgen_get_insn_operands(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/opcodes/extr_cgen-opc.c_cgen_lookup_get_insn_operands.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/opcodes/extr_cgen-opc.c_cgen_lookup_get_insn_operands.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @cgen_lookup_get_insn_operands(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5, ptr noundef %6) local_unnamed_addr #0 {
%8 = icmp ne ptr %1, null
%9 = zext i1 %8 to i32
%10 = tail call ptr @cgen_lookup_insn(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %6, i32 noundef %9) #2
%11 = icmp eq ptr %10, null
br i1 %11, label %14, label %12
12: ; preds = %7
%13 = tail call i32 @cgen_get_insn_operands(i32 noundef %0, ptr noundef nonnull %10, ptr noundef %6, ptr noundef %5) #2
br label %14
14: ; preds = %7, %12
ret ptr %10
}
declare ptr @cgen_lookup_insn(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cgen_get_insn_operands(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_contrib_binutils_opcodes_extr_cgen-opc.c_cgen_lookup_get_insn_operands
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/etnaviv/extr_etnaviv_gem_submit.c_submit_pin_objects.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/etnaviv/extr_etnaviv_gem_submit.c_submit_pin_objects.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.etnaviv_gem_submit = type { i32, i32, ptr, i32 }
%struct.TYPE_2__ = type { i64, ptr, i32, ptr }
%struct.etnaviv_gem_object = type { i32, i32 }
@ETNA_SUBMIT_SOFTPIN = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@BO_PINNED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @submit_pin_objects], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @submit_pin_objects(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %49
4: ; preds = %1
%5 = getelementptr inbounds %struct.etnaviv_gem_submit, ptr %0, i64 0, i32 2
%6 = getelementptr inbounds %struct.etnaviv_gem_submit, ptr %0, i64 0, i32 3
%7 = getelementptr inbounds %struct.etnaviv_gem_submit, ptr %0, i64 0, i32 1
%8 = load ptr, ptr %5, align 8, !tbaa !11
br label %9
9: ; preds = %4, %35
%10 = phi ptr [ %8, %4 ], [ %38, %35 ]
%11 = phi i64 [ 0, %4 ], [ %43, %35 ]
%12 = getelementptr inbounds %struct.TYPE_2__, ptr %10, i64 %11
%13 = getelementptr inbounds %struct.TYPE_2__, ptr %10, i64 %11, i32 3
%14 = load ptr, ptr %13, align 8, !tbaa !12
%15 = getelementptr inbounds %struct.etnaviv_gem_object, ptr %14, i64 0, i32 1
%16 = load i32, ptr %6, align 8, !tbaa !15
%17 = load i64, ptr %12, align 8, !tbaa !16
%18 = tail call ptr @etnaviv_gem_mapping_get(ptr noundef nonnull %15, i32 noundef %16, i64 noundef %17) #2
%19 = tail call i64 @IS_ERR(ptr noundef %18) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %47
21: ; preds = %9
%22 = load i32, ptr %7, align 4, !tbaa !17
%23 = load i32, ptr @ETNA_SUBMIT_SOFTPIN, align 4, !tbaa !18
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %35, label %26
26: ; preds = %21
%27 = load ptr, ptr %5, align 8, !tbaa !11
%28 = getelementptr inbounds %struct.TYPE_2__, ptr %27, i64 %11
%29 = load i64, ptr %28, align 8, !tbaa !16
%30 = load i64, ptr %18, align 8, !tbaa !19
%31 = icmp eq i64 %29, %30
br i1 %31, label %35, label %32
32: ; preds = %26
%33 = load i32, ptr @EINVAL, align 4, !tbaa !18
%34 = sub nsw i32 0, %33
br label %49
35: ; preds = %21, %26
%36 = tail call i32 @atomic_inc(ptr noundef %14) #2
%37 = load i32, ptr @BO_PINNED, align 4, !tbaa !18
%38 = load ptr, ptr %5, align 8, !tbaa !11
%39 = getelementptr inbounds %struct.TYPE_2__, ptr %38, i64 %11, i32 2
%40 = load i32, ptr %39, align 8, !tbaa !21
%41 = or i32 %40, %37
store i32 %41, ptr %39, align 8, !tbaa !21
%42 = getelementptr inbounds %struct.TYPE_2__, ptr %38, i64 %11, i32 1
store ptr %18, ptr %42, align 8, !tbaa !22
%43 = add nuw nsw i64 %11, 1
%44 = load i32, ptr %0, align 8, !tbaa !5
%45 = sext i32 %44 to i64
%46 = icmp slt i64 %43, %45
br i1 %46, label %9, label %49, !llvm.loop !23
47: ; preds = %9
%48 = tail call i32 @PTR_ERR(ptr noundef %18) #2
br label %49
49: ; preds = %35, %1, %32, %47
%50 = phi i32 [ %48, %47 ], [ %34, %32 ], [ 0, %1 ], [ 0, %35 ]
ret i32 %50
}
declare ptr @etnaviv_gem_mapping_get(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"etnaviv_gem_submit", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !10, i64 24}
!13 = !{!"TYPE_2__", !14, i64 0, !10, i64 8, !7, i64 16, !10, i64 24}
!14 = !{!"long", !8, i64 0}
!15 = !{!6, !7, i64 16}
!16 = !{!13, !14, i64 0}
!17 = !{!6, !7, i64 4}
!18 = !{!7, !7, i64 0}
!19 = !{!20, !14, i64 0}
!20 = !{!"etnaviv_vram_mapping", !14, i64 0}
!21 = !{!13, !7, i64 16}
!22 = !{!13, !10, i64 8}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/etnaviv/extr_etnaviv_gem_submit.c_submit_pin_objects.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/etnaviv/extr_etnaviv_gem_submit.c_submit_pin_objects.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i64, ptr, i32, ptr }
@ETNA_SUBMIT_SOFTPIN = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@BO_PINNED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @submit_pin_objects], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @submit_pin_objects(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %49
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = getelementptr inbounds i8, ptr %0, i64 16
%7 = getelementptr inbounds i8, ptr %0, i64 4
%8 = load ptr, ptr %5, align 8, !tbaa !12
br label %9
9: ; preds = %4, %37
%10 = phi ptr [ %8, %4 ], [ %40, %37 ]
%11 = phi i64 [ 0, %4 ], [ %45, %37 ]
%12 = getelementptr inbounds %struct.TYPE_2__, ptr %10, i64 %11
%13 = getelementptr inbounds i8, ptr %12, i64 24
%14 = load ptr, ptr %13, align 8, !tbaa !13
%15 = getelementptr inbounds i8, ptr %14, i64 4
%16 = load i32, ptr %6, align 8, !tbaa !16
%17 = load i64, ptr %12, align 8, !tbaa !17
%18 = tail call ptr @etnaviv_gem_mapping_get(ptr noundef nonnull %15, i32 noundef %16, i64 noundef %17) #2
%19 = tail call i64 @IS_ERR(ptr noundef %18) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %35
21: ; preds = %9
%22 = load i32, ptr %7, align 4, !tbaa !18
%23 = load i32, ptr @ETNA_SUBMIT_SOFTPIN, align 4, !tbaa !19
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %37, label %26
26: ; preds = %21
%27 = load ptr, ptr %5, align 8, !tbaa !12
%28 = getelementptr inbounds %struct.TYPE_2__, ptr %27, i64 %11
%29 = load i64, ptr %28, align 8, !tbaa !17
%30 = load i64, ptr %18, align 8, !tbaa !20
%31 = icmp eq i64 %29, %30
br i1 %31, label %37, label %32
32: ; preds = %26
%33 = load i32, ptr @EINVAL, align 4, !tbaa !19
%34 = sub nsw i32 0, %33
br label %49
35: ; preds = %9
%36 = tail call i32 @PTR_ERR(ptr noundef %18) #2
br label %49
37: ; preds = %21, %26
%38 = tail call i32 @atomic_inc(ptr noundef %14) #2
%39 = load i32, ptr @BO_PINNED, align 4, !tbaa !19
%40 = load ptr, ptr %5, align 8, !tbaa !12
%41 = getelementptr inbounds %struct.TYPE_2__, ptr %40, i64 %11, i32 2
%42 = load i32, ptr %41, align 8, !tbaa !22
%43 = or i32 %42, %39
store i32 %43, ptr %41, align 8, !tbaa !22
%44 = getelementptr inbounds %struct.TYPE_2__, ptr %40, i64 %11, i32 1
store ptr %18, ptr %44, align 8, !tbaa !23
%45 = add nuw nsw i64 %11, 1
%46 = load i32, ptr %0, align 8, !tbaa !6
%47 = sext i32 %46 to i64
%48 = icmp slt i64 %45, %47
br i1 %48, label %9, label %49, !llvm.loop !24
49: ; preds = %37, %1, %35, %32
%50 = phi i32 [ %34, %32 ], [ %36, %35 ], [ 0, %1 ], [ 0, %37 ]
ret i32 %50
}
declare ptr @etnaviv_gem_mapping_get(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"etnaviv_gem_submit", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !11, i64 24}
!14 = !{!"TYPE_2__", !15, i64 0, !11, i64 8, !8, i64 16, !11, i64 24}
!15 = !{!"long", !9, i64 0}
!16 = !{!7, !8, i64 16}
!17 = !{!14, !15, i64 0}
!18 = !{!7, !8, i64 4}
!19 = !{!8, !8, i64 0}
!20 = !{!21, !15, i64 0}
!21 = !{!"etnaviv_vram_mapping", !15, i64 0}
!22 = !{!14, !8, i64 16}
!23 = !{!14, !11, i64 8}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_gpu_drm_etnaviv_extr_etnaviv_gem_submit.c_submit_pin_objects
|
; ModuleID = 'AnghaBench/linux/drivers/media/pci/cx18/extr_cx18-alsa.h_snd_cx18_lock.c'
source_filename = "AnghaBench/linux/drivers/media/pci/cx18/extr_cx18-alsa.h_snd_cx18_lock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_cx18_lock], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @snd_cx18_lock(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = tail call ptr @to_cx18(i32 noundef %2) #2
%4 = tail call i32 @mutex_lock(ptr noundef %3) #2
ret void
}
declare ptr @to_cx18(i32 noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_cx18_card", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/media/pci/cx18/extr_cx18-alsa.h_snd_cx18_lock.c'
source_filename = "AnghaBench/linux/drivers/media/pci/cx18/extr_cx18-alsa.h_snd_cx18_lock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @snd_cx18_lock], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @snd_cx18_lock(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call ptr @to_cx18(i32 noundef %2) #2
%4 = tail call i32 @mutex_lock(ptr noundef %3) #2
ret void
}
declare ptr @to_cx18(i32 noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_cx18_card", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_media_pci_cx18_extr_cx18-alsa.h_snd_cx18_lock
|
; ModuleID = 'AnghaBench/sumatrapdf/ext/lcms2/utils/samples/extr_mktiff8.c_CreateStep.c'
source_filename = "AnghaBench/sumatrapdf/ext/lcms2/utils/samples/extr_mktiff8.c_CreateStep.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @CreateStep], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @CreateStep() #0 {
%1 = tail call ptr @calloc(i32 noundef 4096, i32 noundef 8) #3
%2 = icmp eq ptr %1, null
br i1 %2, label %18, label %3
3: ; preds = %0, %3
%4 = phi i64 [ %13, %3 ], [ 0, %0 ]
%5 = trunc i64 %4 to i32
%6 = sitofp i32 %5 to double
%7 = fmul double %6, 2.550000e+02
%8 = fdiv double %7, 4.095000e+03
%9 = tail call double @DecodeAbTIFF(double noundef %8) #3
%10 = tail call double @llvm.fmuladd.f64(double %9, double 2.570000e+02, double 5.000000e-01)
%11 = tail call i64 @floor(double noundef %10) #3
%12 = getelementptr inbounds i64, ptr %1, i64 %4
store i64 %11, ptr %12, align 8, !tbaa !5
%13 = add nuw nsw i64 %4, 1
%14 = icmp eq i64 %13, 4096
br i1 %14, label %15, label %3, !llvm.loop !9
15: ; preds = %3
%16 = tail call ptr @cmsBuildTabulatedToneCurve16(i32 noundef 0, i32 noundef 4096, ptr noundef nonnull %1) #3
%17 = tail call i32 @free(ptr noundef nonnull %1) #3
br label %18
18: ; preds = %0, %15
%19 = phi ptr [ %16, %15 ], [ null, %0 ]
ret ptr %19
}
declare ptr @calloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare double @DecodeAbTIFF(double noundef) local_unnamed_addr #1
declare i64 @floor(double noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2
declare ptr @cmsBuildTabulatedToneCurve16(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/sumatrapdf/ext/lcms2/utils/samples/extr_mktiff8.c_CreateStep.c'
source_filename = "AnghaBench/sumatrapdf/ext/lcms2/utils/samples/extr_mktiff8.c_CreateStep.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @CreateStep], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @CreateStep() #0 {
%1 = tail call ptr @calloc(i32 noundef 4096, i32 noundef 8) #3
%2 = icmp eq ptr %1, null
br i1 %2, label %18, label %3
3: ; preds = %0, %3
%4 = phi i64 [ %13, %3 ], [ 0, %0 ]
%5 = trunc i64 %4 to i32
%6 = mul i32 %5, 255
%7 = uitofp nneg i32 %6 to double
%8 = fdiv double %7, 4.095000e+03
%9 = tail call double @DecodeAbTIFF(double noundef %8) #3
%10 = tail call double @llvm.fmuladd.f64(double %9, double 2.570000e+02, double 5.000000e-01)
%11 = tail call i64 @floor(double noundef %10) #3
%12 = getelementptr inbounds i64, ptr %1, i64 %4
store i64 %11, ptr %12, align 8, !tbaa !6
%13 = add nuw nsw i64 %4, 1
%14 = icmp eq i64 %13, 4096
br i1 %14, label %15, label %3, !llvm.loop !10
15: ; preds = %3
%16 = tail call ptr @cmsBuildTabulatedToneCurve16(i32 noundef 0, i32 noundef 4096, ptr noundef nonnull %1) #3
%17 = tail call i32 @free(ptr noundef nonnull %1) #3
br label %18
18: ; preds = %0, %15
%19 = phi ptr [ %16, %15 ], [ null, %0 ]
ret ptr %19
}
declare ptr @calloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare double @DecodeAbTIFF(double noundef) local_unnamed_addr #1
declare i64 @floor(double noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2
declare ptr @cmsBuildTabulatedToneCurve16(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
|
sumatrapdf_ext_lcms2_utils_samples_extr_mktiff8.c_CreateStep
|
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/i40iw/extr_i40iw_utils.c_i40iw_cqp_generic_worker.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/i40iw/extr_i40iw_utils.c_i40iw_cqp_generic_worker.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.i40iw_virtchnl_work_info = type { i64, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @i40iw_cqp_generic_worker], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @i40iw_cqp_generic_worker(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.i40iw_virtchnl_work_info, ptr %0, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = tail call i32 %6(i64 noundef %2) #1
br label %8
8: ; preds = %4, %1
ret void
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"i40iw_virtchnl_work_info", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/i40iw/extr_i40iw_utils.c_i40iw_cqp_generic_worker.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/i40iw/extr_i40iw_utils.c_i40iw_cqp_generic_worker.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @i40iw_cqp_generic_worker], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @i40iw_cqp_generic_worker(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = tail call i32 %6(i64 noundef %2) #1
br label %8
8: ; preds = %4, %1
ret void
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"i40iw_virtchnl_work_info", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
|
linux_drivers_infiniband_hw_i40iw_extr_i40iw_utils.c_i40iw_cqp_generic_worker
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/marvell/libertas/extr_cmd.c_lbs_get_channel.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/marvell/libertas/extr_cmd.c_lbs_get_channel.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cmd_ds_802_11_rf_channel = type { i32, ptr, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { ptr }
@CMD_OPT_802_11_RF_CHANNEL_GET = dso_local local_unnamed_addr global i32 0, align 4
@CMD_802_11_RF_CHANNEL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [29 x i8] c"current radio channel is %d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @lbs_get_channel], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @lbs_get_channel(ptr noundef %0) #0 {
%2 = alloca %struct.cmd_ds_802_11_rf_channel, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3
%3 = call i32 @memset(ptr noundef nonnull %2, i32 noundef 0, i32 noundef 24) #3
%4 = call ptr @cpu_to_le16(i32 noundef 24) #3
%5 = getelementptr inbounds %struct.cmd_ds_802_11_rf_channel, ptr %2, i64 0, i32 2
store ptr %4, ptr %5, align 8, !tbaa !5
%6 = load i32, ptr @CMD_OPT_802_11_RF_CHANNEL_GET, align 4, !tbaa !12
%7 = call ptr @cpu_to_le16(i32 noundef %6) #3
%8 = getelementptr inbounds %struct.cmd_ds_802_11_rf_channel, ptr %2, i64 0, i32 1
store ptr %7, ptr %8, align 8, !tbaa !13
%9 = load i32, ptr @CMD_802_11_RF_CHANNEL, align 4, !tbaa !12
%10 = call i32 @lbs_cmd_with_response(ptr noundef %0, i32 noundef %9, ptr noundef nonnull %2) #3
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %1
%13 = load i32, ptr %2, align 8, !tbaa !14
%14 = call i32 @le16_to_cpu(i32 noundef %13) #3
%15 = call i32 @lbs_deb_cmd(ptr noundef nonnull @.str, i32 noundef %14) #3
br label %16
16: ; preds = %1, %12
%17 = phi i32 [ %10, %1 ], [ %14, %12 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3
ret i32 %17
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_le16(i32 noundef) local_unnamed_addr #2
declare i32 @lbs_cmd_with_response(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @lbs_deb_cmd(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"cmd_ds_802_11_rf_channel", !7, i64 0, !10, i64 8, !11, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"TYPE_2__", !10, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !10, i64 8}
!14 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/marvell/libertas/extr_cmd.c_lbs_get_channel.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/marvell/libertas/extr_cmd.c_lbs_get_channel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.cmd_ds_802_11_rf_channel = type { i32, ptr, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { ptr }
@CMD_OPT_802_11_RF_CHANNEL_GET = common local_unnamed_addr global i32 0, align 4
@CMD_802_11_RF_CHANNEL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [29 x i8] c"current radio channel is %d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @lbs_get_channel], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @lbs_get_channel(ptr noundef %0) #0 {
%2 = alloca %struct.cmd_ds_802_11_rf_channel, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3
%3 = call i32 @memset(ptr noundef nonnull %2, i32 noundef 0, i32 noundef 24) #3
%4 = call ptr @cpu_to_le16(i32 noundef 24) #3
%5 = getelementptr inbounds i8, ptr %2, i64 16
store ptr %4, ptr %5, align 8, !tbaa !6
%6 = load i32, ptr @CMD_OPT_802_11_RF_CHANNEL_GET, align 4, !tbaa !13
%7 = call ptr @cpu_to_le16(i32 noundef %6) #3
%8 = getelementptr inbounds i8, ptr %2, i64 8
store ptr %7, ptr %8, align 8, !tbaa !14
%9 = load i32, ptr @CMD_802_11_RF_CHANNEL, align 4, !tbaa !13
%10 = call i32 @lbs_cmd_with_response(ptr noundef %0, i32 noundef %9, ptr noundef nonnull %2) #3
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %1
%13 = load i32, ptr %2, align 8, !tbaa !15
%14 = call i32 @le16_to_cpu(i32 noundef %13) #3
%15 = call i32 @lbs_deb_cmd(ptr noundef nonnull @.str, i32 noundef %14) #3
br label %16
16: ; preds = %1, %12
%17 = phi i32 [ %10, %1 ], [ %14, %12 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3
ret i32 %17
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_le16(i32 noundef) local_unnamed_addr #2
declare i32 @lbs_cmd_with_response(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @lbs_deb_cmd(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"cmd_ds_802_11_rf_channel", !8, i64 0, !11, i64 8, !12, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"TYPE_2__", !11, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !11, i64 8}
!15 = !{!7, !8, i64 0}
|
linux_drivers_net_wireless_marvell_libertas_extr_cmd.c_lbs_get_channel
|
; ModuleID = 'AnghaBench/linux/arch/arm64/kernel/extr_signal.c_setup_restart_syscall.c'
source_filename = "AnghaBench/linux/arch/arm64/kernel/extr_signal.c_setup_restart_syscall.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@__NR_restart_syscall = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @setup_restart_syscall], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @setup_restart_syscall(ptr noundef %0) #0 {
%2 = tail call i64 (...) @is_compat_task() #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @compat_setup_restart_syscall(ptr noundef %0) #2
br label %10
6: ; preds = %1
%7 = load i32, ptr @__NR_restart_syscall, align 4, !tbaa !5
%8 = load ptr, ptr %0, align 8, !tbaa !9
%9 = getelementptr inbounds i32, ptr %8, i64 8
store i32 %7, ptr %9, align 4, !tbaa !5
br label %10
10: ; preds = %6, %4
ret void
}
declare i64 @is_compat_task(...) local_unnamed_addr #1
declare i32 @compat_setup_restart_syscall(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"pt_regs", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/arch/arm64/kernel/extr_signal.c_setup_restart_syscall.c'
source_filename = "AnghaBench/linux/arch/arm64/kernel/extr_signal.c_setup_restart_syscall.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@__NR_restart_syscall = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @setup_restart_syscall], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @setup_restart_syscall(ptr noundef %0) #0 {
%2 = tail call i64 @is_compat_task() #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @compat_setup_restart_syscall(ptr noundef %0) #2
br label %10
6: ; preds = %1
%7 = load i32, ptr @__NR_restart_syscall, align 4, !tbaa !6
%8 = load ptr, ptr %0, align 8, !tbaa !10
%9 = getelementptr inbounds i8, ptr %8, i64 32
store i32 %7, ptr %9, align 4, !tbaa !6
br label %10
10: ; preds = %6, %4
ret void
}
declare i64 @is_compat_task(...) local_unnamed_addr #1
declare i32 @compat_setup_restart_syscall(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"pt_regs", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
|
linux_arch_arm64_kernel_extr_signal.c_setup_restart_syscall
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_de600.c_de600_read_byte.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_de600.c_de600_read_byte.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DATA_PORT = dso_local local_unnamed_addr global i32 0, align 4
@STATUS_PORT = dso_local local_unnamed_addr global i32 0, align 4
@HI_NIBBLE = dso_local local_unnamed_addr global i8 0, align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @de600_read_byte], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal zeroext i8 @de600_read_byte(i8 noundef zeroext %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @DATA_PORT, align 4, !tbaa !5
%4 = tail call i32 @outb_p(i8 noundef zeroext %0, i32 noundef %3) #2
%5 = load i32, ptr @STATUS_PORT, align 4, !tbaa !5
%6 = tail call i64 @inb(i32 noundef %5) #2
%7 = trunc i64 %6 to i32
%8 = lshr i32 %7, 4
%9 = load i8, ptr @HI_NIBBLE, align 1, !tbaa !9
%10 = or i8 %9, %0
%11 = load i32, ptr @DATA_PORT, align 4, !tbaa !5
%12 = tail call i32 @outb_p(i8 noundef zeroext %10, i32 noundef %11) #2
%13 = load i32, ptr @STATUS_PORT, align 4, !tbaa !5
%14 = tail call i64 @inb(i32 noundef %13) #2
%15 = trunc i64 %14 to i32
%16 = and i32 %15, 240
%17 = and i32 %8, 15
%18 = or disjoint i32 %16, %17
%19 = trunc i32 %18 to i8
ret i8 %19
}
declare i32 @outb_p(i8 noundef zeroext, i32 noundef) local_unnamed_addr #1
declare i64 @inb(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_de600.c_de600_read_byte.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_de600.c_de600_read_byte.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DATA_PORT = common local_unnamed_addr global i32 0, align 4
@STATUS_PORT = common local_unnamed_addr global i32 0, align 4
@HI_NIBBLE = common local_unnamed_addr global i8 0, align 1
@llvm.used = appending global [1 x ptr] [ptr @de600_read_byte], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal zeroext i8 @de600_read_byte(i8 noundef zeroext %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @DATA_PORT, align 4, !tbaa !6
%4 = tail call i32 @outb_p(i8 noundef zeroext %0, i32 noundef %3) #2
%5 = load i32, ptr @STATUS_PORT, align 4, !tbaa !6
%6 = tail call i64 @inb(i32 noundef %5) #2
%7 = trunc i64 %6 to i32
%8 = lshr i32 %7, 4
%9 = load i8, ptr @HI_NIBBLE, align 1, !tbaa !10
%10 = or i8 %9, %0
%11 = load i32, ptr @DATA_PORT, align 4, !tbaa !6
%12 = tail call i32 @outb_p(i8 noundef zeroext %10, i32 noundef %11) #2
%13 = load i32, ptr @STATUS_PORT, align 4, !tbaa !6
%14 = tail call i64 @inb(i32 noundef %13) #2
%15 = trunc i64 %14 to i32
%16 = and i32 %15, 240
%17 = and i32 %8, 15
%18 = or disjoint i32 %16, %17
%19 = trunc nuw i32 %18 to i8
ret i8 %19
}
declare i32 @outb_p(i8 noundef zeroext, i32 noundef) local_unnamed_addr #1
declare i64 @inb(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
|
fastsocket_kernel_drivers_net_extr_de600.c_de600_read_byte
|
; ModuleID = 'AnghaBench/freebsd/sys/vm/extr_vm_map.c_vm_map_wait_busy.c'
source_filename = "AnghaBench/freebsd/sys/vm/extr_vm_map.c_vm_map_wait_busy.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32, i64, i32, i64 }
@MAP_BUSY_WAKEUP = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"mbusy\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @vm_map_wait_busy(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @VM_MAP_ASSERT_LOCKED(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %22, label %6
6: ; preds = %1
%7 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 4
%8 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 3
%9 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
br label %10
10: ; preds = %6, %19
%11 = load i32, ptr @MAP_BUSY_WAKEUP, align 4, !tbaa !11
%12 = tail call i32 @vm_map_modflags(ptr noundef nonnull %0, i32 noundef %11, i32 noundef 0) #2
%13 = load i64, ptr %7, align 8, !tbaa !12
%14 = icmp eq i64 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %10
%16 = tail call i32 @msleep(ptr noundef nonnull %3, ptr noundef nonnull %8, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef 0) #2
br label %19
17: ; preds = %10
%18 = tail call i32 @sx_sleep(ptr noundef nonnull %3, ptr noundef nonnull %9, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef 0) #2
br label %19
19: ; preds = %17, %15
%20 = load i64, ptr %3, align 8, !tbaa !5
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %10, !llvm.loop !13
22: ; preds = %19, %1
%23 = load i32, ptr %0, align 8, !tbaa !15
%24 = add nsw i32 %23, 1
store i32 %24, ptr %0, align 8, !tbaa !15
ret void
}
declare i32 @VM_MAP_ASSERT_LOCKED(ptr noundef) local_unnamed_addr #1
declare i32 @vm_map_modflags(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @msleep(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sx_sleep(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 24}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/vm/extr_vm_map.c_vm_map_wait_busy.c'
source_filename = "AnghaBench/freebsd/sys/vm/extr_vm_map.c_vm_map_wait_busy.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAP_BUSY_WAKEUP = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"mbusy\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @vm_map_wait_busy(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @VM_MAP_ASSERT_LOCKED(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %22, label %6
6: ; preds = %1
%7 = getelementptr inbounds i8, ptr %0, i64 24
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = getelementptr inbounds i8, ptr %0, i64 4
br label %10
10: ; preds = %6, %19
%11 = load i32, ptr @MAP_BUSY_WAKEUP, align 4, !tbaa !12
%12 = tail call i32 @vm_map_modflags(ptr noundef nonnull %0, i32 noundef %11, i32 noundef 0) #2
%13 = load i64, ptr %7, align 8, !tbaa !13
%14 = icmp eq i64 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %10
%16 = tail call i32 @msleep(ptr noundef nonnull %3, ptr noundef nonnull %8, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef 0) #2
br label %19
17: ; preds = %10
%18 = tail call i32 @sx_sleep(ptr noundef nonnull %3, ptr noundef nonnull %9, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef 0) #2
br label %19
19: ; preds = %17, %15
%20 = load i64, ptr %3, align 8, !tbaa !6
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %10, !llvm.loop !14
22: ; preds = %19, %1
%23 = load i32, ptr %0, align 8, !tbaa !16
%24 = add nsw i32 %23, 1
store i32 %24, ptr %0, align 8, !tbaa !16
ret void
}
declare i32 @VM_MAP_ASSERT_LOCKED(ptr noundef) local_unnamed_addr #1
declare i32 @vm_map_modflags(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @msleep(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sx_sleep(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_5__", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16, !11, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 24}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!7, !8, i64 0}
|
freebsd_sys_vm_extr_vm_map.c_vm_map_wait_busy
|
; ModuleID = 'AnghaBench/tengine/src/http/modules/extr_ngx_http_rewrite_module.c_ngx_http_rewrite_handler.c'
source_filename = "AnghaBench/tengine/src/http/modules/extr_ngx_http_rewrite_module.c_ngx_http_rewrite_handler.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_22__ = type { i64, i64, i32 }
%struct.TYPE_21__ = type { i32, i32, ptr }
%struct.TYPE_20__ = type { i32, i64, i64, i32, ptr, ptr }
@ngx_http_core_module = dso_local local_unnamed_addr global i32 0, align 4
@NGX_DECLINED = dso_local local_unnamed_addr global i64 0, align 8
@ngx_http_rewrite_module = dso_local local_unnamed_addr global i32 0, align 4
@NGX_HTTP_INTERNAL_SERVER_ERROR = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @ngx_http_rewrite_handler], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @ngx_http_rewrite_handler(ptr noundef %0) #0 {
%2 = load i32, ptr @ngx_http_core_module, align 4, !tbaa !5
%3 = tail call ptr @ngx_http_get_module_main_conf(ptr noundef %0, i32 noundef %2) #2
%4 = load i32, ptr @ngx_http_core_module, align 4, !tbaa !5
%5 = tail call ptr @ngx_http_get_module_srv_conf(ptr noundef %0, i32 noundef %4) #2
%6 = load i64, ptr %3, align 8, !tbaa !9
%7 = load i64, ptr %0, align 8, !tbaa !13
%8 = icmp eq i64 %7, %6
br i1 %8, label %9, label %15
9: ; preds = %1
%10 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 1
%11 = load i64, ptr %10, align 8, !tbaa !15
%12 = load ptr, ptr %5, align 8, !tbaa !16
%13 = load i64, ptr %12, align 8, !tbaa !19
%14 = icmp eq i64 %11, %13
br i1 %14, label %54, label %15
15: ; preds = %9, %1
%16 = load i32, ptr @ngx_http_rewrite_module, align 4, !tbaa !5
%17 = tail call ptr @ngx_http_get_module_loc_conf(ptr noundef nonnull %0, i32 noundef %16) #2
%18 = getelementptr inbounds %struct.TYPE_21__, ptr %17, i64 0, i32 2
%19 = load ptr, ptr %18, align 8, !tbaa !21
%20 = icmp eq ptr %19, null
br i1 %20, label %54, label %21
21: ; preds = %15
%22 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 2
%23 = load i32, ptr %22, align 8, !tbaa !23
%24 = tail call ptr @ngx_pcalloc(i32 noundef %23, i32 noundef 48) #2
%25 = icmp eq ptr %24, null
br i1 %25, label %54, label %26
26: ; preds = %21
%27 = load i32, ptr %22, align 8, !tbaa !23
%28 = load i32, ptr %17, align 8, !tbaa !24
%29 = shl i32 %28, 2
%30 = tail call ptr @ngx_pcalloc(i32 noundef %27, i32 noundef %29) #2
%31 = getelementptr inbounds %struct.TYPE_20__, ptr %24, i64 0, i32 5
store ptr %30, ptr %31, align 8, !tbaa !25
%32 = icmp eq ptr %30, null
br i1 %32, label %54, label %33
33: ; preds = %26
%34 = load ptr, ptr %18, align 8, !tbaa !21
%35 = load i64, ptr %34, align 8, !tbaa !27
%36 = getelementptr inbounds %struct.TYPE_20__, ptr %24, i64 0, i32 2
store i64 %35, ptr %36, align 8, !tbaa !29
%37 = getelementptr inbounds %struct.TYPE_20__, ptr %24, i64 0, i32 4
store ptr %0, ptr %37, align 8, !tbaa !30
store i32 1, ptr %24, align 8, !tbaa !31
%38 = getelementptr inbounds %struct.TYPE_21__, ptr %17, i64 0, i32 1
%39 = load i32, ptr %38, align 4, !tbaa !32
%40 = getelementptr inbounds %struct.TYPE_20__, ptr %24, i64 0, i32 3
store i32 %39, ptr %40, align 8, !tbaa !33
%41 = load i64, ptr @NGX_DECLINED, align 8, !tbaa !34
%42 = getelementptr inbounds %struct.TYPE_20__, ptr %24, i64 0, i32 1
store i64 %41, ptr %42, align 8, !tbaa !35
%43 = inttoptr i64 %35 to ptr
%44 = load i64, ptr %43, align 8
%45 = icmp eq i64 %44, 0
br i1 %45, label %54, label %46
46: ; preds = %33, %46
%47 = phi i64 [ %52, %46 ], [ %44, %33 ]
%48 = inttoptr i64 %47 to ptr
%49 = tail call i32 %48(ptr noundef nonnull %24) #2
%50 = load i64, ptr %36, align 8, !tbaa !29
%51 = inttoptr i64 %50 to ptr
%52 = load i64, ptr %51, align 8
%53 = icmp eq i64 %52, 0
br i1 %53, label %54, label %46, !llvm.loop !36
54: ; preds = %46, %33, %26, %21, %15, %9
%55 = phi ptr [ @NGX_DECLINED, %9 ], [ @NGX_DECLINED, %15 ], [ @NGX_HTTP_INTERNAL_SERVER_ERROR, %21 ], [ @NGX_HTTP_INTERNAL_SERVER_ERROR, %26 ], [ %42, %33 ], [ %42, %46 ]
%56 = load i64, ptr %55, align 8, !tbaa !34
ret i64 %56
}
declare ptr @ngx_http_get_module_main_conf(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ngx_http_get_module_srv_conf(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ngx_http_get_module_loc_conf(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ngx_pcalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 0}
!10 = !{!"TYPE_24__", !11, i64 0}
!11 = !{!"TYPE_17__", !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_22__", !12, i64 0, !12, i64 8, !6, i64 16}
!15 = !{!14, !12, i64 8}
!16 = !{!17, !18, i64 0}
!17 = !{!"TYPE_23__", !18, i64 0}
!18 = !{!"any pointer", !7, i64 0}
!19 = !{!20, !12, i64 0}
!20 = !{!"TYPE_18__", !12, i64 0}
!21 = !{!22, !18, i64 8}
!22 = !{!"TYPE_21__", !6, i64 0, !6, i64 4, !18, i64 8}
!23 = !{!14, !6, i64 16}
!24 = !{!22, !6, i64 0}
!25 = !{!26, !18, i64 40}
!26 = !{!"TYPE_20__", !6, i64 0, !12, i64 8, !12, i64 16, !6, i64 24, !18, i64 32, !18, i64 40}
!27 = !{!28, !12, i64 0}
!28 = !{!"TYPE_19__", !12, i64 0}
!29 = !{!26, !12, i64 16}
!30 = !{!26, !18, i64 32}
!31 = !{!26, !6, i64 0}
!32 = !{!22, !6, i64 4}
!33 = !{!26, !6, i64 24}
!34 = !{!12, !12, i64 0}
!35 = !{!26, !12, i64 8}
!36 = distinct !{!36, !37}
!37 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/tengine/src/http/modules/extr_ngx_http_rewrite_module.c_ngx_http_rewrite_handler.c'
source_filename = "AnghaBench/tengine/src/http/modules/extr_ngx_http_rewrite_module.c_ngx_http_rewrite_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ngx_http_core_module = common local_unnamed_addr global i32 0, align 4
@NGX_DECLINED = common local_unnamed_addr global i64 0, align 8
@ngx_http_rewrite_module = common local_unnamed_addr global i32 0, align 4
@NGX_HTTP_INTERNAL_SERVER_ERROR = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @ngx_http_rewrite_handler], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @ngx_http_rewrite_handler(ptr noundef %0) #0 {
%2 = load i32, ptr @ngx_http_core_module, align 4, !tbaa !6
%3 = tail call ptr @ngx_http_get_module_main_conf(ptr noundef %0, i32 noundef %2) #2
%4 = load i32, ptr @ngx_http_core_module, align 4, !tbaa !6
%5 = tail call ptr @ngx_http_get_module_srv_conf(ptr noundef %0, i32 noundef %4) #2
%6 = load i64, ptr %3, align 8, !tbaa !10
%7 = load i64, ptr %0, align 8, !tbaa !14
%8 = icmp eq i64 %7, %6
br i1 %8, label %9, label %15
9: ; preds = %1
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load i64, ptr %10, align 8, !tbaa !16
%12 = load ptr, ptr %5, align 8, !tbaa !17
%13 = load i64, ptr %12, align 8, !tbaa !20
%14 = icmp eq i64 %11, %13
br i1 %14, label %54, label %15
15: ; preds = %9, %1
%16 = load i32, ptr @ngx_http_rewrite_module, align 4, !tbaa !6
%17 = tail call ptr @ngx_http_get_module_loc_conf(ptr noundef nonnull %0, i32 noundef %16) #2
%18 = getelementptr inbounds i8, ptr %17, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !22
%20 = icmp eq ptr %19, null
br i1 %20, label %54, label %21
21: ; preds = %15
%22 = getelementptr inbounds i8, ptr %0, i64 16
%23 = load i32, ptr %22, align 8, !tbaa !24
%24 = tail call ptr @ngx_pcalloc(i32 noundef %23, i32 noundef 48) #2
%25 = icmp eq ptr %24, null
br i1 %25, label %54, label %26
26: ; preds = %21
%27 = load i32, ptr %22, align 8, !tbaa !24
%28 = load i32, ptr %17, align 8, !tbaa !25
%29 = shl i32 %28, 2
%30 = tail call ptr @ngx_pcalloc(i32 noundef %27, i32 noundef %29) #2
%31 = getelementptr inbounds i8, ptr %24, i64 40
store ptr %30, ptr %31, align 8, !tbaa !26
%32 = icmp eq ptr %30, null
br i1 %32, label %54, label %33
33: ; preds = %26
%34 = load ptr, ptr %18, align 8, !tbaa !22
%35 = load i64, ptr %34, align 8, !tbaa !28
%36 = getelementptr inbounds i8, ptr %24, i64 16
store i64 %35, ptr %36, align 8, !tbaa !30
%37 = getelementptr inbounds i8, ptr %24, i64 32
store ptr %0, ptr %37, align 8, !tbaa !31
store i32 1, ptr %24, align 8, !tbaa !32
%38 = getelementptr inbounds i8, ptr %17, i64 4
%39 = load i32, ptr %38, align 4, !tbaa !33
%40 = getelementptr inbounds i8, ptr %24, i64 24
store i32 %39, ptr %40, align 8, !tbaa !34
%41 = load i64, ptr @NGX_DECLINED, align 8, !tbaa !35
%42 = getelementptr inbounds i8, ptr %24, i64 8
store i64 %41, ptr %42, align 8, !tbaa !36
%43 = inttoptr i64 %35 to ptr
%44 = load i64, ptr %43, align 8
%45 = icmp eq i64 %44, 0
br i1 %45, label %54, label %46
46: ; preds = %33, %46
%47 = phi i64 [ %52, %46 ], [ %44, %33 ]
%48 = inttoptr i64 %47 to ptr
%49 = tail call i32 %48(ptr noundef nonnull %24) #2
%50 = load i64, ptr %36, align 8, !tbaa !30
%51 = inttoptr i64 %50 to ptr
%52 = load i64, ptr %51, align 8
%53 = icmp eq i64 %52, 0
br i1 %53, label %54, label %46, !llvm.loop !37
54: ; preds = %46, %33, %26, %21, %15, %9
%55 = phi ptr [ @NGX_DECLINED, %9 ], [ @NGX_DECLINED, %15 ], [ @NGX_HTTP_INTERNAL_SERVER_ERROR, %21 ], [ @NGX_HTTP_INTERNAL_SERVER_ERROR, %26 ], [ %42, %33 ], [ %42, %46 ]
%56 = load i64, ptr %55, align 8, !tbaa !35
ret i64 %56
}
declare ptr @ngx_http_get_module_main_conf(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ngx_http_get_module_srv_conf(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ngx_http_get_module_loc_conf(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ngx_pcalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"TYPE_24__", !12, i64 0}
!12 = !{!"TYPE_17__", !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_22__", !13, i64 0, !13, i64 8, !7, i64 16}
!16 = !{!15, !13, i64 8}
!17 = !{!18, !19, i64 0}
!18 = !{!"TYPE_23__", !19, i64 0}
!19 = !{!"any pointer", !8, i64 0}
!20 = !{!21, !13, i64 0}
!21 = !{!"TYPE_18__", !13, i64 0}
!22 = !{!23, !19, i64 8}
!23 = !{!"TYPE_21__", !7, i64 0, !7, i64 4, !19, i64 8}
!24 = !{!15, !7, i64 16}
!25 = !{!23, !7, i64 0}
!26 = !{!27, !19, i64 40}
!27 = !{!"TYPE_20__", !7, i64 0, !13, i64 8, !13, i64 16, !7, i64 24, !19, i64 32, !19, i64 40}
!28 = !{!29, !13, i64 0}
!29 = !{!"TYPE_19__", !13, i64 0}
!30 = !{!27, !13, i64 16}
!31 = !{!27, !19, i64 32}
!32 = !{!27, !7, i64 0}
!33 = !{!23, !7, i64 4}
!34 = !{!27, !7, i64 24}
!35 = !{!13, !13, i64 0}
!36 = !{!27, !13, i64 8}
!37 = distinct !{!37, !38}
!38 = !{!"llvm.loop.mustprogress"}
|
tengine_src_http_modules_extr_ngx_http_rewrite_module.c_ngx_http_rewrite_handler
|
; ModuleID = 'AnghaBench/kphp-kdb/copyfast/extr_copyfast-engine-data.c_delete_dead_connections.c'
source_filename = "AnghaBench/kphp-kdb/copyfast/extr_copyfast-engine-data.c_delete_dead_connections.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_10__ = type { ptr }
%struct.relative = type { i32, ptr, ptr }
%struct.TYPE_9__ = type { i32, %struct.TYPE_7__ }
%struct.TYPE_7__ = type { %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i64, ptr }
%struct.TYPE_8__ = type { i64, i64 }
@RELATIVES = dso_local local_unnamed_addr global %struct.TYPE_10__ zeroinitializer, align 8
@cr_ok = dso_local local_unnamed_addr global i64 0, align 8
@IDLE_LIMIT = dso_local local_unnamed_addr global i64 0, align 8
@precise_now = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @delete_dead_connections() local_unnamed_addr #0 {
%1 = load ptr, ptr @RELATIVES, align 8, !tbaa !5
%2 = load i32, ptr %1, align 8, !tbaa !10
%3 = icmp eq i32 %2, -1
br i1 %3, label %39, label %4
4: ; preds = %0, %36
%5 = phi ptr [ %7, %36 ], [ %1, %0 ]
%6 = getelementptr inbounds %struct.relative, ptr %5, i64 0, i32 2
%7 = load ptr, ptr %6, align 8, !tbaa !13
%8 = getelementptr inbounds %struct.relative, ptr %7, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !14
%10 = load i32, ptr %9, align 8, !tbaa !15
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %36
12: ; preds = %4
%13 = getelementptr inbounds %struct.TYPE_9__, ptr %9, i64 0, i32 1
%14 = getelementptr inbounds %struct.TYPE_9__, ptr %9, i64 0, i32 1, i32 0, i32 1
%15 = load ptr, ptr %14, align 8, !tbaa !20
%16 = load i64, ptr %15, align 8, !tbaa !21
%17 = load i64, ptr %13, align 8, !tbaa !23
%18 = icmp eq i64 %16, %17
br i1 %18, label %19, label %33
19: ; preds = %12
%20 = tail call i64 @server_check_ready(ptr noundef nonnull %15) #2
%21 = load i64, ptr @cr_ok, align 8, !tbaa !24
%22 = icmp eq i64 %20, %21
%23 = load ptr, ptr %8, align 8, !tbaa !14
br i1 %22, label %24, label %33
24: ; preds = %19
%25 = getelementptr inbounds %struct.TYPE_9__, ptr %23, i64 0, i32 1, i32 0, i32 1
%26 = load ptr, ptr %25, align 8, !tbaa !20
%27 = getelementptr inbounds %struct.TYPE_8__, ptr %26, i64 0, i32 1
%28 = load i64, ptr %27, align 8, !tbaa !25
%29 = load i64, ptr @IDLE_LIMIT, align 8, !tbaa !24
%30 = add nsw i64 %29, %28
%31 = load i64, ptr @precise_now, align 8, !tbaa !24
%32 = icmp slt i64 %30, %31
br i1 %32, label %33, label %36
33: ; preds = %24, %19, %12
%34 = phi ptr [ %23, %24 ], [ %23, %19 ], [ %9, %12 ]
%35 = tail call i32 @delete_relative(ptr noundef %34, i32 noundef 1) #2
br label %36
36: ; preds = %24, %33, %4
%37 = load i32, ptr %7, align 8, !tbaa !10
%38 = icmp eq i32 %37, -1
br i1 %38, label %39, label %4, !llvm.loop !26
39: ; preds = %36, %0
ret void
}
declare i64 @server_check_ready(ptr noundef) local_unnamed_addr #1
declare i32 @delete_relative(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_10__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"relative", !12, i64 0, !7, i64 8, !7, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !7, i64 16}
!14 = !{!11, !7, i64 8}
!15 = !{!16, !12, i64 0}
!16 = !{!"TYPE_9__", !12, i64 0, !17, i64 8}
!17 = !{!"TYPE_7__", !18, i64 0}
!18 = !{!"TYPE_6__", !19, i64 0, !7, i64 8}
!19 = !{!"long", !8, i64 0}
!20 = !{!16, !7, i64 16}
!21 = !{!22, !19, i64 0}
!22 = !{!"TYPE_8__", !19, i64 0, !19, i64 8}
!23 = !{!16, !19, i64 8}
!24 = !{!19, !19, i64 0}
!25 = !{!22, !19, i64 8}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/kphp-kdb/copyfast/extr_copyfast-engine-data.c_delete_dead_connections.c'
source_filename = "AnghaBench/kphp-kdb/copyfast/extr_copyfast-engine-data.c_delete_dead_connections.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_10__ = type { ptr }
@RELATIVES = common local_unnamed_addr global %struct.TYPE_10__ zeroinitializer, align 8
@cr_ok = common local_unnamed_addr global i64 0, align 8
@IDLE_LIMIT = common local_unnamed_addr global i64 0, align 8
@precise_now = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @delete_dead_connections() local_unnamed_addr #0 {
%1 = load ptr, ptr @RELATIVES, align 8, !tbaa !6
%2 = load i32, ptr %1, align 8, !tbaa !11
%3 = icmp eq i32 %2, -1
br i1 %3, label %39, label %4
4: ; preds = %0, %36
%5 = phi ptr [ %7, %36 ], [ %1, %0 ]
%6 = getelementptr inbounds i8, ptr %5, i64 16
%7 = load ptr, ptr %6, align 8, !tbaa !14
%8 = getelementptr inbounds i8, ptr %7, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !15
%10 = load i32, ptr %9, align 8, !tbaa !16
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %36
12: ; preds = %4
%13 = getelementptr inbounds i8, ptr %9, i64 8
%14 = getelementptr inbounds i8, ptr %9, i64 16
%15 = load ptr, ptr %14, align 8, !tbaa !21
%16 = load i64, ptr %15, align 8, !tbaa !22
%17 = load i64, ptr %13, align 8, !tbaa !24
%18 = icmp eq i64 %16, %17
br i1 %18, label %19, label %33
19: ; preds = %12
%20 = tail call i64 @server_check_ready(ptr noundef nonnull %15) #2
%21 = load i64, ptr @cr_ok, align 8, !tbaa !25
%22 = icmp eq i64 %20, %21
%23 = load ptr, ptr %8, align 8, !tbaa !15
br i1 %22, label %24, label %33
24: ; preds = %19
%25 = getelementptr inbounds i8, ptr %23, i64 16
%26 = load ptr, ptr %25, align 8, !tbaa !21
%27 = getelementptr inbounds i8, ptr %26, i64 8
%28 = load i64, ptr %27, align 8, !tbaa !26
%29 = load i64, ptr @IDLE_LIMIT, align 8, !tbaa !25
%30 = add nsw i64 %29, %28
%31 = load i64, ptr @precise_now, align 8, !tbaa !25
%32 = icmp slt i64 %30, %31
br i1 %32, label %33, label %36
33: ; preds = %24, %19, %12
%34 = phi ptr [ %23, %24 ], [ %23, %19 ], [ %9, %12 ]
%35 = tail call i32 @delete_relative(ptr noundef %34, i32 noundef 1) #2
br label %36
36: ; preds = %24, %33, %4
%37 = load i32, ptr %7, align 8, !tbaa !11
%38 = icmp eq i32 %37, -1
br i1 %38, label %39, label %4, !llvm.loop !27
39: ; preds = %36, %0
ret void
}
declare i64 @server_check_ready(ptr noundef) local_unnamed_addr #1
declare i32 @delete_relative(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_10__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"relative", !13, i64 0, !8, i64 8, !8, i64 16}
!13 = !{!"int", !9, i64 0}
!14 = !{!12, !8, i64 16}
!15 = !{!12, !8, i64 8}
!16 = !{!17, !13, i64 0}
!17 = !{!"TYPE_9__", !13, i64 0, !18, i64 8}
!18 = !{!"TYPE_7__", !19, i64 0}
!19 = !{!"TYPE_6__", !20, i64 0, !8, i64 8}
!20 = !{!"long", !9, i64 0}
!21 = !{!17, !8, i64 16}
!22 = !{!23, !20, i64 0}
!23 = !{!"TYPE_8__", !20, i64 0, !20, i64 8}
!24 = !{!17, !20, i64 8}
!25 = !{!20, !20, i64 0}
!26 = !{!23, !20, i64 8}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
|
kphp-kdb_copyfast_extr_copyfast-engine-data.c_delete_dead_connections
|
; ModuleID = 'AnghaBench/linux/lib/extr_xarray.c_xa_load.c'
source_filename = "AnghaBench/linux/lib/extr_xarray.c_xa_load.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@xas = dso_local global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef ptr @xa_load(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @xas, align 4, !tbaa !5
%4 = tail call i32 @XA_STATE(i32 noundef %3, ptr noundef %0, i64 noundef %1) #2
%5 = tail call i32 (...) @rcu_read_lock() #2
br label %6
6: ; preds = %6, %2
%7 = tail call ptr @xas_load(ptr noundef nonnull @xas) #2
%8 = tail call i64 @xa_is_zero(ptr noundef %7) #2
%9 = icmp eq i64 %8, 0
%10 = select i1 %9, ptr %7, ptr null
%11 = tail call i64 @xas_retry(ptr noundef nonnull @xas, ptr noundef %10) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %6, !llvm.loop !9
13: ; preds = %6
%14 = tail call i32 (...) @rcu_read_unlock() #2
ret ptr %10
}
declare i32 @XA_STATE(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @rcu_read_lock(...) local_unnamed_addr #1
declare ptr @xas_load(ptr noundef) local_unnamed_addr #1
declare i64 @xa_is_zero(ptr noundef) local_unnamed_addr #1
declare i64 @xas_retry(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rcu_read_unlock(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/lib/extr_xarray.c_xa_load.c'
source_filename = "AnghaBench/linux/lib/extr_xarray.c_xa_load.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@xas = common global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @xa_load(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @xas, align 4, !tbaa !6
%4 = tail call i32 @XA_STATE(i32 noundef %3, ptr noundef %0, i64 noundef %1) #2
%5 = tail call i32 @rcu_read_lock() #2
br label %6
6: ; preds = %6, %2
%7 = tail call ptr @xas_load(ptr noundef nonnull @xas) #2
%8 = tail call i64 @xa_is_zero(ptr noundef %7) #2
%9 = icmp eq i64 %8, 0
%10 = select i1 %9, ptr %7, ptr null
%11 = tail call i64 @xas_retry(ptr noundef nonnull @xas, ptr noundef %10) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %6, !llvm.loop !10
13: ; preds = %6
%14 = tail call i32 @rcu_read_unlock() #2
ret ptr %10
}
declare i32 @XA_STATE(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @rcu_read_lock(...) local_unnamed_addr #1
declare ptr @xas_load(ptr noundef) local_unnamed_addr #1
declare i64 @xa_is_zero(ptr noundef) local_unnamed_addr #1
declare i64 @xas_retry(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rcu_read_unlock(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
|
linux_lib_extr_xarray.c_xa_load
|
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_ddt.c_ddt_phys_free.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_ddt.c_ddt_phys_free.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @ddt_phys_free(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !5
%8 = call i32 @ddt_bp_create(i32 noundef %7, ptr noundef %1, ptr noundef %2, ptr noundef nonnull %5) #3
%9 = call i32 @ddt_phys_clear(ptr noundef %2) #3
%10 = load i32, ptr %0, align 4, !tbaa !10
%11 = call i32 @zio_free(i32 noundef %10, i32 noundef %3, ptr noundef nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ddt_bp_create(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ddt_phys_clear(ptr noundef) local_unnamed_addr #2
declare i32 @zio_free(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_ddt.c_ddt_phys_free.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_ddt.c_ddt_phys_free.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @ddt_phys_free(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = getelementptr inbounds i8, ptr %0, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !6
%8 = call i32 @ddt_bp_create(i32 noundef %7, ptr noundef %1, ptr noundef %2, ptr noundef nonnull %5) #3
%9 = call i32 @ddt_phys_clear(ptr noundef %2) #3
%10 = load i32, ptr %0, align 4, !tbaa !11
%11 = call i32 @zio_free(i32 noundef %10, i32 noundef %3, ptr noundef nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ddt_bp_create(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ddt_phys_clear(ptr noundef) local_unnamed_addr #2
declare i32 @zio_free(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
|
freebsd_sys_cddl_contrib_opensolaris_uts_common_fs_zfs_extr_ddt.c_ddt_phys_free
|
; ModuleID = 'AnghaBench/disque/src/extr_networking.c_addReplyBulkCBuffer.c'
source_filename = "AnghaBench/disque/src/extr_networking.c_addReplyBulkCBuffer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
@shared = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
; Function Attrs: nounwind uwtable
define dso_local void @addReplyBulkCBuffer(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @addReplyLongLongWithPrefix(ptr noundef %0, i64 noundef %2, i8 noundef signext 36) #2
%5 = tail call i32 @addReplyString(ptr noundef %0, ptr noundef %1, i64 noundef %2) #2
%6 = load i32, ptr @shared, align 4, !tbaa !5
%7 = tail call i32 @addReply(ptr noundef %0, i32 noundef %6) #2
ret void
}
declare i32 @addReplyLongLongWithPrefix(ptr noundef, i64 noundef, i8 noundef signext) local_unnamed_addr #1
declare i32 @addReplyString(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @addReply(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/disque/src/extr_networking.c_addReplyBulkCBuffer.c'
source_filename = "AnghaBench/disque/src/extr_networking.c_addReplyBulkCBuffer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@shared = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @addReplyBulkCBuffer(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @addReplyLongLongWithPrefix(ptr noundef %0, i64 noundef %2, i8 noundef signext 36) #2
%5 = tail call i32 @addReplyString(ptr noundef %0, ptr noundef %1, i64 noundef %2) #2
%6 = load i32, ptr @shared, align 4, !tbaa !6
%7 = tail call i32 @addReply(ptr noundef %0, i32 noundef %6) #2
ret void
}
declare i32 @addReplyLongLongWithPrefix(ptr noundef, i64 noundef, i8 noundef signext) local_unnamed_addr #1
declare i32 @addReplyString(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @addReply(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
disque_src_extr_networking.c_addReplyBulkCBuffer
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/amd/xgbe/extr_xgbe-mdio.c_xgbe_phy_config_fixed.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/amd/xgbe/extr_xgbe-mdio.c_xgbe_phy_config_fixed.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.xgbe_prv_data = type { %struct.TYPE_6__, %struct.TYPE_5__, i32 }
%struct.TYPE_6__ = type { i64, i32 }
%struct.TYPE_5__ = type { %struct.TYPE_4__ }
%struct.TYPE_4__ = type { ptr }
@link = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"fixed PHY configuration\0A\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@DUPLEX_FULL = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @xgbe_phy_config_fixed], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @xgbe_phy_config_fixed(ptr noundef %0) #0 {
%2 = load i32, ptr @link, align 4, !tbaa !5
%3 = getelementptr inbounds %struct.xgbe_prv_data, ptr %0, i64 0, i32 2
%4 = load i32, ptr %3, align 8, !tbaa !9
%5 = tail call i32 @netif_dbg(ptr noundef %0, i32 noundef %2, i32 noundef %4, ptr noundef nonnull @.str) #2
%6 = tail call i32 @xgbe_an_disable(ptr noundef %0) #2
%7 = getelementptr inbounds %struct.xgbe_prv_data, ptr %0, i64 0, i32 1
%8 = load ptr, ptr %7, align 8, !tbaa !16
%9 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
%10 = load i32, ptr %9, align 8, !tbaa !17
%11 = tail call i32 %8(ptr noundef %0, i32 noundef %10) #2
switch i32 %11, label %12 [
i32 134, label %15
i32 133, label %15
i32 135, label %15
i32 131, label %15
i32 130, label %15
i32 128, label %15
i32 132, label %15
]
12: ; preds = %1
%13 = load i32, ptr @EINVAL, align 4, !tbaa !5
%14 = sub nsw i32 0, %13
br label %24
15: ; preds = %1, %1, %1, %1, %1, %1, %1
%16 = load i64, ptr %0, align 8, !tbaa !18
%17 = load i64, ptr @DUPLEX_FULL, align 8, !tbaa !19
%18 = icmp eq i64 %16, %17
br i1 %18, label %22, label %19
19: ; preds = %15
%20 = load i32, ptr @EINVAL, align 4, !tbaa !5
%21 = sub nsw i32 0, %20
br label %24
22: ; preds = %15
%23 = tail call i32 @xgbe_set_mode(ptr noundef nonnull %0, i32 noundef %11) #2
br label %24
24: ; preds = %22, %19, %12
%25 = phi i32 [ %14, %12 ], [ %21, %19 ], [ 0, %22 ]
ret i32 %25
}
declare i32 @netif_dbg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xgbe_an_disable(ptr noundef) local_unnamed_addr #1
declare i32 @xgbe_set_mode(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 24}
!10 = !{!"xgbe_prv_data", !11, i64 0, !13, i64 16, !6, i64 24}
!11 = !{!"TYPE_6__", !12, i64 0, !6, i64 8}
!12 = !{!"long", !7, i64 0}
!13 = !{!"TYPE_5__", !14, i64 0}
!14 = !{!"TYPE_4__", !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!10, !15, i64 16}
!17 = !{!10, !6, i64 8}
!18 = !{!10, !12, i64 0}
!19 = !{!12, !12, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/amd/xgbe/extr_xgbe-mdio.c_xgbe_phy_config_fixed.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/amd/xgbe/extr_xgbe-mdio.c_xgbe_phy_config_fixed.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@link = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"fixed PHY configuration\0A\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
@DUPLEX_FULL = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @xgbe_phy_config_fixed], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @xgbe_phy_config_fixed(ptr noundef %0) #0 {
%2 = load i32, ptr @link, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 24
%4 = load i32, ptr %3, align 8, !tbaa !10
%5 = tail call i32 @netif_dbg(ptr noundef %0, i32 noundef %2, i32 noundef %4, ptr noundef nonnull @.str) #2
%6 = tail call i32 @xgbe_an_disable(ptr noundef %0) #2
%7 = getelementptr inbounds i8, ptr %0, i64 16
%8 = load ptr, ptr %7, align 8, !tbaa !17
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load i32, ptr %9, align 8, !tbaa !18
%11 = tail call i32 %8(ptr noundef %0, i32 noundef %10) #2
switch i32 %11, label %12 [
i32 134, label %15
i32 133, label %15
i32 135, label %15
i32 131, label %15
i32 130, label %15
i32 128, label %15
i32 132, label %15
]
12: ; preds = %1
%13 = load i32, ptr @EINVAL, align 4, !tbaa !6
%14 = sub nsw i32 0, %13
br label %24
15: ; preds = %1, %1, %1, %1, %1, %1, %1
%16 = load i64, ptr %0, align 8, !tbaa !19
%17 = load i64, ptr @DUPLEX_FULL, align 8, !tbaa !20
%18 = icmp eq i64 %16, %17
br i1 %18, label %22, label %19
19: ; preds = %15
%20 = load i32, ptr @EINVAL, align 4, !tbaa !6
%21 = sub nsw i32 0, %20
br label %24
22: ; preds = %15
%23 = tail call i32 @xgbe_set_mode(ptr noundef nonnull %0, i32 noundef %11) #2
br label %24
24: ; preds = %22, %19, %12
%25 = phi i32 [ %14, %12 ], [ %21, %19 ], [ 0, %22 ]
ret i32 %25
}
declare i32 @netif_dbg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xgbe_an_disable(ptr noundef) local_unnamed_addr #1
declare i32 @xgbe_set_mode(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 24}
!11 = !{!"xgbe_prv_data", !12, i64 0, !14, i64 16, !7, i64 24}
!12 = !{!"TYPE_6__", !13, i64 0, !7, i64 8}
!13 = !{!"long", !8, i64 0}
!14 = !{!"TYPE_5__", !15, i64 0}
!15 = !{!"TYPE_4__", !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!11, !16, i64 16}
!18 = !{!11, !7, i64 8}
!19 = !{!11, !13, i64 0}
!20 = !{!13, !13, i64 0}
|
linux_drivers_net_ethernet_amd_xgbe_extr_xgbe-mdio.c_xgbe_phy_config_fixed
|
; ModuleID = 'AnghaBench/poco/Data/SQLite/src/extr_sqlite3.c_walPagesize.c'
source_filename = "AnghaBench/poco/Data/SQLite/src/extr_sqlite3.c_walPagesize.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @walPagesize], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal i32 @walPagesize(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = and i32 %2, 65024
%4 = shl i32 %2, 16
%5 = and i32 %4, 65536
%6 = or disjoint i32 %5, %3
ret i32 %6
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/poco/Data/SQLite/src/extr_sqlite3.c_walPagesize.c'
source_filename = "AnghaBench/poco/Data/SQLite/src/extr_sqlite3.c_walPagesize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @walPagesize], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 0, 130561) i32 @walPagesize(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = and i32 %2, 65024
%4 = shl i32 %2, 16
%5 = and i32 %4, 65536
%6 = or disjoint i32 %5, %3
ret i32 %6
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
|
poco_Data_SQLite_src_extr_sqlite3.c_walPagesize
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/extr_drm_encoder.c_drm_encoder_cleanup.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/extr_drm_encoder.c_drm_encoder_cleanup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.drm_encoder = type { i32, i32, i32, ptr, ptr }
; Function Attrs: nounwind uwtable
define dso_local void @drm_encoder_cleanup(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.drm_encoder, ptr %0, i64 0, i32 4
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.drm_encoder, ptr %0, i64 0, i32 3
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = icmp eq ptr %5, null
br i1 %6, label %12, label %7
7: ; preds = %1, %7
%8 = phi ptr [ %9, %7 ], [ %5, %1 ]
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = tail call i32 @drm_bridge_detach(ptr noundef nonnull %8) #2
%11 = icmp eq ptr %9, null
br i1 %11, label %12, label %7, !llvm.loop !14
12: ; preds = %7, %1
%13 = getelementptr inbounds %struct.drm_encoder, ptr %0, i64 0, i32 2
%14 = tail call i32 @drm_mode_object_unregister(ptr noundef %3, ptr noundef nonnull %13) #2
%15 = getelementptr inbounds %struct.drm_encoder, ptr %0, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !16
%17 = tail call i32 @kfree(i32 noundef %16) #2
%18 = tail call i32 @list_del(ptr noundef %0) #2
%19 = load i32, ptr %3, align 4, !tbaa !17
%20 = add nsw i32 %19, -1
store i32 %20, ptr %3, align 4, !tbaa !17
%21 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 32) #2
ret void
}
declare i32 @drm_bridge_detach(ptr noundef) local_unnamed_addr #1
declare i32 @drm_mode_object_unregister(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kfree(i32 noundef) local_unnamed_addr #1
declare i32 @list_del(ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"drm_encoder", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 16}
!12 = !{!13, !10, i64 0}
!13 = !{!"drm_bridge", !10, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!6, !7, i64 4}
!17 = !{!18, !7, i64 0}
!18 = !{!"drm_device", !19, i64 0}
!19 = !{!"TYPE_2__", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/extr_drm_encoder.c_drm_encoder_cleanup.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/extr_drm_encoder.c_drm_encoder_cleanup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @drm_encoder_cleanup(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 24
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 16
%5 = load ptr, ptr %4, align 8, !tbaa !12
%6 = icmp eq ptr %5, null
br i1 %6, label %12, label %7
7: ; preds = %1, %7
%8 = phi ptr [ %9, %7 ], [ %5, %1 ]
%9 = load ptr, ptr %8, align 8, !tbaa !13
%10 = tail call i32 @drm_bridge_detach(ptr noundef nonnull %8) #2
%11 = icmp eq ptr %9, null
br i1 %11, label %12, label %7, !llvm.loop !15
12: ; preds = %7, %1
%13 = getelementptr inbounds i8, ptr %0, i64 8
%14 = tail call i32 @drm_mode_object_unregister(ptr noundef %3, ptr noundef nonnull %13) #2
%15 = getelementptr inbounds i8, ptr %0, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !17
%17 = tail call i32 @kfree(i32 noundef %16) #2
%18 = tail call i32 @list_del(ptr noundef %0) #2
%19 = load i32, ptr %3, align 4, !tbaa !18
%20 = add nsw i32 %19, -1
store i32 %20, ptr %3, align 4, !tbaa !18
%21 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 32) #2
ret void
}
declare i32 @drm_bridge_detach(ptr noundef) local_unnamed_addr #1
declare i32 @drm_mode_object_unregister(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kfree(i32 noundef) local_unnamed_addr #1
declare i32 @list_del(ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 24}
!7 = !{!"drm_encoder", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16, !11, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 16}
!13 = !{!14, !11, i64 0}
!14 = !{!"drm_bridge", !11, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!7, !8, i64 4}
!18 = !{!19, !8, i64 0}
!19 = !{!"drm_device", !20, i64 0}
!20 = !{!"TYPE_2__", !8, i64 0}
|
linux_drivers_gpu_drm_extr_drm_encoder.c_drm_encoder_cleanup
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192c/extr_dm_common.c_rtl92c_dm_rf_saving.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192c/extr_dm_common.c_rtl92c_dm_rf_saving.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rtl_priv = type { i32, i32, i32, i32, i32, %struct.ps_t }
%struct.ps_t = type { i32, i64, i64 }
@RFPGA0_XCD_RFINTERFACESW = dso_local local_unnamed_addr global i32 0, align 4
@MASKDWORD = dso_local local_unnamed_addr global i32 0, align 4
@ROFDM0_AGCPARAMETER1 = dso_local local_unnamed_addr global i32 0, align 4
@RFPGA0_XCD_SWITCHCONTROL = dso_local local_unnamed_addr global i32 0, align 4
@RF_NORMAL = dso_local local_unnamed_addr global i64 0, align 8
@RF_SAVE = dso_local local_unnamed_addr global i64 0, align 8
@RF_MAX = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @rtl92c_dm_rf_saving(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @rtl_priv(ptr noundef %0) #2
%4 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 5
%5 = load i32, ptr %3, align 8, !tbaa !5
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %31
7: ; preds = %2
%8 = load i32, ptr @RFPGA0_XCD_RFINTERFACESW, align 4, !tbaa !12
%9 = load i32, ptr @MASKDWORD, align 4, !tbaa !12
%10 = tail call i32 @rtl_get_bbreg(ptr noundef %0, i32 noundef %8, i32 noundef %9) #2
%11 = lshr i32 %10, 14
%12 = and i32 %11, 115
%13 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 1
store i32 %12, ptr %13, align 4, !tbaa !13
%14 = load i32, ptr @ROFDM0_AGCPARAMETER1, align 4, !tbaa !12
%15 = load i32, ptr @MASKDWORD, align 4, !tbaa !12
%16 = tail call i32 @rtl_get_bbreg(ptr noundef %0, i32 noundef %14, i32 noundef %15) #2
%17 = tail call i32 @BIT(i32 noundef 3) #2
%18 = and i32 %17, %16
%19 = ashr i32 %18, 3
%20 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 2
store i32 %19, ptr %20, align 8, !tbaa !14
%21 = load i32, ptr @RFPGA0_XCD_SWITCHCONTROL, align 4, !tbaa !12
%22 = load i32, ptr @MASKDWORD, align 4, !tbaa !12
%23 = tail call i32 @rtl_get_bbreg(ptr noundef %0, i32 noundef %21, i32 noundef %22) #2
%24 = lshr i32 %23, 24
%25 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 3
store i32 %24, ptr %25, align 4, !tbaa !15
%26 = load i32, ptr @MASKDWORD, align 4, !tbaa !12
%27 = tail call i32 @rtl_get_bbreg(ptr noundef %0, i32 noundef 2676, i32 noundef %26) #2
%28 = lshr i32 %27, 12
%29 = and i32 %28, 15
%30 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 4
store i32 %29, ptr %30, align 8, !tbaa !16
store i32 1, ptr %3, align 8, !tbaa !5
br label %31
31: ; preds = %7, %2
%32 = icmp eq i32 %1, 0
br i1 %32, label %33, label %50
33: ; preds = %31
%34 = load i32, ptr %4, align 8, !tbaa !17
%35 = icmp eq i32 %34, 0
br i1 %35, label %48, label %36
36: ; preds = %33
%37 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 5, i32 1
%38 = load i64, ptr %37, align 8, !tbaa !18
%39 = load i64, ptr @RF_NORMAL, align 8, !tbaa !19
%40 = icmp eq i64 %38, %39
%41 = load i64, ptr @RF_SAVE, align 8
br i1 %40, label %42, label %45
42: ; preds = %36
%43 = icmp sgt i32 %34, 29
%44 = select i1 %43, i64 %41, i64 %38
br label %52
45: ; preds = %36
%46 = icmp slt i32 %34, 26
%47 = select i1 %46, i64 %39, i64 %41
br label %52
48: ; preds = %33
%49 = load i64, ptr @RF_MAX, align 8, !tbaa !19
br label %52
50: ; preds = %31
%51 = load i64, ptr @RF_NORMAL, align 8, !tbaa !19
br label %52
52: ; preds = %45, %42, %48, %50
%53 = phi i64 [ %49, %48 ], [ %51, %50 ], [ %44, %42 ], [ %47, %45 ]
%54 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 5, i32 2
store i64 %53, ptr %54, align 8, !tbaa !20
%55 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 5, i32 1
%56 = load i64, ptr %55, align 8, !tbaa !18
%57 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 5, i32 2
%58 = icmp eq i64 %56, %53
br i1 %58, label %96, label %59
59: ; preds = %52
%60 = load i64, ptr @RF_SAVE, align 8, !tbaa !19
%61 = icmp eq i64 %53, %60
%62 = load i32, ptr @RFPGA0_XCD_RFINTERFACESW, align 4, !tbaa !12
br i1 %61, label %63, label %75
63: ; preds = %59
%64 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %62, i32 noundef 1835008, i32 noundef 2) #2
%65 = load i32, ptr @ROFDM0_AGCPARAMETER1, align 4, !tbaa !12
%66 = tail call i32 @BIT(i32 noundef 3) #2
%67 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %65, i32 noundef %66, i32 noundef 0) #2
%68 = load i32, ptr @RFPGA0_XCD_SWITCHCONTROL, align 4, !tbaa !12
%69 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %68, i32 noundef -16777216, i32 noundef 99) #2
%70 = load i32, ptr @RFPGA0_XCD_RFINTERFACESW, align 4, !tbaa !12
%71 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %70, i32 noundef 49152, i32 noundef 2) #2
%72 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef 2676, i32 noundef 61440, i32 noundef 3) #2
%73 = tail call i32 @BIT(i32 noundef 28) #2
%74 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef 2072, i32 noundef %73, i32 noundef 0) #2
br label %91
75: ; preds = %59
%76 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 1
%77 = load i32, ptr %76, align 4, !tbaa !13
%78 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %62, i32 noundef 1884160, i32 noundef %77) #2
%79 = load i32, ptr @ROFDM0_AGCPARAMETER1, align 4, !tbaa !12
%80 = tail call i32 @BIT(i32 noundef 3) #2
%81 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 2
%82 = load i32, ptr %81, align 8, !tbaa !14
%83 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %79, i32 noundef %80, i32 noundef %82) #2
%84 = load i32, ptr @RFPGA0_XCD_SWITCHCONTROL, align 4, !tbaa !12
%85 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 3
%86 = load i32, ptr %85, align 4, !tbaa !15
%87 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %84, i32 noundef -16777216, i32 noundef %86) #2
%88 = getelementptr inbounds %struct.rtl_priv, ptr %3, i64 0, i32 4
%89 = load i32, ptr %88, align 8, !tbaa !16
%90 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef 2676, i32 noundef 61440, i32 noundef %89) #2
br label %91
91: ; preds = %75, %63
%92 = phi i32 [ 0, %75 ], [ 1, %63 ]
%93 = tail call i32 @BIT(i32 noundef 28) #2
%94 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef 2072, i32 noundef %93, i32 noundef %92) #2
%95 = load i64, ptr %57, align 8, !tbaa !20
store i64 %95, ptr %55, align 8, !tbaa !18
br label %96
96: ; preds = %91, %52
ret void
}
declare ptr @rtl_priv(ptr noundef) local_unnamed_addr #1
declare i32 @rtl_get_bbreg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIT(i32 noundef) local_unnamed_addr #1
declare i32 @rtl_set_bbreg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"rtl_priv", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"ps_t", !7, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"long", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 4}
!14 = !{!6, !7, i64 8}
!15 = !{!6, !7, i64 12}
!16 = !{!6, !7, i64 16}
!17 = !{!10, !7, i64 0}
!18 = !{!10, !11, i64 8}
!19 = !{!11, !11, i64 0}
!20 = !{!10, !11, i64 16}
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192c/extr_dm_common.c_rtl92c_dm_rf_saving.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192c/extr_dm_common.c_rtl92c_dm_rf_saving.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RFPGA0_XCD_RFINTERFACESW = common local_unnamed_addr global i32 0, align 4
@MASKDWORD = common local_unnamed_addr global i32 0, align 4
@ROFDM0_AGCPARAMETER1 = common local_unnamed_addr global i32 0, align 4
@RFPGA0_XCD_SWITCHCONTROL = common local_unnamed_addr global i32 0, align 4
@RF_NORMAL = common local_unnamed_addr global i64 0, align 8
@RF_SAVE = common local_unnamed_addr global i64 0, align 8
@RF_MAX = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @rtl92c_dm_rf_saving(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @rtl_priv(ptr noundef %0) #2
%4 = getelementptr inbounds i8, ptr %3, i64 24
%5 = load i32, ptr %3, align 8, !tbaa !6
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %31
7: ; preds = %2
%8 = load i32, ptr @RFPGA0_XCD_RFINTERFACESW, align 4, !tbaa !13
%9 = load i32, ptr @MASKDWORD, align 4, !tbaa !13
%10 = tail call i32 @rtl_get_bbreg(ptr noundef %0, i32 noundef %8, i32 noundef %9) #2
%11 = lshr i32 %10, 14
%12 = and i32 %11, 115
%13 = getelementptr inbounds i8, ptr %3, i64 4
store i32 %12, ptr %13, align 4, !tbaa !14
%14 = load i32, ptr @ROFDM0_AGCPARAMETER1, align 4, !tbaa !13
%15 = load i32, ptr @MASKDWORD, align 4, !tbaa !13
%16 = tail call i32 @rtl_get_bbreg(ptr noundef %0, i32 noundef %14, i32 noundef %15) #2
%17 = tail call i32 @BIT(i32 noundef 3) #2
%18 = and i32 %17, %16
%19 = ashr i32 %18, 3
%20 = getelementptr inbounds i8, ptr %3, i64 8
store i32 %19, ptr %20, align 8, !tbaa !15
%21 = load i32, ptr @RFPGA0_XCD_SWITCHCONTROL, align 4, !tbaa !13
%22 = load i32, ptr @MASKDWORD, align 4, !tbaa !13
%23 = tail call i32 @rtl_get_bbreg(ptr noundef %0, i32 noundef %21, i32 noundef %22) #2
%24 = lshr i32 %23, 24
%25 = getelementptr inbounds i8, ptr %3, i64 12
store i32 %24, ptr %25, align 4, !tbaa !16
%26 = load i32, ptr @MASKDWORD, align 4, !tbaa !13
%27 = tail call i32 @rtl_get_bbreg(ptr noundef %0, i32 noundef 2676, i32 noundef %26) #2
%28 = lshr i32 %27, 12
%29 = and i32 %28, 15
%30 = getelementptr inbounds i8, ptr %3, i64 16
store i32 %29, ptr %30, align 8, !tbaa !17
store i32 1, ptr %3, align 8, !tbaa !6
br label %31
31: ; preds = %7, %2
%32 = icmp eq i32 %1, 0
br i1 %32, label %33, label %50
33: ; preds = %31
%34 = load i32, ptr %4, align 8, !tbaa !18
%35 = icmp eq i32 %34, 0
br i1 %35, label %48, label %36
36: ; preds = %33
%37 = getelementptr inbounds i8, ptr %3, i64 32
%38 = load i64, ptr %37, align 8, !tbaa !19
%39 = load i64, ptr @RF_NORMAL, align 8, !tbaa !20
%40 = icmp eq i64 %38, %39
%41 = load i64, ptr @RF_SAVE, align 8
br i1 %40, label %42, label %45
42: ; preds = %36
%43 = icmp sgt i32 %34, 29
%44 = select i1 %43, i64 %41, i64 %38
br label %52
45: ; preds = %36
%46 = icmp slt i32 %34, 26
%47 = select i1 %46, i64 %39, i64 %41
br label %52
48: ; preds = %33
%49 = load i64, ptr @RF_MAX, align 8, !tbaa !20
br label %52
50: ; preds = %31
%51 = load i64, ptr @RF_NORMAL, align 8, !tbaa !20
br label %52
52: ; preds = %45, %42, %48, %50
%53 = phi i64 [ %49, %48 ], [ %51, %50 ], [ %44, %42 ], [ %47, %45 ]
%54 = getelementptr inbounds i8, ptr %3, i64 40
store i64 %53, ptr %54, align 8, !tbaa !21
%55 = getelementptr inbounds i8, ptr %3, i64 32
%56 = load i64, ptr %55, align 8, !tbaa !19
%57 = icmp eq i64 %56, %53
br i1 %57, label %95, label %58
58: ; preds = %52
%59 = load i64, ptr @RF_SAVE, align 8, !tbaa !20
%60 = icmp eq i64 %53, %59
%61 = load i32, ptr @RFPGA0_XCD_RFINTERFACESW, align 4, !tbaa !13
br i1 %60, label %62, label %74
62: ; preds = %58
%63 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %61, i32 noundef 1835008, i32 noundef 2) #2
%64 = load i32, ptr @ROFDM0_AGCPARAMETER1, align 4, !tbaa !13
%65 = tail call i32 @BIT(i32 noundef 3) #2
%66 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %64, i32 noundef %65, i32 noundef 0) #2
%67 = load i32, ptr @RFPGA0_XCD_SWITCHCONTROL, align 4, !tbaa !13
%68 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %67, i32 noundef -16777216, i32 noundef 99) #2
%69 = load i32, ptr @RFPGA0_XCD_RFINTERFACESW, align 4, !tbaa !13
%70 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %69, i32 noundef 49152, i32 noundef 2) #2
%71 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef 2676, i32 noundef 61440, i32 noundef 3) #2
%72 = tail call i32 @BIT(i32 noundef 28) #2
%73 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef 2072, i32 noundef %72, i32 noundef 0) #2
br label %90
74: ; preds = %58
%75 = getelementptr inbounds i8, ptr %3, i64 4
%76 = load i32, ptr %75, align 4, !tbaa !14
%77 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %61, i32 noundef 1884160, i32 noundef %76) #2
%78 = load i32, ptr @ROFDM0_AGCPARAMETER1, align 4, !tbaa !13
%79 = tail call i32 @BIT(i32 noundef 3) #2
%80 = getelementptr inbounds i8, ptr %3, i64 8
%81 = load i32, ptr %80, align 8, !tbaa !15
%82 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %78, i32 noundef %79, i32 noundef %81) #2
%83 = load i32, ptr @RFPGA0_XCD_SWITCHCONTROL, align 4, !tbaa !13
%84 = getelementptr inbounds i8, ptr %3, i64 12
%85 = load i32, ptr %84, align 4, !tbaa !16
%86 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef %83, i32 noundef -16777216, i32 noundef %85) #2
%87 = getelementptr inbounds i8, ptr %3, i64 16
%88 = load i32, ptr %87, align 8, !tbaa !17
%89 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef 2676, i32 noundef 61440, i32 noundef %88) #2
br label %90
90: ; preds = %74, %62
%91 = phi i32 [ 0, %74 ], [ 1, %62 ]
%92 = tail call i32 @BIT(i32 noundef 28) #2
%93 = tail call i32 @rtl_set_bbreg(ptr noundef %0, i32 noundef 2072, i32 noundef %92, i32 noundef %91) #2
%94 = load i64, ptr %54, align 8, !tbaa !21
store i64 %94, ptr %55, align 8, !tbaa !19
br label %95
95: ; preds = %90, %52
ret void
}
declare ptr @rtl_priv(ptr noundef) local_unnamed_addr #1
declare i32 @rtl_get_bbreg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIT(i32 noundef) local_unnamed_addr #1
declare i32 @rtl_set_bbreg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rtl_priv", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"ps_t", !8, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"long", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !8, i64 4}
!15 = !{!7, !8, i64 8}
!16 = !{!7, !8, i64 12}
!17 = !{!7, !8, i64 16}
!18 = !{!11, !8, i64 0}
!19 = !{!11, !12, i64 8}
!20 = !{!12, !12, i64 0}
!21 = !{!11, !12, i64 16}
|
linux_drivers_net_wireless_realtek_rtlwifi_rtl8192c_extr_dm_common.c_rtl92c_dm_rf_saving
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_xsk.c_i40e_xsk_umem_dma_map.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_xsk.c_i40e_xsk_umem_dma_map.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.xdp_umem = type { i32, ptr, ptr }
%struct.TYPE_4__ = type { i64 }
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@DMA_BIDIRECTIONAL = dso_local local_unnamed_addr global i32 0, align 4
@I40E_RX_DMA_ATTR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @i40e_xsk_umem_dma_map], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @i40e_xsk_umem_dma_map(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = load i32, ptr %1, align 8, !tbaa !12
%6 = icmp eq i32 %5, 0
br i1 %6, label %53, label %7
7: ; preds = %2
%8 = getelementptr inbounds %struct.xdp_umem, ptr %1, i64 0, i32 2
%9 = getelementptr inbounds %struct.xdp_umem, ptr %1, i64 0, i32 1
br label %10
10: ; preds = %7, %35
%11 = phi i32 [ 0, %7 ], [ %42, %35 ]
%12 = phi i64 [ 0, %7 ], [ %38, %35 ]
%13 = load ptr, ptr %8, align 8, !tbaa !15
%14 = getelementptr inbounds i32, ptr %13, i64 %12
%15 = load i32, ptr %14, align 4, !tbaa !16
%16 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !16
%17 = load i32, ptr @DMA_BIDIRECTIONAL, align 4, !tbaa !16
%18 = load i32, ptr @I40E_RX_DMA_ATTR, align 4, !tbaa !16
%19 = tail call i64 @dma_map_page_attrs(ptr noundef %4, i32 noundef %15, i32 noundef 0, i32 noundef %16, i32 noundef %17, i32 noundef %18) #2
%20 = tail call i64 @dma_mapping_error(ptr noundef %4, i64 noundef %19) #2
%21 = icmp eq i64 %20, 0
br i1 %21, label %35, label %22
22: ; preds = %10
%23 = icmp eq i64 %12, 0
br i1 %23, label %53, label %24
24: ; preds = %22
%25 = load ptr, ptr %9, align 8, !tbaa !17
%26 = getelementptr inbounds %struct.TYPE_4__, ptr %25, i64 %12
%27 = load i64, ptr %26, align 8, !tbaa !18
%28 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !16
%29 = load i32, ptr @DMA_BIDIRECTIONAL, align 4, !tbaa !16
%30 = load i32, ptr @I40E_RX_DMA_ATTR, align 4, !tbaa !16
%31 = tail call i32 @dma_unmap_page_attrs(ptr noundef %4, i64 noundef %27, i32 noundef %28, i32 noundef %29, i32 noundef %30) #2
%32 = load ptr, ptr %9, align 8, !tbaa !17
%33 = getelementptr inbounds %struct.TYPE_4__, ptr %32, i64 %12
store i64 0, ptr %33, align 8, !tbaa !18
%34 = icmp eq i32 %11, 1
br i1 %34, label %53, label %43
35: ; preds = %10
%36 = load ptr, ptr %9, align 8, !tbaa !17
%37 = getelementptr inbounds %struct.TYPE_4__, ptr %36, i64 %12
store i64 %19, ptr %37, align 8, !tbaa !18
%38 = add nuw nsw i64 %12, 1
%39 = load i32, ptr %1, align 8, !tbaa !12
%40 = zext i32 %39 to i64
%41 = icmp ult i64 %38, %40
%42 = add nuw i32 %11, 1
br i1 %41, label %10, label %53, !llvm.loop !21
43: ; preds = %24, %43
%44 = phi i32 [ %51, %43 ], [ 1, %24 ]
%45 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !16
%46 = load i32, ptr @DMA_BIDIRECTIONAL, align 4, !tbaa !16
%47 = load i32, ptr @I40E_RX_DMA_ATTR, align 4, !tbaa !16
%48 = tail call i32 @dma_unmap_page_attrs(ptr noundef %4, i64 noundef 0, i32 noundef %45, i32 noundef %46, i32 noundef %47) #2
%49 = load ptr, ptr %9, align 8, !tbaa !17
%50 = getelementptr inbounds %struct.TYPE_4__, ptr %49, i64 %12
store i64 0, ptr %50, align 8, !tbaa !18
%51 = add nuw i32 %44, 1
%52 = icmp eq i32 %51, %11
br i1 %52, label %53, label %43, !llvm.loop !23
53: ; preds = %35, %24, %43, %2, %22
%54 = phi i32 [ -1, %22 ], [ 0, %2 ], [ -1, %43 ], [ -1, %24 ], [ 0, %35 ]
ret i32 %54
}
declare i64 @dma_map_page_attrs(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @dma_mapping_error(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @dma_unmap_page_attrs(ptr noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"i40e_vsi", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"i40e_pf", !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"xdp_umem", !14, i64 0, !7, i64 8, !7, i64 16}
!14 = !{!"int", !8, i64 0}
!15 = !{!13, !7, i64 16}
!16 = !{!14, !14, i64 0}
!17 = !{!13, !7, i64 8}
!18 = !{!19, !20, i64 0}
!19 = !{!"TYPE_4__", !20, i64 0}
!20 = !{!"long", !8, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
!23 = distinct !{!23, !22, !24}
!24 = !{!"llvm.loop.peeled.count", i32 1}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_xsk.c_i40e_xsk_umem_dma_map.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_xsk.c_i40e_xsk_umem_dma_map.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i64 }
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@DMA_BIDIRECTIONAL = common local_unnamed_addr global i32 0, align 4
@I40E_RX_DMA_ATTR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @i40e_xsk_umem_dma_map], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -1, 1) i32 @i40e_xsk_umem_dma_map(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = load i32, ptr %1, align 8, !tbaa !13
%6 = icmp eq i32 %5, 0
br i1 %6, label %53, label %7
7: ; preds = %2
%8 = getelementptr inbounds i8, ptr %1, i64 16
%9 = getelementptr inbounds i8, ptr %1, i64 8
br label %10
10: ; preds = %7, %35
%11 = phi i32 [ 0, %7 ], [ %42, %35 ]
%12 = phi i64 [ 0, %7 ], [ %38, %35 ]
%13 = load ptr, ptr %8, align 8, !tbaa !16
%14 = getelementptr inbounds i32, ptr %13, i64 %12
%15 = load i32, ptr %14, align 4, !tbaa !17
%16 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !17
%17 = load i32, ptr @DMA_BIDIRECTIONAL, align 4, !tbaa !17
%18 = load i32, ptr @I40E_RX_DMA_ATTR, align 4, !tbaa !17
%19 = tail call i64 @dma_map_page_attrs(ptr noundef %4, i32 noundef %15, i32 noundef 0, i32 noundef %16, i32 noundef %17, i32 noundef %18) #2
%20 = tail call i64 @dma_mapping_error(ptr noundef %4, i64 noundef %19) #2
%21 = icmp eq i64 %20, 0
br i1 %21, label %35, label %22
22: ; preds = %10
%23 = icmp eq i64 %12, 0
br i1 %23, label %53, label %24
24: ; preds = %22
%25 = load ptr, ptr %9, align 8, !tbaa !18
%26 = getelementptr inbounds %struct.TYPE_4__, ptr %25, i64 %12
%27 = load i64, ptr %26, align 8, !tbaa !19
%28 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !17
%29 = load i32, ptr @DMA_BIDIRECTIONAL, align 4, !tbaa !17
%30 = load i32, ptr @I40E_RX_DMA_ATTR, align 4, !tbaa !17
%31 = tail call i32 @dma_unmap_page_attrs(ptr noundef %4, i64 noundef %27, i32 noundef %28, i32 noundef %29, i32 noundef %30) #2
%32 = load ptr, ptr %9, align 8, !tbaa !18
%33 = getelementptr inbounds %struct.TYPE_4__, ptr %32, i64 %12
store i64 0, ptr %33, align 8, !tbaa !19
%34 = icmp eq i32 %11, 1
br i1 %34, label %53, label %43
35: ; preds = %10
%36 = load ptr, ptr %9, align 8, !tbaa !18
%37 = getelementptr inbounds %struct.TYPE_4__, ptr %36, i64 %12
store i64 %19, ptr %37, align 8, !tbaa !19
%38 = add nuw nsw i64 %12, 1
%39 = load i32, ptr %1, align 8, !tbaa !13
%40 = zext i32 %39 to i64
%41 = icmp ult i64 %38, %40
%42 = add nuw i32 %11, 1
br i1 %41, label %10, label %53, !llvm.loop !22
43: ; preds = %24, %43
%44 = phi i32 [ %51, %43 ], [ 1, %24 ]
%45 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !17
%46 = load i32, ptr @DMA_BIDIRECTIONAL, align 4, !tbaa !17
%47 = load i32, ptr @I40E_RX_DMA_ATTR, align 4, !tbaa !17
%48 = tail call i32 @dma_unmap_page_attrs(ptr noundef %4, i64 noundef 0, i32 noundef %45, i32 noundef %46, i32 noundef %47) #2
%49 = load ptr, ptr %9, align 8, !tbaa !18
%50 = getelementptr inbounds %struct.TYPE_4__, ptr %49, i64 %12
store i64 0, ptr %50, align 8, !tbaa !19
%51 = add nuw i32 %44, 1
%52 = icmp eq i32 %51, %11
br i1 %52, label %53, label %43, !llvm.loop !24
53: ; preds = %35, %24, %43, %2, %22
%54 = phi i32 [ -1, %22 ], [ 0, %2 ], [ -1, %43 ], [ -1, %24 ], [ 0, %35 ]
ret i32 %54
}
declare i64 @dma_map_page_attrs(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @dma_mapping_error(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @dma_unmap_page_attrs(ptr noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"i40e_vsi", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"i40e_pf", !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"xdp_umem", !15, i64 0, !8, i64 8, !8, i64 16}
!15 = !{!"int", !9, i64 0}
!16 = !{!14, !8, i64 16}
!17 = !{!15, !15, i64 0}
!18 = !{!14, !8, i64 8}
!19 = !{!20, !21, i64 0}
!20 = !{!"TYPE_4__", !21, i64 0}
!21 = !{!"long", !9, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = distinct !{!24, !23, !25}
!25 = !{!"llvm.loop.peeled.count", i32 1}
|
linux_drivers_net_ethernet_intel_i40e_extr_i40e_xsk.c_i40e_xsk_umem_dma_map
|
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/urlmon/extr_sec_mgr.c_run_child_process.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/urlmon/extr_sec_mgr.c_run_child_process.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32, i32 }
%struct.TYPE_5__ = type { i32, i32 }
@MAX_PATH = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"\22%s\22 %s domain_tests\00", align 1
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [35 x i8] c"Failed to spawn child process: %u\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @run_child_process], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @run_child_process() #0 {
%1 = alloca ptr, align 8
%2 = alloca %struct.TYPE_6__, align 4
%3 = alloca %struct.TYPE_5__, align 8
%4 = load i32, ptr @MAX_PATH, align 4, !tbaa !5
%5 = zext i32 %4 to i64
%6 = alloca i8, i64 %5, align 16
%7 = alloca i8, i64 %5, align 16
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
store i64 8, ptr %3, align 8
%8 = call i32 @GetModuleFileNameA(ptr noundef null, ptr noundef nonnull %7, i32 noundef %4) #3
%9 = call i32 @winetest_get_mainargs(ptr noundef nonnull %1) #3
%10 = load ptr, ptr %1, align 8, !tbaa !9
%11 = load ptr, ptr %10, align 8, !tbaa !9
%12 = getelementptr inbounds ptr, ptr %10, i64 1
%13 = load ptr, ptr %12, align 8, !tbaa !9
%14 = call i32 @sprintf(ptr noundef nonnull %6, ptr noundef nonnull @.str, ptr noundef %11, ptr noundef %13) #3
%15 = load ptr, ptr %1, align 8, !tbaa !9
%16 = load ptr, ptr %15, align 8, !tbaa !9
%17 = load i32, ptr @FALSE, align 4, !tbaa !5
%18 = call i32 @CreateProcessA(ptr noundef %16, ptr noundef nonnull %6, ptr noundef null, ptr noundef null, i32 noundef %17, i32 noundef 0, ptr noundef null, ptr noundef null, ptr noundef nonnull %3, ptr noundef nonnull %2) #3
%19 = call i32 (...) @GetLastError() #3
%20 = call i32 @ok(i32 noundef %18, ptr noundef nonnull @.str.1, i32 noundef %19) #3
%21 = load i32, ptr %2, align 4, !tbaa !11
%22 = call i32 @winetest_wait_child_process(i32 noundef %21) #3
%23 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 1
%24 = load i32, ptr %23, align 4, !tbaa !13
%25 = call i32 @CloseHandle(i32 noundef %24) #3
%26 = load i32, ptr %2, align 4, !tbaa !11
%27 = call i32 @CloseHandle(i32 noundef %26) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @GetModuleFileNameA(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @winetest_get_mainargs(ptr noundef) local_unnamed_addr #2
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @CreateProcessA(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ok(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @GetLastError(...) local_unnamed_addr #2
declare i32 @winetest_wait_child_process(i32 noundef) local_unnamed_addr #2
declare i32 @CloseHandle(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"TYPE_6__", !6, i64 0, !6, i64 4}
!13 = !{!12, !6, i64 4}
|
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/urlmon/extr_sec_mgr.c_run_child_process.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/urlmon/extr_sec_mgr.c_run_child_process.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_6__ = type { i32, i32 }
%struct.TYPE_5__ = type { i32, i32 }
@MAX_PATH = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"\22%s\22 %s domain_tests\00", align 1
@FALSE = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [35 x i8] c"Failed to spawn child process: %u\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @run_child_process], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @run_child_process() #0 {
%1 = alloca ptr, align 8
%2 = alloca %struct.TYPE_6__, align 4
%3 = alloca %struct.TYPE_5__, align 8
%4 = load i32, ptr @MAX_PATH, align 4, !tbaa !6
%5 = zext i32 %4 to i64
%6 = alloca i8, i64 %5, align 1
%7 = alloca i8, i64 %5, align 1
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
store i64 8, ptr %3, align 8
%8 = call i32 @GetModuleFileNameA(ptr noundef null, ptr noundef nonnull %7, i32 noundef %4) #3
%9 = call i32 @winetest_get_mainargs(ptr noundef nonnull %1) #3
%10 = load ptr, ptr %1, align 8, !tbaa !10
%11 = load ptr, ptr %10, align 8, !tbaa !10
%12 = getelementptr inbounds i8, ptr %10, i64 8
%13 = load ptr, ptr %12, align 8, !tbaa !10
%14 = call i32 @sprintf(ptr noundef nonnull %6, ptr noundef nonnull @.str, ptr noundef %11, ptr noundef %13) #3
%15 = load ptr, ptr %1, align 8, !tbaa !10
%16 = load ptr, ptr %15, align 8, !tbaa !10
%17 = load i32, ptr @FALSE, align 4, !tbaa !6
%18 = call i32 @CreateProcessA(ptr noundef %16, ptr noundef nonnull %6, ptr noundef null, ptr noundef null, i32 noundef %17, i32 noundef 0, ptr noundef null, ptr noundef null, ptr noundef nonnull %3, ptr noundef nonnull %2) #3
%19 = call i32 @GetLastError() #3
%20 = call i32 @ok(i32 noundef %18, ptr noundef nonnull @.str.1, i32 noundef %19) #3
%21 = load i32, ptr %2, align 4, !tbaa !12
%22 = call i32 @winetest_wait_child_process(i32 noundef %21) #3
%23 = getelementptr inbounds i8, ptr %2, i64 4
%24 = load i32, ptr %23, align 4, !tbaa !14
%25 = call i32 @CloseHandle(i32 noundef %24) #3
%26 = load i32, ptr %2, align 4, !tbaa !12
%27 = call i32 @CloseHandle(i32 noundef %26) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @GetModuleFileNameA(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @winetest_get_mainargs(ptr noundef) local_unnamed_addr #2
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @CreateProcessA(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ok(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @GetLastError(...) local_unnamed_addr #2
declare i32 @winetest_wait_child_process(i32 noundef) local_unnamed_addr #2
declare i32 @CloseHandle(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_6__", !7, i64 0, !7, i64 4}
!14 = !{!13, !7, i64 4}
|
reactos_modules_rostests_winetests_urlmon_extr_sec_mgr.c_run_child_process
|
; ModuleID = 'AnghaBench/linux/drivers/power/supply/extr_test_power.c_param_set_battery_technology.c'
source_filename = "AnghaBench/linux/drivers/power/supply/extr_test_power.c_param_set_battery_technology.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@map_technology = dso_local local_unnamed_addr global i32 0, align 4
@battery_technology = dso_local local_unnamed_addr global i32 0, align 4
@test_power_supplies = dso_local local_unnamed_addr global ptr null, align 8
@TEST_BATTERY = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @param_set_battery_technology], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @param_set_battery_technology(ptr noundef %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @map_technology, align 4, !tbaa !5
%4 = load i32, ptr @battery_technology, align 4, !tbaa !5
%5 = tail call i32 @map_get_value(i32 noundef %3, ptr noundef %0, i32 noundef %4) #2
store i32 %5, ptr @battery_technology, align 4, !tbaa !5
%6 = load ptr, ptr @test_power_supplies, align 8, !tbaa !9
%7 = load i64, ptr @TEST_BATTERY, align 8, !tbaa !11
%8 = getelementptr inbounds i32, ptr %6, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !5
%10 = tail call i32 @signal_power_supply_changed(i32 noundef %9) #2
ret i32 0
}
declare i32 @map_get_value(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @signal_power_supply_changed(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/power/supply/extr_test_power.c_param_set_battery_technology.c'
source_filename = "AnghaBench/linux/drivers/power/supply/extr_test_power.c_param_set_battery_technology.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@map_technology = common local_unnamed_addr global i32 0, align 4
@battery_technology = common local_unnamed_addr global i32 0, align 4
@test_power_supplies = common local_unnamed_addr global ptr null, align 8
@TEST_BATTERY = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @param_set_battery_technology], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @param_set_battery_technology(ptr noundef %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @map_technology, align 4, !tbaa !6
%4 = load i32, ptr @battery_technology, align 4, !tbaa !6
%5 = tail call i32 @map_get_value(i32 noundef %3, ptr noundef %0, i32 noundef %4) #2
store i32 %5, ptr @battery_technology, align 4, !tbaa !6
%6 = load ptr, ptr @test_power_supplies, align 8, !tbaa !10
%7 = load i64, ptr @TEST_BATTERY, align 8, !tbaa !12
%8 = getelementptr inbounds i32, ptr %6, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !6
%10 = tail call i32 @signal_power_supply_changed(i32 noundef %9) #2
ret i32 0
}
declare i32 @map_get_value(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @signal_power_supply_changed(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
|
linux_drivers_power_supply_extr_test_power.c_param_set_battery_technology
|
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/minidox/extr_serial.c_sync_recv.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/minidox/extr_serial.c_sync_recv.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @sync_recv], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sync_recv() #0 {
%1 = tail call i32 (...) @serial_input() #2
br label %2
2: ; preds = %2, %0
%3 = tail call i32 (...) @serial_read_pin() #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %2, label %5, !llvm.loop !5
5: ; preds = %2
%6 = tail call i32 (...) @serial_delay() #2
ret void
}
declare i32 @serial_input(...) local_unnamed_addr #1
declare i32 @serial_read_pin(...) local_unnamed_addr #1
declare i32 @serial_delay(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/minidox/extr_serial.c_sync_recv.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/minidox/extr_serial.c_sync_recv.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sync_recv], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sync_recv() #0 {
%1 = tail call i32 @serial_input() #2
br label %2
2: ; preds = %2, %0
%3 = tail call i32 @serial_read_pin() #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %2, label %5, !llvm.loop !6
5: ; preds = %2
%6 = tail call i32 @serial_delay() #2
ret void
}
declare i32 @serial_input(...) local_unnamed_addr #1
declare i32 @serial_read_pin(...) local_unnamed_addr #1
declare i32 @serial_delay(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
|
qmk_firmware_keyboards_minidox_extr_serial.c_sync_recv
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_isar.c_setup_pump.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_isar.c_setup_pump.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.BCState = type { i32, i32, %struct.TYPE_4__, ptr }
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32, i32, i32, i32 }
@ISAR_HIS_PUMPCFG = dso_local local_unnamed_addr global i32 0, align 4
@PMOD_BYPASS = dso_local local_unnamed_addr global i32 0, align 4
@PMOD_DATAMODEM = dso_local local_unnamed_addr global i32 0, align 4
@BC_FLG_ORIG = dso_local local_unnamed_addr global i32 0, align 4
@PCTRL_ORIG = dso_local local_unnamed_addr global i32 0, align 4
@PV32P6_CTN = dso_local local_unnamed_addr global i32 0, align 4
@PV32P6_ATN = dso_local local_unnamed_addr global i32 0, align 4
@para_TOA = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_V23R = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_V22A = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_V22B = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_V22C = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_V21 = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_BEL = dso_local local_unnamed_addr global i32 0, align 4
@PV32P3_AMOD = dso_local local_unnamed_addr global i32 0, align 4
@PV32P3_V32B = dso_local local_unnamed_addr global i32 0, align 4
@PV32P3_V23B = dso_local local_unnamed_addr global i32 0, align 4
@PV32P4_UT144 = dso_local local_unnamed_addr global i32 0, align 4
@PV32P5_UT144 = dso_local local_unnamed_addr global i32 0, align 4
@PMOD_FAX = dso_local local_unnamed_addr global i32 0, align 4
@PFAXP2_CTN = dso_local local_unnamed_addr global i32 0, align 4
@PFAXP2_ATN = dso_local local_unnamed_addr global i32 0, align 4
@STFAX_NULL = dso_local local_unnamed_addr global i32 0, align 4
@BC_FLG_FTI_RUN = dso_local local_unnamed_addr global i32 0, align 4
@ISAR_HIS_PSTREQ = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @setup_pump], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @setup_pump(ptr noundef %0) #0 {
%2 = alloca [6 x i32], align 16
%3 = getelementptr inbounds %struct.BCState, ptr %0, i64 0, i32 3
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.BCState, ptr %0, i64 0, i32 2, i32 0, i32 3
%6 = load i32, ptr %5, align 4, !tbaa !13
%7 = tail call i32 @SET_DPS(i32 noundef %6) #3
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3
%8 = load i32, ptr %0, align 8, !tbaa !14
switch i32 %8, label %76 [
i32 130, label %9
i32 129, label %9
i32 131, label %9
i32 128, label %14
i32 132, label %53
]
9: ; preds = %1, %1, %1
%10 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !15
%11 = or i32 %10, %7
%12 = load i32, ptr @PMOD_BYPASS, align 4, !tbaa !15
%13 = tail call i32 @sendmsg(ptr noundef %4, i32 noundef %11, i32 noundef %12, i32 noundef 0, ptr noundef null) #3
br label %76
14: ; preds = %1
%15 = load i32, ptr @PMOD_DATAMODEM, align 4, !tbaa !15
%16 = load i32, ptr @BC_FLG_ORIG, align 4, !tbaa !15
%17 = getelementptr inbounds %struct.BCState, ptr %0, i64 0, i32 1
%18 = tail call i32 @test_bit(i32 noundef %16, ptr noundef nonnull %17) #3
%19 = icmp eq i32 %18, 0
%20 = load i32, ptr @PCTRL_ORIG, align 4
%21 = select i1 %19, i32 0, i32 %20
%22 = or i32 %15, %21
%23 = load i32, ptr @PV32P6_ATN, align 4
%24 = load i32, ptr @PV32P6_CTN, align 4
%25 = select i1 %19, i32 %23, i32 %24
%26 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 5
store i32 %25, ptr %26, align 4
%27 = load i32, ptr @para_TOA, align 4, !tbaa !15
store i32 %27, ptr %2, align 16, !tbaa !15
%28 = load i32, ptr @PV32P2_V23R, align 4, !tbaa !15
%29 = load i32, ptr @PV32P2_V22A, align 4, !tbaa !15
%30 = or i32 %29, %28
%31 = load i32, ptr @PV32P2_V22B, align 4, !tbaa !15
%32 = or i32 %30, %31
%33 = load i32, ptr @PV32P2_V22C, align 4, !tbaa !15
%34 = or i32 %32, %33
%35 = load i32, ptr @PV32P2_V21, align 4, !tbaa !15
%36 = or i32 %34, %35
%37 = load i32, ptr @PV32P2_BEL, align 4, !tbaa !15
%38 = or i32 %36, %37
%39 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 1
store i32 %38, ptr %39, align 4, !tbaa !15
%40 = load i32, ptr @PV32P3_AMOD, align 4, !tbaa !15
%41 = load i32, ptr @PV32P3_V32B, align 4, !tbaa !15
%42 = or i32 %41, %40
%43 = load i32, ptr @PV32P3_V23B, align 4, !tbaa !15
%44 = or i32 %42, %43
%45 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 2
store i32 %44, ptr %45, align 8, !tbaa !15
%46 = load i32, ptr @PV32P4_UT144, align 4, !tbaa !15
%47 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 3
store i32 %46, ptr %47, align 4, !tbaa !15
%48 = load i32, ptr @PV32P5_UT144, align 4, !tbaa !15
%49 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 4
store i32 %48, ptr %49, align 16, !tbaa !15
%50 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !15
%51 = or i32 %50, %7
%52 = call i32 @sendmsg(ptr noundef %4, i32 noundef %51, i32 noundef %22, i32 noundef 6, ptr noundef nonnull %2) #3
br label %76
53: ; preds = %1
%54 = getelementptr inbounds %struct.BCState, ptr %0, i64 0, i32 2
%55 = load i32, ptr @PMOD_FAX, align 4, !tbaa !15
%56 = load i32, ptr @BC_FLG_ORIG, align 4, !tbaa !15
%57 = getelementptr inbounds %struct.BCState, ptr %0, i64 0, i32 1
%58 = tail call i32 @test_bit(i32 noundef %56, ptr noundef nonnull %57) #3
%59 = icmp eq i32 %58, 0
%60 = load i32, ptr @PCTRL_ORIG, align 4
%61 = select i1 %59, i32 0, i32 %60
%62 = or i32 %55, %61
%63 = load i32, ptr @PFAXP2_ATN, align 4
%64 = load i32, ptr @PFAXP2_CTN, align 4
%65 = select i1 %59, i32 %63, i32 %64
%66 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 1
store i32 %65, ptr %66, align 4
%67 = load i32, ptr @para_TOA, align 4, !tbaa !15
store i32 %67, ptr %2, align 16, !tbaa !15
%68 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !15
%69 = or i32 %68, %7
%70 = call i32 @sendmsg(ptr noundef %4, i32 noundef %69, i32 noundef %62, i32 noundef 2, ptr noundef nonnull %2) #3
%71 = load i32, ptr @STFAX_NULL, align 4, !tbaa !15
%72 = getelementptr inbounds %struct.BCState, ptr %0, i64 0, i32 2, i32 0, i32 2
store i32 %71, ptr %72, align 8, !tbaa !16
%73 = getelementptr inbounds %struct.BCState, ptr %0, i64 0, i32 2, i32 0, i32 1
store i32 0, ptr %73, align 4, !tbaa !17
store i32 0, ptr %54, align 8, !tbaa !18
%74 = load i32, ptr @BC_FLG_FTI_RUN, align 4, !tbaa !15
%75 = call i32 @test_and_set_bit(i32 noundef %74, ptr noundef nonnull %57) #3
br label %76
76: ; preds = %1, %53, %14, %9
%77 = call i32 @udelay(i32 noundef 1000) #3
%78 = load i32, ptr @ISAR_HIS_PSTREQ, align 4, !tbaa !15
%79 = or i32 %78, %7
%80 = call i32 @sendmsg(ptr noundef %4, i32 noundef %79, i32 noundef 0, i32 noundef 0, ptr noundef null) #3
%81 = call i32 @udelay(i32 noundef 1000) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SET_DPS(i32 noundef) local_unnamed_addr #2
declare i32 @sendmsg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @test_and_set_bit(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @udelay(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 24}
!6 = !{!"BCState", !7, i64 0, !7, i64 4, !10, i64 8, !12, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_4__", !11, i64 0}
!11 = !{!"TYPE_3__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !7, i64 20}
!14 = !{!6, !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{!6, !7, i64 16}
!17 = !{!6, !7, i64 12}
!18 = !{!6, !7, i64 8}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_isar.c_setup_pump.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_isar.c_setup_pump.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ISAR_HIS_PUMPCFG = common local_unnamed_addr global i32 0, align 4
@PMOD_BYPASS = common local_unnamed_addr global i32 0, align 4
@PMOD_DATAMODEM = common local_unnamed_addr global i32 0, align 4
@BC_FLG_ORIG = common local_unnamed_addr global i32 0, align 4
@PCTRL_ORIG = common local_unnamed_addr global i32 0, align 4
@PV32P6_CTN = common local_unnamed_addr global i32 0, align 4
@PV32P6_ATN = common local_unnamed_addr global i32 0, align 4
@para_TOA = common local_unnamed_addr global i32 0, align 4
@PV32P2_V23R = common local_unnamed_addr global i32 0, align 4
@PV32P2_V22A = common local_unnamed_addr global i32 0, align 4
@PV32P2_V22B = common local_unnamed_addr global i32 0, align 4
@PV32P2_V22C = common local_unnamed_addr global i32 0, align 4
@PV32P2_V21 = common local_unnamed_addr global i32 0, align 4
@PV32P2_BEL = common local_unnamed_addr global i32 0, align 4
@PV32P3_AMOD = common local_unnamed_addr global i32 0, align 4
@PV32P3_V32B = common local_unnamed_addr global i32 0, align 4
@PV32P3_V23B = common local_unnamed_addr global i32 0, align 4
@PV32P4_UT144 = common local_unnamed_addr global i32 0, align 4
@PV32P5_UT144 = common local_unnamed_addr global i32 0, align 4
@PMOD_FAX = common local_unnamed_addr global i32 0, align 4
@PFAXP2_CTN = common local_unnamed_addr global i32 0, align 4
@PFAXP2_ATN = common local_unnamed_addr global i32 0, align 4
@STFAX_NULL = common local_unnamed_addr global i32 0, align 4
@BC_FLG_FTI_RUN = common local_unnamed_addr global i32 0, align 4
@ISAR_HIS_PSTREQ = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @setup_pump], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @setup_pump(ptr noundef %0) #0 {
%2 = alloca [6 x i32], align 4
%3 = getelementptr inbounds i8, ptr %0, i64 24
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 20
%6 = load i32, ptr %5, align 4, !tbaa !14
%7 = tail call i32 @SET_DPS(i32 noundef %6) #3
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3
%8 = load i32, ptr %0, align 8, !tbaa !15
switch i32 %8, label %75 [
i32 130, label %9
i32 129, label %9
i32 131, label %9
i32 128, label %14
i32 132, label %53
]
9: ; preds = %1, %1, %1
%10 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !16
%11 = or i32 %10, %7
%12 = load i32, ptr @PMOD_BYPASS, align 4, !tbaa !16
%13 = tail call i32 @sendmsg(ptr noundef %4, i32 noundef %11, i32 noundef %12, i32 noundef 0, ptr noundef null) #3
br label %75
14: ; preds = %1
%15 = load i32, ptr @PMOD_DATAMODEM, align 4, !tbaa !16
%16 = load i32, ptr @BC_FLG_ORIG, align 4, !tbaa !16
%17 = getelementptr inbounds i8, ptr %0, i64 4
%18 = tail call i32 @test_bit(i32 noundef %16, ptr noundef nonnull %17) #3
%19 = icmp eq i32 %18, 0
%20 = load i32, ptr @PCTRL_ORIG, align 4
%21 = select i1 %19, i32 0, i32 %20
%22 = or i32 %15, %21
%23 = load i32, ptr @PV32P6_ATN, align 4
%24 = load i32, ptr @PV32P6_CTN, align 4
%25 = select i1 %19, i32 %23, i32 %24
%26 = getelementptr inbounds i8, ptr %2, i64 20
store i32 %25, ptr %26, align 4
%27 = load i32, ptr @para_TOA, align 4, !tbaa !16
store i32 %27, ptr %2, align 4, !tbaa !16
%28 = load i32, ptr @PV32P2_V23R, align 4, !tbaa !16
%29 = load i32, ptr @PV32P2_V22A, align 4, !tbaa !16
%30 = or i32 %29, %28
%31 = load i32, ptr @PV32P2_V22B, align 4, !tbaa !16
%32 = or i32 %30, %31
%33 = load i32, ptr @PV32P2_V22C, align 4, !tbaa !16
%34 = or i32 %32, %33
%35 = load i32, ptr @PV32P2_V21, align 4, !tbaa !16
%36 = or i32 %34, %35
%37 = load i32, ptr @PV32P2_BEL, align 4, !tbaa !16
%38 = or i32 %36, %37
%39 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %38, ptr %39, align 4, !tbaa !16
%40 = load i32, ptr @PV32P3_AMOD, align 4, !tbaa !16
%41 = load i32, ptr @PV32P3_V32B, align 4, !tbaa !16
%42 = or i32 %41, %40
%43 = load i32, ptr @PV32P3_V23B, align 4, !tbaa !16
%44 = or i32 %42, %43
%45 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %44, ptr %45, align 4, !tbaa !16
%46 = load i32, ptr @PV32P4_UT144, align 4, !tbaa !16
%47 = getelementptr inbounds i8, ptr %2, i64 12
store i32 %46, ptr %47, align 4, !tbaa !16
%48 = load i32, ptr @PV32P5_UT144, align 4, !tbaa !16
%49 = getelementptr inbounds i8, ptr %2, i64 16
store i32 %48, ptr %49, align 4, !tbaa !16
%50 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !16
%51 = or i32 %50, %7
%52 = call i32 @sendmsg(ptr noundef %4, i32 noundef %51, i32 noundef %22, i32 noundef 6, ptr noundef nonnull %2) #3
br label %75
53: ; preds = %1
%54 = getelementptr inbounds i8, ptr %0, i64 8
%55 = load i32, ptr @PMOD_FAX, align 4, !tbaa !16
%56 = load i32, ptr @BC_FLG_ORIG, align 4, !tbaa !16
%57 = getelementptr inbounds i8, ptr %0, i64 4
%58 = tail call i32 @test_bit(i32 noundef %56, ptr noundef nonnull %57) #3
%59 = icmp eq i32 %58, 0
%60 = load i32, ptr @PCTRL_ORIG, align 4
%61 = select i1 %59, i32 0, i32 %60
%62 = or i32 %55, %61
%63 = load i32, ptr @PFAXP2_ATN, align 4
%64 = load i32, ptr @PFAXP2_CTN, align 4
%65 = select i1 %59, i32 %63, i32 %64
%66 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %65, ptr %66, align 4
%67 = load i32, ptr @para_TOA, align 4, !tbaa !16
store i32 %67, ptr %2, align 4, !tbaa !16
%68 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !16
%69 = or i32 %68, %7
%70 = call i32 @sendmsg(ptr noundef %4, i32 noundef %69, i32 noundef %62, i32 noundef 2, ptr noundef nonnull %2) #3
%71 = load i32, ptr @STFAX_NULL, align 4, !tbaa !16
%72 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %71, ptr %72, align 8, !tbaa !17
store <2 x i32> zeroinitializer, ptr %54, align 8, !tbaa !16
%73 = load i32, ptr @BC_FLG_FTI_RUN, align 4, !tbaa !16
%74 = call i32 @test_and_set_bit(i32 noundef %73, ptr noundef nonnull %57) #3
br label %75
75: ; preds = %1, %53, %14, %9
%76 = call i32 @udelay(i32 noundef 1000) #3
%77 = load i32, ptr @ISAR_HIS_PSTREQ, align 4, !tbaa !16
%78 = or i32 %77, %7
%79 = call i32 @sendmsg(ptr noundef %4, i32 noundef %78, i32 noundef 0, i32 noundef 0, ptr noundef null) #3
%80 = call i32 @udelay(i32 noundef 1000) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SET_DPS(i32 noundef) local_unnamed_addr #2
declare i32 @sendmsg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @test_and_set_bit(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @udelay(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 24}
!7 = !{!"BCState", !8, i64 0, !8, i64 4, !11, i64 8, !13, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!7, !8, i64 20}
!15 = !{!7, !8, i64 0}
!16 = !{!8, !8, i64 0}
!17 = !{!7, !8, i64 16}
|
fastsocket_kernel_drivers_isdn_hisax_extr_isar.c_setup_pump
|
; ModuleID = 'AnghaBench/lede/target/linux/generic/files/drivers/net/phy/extr_ar8216.c_ar8xxx_sw_get_vlan.c'
source_filename = "AnghaBench/lede/target/linux/generic/files/drivers/net/phy/extr_ar8216.c_ar8xxx_sw_get_vlan.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @ar8xxx_sw_get_vlan(ptr noundef %0, ptr nocapture noundef readnone %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = tail call ptr @swdev_to_ar8xxx(ptr noundef %0) #2
%5 = load i32, ptr %4, align 4, !tbaa !5
store i32 %5, ptr %2, align 4, !tbaa !10
ret i32 0
}
declare ptr @swdev_to_ar8xxx(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ar8xxx_priv", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"switch_val", !12, i64 0}
!12 = !{!"TYPE_2__", !7, i64 0}
|
; ModuleID = 'AnghaBench/lede/target/linux/generic/files/drivers/net/phy/extr_ar8216.c_ar8xxx_sw_get_vlan.c'
source_filename = "AnghaBench/lede/target/linux/generic/files/drivers/net/phy/extr_ar8216.c_ar8xxx_sw_get_vlan.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @ar8xxx_sw_get_vlan(ptr noundef %0, ptr nocapture noundef readnone %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = tail call ptr @swdev_to_ar8xxx(ptr noundef %0) #2
%5 = load i32, ptr %4, align 4, !tbaa !6
store i32 %5, ptr %2, align 4, !tbaa !11
ret i32 0
}
declare ptr @swdev_to_ar8xxx(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ar8xxx_priv", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"switch_val", !13, i64 0}
!13 = !{!"TYPE_2__", !8, i64 0}
|
lede_target_linux_generic_files_drivers_net_phy_extr_ar8216.c_ar8xxx_sw_get_vlan
|
; ModuleID = 'AnghaBench/radare2/libr/core/extr_cconfig.c_cb_analgraphdepth.c'
source_filename = "AnghaBench/radare2/libr/core/extr_cconfig.c_cb_analgraphdepth.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @cb_analgraphdepth], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable
define internal noundef i32 @cb_analgraphdepth(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %1, align 4, !tbaa !5
%4 = load ptr, ptr %0, align 8, !tbaa !10
store i32 %3, ptr %4, align 4, !tbaa !13
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_8__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_7__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_6__", !15, i64 0}
!15 = !{!"TYPE_5__", !7, i64 0}
|
; ModuleID = 'AnghaBench/radare2/libr/core/extr_cconfig.c_cb_analgraphdepth.c'
source_filename = "AnghaBench/radare2/libr/core/extr_cconfig.c_cb_analgraphdepth.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cb_analgraphdepth], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal noundef i32 @cb_analgraphdepth(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %1, align 4, !tbaa !6
%4 = load ptr, ptr %0, align 8, !tbaa !11
store i32 %3, ptr %4, align 4, !tbaa !14
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_8__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_7__", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"TYPE_6__", !16, i64 0}
!16 = !{!"TYPE_5__", !8, i64 0}
|
radare2_libr_core_extr_cconfig.c_cb_analgraphdepth
|
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/rsaenh/extr_rsaenh.c_test_prov.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/rsaenh/extr_rsaenh.c_test_prov.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@hProv = dso_local local_unnamed_addr global i32 0, align 4
@PP_SIG_KEYSIZE_INC = dso_local local_unnamed_addr global i32 0, align 4
@NTE_BAD_TYPE = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [51 x i8] c"PP_SIG_KEYSIZE_INC is not supported (win9x or NT)\0A\00", align 1
@nt4 = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [10 x i8] c"%08x, %d\0A\00", align 1
@PP_KEYX_KEYSIZE_INC = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [52 x i8] c"PP_KEYX_KEYSIZE_INC is not supported (win9x or NT)\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @test_prov], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @test_prov() #0 {
%1 = alloca i32, align 4
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 4, ptr %1, align 4, !tbaa !5
%3 = tail call i32 @SetLastError(i32 noundef -559038737) #3
%4 = load i32, ptr @hProv, align 4, !tbaa !5
%5 = load i32, ptr @PP_SIG_KEYSIZE_INC, align 4, !tbaa !5
%6 = call i64 @CryptGetProvParam(i32 noundef %4, i32 noundef %5, ptr noundef nonnull %2, ptr noundef nonnull %1, i32 noundef 0) #3
%7 = icmp ne i64 %6, 0
br i1 %7, label %16, label %8
8: ; preds = %0
%9 = call i64 (...) @GetLastError() #3
%10 = load i64, ptr @NTE_BAD_TYPE, align 8, !tbaa !9
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %16
12: ; preds = %8
%13 = call i32 @skip(ptr noundef nonnull @.str) #3
%14 = load i32, ptr @nt4, align 4, !tbaa !5
%15 = add nsw i32 %14, 1
store i32 %15, ptr @nt4, align 4, !tbaa !5
br label %24
16: ; preds = %8, %0
%17 = load i32, ptr %2, align 4
%18 = icmp eq i32 %17, 8
%19 = select i1 %7, i1 %18, i1 false
%20 = zext i1 %19 to i32
%21 = call i64 (...) @GetLastError() #3
%22 = load i32, ptr %2, align 4, !tbaa !5
%23 = call i32 @ok(i32 noundef %20, ptr noundef nonnull @.str.1, i64 noundef %21, i32 noundef %22) #3
br label %24
24: ; preds = %16, %12
store i32 4, ptr %1, align 4, !tbaa !5
%25 = call i32 @SetLastError(i32 noundef -559038737) #3
%26 = load i32, ptr @hProv, align 4, !tbaa !5
%27 = load i32, ptr @PP_KEYX_KEYSIZE_INC, align 4, !tbaa !5
%28 = call i64 @CryptGetProvParam(i32 noundef %26, i32 noundef %27, ptr noundef nonnull %2, ptr noundef nonnull %1, i32 noundef 0) #3
%29 = icmp ne i64 %28, 0
br i1 %29, label %36, label %30
30: ; preds = %24
%31 = call i64 (...) @GetLastError() #3
%32 = load i64, ptr @NTE_BAD_TYPE, align 8, !tbaa !9
%33 = icmp eq i64 %31, %32
br i1 %33, label %34, label %36
34: ; preds = %30
%35 = call i32 @skip(ptr noundef nonnull @.str.2) #3
br label %44
36: ; preds = %30, %24
%37 = load i32, ptr %2, align 4
%38 = icmp eq i32 %37, 8
%39 = select i1 %29, i1 %38, i1 false
%40 = zext i1 %39 to i32
%41 = call i64 (...) @GetLastError() #3
%42 = load i32, ptr %2, align 4, !tbaa !5
%43 = call i32 @ok(i32 noundef %40, ptr noundef nonnull @.str.1, i64 noundef %41, i32 noundef %42) #3
br label %44
44: ; preds = %36, %34
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SetLastError(i32 noundef) local_unnamed_addr #2
declare i64 @CryptGetProvParam(i32 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @GetLastError(...) local_unnamed_addr #2
declare i32 @skip(ptr noundef) local_unnamed_addr #2
declare i32 @ok(i32 noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/rsaenh/extr_rsaenh.c_test_prov.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/rsaenh/extr_rsaenh.c_test_prov.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@hProv = common local_unnamed_addr global i32 0, align 4
@PP_SIG_KEYSIZE_INC = common local_unnamed_addr global i32 0, align 4
@NTE_BAD_TYPE = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [51 x i8] c"PP_SIG_KEYSIZE_INC is not supported (win9x or NT)\0A\00", align 1
@nt4 = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [10 x i8] c"%08x, %d\0A\00", align 1
@PP_KEYX_KEYSIZE_INC = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [52 x i8] c"PP_KEYX_KEYSIZE_INC is not supported (win9x or NT)\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @test_prov], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @test_prov() #0 {
%1 = alloca i32, align 4
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 4, ptr %1, align 4, !tbaa !6
%3 = tail call i32 @SetLastError(i32 noundef -559038737) #3
%4 = load i32, ptr @hProv, align 4, !tbaa !6
%5 = load i32, ptr @PP_SIG_KEYSIZE_INC, align 4, !tbaa !6
%6 = call i64 @CryptGetProvParam(i32 noundef %4, i32 noundef %5, ptr noundef nonnull %2, ptr noundef nonnull %1, i32 noundef 0) #3
%7 = icmp ne i64 %6, 0
br i1 %7, label %16, label %8
8: ; preds = %0
%9 = call i64 @GetLastError() #3
%10 = load i64, ptr @NTE_BAD_TYPE, align 8, !tbaa !10
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %16
12: ; preds = %8
%13 = call i32 @skip(ptr noundef nonnull @.str) #3
%14 = load i32, ptr @nt4, align 4, !tbaa !6
%15 = add nsw i32 %14, 1
store i32 %15, ptr @nt4, align 4, !tbaa !6
br label %24
16: ; preds = %8, %0
%17 = load i32, ptr %2, align 4
%18 = icmp eq i32 %17, 8
%19 = select i1 %7, i1 %18, i1 false
%20 = zext i1 %19 to i32
%21 = call i64 @GetLastError() #3
%22 = load i32, ptr %2, align 4, !tbaa !6
%23 = call i32 @ok(i32 noundef %20, ptr noundef nonnull @.str.1, i64 noundef %21, i32 noundef %22) #3
br label %24
24: ; preds = %16, %12
store i32 4, ptr %1, align 4, !tbaa !6
%25 = call i32 @SetLastError(i32 noundef -559038737) #3
%26 = load i32, ptr @hProv, align 4, !tbaa !6
%27 = load i32, ptr @PP_KEYX_KEYSIZE_INC, align 4, !tbaa !6
%28 = call i64 @CryptGetProvParam(i32 noundef %26, i32 noundef %27, ptr noundef nonnull %2, ptr noundef nonnull %1, i32 noundef 0) #3
%29 = icmp ne i64 %28, 0
br i1 %29, label %36, label %30
30: ; preds = %24
%31 = call i64 @GetLastError() #3
%32 = load i64, ptr @NTE_BAD_TYPE, align 8, !tbaa !10
%33 = icmp eq i64 %31, %32
br i1 %33, label %34, label %36
34: ; preds = %30
%35 = call i32 @skip(ptr noundef nonnull @.str.2) #3
br label %44
36: ; preds = %30, %24
%37 = load i32, ptr %2, align 4
%38 = icmp eq i32 %37, 8
%39 = select i1 %29, i1 %38, i1 false
%40 = zext i1 %39 to i32
%41 = call i64 @GetLastError() #3
%42 = load i32, ptr %2, align 4, !tbaa !6
%43 = call i32 @ok(i32 noundef %40, ptr noundef nonnull @.str.1, i64 noundef %41, i32 noundef %42) #3
br label %44
44: ; preds = %36, %34
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SetLastError(i32 noundef) local_unnamed_addr #2
declare i64 @CryptGetProvParam(i32 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @GetLastError(...) local_unnamed_addr #2
declare i32 @skip(ptr noundef) local_unnamed_addr #2
declare i32 @ok(i32 noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
|
reactos_modules_rostests_winetests_rsaenh_extr_rsaenh.c_test_prov
|
; ModuleID = 'AnghaBench/freebsd/contrib/pf/ftp-proxy/extr_ftp-proxy.c_client_parse.c'
source_filename = "AnghaBench/freebsd/contrib/pf/ftp-proxy/extr_ftp-proxy.c_client_parse.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.session = type { i64, i64 }
@CMD_NONE = dso_local local_unnamed_addr global i64 0, align 8
@linelen = dso_local local_unnamed_addr global i32 0, align 4
@linebuf = dso_local local_unnamed_addr global ptr null, align 8
@CMD_PORT = dso_local local_unnamed_addr global i64 0, align 8
@CMD_EPRT = dso_local local_unnamed_addr global i64 0, align 8
@anonymous_only = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @client_parse(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i64, ptr @CMD_NONE, align 8, !tbaa !5
store i64 %2, ptr %0, align 8, !tbaa !9
%3 = getelementptr inbounds %struct.session, ptr %0, i64 0, i32 1
store i64 0, ptr %3, align 8, !tbaa !11
%4 = load i32, ptr @linelen, align 4, !tbaa !12
%5 = icmp slt i32 %4, 4
br i1 %5, label %29, label %6
6: ; preds = %1
%7 = load ptr, ptr @linebuf, align 8, !tbaa !14
%8 = load i8, ptr %7, align 1, !tbaa !16
switch i8 %8, label %21 [
i8 80, label %9
i8 112, label %9
i8 69, label %9
i8 101, label %9
]
9: ; preds = %6, %6, %6, %6
%10 = tail call i32 @client_parse_cmd(ptr noundef nonnull %0) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %29, label %12
12: ; preds = %9
%13 = load i64, ptr %0, align 8, !tbaa !9
%14 = load i64, ptr @CMD_PORT, align 8, !tbaa !5
%15 = icmp eq i64 %13, %14
%16 = load i64, ptr @CMD_EPRT, align 8
%17 = icmp eq i64 %13, %16
%18 = select i1 %15, i1 true, i1 %17
br i1 %18, label %19, label %21
19: ; preds = %12
%20 = tail call i32 @allow_data_connection(ptr noundef nonnull %0) #2
br label %29
21: ; preds = %12, %6
%22 = load i64, ptr @anonymous_only, align 8, !tbaa !5
%23 = icmp eq i64 %22, 0
br i1 %23, label %29, label %24
24: ; preds = %21
%25 = load ptr, ptr @linebuf, align 8, !tbaa !14
%26 = load i8, ptr %25, align 1, !tbaa !16
switch i8 %26, label %29 [
i8 85, label %27
i8 117, label %27
]
27: ; preds = %24, %24
%28 = tail call i32 @client_parse_anon(ptr noundef nonnull %0) #2
br label %29
29: ; preds = %21, %24, %9, %1, %27, %19
%30 = phi i32 [ %20, %19 ], [ %28, %27 ], [ 1, %1 ], [ 0, %9 ], [ 1, %24 ], [ 1, %21 ]
ret i32 %30
}
declare i32 @client_parse_cmd(ptr noundef) local_unnamed_addr #1
declare i32 @allow_data_connection(ptr noundef) local_unnamed_addr #1
declare i32 @client_parse_anon(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"session", !6, i64 0, !6, i64 8}
!11 = !{!10, !6, i64 8}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/pf/ftp-proxy/extr_ftp-proxy.c_client_parse.c'
source_filename = "AnghaBench/freebsd/contrib/pf/ftp-proxy/extr_ftp-proxy.c_client_parse.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CMD_NONE = common local_unnamed_addr global i64 0, align 8
@linelen = common local_unnamed_addr global i32 0, align 4
@linebuf = common local_unnamed_addr global ptr null, align 8
@CMD_PORT = common local_unnamed_addr global i64 0, align 8
@CMD_EPRT = common local_unnamed_addr global i64 0, align 8
@anonymous_only = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @client_parse(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i64, ptr @CMD_NONE, align 8, !tbaa !6
store i64 %2, ptr %0, align 8, !tbaa !10
%3 = getelementptr inbounds i8, ptr %0, i64 8
store i64 0, ptr %3, align 8, !tbaa !12
%4 = load i32, ptr @linelen, align 4, !tbaa !13
%5 = icmp slt i32 %4, 4
br i1 %5, label %29, label %6
6: ; preds = %1
%7 = load ptr, ptr @linebuf, align 8, !tbaa !15
%8 = load i8, ptr %7, align 1, !tbaa !17
switch i8 %8, label %21 [
i8 80, label %9
i8 112, label %9
i8 69, label %9
i8 101, label %9
]
9: ; preds = %6, %6, %6, %6
%10 = tail call i32 @client_parse_cmd(ptr noundef nonnull %0) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %29, label %12
12: ; preds = %9
%13 = load i64, ptr %0, align 8, !tbaa !10
%14 = load i64, ptr @CMD_PORT, align 8, !tbaa !6
%15 = icmp eq i64 %13, %14
%16 = load i64, ptr @CMD_EPRT, align 8
%17 = icmp eq i64 %13, %16
%18 = select i1 %15, i1 true, i1 %17
br i1 %18, label %19, label %21
19: ; preds = %12
%20 = tail call i32 @allow_data_connection(ptr noundef nonnull %0) #2
br label %29
21: ; preds = %12, %6
%22 = load i64, ptr @anonymous_only, align 8, !tbaa !6
%23 = icmp eq i64 %22, 0
br i1 %23, label %29, label %24
24: ; preds = %21
%25 = load ptr, ptr @linebuf, align 8, !tbaa !15
%26 = load i8, ptr %25, align 1, !tbaa !17
switch i8 %26, label %29 [
i8 85, label %27
i8 117, label %27
]
27: ; preds = %24, %24
%28 = tail call i32 @client_parse_anon(ptr noundef nonnull %0) #2
br label %29
29: ; preds = %21, %24, %9, %1, %27, %19
%30 = phi i32 [ %20, %19 ], [ %28, %27 ], [ 1, %1 ], [ 0, %9 ], [ 1, %24 ], [ 1, %21 ]
ret i32 %30
}
declare i32 @client_parse_cmd(ptr noundef) local_unnamed_addr #1
declare i32 @allow_data_connection(ptr noundef) local_unnamed_addr #1
declare i32 @client_parse_anon(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"session", !7, i64 0, !7, i64 8}
!12 = !{!11, !7, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!8, !8, i64 0}
|
freebsd_contrib_pf_ftp-proxy_extr_ftp-proxy.c_client_parse
|
; ModuleID = 'AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_torus.c_safe_x_perpendicular.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_torus.c_safe_x_perpendicular.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @safe_x_perpendicular], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @safe_x_perpendicular(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = tail call i64 @safe_y_ring(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = tail call i64 @safe_z_ring(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %4
%12 = phi i32 [ 0, %4 ], [ %10, %7 ]
ret i32 %12
}
declare i64 @safe_y_ring(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @safe_z_ring(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_torus.c_safe_x_perpendicular.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_torus.c_safe_x_perpendicular.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @safe_x_perpendicular], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @safe_x_perpendicular(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = tail call i64 @safe_y_ring(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = tail call i64 @safe_z_ring(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %4
%12 = phi i32 [ 0, %4 ], [ %10, %7 ]
ret i32 %12
}
declare i64 @safe_y_ring(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @safe_z_ring(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_contrib_ofed_opensm_opensm_extr_osm_torus.c_safe_x_perpendicular
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_bss.c_wpa_bss_set_hessid.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_bss.c_wpa_bss_set_hessid.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ETH_ALEN = dso_local local_unnamed_addr global i32 0, align 4
@WLAN_EID_INTERWORKING = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wpa_bss_set_hessid], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @wpa_bss_set_hessid(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_bss.c_wpa_bss_set_hessid.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_bss.c_wpa_bss_set_hessid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ETH_ALEN = common local_unnamed_addr global i32 0, align 4
@WLAN_EID_INTERWORKING = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wpa_bss_set_hessid], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @wpa_bss_set_hessid(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_contrib_wpa_wpa_supplicant_extr_bss.c_wpa_bss_set_hessid
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_mb86a16.c_sync_chk.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_mb86a16.c_sync_chk.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@verbose = dso_local local_unnamed_addr global i32 0, align 4
@MB86A16_INFO = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [15 x i8] c"Status = %02x,\00", align 1
@MB86A16_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [19 x i8] c"I2C transfer error\00", align 1
@EREMOTEIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sync_chk], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @sync_chk(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = alloca i8, align 1
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #3
%4 = call i32 @mb86a16_read(ptr noundef %0, i32 noundef 13, ptr noundef nonnull %3) #3
%5 = icmp eq i32 %4, 2
%6 = load i32, ptr @verbose, align 4, !tbaa !5
br i1 %5, label %7, label %17
7: ; preds = %2
%8 = load i32, ptr @MB86A16_INFO, align 4, !tbaa !5
%9 = load i8, ptr %3, align 1, !tbaa !9
%10 = zext i8 %9 to i32
%11 = call i32 (i32, i32, i32, ptr, ...) @dprintk(i32 noundef %6, i32 noundef %8, i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %10) #3
%12 = load i8, ptr %3, align 1, !tbaa !9
%13 = and i8 %12, 1
%14 = zext nneg i8 %13 to i32
%15 = lshr i8 %12, 2
%16 = and i8 %15, 7
store i8 %16, ptr %1, align 1, !tbaa !9
br label %22
17: ; preds = %2
%18 = load i32, ptr @MB86A16_ERROR, align 4, !tbaa !5
%19 = call i32 (i32, i32, i32, ptr, ...) @dprintk(i32 noundef %6, i32 noundef %18, i32 noundef 1, ptr noundef nonnull @.str.1) #3
%20 = load i32, ptr @EREMOTEIO, align 4, !tbaa !5
%21 = sub nsw i32 0, %20
br label %22
22: ; preds = %17, %7
%23 = phi i32 [ %21, %17 ], [ %14, %7 ]
call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @mb86a16_read(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dprintk(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_mb86a16.c_sync_chk.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_mb86a16.c_sync_chk.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@verbose = common local_unnamed_addr global i32 0, align 4
@MB86A16_INFO = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [15 x i8] c"Status = %02x,\00", align 1
@MB86A16_ERROR = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [19 x i8] c"I2C transfer error\00", align 1
@EREMOTEIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sync_chk], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @sync_chk(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = alloca i8, align 1
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #3
%4 = call i32 @mb86a16_read(ptr noundef %0, i32 noundef 13, ptr noundef nonnull %3) #3
%5 = icmp eq i32 %4, 2
%6 = load i32, ptr @verbose, align 4, !tbaa !6
br i1 %5, label %7, label %17
7: ; preds = %2
%8 = load i32, ptr @MB86A16_INFO, align 4, !tbaa !6
%9 = load i8, ptr %3, align 1, !tbaa !10
%10 = zext i8 %9 to i32
%11 = call i32 (i32, i32, i32, ptr, ...) @dprintk(i32 noundef %6, i32 noundef %8, i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %10) #3
%12 = load i8, ptr %3, align 1, !tbaa !10
%13 = and i8 %12, 1
%14 = zext nneg i8 %13 to i32
%15 = lshr i8 %12, 2
%16 = and i8 %15, 7
store i8 %16, ptr %1, align 1, !tbaa !10
br label %22
17: ; preds = %2
%18 = load i32, ptr @MB86A16_ERROR, align 4, !tbaa !6
%19 = call i32 (i32, i32, i32, ptr, ...) @dprintk(i32 noundef %6, i32 noundef %18, i32 noundef 1, ptr noundef nonnull @.str.1) #3
%20 = load i32, ptr @EREMOTEIO, align 4, !tbaa !6
%21 = sub nsw i32 0, %20
br label %22
22: ; preds = %17, %7
%23 = phi i32 [ %21, %17 ], [ %14, %7 ]
call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @mb86a16_read(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dprintk(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
|
fastsocket_kernel_drivers_media_dvb_frontends_extr_mb86a16.c_sync_chk
|
; ModuleID = 'AnghaBench/linux/drivers/clk/zynqmp/extr_clkc.c_zynqmp_pm_clock_get_name.c'
source_filename = "AnghaBench/linux/drivers/clk/zynqmp/extr_clkc.c_zynqmp_pm_clock_get_name.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PAYLOAD_ARG_CNT = dso_local local_unnamed_addr global i32 0, align 4
@PM_QID_CLOCK_GET_NAME = dso_local local_unnamed_addr global i32 0, align 4
@eemi_ops = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @zynqmp_pm_clock_get_name], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @zynqmp_pm_clock_get_name(i32 noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @PAYLOAD_ARG_CNT, align 4, !tbaa !5
%4 = zext i32 %3 to i64
%5 = alloca i32, i64 %4, align 16
%6 = load i32, ptr @PM_QID_CLOCK_GET_NAME, align 4, !tbaa !5
%7 = load ptr, ptr @eemi_ops, align 8, !tbaa !9
%8 = load ptr, ptr %7, align 8, !tbaa !11
%9 = zext i32 %6 to i64
%10 = shl nuw i64 %9, 32
%11 = zext i32 %0 to i64
%12 = or disjoint i64 %10, %11
%13 = call i32 %8(i64 %12, i32 0, ptr noundef nonnull %5) #2
%14 = call i32 @memcpy(ptr noundef %1, ptr noundef nonnull %5, i32 noundef 4) #2
ret i32 0
}
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_2__", !10, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/clk/zynqmp/extr_clkc.c_zynqmp_pm_clock_get_name.c'
source_filename = "AnghaBench/linux/drivers/clk/zynqmp/extr_clkc.c_zynqmp_pm_clock_get_name.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAYLOAD_ARG_CNT = common local_unnamed_addr global i32 0, align 4
@PM_QID_CLOCK_GET_NAME = common local_unnamed_addr global i32 0, align 4
@eemi_ops = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @zynqmp_pm_clock_get_name], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @zynqmp_pm_clock_get_name(i32 noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @PAYLOAD_ARG_CNT, align 4, !tbaa !6
%4 = zext i32 %3 to i64
%5 = alloca i32, i64 %4, align 4
%6 = load i32, ptr @PM_QID_CLOCK_GET_NAME, align 4, !tbaa !6
%7 = load ptr, ptr @eemi_ops, align 8, !tbaa !10
%8 = load ptr, ptr %7, align 8, !tbaa !12
%9 = zext i32 %6 to i64
%10 = shl nuw i64 %9, 32
%11 = zext i32 %0 to i64
%12 = or disjoint i64 %10, %11
%13 = insertvalue [2 x i64] poison, i64 %12, 0
%14 = insertvalue [2 x i64] %13, i64 0, 1
%15 = call i32 %8([2 x i64] %14, ptr noundef nonnull %5) #2
%16 = call i32 @memcpy(ptr noundef %1, ptr noundef nonnull %5, i32 noundef 4) #2
ret i32 0
}
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_2__", !11, i64 0}
|
linux_drivers_clk_zynqmp_extr_clkc.c_zynqmp_pm_clock_get_name
|
; ModuleID = 'AnghaBench/freebsd/sys/mips/atheros/extr_apb.c_apb_release_resource.c'
source_filename = "AnghaBench/freebsd/sys/mips/atheros/extr_apb.c_apb_release_resource.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @apb_release_resource], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @apb_release_resource(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4) #0 {
%6 = tail call ptr @apb_get_resource_list(i32 noundef %0, i32 noundef %1) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = load i32, ptr @EINVAL, align 4, !tbaa !5
br label %17
10: ; preds = %5
%11 = tail call ptr @resource_list_find(ptr noundef nonnull %6, i32 noundef %2, i32 noundef %3) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = load i32, ptr @EINVAL, align 4, !tbaa !5
br label %17
15: ; preds = %10
%16 = tail call i32 @rman_release_resource(ptr noundef %4) #2
store ptr null, ptr %11, align 8, !tbaa !9
br label %17
17: ; preds = %15, %13, %8
%18 = phi i32 [ %9, %8 ], [ %14, %13 ], [ 0, %15 ]
ret i32 %18
}
declare ptr @apb_get_resource_list(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @resource_list_find(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rman_release_resource(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"resource_list_entry", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/mips/atheros/extr_apb.c_apb_release_resource.c'
source_filename = "AnghaBench/freebsd/sys/mips/atheros/extr_apb.c_apb_release_resource.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @apb_release_resource], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @apb_release_resource(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4) #0 {
%6 = tail call ptr @apb_get_resource_list(i32 noundef %0, i32 noundef %1) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = load i32, ptr @EINVAL, align 4, !tbaa !6
br label %17
10: ; preds = %5
%11 = tail call ptr @resource_list_find(ptr noundef nonnull %6, i32 noundef %2, i32 noundef %3) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = load i32, ptr @EINVAL, align 4, !tbaa !6
br label %17
15: ; preds = %10
%16 = tail call i32 @rman_release_resource(ptr noundef %4) #2
store ptr null, ptr %11, align 8, !tbaa !10
br label %17
17: ; preds = %15, %13, %8
%18 = phi i32 [ %9, %8 ], [ %14, %13 ], [ 0, %15 ]
ret i32 %18
}
declare ptr @apb_get_resource_list(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @resource_list_find(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rman_release_resource(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"resource_list_entry", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
|
freebsd_sys_mips_atheros_extr_apb.c_apb_release_resource
|
; ModuleID = 'AnghaBench/freebsd/contrib/openpam/lib/libpam/extr_openpam_strlcat.c_openpam_strlcat.c'
source_filename = "AnghaBench/freebsd/contrib/openpam/lib/libpam/extr_openpam_strlcat.c_openpam_strlcat.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define dso_local i64 @openpam_strlcat(ptr nocapture noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = load i8, ptr %0, align 1, !tbaa !5
%5 = icmp ne i8 %4, 0
%6 = icmp ugt i64 %2, 1
%7 = and i1 %5, %6
br i1 %7, label %16, label %8
8: ; preds = %16, %3
%9 = phi ptr [ %0, %3 ], [ %20, %16 ]
%10 = phi i64 [ %2, %3 ], [ %22, %16 ]
%11 = phi i64 [ 0, %3 ], [ %21, %16 ]
%12 = load i8, ptr %1, align 1, !tbaa !5
%13 = icmp ne i8 %12, 0
%14 = icmp ugt i64 %10, 1
%15 = select i1 %13, i1 %14, i1 false
br i1 %15, label %27, label %41
16: ; preds = %3, %16
%17 = phi i64 [ %21, %16 ], [ 0, %3 ]
%18 = phi i64 [ %22, %16 ], [ %2, %3 ]
%19 = phi ptr [ %20, %16 ], [ %0, %3 ]
%20 = getelementptr inbounds i8, ptr %19, i64 1
%21 = add nuw i64 %17, 1
%22 = add i64 %18, -1
%23 = load i8, ptr %20, align 1, !tbaa !5
%24 = icmp ne i8 %23, 0
%25 = icmp ugt i64 %22, 1
%26 = select i1 %24, i1 %25, i1 false
br i1 %26, label %16, label %8, !llvm.loop !8
27: ; preds = %8, %27
%28 = phi i8 [ %37, %27 ], [ %12, %8 ]
%29 = phi i64 [ %35, %27 ], [ %11, %8 ]
%30 = phi i64 [ %36, %27 ], [ %10, %8 ]
%31 = phi ptr [ %33, %27 ], [ %1, %8 ]
%32 = phi ptr [ %34, %27 ], [ %9, %8 ]
%33 = getelementptr inbounds i8, ptr %31, i64 1
%34 = getelementptr inbounds i8, ptr %32, i64 1
store i8 %28, ptr %32, align 1, !tbaa !5
%35 = add i64 %29, 1
%36 = add i64 %30, -1
%37 = load i8, ptr %33, align 1, !tbaa !5
%38 = icmp ne i8 %37, 0
%39 = icmp ugt i64 %36, 1
%40 = select i1 %38, i1 %39, i1 false
br i1 %40, label %27, label %41, !llvm.loop !10
41: ; preds = %27, %8
%42 = phi ptr [ %9, %8 ], [ %34, %27 ]
%43 = phi ptr [ %1, %8 ], [ %33, %27 ]
%44 = phi i64 [ %11, %8 ], [ %35, %27 ]
store i8 0, ptr %42, align 1, !tbaa !5
%45 = load i8, ptr %43, align 1, !tbaa !5
%46 = icmp eq i8 %45, 0
br i1 %46, label %54, label %47
47: ; preds = %41, %47
%48 = phi i64 [ %50, %47 ], [ %44, %41 ]
%49 = phi ptr [ %51, %47 ], [ %43, %41 ]
%50 = add i64 %48, 1
%51 = getelementptr inbounds i8, ptr %49, i64 1
%52 = load i8, ptr %51, align 1, !tbaa !5
%53 = icmp eq i8 %52, 0
br i1 %53, label %54, label %47, !llvm.loop !11
54: ; preds = %47, %41
%55 = phi i64 [ %44, %41 ], [ %50, %47 ]
ret i64 %55
}
attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}
!11 = distinct !{!11, !9}
|
; ModuleID = 'AnghaBench/freebsd/contrib/openpam/lib/libpam/extr_openpam_strlcat.c_openpam_strlcat.c'
source_filename = "AnghaBench/freebsd/contrib/openpam/lib/libpam/extr_openpam_strlcat.c_openpam_strlcat.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define i64 @openpam_strlcat(ptr nocapture noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = load i8, ptr %0, align 1, !tbaa !6
%5 = icmp ne i8 %4, 0
%6 = icmp ugt i64 %2, 1
%7 = and i1 %5, %6
br i1 %7, label %16, label %8
8: ; preds = %16, %3
%9 = phi ptr [ %0, %3 ], [ %20, %16 ]
%10 = phi i64 [ %2, %3 ], [ %22, %16 ]
%11 = phi i64 [ 0, %3 ], [ %21, %16 ]
%12 = load i8, ptr %1, align 1, !tbaa !6
%13 = icmp ne i8 %12, 0
%14 = icmp ugt i64 %10, 1
%15 = select i1 %13, i1 %14, i1 false
br i1 %15, label %27, label %41
16: ; preds = %3, %16
%17 = phi i64 [ %21, %16 ], [ 0, %3 ]
%18 = phi i64 [ %22, %16 ], [ %2, %3 ]
%19 = phi ptr [ %20, %16 ], [ %0, %3 ]
%20 = getelementptr inbounds i8, ptr %19, i64 1
%21 = add nuw i64 %17, 1
%22 = add i64 %18, -1
%23 = load i8, ptr %20, align 1, !tbaa !6
%24 = icmp ne i8 %23, 0
%25 = icmp ugt i64 %22, 1
%26 = select i1 %24, i1 %25, i1 false
br i1 %26, label %16, label %8, !llvm.loop !9
27: ; preds = %8, %27
%28 = phi i8 [ %37, %27 ], [ %12, %8 ]
%29 = phi i64 [ %35, %27 ], [ %11, %8 ]
%30 = phi i64 [ %36, %27 ], [ %10, %8 ]
%31 = phi ptr [ %33, %27 ], [ %1, %8 ]
%32 = phi ptr [ %34, %27 ], [ %9, %8 ]
%33 = getelementptr inbounds i8, ptr %31, i64 1
%34 = getelementptr inbounds i8, ptr %32, i64 1
store i8 %28, ptr %32, align 1, !tbaa !6
%35 = add i64 %29, 1
%36 = add i64 %30, -1
%37 = load i8, ptr %33, align 1, !tbaa !6
%38 = icmp ne i8 %37, 0
%39 = icmp ugt i64 %36, 1
%40 = select i1 %38, i1 %39, i1 false
br i1 %40, label %27, label %41, !llvm.loop !11
41: ; preds = %27, %8
%42 = phi ptr [ %9, %8 ], [ %34, %27 ]
%43 = phi ptr [ %1, %8 ], [ %33, %27 ]
%44 = phi i64 [ %11, %8 ], [ %35, %27 ]
store i8 0, ptr %42, align 1, !tbaa !6
%45 = load i8, ptr %43, align 1, !tbaa !6
%46 = icmp eq i8 %45, 0
br i1 %46, label %54, label %47
47: ; preds = %41, %47
%48 = phi i64 [ %50, %47 ], [ %44, %41 ]
%49 = phi ptr [ %51, %47 ], [ %43, %41 ]
%50 = add i64 %48, 1
%51 = getelementptr inbounds i8, ptr %49, i64 1
%52 = load i8, ptr %51, align 1, !tbaa !6
%53 = icmp eq i8 %52, 0
br i1 %53, label %54, label %47, !llvm.loop !12
54: ; preds = %47, %41
%55 = phi i64 [ %44, %41 ], [ %50, %47 ]
ret i64 %55
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
|
freebsd_contrib_openpam_lib_libpam_extr_openpam_strlcat.c_openpam_strlcat
|
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_f71805f.c_f71805f_write8.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_f71805f.c_f71805f_write8.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ADDR_REG_OFFSET = dso_local local_unnamed_addr global i64 0, align 8
@DATA_REG_OFFSET = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @f71805f_write8], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @f71805f_write8(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i64, ptr %0, align 8, !tbaa !5
%5 = load i64, ptr @ADDR_REG_OFFSET, align 8, !tbaa !10
%6 = add nsw i64 %5, %4
%7 = tail call i32 @outb(i32 noundef %1, i64 noundef %6) #2
%8 = load i64, ptr %0, align 8, !tbaa !5
%9 = load i64, ptr @DATA_REG_OFFSET, align 8, !tbaa !10
%10 = add nsw i64 %9, %8
%11 = tail call i32 @outb(i32 noundef %2, i64 noundef %10) #2
ret void
}
declare i32 @outb(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"f71805f_data", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_f71805f.c_f71805f_write8.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_f71805f.c_f71805f_write8.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ADDR_REG_OFFSET = common local_unnamed_addr global i64 0, align 8
@DATA_REG_OFFSET = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @f71805f_write8], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @f71805f_write8(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i64, ptr %0, align 8, !tbaa !6
%5 = load i64, ptr @ADDR_REG_OFFSET, align 8, !tbaa !11
%6 = add nsw i64 %5, %4
%7 = tail call i32 @outb(i32 noundef %1, i64 noundef %6) #2
%8 = load i64, ptr %0, align 8, !tbaa !6
%9 = load i64, ptr @DATA_REG_OFFSET, align 8, !tbaa !11
%10 = add nsw i64 %9, %8
%11 = tail call i32 @outb(i32 noundef %2, i64 noundef %10) #2
ret void
}
declare i32 @outb(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"f71805f_data", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
linux_drivers_hwmon_extr_f71805f.c_f71805f_write8
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/botlib/extr_be_aas_bspq3.c_AAS_BSPEntityInRange.c'
source_filename = "AnghaBench/Quake-III-Arena/code/botlib/extr_be_aas_bspq3.c_AAS_BSPEntityInRange.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32 }
%struct.TYPE_4__ = type { ptr }
@bspworld = dso_local local_unnamed_addr global %struct.TYPE_3__ zeroinitializer, align 4
@botimport = dso_local local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@PRT_MESSAGE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"bsp entity out of range\0A\00", align 1
@qfalse = dso_local local_unnamed_addr global i32 0, align 4
@qtrue = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @AAS_BSPEntityInRange(i32 noundef %0) local_unnamed_addr #0 {
%2 = icmp sgt i32 %0, 0
%3 = load i32, ptr @bspworld, align 4
%4 = icmp sgt i32 %3, %0
%5 = select i1 %2, i1 %4, i1 false
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load ptr, ptr @botimport, align 8, !tbaa !5
%8 = load i32, ptr @PRT_MESSAGE, align 4, !tbaa !10
%9 = tail call i32 %7(i32 noundef %8, ptr noundef nonnull @.str) #1
br label %10
10: ; preds = %1, %6
%11 = phi ptr [ @qfalse, %6 ], [ @qtrue, %1 ]
%12 = load i32, ptr %11, align 4, !tbaa !10
ret i32 %12
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/botlib/extr_be_aas_bspq3.c_AAS_BSPEntityInRange.c'
source_filename = "AnghaBench/Quake-III-Arena/code/botlib/extr_be_aas_bspq3.c_AAS_BSPEntityInRange.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i32 }
%struct.TYPE_4__ = type { ptr }
@bspworld = common local_unnamed_addr global %struct.TYPE_3__ zeroinitializer, align 4
@botimport = common local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@PRT_MESSAGE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"bsp entity out of range\0A\00", align 1
@qfalse = common local_unnamed_addr global i32 0, align 4
@qtrue = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @AAS_BSPEntityInRange(i32 noundef %0) local_unnamed_addr #0 {
%2 = icmp sgt i32 %0, 0
%3 = load i32, ptr @bspworld, align 4
%4 = icmp sgt i32 %3, %0
%5 = select i1 %2, i1 %4, i1 false
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load ptr, ptr @botimport, align 8, !tbaa !6
%8 = load i32, ptr @PRT_MESSAGE, align 4, !tbaa !11
%9 = tail call i32 %7(i32 noundef %8, ptr noundef nonnull @.str) #1
br label %10
10: ; preds = %1, %6
%11 = phi ptr [ @qfalse, %6 ], [ @qtrue, %1 ]
%12 = load i32, ptr %11, align 4, !tbaa !11
ret i32 %12
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
|
Quake-III-Arena_code_botlib_extr_be_aas_bspq3.c_AAS_BSPEntityInRange
|
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/pdf/extr_pdf-device.c_pdf_dev_end_group.c'
source_filename = "AnghaBench/sumatrapdf/mupdf/source/pdf/extr_pdf-device.c_pdf_dev_end_group.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @pdf_dev_end_group], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @pdf_dev_end_group(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !5
%4 = tail call ptr @CURRENT_GSTATE(ptr noundef nonnull %1) #2
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = tail call ptr @fz_keep_buffer(ptr noundef %0, i32 noundef %5) #2
%7 = tail call i32 @pdf_dev_end_text(ptr noundef %0, ptr noundef nonnull %1) #2
%8 = tail call i64 @pdf_dev_pop(ptr noundef %0, ptr noundef nonnull %1) #2
%9 = inttoptr i64 %8 to ptr
%10 = tail call i32 @pdf_update_stream(ptr noundef %0, ptr noundef %3, ptr noundef %9, ptr noundef %6, i32 noundef 0) #2
%11 = tail call i32 @fz_drop_buffer(ptr noundef %0, ptr noundef %6) #2
%12 = tail call i32 @pdf_drop_obj(ptr noundef %0, ptr noundef %9) #2
ret void
}
declare ptr @CURRENT_GSTATE(ptr noundef) local_unnamed_addr #1
declare ptr @fz_keep_buffer(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pdf_dev_end_text(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @pdf_dev_pop(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pdf_update_stream(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fz_drop_buffer(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pdf_drop_obj(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_7__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_8__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/pdf/extr_pdf-device.c_pdf_dev_end_group.c'
source_filename = "AnghaBench/sumatrapdf/mupdf/source/pdf/extr_pdf-device.c_pdf_dev_end_group.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pdf_dev_end_group], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @pdf_dev_end_group(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !6
%4 = tail call ptr @CURRENT_GSTATE(ptr noundef nonnull %1) #2
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = tail call ptr @fz_keep_buffer(ptr noundef %0, i32 noundef %5) #2
%7 = tail call i32 @pdf_dev_end_text(ptr noundef %0, ptr noundef nonnull %1) #2
%8 = tail call i64 @pdf_dev_pop(ptr noundef %0, ptr noundef nonnull %1) #2
%9 = inttoptr i64 %8 to ptr
%10 = tail call i32 @pdf_update_stream(ptr noundef %0, ptr noundef %3, ptr noundef %9, ptr noundef %6, i32 noundef 0) #2
%11 = tail call i32 @fz_drop_buffer(ptr noundef %0, ptr noundef %6) #2
%12 = tail call i32 @pdf_drop_obj(ptr noundef %0, ptr noundef %9) #2
ret void
}
declare ptr @CURRENT_GSTATE(ptr noundef) local_unnamed_addr #1
declare ptr @fz_keep_buffer(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pdf_dev_end_text(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @pdf_dev_pop(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pdf_update_stream(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fz_drop_buffer(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pdf_drop_obj(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_7__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_8__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
|
sumatrapdf_mupdf_source_pdf_extr_pdf-device.c_pdf_dev_end_group
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/dvb-usb/extr_gp8psk-fe.c_gp8psk_fe_read_ber.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/dvb-usb/extr_gp8psk-fe.c_gp8psk_fe_read_ber.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @gp8psk_fe_read_ber], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define internal noundef i32 @gp8psk_fe_read_ber(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1) #0 {
store i64 0, ptr %1, align 8, !tbaa !5
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/dvb-usb/extr_gp8psk-fe.c_gp8psk_fe_read_ber.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/dvb-usb/extr_gp8psk-fe.c_gp8psk_fe_read_ber.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @gp8psk_fe_read_ber], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define internal noundef i32 @gp8psk_fe_read_ber(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1) #0 {
store i64 0, ptr %1, align 8, !tbaa !6
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_drivers_media_dvb_dvb-usb_extr_gp8psk-fe.c_gp8psk_fe_read_ber
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlwifi/pcie/extr_trans.c_iwl_pcie_nic_init.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlwifi/pcie/extr_trans.c_iwl_pcie_nic_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.iwl_trans = type { ptr, i32 }
@CSR_INT_COALESCING = dso_local local_unnamed_addr global i32 0, align 4
@IWL_HOST_INT_CALIB_TIMEOUT_DEF = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@CSR_MAC_SHADOW_REG_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"Enabling shadow registers in device\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @iwl_pcie_nic_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @iwl_pcie_nic_init(ptr noundef %0) #0 {
%2 = tail call ptr @IWL_TRANS_GET_PCIE_TRANS(ptr noundef %0) #2
%3 = tail call i32 @spin_lock_irqsave(ptr noundef %2, i64 noundef undef) #2
%4 = tail call i32 @iwl_pcie_apm_init(ptr noundef %0) #2
%5 = load i32, ptr @CSR_INT_COALESCING, align 4, !tbaa !5
%6 = load i32, ptr @IWL_HOST_INT_CALIB_TIMEOUT_DEF, align 4, !tbaa !5
%7 = tail call i32 @iwl_write8(ptr noundef %0, i32 noundef %5, i32 noundef %6) #2
%8 = tail call i32 @spin_unlock_irqrestore(ptr noundef %2, i64 noundef undef) #2
%9 = tail call i32 @iwl_pcie_set_pwr(ptr noundef %0, i32 noundef 0) #2
%10 = getelementptr inbounds %struct.iwl_trans, ptr %0, i64 0, i32 1
%11 = load i32, ptr %10, align 8, !tbaa !9
%12 = tail call i32 @iwl_op_mode_nic_config(i32 noundef %11) #2
%13 = tail call i32 @iwl_pcie_rx_init(ptr noundef %0) #2
%14 = tail call i64 @iwl_pcie_tx_init(ptr noundef %0) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %1
%17 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%18 = sub nsw i32 0, %17
br label %28
19: ; preds = %1
%20 = load ptr, ptr %0, align 8, !tbaa !12
%21 = load ptr, ptr %20, align 8, !tbaa !13
%22 = load i64, ptr %21, align 8, !tbaa !15
%23 = icmp eq i64 %22, 0
br i1 %23, label %28, label %24
24: ; preds = %19
%25 = load i32, ptr @CSR_MAC_SHADOW_REG_CTRL, align 4, !tbaa !5
%26 = tail call i32 @iwl_set_bit(ptr noundef nonnull %0, i32 noundef %25, i32 noundef -2146435073) #2
%27 = tail call i32 @IWL_DEBUG_INFO(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
br label %28
28: ; preds = %19, %24, %16
%29 = phi i32 [ %18, %16 ], [ 0, %24 ], [ 0, %19 ]
ret i32 %29
}
declare ptr @IWL_TRANS_GET_PCIE_TRANS(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @iwl_pcie_apm_init(ptr noundef) local_unnamed_addr #1
declare i32 @iwl_write8(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @iwl_pcie_set_pwr(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @iwl_op_mode_nic_config(i32 noundef) local_unnamed_addr #1
declare i32 @iwl_pcie_rx_init(ptr noundef) local_unnamed_addr #1
declare i64 @iwl_pcie_tx_init(ptr noundef) local_unnamed_addr #1
declare i32 @iwl_set_bit(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IWL_DEBUG_INFO(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"iwl_trans", !11, i64 0, !6, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"TYPE_4__", !11, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"TYPE_3__", !17, i64 0}
!17 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlwifi/pcie/extr_trans.c_iwl_pcie_nic_init.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlwifi/pcie/extr_trans.c_iwl_pcie_nic_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CSR_INT_COALESCING = common local_unnamed_addr global i32 0, align 4
@IWL_HOST_INT_CALIB_TIMEOUT_DEF = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@CSR_MAC_SHADOW_REG_CTRL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"Enabling shadow registers in device\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @iwl_pcie_nic_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @iwl_pcie_nic_init(ptr noundef %0) #0 {
%2 = tail call ptr @IWL_TRANS_GET_PCIE_TRANS(ptr noundef %0) #2
%3 = tail call i32 @spin_lock_irqsave(ptr noundef %2, i64 noundef undef) #2
%4 = tail call i32 @iwl_pcie_apm_init(ptr noundef %0) #2
%5 = load i32, ptr @CSR_INT_COALESCING, align 4, !tbaa !6
%6 = load i32, ptr @IWL_HOST_INT_CALIB_TIMEOUT_DEF, align 4, !tbaa !6
%7 = tail call i32 @iwl_write8(ptr noundef %0, i32 noundef %5, i32 noundef %6) #2
%8 = tail call i32 @spin_unlock_irqrestore(ptr noundef %2, i64 noundef undef) #2
%9 = tail call i32 @iwl_pcie_set_pwr(ptr noundef %0, i32 noundef 0) #2
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load i32, ptr %10, align 8, !tbaa !10
%12 = tail call i32 @iwl_op_mode_nic_config(i32 noundef %11) #2
%13 = tail call i32 @iwl_pcie_rx_init(ptr noundef %0) #2
%14 = tail call i64 @iwl_pcie_tx_init(ptr noundef %0) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %1
%17 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%18 = sub nsw i32 0, %17
br label %28
19: ; preds = %1
%20 = load ptr, ptr %0, align 8, !tbaa !13
%21 = load ptr, ptr %20, align 8, !tbaa !14
%22 = load i64, ptr %21, align 8, !tbaa !16
%23 = icmp eq i64 %22, 0
br i1 %23, label %28, label %24
24: ; preds = %19
%25 = load i32, ptr @CSR_MAC_SHADOW_REG_CTRL, align 4, !tbaa !6
%26 = tail call i32 @iwl_set_bit(ptr noundef nonnull %0, i32 noundef %25, i32 noundef -2146435073) #2
%27 = tail call i32 @IWL_DEBUG_INFO(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
br label %28
28: ; preds = %19, %24, %16
%29 = phi i32 [ %18, %16 ], [ 0, %24 ], [ 0, %19 ]
ret i32 %29
}
declare ptr @IWL_TRANS_GET_PCIE_TRANS(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @iwl_pcie_apm_init(ptr noundef) local_unnamed_addr #1
declare i32 @iwl_write8(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @iwl_pcie_set_pwr(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @iwl_op_mode_nic_config(i32 noundef) local_unnamed_addr #1
declare i32 @iwl_pcie_rx_init(ptr noundef) local_unnamed_addr #1
declare i64 @iwl_pcie_tx_init(ptr noundef) local_unnamed_addr #1
declare i32 @iwl_set_bit(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IWL_DEBUG_INFO(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"iwl_trans", !12, i64 0, !7, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"TYPE_4__", !12, i64 0}
!16 = !{!17, !18, i64 0}
!17 = !{!"TYPE_3__", !18, i64 0}
!18 = !{!"long", !8, i64 0}
|
fastsocket_kernel_drivers_net_wireless_iwlwifi_pcie_extr_trans.c_iwl_pcie_nic_init
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sched/extr_sch_gred.c_gred_use_harddrop.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sched/extr_sch_gred.c_gred_use_harddrop.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TC_RED_HARDDROP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @gred_use_harddrop], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @gred_use_harddrop(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = load i32, ptr @TC_RED_HARDDROP, align 4, !tbaa !10
%4 = and i32 %3, %2
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"gred_sched", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sched/extr_sch_gred.c_gred_use_harddrop.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sched/extr_sch_gred.c_gred_use_harddrop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TC_RED_HARDDROP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @gred_use_harddrop], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @gred_use_harddrop(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = load i32, ptr @TC_RED_HARDDROP, align 4, !tbaa !11
%4 = and i32 %3, %2
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"gred_sched", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
fastsocket_kernel_net_sched_extr_sch_gred.c_gred_use_harddrop
|
; ModuleID = 'AnghaBench/gb-studio/buildTools/win32-x64/gbdk/libc/extr__mullong.c__mulslong.c'
source_filename = "AnghaBench/gb-studio/buildTools/win32-x64/gbdk/libc/extr__mullong.c__mulslong.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i64 @_mulslong(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = tail call i64 @_mululong(i64 noundef %0, i64 noundef %1) #2
ret i64 %3
}
declare i64 @_mululong(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/gb-studio/buildTools/win32-x64/gbdk/libc/extr__mullong.c__mulslong.c'
source_filename = "AnghaBench/gb-studio/buildTools/win32-x64/gbdk/libc/extr__mullong.c__mulslong.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @_mulslong(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = tail call i64 @_mululong(i64 noundef %0, i64 noundef %1) #2
ret i64 %3
}
declare i64 @_mululong(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
gb-studio_buildTools_win32-x64_gbdk_libc_extr__mullong.c__mulslong
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/dme/extr_if_dme.c_dme_init.c'
source_filename = "AnghaBench/freebsd/sys/dev/dme/extr_if_dme.c_dme_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @dme_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @dme_init(ptr noundef %0) #0 {
%2 = tail call i32 @DME_LOCK(ptr noundef %0) #2
%3 = tail call i32 @dme_init_locked(ptr noundef %0) #2
%4 = tail call i32 @DME_UNLOCK(ptr noundef %0) #2
ret void
}
declare i32 @DME_LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @dme_init_locked(ptr noundef) local_unnamed_addr #1
declare i32 @DME_UNLOCK(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/dme/extr_if_dme.c_dme_init.c'
source_filename = "AnghaBench/freebsd/sys/dev/dme/extr_if_dme.c_dme_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dme_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @dme_init(ptr noundef %0) #0 {
%2 = tail call i32 @DME_LOCK(ptr noundef %0) #2
%3 = tail call i32 @dme_init_locked(ptr noundef %0) #2
%4 = tail call i32 @DME_UNLOCK(ptr noundef %0) #2
ret void
}
declare i32 @DME_LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @dme_init_locked(ptr noundef) local_unnamed_addr #1
declare i32 @DME_UNLOCK(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_sys_dev_dme_extr_if_dme.c_dme_init
|
; ModuleID = 'AnghaBench/fastsocket/kernel/tools/perf/extr_builtin-lock.c_thread_stat_findnew_first.c'
source_filename = "AnghaBench/fastsocket/kernel/tools/perf/extr_builtin-lock.c_thread_stat_findnew_first.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32 }
%struct.thread_stat = type { i32, i32, i32 }
@.str = private unnamed_addr constant [26 x i8] c"memory allocation failed\0A\00", align 1
@thread_stats = dso_local global %struct.TYPE_3__ zeroinitializer, align 4
@thread_stat_findnew_after_first = dso_local local_unnamed_addr global i32 0, align 4
@thread_stat_findnew = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @thread_stat_findnew_first], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @thread_stat_findnew_first(i32 noundef %0) #0 {
%2 = tail call ptr @zalloc(i32 noundef 12) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
br label %13
6: ; preds = %1
%7 = getelementptr inbounds %struct.thread_stat, ptr %2, i64 0, i32 2
store i32 %0, ptr %7, align 4, !tbaa !5
%8 = getelementptr inbounds %struct.thread_stat, ptr %2, i64 0, i32 1
%9 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %8) #2
%10 = tail call i32 @rb_link_node(ptr noundef nonnull %2, ptr noundef null, ptr noundef nonnull @thread_stats) #2
%11 = tail call i32 @rb_insert_color(ptr noundef nonnull %2, ptr noundef nonnull @thread_stats) #2
%12 = load i32, ptr @thread_stat_findnew_after_first, align 4, !tbaa !10
store i32 %12, ptr @thread_stat_findnew, align 4, !tbaa !10
br label %13
13: ; preds = %6, %4
ret ptr %2
}
declare ptr @zalloc(i32 noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
declare i32 @rb_link_node(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rb_insert_color(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"thread_stat", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/tools/perf/extr_builtin-lock.c_thread_stat_findnew_first.c'
source_filename = "AnghaBench/fastsocket/kernel/tools/perf/extr_builtin-lock.c_thread_stat_findnew_first.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i32 }
@.str = private unnamed_addr constant [26 x i8] c"memory allocation failed\0A\00", align 1
@thread_stats = common global %struct.TYPE_3__ zeroinitializer, align 4
@thread_stat_findnew_after_first = common local_unnamed_addr global i32 0, align 4
@thread_stat_findnew = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @thread_stat_findnew_first], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @thread_stat_findnew_first(i32 noundef %0) #0 {
%2 = tail call ptr @zalloc(i32 noundef 12) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
br label %13
6: ; preds = %1
%7 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %0, ptr %7, align 4, !tbaa !6
%8 = getelementptr inbounds i8, ptr %2, i64 4
%9 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %8) #2
%10 = tail call i32 @rb_link_node(ptr noundef nonnull %2, ptr noundef null, ptr noundef nonnull @thread_stats) #2
%11 = tail call i32 @rb_insert_color(ptr noundef nonnull %2, ptr noundef nonnull @thread_stats) #2
%12 = load i32, ptr @thread_stat_findnew_after_first, align 4, !tbaa !11
store i32 %12, ptr @thread_stat_findnew, align 4, !tbaa !11
br label %13
13: ; preds = %6, %4
ret ptr %2
}
declare ptr @zalloc(i32 noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
declare i32 @rb_link_node(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rb_insert_color(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"thread_stat", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
fastsocket_kernel_tools_perf_extr_builtin-lock.c_thread_stat_findnew_first
|
; ModuleID = 'AnghaBench/freebsd/sys/crypto/rijndael/extr_rijndael-api-fst.c_rijndael_makeKey.c'
source_filename = "AnghaBench/freebsd/sys/crypto/rijndael/extr_rijndael-api-fst.c_rijndael_makeKey.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32, i32, i32, i32, i64 }
@BAD_KEY_INSTANCE = dso_local local_unnamed_addr global i32 0, align 4
@DIR_ENCRYPT = dso_local local_unnamed_addr global i64 0, align 8
@DIR_DECRYPT = dso_local local_unnamed_addr global i64 0, align 8
@BAD_KEY_DIR = dso_local local_unnamed_addr global i32 0, align 4
@BAD_KEY_MAT = dso_local local_unnamed_addr global i32 0, align 4
@TRUE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @rijndael_makeKey(ptr noundef %0, i64 noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = icmp eq ptr %0, null
br i1 %5, label %41, label %6
6: ; preds = %4
%7 = load i64, ptr @DIR_ENCRYPT, align 8, !tbaa !5
%8 = icmp eq i64 %7, %1
%9 = load i64, ptr @DIR_DECRYPT, align 8
%10 = icmp eq i64 %9, %1
%11 = select i1 %8, i1 true, i1 %10
br i1 %11, label %12, label %41
12: ; preds = %6
%13 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 5
store i64 %1, ptr %13, align 8, !tbaa !9
switch i32 %2, label %41 [
i32 256, label %14
i32 192, label %14
i32 128, label %14
]
14: ; preds = %12, %12, %12
store i32 %2, ptr %0, align 8, !tbaa !12
%15 = icmp eq ptr %3, null
br i1 %15, label %22, label %16
16: ; preds = %14
%17 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%18 = load i32, ptr %17, align 4, !tbaa !13
%19 = lshr i32 %2, 3
%20 = tail call i32 @memcpy(i32 noundef %18, ptr noundef nonnull %3, i32 noundef %19) #2
%21 = load i64, ptr @DIR_ENCRYPT, align 8, !tbaa !5
br label %22
22: ; preds = %16, %14
%23 = phi i64 [ %21, %16 ], [ %7, %14 ]
%24 = icmp eq i64 %23, %1
%25 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 3
%26 = load i32, ptr %25, align 4, !tbaa !14
%27 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%28 = load i32, ptr %27, align 4, !tbaa !13
br i1 %24, label %29, label %31
29: ; preds = %22
%30 = tail call i32 @rijndaelKeySetupEnc(i32 noundef %26, i32 noundef %28, i32 noundef %2) #2
br label %33
31: ; preds = %22
%32 = tail call i32 @rijndaelKeySetupDec(i32 noundef %26, i32 noundef %28, i32 noundef %2) #2
br label %33
33: ; preds = %31, %29
%34 = phi i32 [ %30, %29 ], [ %32, %31 ]
%35 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 4
store i32 %34, ptr %35, align 8
%36 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%37 = load i32, ptr %36, align 8, !tbaa !15
%38 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%39 = load i32, ptr %38, align 4, !tbaa !13
%40 = tail call i32 @rijndaelKeySetupEnc(i32 noundef %37, i32 noundef %39, i32 noundef %2) #2
br label %41
41: ; preds = %12, %6, %4, %33
%42 = phi ptr [ @TRUE, %33 ], [ @BAD_KEY_INSTANCE, %4 ], [ @BAD_KEY_DIR, %6 ], [ @BAD_KEY_MAT, %12 ]
%43 = load i32, ptr %42, align 4, !tbaa !16
ret i32 %43
}
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rijndaelKeySetupEnc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rijndaelKeySetupDec(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 24}
!10 = !{!"TYPE_3__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !6, i64 24}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 0}
!13 = !{!10, !11, i64 4}
!14 = !{!10, !11, i64 12}
!15 = !{!10, !11, i64 8}
!16 = !{!11, !11, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/crypto/rijndael/extr_rijndael-api-fst.c_rijndael_makeKey.c'
source_filename = "AnghaBench/freebsd/sys/crypto/rijndael/extr_rijndael-api-fst.c_rijndael_makeKey.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BAD_KEY_INSTANCE = common local_unnamed_addr global i32 0, align 4
@DIR_ENCRYPT = common local_unnamed_addr global i64 0, align 8
@DIR_DECRYPT = common local_unnamed_addr global i64 0, align 8
@BAD_KEY_DIR = common local_unnamed_addr global i32 0, align 4
@BAD_KEY_MAT = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @rijndael_makeKey(ptr noundef %0, i64 noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = icmp eq ptr %0, null
br i1 %5, label %40, label %6
6: ; preds = %4
%7 = load i64, ptr @DIR_ENCRYPT, align 8, !tbaa !6
%8 = icmp eq i64 %7, %1
%9 = load i64, ptr @DIR_DECRYPT, align 8
%10 = icmp eq i64 %9, %1
%11 = select i1 %8, i1 true, i1 %10
br i1 %11, label %12, label %40
12: ; preds = %6
%13 = getelementptr inbounds i8, ptr %0, i64 24
store i64 %1, ptr %13, align 8, !tbaa !10
switch i32 %2, label %40 [
i32 256, label %14
i32 192, label %14
i32 128, label %14
]
14: ; preds = %12, %12, %12
store i32 %2, ptr %0, align 8, !tbaa !13
%15 = icmp eq ptr %3, null
br i1 %15, label %22, label %16
16: ; preds = %14
%17 = getelementptr inbounds i8, ptr %0, i64 4
%18 = load i32, ptr %17, align 4, !tbaa !14
%19 = lshr exact i32 %2, 3
%20 = tail call i32 @memcpy(i32 noundef %18, ptr noundef nonnull %3, i32 noundef %19) #2
%21 = load i64, ptr @DIR_ENCRYPT, align 8, !tbaa !6
br label %22
22: ; preds = %16, %14
%23 = phi i64 [ %21, %16 ], [ %7, %14 ]
%24 = icmp eq i64 %23, %1
%25 = getelementptr inbounds i8, ptr %0, i64 12
%26 = load i32, ptr %25, align 4, !tbaa !15
%27 = getelementptr inbounds i8, ptr %0, i64 4
%28 = load i32, ptr %27, align 4, !tbaa !14
br i1 %24, label %29, label %31
29: ; preds = %22
%30 = tail call i32 @rijndaelKeySetupEnc(i32 noundef %26, i32 noundef %28, i32 noundef %2) #2
br label %33
31: ; preds = %22
%32 = tail call i32 @rijndaelKeySetupDec(i32 noundef %26, i32 noundef %28, i32 noundef %2) #2
br label %33
33: ; preds = %31, %29
%34 = phi i32 [ %30, %29 ], [ %32, %31 ]
%35 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %34, ptr %35, align 8
%36 = getelementptr inbounds i8, ptr %0, i64 8
%37 = load i32, ptr %36, align 8, !tbaa !16
%38 = load i32, ptr %27, align 4, !tbaa !14
%39 = tail call i32 @rijndaelKeySetupEnc(i32 noundef %37, i32 noundef %38, i32 noundef %2) #2
br label %40
40: ; preds = %12, %6, %4, %33
%41 = phi ptr [ @TRUE, %33 ], [ @BAD_KEY_INSTANCE, %4 ], [ @BAD_KEY_DIR, %6 ], [ @BAD_KEY_MAT, %12 ]
%42 = load i32, ptr %41, align 4, !tbaa !17
ret i32 %42
}
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rijndaelKeySetupEnc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rijndaelKeySetupDec(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 24}
!11 = !{!"TYPE_3__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !7, i64 24}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 0}
!14 = !{!11, !12, i64 4}
!15 = !{!11, !12, i64 12}
!16 = !{!11, !12, i64 8}
!17 = !{!12, !12, i64 0}
|
freebsd_sys_crypto_rijndael_extr_rijndael-api-fst.c_rijndael_makeKey
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_radeon_legacy_encoders.c_radeon_legacy_tmds_int_dpms.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_radeon_legacy_encoders.c_radeon_legacy_tmds_int_dpms.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@RADEON_FP_GEN_CNTL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
@RADEON_FP_FPON = dso_local local_unnamed_addr global i32 0, align 4
@RADEON_FP_TMDS_EN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @radeon_legacy_tmds_int_dpms], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @radeon_legacy_tmds_int_dpms(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = load i32, ptr @RADEON_FP_GEN_CNTL, align 4, !tbaa !12
%6 = tail call i32 @RREG32(i32 noundef %5) #2
%7 = tail call i32 @DRM_DEBUG_KMS(ptr noundef nonnull @.str) #2
switch i32 %1, label %19 [
i32 130, label %8
i32 129, label %13
i32 128, label %13
i32 131, label %13
]
8: ; preds = %2
%9 = load i32, ptr @RADEON_FP_FPON, align 4, !tbaa !12
%10 = load i32, ptr @RADEON_FP_TMDS_EN, align 4, !tbaa !12
%11 = or i32 %9, %10
%12 = or i32 %11, %6
br label %19
13: ; preds = %2, %2, %2
%14 = load i32, ptr @RADEON_FP_FPON, align 4, !tbaa !12
%15 = load i32, ptr @RADEON_FP_TMDS_EN, align 4, !tbaa !12
%16 = or i32 %15, %14
%17 = xor i32 %16, -1
%18 = and i32 %6, %17
br label %19
19: ; preds = %2, %13, %8
%20 = phi i32 [ %6, %2 ], [ %18, %13 ], [ %12, %8 ]
%21 = load i32, ptr @RADEON_FP_GEN_CNTL, align 4, !tbaa !12
%22 = tail call i32 @WREG32(i32 noundef %21, i32 noundef %20) #2
%23 = load i64, ptr %4, align 8, !tbaa !14
%24 = icmp eq i64 %23, 0
%25 = icmp eq i32 %1, 130
%26 = zext i1 %25 to i32
br i1 %24, label %29, label %27
27: ; preds = %19
%28 = tail call i32 @radeon_atombios_encoder_dpms_scratch_regs(ptr noundef nonnull %0, i32 noundef %26) #2
br label %31
29: ; preds = %19
%30 = tail call i32 @radeon_combios_encoder_dpms_scratch_regs(ptr noundef nonnull %0, i32 noundef %26) #2
br label %31
31: ; preds = %29, %27
ret void
}
declare i32 @RREG32(i32 noundef) local_unnamed_addr #1
declare i32 @DRM_DEBUG_KMS(ptr noundef) local_unnamed_addr #1
declare i32 @WREG32(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @radeon_atombios_encoder_dpms_scratch_regs(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @radeon_combios_encoder_dpms_scratch_regs(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"drm_encoder", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"drm_device", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"radeon_device", !16, i64 0}
!16 = !{!"long", !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_radeon_legacy_encoders.c_radeon_legacy_tmds_int_dpms.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_radeon_legacy_encoders.c_radeon_legacy_tmds_int_dpms.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RADEON_FP_GEN_CNTL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
@RADEON_FP_FPON = common local_unnamed_addr global i32 0, align 4
@RADEON_FP_TMDS_EN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @radeon_legacy_tmds_int_dpms], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @radeon_legacy_tmds_int_dpms(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = load i32, ptr @RADEON_FP_GEN_CNTL, align 4, !tbaa !13
%6 = tail call i32 @RREG32(i32 noundef %5) #2
%7 = tail call i32 @DRM_DEBUG_KMS(ptr noundef nonnull @.str) #2
switch i32 %1, label %19 [
i32 130, label %8
i32 129, label %13
i32 128, label %13
i32 131, label %13
]
8: ; preds = %2
%9 = load i32, ptr @RADEON_FP_FPON, align 4, !tbaa !13
%10 = load i32, ptr @RADEON_FP_TMDS_EN, align 4, !tbaa !13
%11 = or i32 %9, %10
%12 = or i32 %11, %6
br label %19
13: ; preds = %2, %2, %2
%14 = load i32, ptr @RADEON_FP_FPON, align 4, !tbaa !13
%15 = load i32, ptr @RADEON_FP_TMDS_EN, align 4, !tbaa !13
%16 = or i32 %15, %14
%17 = xor i32 %16, -1
%18 = and i32 %6, %17
br label %19
19: ; preds = %2, %13, %8
%20 = phi i32 [ %6, %2 ], [ %18, %13 ], [ %12, %8 ]
%21 = load i32, ptr @RADEON_FP_GEN_CNTL, align 4, !tbaa !13
%22 = tail call i32 @WREG32(i32 noundef %21, i32 noundef %20) #2
%23 = load i64, ptr %4, align 8, !tbaa !15
%24 = icmp eq i64 %23, 0
%25 = icmp eq i32 %1, 130
%26 = zext i1 %25 to i32
br i1 %24, label %29, label %27
27: ; preds = %19
%28 = tail call i32 @radeon_atombios_encoder_dpms_scratch_regs(ptr noundef nonnull %0, i32 noundef %26) #2
br label %31
29: ; preds = %19
%30 = tail call i32 @radeon_combios_encoder_dpms_scratch_regs(ptr noundef nonnull %0, i32 noundef %26) #2
br label %31
31: ; preds = %29, %27
ret void
}
declare i32 @RREG32(i32 noundef) local_unnamed_addr #1
declare i32 @DRM_DEBUG_KMS(ptr noundef) local_unnamed_addr #1
declare i32 @WREG32(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @radeon_atombios_encoder_dpms_scratch_regs(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @radeon_combios_encoder_dpms_scratch_regs(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"drm_encoder", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"drm_device", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"radeon_device", !17, i64 0}
!17 = !{!"long", !9, i64 0}
|
linux_drivers_gpu_drm_radeon_extr_radeon_legacy_encoders.c_radeon_legacy_tmds_int_dpms
|
; ModuleID = 'AnghaBench/freebsd/sbin/dhclient/extr_options.c_expand_search_domain_name.c'
source_filename = "AnghaBench/freebsd/sbin/dhclient/extr_options.c_expand_search_domain_name.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.option_data = type { i64, ptr }
; Function Attrs: nounwind uwtable
define dso_local void @expand_search_domain_name(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef %2) local_unnamed_addr #0 {
%4 = alloca i64, align 8
%5 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%6 = load i64, ptr %1, align 8, !tbaa !5
%7 = load i64, ptr %0, align 8, !tbaa !9
%8 = icmp ult i64 %6, %7
br i1 %8, label %9, label %46
9: ; preds = %3
%10 = load ptr, ptr %2, align 8, !tbaa !12
%11 = getelementptr inbounds %struct.option_data, ptr %0, i64 0, i32 1
br label %12
12: ; preds = %9, %33
%13 = phi i64 [ %6, %9 ], [ %40, %33 ]
%14 = phi ptr [ %10, %9 ], [ %41, %33 ]
%15 = load ptr, ptr %11, align 8, !tbaa !13
%16 = getelementptr inbounds i32, ptr %15, i64 %13
%17 = load i32, ptr %16, align 4, !tbaa !14
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %21
19: ; preds = %12
%20 = add nuw i64 %13, 1
store i64 %20, ptr %1, align 8, !tbaa !5
br label %44
21: ; preds = %12
%22 = and i32 %17, 192
%23 = icmp eq i32 %22, 0
br i1 %23, label %33, label %24
24: ; preds = %21
store ptr %14, ptr %5, align 8, !tbaa !12
%25 = shl i32 %17, 8
%26 = and i32 %25, -49408
%27 = getelementptr i32, ptr %16, i64 1
%28 = load i32, ptr %27, align 4, !tbaa !14
%29 = add nsw i32 %28, %26
%30 = sext i32 %29 to i64
store i64 %30, ptr %4, align 8, !tbaa !5
call void @expand_search_domain_name(ptr noundef nonnull %0, ptr noundef nonnull %4, ptr noundef nonnull %5)
%31 = add i64 %13, 2
store i64 %31, ptr %1, align 8, !tbaa !5
%32 = load ptr, ptr %5, align 8, !tbaa !12
br label %44
33: ; preds = %21
%34 = getelementptr inbounds i32, ptr %16, i64 1
%35 = tail call i32 @memcpy(ptr noundef %14, ptr noundef nonnull %34, i32 noundef %17) #3
%36 = sext i32 %17 to i64
%37 = getelementptr inbounds i8, ptr %14, i64 %36
store i8 46, ptr %37, align 1, !tbaa !16
%38 = add nuw nsw i32 %17, 1
%39 = sext i32 %38 to i64
%40 = add i64 %13, %39
%41 = getelementptr inbounds i8, ptr %14, i64 %39
%42 = load i64, ptr %0, align 8, !tbaa !9
%43 = icmp ult i64 %40, %42
br i1 %43, label %12, label %46, !llvm.loop !17
44: ; preds = %19, %24
%45 = phi ptr [ %32, %24 ], [ %14, %19 ]
store ptr %45, ptr %2, align 8, !tbaa !12
br label %46
46: ; preds = %33, %44, %3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"option_data", !6, i64 0, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 8}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/freebsd/sbin/dhclient/extr_options.c_expand_search_domain_name.c'
source_filename = "AnghaBench/freebsd/sbin/dhclient/extr_options.c_expand_search_domain_name.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @expand_search_domain_name(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef %2) local_unnamed_addr #0 {
%4 = alloca i64, align 8
%5 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%6 = load i64, ptr %1, align 8, !tbaa !6
%7 = load i64, ptr %0, align 8, !tbaa !10
%8 = icmp ult i64 %6, %7
br i1 %8, label %9, label %46
9: ; preds = %3
%10 = load ptr, ptr %2, align 8, !tbaa !13
%11 = getelementptr inbounds i8, ptr %0, i64 8
br label %12
12: ; preds = %9, %33
%13 = phi i64 [ %6, %9 ], [ %40, %33 ]
%14 = phi ptr [ %10, %9 ], [ %41, %33 ]
%15 = load ptr, ptr %11, align 8, !tbaa !14
%16 = getelementptr inbounds i32, ptr %15, i64 %13
%17 = load i32, ptr %16, align 4, !tbaa !15
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %21
19: ; preds = %12
%20 = add nuw i64 %13, 1
store i64 %20, ptr %1, align 8, !tbaa !6
br label %44
21: ; preds = %12
%22 = and i32 %17, 192
%23 = icmp eq i32 %22, 0
br i1 %23, label %33, label %24
24: ; preds = %21
store ptr %14, ptr %5, align 8, !tbaa !13
%25 = shl i32 %17, 8
%26 = and i32 %25, -49408
%27 = getelementptr i8, ptr %16, i64 4
%28 = load i32, ptr %27, align 4, !tbaa !15
%29 = add nsw i32 %28, %26
%30 = sext i32 %29 to i64
store i64 %30, ptr %4, align 8, !tbaa !6
call void @expand_search_domain_name(ptr noundef nonnull %0, ptr noundef nonnull %4, ptr noundef nonnull %5)
%31 = add i64 %13, 2
store i64 %31, ptr %1, align 8, !tbaa !6
%32 = load ptr, ptr %5, align 8, !tbaa !13
br label %44
33: ; preds = %21
%34 = getelementptr inbounds i8, ptr %16, i64 4
%35 = tail call i32 @memcpy(ptr noundef %14, ptr noundef nonnull %34, i32 noundef %17) #3
%36 = sext i32 %17 to i64
%37 = getelementptr inbounds i8, ptr %14, i64 %36
store i8 46, ptr %37, align 1, !tbaa !17
%38 = add nuw nsw i32 %17, 1
%39 = sext i32 %38 to i64
%40 = add i64 %13, %39
%41 = getelementptr inbounds i8, ptr %14, i64 %39
%42 = load i64, ptr %0, align 8, !tbaa !10
%43 = icmp ult i64 %40, %42
br i1 %43, label %12, label %46, !llvm.loop !18
44: ; preds = %19, %24
%45 = phi ptr [ %32, %24 ], [ %14, %19 ]
store ptr %45, ptr %2, align 8, !tbaa !13
br label %46
46: ; preds = %33, %44, %3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"option_data", !7, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!11, !12, i64 8}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !8, i64 0}
!17 = !{!8, !8, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
|
freebsd_sbin_dhclient_extr_options.c_expand_search_domain_name
|
; ModuleID = 'AnghaBench/lab/engine/code/cgame/extr_cg_predict.c_CG_PointContents.c'
source_filename = "AnghaBench/lab/engine/code/cgame/extr_cg_predict.c_CG_PointContents.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
%struct.TYPE_5__ = type { i32, i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32, i64, i32 }
@cg_numSolidEntities = dso_local local_unnamed_addr global i32 0, align 4
@cg_solidEntities = dso_local local_unnamed_addr global %struct.TYPE_5__** null, align 8
@SOLID_BMODEL = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @CG_PointContents(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @trap_CM_PointContents(i32 noundef %0, i32 noundef 0) #2
%4 = load i32, i32* @cg_numSolidEntities, align 4, !tbaa !5
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %38
6: ; preds = %2, %32
%7 = phi i64 [ %34, %32 ], [ 0, %2 ]
%8 = phi i32 [ %33, %32 ], [ %3, %2 ]
%9 = load %struct.TYPE_5__**, %struct.TYPE_5__*** @cg_solidEntities, align 8, !tbaa !9
%10 = getelementptr inbounds %struct.TYPE_5__*, %struct.TYPE_5__** %9, i64 %7
%11 = load %struct.TYPE_5__*, %struct.TYPE_5__** %10, align 8, !tbaa !9
%12 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %11, i64 0, i32 2, i32 0
%13 = load i32, i32* %12, align 8, !tbaa !11
%14 = icmp eq i32 %13, %1
br i1 %14, label %32, label %15
15: ; preds = %6
%16 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %11, i64 0, i32 2, i32 1
%17 = load i64, i64* %16, align 8, !tbaa !14
%18 = load i64, i64* @SOLID_BMODEL, align 8, !tbaa !15
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %32
20: ; preds = %15
%21 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %11, i64 0, i32 2, i32 2
%22 = load i32, i32* %21, align 8, !tbaa !16
%23 = tail call i32 @trap_CM_InlineModel(i32 noundef %22) #2
%24 = icmp eq i32 %23, 0
br i1 %24, label %32, label %25
25: ; preds = %20
%26 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %11, i64 0, i32 1
%27 = load i32, i32* %26, align 4, !tbaa !17
%28 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %11, i64 0, i32 0
%29 = load i32, i32* %28, align 8, !tbaa !19
%30 = tail call i32 @trap_CM_TransformedPointContents(i32 noundef %0, i32 noundef %23, i32 noundef %27, i32 noundef %29) #2
%31 = or i32 %30, %8
br label %32
32: ; preds = %20, %15, %6, %25
%33 = phi i32 [ %8, %6 ], [ %8, %15 ], [ %31, %25 ], [ %8, %20 ]
%34 = add nuw nsw i64 %7, 1
%35 = load i32, i32* @cg_numSolidEntities, align 4, !tbaa !5
%36 = sext i32 %35 to i64
%37 = icmp slt i64 %34, %36
br i1 %37, label %6, label %38, !llvm.loop !20
38: ; preds = %32, %2
%39 = phi i32 [ %3, %2 ], [ %33, %32 ]
ret i32 %39
}
declare i32 @trap_CM_PointContents(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @trap_CM_InlineModel(i32 noundef) local_unnamed_addr #1
declare i32 @trap_CM_TransformedPointContents(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"TYPE_4__", !6, i64 0, !13, i64 8, !6, i64 16}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !13, i64 8}
!15 = !{!13, !13, i64 0}
!16 = !{!12, !6, i64 16}
!17 = !{!18, !6, i64 4}
!18 = !{!"TYPE_5__", !6, i64 0, !6, i64 4, !12, i64 8}
!19 = !{!18, !6, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/lab/engine/code/cgame/extr_cg_predict.c_CG_PointContents.c'
source_filename = "AnghaBench/lab/engine/code/cgame/extr_cg_predict.c_CG_PointContents.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cg_numSolidEntities = common local_unnamed_addr global i32 0, align 4
@cg_solidEntities = common local_unnamed_addr global ptr null, align 8
@SOLID_BMODEL = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @CG_PointContents(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @trap_CM_PointContents(i32 noundef %0, i32 noundef 0) #2
%4 = load i32, ptr @cg_numSolidEntities, align 4, !tbaa !6
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %37
6: ; preds = %2, %31
%7 = phi i64 [ %33, %31 ], [ 0, %2 ]
%8 = phi i32 [ %32, %31 ], [ %3, %2 ]
%9 = load ptr, ptr @cg_solidEntities, align 8, !tbaa !10
%10 = getelementptr inbounds ptr, ptr %9, i64 %7
%11 = load ptr, ptr %10, align 8, !tbaa !10
%12 = getelementptr inbounds i8, ptr %11, i64 8
%13 = load i32, ptr %12, align 8, !tbaa !12
%14 = icmp eq i32 %13, %1
br i1 %14, label %31, label %15
15: ; preds = %6
%16 = getelementptr inbounds i8, ptr %11, i64 16
%17 = load i64, ptr %16, align 8, !tbaa !15
%18 = load i64, ptr @SOLID_BMODEL, align 8, !tbaa !16
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %31
20: ; preds = %15
%21 = getelementptr inbounds i8, ptr %11, i64 24
%22 = load i32, ptr %21, align 8, !tbaa !17
%23 = tail call i32 @trap_CM_InlineModel(i32 noundef %22) #2
%24 = icmp eq i32 %23, 0
br i1 %24, label %31, label %25
25: ; preds = %20
%26 = getelementptr inbounds i8, ptr %11, i64 4
%27 = load i32, ptr %26, align 4, !tbaa !18
%28 = load i32, ptr %11, align 8, !tbaa !20
%29 = tail call i32 @trap_CM_TransformedPointContents(i32 noundef %0, i32 noundef %23, i32 noundef %27, i32 noundef %28) #2
%30 = or i32 %29, %8
br label %31
31: ; preds = %20, %15, %6, %25
%32 = phi i32 [ %8, %6 ], [ %8, %15 ], [ %30, %25 ], [ %8, %20 ]
%33 = add nuw nsw i64 %7, 1
%34 = load i32, ptr @cg_numSolidEntities, align 4, !tbaa !6
%35 = sext i32 %34 to i64
%36 = icmp slt i64 %33, %35
br i1 %36, label %6, label %37, !llvm.loop !21
37: ; preds = %31, %2
%38 = phi i32 [ %3, %2 ], [ %32, %31 ]
ret i32 %38
}
declare i32 @trap_CM_PointContents(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @trap_CM_InlineModel(i32 noundef) local_unnamed_addr #1
declare i32 @trap_CM_TransformedPointContents(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_4__", !7, i64 0, !14, i64 8, !7, i64 16}
!14 = !{!"long", !8, i64 0}
!15 = !{!13, !14, i64 8}
!16 = !{!14, !14, i64 0}
!17 = !{!13, !7, i64 16}
!18 = !{!19, !7, i64 4}
!19 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !13, i64 8}
!20 = !{!19, !7, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
|
lab_engine_code_cgame_extr_cg_predict.c_CG_PointContents
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/microchip/extr_lan743x_main.c_lan743x_rx_allocate_skb.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/microchip/extr_lan743x_main.c_lan743x_rx_allocate_skb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@LAN743X_MAX_FRAME_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@ETH_HLEN = dso_local local_unnamed_addr global i32 0, align 4
@RX_HEAD_PADDING = dso_local local_unnamed_addr global i32 0, align 4
@GFP_ATOMIC = dso_local local_unnamed_addr global i32 0, align 4
@GFP_DMA = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @lan743x_rx_allocate_skb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @lan743x_rx_allocate_skb(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @LAN743X_MAX_FRAME_SIZE, align 4, !tbaa !5
%3 = load i32, ptr @ETH_HLEN, align 4, !tbaa !5
%4 = load i32, ptr @RX_HEAD_PADDING, align 4, !tbaa !5
%5 = add i32 %2, 4
%6 = add i32 %5, %3
%7 = add nsw i32 %6, %4
%8 = load ptr, ptr %0, align 8, !tbaa !9
%9 = load i32, ptr %8, align 4, !tbaa !12
%10 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !5
%11 = load i32, ptr @GFP_DMA, align 4, !tbaa !5
%12 = or i32 %11, %10
%13 = tail call ptr @__netdev_alloc_skb(i32 noundef %9, i32 noundef %7, i32 noundef %12) #2
ret ptr %13
}
declare ptr @__netdev_alloc_skb(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"lan743x_rx", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"TYPE_2__", !6, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/microchip/extr_lan743x_main.c_lan743x_rx_allocate_skb.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/microchip/extr_lan743x_main.c_lan743x_rx_allocate_skb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LAN743X_MAX_FRAME_SIZE = common local_unnamed_addr global i32 0, align 4
@ETH_HLEN = common local_unnamed_addr global i32 0, align 4
@RX_HEAD_PADDING = common local_unnamed_addr global i32 0, align 4
@GFP_ATOMIC = common local_unnamed_addr global i32 0, align 4
@GFP_DMA = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @lan743x_rx_allocate_skb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @lan743x_rx_allocate_skb(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @LAN743X_MAX_FRAME_SIZE, align 4, !tbaa !6
%3 = load i32, ptr @ETH_HLEN, align 4, !tbaa !6
%4 = load i32, ptr @RX_HEAD_PADDING, align 4, !tbaa !6
%5 = add i32 %2, 4
%6 = add i32 %5, %3
%7 = add nsw i32 %6, %4
%8 = load ptr, ptr %0, align 8, !tbaa !10
%9 = load i32, ptr %8, align 4, !tbaa !13
%10 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !6
%11 = load i32, ptr @GFP_DMA, align 4, !tbaa !6
%12 = or i32 %11, %10
%13 = tail call ptr @__netdev_alloc_skb(i32 noundef %9, i32 noundef %7, i32 noundef %12) #2
ret ptr %13
}
declare ptr @__netdev_alloc_skb(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"lan743x_rx", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_2__", !7, i64 0}
|
linux_drivers_net_ethernet_microchip_extr_lan743x_main.c_lan743x_rx_allocate_skb
|
; ModuleID = 'AnghaBench/linux/drivers/bcma/extr_driver_mips.c_bcma_core_mips_irq.c'
source_filename = "AnghaBench/linux/drivers/bcma/extr_driver_mips.c_bcma_core_mips_irq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @bcma_core_mips_irq(ptr noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load ptr, ptr %2, align 8, !tbaa !10
%4 = tail call i32 @bcma_core_mips_irqflag(ptr noundef nonnull %0) #2
%5 = icmp eq i32 %4, 63
br i1 %5, label %33, label %6
6: ; preds = %1
%7 = shl nuw i32 1, %4
%8 = tail call i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef 0) #2
%9 = tail call i32 @bcma_read32(ptr noundef %3, i32 noundef %8) #2
%10 = and i32 %9, %7
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %33
12: ; preds = %6
%13 = tail call i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef 1) #2
%14 = tail call i32 @bcma_read32(ptr noundef %3, i32 noundef %13) #2
%15 = and i32 %14, %7
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %33
17: ; preds = %12
%18 = tail call i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef 2) #2
%19 = tail call i32 @bcma_read32(ptr noundef %3, i32 noundef %18) #2
%20 = and i32 %19, %7
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %33
22: ; preds = %17
%23 = tail call i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef 3) #2
%24 = tail call i32 @bcma_read32(ptr noundef %3, i32 noundef %23) #2
%25 = and i32 %24, %7
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %33
27: ; preds = %22
%28 = tail call i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef 4) #2
%29 = tail call i32 @bcma_read32(ptr noundef %3, i32 noundef %28) #2
%30 = and i32 %29, %7
%31 = icmp eq i32 %30, 0
%32 = select i1 %31, i32 5, i32 4
br label %33
33: ; preds = %27, %6, %12, %17, %22, %1
%34 = phi i32 [ 6, %1 ], [ 0, %6 ], [ 1, %12 ], [ 2, %17 ], [ 3, %22 ], [ %32, %27 ]
ret i32 %34
}
declare i32 @bcma_core_mips_irqflag(ptr noundef) local_unnamed_addr #1
declare i32 @bcma_read32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bcma_device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/bcma/extr_driver_mips.c_bcma_core_mips_irq.c'
source_filename = "AnghaBench/linux/drivers/bcma/extr_driver_mips.c_bcma_core_mips_irq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 7) i32 @bcma_core_mips_irq(ptr noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load ptr, ptr %2, align 8, !tbaa !11
%4 = tail call i32 @bcma_core_mips_irqflag(ptr noundef nonnull %0) #2
%5 = icmp eq i32 %4, 63
br i1 %5, label %33, label %6
6: ; preds = %1
%7 = shl nuw i32 1, %4
%8 = tail call i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef 0) #2
%9 = tail call i32 @bcma_read32(ptr noundef %3, i32 noundef %8) #2
%10 = and i32 %9, %7
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %33
12: ; preds = %6
%13 = tail call i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef 1) #2
%14 = tail call i32 @bcma_read32(ptr noundef %3, i32 noundef %13) #2
%15 = and i32 %14, %7
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %33
17: ; preds = %12
%18 = tail call i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef 2) #2
%19 = tail call i32 @bcma_read32(ptr noundef %3, i32 noundef %18) #2
%20 = and i32 %19, %7
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %33
22: ; preds = %17
%23 = tail call i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef 3) #2
%24 = tail call i32 @bcma_read32(ptr noundef %3, i32 noundef %23) #2
%25 = and i32 %24, %7
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %33
27: ; preds = %22
%28 = tail call i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef 4) #2
%29 = tail call i32 @bcma_read32(ptr noundef %3, i32 noundef %28) #2
%30 = and i32 %29, %7
%31 = icmp eq i32 %30, 0
%32 = select i1 %31, i32 5, i32 4
br label %33
33: ; preds = %27, %6, %12, %17, %22, %1
%34 = phi i32 [ 6, %1 ], [ 0, %6 ], [ 1, %12 ], [ 2, %17 ], [ 3, %22 ], [ %32, %27 ]
ret i32 %34
}
declare i32 @bcma_core_mips_irqflag(ptr noundef) local_unnamed_addr #1
declare i32 @bcma_read32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BCMA_MIPS_MIPS74K_INTMASK(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"bcma_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !8, i64 0}
|
linux_drivers_bcma_extr_driver_mips.c_bcma_core_mips_irq
|
; ModuleID = 'AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_qos_policy.c_osm_qos_policy_sl2vl_scope_destroy.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_qos_policy.c_osm_qos_policy_sl2vl_scope_destroy.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32, i32 }
@__free_single_element = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @osm_qos_policy_sl2vl_scope_destroy(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %19, label %3
3: ; preds = %1
%4 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 2
%5 = load i32, ptr @__free_single_element, align 4, !tbaa !5
%6 = tail call i32 @cl_list_apply_func(ptr noundef nonnull %4, i32 noundef %5, ptr noundef null) #2
%7 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%8 = load i32, ptr @__free_single_element, align 4, !tbaa !5
%9 = tail call i32 @cl_list_apply_func(ptr noundef nonnull %7, i32 noundef %8, ptr noundef null) #2
%10 = load i32, ptr @__free_single_element, align 4, !tbaa !5
%11 = tail call i32 @cl_list_apply_func(ptr noundef nonnull %0, i32 noundef %10, ptr noundef null) #2
%12 = tail call i32 @cl_list_remove_all(ptr noundef nonnull %4) #2
%13 = tail call i32 @cl_list_remove_all(ptr noundef nonnull %7) #2
%14 = tail call i32 @cl_list_remove_all(ptr noundef nonnull %0) #2
%15 = tail call i32 @cl_list_destroy(ptr noundef nonnull %4) #2
%16 = tail call i32 @cl_list_destroy(ptr noundef nonnull %7) #2
%17 = tail call i32 @cl_list_destroy(ptr noundef nonnull %0) #2
%18 = tail call i32 @free(ptr noundef nonnull %0) #2
br label %19
19: ; preds = %1, %3
ret void
}
declare i32 @cl_list_apply_func(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @cl_list_remove_all(ptr noundef) local_unnamed_addr #1
declare i32 @cl_list_destroy(ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_qos_policy.c_osm_qos_policy_sl2vl_scope_destroy.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_qos_policy.c_osm_qos_policy_sl2vl_scope_destroy.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@__free_single_element = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @osm_qos_policy_sl2vl_scope_destroy(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %19, label %3
3: ; preds = %1
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load i32, ptr @__free_single_element, align 4, !tbaa !6
%6 = tail call i32 @cl_list_apply_func(ptr noundef nonnull %4, i32 noundef %5, ptr noundef null) #2
%7 = getelementptr inbounds i8, ptr %0, i64 4
%8 = load i32, ptr @__free_single_element, align 4, !tbaa !6
%9 = tail call i32 @cl_list_apply_func(ptr noundef nonnull %7, i32 noundef %8, ptr noundef null) #2
%10 = load i32, ptr @__free_single_element, align 4, !tbaa !6
%11 = tail call i32 @cl_list_apply_func(ptr noundef nonnull %0, i32 noundef %10, ptr noundef null) #2
%12 = tail call i32 @cl_list_remove_all(ptr noundef nonnull %4) #2
%13 = tail call i32 @cl_list_remove_all(ptr noundef nonnull %7) #2
%14 = tail call i32 @cl_list_remove_all(ptr noundef nonnull %0) #2
%15 = tail call i32 @cl_list_destroy(ptr noundef nonnull %4) #2
%16 = tail call i32 @cl_list_destroy(ptr noundef nonnull %7) #2
%17 = tail call i32 @cl_list_destroy(ptr noundef nonnull %0) #2
%18 = tail call i32 @free(ptr noundef nonnull %0) #2
br label %19
19: ; preds = %1, %3
ret void
}
declare i32 @cl_list_apply_func(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @cl_list_remove_all(ptr noundef) local_unnamed_addr #1
declare i32 @cl_list_destroy(ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_contrib_ofed_opensm_opensm_extr_osm_qos_policy.c_osm_qos_policy_sl2vl_scope_destroy
|
; ModuleID = 'AnghaBench/RetroArch/griffin/extr_..libretro-commonformatsjsonjsonsax_full.c_JSON_Parser_PushMemberNameList.c'
source_filename = "AnghaBench/RetroArch/griffin/extr_..libretro-commonformatsjsonjsonsax_full.c_JSON_Parser_PushMemberNameList.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { ptr, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i32, ptr }
%struct.TYPE_7__ = type { ptr, ptr }
@JSON_Error_OutOfMemory = dso_local local_unnamed_addr global i32 0, align 4
@JSON_Failure = dso_local local_unnamed_addr global i32 0, align 4
@JSON_Success = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @JSON_Parser_PushMemberNameList], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @JSON_Parser_PushMemberNameList(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%3 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load i32, ptr %2, align 8, !tbaa !12
%6 = tail call i64 %4(i32 noundef %5, ptr noundef null, i32 noundef 16) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, ptr @JSON_Error_OutOfMemory, align 4, !tbaa !13
%10 = tail call i32 @JSON_Parser_SetErrorAtCodepoint(ptr noundef nonnull %0, i32 noundef %9) #2
br label %15
11: ; preds = %1
%12 = inttoptr i64 %6 to ptr
%13 = load ptr, ptr %0, align 8, !tbaa !14
%14 = getelementptr inbounds %struct.TYPE_7__, ptr %12, i64 0, i32 1
store ptr %13, ptr %14, align 8, !tbaa !15
store ptr null, ptr %12, align 8, !tbaa !17
store ptr %12, ptr %0, align 8, !tbaa !14
br label %15
15: ; preds = %11, %8
%16 = phi ptr [ @JSON_Success, %11 ], [ @JSON_Failure, %8 ]
%17 = load i32, ptr %16, align 4, !tbaa !13
ret i32 %17
}
declare i32 @JSON_Parser_SetErrorAtCodepoint(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"TYPE_8__", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_6__", !11, i64 0, !7, i64 8}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 8}
!13 = !{!11, !11, i64 0}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !7, i64 8}
!16 = !{!"TYPE_7__", !7, i64 0, !7, i64 8}
!17 = !{!16, !7, i64 0}
|
; ModuleID = 'AnghaBench/RetroArch/griffin/extr_..libretro-commonformatsjsonjsonsax_full.c_JSON_Parser_PushMemberNameList.c'
source_filename = "AnghaBench/RetroArch/griffin/extr_..libretro-commonformatsjsonjsonsax_full.c_JSON_Parser_PushMemberNameList.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@JSON_Error_OutOfMemory = common local_unnamed_addr global i32 0, align 4
@JSON_Failure = common local_unnamed_addr global i32 0, align 4
@JSON_Success = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @JSON_Parser_PushMemberNameList], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @JSON_Parser_PushMemberNameList(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load i32, ptr %2, align 8, !tbaa !13
%6 = tail call i64 %4(i32 noundef %5, ptr noundef null, i32 noundef 16) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, ptr @JSON_Error_OutOfMemory, align 4, !tbaa !14
%10 = tail call i32 @JSON_Parser_SetErrorAtCodepoint(ptr noundef nonnull %0, i32 noundef %9) #2
br label %15
11: ; preds = %1
%12 = inttoptr i64 %6 to ptr
%13 = load ptr, ptr %0, align 8, !tbaa !15
%14 = getelementptr inbounds i8, ptr %12, i64 8
store ptr %13, ptr %14, align 8, !tbaa !16
store ptr null, ptr %12, align 8, !tbaa !18
store ptr %12, ptr %0, align 8, !tbaa !15
br label %15
15: ; preds = %11, %8
%16 = phi ptr [ @JSON_Success, %11 ], [ @JSON_Failure, %8 ]
%17 = load i32, ptr %16, align 4, !tbaa !14
ret i32 %17
}
declare i32 @JSON_Parser_SetErrorAtCodepoint(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_6__", !12, i64 0, !8, i64 8}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !12, i64 8}
!14 = !{!12, !12, i64 0}
!15 = !{!7, !8, i64 0}
!16 = !{!17, !8, i64 8}
!17 = !{!"TYPE_7__", !8, i64 0, !8, i64 8}
!18 = !{!17, !8, i64 0}
|
RetroArch_griffin_extr_..libretro-commonformatsjsonjsonsax_full.c_JSON_Parser_PushMemberNameList
|
; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-sh-msiof.c_copy_plain32.c'
source_filename = "AnghaBench/linux/drivers/spi/extr_spi-sh-msiof.c_copy_plain32.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @copy_plain32], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @copy_plain32(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = shl i32 %2, 2
%5 = tail call i32 @memcpy(ptr noundef %0, ptr noundef %1, i32 noundef %4) #2
ret void
}
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-sh-msiof.c_copy_plain32.c'
source_filename = "AnghaBench/linux/drivers/spi/extr_spi-sh-msiof.c_copy_plain32.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @copy_plain32], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @copy_plain32(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = shl i32 %2, 2
%5 = tail call i32 @memcpy(ptr noundef %0, ptr noundef %1, i32 noundef %4) #2
ret void
}
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_spi_extr_spi-sh-msiof.c_copy_plain32
|
; ModuleID = 'AnghaBench/TDengine/src/system/detail/src/extr_mgmtMeter.c_mgmtGetMeter.c'
source_filename = "AnghaBench/TDengine/src/system/detail/src/extr_mgmtMeter.c_mgmtGetMeter.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@meterSdb = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @mgmtGetMeter(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @meterSdb, align 4, !tbaa !5
%3 = tail call i64 @sdbGetRow(i32 noundef %2, ptr noundef %0) #2
%4 = inttoptr i64 %3 to ptr
ret ptr %4
}
declare i64 @sdbGetRow(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/TDengine/src/system/detail/src/extr_mgmtMeter.c_mgmtGetMeter.c'
source_filename = "AnghaBench/TDengine/src/system/detail/src/extr_mgmtMeter.c_mgmtGetMeter.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@meterSdb = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @mgmtGetMeter(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @meterSdb, align 4, !tbaa !6
%3 = tail call i64 @sdbGetRow(i32 noundef %2, ptr noundef %0) #2
%4 = inttoptr i64 %3 to ptr
ret ptr %4
}
declare i64 @sdbGetRow(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
TDengine_src_system_detail_src_extr_mgmtMeter.c_mgmtGetMeter
|
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zdb/extr_zdb.c_zdb_leak.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zdb/extr_zdb.c_zdb_leak.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [51 x i8] c"leaked space: vdev %llu, offset 0x%llx, size %llu\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @zdb_leak], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @zdb_leak(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = load i64, ptr %0, align 8, !tbaa !5
%5 = trunc i64 %4 to i32
%6 = trunc i64 %1 to i32
%7 = trunc i64 %2 to i32
%8 = tail call i32 @printf(ptr noundef nonnull @.str, i32 noundef %5, i32 noundef %6, i32 noundef %7) #2
ret void
}
declare i32 @printf(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zdb/extr_zdb.c_zdb_leak.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zdb/extr_zdb.c_zdb_leak.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [51 x i8] c"leaked space: vdev %llu, offset 0x%llx, size %llu\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @zdb_leak], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @zdb_leak(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = load i64, ptr %0, align 8, !tbaa !6
%5 = trunc i64 %4 to i32
%6 = trunc i64 %1 to i32
%7 = trunc i64 %2 to i32
%8 = tail call i32 @printf(ptr noundef nonnull @.str, i32 noundef %5, i32 noundef %6, i32 noundef %7) #2
ret void
}
declare i32 @printf(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
freebsd_cddl_contrib_opensolaris_cmd_zdb_extr_zdb.c_zdb_leak
|
; ModuleID = 'AnghaBench/reactos/dll/win32/vbscript/extr_vbregexp.c_create_enum_variant_mc2.c'
source_filename = "AnghaBench/reactos/dll/win32/vbscript/extr_vbregexp.c_create_enum_variant_mc2.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, %struct.TYPE_6__, ptr, i32, i32 }
%struct.TYPE_6__ = type { ptr }
@E_OUTOFMEMORY = dso_local local_unnamed_addr global i32 0, align 4
@MatchCollectionEnum_Vtbl = dso_local global i32 0, align 4
@S_OK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @create_enum_variant_mc2], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @create_enum_variant_mc2(ptr noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2) #0 {
%4 = tail call ptr @heap_alloc_zero(i32 noundef 32) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %13, label %6
6: ; preds = %3
%7 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 1
store ptr @MatchCollectionEnum_Vtbl, ptr %7, align 8, !tbaa !5
store i32 1, ptr %4, align 8, !tbaa !12
%8 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 4
store i32 %1, ptr %8, align 4, !tbaa !13
%9 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 3
%10 = tail call i32 @IMatchCollection2_get_Count(ptr noundef %0, ptr noundef nonnull %9) #2
%11 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 2
store ptr %0, ptr %11, align 8, !tbaa !14
%12 = tail call i32 @IMatchCollection2_AddRef(ptr noundef %0) #2
store ptr %7, ptr %2, align 8, !tbaa !15
br label %13
13: ; preds = %3, %6
%14 = phi ptr [ @S_OK, %6 ], [ @E_OUTOFMEMORY, %3 ]
%15 = load i32, ptr %14, align 4, !tbaa !16
ret i32 %15
}
declare ptr @heap_alloc_zero(i32 noundef) local_unnamed_addr #1
declare i32 @IMatchCollection2_get_Count(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @IMatchCollection2_AddRef(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"TYPE_5__", !7, i64 0, !10, i64 8, !11, i64 16, !7, i64 24, !7, i64 28}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_6__", !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!6, !7, i64 28}
!14 = !{!6, !11, i64 16}
!15 = !{!11, !11, i64 0}
!16 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/reactos/dll/win32/vbscript/extr_vbregexp.c_create_enum_variant_mc2.c'
source_filename = "AnghaBench/reactos/dll/win32/vbscript/extr_vbregexp.c_create_enum_variant_mc2.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@E_OUTOFMEMORY = common local_unnamed_addr global i32 0, align 4
@MatchCollectionEnum_Vtbl = common global i32 0, align 4
@S_OK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @create_enum_variant_mc2], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @create_enum_variant_mc2(ptr noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2) #0 {
%4 = tail call ptr @heap_alloc_zero(i32 noundef 32) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %13, label %6
6: ; preds = %3
%7 = getelementptr inbounds i8, ptr %4, i64 8
store ptr @MatchCollectionEnum_Vtbl, ptr %7, align 8, !tbaa !6
store i32 1, ptr %4, align 8, !tbaa !13
%8 = getelementptr inbounds i8, ptr %4, i64 28
store i32 %1, ptr %8, align 4, !tbaa !14
%9 = getelementptr inbounds i8, ptr %4, i64 24
%10 = tail call i32 @IMatchCollection2_get_Count(ptr noundef %0, ptr noundef nonnull %9) #2
%11 = getelementptr inbounds i8, ptr %4, i64 16
store ptr %0, ptr %11, align 8, !tbaa !15
%12 = tail call i32 @IMatchCollection2_AddRef(ptr noundef %0) #2
store ptr %7, ptr %2, align 8, !tbaa !16
br label %13
13: ; preds = %3, %6
%14 = phi ptr [ @S_OK, %6 ], [ @E_OUTOFMEMORY, %3 ]
%15 = load i32, ptr %14, align 4, !tbaa !17
ret i32 %15
}
declare ptr @heap_alloc_zero(i32 noundef) local_unnamed_addr #1
declare i32 @IMatchCollection2_get_Count(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @IMatchCollection2_AddRef(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"TYPE_5__", !8, i64 0, !11, i64 8, !12, i64 16, !8, i64 24, !8, i64 28}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_6__", !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!7, !8, i64 28}
!15 = !{!7, !12, i64 16}
!16 = !{!12, !12, i64 0}
!17 = !{!8, !8, i64 0}
|
reactos_dll_win32_vbscript_extr_vbregexp.c_create_enum_variant_mc2
|
; ModuleID = 'AnghaBench/micropython/ports/stm32/extr_extint.c_Handle_EXTI_Irq.c'
source_filename = "AnghaBench/micropython/ports/stm32/extr_extint.c_Handle_EXTI_Irq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32 }
@EXTI_NUM_VECTORS = dso_local local_unnamed_addr global i32 0, align 4
@pyb_extint_callback = dso_local local_unnamed_addr global i32 0, align 4
@mp_const_none = dso_local local_unnamed_addr global i64 0, align 8
@pyb_extint_hard_irq = dso_local local_unnamed_addr global ptr null, align 8
@pyb_extint_callback_arg = dso_local local_unnamed_addr global ptr null, align 8
@MICROPY_ERROR_PRINTER = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [56 x i8] c"uncaught exception in ExtInt interrupt handler line %u\0A\00", align 1
@mp_plat_print = dso_local global i32 0, align 4
@PENDSV_DISPATCH_CYW43 = dso_local local_unnamed_addr global i32 0, align 4
@pyb_pin_WL_HOST_WAKE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @Handle_EXTI_Irq(i32 noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.TYPE_3__, align 4
%3 = shl nuw i32 1, %0
%4 = tail call i64 @__HAL_GPIO_EXTI_GET_FLAG(i32 noundef %3) #3
%5 = icmp eq i64 %4, 0
br i1 %5, label %51, label %6
6: ; preds = %1
%7 = tail call i32 @__HAL_GPIO_EXTI_CLEAR_FLAG(i32 noundef %3) #3
%8 = load i32, ptr @EXTI_NUM_VECTORS, align 4, !tbaa !5
%9 = icmp sgt i32 %8, %0
br i1 %9, label %10, label %51
10: ; preds = %6
%11 = load i32, ptr @pyb_extint_callback, align 4, !tbaa !5
%12 = tail call ptr @MP_STATE_PORT(i32 noundef %11) #3
%13 = sext i32 %0 to i64
%14 = getelementptr inbounds i64, ptr %12, i64 %13
%15 = load i64, ptr %14, align 8, !tbaa !9
%16 = load i64, ptr @mp_const_none, align 8, !tbaa !9
%17 = icmp eq i64 %15, %16
br i1 %17, label %51, label %18
18: ; preds = %10
%19 = load ptr, ptr @pyb_extint_hard_irq, align 8, !tbaa !11
%20 = getelementptr inbounds i32, ptr %19, i64 %13
%21 = load i32, ptr %20, align 4, !tbaa !5
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %28
23: ; preds = %18
%24 = load ptr, ptr @pyb_extint_callback_arg, align 8, !tbaa !11
%25 = getelementptr inbounds i64, ptr %24, i64 %13
%26 = load i64, ptr %25, align 8, !tbaa !9
%27 = tail call i32 @mp_sched_schedule(i64 noundef %15, i64 noundef %26) #3
br label %51
28: ; preds = %18
%29 = tail call i32 (...) @mp_sched_lock() #3
%30 = tail call i32 (...) @gc_lock() #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%31 = call i64 @nlr_push(ptr noundef nonnull %2) #3
%32 = icmp eq i64 %31, 0
br i1 %32, label %33, label %40
33: ; preds = %28
%34 = load i64, ptr %14, align 8, !tbaa !9
%35 = load ptr, ptr @pyb_extint_callback_arg, align 8, !tbaa !11
%36 = getelementptr inbounds i64, ptr %35, i64 %13
%37 = load i64, ptr %36, align 8, !tbaa !9
%38 = call i32 @mp_call_function_1(i64 noundef %34, i64 noundef %37) #3
%39 = call i32 (...) @nlr_pop() #3
br label %48
40: ; preds = %28
%41 = load i64, ptr @mp_const_none, align 8, !tbaa !9
store i64 %41, ptr %14, align 8, !tbaa !9
%42 = call i32 @extint_disable(i32 noundef %0) #3
%43 = load i32, ptr @MICROPY_ERROR_PRINTER, align 4, !tbaa !5
%44 = call i32 @mp_printf(i32 noundef %43, ptr noundef nonnull @.str, i32 noundef %0) #3
%45 = load i32, ptr %2, align 4, !tbaa !13
%46 = call i64 @MP_OBJ_FROM_PTR(i32 noundef %45) #3
%47 = call i32 @mp_obj_print_exception(ptr noundef nonnull @mp_plat_print, i64 noundef %46) #3
br label %48
48: ; preds = %40, %33
%49 = call i32 (...) @gc_unlock() #3
%50 = call i32 (...) @mp_sched_unlock() #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %51
51: ; preds = %23, %48, %10, %6, %1
ret void
}
declare i64 @__HAL_GPIO_EXTI_GET_FLAG(i32 noundef) local_unnamed_addr #1
declare i32 @__HAL_GPIO_EXTI_CLEAR_FLAG(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2
declare ptr @MP_STATE_PORT(i32 noundef) local_unnamed_addr #1
declare i32 @mp_sched_schedule(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mp_sched_lock(...) local_unnamed_addr #1
declare i32 @gc_lock(...) local_unnamed_addr #1
declare i64 @nlr_push(ptr noundef) local_unnamed_addr #1
declare i32 @mp_call_function_1(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @nlr_pop(...) local_unnamed_addr #1
declare i32 @extint_disable(i32 noundef) local_unnamed_addr #1
declare i32 @mp_printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mp_obj_print_exception(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @MP_OBJ_FROM_PTR(i32 noundef) local_unnamed_addr #1
declare i32 @gc_unlock(...) local_unnamed_addr #1
declare i32 @mp_sched_unlock(...) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"TYPE_3__", !6, i64 0}
|
; ModuleID = 'AnghaBench/micropython/ports/stm32/extr_extint.c_Handle_EXTI_Irq.c'
source_filename = "AnghaBench/micropython/ports/stm32/extr_extint.c_Handle_EXTI_Irq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i32 }
@EXTI_NUM_VECTORS = common local_unnamed_addr global i32 0, align 4
@pyb_extint_callback = common local_unnamed_addr global i32 0, align 4
@mp_const_none = common local_unnamed_addr global i64 0, align 8
@pyb_extint_hard_irq = common local_unnamed_addr global ptr null, align 8
@pyb_extint_callback_arg = common local_unnamed_addr global ptr null, align 8
@MICROPY_ERROR_PRINTER = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [56 x i8] c"uncaught exception in ExtInt interrupt handler line %u\0A\00", align 1
@mp_plat_print = common global i32 0, align 4
@PENDSV_DISPATCH_CYW43 = common local_unnamed_addr global i32 0, align 4
@pyb_pin_WL_HOST_WAKE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @Handle_EXTI_Irq(i32 noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.TYPE_3__, align 4
%3 = shl nuw i32 1, %0
%4 = tail call i64 @__HAL_GPIO_EXTI_GET_FLAG(i32 noundef %3) #3
%5 = icmp eq i64 %4, 0
br i1 %5, label %51, label %6
6: ; preds = %1
%7 = tail call i32 @__HAL_GPIO_EXTI_CLEAR_FLAG(i32 noundef %3) #3
%8 = load i32, ptr @EXTI_NUM_VECTORS, align 4, !tbaa !6
%9 = icmp sgt i32 %8, %0
br i1 %9, label %10, label %51
10: ; preds = %6
%11 = load i32, ptr @pyb_extint_callback, align 4, !tbaa !6
%12 = tail call ptr @MP_STATE_PORT(i32 noundef %11) #3
%13 = sext i32 %0 to i64
%14 = getelementptr inbounds i64, ptr %12, i64 %13
%15 = load i64, ptr %14, align 8, !tbaa !10
%16 = load i64, ptr @mp_const_none, align 8, !tbaa !10
%17 = icmp eq i64 %15, %16
br i1 %17, label %51, label %18
18: ; preds = %10
%19 = load ptr, ptr @pyb_extint_hard_irq, align 8, !tbaa !12
%20 = getelementptr inbounds i32, ptr %19, i64 %13
%21 = load i32, ptr %20, align 4, !tbaa !6
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %28
23: ; preds = %18
%24 = load ptr, ptr @pyb_extint_callback_arg, align 8, !tbaa !12
%25 = getelementptr inbounds i64, ptr %24, i64 %13
%26 = load i64, ptr %25, align 8, !tbaa !10
%27 = tail call i32 @mp_sched_schedule(i64 noundef %15, i64 noundef %26) #3
br label %51
28: ; preds = %18
%29 = tail call i32 @mp_sched_lock() #3
%30 = tail call i32 @gc_lock() #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%31 = call i64 @nlr_push(ptr noundef nonnull %2) #3
%32 = icmp eq i64 %31, 0
br i1 %32, label %33, label %40
33: ; preds = %28
%34 = load i64, ptr %14, align 8, !tbaa !10
%35 = load ptr, ptr @pyb_extint_callback_arg, align 8, !tbaa !12
%36 = getelementptr inbounds i64, ptr %35, i64 %13
%37 = load i64, ptr %36, align 8, !tbaa !10
%38 = call i32 @mp_call_function_1(i64 noundef %34, i64 noundef %37) #3
%39 = call i32 @nlr_pop() #3
br label %48
40: ; preds = %28
%41 = load i64, ptr @mp_const_none, align 8, !tbaa !10
store i64 %41, ptr %14, align 8, !tbaa !10
%42 = call i32 @extint_disable(i32 noundef %0) #3
%43 = load i32, ptr @MICROPY_ERROR_PRINTER, align 4, !tbaa !6
%44 = call i32 @mp_printf(i32 noundef %43, ptr noundef nonnull @.str, i32 noundef %0) #3
%45 = load i32, ptr %2, align 4, !tbaa !14
%46 = call i64 @MP_OBJ_FROM_PTR(i32 noundef %45) #3
%47 = call i32 @mp_obj_print_exception(ptr noundef nonnull @mp_plat_print, i64 noundef %46) #3
br label %48
48: ; preds = %40, %33
%49 = call i32 @gc_unlock() #3
%50 = call i32 @mp_sched_unlock() #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %51
51: ; preds = %23, %48, %10, %6, %1
ret void
}
declare i64 @__HAL_GPIO_EXTI_GET_FLAG(i32 noundef) local_unnamed_addr #1
declare i32 @__HAL_GPIO_EXTI_CLEAR_FLAG(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2
declare ptr @MP_STATE_PORT(i32 noundef) local_unnamed_addr #1
declare i32 @mp_sched_schedule(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mp_sched_lock(...) local_unnamed_addr #1
declare i32 @gc_lock(...) local_unnamed_addr #1
declare i64 @nlr_push(ptr noundef) local_unnamed_addr #1
declare i32 @mp_call_function_1(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @nlr_pop(...) local_unnamed_addr #1
declare i32 @extint_disable(i32 noundef) local_unnamed_addr #1
declare i32 @mp_printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mp_obj_print_exception(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @MP_OBJ_FROM_PTR(i32 noundef) local_unnamed_addr #1
declare i32 @gc_unlock(...) local_unnamed_addr #1
declare i32 @mp_sched_unlock(...) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"TYPE_3__", !7, i64 0}
|
micropython_ports_stm32_extr_extint.c_Handle_EXTI_Irq
|
; ModuleID = 'AnghaBench/zfs/module/zfs/extr_dmu_objset.c_dmu_objset_ds.c'
source_filename = "AnghaBench/zfs/module/zfs/extr_dmu_objset.c_dmu_objset_ds.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local ptr @dmu_objset_ds(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/zfs/module/zfs/extr_dmu_objset.c_dmu_objset_ds.c'
source_filename = "AnghaBench/zfs/module/zfs/extr_dmu_objset.c_dmu_objset_ds.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @dmu_objset_ds(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
zfs_module_zfs_extr_dmu_objset.c_dmu_objset_ds
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/drivers/extr_driver_macsec_qca.c_macsec_qca_cs_type_get.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/drivers/extr_driver_macsec_qca.c_macsec_qca_cs_type_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CS_ID_GCM_AES_128 = dso_local local_unnamed_addr global i64 0, align 8
@FAL_CIPHER_SUITE_AES_GCM_128 = dso_local local_unnamed_addr global i32 0, align 4
@CS_ID_GCM_AES_256 = dso_local local_unnamed_addr global i64 0, align 8
@FAL_CIPHER_SUITE_AES_GCM_256 = dso_local local_unnamed_addr global i32 0, align 4
@FAL_CIPHER_SUITE_MAX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @macsec_qca_cs_type_get], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @macsec_qca_cs_type_get(i64 noundef %0) #0 {
%2 = load i64, ptr @CS_ID_GCM_AES_128, align 8, !tbaa !5
%3 = icmp eq i64 %2, %0
%4 = load i64, ptr @CS_ID_GCM_AES_256, align 8
%5 = icmp eq i64 %4, %0
%6 = load i32, ptr @FAL_CIPHER_SUITE_AES_GCM_128, align 4
%7 = load i32, ptr @FAL_CIPHER_SUITE_AES_GCM_256, align 4
%8 = load i32, ptr @FAL_CIPHER_SUITE_MAX, align 4
%9 = select i1 %5, i32 %7, i32 %8
%10 = select i1 %3, i32 %6, i32 %9
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/drivers/extr_driver_macsec_qca.c_macsec_qca_cs_type_get.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/drivers/extr_driver_macsec_qca.c_macsec_qca_cs_type_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CS_ID_GCM_AES_128 = common local_unnamed_addr global i64 0, align 8
@FAL_CIPHER_SUITE_AES_GCM_128 = common local_unnamed_addr global i32 0, align 4
@CS_ID_GCM_AES_256 = common local_unnamed_addr global i64 0, align 8
@FAL_CIPHER_SUITE_AES_GCM_256 = common local_unnamed_addr global i32 0, align 4
@FAL_CIPHER_SUITE_MAX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @macsec_qca_cs_type_get], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @macsec_qca_cs_type_get(i64 noundef %0) #0 {
%2 = load i64, ptr @CS_ID_GCM_AES_128, align 8, !tbaa !6
%3 = icmp eq i64 %2, %0
%4 = load i64, ptr @CS_ID_GCM_AES_256, align 8
%5 = icmp eq i64 %4, %0
%6 = load i32, ptr @FAL_CIPHER_SUITE_AES_GCM_128, align 4
%7 = load i32, ptr @FAL_CIPHER_SUITE_AES_GCM_256, align 4
%8 = load i32, ptr @FAL_CIPHER_SUITE_MAX, align 4
%9 = select i1 %5, i32 %7, i32 %8
%10 = select i1 %3, i32 %6, i32 %9
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_contrib_wpa_src_drivers_extr_driver_macsec_qca.c_macsec_qca_cs_type_get
|
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