IR_x86
stringlengths 592
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| IR_arm
stringlengths 558
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stringlengths 17
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; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/selftests/extr_i915_selftest.c___intel_gt_live_teardown.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/selftests/extr_i915_selftest.c___intel_gt_live_teardown.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@I915_WAIT_LOCKED = dso_local local_unnamed_addr global i32 0, align 4
@EIO = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @__intel_gt_live_teardown(i32 noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !5
%4 = tail call i32 @mutex_lock(ptr noundef %3) #2
%5 = load ptr, ptr %1, align 8, !tbaa !5
%6 = load i32, ptr @I915_WAIT_LOCKED, align 4, !tbaa !10
%7 = tail call i64 @igt_flush_test(ptr noundef %5, i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
%9 = load i32, ptr @EIO, align 4
%10 = sub nsw i32 0, %9
%11 = select i1 %8, i32 %0, i32 %10
%12 = load ptr, ptr %1, align 8, !tbaa !5
%13 = tail call i32 @mutex_unlock(ptr noundef %12) #2
%14 = load ptr, ptr %1, align 8, !tbaa !5
%15 = tail call i32 @i915_gem_drain_freed_objects(ptr noundef %14) #2
ret i32 %11
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i64 @igt_flush_test(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @i915_gem_drain_freed_objects(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"intel_gt", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/selftests/extr_i915_selftest.c___intel_gt_live_teardown.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/selftests/extr_i915_selftest.c___intel_gt_live_teardown.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@I915_WAIT_LOCKED = common local_unnamed_addr global i32 0, align 4
@EIO = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @__intel_gt_live_teardown(i32 noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !6
%4 = tail call i32 @mutex_lock(ptr noundef %3) #2
%5 = load ptr, ptr %1, align 8, !tbaa !6
%6 = load i32, ptr @I915_WAIT_LOCKED, align 4, !tbaa !11
%7 = tail call i64 @igt_flush_test(ptr noundef %5, i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
%9 = load i32, ptr @EIO, align 4
%10 = sub nsw i32 0, %9
%11 = select i1 %8, i32 %0, i32 %10
%12 = load ptr, ptr %1, align 8, !tbaa !6
%13 = tail call i32 @mutex_unlock(ptr noundef %12) #2
%14 = load ptr, ptr %1, align 8, !tbaa !6
%15 = tail call i32 @i915_gem_drain_freed_objects(ptr noundef %14) #2
ret i32 %11
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i64 @igt_flush_test(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @i915_gem_drain_freed_objects(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"intel_gt", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
|
linux_drivers_gpu_drm_i915_selftests_extr_i915_selftest.c___intel_gt_live_teardown
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ocfs2/dlm/extr_dlmunlock.c_dlmunlock_master.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ocfs2/dlm/extr_dlmunlock.c_dlmunlock_master.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @dlmunlock_master], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @dlmunlock_master(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5) #0 {
%7 = tail call i32 @dlmunlock_common(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef 1) #2
ret i32 %7
}
declare i32 @dlmunlock_common(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ocfs2/dlm/extr_dlmunlock.c_dlmunlock_master.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ocfs2/dlm/extr_dlmunlock.c_dlmunlock_master.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dlmunlock_master], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @dlmunlock_master(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5) #0 {
%7 = tail call i32 @dlmunlock_common(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef 1) #2
ret i32 %7
}
declare i32 @dlmunlock_common(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_fs_ocfs2_dlm_extr_dlmunlock.c_dlmunlock_master
|
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/i40iw/extr_i40iw_ctrl.c_i40iw_sc_cqp_create.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/i40iw/extr_i40iw_ctrl.c_i40iw_sc_cqp_create.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.i40iw_sc_cqp = type { i32, i64, i32, ptr, i32, i64, i32, i32, i32, i32, i32 }
%struct.TYPE_2__ = type { i32, i64 }
@I40IW_UPDATE_SD_BUF_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@I40IW_SD_BUF_ALIGNMENT = dso_local local_unnamed_addr global i32 0, align 4
@I40IW_CQPHC_SQSIZE = dso_local local_unnamed_addr global i32 0, align 4
@I40IW_CQPHC_SVER = dso_local local_unnamed_addr global i32 0, align 4
@I40IW_CQPHC_ENABLED_VFS = dso_local local_unnamed_addr global i32 0, align 4
@I40IW_CQPHC_HMC_PROFILE = dso_local local_unnamed_addr global i32 0, align 4
@I40IW_DEBUG_WQE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [13 x i8] c"CQP_HOST_CTX\00", align 1
@I40IW_CQP_CTX_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CCQPHIGH = dso_local local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CCQPLOW = dso_local local_unnamed_addr global i32 0, align 4
@I40E_VFPE_CCQPHIGH1 = dso_local local_unnamed_addr global i32 0, align 4
@I40E_VFPE_CCQPLOW1 = dso_local local_unnamed_addr global i32 0, align 4
@I40IW_DONE_COUNT = dso_local local_unnamed_addr global i64 0, align 8
@I40IW_ERR_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CQPERRCODES = dso_local local_unnamed_addr global i32 0, align 4
@I40E_VFPE_CQPERRCODES1 = dso_local local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CQPERRCODES_CQP_MINOR_CODE = dso_local local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CQPERRCODES_CQP_MAJOR_CODE = dso_local local_unnamed_addr global i32 0, align 4
@I40IW_SLEEP_COUNT = dso_local local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CCQPSTATUS = dso_local local_unnamed_addr global i32 0, align 4
@I40E_VFPE_CCQPSTATUS1 = dso_local local_unnamed_addr global i32 0, align 4
@i40iw_update_sds_noccq = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @i40iw_sc_cqp_create], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @i40iw_sc_cqp_create(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) #0 {
store i64 0, ptr %1, align 8, !tbaa !5
store i64 0, ptr %2, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.i40iw_sc_cqp, ptr %0, i64 0, i32 3
%5 = load ptr, ptr %4, align 8, !tbaa !9
%6 = load i32, ptr %5, align 8, !tbaa !13
%7 = getelementptr inbounds %struct.i40iw_sc_cqp, ptr %0, i64 0, i32 4
%8 = load i32, ptr @I40IW_UPDATE_SD_BUF_SIZE, align 4, !tbaa !15
%9 = load i32, ptr %0, align 8, !tbaa !16
%10 = mul nsw i32 %9, %8
%11 = load i32, ptr @I40IW_SD_BUF_ALIGNMENT, align 4, !tbaa !15
%12 = tail call i32 @i40iw_allocate_dma_mem(i32 noundef %6, ptr noundef nonnull %7, i32 noundef %10, i32 noundef %11) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %118
14: ; preds = %3
%15 = getelementptr inbounds %struct.i40iw_sc_cqp, ptr %0, i64 0, i32 10
%16 = load i32, ptr %15, align 8, !tbaa !17
%17 = load i32, ptr @I40IW_CQPHC_SQSIZE, align 4, !tbaa !15
%18 = tail call i64 @LS_64(i32 noundef %16, i32 noundef %17) #2
%19 = getelementptr inbounds %struct.i40iw_sc_cqp, ptr %0, i64 0, i32 9
%20 = load i32, ptr %19, align 4, !tbaa !18
%21 = load i32, ptr @I40IW_CQPHC_SVER, align 4, !tbaa !15
%22 = tail call i64 @LS_64(i32 noundef %20, i32 noundef %21) #2
%23 = or i64 %22, %18
%24 = getelementptr inbounds %struct.i40iw_sc_cqp, ptr %0, i64 0, i32 6
%25 = load i32, ptr %24, align 8, !tbaa !19
%26 = tail call i32 @set_64bit_val(i32 noundef %25, i32 noundef 0, i64 noundef %23) #2
%27 = load i32, ptr %24, align 8, !tbaa !19
%28 = getelementptr inbounds %struct.i40iw_sc_cqp, ptr %0, i64 0, i32 1
%29 = load i64, ptr %28, align 8, !tbaa !20
%30 = tail call i32 @set_64bit_val(i32 noundef %27, i32 noundef 8, i64 noundef %29) #2
%31 = getelementptr inbounds %struct.i40iw_sc_cqp, ptr %0, i64 0, i32 8
%32 = load i32, ptr %31, align 8, !tbaa !21
%33 = load i32, ptr @I40IW_CQPHC_ENABLED_VFS, align 4, !tbaa !15
%34 = tail call i64 @LS_64(i32 noundef %32, i32 noundef %33) #2
%35 = getelementptr inbounds %struct.i40iw_sc_cqp, ptr %0, i64 0, i32 7
%36 = load i32, ptr %35, align 4, !tbaa !22
%37 = load i32, ptr @I40IW_CQPHC_HMC_PROFILE, align 4, !tbaa !15
%38 = tail call i64 @LS_64(i32 noundef %36, i32 noundef %37) #2
%39 = or i64 %38, %34
%40 = load i32, ptr %24, align 8, !tbaa !19
%41 = tail call i32 @set_64bit_val(i32 noundef %40, i32 noundef 16, i64 noundef %39) #2
%42 = load i32, ptr %24, align 8, !tbaa !19
%43 = ptrtoint ptr %0 to i64
%44 = tail call i32 @set_64bit_val(i32 noundef %42, i32 noundef 24, i64 noundef %43) #2
%45 = load i32, ptr %24, align 8, !tbaa !19
%46 = tail call i32 @set_64bit_val(i32 noundef %45, i32 noundef 32, i64 noundef 0) #2
%47 = load i32, ptr %24, align 8, !tbaa !19
%48 = tail call i32 @set_64bit_val(i32 noundef %47, i32 noundef 40, i64 noundef 0) #2
%49 = load i32, ptr %24, align 8, !tbaa !19
%50 = tail call i32 @set_64bit_val(i32 noundef %49, i32 noundef 48, i64 noundef 0) #2
%51 = load i32, ptr %24, align 8, !tbaa !19
%52 = tail call i32 @set_64bit_val(i32 noundef %51, i32 noundef 56, i64 noundef 0) #2
%53 = load ptr, ptr %4, align 8, !tbaa !9
%54 = load i32, ptr @I40IW_DEBUG_WQE, align 4, !tbaa !15
%55 = load i32, ptr %24, align 8, !tbaa !19
%56 = load i32, ptr @I40IW_CQP_CTX_SIZE, align 4, !tbaa !15
%57 = shl nsw i32 %56, 3
%58 = tail call i32 @i40iw_debug_buf(ptr noundef %53, i32 noundef %54, ptr noundef nonnull @.str, i32 noundef %55, i32 noundef %57) #2
%59 = getelementptr inbounds %struct.i40iw_sc_cqp, ptr %0, i64 0, i32 5
%60 = load i64, ptr %59, align 8, !tbaa !23
%61 = tail call i64 @RS_32_1(i64 noundef %60, i32 noundef 32) #2
%62 = load i64, ptr %59, align 8, !tbaa !23
%63 = load ptr, ptr %4, align 8, !tbaa !9
%64 = getelementptr inbounds %struct.TYPE_2__, ptr %63, i64 0, i32 1
%65 = load i64, ptr %64, align 8, !tbaa !24
%66 = icmp eq i64 %65, 0
%67 = load i32, ptr %63, align 8, !tbaa !13
%68 = load i32, ptr @I40E_VFPE_CCQPHIGH1, align 4
%69 = load i32, ptr @I40E_PFPE_CCQPHIGH, align 4
%70 = select i1 %66, i32 %68, i32 %69
%71 = tail call i32 @i40iw_wr32(i32 noundef %67, i32 noundef %70, i64 noundef %61) #2
%72 = load ptr, ptr %4, align 8, !tbaa !9
%73 = load i32, ptr %72, align 8, !tbaa !13
%74 = load i32, ptr @I40E_VFPE_CCQPLOW1, align 4
%75 = load i32, ptr @I40E_PFPE_CCQPLOW, align 4
%76 = select i1 %66, i32 %74, i32 %75
%77 = tail call i32 @i40iw_wr32(i32 noundef %73, i32 noundef %76, i64 noundef %62) #2
br label %78
78: ; preds = %101, %14
%79 = phi i64 [ 0, %14 ], [ %102, %101 ]
%80 = load i64, ptr @I40IW_DONE_COUNT, align 8, !tbaa !5
%81 = icmp sgt i64 %79, %80
br i1 %81, label %82, label %101
82: ; preds = %78
%83 = load ptr, ptr %4, align 8, !tbaa !9
%84 = load i32, ptr %83, align 8, !tbaa !13
%85 = tail call i32 @i40iw_free_dma_mem(i32 noundef %84, ptr noundef nonnull %7) #2
%86 = load i32, ptr @I40IW_ERR_TIMEOUT, align 4, !tbaa !15
%87 = load ptr, ptr %4, align 8, !tbaa !9
%88 = getelementptr inbounds %struct.TYPE_2__, ptr %87, i64 0, i32 1
%89 = load i64, ptr %88, align 8, !tbaa !24
%90 = icmp eq i64 %89, 0
%91 = load i32, ptr %87, align 8, !tbaa !13
%92 = load i32, ptr @I40E_VFPE_CQPERRCODES1, align 4
%93 = load i32, ptr @I40E_PFPE_CQPERRCODES, align 4
%94 = select i1 %90, i32 %92, i32 %93
%95 = tail call i64 @i40iw_rd32(i32 noundef %91, i32 noundef %94) #2
%96 = load i32, ptr @I40E_PFPE_CQPERRCODES_CQP_MINOR_CODE, align 4, !tbaa !15
%97 = tail call i64 @RS_32(i64 noundef %95, i32 noundef %96) #2
store i64 %97, ptr %2, align 8, !tbaa !5
%98 = load i32, ptr @I40E_PFPE_CQPERRCODES_CQP_MAJOR_CODE, align 4, !tbaa !15
%99 = tail call i64 @RS_32(i64 noundef %95, i32 noundef %98) #2
store i64 %99, ptr %1, align 8, !tbaa !5
%100 = icmp eq i32 %86, 0
br i1 %100, label %115, label %118
101: ; preds = %78
%102 = add nuw nsw i64 %79, 1
%103 = load i32, ptr @I40IW_SLEEP_COUNT, align 4, !tbaa !15
%104 = tail call i32 @udelay(i32 noundef %103) #2
%105 = load ptr, ptr %4, align 8, !tbaa !9
%106 = getelementptr inbounds %struct.TYPE_2__, ptr %105, i64 0, i32 1
%107 = load i64, ptr %106, align 8, !tbaa !24
%108 = icmp eq i64 %107, 0
%109 = load i32, ptr %105, align 8, !tbaa !13
%110 = load i32, ptr @I40E_VFPE_CCQPSTATUS1, align 4
%111 = load i32, ptr @I40E_PFPE_CCQPSTATUS, align 4
%112 = select i1 %108, i32 %110, i32 %111
%113 = tail call i64 @i40iw_rd32(i32 noundef %109, i32 noundef %112) #2
%114 = icmp eq i64 %113, 0
br i1 %114, label %78, label %115, !llvm.loop !25
115: ; preds = %101, %82
%116 = load i32, ptr @i40iw_update_sds_noccq, align 4, !tbaa !15
%117 = getelementptr inbounds %struct.i40iw_sc_cqp, ptr %0, i64 0, i32 2
store i32 %116, ptr %117, align 8, !tbaa !27
br label %118
118: ; preds = %3, %115, %82
%119 = phi i32 [ 0, %115 ], [ %86, %82 ], [ %12, %3 ]
ret i32 %119
}
declare i32 @i40iw_allocate_dma_mem(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @LS_64(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_64bit_val(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @i40iw_debug_buf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @RS_32_1(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @i40iw_wr32(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @i40iw_free_dma_mem(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @i40iw_rd32(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @RS_32(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 24}
!10 = !{!"i40iw_sc_cqp", !11, i64 0, !6, i64 8, !11, i64 16, !12, i64 24, !11, i64 32, !6, i64 40, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64}
!11 = !{!"int", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"TYPE_2__", !11, i64 0, !6, i64 8}
!15 = !{!11, !11, i64 0}
!16 = !{!10, !11, i64 0}
!17 = !{!10, !11, i64 64}
!18 = !{!10, !11, i64 60}
!19 = !{!10, !11, i64 48}
!20 = !{!10, !6, i64 8}
!21 = !{!10, !11, i64 56}
!22 = !{!10, !11, i64 52}
!23 = !{!10, !6, i64 40}
!24 = !{!14, !6, i64 8}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = !{!10, !11, i64 16}
|
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/i40iw/extr_i40iw_ctrl.c_i40iw_sc_cqp_create.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/i40iw/extr_i40iw_ctrl.c_i40iw_sc_cqp_create.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@I40IW_UPDATE_SD_BUF_SIZE = common local_unnamed_addr global i32 0, align 4
@I40IW_SD_BUF_ALIGNMENT = common local_unnamed_addr global i32 0, align 4
@I40IW_CQPHC_SQSIZE = common local_unnamed_addr global i32 0, align 4
@I40IW_CQPHC_SVER = common local_unnamed_addr global i32 0, align 4
@I40IW_CQPHC_ENABLED_VFS = common local_unnamed_addr global i32 0, align 4
@I40IW_CQPHC_HMC_PROFILE = common local_unnamed_addr global i32 0, align 4
@I40IW_DEBUG_WQE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [13 x i8] c"CQP_HOST_CTX\00", align 1
@I40IW_CQP_CTX_SIZE = common local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CCQPHIGH = common local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CCQPLOW = common local_unnamed_addr global i32 0, align 4
@I40E_VFPE_CCQPHIGH1 = common local_unnamed_addr global i32 0, align 4
@I40E_VFPE_CCQPLOW1 = common local_unnamed_addr global i32 0, align 4
@I40IW_DONE_COUNT = common local_unnamed_addr global i64 0, align 8
@I40IW_ERR_TIMEOUT = common local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CQPERRCODES = common local_unnamed_addr global i32 0, align 4
@I40E_VFPE_CQPERRCODES1 = common local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CQPERRCODES_CQP_MINOR_CODE = common local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CQPERRCODES_CQP_MAJOR_CODE = common local_unnamed_addr global i32 0, align 4
@I40IW_SLEEP_COUNT = common local_unnamed_addr global i32 0, align 4
@I40E_PFPE_CCQPSTATUS = common local_unnamed_addr global i32 0, align 4
@I40E_VFPE_CCQPSTATUS1 = common local_unnamed_addr global i32 0, align 4
@i40iw_update_sds_noccq = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @i40iw_sc_cqp_create], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @i40iw_sc_cqp_create(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) #0 {
store i64 0, ptr %1, align 8, !tbaa !6
store i64 0, ptr %2, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 24
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = load i32, ptr %5, align 8, !tbaa !14
%7 = getelementptr inbounds i8, ptr %0, i64 32
%8 = load i32, ptr @I40IW_UPDATE_SD_BUF_SIZE, align 4, !tbaa !16
%9 = load i32, ptr %0, align 8, !tbaa !17
%10 = mul nsw i32 %9, %8
%11 = load i32, ptr @I40IW_SD_BUF_ALIGNMENT, align 4, !tbaa !16
%12 = tail call i32 @i40iw_allocate_dma_mem(i32 noundef %6, ptr noundef nonnull %7, i32 noundef %10, i32 noundef %11) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %118
14: ; preds = %3
%15 = getelementptr inbounds i8, ptr %0, i64 64
%16 = load i32, ptr %15, align 8, !tbaa !18
%17 = load i32, ptr @I40IW_CQPHC_SQSIZE, align 4, !tbaa !16
%18 = tail call i64 @LS_64(i32 noundef %16, i32 noundef %17) #2
%19 = getelementptr inbounds i8, ptr %0, i64 60
%20 = load i32, ptr %19, align 4, !tbaa !19
%21 = load i32, ptr @I40IW_CQPHC_SVER, align 4, !tbaa !16
%22 = tail call i64 @LS_64(i32 noundef %20, i32 noundef %21) #2
%23 = or i64 %22, %18
%24 = getelementptr inbounds i8, ptr %0, i64 48
%25 = load i32, ptr %24, align 8, !tbaa !20
%26 = tail call i32 @set_64bit_val(i32 noundef %25, i32 noundef 0, i64 noundef %23) #2
%27 = load i32, ptr %24, align 8, !tbaa !20
%28 = getelementptr inbounds i8, ptr %0, i64 8
%29 = load i64, ptr %28, align 8, !tbaa !21
%30 = tail call i32 @set_64bit_val(i32 noundef %27, i32 noundef 8, i64 noundef %29) #2
%31 = getelementptr inbounds i8, ptr %0, i64 56
%32 = load i32, ptr %31, align 8, !tbaa !22
%33 = load i32, ptr @I40IW_CQPHC_ENABLED_VFS, align 4, !tbaa !16
%34 = tail call i64 @LS_64(i32 noundef %32, i32 noundef %33) #2
%35 = getelementptr inbounds i8, ptr %0, i64 52
%36 = load i32, ptr %35, align 4, !tbaa !23
%37 = load i32, ptr @I40IW_CQPHC_HMC_PROFILE, align 4, !tbaa !16
%38 = tail call i64 @LS_64(i32 noundef %36, i32 noundef %37) #2
%39 = or i64 %38, %34
%40 = load i32, ptr %24, align 8, !tbaa !20
%41 = tail call i32 @set_64bit_val(i32 noundef %40, i32 noundef 16, i64 noundef %39) #2
%42 = load i32, ptr %24, align 8, !tbaa !20
%43 = ptrtoint ptr %0 to i64
%44 = tail call i32 @set_64bit_val(i32 noundef %42, i32 noundef 24, i64 noundef %43) #2
%45 = load i32, ptr %24, align 8, !tbaa !20
%46 = tail call i32 @set_64bit_val(i32 noundef %45, i32 noundef 32, i64 noundef 0) #2
%47 = load i32, ptr %24, align 8, !tbaa !20
%48 = tail call i32 @set_64bit_val(i32 noundef %47, i32 noundef 40, i64 noundef 0) #2
%49 = load i32, ptr %24, align 8, !tbaa !20
%50 = tail call i32 @set_64bit_val(i32 noundef %49, i32 noundef 48, i64 noundef 0) #2
%51 = load i32, ptr %24, align 8, !tbaa !20
%52 = tail call i32 @set_64bit_val(i32 noundef %51, i32 noundef 56, i64 noundef 0) #2
%53 = load ptr, ptr %4, align 8, !tbaa !10
%54 = load i32, ptr @I40IW_DEBUG_WQE, align 4, !tbaa !16
%55 = load i32, ptr %24, align 8, !tbaa !20
%56 = load i32, ptr @I40IW_CQP_CTX_SIZE, align 4, !tbaa !16
%57 = shl nsw i32 %56, 3
%58 = tail call i32 @i40iw_debug_buf(ptr noundef %53, i32 noundef %54, ptr noundef nonnull @.str, i32 noundef %55, i32 noundef %57) #2
%59 = getelementptr inbounds i8, ptr %0, i64 40
%60 = load i64, ptr %59, align 8, !tbaa !24
%61 = tail call i64 @RS_32_1(i64 noundef %60, i32 noundef 32) #2
%62 = load i64, ptr %59, align 8, !tbaa !24
%63 = load ptr, ptr %4, align 8, !tbaa !10
%64 = getelementptr inbounds i8, ptr %63, i64 8
%65 = load i64, ptr %64, align 8, !tbaa !25
%66 = icmp eq i64 %65, 0
%67 = load i32, ptr %63, align 8, !tbaa !14
%68 = load i32, ptr @I40E_VFPE_CCQPHIGH1, align 4
%69 = load i32, ptr @I40E_PFPE_CCQPHIGH, align 4
%70 = select i1 %66, i32 %68, i32 %69
%71 = tail call i32 @i40iw_wr32(i32 noundef %67, i32 noundef %70, i64 noundef %61) #2
%72 = load ptr, ptr %4, align 8, !tbaa !10
%73 = load i32, ptr %72, align 8, !tbaa !14
%74 = load i32, ptr @I40E_VFPE_CCQPLOW1, align 4
%75 = load i32, ptr @I40E_PFPE_CCQPLOW, align 4
%76 = select i1 %66, i32 %74, i32 %75
%77 = tail call i32 @i40iw_wr32(i32 noundef %73, i32 noundef %76, i64 noundef %62) #2
br label %78
78: ; preds = %101, %14
%79 = phi i64 [ 0, %14 ], [ %102, %101 ]
%80 = load i64, ptr @I40IW_DONE_COUNT, align 8, !tbaa !6
%81 = icmp sgt i64 %79, %80
br i1 %81, label %82, label %101
82: ; preds = %78
%83 = load ptr, ptr %4, align 8, !tbaa !10
%84 = load i32, ptr %83, align 8, !tbaa !14
%85 = tail call i32 @i40iw_free_dma_mem(i32 noundef %84, ptr noundef nonnull %7) #2
%86 = load i32, ptr @I40IW_ERR_TIMEOUT, align 4, !tbaa !16
%87 = load ptr, ptr %4, align 8, !tbaa !10
%88 = getelementptr inbounds i8, ptr %87, i64 8
%89 = load i64, ptr %88, align 8, !tbaa !25
%90 = icmp eq i64 %89, 0
%91 = load i32, ptr %87, align 8, !tbaa !14
%92 = load i32, ptr @I40E_VFPE_CQPERRCODES1, align 4
%93 = load i32, ptr @I40E_PFPE_CQPERRCODES, align 4
%94 = select i1 %90, i32 %92, i32 %93
%95 = tail call i64 @i40iw_rd32(i32 noundef %91, i32 noundef %94) #2
%96 = load i32, ptr @I40E_PFPE_CQPERRCODES_CQP_MINOR_CODE, align 4, !tbaa !16
%97 = tail call i64 @RS_32(i64 noundef %95, i32 noundef %96) #2
store i64 %97, ptr %2, align 8, !tbaa !6
%98 = load i32, ptr @I40E_PFPE_CQPERRCODES_CQP_MAJOR_CODE, align 4, !tbaa !16
%99 = tail call i64 @RS_32(i64 noundef %95, i32 noundef %98) #2
store i64 %99, ptr %1, align 8, !tbaa !6
%100 = icmp eq i32 %86, 0
br i1 %100, label %115, label %118
101: ; preds = %78
%102 = add nuw nsw i64 %79, 1
%103 = load i32, ptr @I40IW_SLEEP_COUNT, align 4, !tbaa !16
%104 = tail call i32 @udelay(i32 noundef %103) #2
%105 = load ptr, ptr %4, align 8, !tbaa !10
%106 = getelementptr inbounds i8, ptr %105, i64 8
%107 = load i64, ptr %106, align 8, !tbaa !25
%108 = icmp eq i64 %107, 0
%109 = load i32, ptr %105, align 8, !tbaa !14
%110 = load i32, ptr @I40E_VFPE_CCQPSTATUS1, align 4
%111 = load i32, ptr @I40E_PFPE_CCQPSTATUS, align 4
%112 = select i1 %108, i32 %110, i32 %111
%113 = tail call i64 @i40iw_rd32(i32 noundef %109, i32 noundef %112) #2
%114 = icmp eq i64 %113, 0
br i1 %114, label %78, label %115, !llvm.loop !26
115: ; preds = %101, %82
%116 = load i32, ptr @i40iw_update_sds_noccq, align 4, !tbaa !16
%117 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %116, ptr %117, align 8, !tbaa !28
br label %118
118: ; preds = %3, %115, %82
%119 = phi i32 [ 0, %115 ], [ %86, %82 ], [ %12, %3 ]
ret i32 %119
}
declare i32 @i40iw_allocate_dma_mem(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @LS_64(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_64bit_val(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @i40iw_debug_buf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @RS_32_1(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @i40iw_wr32(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @i40iw_free_dma_mem(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @i40iw_rd32(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @RS_32(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 24}
!11 = !{!"i40iw_sc_cqp", !12, i64 0, !7, i64 8, !12, i64 16, !13, i64 24, !12, i64 32, !7, i64 40, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64}
!12 = !{!"int", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"TYPE_2__", !12, i64 0, !7, i64 8}
!16 = !{!12, !12, i64 0}
!17 = !{!11, !12, i64 0}
!18 = !{!11, !12, i64 64}
!19 = !{!11, !12, i64 60}
!20 = !{!11, !12, i64 48}
!21 = !{!11, !7, i64 8}
!22 = !{!11, !12, i64 56}
!23 = !{!11, !12, i64 52}
!24 = !{!11, !7, i64 40}
!25 = !{!15, !7, i64 8}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = !{!11, !12, i64 16}
|
linux_drivers_infiniband_hw_i40iw_extr_i40iw_ctrl.c_i40iw_sc_cqp_create
|
; ModuleID = 'AnghaBench/freebsd/sys/netsmb/extr_smb_trantcp.c_smb_nbst_setparam.c'
source_filename = "AnghaBench/freebsd/sys/netsmb/extr_smb_trantcp.c_smb_nbst_setparam.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @smb_nbst_setparam], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable
define internal i32 @smb_nbst_setparam(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = icmp eq i32 %1, 128
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = load ptr, ptr %0, align 8, !tbaa !5
store ptr %2, ptr %6, align 8, !tbaa !10
br label %9
7: ; preds = %3
%8 = load i32, ptr @EINVAL, align 4, !tbaa !12
br label %9
9: ; preds = %5, %7
%10 = phi i32 [ 0, %5 ], [ %8, %7 ]
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"smb_vc", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"nbpcb", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/netsmb/extr_smb_trantcp.c_smb_nbst_setparam.c'
source_filename = "AnghaBench/freebsd/sys/netsmb/extr_smb_trantcp.c_smb_nbst_setparam.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @smb_nbst_setparam], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal i32 @smb_nbst_setparam(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = icmp eq i32 %1, 128
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = load ptr, ptr %0, align 8, !tbaa !6
store ptr %2, ptr %6, align 8, !tbaa !11
br label %9
7: ; preds = %3
%8 = load i32, ptr @EINVAL, align 4, !tbaa !13
br label %9
9: ; preds = %5, %7
%10 = phi i32 [ 0, %5 ], [ %8, %7 ]
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"smb_vc", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"nbpcb", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
|
freebsd_sys_netsmb_extr_smb_trantcp.c_smb_nbst_setparam
|
; ModuleID = 'AnghaBench/freebsd/contrib/amd/libamu/extr_xdr_func.c_xdr_entry.c'
source_filename = "AnghaBench/freebsd/contrib/amd/libamu/extr_xdr_func.c_xdr_entry.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32, i32, i32 }
@D_XDRTRACE = dso_local local_unnamed_addr global i32 0, align 4
@XLOG_DEBUG = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [11 x i8] c"xdr_entry:\00", align 1
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@TRUE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @xdr_entry(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @D_XDRTRACE, align 4, !tbaa !5
%4 = tail call i64 @amuDebug(i32 noundef %3) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = load i32, ptr @XLOG_DEBUG, align 4, !tbaa !5
%8 = tail call i32 @plog(i32 noundef %7, ptr noundef nonnull @.str) #2
br label %9
9: ; preds = %6, %2
%10 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 3
%11 = tail call i32 @xdr_u_int(ptr noundef %0, ptr noundef nonnull %10) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %26, label %13
13: ; preds = %9
%14 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 2
%15 = tail call i32 @xdr_filename(ptr noundef %0, ptr noundef nonnull %14) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %26, label %17
17: ; preds = %13
%18 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 1
%19 = load i32, ptr %18, align 4, !tbaa !9
%20 = tail call i32 @xdr_nfscookie(ptr noundef %0, i32 noundef %19) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %26, label %22
22: ; preds = %17
%23 = tail call i32 @xdr_pointer(ptr noundef %0, ptr noundef nonnull %1, i32 noundef 16, i32 noundef ptrtoint (ptr @xdr_entry to i32)) #2
%24 = icmp eq i32 %23, 0
%25 = select i1 %24, ptr @FALSE, ptr @TRUE
br label %26
26: ; preds = %22, %17, %13, %9
%27 = phi ptr [ @FALSE, %9 ], [ @FALSE, %13 ], [ @FALSE, %17 ], [ %25, %22 ]
%28 = load i32, ptr %27, align 4, !tbaa !5
ret i32 %28
}
declare i64 @amuDebug(i32 noundef) local_unnamed_addr #1
declare i32 @plog(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xdr_u_int(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xdr_filename(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xdr_nfscookie(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @xdr_pointer(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"TYPE_3__", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
|
; ModuleID = 'AnghaBench/freebsd/contrib/amd/libamu/extr_xdr_func.c_xdr_entry.c'
source_filename = "AnghaBench/freebsd/contrib/amd/libamu/extr_xdr_func.c_xdr_entry.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@D_XDRTRACE = common local_unnamed_addr global i32 0, align 4
@XLOG_DEBUG = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [11 x i8] c"xdr_entry:\00", align 1
@FALSE = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @xdr_entry(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @D_XDRTRACE, align 4, !tbaa !6
%4 = tail call i64 @amuDebug(i32 noundef %3) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = load i32, ptr @XLOG_DEBUG, align 4, !tbaa !6
%8 = tail call i32 @plog(i32 noundef %7, ptr noundef nonnull @.str) #2
br label %9
9: ; preds = %6, %2
%10 = getelementptr inbounds i8, ptr %1, i64 12
%11 = tail call i32 @xdr_u_int(ptr noundef %0, ptr noundef nonnull %10) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %26, label %13
13: ; preds = %9
%14 = getelementptr inbounds i8, ptr %1, i64 8
%15 = tail call i32 @xdr_filename(ptr noundef %0, ptr noundef nonnull %14) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %26, label %17
17: ; preds = %13
%18 = getelementptr inbounds i8, ptr %1, i64 4
%19 = load i32, ptr %18, align 4, !tbaa !10
%20 = tail call i32 @xdr_nfscookie(ptr noundef %0, i32 noundef %19) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %26, label %22
22: ; preds = %17
%23 = tail call i32 @xdr_pointer(ptr noundef %0, ptr noundef nonnull %1, i32 noundef 16, i32 noundef ptrtoint (ptr @xdr_entry to i32)) #2
%24 = icmp eq i32 %23, 0
%25 = select i1 %24, ptr @FALSE, ptr @TRUE
br label %26
26: ; preds = %22, %17, %13, %9
%27 = phi ptr [ @FALSE, %9 ], [ @FALSE, %13 ], [ @FALSE, %17 ], [ %25, %22 ]
%28 = load i32, ptr %27, align 4, !tbaa !6
ret i32 %28
}
declare i64 @amuDebug(i32 noundef) local_unnamed_addr #1
declare i32 @plog(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xdr_u_int(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xdr_filename(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xdr_nfscookie(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @xdr_pointer(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"TYPE_3__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
|
freebsd_contrib_amd_libamu_extr_xdr_func.c_xdr_entry
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/fdc/extr_fdc.c_fdc_add_child.c'
source_filename = "AnghaBench/freebsd/sys/dev/fdc/extr_fdc.c_fdc_add_child.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fdc_ivars = type { i32, i32 }
@M_DEVBUF = dso_local local_unnamed_addr global i32 0, align 4
@M_NOWAIT = dso_local local_unnamed_addr global i32 0, align 4
@M_ZERO = dso_local local_unnamed_addr global i32 0, align 4
@FDT_NONE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @fdc_add_child(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @M_DEVBUF, align 4, !tbaa !5
%5 = load i32, ptr @M_NOWAIT, align 4, !tbaa !5
%6 = load i32, ptr @M_ZERO, align 4, !tbaa !5
%7 = or i32 %6, %5
%8 = tail call ptr @malloc(i32 noundef 8, i32 noundef %4, i32 noundef %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %24, label %10
10: ; preds = %3
%11 = tail call ptr @device_add_child(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, ptr @M_DEVBUF, align 4, !tbaa !5
%15 = tail call i32 @free(ptr noundef nonnull %8, i32 noundef %14) #2
br label %24
16: ; preds = %10
%17 = tail call i32 @device_set_ivars(ptr noundef nonnull %11, ptr noundef nonnull %8) #2
store i32 %2, ptr %8, align 4, !tbaa !9
%18 = load i32, ptr @FDT_NONE, align 4, !tbaa !5
%19 = getelementptr inbounds %struct.fdc_ivars, ptr %8, i64 0, i32 1
store i32 %18, ptr %19, align 4, !tbaa !11
%20 = tail call i64 @resource_disabled(ptr noundef %1, i32 noundef %2) #2
%21 = icmp eq i64 %20, 0
br i1 %21, label %24, label %22
22: ; preds = %16
%23 = tail call i32 @device_disable(ptr noundef nonnull %11) #2
br label %24
24: ; preds = %16, %22, %3, %13
%25 = phi ptr [ null, %13 ], [ null, %3 ], [ %11, %22 ], [ %11, %16 ]
ret ptr %25
}
declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @device_add_child(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_set_ivars(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @resource_disabled(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_disable(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"fdc_ivars", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/fdc/extr_fdc.c_fdc_add_child.c'
source_filename = "AnghaBench/freebsd/sys/dev/fdc/extr_fdc.c_fdc_add_child.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@M_DEVBUF = common local_unnamed_addr global i32 0, align 4
@M_NOWAIT = common local_unnamed_addr global i32 0, align 4
@M_ZERO = common local_unnamed_addr global i32 0, align 4
@FDT_NONE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @fdc_add_child(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @M_DEVBUF, align 4, !tbaa !6
%5 = load i32, ptr @M_NOWAIT, align 4, !tbaa !6
%6 = load i32, ptr @M_ZERO, align 4, !tbaa !6
%7 = or i32 %6, %5
%8 = tail call ptr @malloc(i32 noundef 8, i32 noundef %4, i32 noundef %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %24, label %10
10: ; preds = %3
%11 = tail call ptr @device_add_child(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, ptr @M_DEVBUF, align 4, !tbaa !6
%15 = tail call i32 @free(ptr noundef nonnull %8, i32 noundef %14) #2
br label %24
16: ; preds = %10
%17 = tail call i32 @device_set_ivars(ptr noundef nonnull %11, ptr noundef nonnull %8) #2
store i32 %2, ptr %8, align 4, !tbaa !10
%18 = load i32, ptr @FDT_NONE, align 4, !tbaa !6
%19 = getelementptr inbounds i8, ptr %8, i64 4
store i32 %18, ptr %19, align 4, !tbaa !12
%20 = tail call i64 @resource_disabled(ptr noundef %1, i32 noundef %2) #2
%21 = icmp eq i64 %20, 0
br i1 %21, label %24, label %22
22: ; preds = %16
%23 = tail call i32 @device_disable(ptr noundef nonnull %11) #2
br label %24
24: ; preds = %16, %22, %3, %13
%25 = phi ptr [ null, %13 ], [ null, %3 ], [ %11, %22 ], [ %11, %16 ]
ret ptr %25
}
declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @device_add_child(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_set_ivars(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @resource_disabled(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_disable(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"fdc_ivars", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 4}
|
freebsd_sys_dev_fdc_extr_fdc.c_fdc_add_child
|
; ModuleID = 'AnghaBench/linux/drivers/media/v4l2-core/extr_v4l2-subdev.c_call_get_fmt.c'
source_filename = "AnghaBench/linux/drivers/media/v4l2-core/extr_v4l2-subdev.c_call_get_fmt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @call_get_fmt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @call_get_fmt(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call i64 @check_format(ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load ptr, ptr %0, align 8, !tbaa !5
%8 = load ptr, ptr %7, align 8, !tbaa !10
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = tail call i32 %9(ptr noundef nonnull %0, ptr noundef %1, ptr noundef %2) #2
%11 = zext i32 %10 to i64
br label %12
12: ; preds = %3, %6
%13 = phi i64 [ %11, %6 ], [ %4, %3 ]
%14 = trunc i64 %13 to i32
ret i32 %14
}
declare i64 @check_format(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"v4l2_subdev", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_3__", !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/media/v4l2-core/extr_v4l2-subdev.c_call_get_fmt.c'
source_filename = "AnghaBench/linux/drivers/media/v4l2-core/extr_v4l2-subdev.c_call_get_fmt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @call_get_fmt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @call_get_fmt(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call i64 @check_format(ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load ptr, ptr %0, align 8, !tbaa !6
%8 = load ptr, ptr %7, align 8, !tbaa !11
%9 = load ptr, ptr %8, align 8, !tbaa !13
%10 = tail call i32 %9(ptr noundef nonnull %0, ptr noundef %1, ptr noundef %2) #2
%11 = zext i32 %10 to i64
br label %12
12: ; preds = %3, %6
%13 = phi i64 [ %11, %6 ], [ %4, %3 ]
%14 = trunc i64 %13 to i32
ret i32 %14
}
declare i64 @check_format(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"v4l2_subdev", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_4__", !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"TYPE_3__", !8, i64 0}
|
linux_drivers_media_v4l2-core_extr_v4l2-subdev.c_call_get_fmt
|
; ModuleID = 'AnghaBench/linux/security/extr_commoncap.c_cap_task_setnice.c'
source_filename = "AnghaBench/linux/security/extr_commoncap.c_cap_task_setnice.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @cap_task_setnice(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @cap_safe_nice(ptr noundef %0) #2
ret i32 %3
}
declare i32 @cap_safe_nice(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/security/extr_commoncap.c_cap_task_setnice.c'
source_filename = "AnghaBench/linux/security/extr_commoncap.c_cap_task_setnice.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @cap_task_setnice(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @cap_safe_nice(ptr noundef %0) #2
ret i32 %3
}
declare i32 @cap_safe_nice(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_security_extr_commoncap.c_cap_task_setnice
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/vmwgfx/extr_vmwgfx_execbuf.c_vmw_free_relocations.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/vmwgfx/extr_vmwgfx_execbuf.c_vmw_free_relocations.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @vmw_free_relocations], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vmw_free_relocations(ptr noundef %0) #0 {
%2 = tail call i32 @INIT_LIST_HEAD(ptr noundef %0) #2
ret void
}
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/vmwgfx/extr_vmwgfx_execbuf.c_vmw_free_relocations.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/vmwgfx/extr_vmwgfx_execbuf.c_vmw_free_relocations.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @vmw_free_relocations], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vmw_free_relocations(ptr noundef %0) #0 {
%2 = tail call i32 @INIT_LIST_HEAD(ptr noundef %0) #2
ret void
}
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_gpu_drm_vmwgfx_extr_vmwgfx_execbuf.c_vmw_free_relocations
|
; ModuleID = 'AnghaBench/linux/kernel/time/extr_timekeeping.c_timekeeping_validate_timex.c'
source_filename = "AnghaBench/linux/kernel/time/extr_timekeeping.c_timekeeping_validate_timex.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.__kernel_timex = type { i32, i32, i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i64 }
@ADJ_ADJTIME = dso_local local_unnamed_addr global i32 0, align 4
@ADJ_OFFSET_SINGLESHOT = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@ADJ_OFFSET_READONLY = dso_local local_unnamed_addr global i32 0, align 4
@CAP_SYS_TIME = dso_local local_unnamed_addr global i32 0, align 4
@EPERM = dso_local local_unnamed_addr global i32 0, align 4
@ADJ_TICK = dso_local local_unnamed_addr global i32 0, align 4
@USER_HZ = dso_local local_unnamed_addr global i32 0, align 4
@ADJ_SETOFFSET = dso_local local_unnamed_addr global i32 0, align 4
@ADJ_NANO = dso_local local_unnamed_addr global i32 0, align 4
@NSEC_PER_SEC = dso_local local_unnamed_addr global i64 0, align 8
@USEC_PER_SEC = dso_local local_unnamed_addr global i64 0, align 8
@ADJ_FREQUENCY = dso_local local_unnamed_addr global i32 0, align 4
@BITS_PER_LONG = dso_local local_unnamed_addr global i32 0, align 4
@LLONG_MIN = dso_local local_unnamed_addr global i32 0, align 4
@PPM_SCALE = dso_local local_unnamed_addr global i32 0, align 4
@LLONG_MAX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @timekeeping_validate_timex], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @timekeeping_validate_timex(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = load i32, ptr @ADJ_ADJTIME, align 4, !tbaa !12
%4 = and i32 %3, %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %26, label %6
6: ; preds = %1
%7 = load i32, ptr @ADJ_OFFSET_SINGLESHOT, align 4, !tbaa !12
%8 = and i32 %7, %2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i32, ptr @EINVAL, align 4, !tbaa !12
%12 = sub nsw i32 0, %11
br label %115
13: ; preds = %6
%14 = load i32, ptr @ADJ_OFFSET_READONLY, align 4, !tbaa !12
%15 = and i32 %14, %2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %54
17: ; preds = %13
%18 = load i32, ptr @CAP_SYS_TIME, align 4, !tbaa !12
%19 = tail call i32 @capable(i32 noundef %18) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %23, label %21
21: ; preds = %17
%22 = load i32, ptr %0, align 8, !tbaa !5
br label %54
23: ; preds = %17
%24 = load i32, ptr @EPERM, align 4, !tbaa !12
%25 = sub nsw i32 0, %24
br label %115
26: ; preds = %1
%27 = icmp eq i32 %2, 0
br i1 %27, label %37, label %28
28: ; preds = %26
%29 = load i32, ptr @CAP_SYS_TIME, align 4, !tbaa !12
%30 = tail call i32 @capable(i32 noundef %29) #2
%31 = icmp eq i32 %30, 0
br i1 %31, label %34, label %32
32: ; preds = %28
%33 = load i32, ptr %0, align 8, !tbaa !5
br label %37
34: ; preds = %28
%35 = load i32, ptr @EPERM, align 4, !tbaa !12
%36 = sub nsw i32 0, %35
br label %115
37: ; preds = %32, %26
%38 = phi i32 [ %33, %32 ], [ 0, %26 ]
%39 = load i32, ptr @ADJ_TICK, align 4, !tbaa !12
%40 = and i32 %39, %38
%41 = icmp eq i32 %40, 0
br i1 %41, label %54, label %42
42: ; preds = %37
%43 = getelementptr inbounds %struct.__kernel_timex, ptr %0, i64 0, i32 1
%44 = load i32, ptr %43, align 4, !tbaa !13
%45 = load i32, ptr @USER_HZ, align 4, !tbaa !12
%46 = sdiv i32 900000, %45
%47 = icmp slt i32 %44, %46
br i1 %47, label %51, label %48
48: ; preds = %42
%49 = sdiv i32 1100000, %45
%50 = icmp sgt i32 %44, %49
br i1 %50, label %51, label %54
51: ; preds = %48, %42
%52 = load i32, ptr @EINVAL, align 4, !tbaa !12
%53 = sub nsw i32 0, %52
br label %115
54: ; preds = %21, %37, %48, %13
%55 = phi i32 [ %22, %21 ], [ %38, %37 ], [ %38, %48 ], [ %2, %13 ]
%56 = load i32, ptr @ADJ_SETOFFSET, align 4, !tbaa !12
%57 = and i32 %56, %55
%58 = icmp eq i32 %57, 0
br i1 %58, label %90, label %59
59: ; preds = %54
%60 = load i32, ptr @CAP_SYS_TIME, align 4, !tbaa !12
%61 = tail call i32 @capable(i32 noundef %60) #2
%62 = icmp eq i32 %61, 0
br i1 %62, label %63, label %66
63: ; preds = %59
%64 = load i32, ptr @EPERM, align 4, !tbaa !12
%65 = sub nsw i32 0, %64
br label %115
66: ; preds = %59
%67 = getelementptr inbounds %struct.__kernel_timex, ptr %0, i64 0, i32 3
%68 = load i64, ptr %67, align 8, !tbaa !14
%69 = icmp slt i64 %68, 0
br i1 %69, label %70, label %73
70: ; preds = %66
%71 = load i32, ptr @EINVAL, align 4, !tbaa !12
%72 = sub nsw i32 0, %71
br label %115
73: ; preds = %66
%74 = load i32, ptr %0, align 8, !tbaa !5
%75 = load i32, ptr @ADJ_NANO, align 4, !tbaa !12
%76 = and i32 %75, %74
%77 = icmp eq i32 %76, 0
br i1 %77, label %84, label %78
78: ; preds = %73
%79 = load i64, ptr @NSEC_PER_SEC, align 8, !tbaa !15
%80 = icmp slt i64 %68, %79
br i1 %80, label %90, label %81
81: ; preds = %78
%82 = load i32, ptr @EINVAL, align 4, !tbaa !12
%83 = sub nsw i32 0, %82
br label %115
84: ; preds = %73
%85 = load i64, ptr @USEC_PER_SEC, align 8, !tbaa !15
%86 = icmp slt i64 %68, %85
br i1 %86, label %90, label %87
87: ; preds = %84
%88 = load i32, ptr @EINVAL, align 4, !tbaa !12
%89 = sub nsw i32 0, %88
br label %115
90: ; preds = %78, %84, %54
%91 = phi i32 [ %74, %78 ], [ %74, %84 ], [ %55, %54 ]
%92 = load i32, ptr @ADJ_FREQUENCY, align 4, !tbaa !12
%93 = and i32 %92, %91
%94 = icmp ne i32 %93, 0
%95 = load i32, ptr @BITS_PER_LONG, align 4
%96 = icmp eq i32 %95, 64
%97 = select i1 %94, i1 %96, i1 false
br i1 %97, label %98, label %115
98: ; preds = %90
%99 = load i32, ptr @LLONG_MIN, align 4, !tbaa !12
%100 = load i32, ptr @PPM_SCALE, align 4, !tbaa !12
%101 = sdiv i32 %99, %100
%102 = getelementptr inbounds %struct.__kernel_timex, ptr %0, i64 0, i32 2
%103 = load i32, ptr %102, align 8, !tbaa !16
%104 = icmp sgt i32 %101, %103
br i1 %104, label %105, label %108
105: ; preds = %98
%106 = load i32, ptr @EINVAL, align 4, !tbaa !12
%107 = sub nsw i32 0, %106
br label %115
108: ; preds = %98
%109 = load i32, ptr @LLONG_MAX, align 4, !tbaa !12
%110 = sdiv i32 %109, %100
%111 = icmp slt i32 %110, %103
br i1 %111, label %112, label %115
112: ; preds = %108
%113 = load i32, ptr @EINVAL, align 4, !tbaa !12
%114 = sub nsw i32 0, %113
br label %115
115: ; preds = %90, %108, %112, %105, %87, %81, %70, %63, %51, %34, %23, %10
%116 = phi i32 [ %72, %70 ], [ %83, %81 ], [ %107, %105 ], [ %114, %112 ], [ %89, %87 ], [ %65, %63 ], [ %25, %23 ], [ %12, %10 ], [ %53, %51 ], [ %36, %34 ], [ 0, %108 ], [ 0, %90 ]
ret i32 %116
}
declare i32 @capable(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"__kernel_timex", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 4}
!14 = !{!6, !11, i64 16}
!15 = !{!11, !11, i64 0}
!16 = !{!6, !7, i64 8}
|
; ModuleID = 'AnghaBench/linux/kernel/time/extr_timekeeping.c_timekeeping_validate_timex.c'
source_filename = "AnghaBench/linux/kernel/time/extr_timekeeping.c_timekeeping_validate_timex.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ADJ_ADJTIME = common local_unnamed_addr global i32 0, align 4
@ADJ_OFFSET_SINGLESHOT = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@ADJ_OFFSET_READONLY = common local_unnamed_addr global i32 0, align 4
@CAP_SYS_TIME = common local_unnamed_addr global i32 0, align 4
@EPERM = common local_unnamed_addr global i32 0, align 4
@ADJ_TICK = common local_unnamed_addr global i32 0, align 4
@USER_HZ = common local_unnamed_addr global i32 0, align 4
@ADJ_SETOFFSET = common local_unnamed_addr global i32 0, align 4
@ADJ_NANO = common local_unnamed_addr global i32 0, align 4
@NSEC_PER_SEC = common local_unnamed_addr global i64 0, align 8
@USEC_PER_SEC = common local_unnamed_addr global i64 0, align 8
@ADJ_FREQUENCY = common local_unnamed_addr global i32 0, align 4
@BITS_PER_LONG = common local_unnamed_addr global i32 0, align 4
@LLONG_MIN = common local_unnamed_addr global i32 0, align 4
@PPM_SCALE = common local_unnamed_addr global i32 0, align 4
@LLONG_MAX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @timekeeping_validate_timex], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @timekeeping_validate_timex(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr @ADJ_ADJTIME, align 4, !tbaa !13
%4 = and i32 %3, %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %26, label %6
6: ; preds = %1
%7 = load i32, ptr @ADJ_OFFSET_SINGLESHOT, align 4, !tbaa !13
%8 = and i32 %7, %2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i32, ptr @EINVAL, align 4, !tbaa !13
%12 = sub nsw i32 0, %11
br label %115
13: ; preds = %6
%14 = load i32, ptr @ADJ_OFFSET_READONLY, align 4, !tbaa !13
%15 = and i32 %14, %2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %54
17: ; preds = %13
%18 = load i32, ptr @CAP_SYS_TIME, align 4, !tbaa !13
%19 = tail call i32 @capable(i32 noundef %18) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %23, label %21
21: ; preds = %17
%22 = load i32, ptr %0, align 8, !tbaa !6
br label %54
23: ; preds = %17
%24 = load i32, ptr @EPERM, align 4, !tbaa !13
%25 = sub nsw i32 0, %24
br label %115
26: ; preds = %1
%27 = icmp eq i32 %2, 0
br i1 %27, label %37, label %28
28: ; preds = %26
%29 = load i32, ptr @CAP_SYS_TIME, align 4, !tbaa !13
%30 = tail call i32 @capable(i32 noundef %29) #2
%31 = icmp eq i32 %30, 0
br i1 %31, label %34, label %32
32: ; preds = %28
%33 = load i32, ptr %0, align 8, !tbaa !6
br label %37
34: ; preds = %28
%35 = load i32, ptr @EPERM, align 4, !tbaa !13
%36 = sub nsw i32 0, %35
br label %115
37: ; preds = %32, %26
%38 = phi i32 [ %33, %32 ], [ 0, %26 ]
%39 = load i32, ptr @ADJ_TICK, align 4, !tbaa !13
%40 = and i32 %39, %38
%41 = icmp eq i32 %40, 0
br i1 %41, label %54, label %42
42: ; preds = %37
%43 = getelementptr inbounds i8, ptr %0, i64 4
%44 = load i32, ptr %43, align 4, !tbaa !14
%45 = load i32, ptr @USER_HZ, align 4, !tbaa !13
%46 = sdiv i32 900000, %45
%47 = icmp slt i32 %44, %46
br i1 %47, label %51, label %48
48: ; preds = %42
%49 = sdiv i32 1100000, %45
%50 = icmp sgt i32 %44, %49
br i1 %50, label %51, label %54
51: ; preds = %48, %42
%52 = load i32, ptr @EINVAL, align 4, !tbaa !13
%53 = sub nsw i32 0, %52
br label %115
54: ; preds = %21, %37, %48, %13
%55 = phi i32 [ %22, %21 ], [ %38, %37 ], [ %38, %48 ], [ %2, %13 ]
%56 = load i32, ptr @ADJ_SETOFFSET, align 4, !tbaa !13
%57 = and i32 %56, %55
%58 = icmp eq i32 %57, 0
br i1 %58, label %90, label %59
59: ; preds = %54
%60 = load i32, ptr @CAP_SYS_TIME, align 4, !tbaa !13
%61 = tail call i32 @capable(i32 noundef %60) #2
%62 = icmp eq i32 %61, 0
br i1 %62, label %63, label %66
63: ; preds = %59
%64 = load i32, ptr @EPERM, align 4, !tbaa !13
%65 = sub nsw i32 0, %64
br label %115
66: ; preds = %59
%67 = getelementptr inbounds i8, ptr %0, i64 16
%68 = load i64, ptr %67, align 8, !tbaa !15
%69 = icmp slt i64 %68, 0
br i1 %69, label %70, label %73
70: ; preds = %66
%71 = load i32, ptr @EINVAL, align 4, !tbaa !13
%72 = sub nsw i32 0, %71
br label %115
73: ; preds = %66
%74 = load i32, ptr %0, align 8, !tbaa !6
%75 = load i32, ptr @ADJ_NANO, align 4, !tbaa !13
%76 = and i32 %75, %74
%77 = icmp eq i32 %76, 0
br i1 %77, label %84, label %78
78: ; preds = %73
%79 = load i64, ptr @NSEC_PER_SEC, align 8, !tbaa !16
%80 = icmp slt i64 %68, %79
br i1 %80, label %90, label %81
81: ; preds = %78
%82 = load i32, ptr @EINVAL, align 4, !tbaa !13
%83 = sub nsw i32 0, %82
br label %115
84: ; preds = %73
%85 = load i64, ptr @USEC_PER_SEC, align 8, !tbaa !16
%86 = icmp slt i64 %68, %85
br i1 %86, label %90, label %87
87: ; preds = %84
%88 = load i32, ptr @EINVAL, align 4, !tbaa !13
%89 = sub nsw i32 0, %88
br label %115
90: ; preds = %78, %84, %54
%91 = phi i32 [ %74, %78 ], [ %74, %84 ], [ %55, %54 ]
%92 = load i32, ptr @ADJ_FREQUENCY, align 4, !tbaa !13
%93 = and i32 %92, %91
%94 = icmp ne i32 %93, 0
%95 = load i32, ptr @BITS_PER_LONG, align 4
%96 = icmp eq i32 %95, 64
%97 = select i1 %94, i1 %96, i1 false
br i1 %97, label %98, label %115
98: ; preds = %90
%99 = load i32, ptr @LLONG_MIN, align 4, !tbaa !13
%100 = load i32, ptr @PPM_SCALE, align 4, !tbaa !13
%101 = sdiv i32 %99, %100
%102 = getelementptr inbounds i8, ptr %0, i64 8
%103 = load i32, ptr %102, align 8, !tbaa !17
%104 = icmp sgt i32 %101, %103
br i1 %104, label %105, label %108
105: ; preds = %98
%106 = load i32, ptr @EINVAL, align 4, !tbaa !13
%107 = sub nsw i32 0, %106
br label %115
108: ; preds = %98
%109 = load i32, ptr @LLONG_MAX, align 4, !tbaa !13
%110 = sdiv i32 %109, %100
%111 = icmp slt i32 %110, %103
br i1 %111, label %112, label %115
112: ; preds = %108
%113 = load i32, ptr @EINVAL, align 4, !tbaa !13
%114 = sub nsw i32 0, %113
br label %115
115: ; preds = %90, %108, %112, %105, %87, %81, %70, %63, %51, %34, %23, %10
%116 = phi i32 [ %72, %70 ], [ %83, %81 ], [ %107, %105 ], [ %114, %112 ], [ %89, %87 ], [ %65, %63 ], [ %25, %23 ], [ %12, %10 ], [ %53, %51 ], [ %36, %34 ], [ 0, %108 ], [ 0, %90 ]
ret i32 %116
}
declare i32 @capable(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"__kernel_timex", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !8, i64 4}
!15 = !{!7, !12, i64 16}
!16 = !{!12, !12, i64 0}
!17 = !{!7, !8, i64 8}
|
linux_kernel_time_extr_timekeeping.c_timekeeping_validate_timex
|
; ModuleID = 'AnghaBench/nodemcu-firmware/app/mbedtls/app/extr_espconn_mbedtls.c_mbedtls_setsockopt.c'
source_filename = "AnghaBench/nodemcu-firmware/app/mbedtls/app/extr_espconn_mbedtls.c_mbedtls_setsockopt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mbedtls_setsockopt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mbedtls_setsockopt(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = alloca i32, align 4
store i32 %3, ptr %5, align 4, !tbaa !5
%6 = call i32 @setsockopt(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull %5, i32 noundef 4) #2
ret i32 %6
}
declare i32 @setsockopt(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/nodemcu-firmware/app/mbedtls/app/extr_espconn_mbedtls.c_mbedtls_setsockopt.c'
source_filename = "AnghaBench/nodemcu-firmware/app/mbedtls/app/extr_espconn_mbedtls.c_mbedtls_setsockopt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mbedtls_setsockopt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mbedtls_setsockopt(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = alloca i32, align 4
store i32 %3, ptr %5, align 4, !tbaa !6
%6 = call i32 @setsockopt(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull %5, i32 noundef 4) #2
ret i32 %6
}
declare i32 @setsockopt(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
nodemcu-firmware_app_mbedtls_app_extr_espconn_mbedtls.c_mbedtls_setsockopt
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/bwn/extr_if_bwn.c_bwn_attach_pre.c'
source_filename = "AnghaBench/freebsd/sys/dev/bwn/extr_if_bwn.c_bwn_attach_pre.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bwn_softc = type { i32, i32, i32, i32, i32, i32, i32, i32 }
@ifqmaxlen = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"bwn_taskq\00", align 1
@M_NOWAIT = dso_local local_unnamed_addr global i32 0, align 4
@taskqueue_thread_enqueue = dso_local local_unnamed_addr global i32 0, align 4
@PI_NET = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [9 x i8] c"%s taskq\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @bwn_attach_pre], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @bwn_attach_pre(ptr noundef %0) #0 {
%2 = tail call i32 @BWN_LOCK_INIT(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.bwn_softc, ptr %0, i64 0, i32 7
%4 = tail call i32 @TAILQ_INIT(ptr noundef nonnull %3) #2
%5 = getelementptr inbounds %struct.bwn_softc, ptr %0, i64 0, i32 6
%6 = getelementptr inbounds %struct.bwn_softc, ptr %0, i64 0, i32 3
%7 = tail call i32 @callout_init_mtx(ptr noundef nonnull %5, ptr noundef nonnull %6, i32 noundef 0) #2
%8 = getelementptr inbounds %struct.bwn_softc, ptr %0, i64 0, i32 5
%9 = tail call i32 @callout_init_mtx(ptr noundef nonnull %8, ptr noundef nonnull %6, i32 noundef 0) #2
%10 = getelementptr inbounds %struct.bwn_softc, ptr %0, i64 0, i32 4
%11 = tail call i32 @callout_init_mtx(ptr noundef nonnull %10, ptr noundef nonnull %6, i32 noundef 0) #2
%12 = getelementptr inbounds %struct.bwn_softc, ptr %0, i64 0, i32 2
%13 = load i32, ptr @ifqmaxlen, align 4, !tbaa !5
%14 = tail call i32 @mbufq_init(ptr noundef nonnull %12, i32 noundef %13) #2
%15 = load i32, ptr @M_NOWAIT, align 4, !tbaa !5
%16 = load i32, ptr @taskqueue_thread_enqueue, align 4, !tbaa !5
%17 = getelementptr inbounds %struct.bwn_softc, ptr %0, i64 0, i32 1
%18 = tail call i32 @taskqueue_create_fast(ptr noundef nonnull @.str, i32 noundef %15, i32 noundef %16, ptr noundef nonnull %17) #2
store i32 %18, ptr %17, align 4, !tbaa !9
%19 = load i32, ptr @PI_NET, align 4, !tbaa !5
%20 = load i32, ptr %0, align 4, !tbaa !11
%21 = tail call i32 @device_get_nameunit(i32 noundef %20) #2
%22 = tail call i32 @taskqueue_start_threads(ptr noundef nonnull %17, i32 noundef 1, i32 noundef %19, ptr noundef nonnull @.str.1, i32 noundef %21) #2
ret void
}
declare i32 @BWN_LOCK_INIT(ptr noundef) local_unnamed_addr #1
declare i32 @TAILQ_INIT(ptr noundef) local_unnamed_addr #1
declare i32 @callout_init_mtx(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mbufq_init(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @taskqueue_create_fast(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @taskqueue_start_threads(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_get_nameunit(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"bwn_softc", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28}
!11 = !{!10, !6, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/bwn/extr_if_bwn.c_bwn_attach_pre.c'
source_filename = "AnghaBench/freebsd/sys/dev/bwn/extr_if_bwn.c_bwn_attach_pre.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ifqmaxlen = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"bwn_taskq\00", align 1
@M_NOWAIT = common local_unnamed_addr global i32 0, align 4
@taskqueue_thread_enqueue = common local_unnamed_addr global i32 0, align 4
@PI_NET = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [9 x i8] c"%s taskq\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @bwn_attach_pre], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @bwn_attach_pre(ptr noundef %0) #0 {
%2 = tail call i32 @BWN_LOCK_INIT(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %0, i64 28
%4 = tail call i32 @TAILQ_INIT(ptr noundef nonnull %3) #2
%5 = getelementptr inbounds i8, ptr %0, i64 24
%6 = getelementptr inbounds i8, ptr %0, i64 12
%7 = tail call i32 @callout_init_mtx(ptr noundef nonnull %5, ptr noundef nonnull %6, i32 noundef 0) #2
%8 = getelementptr inbounds i8, ptr %0, i64 20
%9 = tail call i32 @callout_init_mtx(ptr noundef nonnull %8, ptr noundef nonnull %6, i32 noundef 0) #2
%10 = getelementptr inbounds i8, ptr %0, i64 16
%11 = tail call i32 @callout_init_mtx(ptr noundef nonnull %10, ptr noundef nonnull %6, i32 noundef 0) #2
%12 = getelementptr inbounds i8, ptr %0, i64 8
%13 = load i32, ptr @ifqmaxlen, align 4, !tbaa !6
%14 = tail call i32 @mbufq_init(ptr noundef nonnull %12, i32 noundef %13) #2
%15 = load i32, ptr @M_NOWAIT, align 4, !tbaa !6
%16 = load i32, ptr @taskqueue_thread_enqueue, align 4, !tbaa !6
%17 = getelementptr inbounds i8, ptr %0, i64 4
%18 = tail call i32 @taskqueue_create_fast(ptr noundef nonnull @.str, i32 noundef %15, i32 noundef %16, ptr noundef nonnull %17) #2
store i32 %18, ptr %17, align 4, !tbaa !10
%19 = load i32, ptr @PI_NET, align 4, !tbaa !6
%20 = load i32, ptr %0, align 4, !tbaa !12
%21 = tail call i32 @device_get_nameunit(i32 noundef %20) #2
%22 = tail call i32 @taskqueue_start_threads(ptr noundef nonnull %17, i32 noundef 1, i32 noundef %19, ptr noundef nonnull @.str.1, i32 noundef %21) #2
ret void
}
declare i32 @BWN_LOCK_INIT(ptr noundef) local_unnamed_addr #1
declare i32 @TAILQ_INIT(ptr noundef) local_unnamed_addr #1
declare i32 @callout_init_mtx(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mbufq_init(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @taskqueue_create_fast(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @taskqueue_start_threads(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_get_nameunit(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"bwn_softc", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28}
!12 = !{!11, !7, i64 0}
|
freebsd_sys_dev_bwn_extr_if_bwn.c_bwn_attach_pre
|
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/pdf/extr_pdf-xref.c_pdf_update_object.c'
source_filename = "AnghaBench/sumatrapdf/mupdf/source/pdf/extr_pdf-xref.c_pdf_update_object.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i8, i32, i64 }
@.str = private unnamed_addr constant [43 x i8] c"object out of range (%d 0 R); xref size %d\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @pdf_update_object(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = icmp slt i32 %2, 1
br i1 %5, label %9, label %6
6: ; preds = %4
%7 = tail call i32 @pdf_xref_len(ptr noundef %0, ptr noundef %1) #2
%8 = icmp sgt i32 %7, %2
br i1 %8, label %12, label %9
9: ; preds = %6, %4
%10 = tail call i32 @pdf_xref_len(ptr noundef %0, ptr noundef %1) #2
%11 = tail call i32 @fz_warn(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %2, i32 noundef %10) #2
br label %24
12: ; preds = %6
%13 = icmp eq ptr %3, null
br i1 %13, label %14, label %16
14: ; preds = %12
%15 = tail call i32 @pdf_delete_object(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
br label %24
16: ; preds = %12
%17 = tail call ptr @pdf_get_incremental_xref_entry(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%18 = getelementptr inbounds %struct.TYPE_3__, ptr %17, i64 0, i32 1
%19 = load i32, ptr %18, align 4, !tbaa !5
%20 = tail call i32 @pdf_drop_obj(ptr noundef %0, i32 noundef %19) #2
store i8 110, ptr %17, align 8, !tbaa !11
%21 = getelementptr inbounds %struct.TYPE_3__, ptr %17, i64 0, i32 2
store i64 0, ptr %21, align 8, !tbaa !12
%22 = tail call i32 @pdf_keep_obj(ptr noundef %0, ptr noundef nonnull %3) #2
store i32 %22, ptr %18, align 4, !tbaa !5
%23 = tail call i32 @pdf_set_obj_parent(ptr noundef %0, ptr noundef nonnull %3, i32 noundef %2) #2
br label %24
24: ; preds = %16, %14, %9
ret void
}
declare i32 @pdf_xref_len(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fz_warn(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pdf_delete_object(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @pdf_get_incremental_xref_entry(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pdf_drop_obj(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pdf_keep_obj(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pdf_set_obj_parent(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !9, i64 4}
!6 = !{!"TYPE_3__", !7, i64 0, !9, i64 4, !10, i64 8}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"int", !7, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!6, !10, i64 8}
|
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/pdf/extr_pdf-xref.c_pdf_update_object.c'
source_filename = "AnghaBench/sumatrapdf/mupdf/source/pdf/extr_pdf-xref.c_pdf_update_object.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [43 x i8] c"object out of range (%d 0 R); xref size %d\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @pdf_update_object(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = icmp slt i32 %2, 1
br i1 %5, label %9, label %6
6: ; preds = %4
%7 = tail call i32 @pdf_xref_len(ptr noundef %0, ptr noundef %1) #2
%8 = icmp sgt i32 %7, %2
br i1 %8, label %12, label %9
9: ; preds = %6, %4
%10 = tail call i32 @pdf_xref_len(ptr noundef %0, ptr noundef %1) #2
%11 = tail call i32 @fz_warn(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %2, i32 noundef %10) #2
br label %24
12: ; preds = %6
%13 = icmp eq ptr %3, null
br i1 %13, label %14, label %16
14: ; preds = %12
%15 = tail call i32 @pdf_delete_object(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
br label %24
16: ; preds = %12
%17 = tail call ptr @pdf_get_incremental_xref_entry(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%18 = getelementptr inbounds i8, ptr %17, i64 4
%19 = load i32, ptr %18, align 4, !tbaa !6
%20 = tail call i32 @pdf_drop_obj(ptr noundef %0, i32 noundef %19) #2
store i8 110, ptr %17, align 8, !tbaa !12
%21 = getelementptr inbounds i8, ptr %17, i64 8
store i64 0, ptr %21, align 8, !tbaa !13
%22 = tail call i32 @pdf_keep_obj(ptr noundef %0, ptr noundef nonnull %3) #2
store i32 %22, ptr %18, align 4, !tbaa !6
%23 = tail call i32 @pdf_set_obj_parent(ptr noundef %0, ptr noundef nonnull %3, i32 noundef %2) #2
br label %24
24: ; preds = %16, %14, %9
ret void
}
declare i32 @pdf_xref_len(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fz_warn(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pdf_delete_object(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @pdf_get_incremental_xref_entry(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pdf_drop_obj(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pdf_keep_obj(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pdf_set_obj_parent(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !10, i64 4}
!7 = !{!"TYPE_3__", !8, i64 0, !10, i64 4, !11, i64 8}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!7, !11, i64 8}
|
sumatrapdf_mupdf_source_pdf_extr_pdf-xref.c_pdf_update_object
|
; ModuleID = 'AnghaBench/linux/drivers/media/usb/cx231xx/extr_cx231xx-avcore.c_cx231xx_afe_set_input_mux.c'
source_filename = "AnghaBench/linux/drivers/media/usb/cx231xx/extr_cx231xx-avcore.c_cx231xx_afe_set_input_mux.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ADC_INPUT_CH1 = dso_local local_unnamed_addr global i32 0, align 4
@INPUT_SEL_MASK = dso_local local_unnamed_addr global i32 0, align 4
@ADC_INPUT_CH2 = dso_local local_unnamed_addr global i32 0, align 4
@ADC_INPUT_CH3 = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @cx231xx_afe_set_input_mux(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 0, ptr %3, align 4, !tbaa !5
%4 = icmp eq i32 %1, 0
br i1 %4, label %48, label %5
5: ; preds = %2
%6 = load i32, ptr @ADC_INPUT_CH1, align 4, !tbaa !5
%7 = call i32 @afe_read_byte(ptr noundef %0, i32 noundef %6, ptr noundef nonnull %3) #3
%8 = load i32, ptr @INPUT_SEL_MASK, align 4, !tbaa !5
%9 = xor i32 %8, -1
%10 = load i32, ptr %3, align 4, !tbaa !5
%11 = and i32 %10, %9
%12 = shl i32 %1, 4
%13 = add i32 %12, 240
%14 = or i32 %11, %13
%15 = and i32 %14, 255
store i32 %15, ptr %3, align 4, !tbaa !5
%16 = load i32, ptr @ADC_INPUT_CH1, align 4, !tbaa !5
%17 = call i32 @afe_write_byte(ptr noundef %0, i32 noundef %16, i32 noundef %15) #3
%18 = icmp ult i32 %1, 256
br i1 %18, label %48, label %19
19: ; preds = %5
%20 = load i32, ptr @ADC_INPUT_CH2, align 4, !tbaa !5
%21 = call i32 @afe_read_byte(ptr noundef %0, i32 noundef %20, ptr noundef nonnull %3) #3
%22 = load i32, ptr @INPUT_SEL_MASK, align 4, !tbaa !5
%23 = xor i32 %22, -1
%24 = load i32, ptr %3, align 4, !tbaa !5
%25 = and i32 %24, %23
%26 = lshr i32 %1, 4
%27 = and i32 %26, 240
%28 = add nuw nsw i32 %27, 240
%29 = or i32 %25, %28
%30 = and i32 %29, 255
store i32 %30, ptr %3, align 4, !tbaa !5
%31 = load i32, ptr @ADC_INPUT_CH2, align 4, !tbaa !5
%32 = call i32 @afe_write_byte(ptr noundef %0, i32 noundef %31, i32 noundef %30) #3
%33 = icmp ult i32 %1, 65536
br i1 %33, label %48, label %34
34: ; preds = %19
%35 = load i32, ptr @ADC_INPUT_CH3, align 4, !tbaa !5
%36 = call i32 @afe_read_byte(ptr noundef %0, i32 noundef %35, ptr noundef nonnull %3) #3
%37 = load i32, ptr @INPUT_SEL_MASK, align 4, !tbaa !5
%38 = xor i32 %37, -1
%39 = load i32, ptr %3, align 4, !tbaa !5
%40 = and i32 %39, %38
%41 = lshr i32 %1, 12
%42 = and i32 %41, 240
%43 = add nuw nsw i32 %42, 240
%44 = or i32 %40, %43
%45 = and i32 %44, 255
store i32 %45, ptr %3, align 4, !tbaa !5
%46 = load i32, ptr @ADC_INPUT_CH3, align 4, !tbaa !5
%47 = call i32 @afe_write_byte(ptr noundef %0, i32 noundef %46, i32 noundef %45) #3
br label %48
48: ; preds = %2, %5, %34, %19
%49 = phi i32 [ %47, %34 ], [ %32, %19 ], [ %17, %5 ], [ 0, %2 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %49
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @afe_read_byte(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @afe_write_byte(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/media/usb/cx231xx/extr_cx231xx-avcore.c_cx231xx_afe_set_input_mux.c'
source_filename = "AnghaBench/linux/drivers/media/usb/cx231xx/extr_cx231xx-avcore.c_cx231xx_afe_set_input_mux.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ADC_INPUT_CH1 = common local_unnamed_addr global i32 0, align 4
@INPUT_SEL_MASK = common local_unnamed_addr global i32 0, align 4
@ADC_INPUT_CH2 = common local_unnamed_addr global i32 0, align 4
@ADC_INPUT_CH3 = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @cx231xx_afe_set_input_mux(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 0, ptr %3, align 4, !tbaa !6
%4 = icmp eq i32 %1, 0
br i1 %4, label %48, label %5
5: ; preds = %2
%6 = load i32, ptr @ADC_INPUT_CH1, align 4, !tbaa !6
%7 = call i32 @afe_read_byte(ptr noundef %0, i32 noundef %6, ptr noundef nonnull %3) #3
%8 = load i32, ptr @INPUT_SEL_MASK, align 4, !tbaa !6
%9 = xor i32 %8, -1
%10 = load i32, ptr %3, align 4, !tbaa !6
%11 = and i32 %10, %9
%12 = shl i32 %1, 4
%13 = add i32 %12, 240
%14 = or i32 %11, %13
%15 = and i32 %14, 255
store i32 %15, ptr %3, align 4, !tbaa !6
%16 = load i32, ptr @ADC_INPUT_CH1, align 4, !tbaa !6
%17 = call i32 @afe_write_byte(ptr noundef %0, i32 noundef %16, i32 noundef %15) #3
%18 = icmp ult i32 %1, 256
br i1 %18, label %48, label %19
19: ; preds = %5
%20 = load i32, ptr @ADC_INPUT_CH2, align 4, !tbaa !6
%21 = call i32 @afe_read_byte(ptr noundef %0, i32 noundef %20, ptr noundef nonnull %3) #3
%22 = load i32, ptr @INPUT_SEL_MASK, align 4, !tbaa !6
%23 = xor i32 %22, -1
%24 = load i32, ptr %3, align 4, !tbaa !6
%25 = and i32 %24, %23
%26 = lshr i32 %1, 4
%27 = and i32 %26, 240
%28 = add nuw nsw i32 %27, 240
%29 = or i32 %25, %28
%30 = and i32 %29, 255
store i32 %30, ptr %3, align 4, !tbaa !6
%31 = load i32, ptr @ADC_INPUT_CH2, align 4, !tbaa !6
%32 = call i32 @afe_write_byte(ptr noundef %0, i32 noundef %31, i32 noundef %30) #3
%33 = icmp ult i32 %1, 65536
br i1 %33, label %48, label %34
34: ; preds = %19
%35 = load i32, ptr @ADC_INPUT_CH3, align 4, !tbaa !6
%36 = call i32 @afe_read_byte(ptr noundef %0, i32 noundef %35, ptr noundef nonnull %3) #3
%37 = load i32, ptr @INPUT_SEL_MASK, align 4, !tbaa !6
%38 = xor i32 %37, -1
%39 = load i32, ptr %3, align 4, !tbaa !6
%40 = and i32 %39, %38
%41 = lshr i32 %1, 12
%42 = and i32 %41, 240
%43 = add nuw nsw i32 %42, 240
%44 = or i32 %40, %43
%45 = and i32 %44, 255
store i32 %45, ptr %3, align 4, !tbaa !6
%46 = load i32, ptr @ADC_INPUT_CH3, align 4, !tbaa !6
%47 = call i32 @afe_write_byte(ptr noundef %0, i32 noundef %46, i32 noundef %45) #3
br label %48
48: ; preds = %2, %5, %34, %19
%49 = phi i32 [ %47, %34 ], [ %32, %19 ], [ %17, %5 ], [ 0, %2 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %49
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @afe_read_byte(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @afe_write_byte(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_media_usb_cx231xx_extr_cx231xx-avcore.c_cx231xx_afe_set_input_mux
|
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/libntp/extr_ntp_calendar.c_isocal_date_to_ntp64.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/libntp/extr_ntp_calendar.c_isocal_date_to_ntp64.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.isodate = type { i32, i32, i32, i64, i64, i64 }
@DAY_NTP_STARTS = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @isocal_date_to_ntp64(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.isodate, ptr %0, i64 0, i32 5
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = trunc i64 %3 to i32
%5 = add nsw i32 %4, -1
%6 = tail call i32 @isocal_weeks_in_years(i32 noundef %5) #2
%7 = getelementptr inbounds %struct.isodate, ptr %0, i64 0, i32 4
%8 = load i64, ptr %7, align 8, !tbaa !11
%9 = trunc i64 %8 to i32
%10 = add nsw i32 %6, %9
%11 = mul i32 %10, 7
%12 = getelementptr inbounds %struct.isodate, ptr %0, i64 0, i32 3
%13 = load i64, ptr %12, align 8, !tbaa !12
%14 = trunc i64 %13 to i32
%15 = getelementptr inbounds %struct.isodate, ptr %0, i64 0, i32 2
%16 = load i32, ptr %15, align 8, !tbaa !13
%17 = getelementptr inbounds %struct.isodate, ptr %0, i64 0, i32 1
%18 = load i32, ptr %17, align 4, !tbaa !14
%19 = load i32, ptr %0, align 8, !tbaa !15
%20 = tail call i32 @ntpcal_etime_to_seconds(i32 noundef %16, i32 noundef %18, i32 noundef %19) #2
%21 = load i32, ptr @DAY_NTP_STARTS, align 4, !tbaa !16
%22 = add i32 %14, -7
%23 = add i32 %22, %11
%24 = sub i32 %23, %21
%25 = tail call i32 @ntpcal_dayjoin(i32 noundef %24, i32 noundef %20) #2
ret i32 %25
}
declare i32 @isocal_weeks_in_years(i32 noundef) local_unnamed_addr #1
declare i32 @ntpcal_etime_to_seconds(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ntpcal_dayjoin(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 32}
!6 = !{!"isodate", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !10, i64 24}
!12 = !{!6, !10, i64 16}
!13 = !{!6, !7, i64 8}
!14 = !{!6, !7, i64 4}
!15 = !{!6, !7, i64 0}
!16 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/libntp/extr_ntp_calendar.c_isocal_date_to_ntp64.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/libntp/extr_ntp_calendar.c_isocal_date_to_ntp64.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DAY_NTP_STARTS = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @isocal_date_to_ntp64(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 32
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = trunc i64 %3 to i32
%5 = add nsw i32 %4, -1
%6 = tail call i32 @isocal_weeks_in_years(i32 noundef %5) #2
%7 = getelementptr inbounds i8, ptr %0, i64 24
%8 = load i64, ptr %7, align 8, !tbaa !12
%9 = trunc i64 %8 to i32
%10 = add nsw i32 %6, %9
%11 = mul i32 %10, 7
%12 = getelementptr inbounds i8, ptr %0, i64 16
%13 = load i64, ptr %12, align 8, !tbaa !13
%14 = trunc i64 %13 to i32
%15 = getelementptr inbounds i8, ptr %0, i64 8
%16 = load i32, ptr %15, align 8, !tbaa !14
%17 = getelementptr inbounds i8, ptr %0, i64 4
%18 = load i32, ptr %17, align 4, !tbaa !15
%19 = load i32, ptr %0, align 8, !tbaa !16
%20 = tail call i32 @ntpcal_etime_to_seconds(i32 noundef %16, i32 noundef %18, i32 noundef %19) #2
%21 = load i32, ptr @DAY_NTP_STARTS, align 4, !tbaa !17
%22 = add i32 %14, -7
%23 = add i32 %22, %11
%24 = sub i32 %23, %21
%25 = tail call i32 @ntpcal_dayjoin(i32 noundef %24, i32 noundef %20) #2
ret i32 %25
}
declare i32 @isocal_weeks_in_years(i32 noundef) local_unnamed_addr #1
declare i32 @ntpcal_etime_to_seconds(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ntpcal_dayjoin(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 32}
!7 = !{!"isodate", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16, !11, i64 24, !11, i64 32}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 24}
!13 = !{!7, !11, i64 16}
!14 = !{!7, !8, i64 8}
!15 = !{!7, !8, i64 4}
!16 = !{!7, !8, i64 0}
!17 = !{!8, !8, i64 0}
|
freebsd_contrib_ntp_libntp_extr_ntp_calendar.c_isocal_date_to_ntp64
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_servers2.c_ArenaServers_LoadFavorites.c'
source_filename = "AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_servers2.c_ArenaServers_LoadFavorites.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i64, ptr }
%struct.TYPE_7__ = type { i32, i32 }
@MAX_INFO_STRING = dso_local local_unnamed_addr global i32 0, align 4
@MAX_ADDRESSLENGTH = dso_local local_unnamed_addr global i32 0, align 4
@MAX_FAVORITESERVERS = dso_local local_unnamed_addr global i32 0, align 4
@qfalse = dso_local local_unnamed_addr global i32 0, align 4
@g_favoriteserverlist = dso_local local_unnamed_addr global ptr null, align 8
@g_numfavoriteservers = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [9 x i8] c"server%d\00", align 1
@g_arenaservers = dso_local local_unnamed_addr global %struct.TYPE_8__ zeroinitializer, align 8
@qtrue = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @ArenaServers_LoadFavorites() local_unnamed_addr #0 {
%1 = load i32, ptr @MAX_ADDRESSLENGTH, align 4, !tbaa !5
%2 = zext i32 %1 to i64
%3 = alloca i8, i64 %2, align 16
%4 = load i32, ptr @MAX_FAVORITESERVERS, align 4, !tbaa !5
%5 = zext i32 %4 to i64
%6 = alloca %struct.TYPE_7__, i64 %5, align 16
%7 = load i32, ptr @qfalse, align 4, !tbaa !5
%8 = load ptr, ptr @g_favoriteserverlist, align 8, !tbaa !9
%9 = shl i32 %4, 3
%10 = call i32 @memcpy(ptr noundef nonnull %6, ptr noundef %8, i32 noundef %9) #2
%11 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !11
%12 = load ptr, ptr @g_favoriteserverlist, align 8, !tbaa !9
%13 = load i32, ptr @MAX_FAVORITESERVERS, align 4, !tbaa !5
%14 = shl i32 %13, 3
%15 = call i32 @memset(ptr noundef %12, i32 noundef 0, i32 noundef %14) #2
store i64 0, ptr @g_numfavoriteservers, align 8, !tbaa !11
%16 = load i32, ptr @MAX_FAVORITESERVERS, align 4, !tbaa !5
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %76
18: ; preds = %0
%19 = trunc i64 %11 to i32
%20 = icmp sgt i32 %19, 0
%21 = and i64 %11, 4294967295
br label %22
22: ; preds = %18, %70
%23 = phi i32 [ %7, %18 ], [ %71, %70 ]
%24 = phi i32 [ 0, %18 ], [ %25, %70 ]
%25 = add nuw nsw i32 %24, 1
%26 = call i32 @va(ptr noundef nonnull @.str, i32 noundef %25) #2
%27 = load i32, ptr @MAX_ADDRESSLENGTH, align 4, !tbaa !5
%28 = call i32 @trap_Cvar_VariableStringBuffer(i32 noundef %26, ptr noundef nonnull %3, i32 noundef %27) #2
%29 = load i8, ptr %3, align 16, !tbaa !13
%30 = add i8 %29, -58
%31 = icmp ult i8 %30, -10
br i1 %31, label %70, label %32
32: ; preds = %22
%33 = load ptr, ptr getelementptr inbounds (%struct.TYPE_8__, ptr @g_arenaservers, i64 0, i32 1), align 8, !tbaa !14
%34 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !11
%35 = getelementptr inbounds i32, ptr %33, i64 %34
%36 = load i32, ptr %35, align 4, !tbaa !5
%37 = call i32 @strcpy(i32 noundef %36, ptr noundef nonnull %3) #2
br i1 %20, label %41, label %55
38: ; preds = %41
%39 = add nuw nsw i64 %42, 1
%40 = icmp eq i64 %39, %21
br i1 %40, label %55, label %41, !llvm.loop !16
41: ; preds = %32, %38
%42 = phi i64 [ %39, %38 ], [ 0, %32 ]
%43 = getelementptr inbounds %struct.TYPE_7__, ptr %6, i64 %42, i32 1
%44 = load i32, ptr %43, align 4, !tbaa !18
%45 = call i32 @Q_stricmp(i32 noundef %44, ptr noundef nonnull %3) #2
%46 = icmp eq i32 %45, 0
br i1 %46, label %47, label %38
47: ; preds = %41
%48 = load ptr, ptr @g_favoriteserverlist, align 8, !tbaa !9
%49 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !11
%50 = getelementptr inbounds %struct.TYPE_7__, ptr %48, i64 %49
%51 = getelementptr inbounds %struct.TYPE_7__, ptr %6, i64 %42
%52 = call i32 @memcpy(ptr noundef %50, ptr noundef nonnull %51, i32 noundef 8) #2
%53 = load i32, ptr @qtrue, align 4, !tbaa !5
%54 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !11
br label %66
55: ; preds = %38, %32
%56 = load ptr, ptr @g_favoriteserverlist, align 8, !tbaa !9
%57 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !11
%58 = getelementptr inbounds %struct.TYPE_7__, ptr %56, i64 %57, i32 1
%59 = load i32, ptr %58, align 4, !tbaa !18
%60 = load i32, ptr @MAX_ADDRESSLENGTH, align 4, !tbaa !5
%61 = call i32 @Q_strncpyz(i32 noundef %59, ptr noundef nonnull %3, i32 noundef %60) #2
%62 = call i32 (...) @ArenaServers_MaxPing() #2
%63 = load ptr, ptr @g_favoriteserverlist, align 8, !tbaa !9
%64 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !11
%65 = getelementptr inbounds %struct.TYPE_7__, ptr %63, i64 %64
store i32 %62, ptr %65, align 4, !tbaa !20
br label %66
66: ; preds = %55, %47
%67 = phi i64 [ %54, %47 ], [ %64, %55 ]
%68 = phi i32 [ %53, %47 ], [ %23, %55 ]
%69 = add i64 %67, 1
store i64 %69, ptr @g_numfavoriteservers, align 8, !tbaa !11
br label %70
70: ; preds = %22, %66
%71 = phi i32 [ %68, %66 ], [ %23, %22 ]
%72 = load i32, ptr @MAX_FAVORITESERVERS, align 4, !tbaa !5
%73 = icmp slt i32 %25, %72
br i1 %73, label %22, label %74, !llvm.loop !21
74: ; preds = %70
%75 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !11
br label %76
76: ; preds = %74, %0
%77 = phi i64 [ 0, %0 ], [ %75, %74 ]
%78 = phi i32 [ %7, %0 ], [ %71, %74 ]
store i64 %77, ptr @g_arenaservers, align 8, !tbaa !22
%79 = icmp eq i32 %78, 0
br i1 %79, label %80, label %81
80: ; preds = %76
store i64 0, ptr @g_numfavoriteservers, align 8, !tbaa !11
br label %81
81: ; preds = %80, %76
ret void
}
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @trap_Cvar_VariableStringBuffer(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @va(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strcpy(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @Q_stricmp(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @Q_strncpyz(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ArenaServers_MaxPing(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !10, i64 8}
!15 = !{!"TYPE_8__", !12, i64 0, !10, i64 8}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!19, !6, i64 4}
!19 = !{!"TYPE_7__", !6, i64 0, !6, i64 4}
!20 = !{!19, !6, i64 0}
!21 = distinct !{!21, !17}
!22 = !{!15, !12, i64 0}
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_servers2.c_ArenaServers_LoadFavorites.c'
source_filename = "AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_servers2.c_ArenaServers_LoadFavorites.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_8__ = type { i64, ptr }
%struct.TYPE_7__ = type { i32, i32 }
@MAX_INFO_STRING = common local_unnamed_addr global i32 0, align 4
@MAX_ADDRESSLENGTH = common local_unnamed_addr global i32 0, align 4
@MAX_FAVORITESERVERS = common local_unnamed_addr global i32 0, align 4
@qfalse = common local_unnamed_addr global i32 0, align 4
@g_favoriteserverlist = common local_unnamed_addr global ptr null, align 8
@g_numfavoriteservers = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [9 x i8] c"server%d\00", align 1
@g_arenaservers = common local_unnamed_addr global %struct.TYPE_8__ zeroinitializer, align 8
@qtrue = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @ArenaServers_LoadFavorites() local_unnamed_addr #0 {
%1 = load i32, ptr @MAX_ADDRESSLENGTH, align 4, !tbaa !6
%2 = zext i32 %1 to i64
%3 = alloca i8, i64 %2, align 1
%4 = load i32, ptr @MAX_FAVORITESERVERS, align 4, !tbaa !6
%5 = zext i32 %4 to i64
%6 = alloca %struct.TYPE_7__, i64 %5, align 4
%7 = load i32, ptr @qfalse, align 4, !tbaa !6
%8 = load ptr, ptr @g_favoriteserverlist, align 8, !tbaa !10
%9 = shl i32 %4, 3
%10 = call i32 @memcpy(ptr noundef nonnull %6, ptr noundef %8, i32 noundef %9) #2
%11 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !12
%12 = load ptr, ptr @g_favoriteserverlist, align 8, !tbaa !10
%13 = load i32, ptr @MAX_FAVORITESERVERS, align 4, !tbaa !6
%14 = shl i32 %13, 3
%15 = call i32 @memset(ptr noundef %12, i32 noundef 0, i32 noundef %14) #2
store i64 0, ptr @g_numfavoriteservers, align 8, !tbaa !12
%16 = load i32, ptr @MAX_FAVORITESERVERS, align 4, !tbaa !6
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %76
18: ; preds = %0
%19 = trunc i64 %11 to i32
%20 = icmp sgt i32 %19, 0
%21 = and i64 %11, 2147483647
br label %22
22: ; preds = %18, %70
%23 = phi i32 [ %7, %18 ], [ %71, %70 ]
%24 = phi i32 [ 0, %18 ], [ %25, %70 ]
%25 = add nuw nsw i32 %24, 1
%26 = call i32 @va(ptr noundef nonnull @.str, i32 noundef %25) #2
%27 = load i32, ptr @MAX_ADDRESSLENGTH, align 4, !tbaa !6
%28 = call i32 @trap_Cvar_VariableStringBuffer(i32 noundef %26, ptr noundef nonnull %3, i32 noundef %27) #2
%29 = load i8, ptr %3, align 1, !tbaa !14
%30 = add i8 %29, -58
%31 = icmp ult i8 %30, -10
br i1 %31, label %70, label %32
32: ; preds = %22
%33 = load ptr, ptr getelementptr inbounds (i8, ptr @g_arenaservers, i64 8), align 8, !tbaa !15
%34 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !12
%35 = getelementptr inbounds i32, ptr %33, i64 %34
%36 = load i32, ptr %35, align 4, !tbaa !6
%37 = call i32 @strcpy(i32 noundef %36, ptr noundef nonnull %3) #2
br i1 %20, label %41, label %55
38: ; preds = %41
%39 = add nuw nsw i64 %42, 1
%40 = icmp eq i64 %39, %21
br i1 %40, label %55, label %41, !llvm.loop !17
41: ; preds = %32, %38
%42 = phi i64 [ %39, %38 ], [ 0, %32 ]
%43 = getelementptr inbounds %struct.TYPE_7__, ptr %6, i64 %42, i32 1
%44 = load i32, ptr %43, align 4, !tbaa !19
%45 = call i32 @Q_stricmp(i32 noundef %44, ptr noundef nonnull %3) #2
%46 = icmp eq i32 %45, 0
br i1 %46, label %47, label %38
47: ; preds = %41
%48 = load ptr, ptr @g_favoriteserverlist, align 8, !tbaa !10
%49 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !12
%50 = getelementptr inbounds %struct.TYPE_7__, ptr %48, i64 %49
%51 = getelementptr inbounds %struct.TYPE_7__, ptr %6, i64 %42
%52 = call i32 @memcpy(ptr noundef %50, ptr noundef nonnull %51, i32 noundef 8) #2
%53 = load i32, ptr @qtrue, align 4, !tbaa !6
%54 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !12
br label %66
55: ; preds = %38, %32
%56 = load ptr, ptr @g_favoriteserverlist, align 8, !tbaa !10
%57 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !12
%58 = getelementptr inbounds %struct.TYPE_7__, ptr %56, i64 %57, i32 1
%59 = load i32, ptr %58, align 4, !tbaa !19
%60 = load i32, ptr @MAX_ADDRESSLENGTH, align 4, !tbaa !6
%61 = call i32 @Q_strncpyz(i32 noundef %59, ptr noundef nonnull %3, i32 noundef %60) #2
%62 = call i32 @ArenaServers_MaxPing() #2
%63 = load ptr, ptr @g_favoriteserverlist, align 8, !tbaa !10
%64 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !12
%65 = getelementptr inbounds %struct.TYPE_7__, ptr %63, i64 %64
store i32 %62, ptr %65, align 4, !tbaa !21
br label %66
66: ; preds = %55, %47
%67 = phi i64 [ %54, %47 ], [ %64, %55 ]
%68 = phi i32 [ %53, %47 ], [ %23, %55 ]
%69 = add i64 %67, 1
store i64 %69, ptr @g_numfavoriteservers, align 8, !tbaa !12
br label %70
70: ; preds = %22, %66
%71 = phi i32 [ %68, %66 ], [ %23, %22 ]
%72 = load i32, ptr @MAX_FAVORITESERVERS, align 4, !tbaa !6
%73 = icmp slt i32 %25, %72
br i1 %73, label %22, label %74, !llvm.loop !22
74: ; preds = %70
%75 = load i64, ptr @g_numfavoriteservers, align 8, !tbaa !12
br label %76
76: ; preds = %74, %0
%77 = phi i64 [ 0, %0 ], [ %75, %74 ]
%78 = phi i32 [ %7, %0 ], [ %71, %74 ]
store i64 %77, ptr @g_arenaservers, align 8, !tbaa !23
%79 = icmp eq i32 %78, 0
br i1 %79, label %80, label %81
80: ; preds = %76
store i64 0, ptr @g_numfavoriteservers, align 8, !tbaa !12
br label %81
81: ; preds = %80, %76
ret void
}
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @trap_Cvar_VariableStringBuffer(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @va(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strcpy(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @Q_stricmp(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @Q_strncpyz(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ArenaServers_MaxPing(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!16, !11, i64 8}
!16 = !{!"TYPE_8__", !13, i64 0, !11, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!20, !7, i64 4}
!20 = !{!"TYPE_7__", !7, i64 0, !7, i64 4}
!21 = !{!20, !7, i64 0}
!22 = distinct !{!22, !18}
!23 = !{!16, !13, i64 0}
|
Quake-III-Arena_code_q3_ui_extr_ui_servers2.c_ArenaServers_LoadFavorites
|
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_msi-laptop.c_store_wlan.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_msi-laptop.c_store_wlan.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MSI_STANDARD_EC_WLAN_MASK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @store_wlan], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @store_wlan(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = load i32, ptr @MSI_STANDARD_EC_WLAN_MASK, align 4, !tbaa !5
%6 = tail call i32 @set_device_state(ptr noundef %2, i64 noundef %3, i32 noundef %5) #2
ret i32 %6
}
declare i32 @set_device_state(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_msi-laptop.c_store_wlan.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_msi-laptop.c_store_wlan.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MSI_STANDARD_EC_WLAN_MASK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @store_wlan], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @store_wlan(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = load i32, ptr @MSI_STANDARD_EC_WLAN_MASK, align 4, !tbaa !6
%6 = tail call i32 @set_device_state(ptr noundef %2, i64 noundef %3, i32 noundef %5) #2
ret i32 %6
}
declare i32 @set_device_state(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_platform_x86_extr_msi-laptop.c_store_wlan
|
; ModuleID = 'AnghaBench/lab/engine/code/tools/lcc/cpp/extr_include.c_setobjname.c'
source_filename = "AnghaBench/lab/engine/code/tools/lcc/cpp/extr_include.c_setobjname.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
@objname = dso_local local_unnamed_addr global i8* null, align 8
@.str = private unnamed_addr constant [5 x i8] c"$O: \00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @setobjname(i8* noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @strlen(i8* noundef %0) #2
%3 = add nsw i32 %2, 5
%4 = tail call i64 @domalloc(i32 noundef %3) #2
%5 = inttoptr i64 %4 to i8*
store i8* %5, i8** @objname, align 8, !tbaa !5
%6 = tail call i32 @strcpy(i8* noundef %5, i8* noundef %0) #2
%7 = load i8*, i8** @objname, align 8, !tbaa !5
%8 = add nsw i32 %2, -2
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10, align 1, !tbaa !9
%12 = icmp eq i8 %11, 46
%13 = sext i32 %2 to i64
%14 = getelementptr inbounds i8, i8* %7, i64 %13
br i1 %12, label %15, label %18
15: ; preds = %1
%16 = getelementptr inbounds i8, i8* %14, i64 -1
%17 = tail call i32 @strcpy(i8* noundef nonnull %16, i8* noundef getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)) #2
br label %20
18: ; preds = %1
%19 = tail call i32 @strcpy(i8* noundef %14, i8* noundef getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)) #2
br label %20
20: ; preds = %18, %15
ret void
}
declare i32 @strlen(i8* noundef) local_unnamed_addr #1
declare i64 @domalloc(i32 noundef) local_unnamed_addr #1
declare i32 @strcpy(i8* noundef, i8* noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/lab/engine/code/tools/lcc/cpp/extr_include.c_setobjname.c'
source_filename = "AnghaBench/lab/engine/code/tools/lcc/cpp/extr_include.c_setobjname.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@objname = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [5 x i8] c"$O: \00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @setobjname(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @strlen(ptr noundef %0) #2
%3 = add nsw i32 %2, 5
%4 = tail call i64 @domalloc(i32 noundef %3) #2
%5 = inttoptr i64 %4 to ptr
store ptr %5, ptr @objname, align 8, !tbaa !6
%6 = tail call i32 @strcpy(ptr noundef %5, ptr noundef %0) #2
%7 = load ptr, ptr @objname, align 8, !tbaa !6
%8 = sext i32 %2 to i64
%9 = getelementptr i8, ptr %7, i64 %8
%10 = getelementptr i8, ptr %9, i64 -2
%11 = load i8, ptr %10, align 1, !tbaa !10
%12 = icmp eq i8 %11, 46
br i1 %12, label %13, label %16
13: ; preds = %1
%14 = getelementptr inbounds i8, ptr %9, i64 -1
%15 = tail call i32 @strcpy(ptr noundef nonnull %14, ptr noundef nonnull @.str) #2
br label %18
16: ; preds = %1
%17 = tail call i32 @strcpy(ptr noundef %9, ptr noundef nonnull @.str) #2
br label %18
18: ; preds = %16, %13
ret void
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i64 @domalloc(i32 noundef) local_unnamed_addr #1
declare i32 @strcpy(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
|
lab_engine_code_tools_lcc_cpp_extr_include.c_setobjname
|
; ModuleID = 'AnghaBench/mpv/stream/extr_stream.c_stream_write_buffer.c'
source_filename = "AnghaBench/mpv/stream/extr_stream.c_stream_write_buffer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { ptr, i32 }
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @stream_write_buffer(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %23, label %6
6: ; preds = %3
%7 = icmp eq i32 %2, 0
br i1 %7, label %23, label %8
8: ; preds = %6
%9 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
br label %10
10: ; preds = %8, %16
%11 = phi ptr [ %1, %8 ], [ %20, %16 ]
%12 = phi i32 [ %2, %8 ], [ %21, %16 ]
%13 = load ptr, ptr %0, align 8, !tbaa !5
%14 = tail call i32 %13(ptr noundef nonnull %0, ptr noundef %11, i32 noundef %12) #1
%15 = icmp sgt i32 %14, 0
br i1 %15, label %16, label %23
16: ; preds = %10
%17 = load i32, ptr %9, align 8, !tbaa !11
%18 = add nsw i32 %17, %14
store i32 %18, ptr %9, align 8, !tbaa !11
%19 = zext nneg i32 %14 to i64
%20 = getelementptr inbounds i8, ptr %11, i64 %19
%21 = sub nsw i32 %12, %14
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %10, !llvm.loop !12
23: ; preds = %16, %10, %6, %3
%24 = phi i32 [ -1, %3 ], [ 0, %6 ], [ %2, %16 ], [ -1, %10 ]
ret i32 %24
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/mpv/stream/extr_stream.c_stream_write_buffer.c'
source_filename = "AnghaBench/mpv/stream/extr_stream.c_stream_write_buffer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @stream_write_buffer(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %23, label %6
6: ; preds = %3
%7 = icmp eq i32 %2, 0
br i1 %7, label %23, label %8
8: ; preds = %6
%9 = getelementptr inbounds i8, ptr %0, i64 8
br label %10
10: ; preds = %8, %16
%11 = phi ptr [ %1, %8 ], [ %20, %16 ]
%12 = phi i32 [ %2, %8 ], [ %21, %16 ]
%13 = load ptr, ptr %0, align 8, !tbaa !6
%14 = tail call i32 %13(ptr noundef nonnull %0, ptr noundef %11, i32 noundef %12) #1
%15 = icmp sgt i32 %14, 0
br i1 %15, label %16, label %23
16: ; preds = %10
%17 = load i32, ptr %9, align 8, !tbaa !12
%18 = add nsw i32 %17, %14
store i32 %18, ptr %9, align 8, !tbaa !12
%19 = zext nneg i32 %14 to i64
%20 = getelementptr inbounds i8, ptr %11, i64 %19
%21 = sub nsw i32 %12, %14
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %10, !llvm.loop !13
23: ; preds = %16, %10, %6, %3
%24 = phi i32 [ -1, %3 ], [ 0, %6 ], [ %2, %16 ], [ -1, %10 ]
ret i32 %24
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
|
mpv_stream_extr_stream.c_stream_write_buffer
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/bktr/extr_bktr_os.c_bktr_attach.c'
source_filename = "AnghaBench/freebsd/sys/dev/bktr/extr_bktr_os.c_bktr_attach.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bktr_softc = type { ptr, i64, ptr, i64, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32 }
@.str = private unnamed_addr constant [7 x i8] c"bktr%d\00", align 1
@SYS_RES_MEMORY = dso_local local_unnamed_addr global i32 0, align 4
@RF_ACTIVE = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [22 x i8] c"could not map memory\0A\00", align 1
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@BKTR_INT_MASK = dso_local local_unnamed_addr global i32 0, align 4
@ALL_INTS_DISABLED = dso_local local_unnamed_addr global i32 0, align 4
@BKTR_GPIO_DMA_CTL = dso_local local_unnamed_addr global i32 0, align 4
@FIFO_RISC_DISABLED = dso_local local_unnamed_addr global i32 0, align 4
@SYS_RES_IRQ = dso_local local_unnamed_addr global i32 0, align 4
@RF_SHAREABLE = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [25 x i8] c"could not map interrupt\0A\00", align 1
@INTR_TYPE_TTY = dso_local local_unnamed_addr global i32 0, align 4
@bktr_intr = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [21 x i8] c"could not setup irq\0A\00", align 1
@PCI_LATENCY_TIMER = dso_local local_unnamed_addr global i32 0, align 4
@bootverbose = dso_local local_unnamed_addr global i64 0, align 8
@.str.4 = private unnamed_addr constant [32 x i8] c"brooktree%d: PCI bus latency is\00", align 1
@.str.5 = private unnamed_addr constant [47 x i8] c"brooktree%d: PCI bus latency was 0 changing to\00", align 1
@.str.6 = private unnamed_addr constant [6 x i8] c" %d.\0A\00", align 1
@bktr_cdevsw = dso_local global i32 0, align 4
@.str.7 = private unnamed_addr constant [8 x i8] c"tuner%d\00", align 1
@.str.8 = private unnamed_addr constant [6 x i8] c"vbi%d\00", align 1
@BROOKTREE_DEF_LATENCY_VALUE = dso_local local_unnamed_addr global i32 0, align 4
@BROOKTREE_IRQ = dso_local local_unnamed_addr global i32 0, align 4
@PCI_INTERRUPT_REG = dso_local local_unnamed_addr global i32 0, align 4
@tag = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bktr_attach], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @bktr_attach(i32 noundef %0) #0 {
%2 = tail call ptr @device_get_softc(i32 noundef %0) #3
%3 = tail call i32 @device_get_unit(i32 noundef %0) #3
%4 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 13
%5 = load i32, ptr %4, align 4, !tbaa !5
%6 = tail call i32 @snprintf(i32 noundef %5, i32 noundef 4, ptr noundef nonnull @.str, i32 noundef %3) #3
%7 = tail call i32 @pci_enable_busmaster(i32 noundef %0) #3
%8 = tail call i64 @PCIR_BAR(i32 noundef 0) #3
%9 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 1
store i64 %8, ptr %9, align 8, !tbaa !12
%10 = load i32, ptr @SYS_RES_MEMORY, align 4, !tbaa !13
%11 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !13
%12 = tail call ptr @bus_alloc_resource_any(i32 noundef %0, i32 noundef %10, ptr noundef nonnull %9, i32 noundef %11) #3
store ptr %12, ptr %2, align 8, !tbaa !14
%13 = icmp eq ptr %12, null
br i1 %13, label %14, label %17
14: ; preds = %1
%15 = tail call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.1) #3
%16 = load i32, ptr @ENXIO, align 4, !tbaa !13
br label %86
17: ; preds = %1
%18 = tail call i32 @rman_get_bustag(ptr noundef nonnull %12) #3
%19 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 12
store i32 %18, ptr %19, align 8, !tbaa !15
%20 = load ptr, ptr %2, align 8, !tbaa !14
%21 = tail call i32 @rman_get_bushandle(ptr noundef %20) #3
%22 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 11
store i32 %21, ptr %22, align 4, !tbaa !16
%23 = load i32, ptr @BKTR_INT_MASK, align 4, !tbaa !13
%24 = load i32, ptr @ALL_INTS_DISABLED, align 4, !tbaa !13
%25 = tail call i32 @OUTL(ptr noundef nonnull %2, i32 noundef %23, i32 noundef %24) #3
%26 = load i32, ptr @BKTR_GPIO_DMA_CTL, align 4, !tbaa !13
%27 = load i32, ptr @FIFO_RISC_DISABLED, align 4, !tbaa !13
%28 = tail call i32 @OUTW(ptr noundef nonnull %2, i32 noundef %26, i32 noundef %27) #3
%29 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 3
store i64 0, ptr %29, align 8, !tbaa !17
%30 = load i32, ptr @SYS_RES_IRQ, align 4, !tbaa !13
%31 = load i32, ptr @RF_SHAREABLE, align 4, !tbaa !13
%32 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !13
%33 = or i32 %32, %31
%34 = tail call ptr @bus_alloc_resource_any(i32 noundef %0, i32 noundef %30, ptr noundef nonnull %29, i32 noundef %33) #3
%35 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 2
store ptr %34, ptr %35, align 8, !tbaa !18
%36 = icmp eq ptr %34, null
br i1 %36, label %37, label %40
37: ; preds = %17
%38 = tail call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.2) #3
%39 = load i32, ptr @ENXIO, align 4, !tbaa !13
br label %86
40: ; preds = %17
%41 = load i32, ptr @INTR_TYPE_TTY, align 4, !tbaa !13
%42 = load i32, ptr @bktr_intr, align 4, !tbaa !13
%43 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 10
%44 = tail call i32 @bus_setup_intr(i32 noundef %0, ptr noundef nonnull %34, i32 noundef %41, ptr noundef null, i32 noundef %42, ptr noundef nonnull %2, ptr noundef nonnull %43) #3
%45 = icmp eq i32 %44, 0
br i1 %45, label %48, label %46
46: ; preds = %40
%47 = tail call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.3) #3
br label %86
48: ; preds = %40
%49 = tail call i32 @pci_read_config(i32 noundef %0, i32 noundef 64, i32 noundef 2) #3
%50 = or i32 %49, 1
%51 = tail call i32 @pci_write_config(i32 noundef %0, i32 noundef 64, i32 noundef %50, i32 noundef 2) #3
%52 = load i32, ptr @PCI_LATENCY_TIMER, align 4, !tbaa !13
%53 = tail call i32 @pci_read_config(i32 noundef %0, i32 noundef %52, i32 noundef 4) #3
%54 = lshr i32 %53, 8
%55 = and i32 %54, 255
%56 = load i64, ptr @bootverbose, align 8, !tbaa !19
%57 = icmp eq i64 %56, 0
%58 = icmp eq i32 %55, 0
br i1 %57, label %64, label %59
59: ; preds = %48
br i1 %58, label %62, label %60
60: ; preds = %59
%61 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %3)
br label %68
62: ; preds = %59
%63 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, i32 noundef %3)
br label %65
64: ; preds = %48
br i1 %58, label %65, label %74
65: ; preds = %62, %64
%66 = load i32, ptr @PCI_LATENCY_TIMER, align 4, !tbaa !13
%67 = tail call i32 @pci_write_config(i32 noundef %0, i32 noundef %66, i32 noundef 2560, i32 noundef 4) #3
br label %68
68: ; preds = %60, %65
%69 = phi i32 [ %55, %60 ], [ 10, %65 ]
%70 = load i64, ptr @bootverbose, align 8, !tbaa !19
%71 = icmp eq i64 %70, 0
br i1 %71, label %74, label %72
72: ; preds = %68
%73 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.6, i32 noundef %69)
br label %74
74: ; preds = %64, %72, %68
%75 = tail call i32 @pci_get_devid(i32 noundef %0) #3
%76 = tail call i32 @pci_get_revid(i32 noundef %0) #3
%77 = tail call i32 @common_bktr_attach(ptr noundef nonnull %2, i32 noundef %3, i32 noundef %75, i32 noundef %76) #3
%78 = tail call ptr @make_dev(ptr noundef nonnull @bktr_cdevsw, i32 noundef %3, i32 noundef 0, i32 noundef 0, i32 noundef 292, ptr noundef nonnull @.str, i32 noundef %3) #3
%79 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 8
store ptr %78, ptr %79, align 8, !tbaa !20
%80 = add i32 %3, 16
%81 = tail call ptr @make_dev(ptr noundef nonnull @bktr_cdevsw, i32 noundef %80, i32 noundef 0, i32 noundef 0, i32 noundef 292, ptr noundef nonnull @.str.7, i32 noundef %3) #3
%82 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 6
store ptr %81, ptr %82, align 8, !tbaa !21
%83 = add i32 %3, 32
%84 = tail call ptr @make_dev(ptr noundef nonnull @bktr_cdevsw, i32 noundef %83, i32 noundef 0, i32 noundef 0, i32 noundef 292, ptr noundef nonnull @.str.8, i32 noundef %3) #3
%85 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 4
store ptr %84, ptr %85, align 8, !tbaa !22
br label %103
86: ; preds = %46, %37, %14
%87 = phi i32 [ %39, %37 ], [ %44, %46 ], [ %16, %14 ]
%88 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 2
%89 = load ptr, ptr %88, align 8, !tbaa !18
%90 = icmp eq ptr %89, null
br i1 %90, label %96, label %91
91: ; preds = %86
%92 = load i32, ptr @SYS_RES_IRQ, align 4, !tbaa !13
%93 = getelementptr inbounds %struct.bktr_softc, ptr %2, i64 0, i32 3
%94 = load i64, ptr %93, align 8, !tbaa !17
%95 = tail call i32 @bus_release_resource(i32 noundef %0, i32 noundef %92, i64 noundef %94, ptr noundef nonnull %89) #3
br label %96
96: ; preds = %91, %86
%97 = load ptr, ptr %2, align 8, !tbaa !14
%98 = icmp eq ptr %97, null
br i1 %98, label %103, label %99
99: ; preds = %96
%100 = load i32, ptr @SYS_RES_MEMORY, align 4, !tbaa !13
%101 = load i64, ptr %9, align 8, !tbaa !12
%102 = tail call i32 @bus_release_resource(i32 noundef %0, i32 noundef %100, i64 noundef %101, ptr noundef nonnull %97) #3
br label %103
103: ; preds = %96, %99, %74
%104 = phi i32 [ 0, %74 ], [ %87, %99 ], [ %87, %96 ]
ret i32 %104
}
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
declare i32 @device_get_unit(i32 noundef) local_unnamed_addr #1
declare i32 @snprintf(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_enable_busmaster(i32 noundef) local_unnamed_addr #1
declare i64 @PCIR_BAR(i32 noundef) local_unnamed_addr #1
declare ptr @bus_alloc_resource_any(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rman_get_bustag(ptr noundef) local_unnamed_addr #1
declare i32 @rman_get_bushandle(ptr noundef) local_unnamed_addr #1
declare i32 @OUTL(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @OUTW(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bus_setup_intr(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pci_read_config(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_write_config(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare i32 @pci_get_devid(i32 noundef) local_unnamed_addr #1
declare i32 @pci_get_revid(i32 noundef) local_unnamed_addr #1
declare i32 @common_bktr_attach(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @make_dev(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bus_release_resource(i32 noundef, i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 92}
!6 = !{!"bktr_softc", !7, i64 0, !10, i64 8, !7, i64 16, !10, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!11, !11, i64 0}
!14 = !{!6, !7, i64 0}
!15 = !{!6, !11, i64 88}
!16 = !{!6, !11, i64 84}
!17 = !{!6, !10, i64 24}
!18 = !{!6, !7, i64 16}
!19 = !{!10, !10, i64 0}
!20 = !{!6, !7, i64 64}
!21 = !{!6, !7, i64 48}
!22 = !{!6, !7, i64 32}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/bktr/extr_bktr_os.c_bktr_attach.c'
source_filename = "AnghaBench/freebsd/sys/dev/bktr/extr_bktr_os.c_bktr_attach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [7 x i8] c"bktr%d\00", align 1
@SYS_RES_MEMORY = common local_unnamed_addr global i32 0, align 4
@RF_ACTIVE = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [22 x i8] c"could not map memory\0A\00", align 1
@ENXIO = common local_unnamed_addr global i32 0, align 4
@BKTR_INT_MASK = common local_unnamed_addr global i32 0, align 4
@ALL_INTS_DISABLED = common local_unnamed_addr global i32 0, align 4
@BKTR_GPIO_DMA_CTL = common local_unnamed_addr global i32 0, align 4
@FIFO_RISC_DISABLED = common local_unnamed_addr global i32 0, align 4
@SYS_RES_IRQ = common local_unnamed_addr global i32 0, align 4
@RF_SHAREABLE = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [25 x i8] c"could not map interrupt\0A\00", align 1
@INTR_TYPE_TTY = common local_unnamed_addr global i32 0, align 4
@bktr_intr = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [21 x i8] c"could not setup irq\0A\00", align 1
@PCI_LATENCY_TIMER = common local_unnamed_addr global i32 0, align 4
@bootverbose = common local_unnamed_addr global i64 0, align 8
@.str.4 = private unnamed_addr constant [32 x i8] c"brooktree%d: PCI bus latency is\00", align 1
@.str.5 = private unnamed_addr constant [47 x i8] c"brooktree%d: PCI bus latency was 0 changing to\00", align 1
@.str.6 = private unnamed_addr constant [6 x i8] c" %d.\0A\00", align 1
@bktr_cdevsw = common global i32 0, align 4
@.str.7 = private unnamed_addr constant [8 x i8] c"tuner%d\00", align 1
@.str.8 = private unnamed_addr constant [6 x i8] c"vbi%d\00", align 1
@BROOKTREE_DEF_LATENCY_VALUE = common local_unnamed_addr global i32 0, align 4
@BROOKTREE_IRQ = common local_unnamed_addr global i32 0, align 4
@PCI_INTERRUPT_REG = common local_unnamed_addr global i32 0, align 4
@tag = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bktr_attach], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @bktr_attach(i32 noundef %0) #0 {
%2 = tail call ptr @device_get_softc(i32 noundef %0) #3
%3 = tail call i32 @device_get_unit(i32 noundef %0) #3
%4 = getelementptr inbounds i8, ptr %2, i64 92
%5 = load i32, ptr %4, align 4, !tbaa !6
%6 = tail call i32 @snprintf(i32 noundef %5, i32 noundef 4, ptr noundef nonnull @.str, i32 noundef %3) #3
%7 = tail call i32 @pci_enable_busmaster(i32 noundef %0) #3
%8 = tail call i64 @PCIR_BAR(i32 noundef 0) #3
%9 = getelementptr inbounds i8, ptr %2, i64 8
store i64 %8, ptr %9, align 8, !tbaa !13
%10 = load i32, ptr @SYS_RES_MEMORY, align 4, !tbaa !14
%11 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !14
%12 = tail call ptr @bus_alloc_resource_any(i32 noundef %0, i32 noundef %10, ptr noundef nonnull %9, i32 noundef %11) #3
store ptr %12, ptr %2, align 8, !tbaa !15
%13 = icmp eq ptr %12, null
br i1 %13, label %14, label %17
14: ; preds = %1
%15 = tail call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.1) #3
%16 = load i32, ptr @ENXIO, align 4, !tbaa !14
br label %86
17: ; preds = %1
%18 = tail call i32 @rman_get_bustag(ptr noundef nonnull %12) #3
%19 = getelementptr inbounds i8, ptr %2, i64 88
store i32 %18, ptr %19, align 8, !tbaa !16
%20 = load ptr, ptr %2, align 8, !tbaa !15
%21 = tail call i32 @rman_get_bushandle(ptr noundef %20) #3
%22 = getelementptr inbounds i8, ptr %2, i64 84
store i32 %21, ptr %22, align 4, !tbaa !17
%23 = load i32, ptr @BKTR_INT_MASK, align 4, !tbaa !14
%24 = load i32, ptr @ALL_INTS_DISABLED, align 4, !tbaa !14
%25 = tail call i32 @OUTL(ptr noundef nonnull %2, i32 noundef %23, i32 noundef %24) #3
%26 = load i32, ptr @BKTR_GPIO_DMA_CTL, align 4, !tbaa !14
%27 = load i32, ptr @FIFO_RISC_DISABLED, align 4, !tbaa !14
%28 = tail call i32 @OUTW(ptr noundef nonnull %2, i32 noundef %26, i32 noundef %27) #3
%29 = getelementptr inbounds i8, ptr %2, i64 24
store i64 0, ptr %29, align 8, !tbaa !18
%30 = load i32, ptr @SYS_RES_IRQ, align 4, !tbaa !14
%31 = load i32, ptr @RF_SHAREABLE, align 4, !tbaa !14
%32 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !14
%33 = or i32 %32, %31
%34 = tail call ptr @bus_alloc_resource_any(i32 noundef %0, i32 noundef %30, ptr noundef nonnull %29, i32 noundef %33) #3
%35 = getelementptr inbounds i8, ptr %2, i64 16
store ptr %34, ptr %35, align 8, !tbaa !19
%36 = icmp eq ptr %34, null
br i1 %36, label %37, label %40
37: ; preds = %17
%38 = tail call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.2) #3
%39 = load i32, ptr @ENXIO, align 4, !tbaa !14
br label %86
40: ; preds = %17
%41 = load i32, ptr @INTR_TYPE_TTY, align 4, !tbaa !14
%42 = load i32, ptr @bktr_intr, align 4, !tbaa !14
%43 = getelementptr inbounds i8, ptr %2, i64 80
%44 = tail call i32 @bus_setup_intr(i32 noundef %0, ptr noundef nonnull %34, i32 noundef %41, ptr noundef null, i32 noundef %42, ptr noundef nonnull %2, ptr noundef nonnull %43) #3
%45 = icmp eq i32 %44, 0
br i1 %45, label %48, label %46
46: ; preds = %40
%47 = tail call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.3) #3
br label %86
48: ; preds = %40
%49 = tail call i32 @pci_read_config(i32 noundef %0, i32 noundef 64, i32 noundef 2) #3
%50 = or i32 %49, 1
%51 = tail call i32 @pci_write_config(i32 noundef %0, i32 noundef 64, i32 noundef %50, i32 noundef 2) #3
%52 = load i32, ptr @PCI_LATENCY_TIMER, align 4, !tbaa !14
%53 = tail call i32 @pci_read_config(i32 noundef %0, i32 noundef %52, i32 noundef 4) #3
%54 = lshr i32 %53, 8
%55 = and i32 %54, 255
%56 = load i64, ptr @bootverbose, align 8, !tbaa !20
%57 = icmp eq i64 %56, 0
%58 = icmp eq i32 %55, 0
br i1 %57, label %64, label %59
59: ; preds = %48
br i1 %58, label %62, label %60
60: ; preds = %59
%61 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %3)
br label %68
62: ; preds = %59
%63 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, i32 noundef %3)
br label %65
64: ; preds = %48
br i1 %58, label %65, label %74
65: ; preds = %62, %64
%66 = load i32, ptr @PCI_LATENCY_TIMER, align 4, !tbaa !14
%67 = tail call i32 @pci_write_config(i32 noundef %0, i32 noundef %66, i32 noundef 2560, i32 noundef 4) #3
br label %68
68: ; preds = %60, %65
%69 = phi i32 [ %55, %60 ], [ 10, %65 ]
%70 = load i64, ptr @bootverbose, align 8, !tbaa !20
%71 = icmp eq i64 %70, 0
br i1 %71, label %74, label %72
72: ; preds = %68
%73 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.6, i32 noundef %69)
br label %74
74: ; preds = %64, %72, %68
%75 = tail call i32 @pci_get_devid(i32 noundef %0) #3
%76 = tail call i32 @pci_get_revid(i32 noundef %0) #3
%77 = tail call i32 @common_bktr_attach(ptr noundef nonnull %2, i32 noundef %3, i32 noundef %75, i32 noundef %76) #3
%78 = tail call ptr @make_dev(ptr noundef nonnull @bktr_cdevsw, i32 noundef %3, i32 noundef 0, i32 noundef 0, i32 noundef 292, ptr noundef nonnull @.str, i32 noundef %3) #3
%79 = getelementptr inbounds i8, ptr %2, i64 64
store ptr %78, ptr %79, align 8, !tbaa !21
%80 = add i32 %3, 16
%81 = tail call ptr @make_dev(ptr noundef nonnull @bktr_cdevsw, i32 noundef %80, i32 noundef 0, i32 noundef 0, i32 noundef 292, ptr noundef nonnull @.str.7, i32 noundef %3) #3
%82 = getelementptr inbounds i8, ptr %2, i64 48
store ptr %81, ptr %82, align 8, !tbaa !22
%83 = add i32 %3, 32
%84 = tail call ptr @make_dev(ptr noundef nonnull @bktr_cdevsw, i32 noundef %83, i32 noundef 0, i32 noundef 0, i32 noundef 292, ptr noundef nonnull @.str.8, i32 noundef %3) #3
%85 = getelementptr inbounds i8, ptr %2, i64 32
store ptr %84, ptr %85, align 8, !tbaa !23
br label %103
86: ; preds = %46, %37, %14
%87 = phi i32 [ %39, %37 ], [ %44, %46 ], [ %16, %14 ]
%88 = getelementptr inbounds i8, ptr %2, i64 16
%89 = load ptr, ptr %88, align 8, !tbaa !19
%90 = icmp eq ptr %89, null
br i1 %90, label %96, label %91
91: ; preds = %86
%92 = load i32, ptr @SYS_RES_IRQ, align 4, !tbaa !14
%93 = getelementptr inbounds i8, ptr %2, i64 24
%94 = load i64, ptr %93, align 8, !tbaa !18
%95 = tail call i32 @bus_release_resource(i32 noundef %0, i32 noundef %92, i64 noundef %94, ptr noundef nonnull %89) #3
br label %96
96: ; preds = %91, %86
%97 = load ptr, ptr %2, align 8, !tbaa !15
%98 = icmp eq ptr %97, null
br i1 %98, label %103, label %99
99: ; preds = %96
%100 = load i32, ptr @SYS_RES_MEMORY, align 4, !tbaa !14
%101 = load i64, ptr %9, align 8, !tbaa !13
%102 = tail call i32 @bus_release_resource(i32 noundef %0, i32 noundef %100, i64 noundef %101, ptr noundef nonnull %97) #3
br label %103
103: ; preds = %96, %99, %74
%104 = phi i32 [ 0, %74 ], [ %87, %99 ], [ %87, %96 ]
ret i32 %104
}
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
declare i32 @device_get_unit(i32 noundef) local_unnamed_addr #1
declare i32 @snprintf(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_enable_busmaster(i32 noundef) local_unnamed_addr #1
declare i64 @PCIR_BAR(i32 noundef) local_unnamed_addr #1
declare ptr @bus_alloc_resource_any(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rman_get_bustag(ptr noundef) local_unnamed_addr #1
declare i32 @rman_get_bushandle(ptr noundef) local_unnamed_addr #1
declare i32 @OUTL(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @OUTW(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bus_setup_intr(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pci_read_config(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_write_config(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare i32 @pci_get_devid(i32 noundef) local_unnamed_addr #1
declare i32 @pci_get_revid(i32 noundef) local_unnamed_addr #1
declare i32 @common_bktr_attach(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @make_dev(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bus_release_resource(i32 noundef, i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 92}
!7 = !{!"bktr_softc", !8, i64 0, !11, i64 8, !8, i64 16, !11, i64 24, !8, i64 32, !8, i64 40, !8, i64 48, !8, i64 56, !8, i64 64, !8, i64 72, !12, i64 80, !12, i64 84, !12, i64 88, !12, i64 92}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!12, !12, i64 0}
!15 = !{!7, !8, i64 0}
!16 = !{!7, !12, i64 88}
!17 = !{!7, !12, i64 84}
!18 = !{!7, !11, i64 24}
!19 = !{!7, !8, i64 16}
!20 = !{!11, !11, i64 0}
!21 = !{!7, !8, i64 64}
!22 = !{!7, !8, i64 48}
!23 = !{!7, !8, i64 32}
|
freebsd_sys_dev_bktr_extr_bktr_os.c_bktr_attach
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/extr_efx.c_efx_vlan_rx_add_vid.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/extr_efx.c_efx_vlan_rx_add_vid.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EOPNOTSUPP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @efx_vlan_rx_add_vid], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @efx_vlan_rx_add_vid(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @netdev_priv(ptr noundef %0) #2
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = load ptr, ptr %5, align 8, !tbaa !10
%7 = icmp eq ptr %6, null
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 %6(ptr noundef nonnull %4, i32 noundef %1, i32 noundef %2) #2
br label %13
10: ; preds = %3
%11 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !12
%12 = sub nsw i32 0, %11
br label %13
13: ; preds = %10, %8
%14 = phi i32 [ %9, %8 ], [ %12, %10 ]
ret i32 %14
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"efx_nic", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/extr_efx.c_efx_vlan_rx_add_vid.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/extr_efx.c_efx_vlan_rx_add_vid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EOPNOTSUPP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @efx_vlan_rx_add_vid], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @efx_vlan_rx_add_vid(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @netdev_priv(ptr noundef %0) #2
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = icmp eq ptr %6, null
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 %6(ptr noundef nonnull %4, i32 noundef %1, i32 noundef %2) #2
br label %13
10: ; preds = %3
%11 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !13
%12 = sub nsw i32 0, %11
br label %13
13: ; preds = %10, %8
%14 = phi i32 [ %9, %8 ], [ %12, %10 ]
ret i32 %14
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"efx_nic", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
|
linux_drivers_net_ethernet_sfc_extr_efx.c_efx_vlan_rx_add_vid
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/xfs/extr_xfs_buf_item.c_xfs_buf_item_log.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/xfs/extr_xfs_buf_item.c_xfs_buf_item_log.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { %struct.TYPE_5__, i32 }
%struct.TYPE_5__ = type { ptr }
@XFS_BLI_DIRTY = dso_local local_unnamed_addr global i32 0, align 4
@XFS_BLF_SHIFT = dso_local local_unnamed_addr global i64 0, align 8
@BIT_TO_WORD_SHIFT = dso_local local_unnamed_addr global i64 0, align 8
@NBWORD = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @xfs_buf_item_log(ptr noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @XFS_BLI_DIRTY, align 4, !tbaa !5
%5 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
%6 = load i32, ptr %5, align 8, !tbaa !9
%7 = or i32 %6, %4
store i32 %7, ptr %5, align 8, !tbaa !9
%8 = load i64, ptr @XFS_BLF_SHIFT, align 8, !tbaa !13
%9 = lshr i64 %1, %8
%10 = lshr i64 %2, %8
%11 = sub i64 %10, %9
%12 = add i64 %11, 1
%13 = load i64, ptr @BIT_TO_WORD_SHIFT, align 8, !tbaa !13
%14 = lshr i64 %9, %13
%15 = load ptr, ptr %0, align 8, !tbaa !15
%16 = getelementptr inbounds i64, ptr %15, i64 %14
%17 = load i32, ptr @NBWORD, align 4, !tbaa !5
%18 = add nsw i32 %17, -1
%19 = sext i32 %18 to i64
%20 = and i64 %9, %19
%21 = icmp eq i64 %20, 0
br i1 %21, label %37, label %22
22: ; preds = %3
%23 = add i64 %20, %12
%24 = sext i32 %17 to i64
%25 = tail call i64 @MIN(i64 noundef %23, i64 noundef %24) #2
%26 = sub i64 %25, %20
%27 = trunc i64 %26 to i32
%28 = shl nsw i32 -1, %27
%29 = xor i32 %28, -1
%30 = trunc i64 %20 to i32
%31 = shl i32 %29, %30
%32 = sext i32 %31 to i64
%33 = load i64, ptr %16, align 8, !tbaa !13
%34 = or i64 %33, %32
store i64 %34, ptr %16, align 8, !tbaa !13
%35 = getelementptr inbounds i64, ptr %16, i64 1
%36 = load i32, ptr @NBWORD, align 4, !tbaa !5
br label %37
37: ; preds = %3, %22
%38 = phi i32 [ %36, %22 ], [ %17, %3 ]
%39 = phi ptr [ %35, %22 ], [ %16, %3 ]
%40 = phi i64 [ %26, %22 ], [ 0, %3 ]
%41 = sext i32 %38 to i64
%42 = sub i64 %12, %40
%43 = icmp ult i64 %42, %41
br i1 %43, label %53, label %44
44: ; preds = %37, %44
%45 = phi i64 [ %49, %44 ], [ %40, %37 ]
%46 = phi ptr [ %50, %44 ], [ %39, %37 ]
%47 = load i64, ptr %46, align 8, !tbaa !13
%48 = or i64 %47, 4294967295
store i64 %48, ptr %46, align 8, !tbaa !13
%49 = add i64 %45, %41
%50 = getelementptr inbounds i64, ptr %46, i64 1
%51 = sub i64 %12, %49
%52 = icmp ult i64 %51, %41
br i1 %52, label %53, label %44, !llvm.loop !16
53: ; preds = %44, %37
%54 = phi ptr [ %39, %37 ], [ %50, %44 ]
%55 = phi i64 [ %40, %37 ], [ %49, %44 ]
%56 = phi i64 [ %42, %37 ], [ %51, %44 ]
%57 = icmp eq i64 %12, %55
br i1 %57, label %65, label %58
58: ; preds = %53
%59 = trunc i64 %56 to i32
%60 = shl nsw i32 -1, %59
%61 = xor i32 %60, -1
%62 = zext nneg i32 %61 to i64
%63 = load i64, ptr %54, align 8, !tbaa !13
%64 = or i64 %63, %62
store i64 %64, ptr %54, align 8, !tbaa !13
br label %65
65: ; preds = %58, %53
%66 = tail call i32 @xfs_buf_item_log_debug(ptr noundef nonnull %0, i64 noundef %1, i64 noundef %2) #2
ret void
}
declare i64 @MIN(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @xfs_buf_item_log_debug(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"TYPE_6__", !11, i64 0, !6, i64 8}
!11 = !{!"TYPE_5__", !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!10, !12, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/xfs/extr_xfs_buf_item.c_xfs_buf_item_log.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/xfs/extr_xfs_buf_item.c_xfs_buf_item_log.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@XFS_BLI_DIRTY = common local_unnamed_addr global i32 0, align 4
@XFS_BLF_SHIFT = common local_unnamed_addr global i64 0, align 8
@BIT_TO_WORD_SHIFT = common local_unnamed_addr global i64 0, align 8
@NBWORD = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @xfs_buf_item_log(ptr noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @XFS_BLI_DIRTY, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i32, ptr %5, align 8, !tbaa !10
%7 = or i32 %6, %4
store i32 %7, ptr %5, align 8, !tbaa !10
%8 = load i64, ptr @XFS_BLF_SHIFT, align 8, !tbaa !14
%9 = lshr i64 %1, %8
%10 = lshr i64 %2, %8
%11 = sub i64 %10, %9
%12 = add i64 %11, 1
%13 = load i64, ptr @BIT_TO_WORD_SHIFT, align 8, !tbaa !14
%14 = lshr i64 %9, %13
%15 = load ptr, ptr %0, align 8, !tbaa !16
%16 = getelementptr inbounds i64, ptr %15, i64 %14
%17 = load i32, ptr @NBWORD, align 4, !tbaa !6
%18 = add nsw i32 %17, -1
%19 = sext i32 %18 to i64
%20 = and i64 %9, %19
%21 = icmp eq i64 %20, 0
br i1 %21, label %37, label %22
22: ; preds = %3
%23 = add i64 %20, %12
%24 = sext i32 %17 to i64
%25 = tail call i64 @MIN(i64 noundef %23, i64 noundef %24) #2
%26 = sub i64 %25, %20
%27 = trunc i64 %26 to i32
%28 = shl nsw i32 -1, %27
%29 = xor i32 %28, -1
%30 = trunc i64 %20 to i32
%31 = shl i32 %29, %30
%32 = sext i32 %31 to i64
%33 = load i64, ptr %16, align 8, !tbaa !14
%34 = or i64 %33, %32
store i64 %34, ptr %16, align 8, !tbaa !14
%35 = getelementptr inbounds i8, ptr %16, i64 8
%36 = load i32, ptr @NBWORD, align 4, !tbaa !6
br label %37
37: ; preds = %3, %22
%38 = phi i32 [ %36, %22 ], [ %17, %3 ]
%39 = phi ptr [ %35, %22 ], [ %16, %3 ]
%40 = phi i64 [ %26, %22 ], [ 0, %3 ]
%41 = sext i32 %38 to i64
%42 = sub i64 %12, %40
%43 = icmp ult i64 %42, %41
br i1 %43, label %53, label %44
44: ; preds = %37, %44
%45 = phi i64 [ %49, %44 ], [ %40, %37 ]
%46 = phi ptr [ %50, %44 ], [ %39, %37 ]
%47 = load i64, ptr %46, align 8, !tbaa !14
%48 = or i64 %47, 4294967295
store i64 %48, ptr %46, align 8, !tbaa !14
%49 = add i64 %45, %41
%50 = getelementptr inbounds i8, ptr %46, i64 8
%51 = sub i64 %12, %49
%52 = icmp ult i64 %51, %41
br i1 %52, label %53, label %44, !llvm.loop !17
53: ; preds = %44, %37
%54 = phi ptr [ %39, %37 ], [ %50, %44 ]
%55 = phi i64 [ %40, %37 ], [ %49, %44 ]
%56 = phi i64 [ %42, %37 ], [ %51, %44 ]
%57 = icmp eq i64 %12, %55
br i1 %57, label %65, label %58
58: ; preds = %53
%59 = trunc i64 %56 to i32
%60 = shl nsw i32 -1, %59
%61 = xor i32 %60, -1
%62 = zext nneg i32 %61 to i64
%63 = load i64, ptr %54, align 8, !tbaa !14
%64 = or i64 %63, %62
store i64 %64, ptr %54, align 8, !tbaa !14
br label %65
65: ; preds = %58, %53
%66 = tail call i32 @xfs_buf_item_log_debug(ptr noundef nonnull %0, i64 noundef %1, i64 noundef %2) #2
ret void
}
declare i64 @MIN(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @xfs_buf_item_log_debug(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"TYPE_6__", !12, i64 0, !7, i64 8}
!12 = !{!"TYPE_5__", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!11, !13, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
|
fastsocket_kernel_fs_xfs_extr_xfs_buf_item.c_xfs_buf_item_log
|
; ModuleID = 'AnghaBench/linux/drivers/media/dvb-frontends/extr_lgdt3306a.c_lgdt3306a_sync_lock_poll.c'
source_filename = "AnghaBench/linux/drivers/media/dvb-frontends/extr_lgdt3306a.c_lgdt3306a_sync_lock_poll.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@LG3306_UNLOCK = dso_local local_unnamed_addr global i32 0, align 4
@LG3306_SYNC_LOCK = dso_local local_unnamed_addr global i32 0, align 4
@LG3306_LOCK = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [12 x i8] c"locked(%d)\0A\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c"not locked\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @lgdt3306a_sync_lock_poll], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @lgdt3306a_sync_lock_poll(ptr noundef %0) #0 {
%2 = tail call i32 @msleep(i32 noundef 30) #2
%3 = load i32, ptr @LG3306_SYNC_LOCK, align 4, !tbaa !5
%4 = tail call i32 @lgdt3306a_check_lock_status(ptr noundef %0, i32 noundef %3) #2
%5 = load i32, ptr @LG3306_LOCK, align 4, !tbaa !5
%6 = icmp eq i32 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %10, %1
%8 = phi i32 [ 0, %1 ], [ 1, %10 ]
%9 = tail call i32 (ptr, ...) @dbg_info(ptr noundef nonnull @.str, i32 noundef %8) #2
br label %18
10: ; preds = %1
%11 = tail call i32 @msleep(i32 noundef 30) #2
%12 = load i32, ptr @LG3306_SYNC_LOCK, align 4, !tbaa !5
%13 = tail call i32 @lgdt3306a_check_lock_status(ptr noundef %0, i32 noundef %12) #2
%14 = load i32, ptr @LG3306_LOCK, align 4, !tbaa !5
%15 = icmp eq i32 %13, %14
br i1 %15, label %7, label %16
16: ; preds = %10
%17 = tail call i32 (ptr, ...) @dbg_info(ptr noundef nonnull @.str.1) #2
br label %18
18: ; preds = %16, %7
%19 = phi ptr [ @LG3306_LOCK, %7 ], [ @LG3306_UNLOCK, %16 ]
%20 = load i32, ptr %19, align 4, !tbaa !5
ret i32 %20
}
declare i32 @msleep(i32 noundef) local_unnamed_addr #1
declare i32 @lgdt3306a_check_lock_status(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dbg_info(ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/media/dvb-frontends/extr_lgdt3306a.c_lgdt3306a_sync_lock_poll.c'
source_filename = "AnghaBench/linux/drivers/media/dvb-frontends/extr_lgdt3306a.c_lgdt3306a_sync_lock_poll.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LG3306_UNLOCK = common local_unnamed_addr global i32 0, align 4
@LG3306_SYNC_LOCK = common local_unnamed_addr global i32 0, align 4
@LG3306_LOCK = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [12 x i8] c"locked(%d)\0A\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c"not locked\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @lgdt3306a_sync_lock_poll], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @lgdt3306a_sync_lock_poll(ptr noundef %0) #0 {
%2 = tail call i32 @msleep(i32 noundef 30) #2
%3 = load i32, ptr @LG3306_SYNC_LOCK, align 4, !tbaa !6
%4 = tail call i32 @lgdt3306a_check_lock_status(ptr noundef %0, i32 noundef %3) #2
%5 = load i32, ptr @LG3306_LOCK, align 4, !tbaa !6
%6 = icmp eq i32 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %10, %1
%8 = phi i32 [ 0, %1 ], [ 1, %10 ]
%9 = tail call i32 (ptr, ...) @dbg_info(ptr noundef nonnull @.str, i32 noundef %8) #2
br label %18
10: ; preds = %1
%11 = tail call i32 @msleep(i32 noundef 30) #2
%12 = load i32, ptr @LG3306_SYNC_LOCK, align 4, !tbaa !6
%13 = tail call i32 @lgdt3306a_check_lock_status(ptr noundef %0, i32 noundef %12) #2
%14 = load i32, ptr @LG3306_LOCK, align 4, !tbaa !6
%15 = icmp eq i32 %13, %14
br i1 %15, label %7, label %16
16: ; preds = %10
%17 = tail call i32 (ptr, ...) @dbg_info(ptr noundef nonnull @.str.1) #2
br label %18
18: ; preds = %16, %7
%19 = phi ptr [ @LG3306_LOCK, %7 ], [ @LG3306_UNLOCK, %16 ]
%20 = load i32, ptr %19, align 4, !tbaa !6
ret i32 %20
}
declare i32 @msleep(i32 noundef) local_unnamed_addr #1
declare i32 @lgdt3306a_check_lock_status(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dbg_info(ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_media_dvb-frontends_extr_lgdt3306a.c_lgdt3306a_sync_lock_poll
|
; ModuleID = 'AnghaBench/libgit2/tests/apply/extr_fromdiff.c_test_apply_fromdiff__delete_and_change_nocontext.c'
source_filename = "AnghaBench/libgit2/tests/apply/extr_fromdiff.c_test_apply_fromdiff__delete_and_change_nocontext.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i64 }
@GIT_DIFF_OPTIONS_INIT = dso_local local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@FILE_ORIGINAL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"file.txt\00", align 1
@FILE_DELETE_AND_CHANGE = dso_local local_unnamed_addr global i32 0, align 4
@PATCH_ORIGINAL_TO_DELETE_AND_CHANGE_NOCONTEXT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @test_apply_fromdiff__delete_and_change_nocontext() local_unnamed_addr #0 {
%1 = alloca %struct.TYPE_4__, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
store i64 0, ptr %1, align 8, !tbaa !5
%2 = load i32, ptr @FILE_ORIGINAL, align 4, !tbaa !10
%3 = load i32, ptr @FILE_DELETE_AND_CHANGE, align 4, !tbaa !10
%4 = load i32, ptr @PATCH_ORIGINAL_TO_DELETE_AND_CHANGE_NOCONTEXT, align 4, !tbaa !10
%5 = call i32 @apply_buf(i32 noundef %2, ptr noundef nonnull @.str, i32 noundef %3, ptr noundef nonnull @.str, i32 noundef %4, ptr noundef nonnull %1) #3
%6 = call i32 @cl_git_pass(i32 noundef %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #2
declare i32 @apply_buf(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/libgit2/tests/apply/extr_fromdiff.c_test_apply_fromdiff__delete_and_change_nocontext.c'
source_filename = "AnghaBench/libgit2/tests/apply/extr_fromdiff.c_test_apply_fromdiff__delete_and_change_nocontext.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i64 }
@GIT_DIFF_OPTIONS_INIT = common local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@FILE_ORIGINAL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"file.txt\00", align 1
@FILE_DELETE_AND_CHANGE = common local_unnamed_addr global i32 0, align 4
@PATCH_ORIGINAL_TO_DELETE_AND_CHANGE_NOCONTEXT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @test_apply_fromdiff__delete_and_change_nocontext() local_unnamed_addr #0 {
%1 = alloca %struct.TYPE_4__, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
store i64 0, ptr %1, align 8, !tbaa !6
%2 = load i32, ptr @FILE_ORIGINAL, align 4, !tbaa !11
%3 = load i32, ptr @FILE_DELETE_AND_CHANGE, align 4, !tbaa !11
%4 = load i32, ptr @PATCH_ORIGINAL_TO_DELETE_AND_CHANGE_NOCONTEXT, align 4, !tbaa !11
%5 = call i32 @apply_buf(i32 noundef %2, ptr noundef nonnull @.str, i32 noundef %3, ptr noundef nonnull @.str, i32 noundef %4, ptr noundef nonnull %1) #3
%6 = call i32 @cl_git_pass(i32 noundef %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #2
declare i32 @apply_buf(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
|
libgit2_tests_apply_extr_fromdiff.c_test_apply_fromdiff__delete_and_change_nocontext
|
; ModuleID = 'AnghaBench/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/extr_ar9300_misc.c_ar9300_write_associd.c'
source_filename = "AnghaBench/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/extr_ar9300_misc.c_ar9300_write_associd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ath_hal_9300 = type { i32, i64 }
@IEEE80211_ADDR_LEN = dso_local local_unnamed_addr global i32 0, align 4
@AR_BSS_ID0 = dso_local local_unnamed_addr global i32 0, align 4
@AR_BSS_ID1 = dso_local local_unnamed_addr global i32 0, align 4
@AR_BSS_ID1_AID_S = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @ar9300_write_associd(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @AH9300(ptr noundef %0) #2
%5 = getelementptr inbounds %struct.ath_hal_9300, ptr %4, i64 0, i32 1
%6 = load i64, ptr %5, align 8, !tbaa !5
%7 = load i32, ptr @IEEE80211_ADDR_LEN, align 4, !tbaa !11
%8 = tail call i32 @OS_MEMCPY(i64 noundef %6, ptr noundef %1, i32 noundef %7) #2
store i32 %2, ptr %4, align 8, !tbaa !12
%9 = load i32, ptr @AR_BSS_ID0, align 4, !tbaa !11
%10 = load i64, ptr %5, align 8, !tbaa !5
%11 = tail call i32 @LE_READ_4(i64 noundef %10) #2
%12 = tail call i32 @OS_REG_WRITE(ptr noundef %0, i32 noundef %9, i32 noundef %11) #2
%13 = load i32, ptr @AR_BSS_ID1, align 4, !tbaa !11
%14 = load i64, ptr %5, align 8, !tbaa !5
%15 = add nsw i64 %14, 4
%16 = tail call i32 @LE_READ_2(i64 noundef %15) #2
%17 = and i32 %2, 16383
%18 = load i32, ptr @AR_BSS_ID1_AID_S, align 4, !tbaa !11
%19 = shl i32 %17, %18
%20 = or i32 %19, %16
%21 = tail call i32 @OS_REG_WRITE(ptr noundef %0, i32 noundef %13, i32 noundef %20) #2
ret void
}
declare ptr @AH9300(ptr noundef) local_unnamed_addr #1
declare i32 @OS_MEMCPY(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @OS_REG_WRITE(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LE_READ_4(i64 noundef) local_unnamed_addr #1
declare i32 @LE_READ_2(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"ath_hal_9300", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/extr_ar9300_misc.c_ar9300_write_associd.c'
source_filename = "AnghaBench/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/extr_ar9300_misc.c_ar9300_write_associd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IEEE80211_ADDR_LEN = common local_unnamed_addr global i32 0, align 4
@AR_BSS_ID0 = common local_unnamed_addr global i32 0, align 4
@AR_BSS_ID1 = common local_unnamed_addr global i32 0, align 4
@AR_BSS_ID1_AID_S = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @ar9300_write_associd(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @AH9300(ptr noundef %0) #2
%5 = getelementptr inbounds i8, ptr %4, i64 8
%6 = load i64, ptr %5, align 8, !tbaa !6
%7 = load i32, ptr @IEEE80211_ADDR_LEN, align 4, !tbaa !12
%8 = tail call i32 @OS_MEMCPY(i64 noundef %6, ptr noundef %1, i32 noundef %7) #2
store i32 %2, ptr %4, align 8, !tbaa !13
%9 = load i32, ptr @AR_BSS_ID0, align 4, !tbaa !12
%10 = load i64, ptr %5, align 8, !tbaa !6
%11 = tail call i32 @LE_READ_4(i64 noundef %10) #2
%12 = tail call i32 @OS_REG_WRITE(ptr noundef %0, i32 noundef %9, i32 noundef %11) #2
%13 = load i32, ptr @AR_BSS_ID1, align 4, !tbaa !12
%14 = load i64, ptr %5, align 8, !tbaa !6
%15 = add nsw i64 %14, 4
%16 = tail call i32 @LE_READ_2(i64 noundef %15) #2
%17 = and i32 %2, 16383
%18 = load i32, ptr @AR_BSS_ID1_AID_S, align 4, !tbaa !12
%19 = shl i32 %17, %18
%20 = or i32 %19, %16
%21 = tail call i32 @OS_REG_WRITE(ptr noundef %0, i32 noundef %13, i32 noundef %20) #2
ret void
}
declare ptr @AH9300(ptr noundef) local_unnamed_addr #1
declare i32 @OS_MEMCPY(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @OS_REG_WRITE(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LE_READ_4(i64 noundef) local_unnamed_addr #1
declare i32 @LE_READ_2(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"ath_hal_9300", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 0}
|
freebsd_sys_contrib_dev_ath_ath_hal_ar9300_extr_ar9300_misc.c_ar9300_write_associd
|
; ModuleID = 'AnghaBench/freebsd/sys/teken/extr_teken_subr_compat.h_teken_get_defattr_cons25.c'
source_filename = "AnghaBench/freebsd/sys/teken/extr_teken_subr_compat.h_teken_get_defattr_cons25.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32, i32 }
@cons25_revcolors = dso_local local_unnamed_addr global ptr null, align 8
@TF_BOLD = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @teken_get_defattr_cons25(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = load ptr, ptr @cons25_revcolors, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 2
%6 = load i32, ptr %5, align 4, !tbaa !9
%7 = tail call i64 @teken_256to8(i32 noundef %6) #2
%8 = getelementptr inbounds i32, ptr %4, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !13
store i32 %9, ptr %1, align 4, !tbaa !13
%10 = load i32, ptr %0, align 4, !tbaa !14
%11 = load i32, ptr @TF_BOLD, align 4, !tbaa !13
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %3
%15 = add nsw i32 %9, 8
store i32 %15, ptr %1, align 4, !tbaa !13
br label %16
16: ; preds = %14, %3
%17 = load ptr, ptr @cons25_revcolors, align 8, !tbaa !5
%18 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%19 = load i32, ptr %18, align 4, !tbaa !15
%20 = tail call i64 @teken_256to8(i32 noundef %19) #2
%21 = getelementptr inbounds i32, ptr %17, i64 %20
%22 = load i32, ptr %21, align 4, !tbaa !13
store i32 %22, ptr %2, align 4, !tbaa !13
ret void
}
declare i64 @teken_256to8(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"TYPE_5__", !11, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0, !12, i64 4, !12, i64 8}
!12 = !{!"int", !7, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!10, !12, i64 0}
!15 = !{!10, !12, i64 4}
|
; ModuleID = 'AnghaBench/freebsd/sys/teken/extr_teken_subr_compat.h_teken_get_defattr_cons25.c'
source_filename = "AnghaBench/freebsd/sys/teken/extr_teken_subr_compat.h_teken_get_defattr_cons25.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cons25_revcolors = common local_unnamed_addr global ptr null, align 8
@TF_BOLD = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @teken_get_defattr_cons25(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = load ptr, ptr @cons25_revcolors, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i32, ptr %5, align 4, !tbaa !10
%7 = tail call i64 @teken_256to8(i32 noundef %6) #2
%8 = getelementptr inbounds i32, ptr %4, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !14
store i32 %9, ptr %1, align 4, !tbaa !14
%10 = load i32, ptr %0, align 4, !tbaa !15
%11 = load i32, ptr @TF_BOLD, align 4, !tbaa !14
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %3
%15 = add nsw i32 %9, 8
store i32 %15, ptr %1, align 4, !tbaa !14
br label %16
16: ; preds = %14, %3
%17 = load ptr, ptr @cons25_revcolors, align 8, !tbaa !6
%18 = getelementptr inbounds i8, ptr %0, i64 4
%19 = load i32, ptr %18, align 4, !tbaa !16
%20 = tail call i64 @teken_256to8(i32 noundef %19) #2
%21 = getelementptr inbounds i32, ptr %17, i64 %20
%22 = load i32, ptr %21, align 4, !tbaa !14
store i32 %22, ptr %2, align 4, !tbaa !14
ret void
}
declare i64 @teken_256to8(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"TYPE_5__", !12, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0, !13, i64 4, !13, i64 8}
!13 = !{!"int", !8, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!11, !13, i64 0}
!16 = !{!11, !13, i64 4}
|
freebsd_sys_teken_extr_teken_subr_compat.h_teken_get_defattr_cons25
|
; ModuleID = 'AnghaBench/linux/net/netfilter/ipset/extr_ip_set_hash_netiface.c_hash_netiface6_data_set_flags.c'
source_filename = "AnghaBench/linux/net/netfilter/ipset/extr_ip_set_hash_netiface.c_hash_netiface6_data_set_flags.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@IPSET_FLAG_NOMATCH = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @hash_netiface6_data_set_flags], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable
define internal void @hash_netiface6_data_set_flags(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 {
%3 = ashr i32 %1, 16
%4 = load i32, ptr @IPSET_FLAG_NOMATCH, align 4, !tbaa !5
%5 = and i32 %4, %3
store i32 %5, ptr %0, align 4, !tbaa !9
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"hash_netiface6_elem", !6, i64 0}
|
; ModuleID = 'AnghaBench/linux/net/netfilter/ipset/extr_ip_set_hash_netiface.c_hash_netiface6_data_set_flags.c'
source_filename = "AnghaBench/linux/net/netfilter/ipset/extr_ip_set_hash_netiface.c_hash_netiface6_data_set_flags.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IPSET_FLAG_NOMATCH = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @hash_netiface6_data_set_flags], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define internal void @hash_netiface6_data_set_flags(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 {
%3 = ashr i32 %1, 16
%4 = load i32, ptr @IPSET_FLAG_NOMATCH, align 4, !tbaa !6
%5 = and i32 %4, %3
store i32 %5, ptr %0, align 4, !tbaa !10
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"hash_netiface6_elem", !7, i64 0}
|
linux_net_netfilter_ipset_extr_ip_set_hash_netiface.c_hash_netiface6_data_set_flags
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/etherswitch/e6000sw/extr_e6000sw.c_e6000sw_parse_ethernet.c'
source_filename = "AnghaBench/freebsd/sys/dev/etherswitch/e6000sw/extr_e6000sw.c_e6000sw_parse_ethernet.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32 }
@.str = private unnamed_addr constant [9 x i8] c"ethernet\00", align 1
@.str.1 = private unnamed_addr constant [16 x i8] c"CPU port at %d\0A\00", align 1
@.str.2 = private unnamed_addr constant [68 x i8] c"Port %d has ethernet property but it points to an invalid location\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @e6000sw_parse_ethernet], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @e6000sw_parse_ethernet(ptr noundef %0, i64 noundef %1, i32 noundef %2) #0 {
%4 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%5 = call i64 @OF_getencprop(i64 noundef %1, ptr noundef nonnull @.str, ptr noundef nonnull %4, i32 noundef 8) #3
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %23
7: ; preds = %3
%8 = load i64, ptr %4, align 8, !tbaa !5
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %7
%11 = call i64 @OF_node_from_xref(i64 noundef %8) #3
%12 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%13 = load i32, ptr %12, align 4, !tbaa !9
%14 = call i32 @device_printf(i32 noundef %13, ptr noundef nonnull @.str.1, i32 noundef %2) #3
%15 = shl nuw i32 1, %2
%16 = load i32, ptr %0, align 4, !tbaa !12
%17 = or i32 %16, %15
store i32 %17, ptr %0, align 4, !tbaa !12
%18 = call i32 @e6000sw_parse_fixed_link(ptr noundef nonnull %0, i64 noundef %11, i32 noundef %2) #3
br label %23
19: ; preds = %7
%20 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%21 = load i32, ptr %20, align 4, !tbaa !9
%22 = call i32 @device_printf(i32 noundef %21, ptr noundef nonnull @.str.2, i32 noundef %2) #3
br label %23
23: ; preds = %3, %19, %10
%24 = phi i32 [ %18, %10 ], [ 0, %19 ], [ 0, %3 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @OF_getencprop(i64 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @OF_node_from_xref(i64 noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @e6000sw_parse_fixed_link(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 4}
!10 = !{!"TYPE_4__", !11, i64 0, !11, i64 4}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/etherswitch/e6000sw/extr_e6000sw.c_e6000sw_parse_ethernet.c'
source_filename = "AnghaBench/freebsd/sys/dev/etherswitch/e6000sw/extr_e6000sw.c_e6000sw_parse_ethernet.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [9 x i8] c"ethernet\00", align 1
@.str.1 = private unnamed_addr constant [16 x i8] c"CPU port at %d\0A\00", align 1
@.str.2 = private unnamed_addr constant [68 x i8] c"Port %d has ethernet property but it points to an invalid location\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @e6000sw_parse_ethernet], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @e6000sw_parse_ethernet(ptr noundef %0, i64 noundef %1, i32 noundef %2) #0 {
%4 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%5 = call i64 @OF_getencprop(i64 noundef %1, ptr noundef nonnull @.str, ptr noundef nonnull %4, i32 noundef 8) #3
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %23
7: ; preds = %3
%8 = load i64, ptr %4, align 8, !tbaa !6
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %7
%11 = call i64 @OF_node_from_xref(i64 noundef %8) #3
%12 = getelementptr inbounds i8, ptr %0, i64 4
%13 = load i32, ptr %12, align 4, !tbaa !10
%14 = call i32 @device_printf(i32 noundef %13, ptr noundef nonnull @.str.1, i32 noundef %2) #3
%15 = shl nuw i32 1, %2
%16 = load i32, ptr %0, align 4, !tbaa !13
%17 = or i32 %16, %15
store i32 %17, ptr %0, align 4, !tbaa !13
%18 = call i32 @e6000sw_parse_fixed_link(ptr noundef nonnull %0, i64 noundef %11, i32 noundef %2) #3
br label %23
19: ; preds = %7
%20 = getelementptr inbounds i8, ptr %0, i64 4
%21 = load i32, ptr %20, align 4, !tbaa !10
%22 = call i32 @device_printf(i32 noundef %21, ptr noundef nonnull @.str.2, i32 noundef %2) #3
br label %23
23: ; preds = %3, %19, %10
%24 = phi i32 [ %18, %10 ], [ 0, %19 ], [ 0, %3 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @OF_getencprop(i64 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @OF_node_from_xref(i64 noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @e6000sw_parse_fixed_link(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 4}
!11 = !{!"TYPE_4__", !12, i64 0, !12, i64 4}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 0}
|
freebsd_sys_dev_etherswitch_e6000sw_extr_e6000sw.c_e6000sw_parse_ethernet
|
; ModuleID = 'AnghaBench/linux/drivers/crypto/stm32/extr_stm32-cryp.c_stm32_cryp_aes_ccm_encrypt.c'
source_filename = "AnghaBench/linux/drivers/crypto/stm32/extr_stm32-cryp.c_stm32_cryp_aes_ccm_encrypt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@FLG_AES = dso_local local_unnamed_addr global i32 0, align 4
@FLG_CCM = dso_local local_unnamed_addr global i32 0, align 4
@FLG_ENCRYPT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @stm32_cryp_aes_ccm_encrypt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @stm32_cryp_aes_ccm_encrypt(ptr noundef %0) #0 {
%2 = load i32, ptr @FLG_AES, align 4, !tbaa !5
%3 = load i32, ptr @FLG_CCM, align 4, !tbaa !5
%4 = or i32 %3, %2
%5 = load i32, ptr @FLG_ENCRYPT, align 4, !tbaa !5
%6 = or i32 %4, %5
%7 = tail call i32 @stm32_cryp_aead_crypt(ptr noundef %0, i32 noundef %6) #2
ret i32 %7
}
declare i32 @stm32_cryp_aead_crypt(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/crypto/stm32/extr_stm32-cryp.c_stm32_cryp_aes_ccm_encrypt.c'
source_filename = "AnghaBench/linux/drivers/crypto/stm32/extr_stm32-cryp.c_stm32_cryp_aes_ccm_encrypt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FLG_AES = common local_unnamed_addr global i32 0, align 4
@FLG_CCM = common local_unnamed_addr global i32 0, align 4
@FLG_ENCRYPT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @stm32_cryp_aes_ccm_encrypt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @stm32_cryp_aes_ccm_encrypt(ptr noundef %0) #0 {
%2 = load i32, ptr @FLG_AES, align 4, !tbaa !6
%3 = load i32, ptr @FLG_CCM, align 4, !tbaa !6
%4 = or i32 %3, %2
%5 = load i32, ptr @FLG_ENCRYPT, align 4, !tbaa !6
%6 = or i32 %4, %5
%7 = tail call i32 @stm32_cryp_aead_crypt(ptr noundef %0, i32 noundef %6) #2
ret i32 %7
}
declare i32 @stm32_cryp_aead_crypt(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_crypto_stm32_extr_stm32-cryp.c_stm32_cryp_aes_ccm_encrypt
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/mthca/extr_mthca_main.c_mthca_enable_msi_x.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/mthca/extr_mthca_main.c_mthca_enable_msi_x.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.msix_entry = type { i32, i32 }
%struct.mthca_dev = type { %struct.TYPE_4__, i32 }
%struct.TYPE_4__ = type { ptr }
%struct.TYPE_3__ = type { i32 }
@.str = private unnamed_addr constant [50 x i8] c"Only %d MSI-X vectors available, not using MSI-X\0A\00", align 1
@MTHCA_EQ_COMP = dso_local local_unnamed_addr global i64 0, align 8
@MTHCA_EQ_ASYNC = dso_local local_unnamed_addr global i64 0, align 8
@MTHCA_EQ_CMD = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @mthca_enable_msi_x], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mthca_enable_msi_x(ptr noundef %0) #0 {
%2 = alloca [3 x %struct.msix_entry], align 16
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3
store i32 0, ptr %2, align 16, !tbaa !5
%3 = getelementptr inbounds [3 x %struct.msix_entry], ptr %2, i64 0, i64 1
store i32 1, ptr %3, align 8, !tbaa !5
%4 = getelementptr inbounds [3 x %struct.msix_entry], ptr %2, i64 0, i64 2
store i32 2, ptr %4, align 16, !tbaa !5
%5 = getelementptr inbounds %struct.mthca_dev, ptr %0, i64 0, i32 1
%6 = load i32, ptr %5, align 8, !tbaa !10
%7 = call i32 @ARRAY_SIZE(ptr noundef nonnull %2) #3
%8 = call i32 @pci_enable_msix(i32 noundef %6, ptr noundef nonnull %2, i32 noundef %7) #3
%9 = icmp eq i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %1
%11 = icmp sgt i32 %8, 0
br i1 %11, label %12, label %28
12: ; preds = %10
%13 = call i32 @mthca_info(ptr noundef nonnull %0, ptr noundef nonnull @.str, i32 noundef %8) #3
br label %28
14: ; preds = %1
%15 = getelementptr inbounds %struct.msix_entry, ptr %2, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = load ptr, ptr %0, align 8, !tbaa !15
%18 = load i64, ptr @MTHCA_EQ_COMP, align 8, !tbaa !16
%19 = getelementptr inbounds %struct.TYPE_3__, ptr %17, i64 %18
store i32 %16, ptr %19, align 4, !tbaa !18
%20 = getelementptr inbounds [3 x %struct.msix_entry], ptr %2, i64 0, i64 1, i32 1
%21 = load i32, ptr %20, align 4, !tbaa !14
%22 = load i64, ptr @MTHCA_EQ_ASYNC, align 8, !tbaa !16
%23 = getelementptr inbounds %struct.TYPE_3__, ptr %17, i64 %22
store i32 %21, ptr %23, align 4, !tbaa !18
%24 = getelementptr inbounds [3 x %struct.msix_entry], ptr %2, i64 0, i64 2, i32 1
%25 = load i32, ptr %24, align 4, !tbaa !14
%26 = load i64, ptr @MTHCA_EQ_CMD, align 8, !tbaa !16
%27 = getelementptr inbounds %struct.TYPE_3__, ptr %17, i64 %26
store i32 %25, ptr %27, align 4, !tbaa !18
br label %28
28: ; preds = %10, %12, %14
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3
ret i32 %8
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pci_enable_msix(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #2
declare i32 @mthca_info(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"msix_entry", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"mthca_dev", !12, i64 0, !7, i64 8}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!6, !7, i64 4}
!15 = !{!11, !13, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !8, i64 0}
!18 = !{!19, !7, i64 0}
!19 = !{!"TYPE_3__", !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/mthca/extr_mthca_main.c_mthca_enable_msi_x.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/mthca/extr_mthca_main.c_mthca_enable_msi_x.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.msix_entry = type { i32, i32 }
%struct.TYPE_3__ = type { i32 }
@.str = private unnamed_addr constant [50 x i8] c"Only %d MSI-X vectors available, not using MSI-X\0A\00", align 1
@MTHCA_EQ_COMP = common local_unnamed_addr global i64 0, align 8
@MTHCA_EQ_ASYNC = common local_unnamed_addr global i64 0, align 8
@MTHCA_EQ_CMD = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @mthca_enable_msi_x], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mthca_enable_msi_x(ptr noundef %0) #0 {
%2 = alloca [3 x %struct.msix_entry], align 4
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %2, i64 8
store i32 1, ptr %3, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %2, i64 16
store i32 2, ptr %4, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i32, ptr %5, align 8, !tbaa !11
%7 = call i32 @ARRAY_SIZE(ptr noundef nonnull %2) #3
%8 = call i32 @pci_enable_msix(i32 noundef %6, ptr noundef nonnull %2, i32 noundef %7) #3
%9 = icmp eq i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %1
%11 = icmp sgt i32 %8, 0
br i1 %11, label %12, label %28
12: ; preds = %10
%13 = call i32 @mthca_info(ptr noundef nonnull %0, ptr noundef nonnull @.str, i32 noundef %8) #3
br label %28
14: ; preds = %1
%15 = getelementptr inbounds i8, ptr %2, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !15
%17 = load ptr, ptr %0, align 8, !tbaa !16
%18 = load i64, ptr @MTHCA_EQ_COMP, align 8, !tbaa !17
%19 = getelementptr inbounds %struct.TYPE_3__, ptr %17, i64 %18
store i32 %16, ptr %19, align 4, !tbaa !19
%20 = getelementptr inbounds i8, ptr %2, i64 12
%21 = load i32, ptr %20, align 4, !tbaa !15
%22 = load i64, ptr @MTHCA_EQ_ASYNC, align 8, !tbaa !17
%23 = getelementptr inbounds %struct.TYPE_3__, ptr %17, i64 %22
store i32 %21, ptr %23, align 4, !tbaa !19
%24 = getelementptr inbounds i8, ptr %2, i64 20
%25 = load i32, ptr %24, align 4, !tbaa !15
%26 = load i64, ptr @MTHCA_EQ_CMD, align 8, !tbaa !17
%27 = getelementptr inbounds %struct.TYPE_3__, ptr %17, i64 %26
store i32 %25, ptr %27, align 4, !tbaa !19
br label %28
28: ; preds = %10, %12, %14
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3
ret i32 %8
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pci_enable_msix(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #2
declare i32 @mthca_info(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"msix_entry", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"mthca_dev", !13, i64 0, !8, i64 8}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!7, !8, i64 4}
!16 = !{!12, !14, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"long", !9, i64 0}
!19 = !{!20, !8, i64 0}
!20 = !{!"TYPE_3__", !8, i64 0}
|
fastsocket_kernel_drivers_infiniband_hw_mthca_extr_mthca_main.c_mthca_enable_msi_x
|
; ModuleID = 'AnghaBench/freebsd/sys/mips/mips/extr_octeon_cop2.c_octeon_cop2_alloc_ctx.c'
source_filename = "AnghaBench/freebsd/sys/mips/mips/extr_octeon_cop2.c_octeon_cop2_alloc_ctx.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ctxzone = dso_local local_unnamed_addr global i32 0, align 4
@M_NOWAIT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @octeon_cop2_alloc_ctx() local_unnamed_addr #0 {
%1 = load i32, ptr @ctxzone, align 4, !tbaa !5
%2 = load i32, ptr @M_NOWAIT, align 4, !tbaa !5
%3 = tail call ptr @uma_zalloc(i32 noundef %1, i32 noundef %2) #2
ret ptr %3
}
declare ptr @uma_zalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/sys/mips/mips/extr_octeon_cop2.c_octeon_cop2_alloc_ctx.c'
source_filename = "AnghaBench/freebsd/sys/mips/mips/extr_octeon_cop2.c_octeon_cop2_alloc_ctx.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ctxzone = common local_unnamed_addr global i32 0, align 4
@M_NOWAIT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @octeon_cop2_alloc_ctx() local_unnamed_addr #0 {
%1 = load i32, ptr @ctxzone, align 4, !tbaa !6
%2 = load i32, ptr @M_NOWAIT, align 4, !tbaa !6
%3 = tail call ptr @uma_zalloc(i32 noundef %1, i32 noundef %2) #2
ret ptr %3
}
declare ptr @uma_zalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_sys_mips_mips_extr_octeon_cop2.c_octeon_cop2_alloc_ctx
|
; ModuleID = 'AnghaBench/darwin-xnu/bsd/net/extr_pf.c_pf_match.c'
source_filename = "AnghaBench/darwin-xnu/bsd/net/extr_pf.c_pf_match.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @pf_match(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
switch i32 %0, label %29 [
i32 133, label %5
i32 128, label %9
i32 129, label %13
i32 136, label %17
i32 130, label %19
i32 131, label %21
i32 132, label %23
i32 134, label %25
i32 135, label %27
]
5: ; preds = %4
%6 = icmp sgt i32 %3, %1
%7 = icmp slt i32 %3, %2
%8 = and i1 %6, %7
br label %29
9: ; preds = %4
%10 = icmp slt i32 %3, %1
%11 = icmp sgt i32 %3, %2
%12 = or i1 %10, %11
br label %29
13: ; preds = %4
%14 = icmp sge i32 %3, %1
%15 = icmp sle i32 %3, %2
%16 = and i1 %14, %15
br label %29
17: ; preds = %4
%18 = icmp eq i32 %3, %1
br label %29
19: ; preds = %4
%20 = icmp ne i32 %3, %1
br label %29
21: ; preds = %4
%22 = icmp slt i32 %3, %1
br label %29
23: ; preds = %4
%24 = icmp sle i32 %3, %1
br label %29
25: ; preds = %4
%26 = icmp sgt i32 %3, %1
br label %29
27: ; preds = %4
%28 = icmp sge i32 %3, %1
br label %29
29: ; preds = %4, %27, %25, %23, %21, %19, %17, %13, %9, %5
%30 = phi i1 [ %28, %27 ], [ %26, %25 ], [ %24, %23 ], [ %22, %21 ], [ %20, %19 ], [ %18, %17 ], [ %16, %13 ], [ %12, %9 ], [ %8, %5 ], [ false, %4 ]
%31 = zext i1 %30 to i32
ret i32 %31
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/darwin-xnu/bsd/net/extr_pf.c_pf_match.c'
source_filename = "AnghaBench/darwin-xnu/bsd/net/extr_pf.c_pf_match.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define range(i32 0, 2) i32 @pf_match(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
switch i32 %0, label %29 [
i32 133, label %5
i32 128, label %9
i32 129, label %13
i32 136, label %17
i32 130, label %19
i32 131, label %21
i32 132, label %23
i32 134, label %25
i32 135, label %27
]
5: ; preds = %4
%6 = icmp sgt i32 %3, %1
%7 = icmp slt i32 %3, %2
%8 = and i1 %6, %7
br label %29
9: ; preds = %4
%10 = icmp slt i32 %3, %1
%11 = icmp sgt i32 %3, %2
%12 = or i1 %10, %11
br label %29
13: ; preds = %4
%14 = icmp sge i32 %3, %1
%15 = icmp sle i32 %3, %2
%16 = and i1 %14, %15
br label %29
17: ; preds = %4
%18 = icmp eq i32 %3, %1
br label %29
19: ; preds = %4
%20 = icmp ne i32 %3, %1
br label %29
21: ; preds = %4
%22 = icmp slt i32 %3, %1
br label %29
23: ; preds = %4
%24 = icmp sle i32 %3, %1
br label %29
25: ; preds = %4
%26 = icmp sgt i32 %3, %1
br label %29
27: ; preds = %4
%28 = icmp sge i32 %3, %1
br label %29
29: ; preds = %4, %27, %25, %23, %21, %19, %17, %13, %9, %5
%30 = phi i1 [ %28, %27 ], [ %26, %25 ], [ %24, %23 ], [ %22, %21 ], [ %20, %19 ], [ %18, %17 ], [ %16, %13 ], [ %12, %9 ], [ %8, %5 ], [ false, %4 ]
%31 = zext i1 %30 to i32
ret i32 %31
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
darwin-xnu_bsd_net_extr_pf.c_pf_match
|
; ModuleID = 'AnghaBench/Provenance/Cores/Mednafen/mednafen-1.21/src/resampler/extr_resample.c_MDFN_resampler_set_quality.c'
source_filename = "AnghaBench/Provenance/Cores/Mednafen/mednafen-1.21/src/resampler/extr_resample.c_MDFN_resampler_set_quality.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i64 }
@RESAMPLER_ERR_INVALID_ARG = dso_local local_unnamed_addr global i32 0, align 4
@RESAMPLER_ERR_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @speex_resampler_set_quality(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp ugt i32 %1, 10
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = load i32, ptr %0, align 8, !tbaa !5
%6 = icmp eq i32 %5, %1
br i1 %6, label %13, label %7
7: ; preds = %4
store i32 %1, ptr %0, align 8, !tbaa !5
%8 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%9 = load i64, ptr %8, align 8, !tbaa !11
%10 = icmp eq i64 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %7
%12 = tail call i32 @update_filter(ptr noundef nonnull %0) #2
br label %13
13: ; preds = %7, %11, %4, %2
%14 = phi ptr [ @RESAMPLER_ERR_INVALID_ARG, %2 ], [ @RESAMPLER_ERR_SUCCESS, %4 ], [ @RESAMPLER_ERR_SUCCESS, %11 ], [ @RESAMPLER_ERR_SUCCESS, %7 ]
%15 = load i32, ptr %14, align 4, !tbaa !12
ret i32 %15
}
declare i32 @update_filter(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/Provenance/Cores/Mednafen/mednafen-1.21/src/resampler/extr_resample.c_MDFN_resampler_set_quality.c'
source_filename = "AnghaBench/Provenance/Cores/Mednafen/mednafen-1.21/src/resampler/extr_resample.c_MDFN_resampler_set_quality.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RESAMPLER_ERR_INVALID_ARG = common local_unnamed_addr global i32 0, align 4
@RESAMPLER_ERR_SUCCESS = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @speex_resampler_set_quality(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp ugt i32 %1, 10
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = load i32, ptr %0, align 8, !tbaa !6
%6 = icmp eq i32 %5, %1
br i1 %6, label %13, label %7
7: ; preds = %4
store i32 %1, ptr %0, align 8, !tbaa !6
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !12
%10 = icmp eq i64 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %7
%12 = tail call i32 @update_filter(ptr noundef nonnull %0) #2
br label %13
13: ; preds = %7, %11, %4, %2
%14 = phi ptr [ @RESAMPLER_ERR_INVALID_ARG, %2 ], [ @RESAMPLER_ERR_SUCCESS, %4 ], [ @RESAMPLER_ERR_SUCCESS, %11 ], [ @RESAMPLER_ERR_SUCCESS, %7 ]
%15 = load i32, ptr %14, align 4, !tbaa !13
ret i32 %15
}
declare i32 @update_filter(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!8, !8, i64 0}
|
Provenance_Cores_Mednafen_mednafen-1.21_src_resampler_extr_resample.c_MDFN_resampler_set_quality
|
; ModuleID = 'AnghaBench/linux/sound/core/extr_compress_offload.c_snd_compr_free.c'
source_filename = "AnghaBench/linux/sound/core/extr_compress_offload.c_snd_compr_free.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.snd_compr_file = type { i32, %struct.TYPE_5__, ptr, i32 }
%struct.TYPE_5__ = type { ptr, ptr, i32 }
%struct.TYPE_4__ = type { ptr, ptr }
%struct.snd_compr_runtime = type { i32, %struct.TYPE_5__, ptr, i32 }
@SNDRV_PCM_TRIGGER_STOP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_compr_free], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @snd_compr_free(ptr nocapture readnone %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.snd_compr_file, ptr %3, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = getelementptr inbounds %struct.snd_compr_file, ptr %3, i64 0, i32 1, i32 2
%7 = tail call i32 @cancel_delayed_work_sync(ptr noundef nonnull %6) #2
%8 = load i32, ptr %5, align 8, !tbaa !14
%9 = add i32 %8, -128
%10 = icmp ult i32 %9, 3
br i1 %10, label %11, label %18
11: ; preds = %2
%12 = getelementptr inbounds %struct.snd_compr_file, ptr %3, i64 0, i32 1, i32 1
%13 = load ptr, ptr %12, align 8, !tbaa !16
%14 = getelementptr inbounds %struct.TYPE_4__, ptr %13, i64 0, i32 1
%15 = load ptr, ptr %14, align 8, !tbaa !17
%16 = load i32, ptr @SNDRV_PCM_TRIGGER_STOP, align 4, !tbaa !19
%17 = tail call i32 %15(ptr noundef nonnull %4, i32 noundef %16) #2
br label %18
18: ; preds = %2, %11
%19 = getelementptr inbounds %struct.snd_compr_file, ptr %3, i64 0, i32 1, i32 1
%20 = load ptr, ptr %19, align 8, !tbaa !16
%21 = load ptr, ptr %20, align 8, !tbaa !20
%22 = tail call i32 %21(ptr noundef nonnull %4) #2
%23 = load ptr, ptr %4, align 8, !tbaa !10
%24 = getelementptr inbounds %struct.snd_compr_runtime, ptr %23, i64 0, i32 3
%25 = load i32, ptr %24, align 8, !tbaa !21
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %32
27: ; preds = %18
%28 = getelementptr inbounds %struct.snd_compr_runtime, ptr %23, i64 0, i32 2
%29 = load ptr, ptr %28, align 8, !tbaa !22
%30 = tail call i32 @kfree(ptr noundef %29) #2
%31 = load ptr, ptr %4, align 8, !tbaa !10
br label %32
32: ; preds = %27, %18
%33 = phi ptr [ %31, %27 ], [ %23, %18 ]
%34 = tail call i32 @kfree(ptr noundef %33) #2
%35 = tail call i32 @kfree(ptr noundef nonnull %3) #2
ret i32 0
}
declare i32 @cancel_delayed_work_sync(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"file", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"snd_compr_file", !12, i64 0, !13, i64 8, !7, i64 32, !12, i64 40}
!12 = !{!"int", !8, i64 0}
!13 = !{!"TYPE_5__", !7, i64 0, !7, i64 8, !12, i64 16}
!14 = !{!15, !12, i64 0}
!15 = !{!"snd_compr_runtime", !12, i64 0, !13, i64 8, !7, i64 32, !12, i64 40}
!16 = !{!11, !7, i64 16}
!17 = !{!18, !7, i64 8}
!18 = !{!"TYPE_4__", !7, i64 0, !7, i64 8}
!19 = !{!12, !12, i64 0}
!20 = !{!18, !7, i64 0}
!21 = !{!15, !12, i64 40}
!22 = !{!15, !7, i64 32}
|
; ModuleID = 'AnghaBench/linux/sound/core/extr_compress_offload.c_snd_compr_free.c'
source_filename = "AnghaBench/linux/sound/core/extr_compress_offload.c_snd_compr_free.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SNDRV_PCM_TRIGGER_STOP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_compr_free], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @snd_compr_free(ptr nocapture readnone %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %3, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = getelementptr inbounds i8, ptr %3, i64 24
%7 = tail call i32 @cancel_delayed_work_sync(ptr noundef nonnull %6) #2
%8 = load i32, ptr %5, align 8, !tbaa !15
%9 = add i32 %8, -128
%10 = icmp ult i32 %9, 3
br i1 %10, label %11, label %18
11: ; preds = %2
%12 = getelementptr inbounds i8, ptr %3, i64 16
%13 = load ptr, ptr %12, align 8, !tbaa !17
%14 = getelementptr inbounds i8, ptr %13, i64 8
%15 = load ptr, ptr %14, align 8, !tbaa !18
%16 = load i32, ptr @SNDRV_PCM_TRIGGER_STOP, align 4, !tbaa !20
%17 = tail call i32 %15(ptr noundef nonnull %4, i32 noundef %16) #2
br label %18
18: ; preds = %2, %11
%19 = getelementptr inbounds i8, ptr %3, i64 16
%20 = load ptr, ptr %19, align 8, !tbaa !17
%21 = load ptr, ptr %20, align 8, !tbaa !21
%22 = tail call i32 %21(ptr noundef nonnull %4) #2
%23 = load ptr, ptr %4, align 8, !tbaa !11
%24 = getelementptr inbounds i8, ptr %23, i64 40
%25 = load i32, ptr %24, align 8, !tbaa !22
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %32
27: ; preds = %18
%28 = getelementptr inbounds i8, ptr %23, i64 32
%29 = load ptr, ptr %28, align 8, !tbaa !23
%30 = tail call i32 @kfree(ptr noundef %29) #2
%31 = load ptr, ptr %4, align 8, !tbaa !11
br label %32
32: ; preds = %27, %18
%33 = phi ptr [ %31, %27 ], [ %23, %18 ]
%34 = tail call i32 @kfree(ptr noundef %33) #2
%35 = tail call i32 @kfree(ptr noundef nonnull %3) #2
ret i32 0
}
declare i32 @cancel_delayed_work_sync(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"file", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"snd_compr_file", !13, i64 0, !14, i64 8, !8, i64 32, !13, i64 40}
!13 = !{!"int", !9, i64 0}
!14 = !{!"TYPE_5__", !8, i64 0, !8, i64 8, !13, i64 16}
!15 = !{!16, !13, i64 0}
!16 = !{!"snd_compr_runtime", !13, i64 0, !14, i64 8, !8, i64 32, !13, i64 40}
!17 = !{!12, !8, i64 16}
!18 = !{!19, !8, i64 8}
!19 = !{!"TYPE_4__", !8, i64 0, !8, i64 8}
!20 = !{!13, !13, i64 0}
!21 = !{!19, !8, i64 0}
!22 = !{!16, !13, i64 40}
!23 = !{!16, !8, i64 32}
|
linux_sound_core_extr_compress_offload.c_snd_compr_free
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/arm/extr_ether1.c_ether1_getstats.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/arm/extr_ether1.c_ether1_getstats.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ether1_getstats], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @ether1_getstats(ptr noundef %0) #0 {
%2 = tail call ptr @priv(ptr noundef %0) #2
ret ptr %2
}
declare ptr @priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/arm/extr_ether1.c_ether1_getstats.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/arm/extr_ether1.c_ether1_getstats.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ether1_getstats], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @ether1_getstats(ptr noundef %0) #0 {
%2 = tail call ptr @priv(ptr noundef %0) #2
ret ptr %2
}
declare ptr @priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_drivers_net_arm_extr_ether1.c_ether1_getstats
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_emulate.c_es_base.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_emulate.c_es_base.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@VCPU_SREG_ES = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @es_base], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @es_base(ptr noundef %0) #0 {
%2 = load i32, ptr @VCPU_SREG_ES, align 4, !tbaa !5
%3 = tail call i64 @seg_base(ptr noundef %0, i32 noundef %2) #2
ret i64 %3
}
declare i64 @seg_base(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_emulate.c_es_base.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_emulate.c_es_base.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VCPU_SREG_ES = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @es_base], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @es_base(ptr noundef %0) #0 {
%2 = load i32, ptr @VCPU_SREG_ES, align 4, !tbaa !6
%3 = tail call i64 @seg_base(ptr noundef %0, i32 noundef %2) #2
ret i64 %3
}
declare i64 @seg_base(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_arch_x86_kvm_extr_emulate.c_es_base
|
; ModuleID = 'AnghaBench/linux/drivers/mfd/extr_rk808.c_rk8xx_syscore_shutdown.c'
source_filename = "AnghaBench/linux/drivers/mfd/extr_rk808.c_rk8xx_syscore_shutdown.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rk808 = type { i64, i32 }
@rk808_i2c_client = dso_local local_unnamed_addr global ptr null, align 8
@system_state = dso_local local_unnamed_addr global i64 0, align 8
@SYSTEM_POWER_OFF = dso_local local_unnamed_addr global i64 0, align 8
@RK809_ID = dso_local local_unnamed_addr global i64 0, align 8
@RK817_ID = dso_local local_unnamed_addr global i64 0, align 8
@RK817_SLPPIN_FUNC_MSK = dso_local local_unnamed_addr global i32 0, align 4
@SLPPIN_DN_FUN = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [38 x i8] c"Cannot switch to power down function\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @rk8xx_syscore_shutdown], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @rk8xx_syscore_shutdown() #0 {
%1 = load ptr, ptr @rk808_i2c_client, align 8, !tbaa !5
%2 = tail call ptr @i2c_get_clientdata(ptr noundef %1) #2
%3 = load i64, ptr @system_state, align 8, !tbaa !9
%4 = load i64, ptr @SYSTEM_POWER_OFF, align 8, !tbaa !9
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %24
6: ; preds = %0
%7 = load i64, ptr %2, align 8, !tbaa !11
%8 = load i64, ptr @RK809_ID, align 8, !tbaa !9
%9 = icmp eq i64 %7, %8
%10 = load i64, ptr @RK817_ID, align 8
%11 = icmp eq i64 %7, %10
%12 = select i1 %9, i1 true, i1 %11
br i1 %12, label %13, label %24
13: ; preds = %6
%14 = getelementptr inbounds %struct.rk808, ptr %2, i64 0, i32 1
%15 = load i32, ptr %14, align 8, !tbaa !14
%16 = tail call i32 @RK817_SYS_CFG(i32 noundef 3) #2
%17 = load i32, ptr @RK817_SLPPIN_FUNC_MSK, align 4, !tbaa !15
%18 = load i32, ptr @SLPPIN_DN_FUN, align 4, !tbaa !15
%19 = tail call i32 @regmap_update_bits(i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %24, label %21
21: ; preds = %13
%22 = load ptr, ptr @rk808_i2c_client, align 8, !tbaa !5
%23 = tail call i32 @dev_warn(ptr noundef %22, ptr noundef nonnull @.str) #2
br label %24
24: ; preds = %6, %13, %21, %0
ret void
}
declare ptr @i2c_get_clientdata(ptr noundef) local_unnamed_addr #1
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RK817_SYS_CFG(i32 noundef) local_unnamed_addr #1
declare i32 @dev_warn(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"rk808", !10, i64 0, !13, i64 8}
!13 = !{!"int", !7, i64 0}
!14 = !{!12, !13, i64 8}
!15 = !{!13, !13, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/mfd/extr_rk808.c_rk8xx_syscore_shutdown.c'
source_filename = "AnghaBench/linux/drivers/mfd/extr_rk808.c_rk8xx_syscore_shutdown.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@rk808_i2c_client = common local_unnamed_addr global ptr null, align 8
@system_state = common local_unnamed_addr global i64 0, align 8
@SYSTEM_POWER_OFF = common local_unnamed_addr global i64 0, align 8
@RK809_ID = common local_unnamed_addr global i64 0, align 8
@RK817_ID = common local_unnamed_addr global i64 0, align 8
@RK817_SLPPIN_FUNC_MSK = common local_unnamed_addr global i32 0, align 4
@SLPPIN_DN_FUN = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [38 x i8] c"Cannot switch to power down function\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @rk8xx_syscore_shutdown], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @rk8xx_syscore_shutdown() #0 {
%1 = load ptr, ptr @rk808_i2c_client, align 8, !tbaa !6
%2 = tail call ptr @i2c_get_clientdata(ptr noundef %1) #2
%3 = load i64, ptr @system_state, align 8, !tbaa !10
%4 = load i64, ptr @SYSTEM_POWER_OFF, align 8, !tbaa !10
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %24
6: ; preds = %0
%7 = load i64, ptr %2, align 8, !tbaa !12
%8 = load i64, ptr @RK809_ID, align 8, !tbaa !10
%9 = icmp eq i64 %7, %8
%10 = load i64, ptr @RK817_ID, align 8
%11 = icmp eq i64 %7, %10
%12 = select i1 %9, i1 true, i1 %11
br i1 %12, label %13, label %24
13: ; preds = %6
%14 = getelementptr inbounds i8, ptr %2, i64 8
%15 = load i32, ptr %14, align 8, !tbaa !15
%16 = tail call i32 @RK817_SYS_CFG(i32 noundef 3) #2
%17 = load i32, ptr @RK817_SLPPIN_FUNC_MSK, align 4, !tbaa !16
%18 = load i32, ptr @SLPPIN_DN_FUN, align 4, !tbaa !16
%19 = tail call i32 @regmap_update_bits(i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %24, label %21
21: ; preds = %13
%22 = load ptr, ptr @rk808_i2c_client, align 8, !tbaa !6
%23 = tail call i32 @dev_warn(ptr noundef %22, ptr noundef nonnull @.str) #2
br label %24
24: ; preds = %6, %13, %21, %0
ret void
}
declare ptr @i2c_get_clientdata(ptr noundef) local_unnamed_addr #1
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RK817_SYS_CFG(i32 noundef) local_unnamed_addr #1
declare i32 @dev_warn(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"rk808", !11, i64 0, !14, i64 8}
!14 = !{!"int", !8, i64 0}
!15 = !{!13, !14, i64 8}
!16 = !{!14, !14, i64 0}
|
linux_drivers_mfd_extr_rk808.c_rk8xx_syscore_shutdown
|
; ModuleID = 'AnghaBench/vlc/src/misc/extr_messages.c_vlc_LogPreinit.c'
source_filename = "AnghaBench/vlc/src/misc/extr_messages.c_vlc_LogPreinit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @vlc_LogPreinit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr (...) @vlc_LogSwitchCreate() #2
%3 = icmp eq ptr %2, null
%4 = zext i1 %3 to i32
%5 = tail call i64 @unlikely(i32 noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %1
store ptr %2, ptr %0, align 8, !tbaa !5
%8 = tail call ptr @vlc_LogEarlyOpen(ptr noundef %2) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %14, label %10
10: ; preds = %7
%11 = tail call i32 @vlc_LogSwitch(ptr noundef %2, ptr noundef nonnull %8) #2
%12 = tail call i32 @VLC_OBJECT(ptr noundef nonnull %0) #2
%13 = tail call i32 @vlc_LogSpam(i32 noundef %12) #2
br label %14
14: ; preds = %7, %10, %1
%15 = phi i32 [ -1, %1 ], [ 0, %10 ], [ 0, %7 ]
ret i32 %15
}
declare ptr @vlc_LogSwitchCreate(...) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare ptr @vlc_LogEarlyOpen(ptr noundef) local_unnamed_addr #1
declare i32 @vlc_LogSwitch(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vlc_LogSpam(i32 noundef) local_unnamed_addr #1
declare i32 @VLC_OBJECT(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/vlc/src/misc/extr_messages.c_vlc_LogPreinit.c'
source_filename = "AnghaBench/vlc/src/misc/extr_messages.c_vlc_LogPreinit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -1, 1) i32 @vlc_LogPreinit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @vlc_LogSwitchCreate() #2
%3 = icmp eq ptr %2, null
%4 = zext i1 %3 to i32
%5 = tail call i64 @unlikely(i32 noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %1
store ptr %2, ptr %0, align 8, !tbaa !6
%8 = tail call ptr @vlc_LogEarlyOpen(ptr noundef %2) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %14, label %10
10: ; preds = %7
%11 = tail call i32 @vlc_LogSwitch(ptr noundef %2, ptr noundef nonnull %8) #2
%12 = tail call i32 @VLC_OBJECT(ptr noundef nonnull %0) #2
%13 = tail call i32 @vlc_LogSpam(i32 noundef %12) #2
br label %14
14: ; preds = %7, %10, %1
%15 = phi i32 [ -1, %1 ], [ 0, %10 ], [ 0, %7 ]
ret i32 %15
}
declare ptr @vlc_LogSwitchCreate(...) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare ptr @vlc_LogEarlyOpen(ptr noundef) local_unnamed_addr #1
declare i32 @vlc_LogSwitch(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vlc_LogSpam(i32 noundef) local_unnamed_addr #1
declare i32 @VLC_OBJECT(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0}
!8 = !{!"TYPE_5__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
|
vlc_src_misc_extr_messages.c_vlc_LogPreinit
|
; ModuleID = 'AnghaBench/xLua/build/lua-5.3.3/src/extr_loadlib.c_lsys_sym.c'
source_filename = "AnghaBench/xLua/build/lua-5.3.3/src/extr_loadlib.c_lsys_sym.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DLMSG = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @lsys_sym], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noalias noundef ptr @lsys_sym(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture readnone %2) #0 {
%4 = load i32, ptr @DLMSG, align 4, !tbaa !5
%5 = tail call i32 @lua_pushliteral(ptr noundef %0, i32 noundef %4) #2
ret ptr null
}
declare i32 @lua_pushliteral(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/xLua/build/lua-5.3.3/src/extr_loadlib.c_lsys_sym.c'
source_filename = "AnghaBench/xLua/build/lua-5.3.3/src/extr_loadlib.c_lsys_sym.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DLMSG = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @lsys_sym], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noalias noundef ptr @lsys_sym(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture readnone %2) #0 {
%4 = load i32, ptr @DLMSG, align 4, !tbaa !6
%5 = tail call i32 @lua_pushliteral(ptr noundef %0, i32 noundef %4) #2
ret ptr null
}
declare i32 @lua_pushliteral(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
xLua_build_lua-5.3.3_src_extr_loadlib.c_lsys_sym
|
; ModuleID = 'AnghaBench/postgres/src/pl/plperl/extr_plperl_helpers.h_cstr2sv.c'
source_filename = "AnghaBench/postgres/src/pl/plperl/extr_plperl_helpers.h_cstr2sv.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@dTHX = dso_local local_unnamed_addr global i32 0, align 4
@PG_SQL_ASCII = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @cstr2sv], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal ptr @cstr2sv(ptr noundef %0) #0 {
%2 = tail call i64 (...) @GetDatabaseEncoding() #2
%3 = load i64, ptr @PG_SQL_ASCII, align 8, !tbaa !5
%4 = icmp eq i64 %2, %3
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call ptr @newSVpv(ptr noundef %0, i32 noundef 0) #2
br label %12
7: ; preds = %1
%8 = tail call ptr @utf_e2u(ptr noundef %0) #2
%9 = tail call ptr @newSVpv(ptr noundef %8, i32 noundef 0) #2
%10 = tail call i32 @SvUTF8_on(ptr noundef %9) #2
%11 = tail call i32 @pfree(ptr noundef %8) #2
br label %12
12: ; preds = %7, %5
%13 = phi ptr [ %6, %5 ], [ %9, %7 ]
ret ptr %13
}
declare i64 @GetDatabaseEncoding(...) local_unnamed_addr #1
declare ptr @newSVpv(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @utf_e2u(ptr noundef) local_unnamed_addr #1
declare i32 @SvUTF8_on(ptr noundef) local_unnamed_addr #1
declare i32 @pfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/postgres/src/pl/plperl/extr_plperl_helpers.h_cstr2sv.c'
source_filename = "AnghaBench/postgres/src/pl/plperl/extr_plperl_helpers.h_cstr2sv.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@dTHX = common local_unnamed_addr global i32 0, align 4
@PG_SQL_ASCII = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @cstr2sv], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal ptr @cstr2sv(ptr noundef %0) #0 {
%2 = tail call i64 @GetDatabaseEncoding() #2
%3 = load i64, ptr @PG_SQL_ASCII, align 8, !tbaa !6
%4 = icmp eq i64 %2, %3
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call ptr @newSVpv(ptr noundef %0, i32 noundef 0) #2
br label %12
7: ; preds = %1
%8 = tail call ptr @utf_e2u(ptr noundef %0) #2
%9 = tail call ptr @newSVpv(ptr noundef %8, i32 noundef 0) #2
%10 = tail call i32 @SvUTF8_on(ptr noundef %9) #2
%11 = tail call i32 @pfree(ptr noundef %8) #2
br label %12
12: ; preds = %7, %5
%13 = phi ptr [ %6, %5 ], [ %9, %7 ]
ret ptr %13
}
declare i64 @GetDatabaseEncoding(...) local_unnamed_addr #1
declare ptr @newSVpv(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @utf_e2u(ptr noundef) local_unnamed_addr #1
declare i32 @SvUTF8_on(ptr noundef) local_unnamed_addr #1
declare i32 @pfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
postgres_src_pl_plperl_extr_plperl_helpers.h_cstr2sv
|
; ModuleID = 'AnghaBench/DOOM/linuxdoom-1.10/extr_p_map.c_P_ChangeSector.c'
source_filename = "AnghaBench/DOOM/linuxdoom-1.10/extr_p_map.c_P_ChangeSector.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@nofit = dso_local local_unnamed_addr global i32 0, align 4
@crushchange = dso_local local_unnamed_addr global i32 0, align 4
@BOXLEFT = dso_local local_unnamed_addr global i64 0, align 8
@BOXRIGHT = dso_local local_unnamed_addr global i64 0, align 8
@BOXBOTTOM = dso_local local_unnamed_addr global i64 0, align 8
@BOXTOP = dso_local local_unnamed_addr global i64 0, align 8
@PIT_ChangeSector = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @P_ChangeSector(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
store i32 0, ptr @nofit, align 4, !tbaa !5
store i32 %1, ptr @crushchange, align 4, !tbaa !5
%3 = load ptr, ptr %0, align 8, !tbaa !9
%4 = load i64, ptr @BOXLEFT, align 8, !tbaa !12
%5 = getelementptr inbounds i32, ptr %3, i64 %4
%6 = load i32, ptr %5, align 4, !tbaa !5
%7 = load i64, ptr @BOXRIGHT, align 8, !tbaa !12
%8 = getelementptr inbounds i32, ptr %3, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !5
%10 = icmp sgt i32 %6, %9
br i1 %10, label %46, label %11
11: ; preds = %2
%12 = load i64, ptr @BOXTOP, align 8, !tbaa !12
br label %13
13: ; preds = %11, %36
%14 = phi i64 [ %37, %36 ], [ %7, %11 ]
%15 = phi ptr [ %38, %36 ], [ %3, %11 ]
%16 = phi i64 [ %39, %36 ], [ %12, %11 ]
%17 = phi i32 [ %40, %36 ], [ %6, %11 ]
%18 = load i64, ptr @BOXBOTTOM, align 8, !tbaa !12
%19 = getelementptr inbounds i32, ptr %15, i64 %18
%20 = load i32, ptr %19, align 4, !tbaa !5
%21 = getelementptr inbounds i32, ptr %15, i64 %16
%22 = load i32, ptr %21, align 4, !tbaa !5
%23 = icmp sgt i32 %20, %22
br i1 %23, label %36, label %24
24: ; preds = %13, %24
%25 = phi i32 [ %28, %24 ], [ %20, %13 ]
%26 = load i32, ptr @PIT_ChangeSector, align 4, !tbaa !5
%27 = tail call i32 @P_BlockThingsIterator(i32 noundef %17, i32 noundef %25, i32 noundef %26) #2
%28 = add nsw i32 %25, 1
%29 = load ptr, ptr %0, align 8, !tbaa !9
%30 = load i64, ptr @BOXTOP, align 8, !tbaa !12
%31 = getelementptr inbounds i32, ptr %29, i64 %30
%32 = load i32, ptr %31, align 4, !tbaa !5
%33 = icmp slt i32 %25, %32
br i1 %33, label %24, label %34, !llvm.loop !14
34: ; preds = %24
%35 = load i64, ptr @BOXRIGHT, align 8, !tbaa !12
br label %36
36: ; preds = %34, %13
%37 = phi i64 [ %35, %34 ], [ %14, %13 ]
%38 = phi ptr [ %29, %34 ], [ %15, %13 ]
%39 = phi i64 [ %30, %34 ], [ %16, %13 ]
%40 = add nsw i32 %17, 1
%41 = getelementptr inbounds i32, ptr %38, i64 %37
%42 = load i32, ptr %41, align 4, !tbaa !5
%43 = icmp slt i32 %17, %42
br i1 %43, label %13, label %44, !llvm.loop !16
44: ; preds = %36
%45 = load i32, ptr @nofit, align 4, !tbaa !5
br label %46
46: ; preds = %44, %2
%47 = phi i32 [ %45, %44 ], [ 0, %2 ]
ret i32 %47
}
declare i32 @P_BlockThingsIterator(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_3__", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
|
; ModuleID = 'AnghaBench/DOOM/linuxdoom-1.10/extr_p_map.c_P_ChangeSector.c'
source_filename = "AnghaBench/DOOM/linuxdoom-1.10/extr_p_map.c_P_ChangeSector.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@nofit = common local_unnamed_addr global i32 0, align 4
@crushchange = common local_unnamed_addr global i32 0, align 4
@BOXLEFT = common local_unnamed_addr global i64 0, align 8
@BOXRIGHT = common local_unnamed_addr global i64 0, align 8
@BOXBOTTOM = common local_unnamed_addr global i64 0, align 8
@BOXTOP = common local_unnamed_addr global i64 0, align 8
@PIT_ChangeSector = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @P_ChangeSector(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
store i32 0, ptr @nofit, align 4, !tbaa !6
store i32 %1, ptr @crushchange, align 4, !tbaa !6
%3 = load ptr, ptr %0, align 8, !tbaa !10
%4 = load i64, ptr @BOXLEFT, align 8, !tbaa !13
%5 = getelementptr inbounds i32, ptr %3, i64 %4
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = load i64, ptr @BOXRIGHT, align 8, !tbaa !13
%8 = getelementptr inbounds i32, ptr %3, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !6
%10 = icmp sgt i32 %6, %9
br i1 %10, label %46, label %11
11: ; preds = %2
%12 = load i64, ptr @BOXTOP, align 8, !tbaa !13
br label %13
13: ; preds = %11, %36
%14 = phi i64 [ %37, %36 ], [ %7, %11 ]
%15 = phi ptr [ %38, %36 ], [ %3, %11 ]
%16 = phi i64 [ %39, %36 ], [ %12, %11 ]
%17 = phi i32 [ %40, %36 ], [ %6, %11 ]
%18 = load i64, ptr @BOXBOTTOM, align 8, !tbaa !13
%19 = getelementptr inbounds i32, ptr %15, i64 %18
%20 = load i32, ptr %19, align 4, !tbaa !6
%21 = getelementptr inbounds i32, ptr %15, i64 %16
%22 = load i32, ptr %21, align 4, !tbaa !6
%23 = icmp sgt i32 %20, %22
br i1 %23, label %36, label %24
24: ; preds = %13, %24
%25 = phi i32 [ %28, %24 ], [ %20, %13 ]
%26 = load i32, ptr @PIT_ChangeSector, align 4, !tbaa !6
%27 = tail call i32 @P_BlockThingsIterator(i32 noundef %17, i32 noundef %25, i32 noundef %26) #2
%28 = add nsw i32 %25, 1
%29 = load ptr, ptr %0, align 8, !tbaa !10
%30 = load i64, ptr @BOXTOP, align 8, !tbaa !13
%31 = getelementptr inbounds i32, ptr %29, i64 %30
%32 = load i32, ptr %31, align 4, !tbaa !6
%33 = icmp slt i32 %25, %32
br i1 %33, label %24, label %34, !llvm.loop !15
34: ; preds = %24
%35 = load i64, ptr @BOXRIGHT, align 8, !tbaa !13
br label %36
36: ; preds = %34, %13
%37 = phi i64 [ %35, %34 ], [ %14, %13 ]
%38 = phi ptr [ %29, %34 ], [ %15, %13 ]
%39 = phi i64 [ %30, %34 ], [ %16, %13 ]
%40 = add nsw i32 %17, 1
%41 = getelementptr inbounds i32, ptr %38, i64 %37
%42 = load i32, ptr %41, align 4, !tbaa !6
%43 = icmp slt i32 %17, %42
br i1 %43, label %13, label %44, !llvm.loop !17
44: ; preds = %36
%45 = load i32, ptr @nofit, align 4, !tbaa !6
br label %46
46: ; preds = %44, %2
%47 = phi i32 [ %45, %44 ], [ 0, %2 ]
ret i32 %47
}
declare i32 @P_BlockThingsIterator(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_3__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
|
DOOM_linuxdoom-1.10_extr_p_map.c_P_ChangeSector
|
; ModuleID = 'AnghaBench/RetroArch/deps/libFLAC/extr_stream_decoder.c_read_metadata_picture_.c'
source_filename = "AnghaBench/RetroArch/deps/libFLAC/extr_stream_decoder.c_read_metadata_picture_.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { ptr, ptr, i64, i64, i64, i64, i64, ptr, i64 }
%struct.TYPE_10__ = type { ptr, ptr }
@FLAC__STREAM_METADATA_PICTURE_TYPE_LEN = dso_local local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_MIME_TYPE_LENGTH_LEN = dso_local local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_DECODER_MEMORY_ALLOCATION_ERROR = dso_local local_unnamed_addr global ptr null, align 8
@FLAC__STREAM_METADATA_PICTURE_DESCRIPTION_LENGTH_LEN = dso_local local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_WIDTH_LEN = dso_local local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_HEIGHT_LEN = dso_local local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_DEPTH_LEN = dso_local local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_COLORS_LEN = dso_local local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_DATA_LENGTH_LEN = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @read_metadata_picture_(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = tail call i32 @FLAC__bitreader_is_consumed_byte_aligned(i32 noundef %5) #3
%7 = tail call i32 @FLAC__ASSERT(i32 noundef %6) #3
%8 = load ptr, ptr %0, align 8, !tbaa !5
%9 = load i32, ptr %8, align 4, !tbaa !10
%10 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_TYPE_LEN, align 4, !tbaa !13
%11 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %9, ptr noundef nonnull %3, i32 noundef %10) #3
%12 = icmp eq i32 %11, 0
br i1 %12, label %128, label %13
13: ; preds = %2
%14 = load i64, ptr %3, align 8, !tbaa !14
%15 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 8
store i64 %14, ptr %15, align 8, !tbaa !16
%16 = load ptr, ptr %0, align 8, !tbaa !5
%17 = load i32, ptr %16, align 4, !tbaa !10
%18 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_MIME_TYPE_LENGTH_LEN, align 4, !tbaa !13
%19 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %17, ptr noundef nonnull %3, i32 noundef %18) #3
%20 = icmp eq i32 %19, 0
br i1 %20, label %128, label %21
21: ; preds = %13
%22 = load i64, ptr %3, align 8, !tbaa !14
%23 = call i64 @safe_malloc_add_2op_(i64 noundef %22, i32 noundef 1) #3
%24 = inttoptr i64 %23 to ptr
store ptr %24, ptr %1, align 8, !tbaa !18
%25 = icmp eq i64 %23, 0
br i1 %25, label %26, label %30
26: ; preds = %21
%27 = load ptr, ptr @FLAC__STREAM_DECODER_MEMORY_ALLOCATION_ERROR, align 8, !tbaa !19
%28 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1
%29 = load ptr, ptr %28, align 8, !tbaa !20
store ptr %27, ptr %29, align 8, !tbaa !21
br label %128
30: ; preds = %21
%31 = load i64, ptr %3, align 8, !tbaa !14
%32 = icmp eq i64 %31, 0
br i1 %32, label %41, label %33
33: ; preds = %30
%34 = load ptr, ptr %0, align 8, !tbaa !5
%35 = load i32, ptr %34, align 4, !tbaa !10
%36 = call i32 @FLAC__bitreader_read_byte_block_aligned_no_crc(i32 noundef %35, ptr noundef nonnull %24, i64 noundef %31) #3
%37 = icmp eq i32 %36, 0
br i1 %37, label %128, label %38
38: ; preds = %33
%39 = load ptr, ptr %1, align 8, !tbaa !18
%40 = load i64, ptr %3, align 8, !tbaa !14
br label %41
41: ; preds = %38, %30
%42 = phi i64 [ %40, %38 ], [ 0, %30 ]
%43 = phi ptr [ %39, %38 ], [ %24, %30 ]
%44 = getelementptr inbounds i8, ptr %43, i64 %42
store i8 0, ptr %44, align 1, !tbaa !23
%45 = load ptr, ptr %0, align 8, !tbaa !5
%46 = load i32, ptr %45, align 4, !tbaa !10
%47 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_DESCRIPTION_LENGTH_LEN, align 4, !tbaa !13
%48 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %46, ptr noundef nonnull %3, i32 noundef %47) #3
%49 = icmp eq i32 %48, 0
br i1 %49, label %128, label %50
50: ; preds = %41
%51 = load i64, ptr %3, align 8, !tbaa !14
%52 = call i64 @safe_malloc_add_2op_(i64 noundef %51, i32 noundef 1) #3
%53 = inttoptr i64 %52 to ptr
%54 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 1
store ptr %53, ptr %54, align 8, !tbaa !24
%55 = icmp eq i64 %52, 0
br i1 %55, label %56, label %60
56: ; preds = %50
%57 = load ptr, ptr @FLAC__STREAM_DECODER_MEMORY_ALLOCATION_ERROR, align 8, !tbaa !19
%58 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1
%59 = load ptr, ptr %58, align 8, !tbaa !20
store ptr %57, ptr %59, align 8, !tbaa !21
br label %128
60: ; preds = %50
%61 = load i64, ptr %3, align 8, !tbaa !14
%62 = icmp eq i64 %61, 0
br i1 %62, label %71, label %63
63: ; preds = %60
%64 = load ptr, ptr %0, align 8, !tbaa !5
%65 = load i32, ptr %64, align 4, !tbaa !10
%66 = call i32 @FLAC__bitreader_read_byte_block_aligned_no_crc(i32 noundef %65, ptr noundef nonnull %53, i64 noundef %61) #3
%67 = icmp eq i32 %66, 0
br i1 %67, label %128, label %68
68: ; preds = %63
%69 = load ptr, ptr %54, align 8, !tbaa !24
%70 = load i64, ptr %3, align 8, !tbaa !14
br label %71
71: ; preds = %68, %60
%72 = phi i64 [ %70, %68 ], [ 0, %60 ]
%73 = phi ptr [ %69, %68 ], [ %53, %60 ]
%74 = getelementptr inbounds i8, ptr %73, i64 %72
store i8 0, ptr %74, align 1, !tbaa !23
%75 = load ptr, ptr %0, align 8, !tbaa !5
%76 = load i32, ptr %75, align 4, !tbaa !10
%77 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 2
%78 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_WIDTH_LEN, align 4, !tbaa !13
%79 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %76, ptr noundef nonnull %77, i32 noundef %78) #3
%80 = icmp eq i32 %79, 0
br i1 %80, label %128, label %81
81: ; preds = %71
%82 = load ptr, ptr %0, align 8, !tbaa !5
%83 = load i32, ptr %82, align 4, !tbaa !10
%84 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 3
%85 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_HEIGHT_LEN, align 4, !tbaa !13
%86 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %83, ptr noundef nonnull %84, i32 noundef %85) #3
%87 = icmp eq i32 %86, 0
br i1 %87, label %128, label %88
88: ; preds = %81
%89 = load ptr, ptr %0, align 8, !tbaa !5
%90 = load i32, ptr %89, align 4, !tbaa !10
%91 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 4
%92 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_DEPTH_LEN, align 4, !tbaa !13
%93 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %90, ptr noundef nonnull %91, i32 noundef %92) #3
%94 = icmp eq i32 %93, 0
br i1 %94, label %128, label %95
95: ; preds = %88
%96 = load ptr, ptr %0, align 8, !tbaa !5
%97 = load i32, ptr %96, align 4, !tbaa !10
%98 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 5
%99 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_COLORS_LEN, align 4, !tbaa !13
%100 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %97, ptr noundef nonnull %98, i32 noundef %99) #3
%101 = icmp eq i32 %100, 0
br i1 %101, label %128, label %102
102: ; preds = %95
%103 = load ptr, ptr %0, align 8, !tbaa !5
%104 = load i32, ptr %103, align 4, !tbaa !10
%105 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 6
%106 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_DATA_LENGTH_LEN, align 4, !tbaa !13
%107 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %104, ptr noundef nonnull %105, i32 noundef %106) #3
%108 = icmp eq i32 %107, 0
br i1 %108, label %128, label %109
109: ; preds = %102
%110 = load i64, ptr %105, align 8, !tbaa !25
%111 = call i64 @safe_malloc_(i64 noundef %110) #3
%112 = inttoptr i64 %111 to ptr
%113 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 7
store ptr %112, ptr %113, align 8, !tbaa !26
%114 = icmp eq i64 %111, 0
br i1 %114, label %115, label %119
115: ; preds = %109
%116 = load ptr, ptr @FLAC__STREAM_DECODER_MEMORY_ALLOCATION_ERROR, align 8, !tbaa !19
%117 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1
%118 = load ptr, ptr %117, align 8, !tbaa !20
store ptr %116, ptr %118, align 8, !tbaa !21
br label %128
119: ; preds = %109
%120 = load i64, ptr %105, align 8, !tbaa !25
%121 = icmp eq i64 %120, 0
br i1 %121, label %127, label %122
122: ; preds = %119
%123 = load ptr, ptr %0, align 8, !tbaa !5
%124 = load i32, ptr %123, align 4, !tbaa !10
%125 = call i32 @FLAC__bitreader_read_byte_block_aligned_no_crc(i32 noundef %124, ptr noundef nonnull %112, i64 noundef %120) #3
%126 = icmp eq i32 %125, 0
br i1 %126, label %128, label %127
127: ; preds = %122, %119
br label %128
128: ; preds = %122, %102, %95, %88, %81, %71, %63, %41, %33, %13, %2, %127, %115, %56, %26
%129 = phi i32 [ 0, %26 ], [ 0, %56 ], [ 0, %115 ], [ 1, %127 ], [ 0, %2 ], [ 0, %13 ], [ 0, %33 ], [ 0, %41 ], [ 0, %63 ], [ 0, %71 ], [ 0, %81 ], [ 0, %88 ], [ 0, %95 ], [ 0, %102 ], [ 0, %122 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %129
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @FLAC__ASSERT(i32 noundef) local_unnamed_addr #2
declare i32 @FLAC__bitreader_is_consumed_byte_aligned(i32 noundef) local_unnamed_addr #2
declare i32 @FLAC__bitreader_read_raw_uint32(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @safe_malloc_add_2op_(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @FLAC__bitreader_read_byte_block_aligned_no_crc(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @safe_malloc_(i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_10__", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_8__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!17, !15, i64 64}
!17 = !{!"TYPE_9__", !7, i64 0, !7, i64 8, !15, i64 16, !15, i64 24, !15, i64 32, !15, i64 40, !15, i64 48, !7, i64 56, !15, i64 64}
!18 = !{!17, !7, i64 0}
!19 = !{!7, !7, i64 0}
!20 = !{!6, !7, i64 8}
!21 = !{!22, !7, i64 0}
!22 = !{!"TYPE_7__", !7, i64 0}
!23 = !{!8, !8, i64 0}
!24 = !{!17, !7, i64 8}
!25 = !{!17, !15, i64 48}
!26 = !{!17, !7, i64 56}
|
; ModuleID = 'AnghaBench/RetroArch/deps/libFLAC/extr_stream_decoder.c_read_metadata_picture_.c'
source_filename = "AnghaBench/RetroArch/deps/libFLAC/extr_stream_decoder.c_read_metadata_picture_.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FLAC__STREAM_METADATA_PICTURE_TYPE_LEN = common local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_MIME_TYPE_LENGTH_LEN = common local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_DECODER_MEMORY_ALLOCATION_ERROR = common local_unnamed_addr global ptr null, align 8
@FLAC__STREAM_METADATA_PICTURE_DESCRIPTION_LENGTH_LEN = common local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_WIDTH_LEN = common local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_HEIGHT_LEN = common local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_DEPTH_LEN = common local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_COLORS_LEN = common local_unnamed_addr global i32 0, align 4
@FLAC__STREAM_METADATA_PICTURE_DATA_LENGTH_LEN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @read_metadata_picture_(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = tail call i32 @FLAC__bitreader_is_consumed_byte_aligned(i32 noundef %5) #3
%7 = tail call i32 @FLAC__ASSERT(i32 noundef %6) #3
%8 = load ptr, ptr %0, align 8, !tbaa !6
%9 = load i32, ptr %8, align 4, !tbaa !11
%10 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_TYPE_LEN, align 4, !tbaa !14
%11 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %9, ptr noundef nonnull %3, i32 noundef %10) #3
%12 = icmp eq i32 %11, 0
br i1 %12, label %128, label %13
13: ; preds = %2
%14 = load i64, ptr %3, align 8, !tbaa !15
%15 = getelementptr inbounds i8, ptr %1, i64 64
store i64 %14, ptr %15, align 8, !tbaa !17
%16 = load ptr, ptr %0, align 8, !tbaa !6
%17 = load i32, ptr %16, align 4, !tbaa !11
%18 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_MIME_TYPE_LENGTH_LEN, align 4, !tbaa !14
%19 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %17, ptr noundef nonnull %3, i32 noundef %18) #3
%20 = icmp eq i32 %19, 0
br i1 %20, label %128, label %21
21: ; preds = %13
%22 = load i64, ptr %3, align 8, !tbaa !15
%23 = call i64 @safe_malloc_add_2op_(i64 noundef %22, i32 noundef 1) #3
%24 = inttoptr i64 %23 to ptr
store ptr %24, ptr %1, align 8, !tbaa !19
%25 = icmp eq i64 %23, 0
br i1 %25, label %26, label %30
26: ; preds = %21
%27 = load ptr, ptr @FLAC__STREAM_DECODER_MEMORY_ALLOCATION_ERROR, align 8, !tbaa !20
%28 = getelementptr inbounds i8, ptr %0, i64 8
%29 = load ptr, ptr %28, align 8, !tbaa !21
store ptr %27, ptr %29, align 8, !tbaa !22
br label %128
30: ; preds = %21
%31 = load i64, ptr %3, align 8, !tbaa !15
%32 = icmp eq i64 %31, 0
br i1 %32, label %41, label %33
33: ; preds = %30
%34 = load ptr, ptr %0, align 8, !tbaa !6
%35 = load i32, ptr %34, align 4, !tbaa !11
%36 = call i32 @FLAC__bitreader_read_byte_block_aligned_no_crc(i32 noundef %35, ptr noundef nonnull %24, i64 noundef %31) #3
%37 = icmp eq i32 %36, 0
br i1 %37, label %128, label %38
38: ; preds = %33
%39 = load ptr, ptr %1, align 8, !tbaa !19
%40 = load i64, ptr %3, align 8, !tbaa !15
br label %41
41: ; preds = %38, %30
%42 = phi i64 [ %40, %38 ], [ 0, %30 ]
%43 = phi ptr [ %39, %38 ], [ %24, %30 ]
%44 = getelementptr inbounds i8, ptr %43, i64 %42
store i8 0, ptr %44, align 1, !tbaa !24
%45 = load ptr, ptr %0, align 8, !tbaa !6
%46 = load i32, ptr %45, align 4, !tbaa !11
%47 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_DESCRIPTION_LENGTH_LEN, align 4, !tbaa !14
%48 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %46, ptr noundef nonnull %3, i32 noundef %47) #3
%49 = icmp eq i32 %48, 0
br i1 %49, label %128, label %50
50: ; preds = %41
%51 = load i64, ptr %3, align 8, !tbaa !15
%52 = call i64 @safe_malloc_add_2op_(i64 noundef %51, i32 noundef 1) #3
%53 = inttoptr i64 %52 to ptr
%54 = getelementptr inbounds i8, ptr %1, i64 8
store ptr %53, ptr %54, align 8, !tbaa !25
%55 = icmp eq i64 %52, 0
br i1 %55, label %56, label %60
56: ; preds = %50
%57 = load ptr, ptr @FLAC__STREAM_DECODER_MEMORY_ALLOCATION_ERROR, align 8, !tbaa !20
%58 = getelementptr inbounds i8, ptr %0, i64 8
%59 = load ptr, ptr %58, align 8, !tbaa !21
store ptr %57, ptr %59, align 8, !tbaa !22
br label %128
60: ; preds = %50
%61 = load i64, ptr %3, align 8, !tbaa !15
%62 = icmp eq i64 %61, 0
br i1 %62, label %71, label %63
63: ; preds = %60
%64 = load ptr, ptr %0, align 8, !tbaa !6
%65 = load i32, ptr %64, align 4, !tbaa !11
%66 = call i32 @FLAC__bitreader_read_byte_block_aligned_no_crc(i32 noundef %65, ptr noundef nonnull %53, i64 noundef %61) #3
%67 = icmp eq i32 %66, 0
br i1 %67, label %128, label %68
68: ; preds = %63
%69 = load ptr, ptr %54, align 8, !tbaa !25
%70 = load i64, ptr %3, align 8, !tbaa !15
br label %71
71: ; preds = %68, %60
%72 = phi i64 [ %70, %68 ], [ 0, %60 ]
%73 = phi ptr [ %69, %68 ], [ %53, %60 ]
%74 = getelementptr inbounds i8, ptr %73, i64 %72
store i8 0, ptr %74, align 1, !tbaa !24
%75 = load ptr, ptr %0, align 8, !tbaa !6
%76 = load i32, ptr %75, align 4, !tbaa !11
%77 = getelementptr inbounds i8, ptr %1, i64 16
%78 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_WIDTH_LEN, align 4, !tbaa !14
%79 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %76, ptr noundef nonnull %77, i32 noundef %78) #3
%80 = icmp eq i32 %79, 0
br i1 %80, label %128, label %81
81: ; preds = %71
%82 = load ptr, ptr %0, align 8, !tbaa !6
%83 = load i32, ptr %82, align 4, !tbaa !11
%84 = getelementptr inbounds i8, ptr %1, i64 24
%85 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_HEIGHT_LEN, align 4, !tbaa !14
%86 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %83, ptr noundef nonnull %84, i32 noundef %85) #3
%87 = icmp eq i32 %86, 0
br i1 %87, label %128, label %88
88: ; preds = %81
%89 = load ptr, ptr %0, align 8, !tbaa !6
%90 = load i32, ptr %89, align 4, !tbaa !11
%91 = getelementptr inbounds i8, ptr %1, i64 32
%92 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_DEPTH_LEN, align 4, !tbaa !14
%93 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %90, ptr noundef nonnull %91, i32 noundef %92) #3
%94 = icmp eq i32 %93, 0
br i1 %94, label %128, label %95
95: ; preds = %88
%96 = load ptr, ptr %0, align 8, !tbaa !6
%97 = load i32, ptr %96, align 4, !tbaa !11
%98 = getelementptr inbounds i8, ptr %1, i64 40
%99 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_COLORS_LEN, align 4, !tbaa !14
%100 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %97, ptr noundef nonnull %98, i32 noundef %99) #3
%101 = icmp eq i32 %100, 0
br i1 %101, label %128, label %102
102: ; preds = %95
%103 = load ptr, ptr %0, align 8, !tbaa !6
%104 = load i32, ptr %103, align 4, !tbaa !11
%105 = getelementptr inbounds i8, ptr %1, i64 48
%106 = load i32, ptr @FLAC__STREAM_METADATA_PICTURE_DATA_LENGTH_LEN, align 4, !tbaa !14
%107 = call i32 @FLAC__bitreader_read_raw_uint32(i32 noundef %104, ptr noundef nonnull %105, i32 noundef %106) #3
%108 = icmp eq i32 %107, 0
br i1 %108, label %128, label %109
109: ; preds = %102
%110 = load i64, ptr %105, align 8, !tbaa !26
%111 = call i64 @safe_malloc_(i64 noundef %110) #3
%112 = inttoptr i64 %111 to ptr
%113 = getelementptr inbounds i8, ptr %1, i64 56
store ptr %112, ptr %113, align 8, !tbaa !27
%114 = icmp eq i64 %111, 0
br i1 %114, label %115, label %119
115: ; preds = %109
%116 = load ptr, ptr @FLAC__STREAM_DECODER_MEMORY_ALLOCATION_ERROR, align 8, !tbaa !20
%117 = getelementptr inbounds i8, ptr %0, i64 8
%118 = load ptr, ptr %117, align 8, !tbaa !21
store ptr %116, ptr %118, align 8, !tbaa !22
br label %128
119: ; preds = %109
%120 = load i64, ptr %105, align 8, !tbaa !26
%121 = icmp eq i64 %120, 0
br i1 %121, label %127, label %122
122: ; preds = %119
%123 = load ptr, ptr %0, align 8, !tbaa !6
%124 = load i32, ptr %123, align 4, !tbaa !11
%125 = call i32 @FLAC__bitreader_read_byte_block_aligned_no_crc(i32 noundef %124, ptr noundef nonnull %112, i64 noundef %120) #3
%126 = icmp eq i32 %125, 0
br i1 %126, label %128, label %127
127: ; preds = %122, %119
br label %128
128: ; preds = %122, %102, %95, %88, %81, %71, %63, %41, %33, %13, %2, %127, %115, %56, %26
%129 = phi i32 [ 0, %26 ], [ 0, %56 ], [ 0, %115 ], [ 1, %127 ], [ 0, %2 ], [ 0, %13 ], [ 0, %33 ], [ 0, %41 ], [ 0, %63 ], [ 0, %71 ], [ 0, %81 ], [ 0, %88 ], [ 0, %95 ], [ 0, %102 ], [ 0, %122 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %129
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @FLAC__ASSERT(i32 noundef) local_unnamed_addr #2
declare i32 @FLAC__bitreader_is_consumed_byte_aligned(i32 noundef) local_unnamed_addr #2
declare i32 @FLAC__bitreader_read_raw_uint32(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @safe_malloc_add_2op_(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @FLAC__bitreader_read_byte_block_aligned_no_crc(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @safe_malloc_(i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_10__", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_8__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !9, i64 0}
!17 = !{!18, !16, i64 64}
!18 = !{!"TYPE_9__", !8, i64 0, !8, i64 8, !16, i64 16, !16, i64 24, !16, i64 32, !16, i64 40, !16, i64 48, !8, i64 56, !16, i64 64}
!19 = !{!18, !8, i64 0}
!20 = !{!8, !8, i64 0}
!21 = !{!7, !8, i64 8}
!22 = !{!23, !8, i64 0}
!23 = !{!"TYPE_7__", !8, i64 0}
!24 = !{!9, !9, i64 0}
!25 = !{!18, !8, i64 8}
!26 = !{!18, !16, i64 48}
!27 = !{!18, !8, i64 56}
|
RetroArch_deps_libFLAC_extr_stream_decoder.c_read_metadata_picture_
|
; ModuleID = 'AnghaBench/linux/drivers/misc/lkdtm/extr_bugs.c_lkdtm_UNALIGNED_LOAD_STORE_WRITE.c'
source_filename = "AnghaBench/linux/drivers/misc/lkdtm/extr_bugs.c_lkdtm_UNALIGNED_LOAD_STORE_WRITE.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@lkdtm_UNALIGNED_LOAD_STORE_WRITE.data.0 = internal unnamed_addr global i32 2, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @lkdtm_UNALIGNED_LOAD_STORE_WRITE() local_unnamed_addr #0 {
%1 = load i32, ptr @lkdtm_UNALIGNED_LOAD_STORE_WRITE.data.0, align 4, !tbaa !5
%2 = icmp eq i32 %1, 0
%3 = select i1 %2, i32 -2023406815, i32 305419896
store i32 %3, ptr @lkdtm_UNALIGNED_LOAD_STORE_WRITE.data.0, align 4, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/misc/lkdtm/extr_bugs.c_lkdtm_UNALIGNED_LOAD_STORE_WRITE.c'
source_filename = "AnghaBench/linux/drivers/misc/lkdtm/extr_bugs.c_lkdtm_UNALIGNED_LOAD_STORE_WRITE.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@lkdtm_UNALIGNED_LOAD_STORE_WRITE.data.0 = internal unnamed_addr global i32 2, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync)
define void @lkdtm_UNALIGNED_LOAD_STORE_WRITE() local_unnamed_addr #0 {
%1 = load i32, ptr @lkdtm_UNALIGNED_LOAD_STORE_WRITE.data.0, align 4, !tbaa !6
%2 = icmp eq i32 %1, 0
%3 = select i1 %2, i32 -2023406815, i32 305419896
store i32 %3, ptr @lkdtm_UNALIGNED_LOAD_STORE_WRITE.data.0, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_misc_lkdtm_extr_bugs.c_lkdtm_UNALIGNED_LOAD_STORE_WRITE
|
; ModuleID = 'AnghaBench/linux/drivers/media/dvb-core/extr_dvb_net.c_dvb_net_set_mac.c'
source_filename = "AnghaBench/linux/drivers/media/dvb-core/extr_dvb_net.c_dvb_net_set_mac.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.net_device = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @dvb_net_set_mac], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @dvb_net_set_mac(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = getelementptr inbounds %struct.net_device, ptr %0, i64 0, i32 1
%5 = load i32, ptr %4, align 4, !tbaa !5
%6 = load i32, ptr %1, align 4, !tbaa !10
%7 = load i32, ptr %0, align 4, !tbaa !12
%8 = tail call i32 @memcpy(i32 noundef %5, i32 noundef %6, i32 noundef %7) #2
%9 = tail call i64 @netif_running(ptr noundef nonnull %0) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = tail call i32 @schedule_work(ptr noundef %3) #2
br label %13
13: ; preds = %11, %2
ret i32 0
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @netif_running(ptr noundef) local_unnamed_addr #1
declare i32 @schedule_work(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"net_device", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"sockaddr", !7, i64 0}
!12 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/media/dvb-core/extr_dvb_net.c_dvb_net_set_mac.c'
source_filename = "AnghaBench/linux/drivers/media/dvb-core/extr_dvb_net.c_dvb_net_set_mac.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dvb_net_set_mac], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @dvb_net_set_mac(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = getelementptr inbounds i8, ptr %0, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !6
%6 = load i32, ptr %1, align 4, !tbaa !11
%7 = load i32, ptr %0, align 4, !tbaa !13
%8 = tail call i32 @memcpy(i32 noundef %5, i32 noundef %6, i32 noundef %7) #2
%9 = tail call i64 @netif_running(ptr noundef nonnull %0) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = tail call i32 @schedule_work(ptr noundef %3) #2
br label %13
13: ; preds = %11, %2
ret i32 0
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @netif_running(ptr noundef) local_unnamed_addr #1
declare i32 @schedule_work(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"net_device", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"sockaddr", !8, i64 0}
!13 = !{!7, !8, i64 0}
|
linux_drivers_media_dvb-core_extr_dvb_net.c_dvb_net_set_mac
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/game/extr_g_syscalls.c_trap_BotLibTest.c'
source_filename = "AnghaBench/Quake-III-Arena/code/game/extr_g_syscalls.c_trap_BotLibTest.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BOTLIB_TEST = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @trap_BotLibTest(i32 noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @BOTLIB_TEST, align 4, !tbaa !5
%6 = tail call i32 @syscall(i32 noundef %5, i32 noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #2
ret i32 %6
}
declare i32 @syscall(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/game/extr_g_syscalls.c_trap_BotLibTest.c'
source_filename = "AnghaBench/Quake-III-Arena/code/game/extr_g_syscalls.c_trap_BotLibTest.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BOTLIB_TEST = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @trap_BotLibTest(i32 noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @BOTLIB_TEST, align 4, !tbaa !6
%6 = tail call i32 @syscall(i32 noundef %5, i32 noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #2
ret i32 %6
}
declare i32 @syscall(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
Quake-III-Arena_code_game_extr_g_syscalls.c_trap_BotLibTest
|
; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/hx509/extr_hxtool.c_print_certificate.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/hx509/extr_hxtool.c_print_certificate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [23 x i8] c" friendly name: %s\0A\00", align 1
@.str.1 = private unnamed_addr constant [21 x i8] c" private key: %s\0A\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"yes\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"no\00", align 1
@.str.4 = private unnamed_addr constant [21 x i8] c"failed to print cert\00", align 1
@hx509_print_stdout = dso_local local_unnamed_addr global i32 0, align 4
@stdout = dso_local local_unnamed_addr global i32 0, align 4
@HX509_VALIDATE_F_VALIDATE = dso_local local_unnamed_addr global i32 0, align 4
@HX509_VALIDATE_F_VERBOSE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @print_certificate], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @print_certificate(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = alloca i32, align 4
%5 = tail call ptr @hx509_cert_get_friendly_name(i32 noundef %1) #3
%6 = icmp eq ptr %5, null
br i1 %6, label %9, label %7
7: ; preds = %3
%8 = tail call i32 @printf(ptr noundef nonnull @.str, ptr noundef nonnull %5) #3
br label %9
9: ; preds = %7, %3
%10 = tail call i64 @_hx509_cert_private_key(i32 noundef %1) #3
%11 = icmp eq i64 %10, 0
%12 = select i1 %11, ptr @.str.3, ptr @.str.2
%13 = tail call i32 @printf(ptr noundef nonnull @.str.1, ptr noundef nonnull %12) #3
%14 = tail call i32 @hx509_print_cert(i32 noundef %0, i32 noundef %1, ptr noundef null) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %9
%17 = tail call i32 @errx(i32 noundef 1, ptr noundef nonnull @.str.4) #3
br label %18
18: ; preds = %16, %9
%19 = icmp eq i32 %2, 0
br i1 %19, label %36, label %20
20: ; preds = %18
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%21 = call i32 @hx509_validate_ctx_init(i32 noundef %0, ptr noundef nonnull %4) #3
%22 = load i32, ptr %4, align 4, !tbaa !5
%23 = load i32, ptr @hx509_print_stdout, align 4, !tbaa !5
%24 = load i32, ptr @stdout, align 4, !tbaa !5
%25 = call i32 @hx509_validate_ctx_set_print(i32 noundef %22, i32 noundef %23, i32 noundef %24) #3
%26 = load i32, ptr %4, align 4, !tbaa !5
%27 = load i32, ptr @HX509_VALIDATE_F_VALIDATE, align 4, !tbaa !5
%28 = call i32 @hx509_validate_ctx_add_flags(i32 noundef %26, i32 noundef %27) #3
%29 = load i32, ptr %4, align 4, !tbaa !5
%30 = load i32, ptr @HX509_VALIDATE_F_VERBOSE, align 4, !tbaa !5
%31 = call i32 @hx509_validate_ctx_add_flags(i32 noundef %29, i32 noundef %30) #3
%32 = load i32, ptr %4, align 4, !tbaa !5
%33 = call i32 @hx509_validate_cert(i32 noundef %0, i32 noundef %32, i32 noundef %1) #3
%34 = load i32, ptr %4, align 4, !tbaa !5
%35 = call i32 @hx509_validate_ctx_free(i32 noundef %34) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
br label %36
36: ; preds = %20, %18
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @hx509_cert_get_friendly_name(i32 noundef) local_unnamed_addr #2
declare i32 @printf(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @_hx509_cert_private_key(i32 noundef) local_unnamed_addr #2
declare i32 @hx509_print_cert(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @errx(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @hx509_validate_ctx_init(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @hx509_validate_ctx_set_print(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hx509_validate_ctx_add_flags(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hx509_validate_cert(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hx509_validate_ctx_free(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/hx509/extr_hxtool.c_print_certificate.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/hx509/extr_hxtool.c_print_certificate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [23 x i8] c" friendly name: %s\0A\00", align 1
@.str.1 = private unnamed_addr constant [21 x i8] c" private key: %s\0A\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"yes\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"no\00", align 1
@.str.4 = private unnamed_addr constant [21 x i8] c"failed to print cert\00", align 1
@hx509_print_stdout = common local_unnamed_addr global i32 0, align 4
@stdout = common local_unnamed_addr global i32 0, align 4
@HX509_VALIDATE_F_VALIDATE = common local_unnamed_addr global i32 0, align 4
@HX509_VALIDATE_F_VERBOSE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @print_certificate], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @print_certificate(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = alloca i32, align 4
%5 = tail call ptr @hx509_cert_get_friendly_name(i32 noundef %1) #3
%6 = icmp eq ptr %5, null
br i1 %6, label %9, label %7
7: ; preds = %3
%8 = tail call i32 @printf(ptr noundef nonnull @.str, ptr noundef nonnull %5) #3
br label %9
9: ; preds = %7, %3
%10 = tail call i64 @_hx509_cert_private_key(i32 noundef %1) #3
%11 = icmp eq i64 %10, 0
%12 = select i1 %11, ptr @.str.3, ptr @.str.2
%13 = tail call i32 @printf(ptr noundef nonnull @.str.1, ptr noundef nonnull %12) #3
%14 = tail call i32 @hx509_print_cert(i32 noundef %0, i32 noundef %1, ptr noundef null) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %9
%17 = tail call i32 @errx(i32 noundef 1, ptr noundef nonnull @.str.4) #3
br label %18
18: ; preds = %16, %9
%19 = icmp eq i32 %2, 0
br i1 %19, label %36, label %20
20: ; preds = %18
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%21 = call i32 @hx509_validate_ctx_init(i32 noundef %0, ptr noundef nonnull %4) #3
%22 = load i32, ptr %4, align 4, !tbaa !6
%23 = load i32, ptr @hx509_print_stdout, align 4, !tbaa !6
%24 = load i32, ptr @stdout, align 4, !tbaa !6
%25 = call i32 @hx509_validate_ctx_set_print(i32 noundef %22, i32 noundef %23, i32 noundef %24) #3
%26 = load i32, ptr %4, align 4, !tbaa !6
%27 = load i32, ptr @HX509_VALIDATE_F_VALIDATE, align 4, !tbaa !6
%28 = call i32 @hx509_validate_ctx_add_flags(i32 noundef %26, i32 noundef %27) #3
%29 = load i32, ptr %4, align 4, !tbaa !6
%30 = load i32, ptr @HX509_VALIDATE_F_VERBOSE, align 4, !tbaa !6
%31 = call i32 @hx509_validate_ctx_add_flags(i32 noundef %29, i32 noundef %30) #3
%32 = load i32, ptr %4, align 4, !tbaa !6
%33 = call i32 @hx509_validate_cert(i32 noundef %0, i32 noundef %32, i32 noundef %1) #3
%34 = load i32, ptr %4, align 4, !tbaa !6
%35 = call i32 @hx509_validate_ctx_free(i32 noundef %34) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
br label %36
36: ; preds = %20, %18
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @hx509_cert_get_friendly_name(i32 noundef) local_unnamed_addr #2
declare i32 @printf(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @_hx509_cert_private_key(i32 noundef) local_unnamed_addr #2
declare i32 @hx509_print_cert(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @errx(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @hx509_validate_ctx_init(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @hx509_validate_ctx_set_print(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hx509_validate_ctx_add_flags(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hx509_validate_cert(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hx509_validate_ctx_free(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_crypto_heimdal_lib_hx509_extr_hxtool.c_print_certificate
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_qla3xxx.c_ql_petbi_init.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_qla3xxx.c_ql_petbi_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ql_petbi_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ql_petbi_init(ptr noundef %0) #0 {
%2 = tail call i32 @ql_petbi_reset(ptr noundef %0) #2
%3 = tail call i32 @ql_petbi_start_neg(ptr noundef %0) #2
ret void
}
declare i32 @ql_petbi_reset(ptr noundef) local_unnamed_addr #1
declare i32 @ql_petbi_start_neg(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_qla3xxx.c_ql_petbi_init.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_qla3xxx.c_ql_petbi_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ql_petbi_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ql_petbi_init(ptr noundef %0) #0 {
%2 = tail call i32 @ql_petbi_reset(ptr noundef %0) #2
%3 = tail call i32 @ql_petbi_start_neg(ptr noundef %0) #2
ret void
}
declare i32 @ql_petbi_reset(ptr noundef) local_unnamed_addr #1
declare i32 @ql_petbi_start_neg(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_drivers_net_extr_qla3xxx.c_ql_petbi_init
|
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/usnic/extr_usnic_fwd.c_usnic_fwd_dev_ready_locked.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/usnic/extr_usnic_fwd.c_usnic_fwd_dev_ready_locked.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.usnic_fwd_dev = type { i32, i32 }
@EPERM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @usnic_fwd_dev_ready_locked], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @usnic_fwd_dev_ready_locked(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.usnic_fwd_dev, ptr %0, i64 0, i32 1
%3 = tail call i32 @lockdep_assert_held(ptr noundef nonnull %2) #2
%4 = load i32, ptr %0, align 4, !tbaa !5
%5 = icmp eq i32 %4, 0
%6 = load i32, ptr @EPERM, align 4
%7 = sub nsw i32 0, %6
%8 = select i1 %5, i32 %7, i32 0
ret i32 %8
}
declare i32 @lockdep_assert_held(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"usnic_fwd_dev", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/usnic/extr_usnic_fwd.c_usnic_fwd_dev_ready_locked.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/usnic/extr_usnic_fwd.c_usnic_fwd_dev_ready_locked.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EPERM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @usnic_fwd_dev_ready_locked], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @usnic_fwd_dev_ready_locked(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = tail call i32 @lockdep_assert_held(ptr noundef nonnull %2) #2
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = icmp eq i32 %4, 0
%6 = load i32, ptr @EPERM, align 4
%7 = sub nsw i32 0, %6
%8 = select i1 %5, i32 %7, i32 0
ret i32 %8
}
declare i32 @lockdep_assert_held(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"usnic_fwd_dev", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_infiniband_hw_usnic_extr_usnic_fwd.c_usnic_fwd_dev_ready_locked
|
; ModuleID = 'AnghaBench/zfs/module/zfs/extr_zio_inject.c_zio_handle_device_injection_impl.c'
source_filename = "AnghaBench/zfs/module/zfs/extr_zio_inject.c_zio_handle_device_injection_impl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_15__ = type { i64, i64, %struct.TYPE_12__ }
%struct.TYPE_12__ = type { i32 }
%struct.TYPE_14__ = type { i64, i32, i64, i32, i32 }
%struct.TYPE_13__ = type { i64, i64, i64, i32, i64, i32 }
@VDEV_LABEL_START_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@VDEV_LABEL_END_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@inject_lock = dso_local global i32 0, align 4
@RW_READER = dso_local local_unnamed_addr global i32 0, align 4
@inject_handlers = dso_local global i32 0, align 4
@ZINJECT_DEVICE_FAULT = dso_local local_unnamed_addr global i64 0, align 8
@ZIO_FLAG_IO_RETRY = dso_local local_unnamed_addr global i32 0, align 4
@ZIO_FLAG_TRYHARD = dso_local local_unnamed_addr global i32 0, align 4
@ZIO_TYPES = dso_local local_unnamed_addr global i64 0, align 8
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@VDEV_AUX_OPEN_FAILED = dso_local local_unnamed_addr global i32 0, align 4
@EILSEQ = dso_local local_unnamed_addr global i32 0, align 4
@zio_inject_bitflip_cb = dso_local local_unnamed_addr global i32 0, align 4
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @zio_handle_device_injection_impl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @zio_handle_device_injection_impl(ptr nocapture noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = icmp ne ptr %1, null
br i1 %5, label %6, label %15
6: ; preds = %4
%7 = load i64, ptr %1, align 8, !tbaa !5
%8 = load i64, ptr @VDEV_LABEL_START_SIZE, align 8, !tbaa !11
%9 = icmp slt i64 %7, %8
br i1 %9, label %108, label %10
10: ; preds = %6
%11 = load i64, ptr %0, align 8, !tbaa !12
%12 = load i64, ptr @VDEV_LABEL_END_SIZE, align 8, !tbaa !11
%13 = sub nsw i64 %11, %12
%14 = icmp slt i64 %7, %13
br i1 %14, label %15, label %108
15: ; preds = %10, %4
%16 = load i32, ptr @RW_READER, align 4, !tbaa !15
%17 = tail call i32 @rw_enter(ptr noundef nonnull @inject_lock, i32 noundef %16) #2
%18 = tail call ptr @list_head(ptr noundef nonnull @inject_handlers) #2
%19 = icmp eq ptr %18, null
br i1 %19, label %105, label %20
20: ; preds = %15
%21 = getelementptr inbounds %struct.TYPE_15__, ptr %0, i64 0, i32 1
%22 = icmp eq ptr %1, null
%23 = getelementptr inbounds %struct.TYPE_14__, ptr %1, i64 0, i32 1
%24 = getelementptr inbounds %struct.TYPE_14__, ptr %1, i64 0, i32 2
br label %25
25: ; preds = %20, %102
%26 = phi ptr [ %18, %20 ], [ %103, %102 ]
%27 = load i64, ptr %26, align 8, !tbaa !16
%28 = load i64, ptr @ZINJECT_DEVICE_FAULT, align 8, !tbaa !11
%29 = icmp eq i64 %27, %28
br i1 %29, label %30, label %102
30: ; preds = %25
%31 = load i64, ptr %21, align 8, !tbaa !19
%32 = getelementptr inbounds %struct.TYPE_13__, ptr %26, i64 0, i32 1
%33 = load i64, ptr %32, align 8, !tbaa !20
%34 = icmp eq i64 %31, %33
br i1 %34, label %35, label %102
35: ; preds = %30
%36 = getelementptr inbounds %struct.TYPE_13__, ptr %26, i64 0, i32 4
%37 = load i64, ptr %36, align 8, !tbaa !21
%38 = icmp eq i64 %37, 0
br i1 %38, label %47, label %39
39: ; preds = %35
br i1 %22, label %102, label %40
40: ; preds = %39
%41 = load i32, ptr %23, align 8, !tbaa !22
%42 = load i32, ptr @ZIO_FLAG_IO_RETRY, align 4, !tbaa !15
%43 = load i32, ptr @ZIO_FLAG_TRYHARD, align 4, !tbaa !15
%44 = or i32 %43, %42
%45 = and i32 %44, %41
%46 = icmp eq i32 %45, 0
br i1 %46, label %48, label %102
47: ; preds = %35
br i1 %5, label %48, label %56
48: ; preds = %40, %47
%49 = getelementptr inbounds %struct.TYPE_13__, ptr %26, i64 0, i32 2
%50 = load i64, ptr %49, align 8, !tbaa !23
%51 = load i64, ptr @ZIO_TYPES, align 8, !tbaa !11
%52 = icmp eq i64 %50, %51
br i1 %52, label %56, label %53
53: ; preds = %48
%54 = load i64, ptr %24, align 8, !tbaa !24
%55 = icmp eq i64 %50, %54
br i1 %55, label %56, label %102
56: ; preds = %53, %48, %47
%57 = getelementptr inbounds %struct.TYPE_13__, ptr %26, i64 0, i32 3
%58 = load i32, ptr %57, align 8, !tbaa !25
%59 = icmp eq i32 %58, %2
%60 = icmp eq i32 %58, %3
%61 = or i1 %59, %60
br i1 %61, label %62, label %96
62: ; preds = %56
%63 = getelementptr inbounds %struct.TYPE_13__, ptr %26, i64 0, i32 5
%64 = load i32, ptr %63, align 8, !tbaa !26
%65 = tail call i32 @freq_triggered(i32 noundef %64) #2
%66 = icmp eq i32 %65, 0
br i1 %66, label %102, label %67
67: ; preds = %62
%68 = getelementptr inbounds %struct.TYPE_13__, ptr %26, i64 0, i32 4
%69 = getelementptr inbounds %struct.TYPE_13__, ptr %26, i64 0, i32 3
%70 = load i32, ptr @ENXIO, align 4, !tbaa !15
%71 = icmp eq i32 %70, %2
br i1 %71, label %72, label %75
72: ; preds = %67
%73 = load i32, ptr @VDEV_AUX_OPEN_FAILED, align 4, !tbaa !15
%74 = getelementptr inbounds %struct.TYPE_15__, ptr %0, i64 0, i32 2
store i32 %73, ptr %74, align 8, !tbaa !27
br label %75
75: ; preds = %72, %67
%76 = load i64, ptr %68, align 8, !tbaa !21
%77 = icmp eq i64 %76, 0
%78 = and i1 %5, %77
br i1 %78, label %79, label %83
79: ; preds = %75
%80 = load i32, ptr @ZIO_FLAG_IO_RETRY, align 4, !tbaa !15
%81 = load i32, ptr %23, align 8, !tbaa !22
%82 = or i32 %81, %80
store i32 %82, ptr %23, align 8, !tbaa !22
br label %83
83: ; preds = %79, %75
%84 = load i32, ptr %69, align 8, !tbaa !25
%85 = load i32, ptr @EILSEQ, align 4, !tbaa !15
%86 = icmp ne i32 %84, %85
%87 = or i1 %86, %22
%88 = select i1 %86, i32 %84, i32 0
br i1 %87, label %105, label %89
89: ; preds = %83
%90 = getelementptr inbounds %struct.TYPE_14__, ptr %1, i64 0, i32 4
%91 = load i32, ptr %90, align 4, !tbaa !28
%92 = getelementptr inbounds %struct.TYPE_14__, ptr %1, i64 0, i32 3
%93 = load i32, ptr %92, align 8, !tbaa !29
%94 = load i32, ptr @zio_inject_bitflip_cb, align 4, !tbaa !15
%95 = tail call i32 @abd_iterate_func(i32 noundef %91, i32 noundef 0, i32 noundef %93, i32 noundef %94, ptr noundef nonnull %1) #2
br label %105
96: ; preds = %56
%97 = load i32, ptr @ENXIO, align 4, !tbaa !15
%98 = icmp eq i32 %58, %97
br i1 %98, label %99, label %102
99: ; preds = %96
%100 = load i32, ptr @EIO, align 4, !tbaa !15
%101 = tail call i32 @SET_ERROR(i32 noundef %100) #2
br label %105
102: ; preds = %30, %96, %62, %53, %39, %40, %25
%103 = tail call ptr @list_next(ptr noundef nonnull @inject_handlers, ptr noundef nonnull %26) #2
%104 = icmp eq ptr %103, null
br i1 %104, label %105, label %25, !llvm.loop !30
105: ; preds = %102, %83, %15, %99, %89
%106 = phi i32 [ 0, %89 ], [ %101, %99 ], [ %88, %83 ], [ 0, %15 ], [ 0, %102 ]
%107 = tail call i32 @rw_exit(ptr noundef nonnull @inject_lock) #2
br label %108
108: ; preds = %10, %6, %105
%109 = phi i32 [ %106, %105 ], [ 0, %6 ], [ 0, %10 ]
ret i32 %109
}
declare i32 @rw_enter(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @list_head(ptr noundef) local_unnamed_addr #1
declare i32 @freq_triggered(i32 noundef) local_unnamed_addr #1
declare i32 @abd_iterate_func(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @SET_ERROR(i32 noundef) local_unnamed_addr #1
declare ptr @list_next(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rw_exit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_14__", !7, i64 0, !10, i64 8, !7, i64 16, !10, i64 24, !10, i64 28}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_15__", !7, i64 0, !7, i64 8, !14, i64 16}
!14 = !{!"TYPE_12__", !10, i64 0}
!15 = !{!10, !10, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_16__", !18, i64 0}
!18 = !{!"TYPE_13__", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !7, i64 32, !10, i64 40}
!19 = !{!13, !7, i64 8}
!20 = !{!17, !7, i64 8}
!21 = !{!17, !7, i64 32}
!22 = !{!6, !10, i64 8}
!23 = !{!17, !7, i64 16}
!24 = !{!6, !7, i64 16}
!25 = !{!17, !10, i64 24}
!26 = !{!17, !10, i64 40}
!27 = !{!13, !10, i64 16}
!28 = !{!6, !10, i64 28}
!29 = !{!6, !10, i64 24}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/zfs/module/zfs/extr_zio_inject.c_zio_handle_device_injection_impl.c'
source_filename = "AnghaBench/zfs/module/zfs/extr_zio_inject.c_zio_handle_device_injection_impl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VDEV_LABEL_START_SIZE = common local_unnamed_addr global i64 0, align 8
@VDEV_LABEL_END_SIZE = common local_unnamed_addr global i64 0, align 8
@inject_lock = common global i32 0, align 4
@RW_READER = common local_unnamed_addr global i32 0, align 4
@inject_handlers = common global i32 0, align 4
@ZINJECT_DEVICE_FAULT = common local_unnamed_addr global i64 0, align 8
@ZIO_FLAG_IO_RETRY = common local_unnamed_addr global i32 0, align 4
@ZIO_FLAG_TRYHARD = common local_unnamed_addr global i32 0, align 4
@ZIO_TYPES = common local_unnamed_addr global i64 0, align 8
@ENXIO = common local_unnamed_addr global i32 0, align 4
@VDEV_AUX_OPEN_FAILED = common local_unnamed_addr global i32 0, align 4
@EILSEQ = common local_unnamed_addr global i32 0, align 4
@zio_inject_bitflip_cb = common local_unnamed_addr global i32 0, align 4
@EIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @zio_handle_device_injection_impl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @zio_handle_device_injection_impl(ptr nocapture noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = icmp ne ptr %1, null
br i1 %5, label %6, label %15
6: ; preds = %4
%7 = load i64, ptr %1, align 8, !tbaa !6
%8 = load i64, ptr @VDEV_LABEL_START_SIZE, align 8, !tbaa !12
%9 = icmp slt i64 %7, %8
br i1 %9, label %108, label %10
10: ; preds = %6
%11 = load i64, ptr %0, align 8, !tbaa !13
%12 = load i64, ptr @VDEV_LABEL_END_SIZE, align 8, !tbaa !12
%13 = sub nsw i64 %11, %12
%14 = icmp slt i64 %7, %13
br i1 %14, label %15, label %108
15: ; preds = %10, %4
%16 = load i32, ptr @RW_READER, align 4, !tbaa !16
%17 = tail call i32 @rw_enter(ptr noundef nonnull @inject_lock, i32 noundef %16) #2
%18 = tail call ptr @list_head(ptr noundef nonnull @inject_handlers) #2
%19 = icmp eq ptr %18, null
br i1 %19, label %105, label %20
20: ; preds = %15
%21 = getelementptr inbounds i8, ptr %0, i64 8
%22 = icmp eq ptr %1, null
%23 = getelementptr inbounds i8, ptr %1, i64 8
%24 = getelementptr inbounds i8, ptr %1, i64 16
br label %25
25: ; preds = %20, %102
%26 = phi ptr [ %18, %20 ], [ %103, %102 ]
%27 = load i64, ptr %26, align 8, !tbaa !17
%28 = load i64, ptr @ZINJECT_DEVICE_FAULT, align 8, !tbaa !12
%29 = icmp eq i64 %27, %28
br i1 %29, label %30, label %102
30: ; preds = %25
%31 = load i64, ptr %21, align 8, !tbaa !20
%32 = getelementptr inbounds i8, ptr %26, i64 8
%33 = load i64, ptr %32, align 8, !tbaa !21
%34 = icmp eq i64 %31, %33
br i1 %34, label %35, label %102
35: ; preds = %30
%36 = getelementptr inbounds i8, ptr %26, i64 32
%37 = load i64, ptr %36, align 8, !tbaa !22
%38 = icmp eq i64 %37, 0
br i1 %38, label %47, label %39
39: ; preds = %35
br i1 %22, label %102, label %40
40: ; preds = %39
%41 = load i32, ptr %23, align 8, !tbaa !23
%42 = load i32, ptr @ZIO_FLAG_IO_RETRY, align 4, !tbaa !16
%43 = load i32, ptr @ZIO_FLAG_TRYHARD, align 4, !tbaa !16
%44 = or i32 %43, %42
%45 = and i32 %44, %41
%46 = icmp eq i32 %45, 0
br i1 %46, label %48, label %102
47: ; preds = %35
br i1 %5, label %48, label %56
48: ; preds = %40, %47
%49 = getelementptr inbounds i8, ptr %26, i64 16
%50 = load i64, ptr %49, align 8, !tbaa !24
%51 = load i64, ptr @ZIO_TYPES, align 8, !tbaa !12
%52 = icmp eq i64 %50, %51
br i1 %52, label %56, label %53
53: ; preds = %48
%54 = load i64, ptr %24, align 8, !tbaa !25
%55 = icmp eq i64 %50, %54
br i1 %55, label %56, label %102
56: ; preds = %53, %48, %47
%57 = getelementptr inbounds i8, ptr %26, i64 24
%58 = load i32, ptr %57, align 8, !tbaa !26
%59 = icmp eq i32 %58, %2
%60 = icmp eq i32 %58, %3
%61 = or i1 %59, %60
br i1 %61, label %62, label %96
62: ; preds = %56
%63 = getelementptr inbounds i8, ptr %26, i64 40
%64 = load i32, ptr %63, align 8, !tbaa !27
%65 = tail call i32 @freq_triggered(i32 noundef %64) #2
%66 = icmp eq i32 %65, 0
br i1 %66, label %102, label %67
67: ; preds = %62
%68 = getelementptr inbounds i8, ptr %26, i64 32
%69 = getelementptr inbounds i8, ptr %26, i64 24
%70 = load i32, ptr @ENXIO, align 4, !tbaa !16
%71 = icmp eq i32 %70, %2
br i1 %71, label %72, label %75
72: ; preds = %67
%73 = load i32, ptr @VDEV_AUX_OPEN_FAILED, align 4, !tbaa !16
%74 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %73, ptr %74, align 8, !tbaa !28
br label %75
75: ; preds = %72, %67
%76 = load i64, ptr %68, align 8, !tbaa !22
%77 = icmp eq i64 %76, 0
%78 = and i1 %5, %77
br i1 %78, label %79, label %83
79: ; preds = %75
%80 = load i32, ptr @ZIO_FLAG_IO_RETRY, align 4, !tbaa !16
%81 = load i32, ptr %23, align 8, !tbaa !23
%82 = or i32 %81, %80
store i32 %82, ptr %23, align 8, !tbaa !23
br label %83
83: ; preds = %79, %75
%84 = load i32, ptr %69, align 8, !tbaa !26
%85 = load i32, ptr @EILSEQ, align 4, !tbaa !16
%86 = icmp ne i32 %84, %85
%87 = or i1 %86, %22
%88 = select i1 %86, i32 %84, i32 0
br i1 %87, label %105, label %89
89: ; preds = %83
%90 = getelementptr inbounds i8, ptr %1, i64 28
%91 = load i32, ptr %90, align 4, !tbaa !29
%92 = getelementptr inbounds i8, ptr %1, i64 24
%93 = load i32, ptr %92, align 8, !tbaa !30
%94 = load i32, ptr @zio_inject_bitflip_cb, align 4, !tbaa !16
%95 = tail call i32 @abd_iterate_func(i32 noundef %91, i32 noundef 0, i32 noundef %93, i32 noundef %94, ptr noundef nonnull %1) #2
br label %105
96: ; preds = %56
%97 = load i32, ptr @ENXIO, align 4, !tbaa !16
%98 = icmp eq i32 %58, %97
br i1 %98, label %99, label %102
99: ; preds = %96
%100 = load i32, ptr @EIO, align 4, !tbaa !16
%101 = tail call i32 @SET_ERROR(i32 noundef %100) #2
br label %105
102: ; preds = %30, %96, %62, %53, %39, %40, %25
%103 = tail call ptr @list_next(ptr noundef nonnull @inject_handlers, ptr noundef nonnull %26) #2
%104 = icmp eq ptr %103, null
br i1 %104, label %105, label %25, !llvm.loop !31
105: ; preds = %102, %83, %15, %99, %89
%106 = phi i32 [ 0, %89 ], [ %101, %99 ], [ %88, %83 ], [ 0, %15 ], [ 0, %102 ]
%107 = tail call i32 @rw_exit(ptr noundef nonnull @inject_lock) #2
br label %108
108: ; preds = %10, %6, %105
%109 = phi i32 [ %106, %105 ], [ 0, %6 ], [ 0, %10 ]
ret i32 %109
}
declare i32 @rw_enter(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @list_head(ptr noundef) local_unnamed_addr #1
declare i32 @freq_triggered(i32 noundef) local_unnamed_addr #1
declare i32 @abd_iterate_func(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @SET_ERROR(i32 noundef) local_unnamed_addr #1
declare ptr @list_next(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rw_exit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_14__", !8, i64 0, !11, i64 8, !8, i64 16, !11, i64 24, !11, i64 28}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"TYPE_15__", !8, i64 0, !8, i64 8, !15, i64 16}
!15 = !{!"TYPE_12__", !11, i64 0}
!16 = !{!11, !11, i64 0}
!17 = !{!18, !8, i64 0}
!18 = !{!"TYPE_16__", !19, i64 0}
!19 = !{!"TYPE_13__", !8, i64 0, !8, i64 8, !8, i64 16, !11, i64 24, !8, i64 32, !11, i64 40}
!20 = !{!14, !8, i64 8}
!21 = !{!18, !8, i64 8}
!22 = !{!18, !8, i64 32}
!23 = !{!7, !11, i64 8}
!24 = !{!18, !8, i64 16}
!25 = !{!7, !8, i64 16}
!26 = !{!18, !11, i64 24}
!27 = !{!18, !11, i64 40}
!28 = !{!14, !11, i64 16}
!29 = !{!7, !11, i64 28}
!30 = !{!7, !11, i64 24}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
|
zfs_module_zfs_extr_zio_inject.c_zio_handle_device_injection_impl
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_team.c_UI_TeamMainMenu.c'
source_filename = "AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_team.c_UI_TeamMainMenu.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
@s_teammain = dso_local global %struct.TYPE_2__ zeroinitializer, align 4
; Function Attrs: nounwind uwtable
define dso_local void @UI_TeamMainMenu() local_unnamed_addr #0 {
%1 = tail call i32 (...) @TeamMain_MenuInit() #2
%2 = tail call i32 @UI_PushMenu(ptr noundef nonnull @s_teammain) #2
ret void
}
declare i32 @TeamMain_MenuInit(...) local_unnamed_addr #1
declare i32 @UI_PushMenu(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_team.c_UI_TeamMainMenu.c'
source_filename = "AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_team.c_UI_TeamMainMenu.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@s_teammain = common global %struct.TYPE_2__ zeroinitializer, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @UI_TeamMainMenu() local_unnamed_addr #0 {
%1 = tail call i32 @TeamMain_MenuInit() #2
%2 = tail call i32 @UI_PushMenu(ptr noundef nonnull @s_teammain) #2
ret void
}
declare i32 @TeamMain_MenuInit(...) local_unnamed_addr #1
declare i32 @UI_PushMenu(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
Quake-III-Arena_code_q3_ui_extr_ui_team.c_UI_TeamMainMenu
|
; ModuleID = 'AnghaBench/linux/drivers/base/extr_class.c_class_attr_store.c'
source_filename = "AnghaBench/linux/drivers/base/extr_class.c_class_attr_store.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @class_attr_store], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @class_attr_store(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = tail call ptr @to_class_attr(ptr noundef %1) #2
%6 = tail call ptr @to_subsys_private(ptr noundef %0) #2
%7 = load i32, ptr @EIO, align 4, !tbaa !5
%8 = sub nsw i32 0, %7
%9 = load ptr, ptr %5, align 8, !tbaa !9
%10 = icmp eq ptr %9, null
br i1 %10, label %14, label %11
11: ; preds = %4
%12 = load i32, ptr %6, align 4, !tbaa !12
%13 = tail call i32 %9(i32 noundef %12, ptr noundef nonnull %5, ptr noundef %2, i64 noundef %3) #2
br label %14
14: ; preds = %11, %4
%15 = phi i32 [ %13, %11 ], [ %8, %4 ]
ret i32 %15
}
declare ptr @to_class_attr(ptr noundef) local_unnamed_addr #1
declare ptr @to_subsys_private(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"class_attribute", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"subsys_private", !6, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/base/extr_class.c_class_attr_store.c'
source_filename = "AnghaBench/linux/drivers/base/extr_class.c_class_attr_store.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @class_attr_store], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @class_attr_store(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = tail call ptr @to_class_attr(ptr noundef %1) #2
%6 = tail call ptr @to_subsys_private(ptr noundef %0) #2
%7 = load i32, ptr @EIO, align 4, !tbaa !6
%8 = sub nsw i32 0, %7
%9 = load ptr, ptr %5, align 8, !tbaa !10
%10 = icmp eq ptr %9, null
br i1 %10, label %14, label %11
11: ; preds = %4
%12 = load i32, ptr %6, align 4, !tbaa !13
%13 = tail call i32 %9(i32 noundef %12, ptr noundef nonnull %5, ptr noundef %2, i64 noundef %3) #2
br label %14
14: ; preds = %11, %4
%15 = phi i32 [ %13, %11 ], [ %8, %4 ]
ret i32 %15
}
declare ptr @to_class_attr(ptr noundef) local_unnamed_addr #1
declare ptr @to_subsys_private(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"class_attribute", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"subsys_private", !7, i64 0}
|
linux_drivers_base_extr_class.c_class_attr_store
|
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/containers/core/extr_containers.c_vc_container_read.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/containers/core/extr_containers.c_vc_container_read.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_17__ = type { i64, i64, i64, i64, i32, i32 }
%struct.TYPE_16__ = type { i64, i64, ptr, ptr }
%struct.TYPE_14__ = type { ptr, i32 }
%struct.TYPE_15__ = type { i32, %struct.TYPE_17__, i32 }
@VC_CONTAINER_ERROR_CONTINUE = dso_local local_unnamed_addr global i64 0, align 8
@VC_CONTAINER_READ_FLAG_FORCE_TRACK = dso_local local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_READ_FLAG_SKIP = dso_local local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_ERROR_INVALID_ARGUMENT = dso_local local_unnamed_addr global i64 0, align 8
@VC_CONTAINER_READ_FLAG_INFO = dso_local local_unnamed_addr global i32 0, align 4
@VC_PACKETIZER_FLAG_INFO = dso_local local_unnamed_addr global i32 0, align 4
@VC_PACKETIZER_FLAG_SKIP = dso_local local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_SUCCESS = dso_local local_unnamed_addr global i64 0, align 8
@PACKETIZER_BUFFER_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@VC_PACKETIZER_FLAG_FORCE_RELEASE_INPUT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i64 @vc_container_read(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca ptr, align 8
%5 = load i64, ptr @VC_CONTAINER_ERROR_CONTINUE, align 8, !tbaa !5
%6 = load i32, ptr @VC_CONTAINER_READ_FLAG_FORCE_TRACK, align 4, !tbaa !9
%7 = and i32 %6, %2
%8 = icmp eq ptr %1, null
br i1 %8, label %9, label %21
9: ; preds = %3
%10 = load i32, ptr @VC_CONTAINER_READ_FLAG_SKIP, align 4, !tbaa !9
%11 = and i32 %10, %2
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = load i64, ptr @VC_CONTAINER_ERROR_INVALID_ARGUMENT, align 8, !tbaa !5
br label %187
15: ; preds = %9
%16 = load i32, ptr @VC_CONTAINER_READ_FLAG_INFO, align 4, !tbaa !9
%17 = and i32 %16, %2
%18 = icmp eq i32 %17, 0
br i1 %18, label %35, label %19
19: ; preds = %15
%20 = load i64, ptr @VC_CONTAINER_ERROR_INVALID_ARGUMENT, align 8, !tbaa !5
br label %187
21: ; preds = %3
%22 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 5
%23 = load i32, ptr %22, align 4, !tbaa !11
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %33
25: ; preds = %21
%26 = load i32, ptr @VC_CONTAINER_READ_FLAG_INFO, align 4, !tbaa !9
%27 = load i32, ptr @VC_CONTAINER_READ_FLAG_SKIP, align 4, !tbaa !9
%28 = or i32 %27, %26
%29 = and i32 %28, %2
%30 = icmp eq i32 %29, 0
br i1 %30, label %31, label %33
31: ; preds = %25
%32 = load i64, ptr @VC_CONTAINER_ERROR_INVALID_ARGUMENT, align 8, !tbaa !5
br label %187
33: ; preds = %25, %21
%34 = icmp eq i32 %7, 0
br i1 %34, label %55, label %37
35: ; preds = %15
%36 = icmp eq i32 %7, 0
br i1 %36, label %51, label %49
37: ; preds = %33
%38 = load i64, ptr %1, align 8, !tbaa !13
%39 = load i64, ptr %0, align 8, !tbaa !14
%40 = icmp ult i64 %38, %39
br i1 %40, label %41, label %49
41: ; preds = %37
%42 = getelementptr inbounds %struct.TYPE_16__, ptr %0, i64 0, i32 3
%43 = load ptr, ptr %42, align 8, !tbaa !17
%44 = getelementptr inbounds ptr, ptr %43, i64 %38
%45 = load ptr, ptr %44, align 8, !tbaa !18
%46 = getelementptr inbounds %struct.TYPE_14__, ptr %45, i64 0, i32 1
%47 = load i32, ptr %46, align 8, !tbaa !19
%48 = icmp eq i32 %47, 0
br i1 %48, label %49, label %55
49: ; preds = %35, %41, %37
%50 = load i64, ptr @VC_CONTAINER_ERROR_INVALID_ARGUMENT, align 8, !tbaa !5
br label %187
51: ; preds = %35
%52 = getelementptr inbounds %struct.TYPE_16__, ptr %0, i64 0, i32 2
%53 = load ptr, ptr %52, align 8, !tbaa !21
%54 = getelementptr inbounds %struct.TYPE_15__, ptr %53, i64 0, i32 1
br label %55
55: ; preds = %33, %41, %51
%56 = phi i1 [ true, %51 ], [ false, %41 ], [ true, %33 ]
%57 = phi ptr [ %54, %51 ], [ %1, %41 ], [ %1, %33 ]
%58 = getelementptr inbounds %struct.TYPE_16__, ptr %0, i64 0, i32 2
%59 = load ptr, ptr %58, align 8, !tbaa !21
%60 = getelementptr inbounds %struct.TYPE_15__, ptr %59, i64 0, i32 2
%61 = load i32, ptr %60, align 8, !tbaa !22
%62 = icmp eq i32 %61, 0
br i1 %62, label %63, label %65
63: ; preds = %55
%64 = tail call i64 @container_read_packet(ptr noundef nonnull %0, ptr noundef nonnull %57, i32 noundef %2) #3
br label %170
65: ; preds = %55
%66 = load i32, ptr @VC_CONTAINER_READ_FLAG_INFO, align 4, !tbaa !9
%67 = and i32 %66, %2
%68 = icmp eq i32 %67, 0
%69 = load i32, ptr @VC_PACKETIZER_FLAG_INFO, align 4
%70 = select i1 %68, i32 0, i32 %69
%71 = load i32, ptr @VC_CONTAINER_READ_FLAG_SKIP, align 4, !tbaa !9
%72 = and i32 %71, %2
%73 = icmp eq i32 %72, 0
%74 = load i32, ptr @VC_PACKETIZER_FLAG_SKIP, align 4
%75 = select i1 %73, i32 0, i32 %74
%76 = or i32 %75, %70
%77 = load i64, ptr %0, align 8, !tbaa !14
%78 = icmp eq i64 %77, 0
br i1 %78, label %116, label %79
79: ; preds = %65
%80 = getelementptr inbounds %struct.TYPE_16__, ptr %0, i64 0, i32 3
br label %81
81: ; preds = %79, %105
%82 = phi i64 [ %77, %79 ], [ %106, %105 ]
%83 = phi i64 [ 0, %79 ], [ %109, %105 ]
%84 = phi i32 [ 0, %79 ], [ %108, %105 ]
%85 = phi i64 [ %5, %79 ], [ %107, %105 ]
%86 = load ptr, ptr %80, align 8, !tbaa !17
%87 = getelementptr inbounds ptr, ptr %86, i64 %83
%88 = load ptr, ptr %87, align 8, !tbaa !18
%89 = load ptr, ptr %88, align 8, !tbaa !24
%90 = load ptr, ptr %89, align 8, !tbaa !25
%91 = getelementptr inbounds %struct.TYPE_14__, ptr %88, i64 0, i32 1
%92 = load i32, ptr %91, align 8, !tbaa !19
%93 = icmp ne i32 %92, 0
%94 = icmp ne ptr %90, null
%95 = select i1 %93, i1 %94, i1 false
br i1 %95, label %96, label %105
96: ; preds = %81
br i1 %56, label %100, label %97
97: ; preds = %96
%98 = load i64, ptr %57, align 8, !tbaa !13
%99 = icmp eq i64 %98, %83
br i1 %99, label %100, label %105
100: ; preds = %96, %97
%101 = tail call i64 @vc_packetizer_read(ptr noundef nonnull %90, ptr noundef nonnull %57, i32 noundef %76) #3
store i64 %83, ptr %57, align 8, !tbaa !13
%102 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !5
%103 = icmp eq i64 %101, %102
%104 = load i64, ptr %0, align 8, !tbaa !14
br i1 %103, label %111, label %105
105: ; preds = %100, %81, %97
%106 = phi i64 [ %82, %97 ], [ %82, %81 ], [ %104, %100 ]
%107 = phi i64 [ %85, %97 ], [ %85, %81 ], [ %101, %100 ]
%108 = add i32 %84, 1
%109 = zext i32 %108 to i64
%110 = icmp ugt i64 %106, %109
br i1 %110, label %81, label %111, !llvm.loop !27
111: ; preds = %105, %100
%112 = phi i64 [ %106, %105 ], [ %104, %100 ]
%113 = phi i64 [ %109, %105 ], [ %83, %100 ]
%114 = phi i64 [ %107, %105 ], [ %101, %100 ]
%115 = icmp ugt i64 %112, %113
br i1 %115, label %170, label %116
116: ; preds = %65, %111
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%117 = load ptr, ptr %58, align 8, !tbaa !21
%118 = getelementptr inbounds %struct.TYPE_15__, ptr %117, i64 0, i32 1
store ptr %118, ptr %4, align 8, !tbaa !18
%119 = load i64, ptr %57, align 8, !tbaa !13
store i64 %119, ptr %118, align 8, !tbaa !13
%120 = load i32, ptr @VC_PACKETIZER_FLAG_INFO, align 4, !tbaa !9
%121 = or i32 %120, %7
%122 = tail call i64 @container_read_packet(ptr noundef nonnull %0, ptr noundef nonnull %118, i32 noundef %121) #3
%123 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !5
%124 = icmp eq i64 %122, %123
br i1 %124, label %125, label %157
125: ; preds = %116
%126 = getelementptr inbounds %struct.TYPE_16__, ptr %0, i64 0, i32 3
br label %127
127: ; preds = %125, %161
%128 = load ptr, ptr %126, align 8, !tbaa !17
%129 = load ptr, ptr %4, align 8, !tbaa !18
%130 = load i64, ptr %129, align 8, !tbaa !13
%131 = getelementptr inbounds ptr, ptr %128, i64 %130
%132 = load ptr, ptr %131, align 8, !tbaa !18
%133 = load ptr, ptr %132, align 8, !tbaa !24
%134 = load ptr, ptr %133, align 8, !tbaa !25
%135 = icmp eq ptr %134, null
br i1 %135, label %136, label %138
136: ; preds = %127
%137 = call i64 @container_read_packet(ptr noundef nonnull %0, ptr noundef nonnull %57, i32 noundef %2) #3
br label %159
138: ; preds = %127
%139 = load ptr, ptr %58, align 8, !tbaa !21
%140 = load i32, ptr %139, align 8, !tbaa !29
%141 = getelementptr inbounds %struct.TYPE_17__, ptr %129, i64 0, i32 5
store i32 %140, ptr %141, align 4, !tbaa !11
%142 = load i32, ptr @PACKETIZER_BUFFER_SIZE, align 4, !tbaa !9
%143 = getelementptr inbounds %struct.TYPE_17__, ptr %129, i64 0, i32 4
store i32 %142, ptr %143, align 8, !tbaa !30
%144 = getelementptr inbounds %struct.TYPE_17__, ptr %129, i64 0, i32 3
store i64 0, ptr %144, align 8, !tbaa !31
%145 = call i64 @container_read_packet(ptr noundef nonnull %0, ptr noundef nonnull %129, i32 noundef %7) #3
%146 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !5
%147 = icmp eq i64 %145, %146
br i1 %147, label %148, label %157
148: ; preds = %138
%149 = load ptr, ptr %4, align 8, !tbaa !18
%150 = load i64, ptr %149, align 8, !tbaa !13
store i64 %150, ptr %57, align 8, !tbaa !13
%151 = call i32 @vc_packetizer_push(ptr noundef nonnull %134, ptr noundef nonnull %149) #3
%152 = load i32, ptr @VC_PACKETIZER_FLAG_FORCE_RELEASE_INPUT, align 4, !tbaa !9
%153 = call i32 @vc_packetizer_pop(ptr noundef nonnull %134, ptr noundef nonnull %4, i32 noundef %152) #3
%154 = call i64 @vc_packetizer_read(ptr noundef nonnull %134, ptr noundef nonnull %57, i32 noundef %76) #3
%155 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !5
%156 = icmp eq i64 %154, %155
br i1 %156, label %159, label %161
157: ; preds = %138, %161, %116
%158 = phi i64 [ %122, %116 ], [ %167, %161 ], [ %145, %138 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
br label %187
159: ; preds = %148, %136
%160 = phi i64 [ %137, %136 ], [ %154, %148 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
br label %170
161: ; preds = %148
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%162 = load ptr, ptr %58, align 8, !tbaa !21
%163 = getelementptr inbounds %struct.TYPE_15__, ptr %162, i64 0, i32 1
store ptr %163, ptr %4, align 8, !tbaa !18
%164 = load i64, ptr %57, align 8, !tbaa !13
store i64 %164, ptr %163, align 8, !tbaa !13
%165 = load i32, ptr @VC_PACKETIZER_FLAG_INFO, align 4, !tbaa !9
%166 = or i32 %165, %7
%167 = call i64 @container_read_packet(ptr noundef nonnull %0, ptr noundef nonnull %163, i32 noundef %166) #3
%168 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !5
%169 = icmp eq i64 %167, %168
br i1 %169, label %127, label %157
170: ; preds = %159, %111, %63
%171 = phi i64 [ %114, %111 ], [ %64, %63 ], [ %160, %159 ]
%172 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !5
%173 = icmp eq i64 %171, %172
br i1 %173, label %174, label %187
174: ; preds = %170
%175 = getelementptr inbounds %struct.TYPE_17__, ptr %57, i64 0, i32 1
%176 = load i64, ptr %175, align 8, !tbaa !32
%177 = getelementptr inbounds %struct.TYPE_16__, ptr %0, i64 0, i32 1
%178 = load i64, ptr %177, align 8, !tbaa !33
%179 = icmp sgt i64 %176, %178
br i1 %179, label %180, label %181
180: ; preds = %174
store i64 %176, ptr %177, align 8, !tbaa !33
br label %181
181: ; preds = %174, %180
%182 = phi i64 [ %178, %174 ], [ %176, %180 ]
%183 = getelementptr inbounds %struct.TYPE_17__, ptr %57, i64 0, i32 2
%184 = load i64, ptr %183, align 8, !tbaa !34
%185 = icmp sgt i64 %184, %182
br i1 %185, label %186, label %187
186: ; preds = %181
store i64 %184, ptr %177, align 8, !tbaa !33
br label %187
187: ; preds = %181, %186, %157, %170, %49, %31, %19, %13
%188 = phi i64 [ %50, %49 ], [ %32, %31 ], [ %20, %19 ], [ %14, %13 ], [ %171, %170 ], [ %158, %157 ], [ %171, %186 ], [ %171, %181 ]
ret i64 %188
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @container_read_packet(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @vc_packetizer_read(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @vc_packetizer_push(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @vc_packetizer_pop(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 36}
!12 = !{!"TYPE_17__", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !10, i64 32, !10, i64 36}
!13 = !{!12, !6, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"TYPE_16__", !6, i64 0, !6, i64 8, !16, i64 16, !16, i64 24}
!16 = !{!"any pointer", !7, i64 0}
!17 = !{!15, !16, i64 24}
!18 = !{!16, !16, i64 0}
!19 = !{!20, !10, i64 8}
!20 = !{!"TYPE_14__", !16, i64 0, !10, i64 8}
!21 = !{!15, !16, i64 16}
!22 = !{!23, !10, i64 48}
!23 = !{!"TYPE_15__", !10, i64 0, !12, i64 8, !10, i64 48}
!24 = !{!20, !16, i64 0}
!25 = !{!26, !16, i64 0}
!26 = !{!"TYPE_13__", !16, i64 0}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
!29 = !{!23, !10, i64 0}
!30 = !{!12, !10, i64 32}
!31 = !{!12, !6, i64 24}
!32 = !{!12, !6, i64 8}
!33 = !{!15, !6, i64 8}
!34 = !{!12, !6, i64 16}
|
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/containers/core/extr_containers.c_vc_container_read.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/containers/core/extr_containers.c_vc_container_read.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VC_CONTAINER_ERROR_CONTINUE = common local_unnamed_addr global i64 0, align 8
@VC_CONTAINER_READ_FLAG_FORCE_TRACK = common local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_READ_FLAG_SKIP = common local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_ERROR_INVALID_ARGUMENT = common local_unnamed_addr global i64 0, align 8
@VC_CONTAINER_READ_FLAG_INFO = common local_unnamed_addr global i32 0, align 4
@VC_PACKETIZER_FLAG_INFO = common local_unnamed_addr global i32 0, align 4
@VC_PACKETIZER_FLAG_SKIP = common local_unnamed_addr global i32 0, align 4
@VC_CONTAINER_SUCCESS = common local_unnamed_addr global i64 0, align 8
@PACKETIZER_BUFFER_SIZE = common local_unnamed_addr global i32 0, align 4
@VC_PACKETIZER_FLAG_FORCE_RELEASE_INPUT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @vc_container_read(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca ptr, align 8
%5 = load i64, ptr @VC_CONTAINER_ERROR_CONTINUE, align 8, !tbaa !6
%6 = load i32, ptr @VC_CONTAINER_READ_FLAG_FORCE_TRACK, align 4, !tbaa !10
%7 = and i32 %6, %2
%8 = icmp eq ptr %1, null
br i1 %8, label %9, label %21
9: ; preds = %3
%10 = load i32, ptr @VC_CONTAINER_READ_FLAG_SKIP, align 4, !tbaa !10
%11 = and i32 %10, %2
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = load i64, ptr @VC_CONTAINER_ERROR_INVALID_ARGUMENT, align 8, !tbaa !6
br label %187
15: ; preds = %9
%16 = load i32, ptr @VC_CONTAINER_READ_FLAG_INFO, align 4, !tbaa !10
%17 = and i32 %16, %2
%18 = icmp eq i32 %17, 0
br i1 %18, label %35, label %19
19: ; preds = %15
%20 = load i64, ptr @VC_CONTAINER_ERROR_INVALID_ARGUMENT, align 8, !tbaa !6
br label %187
21: ; preds = %3
%22 = getelementptr inbounds i8, ptr %1, i64 36
%23 = load i32, ptr %22, align 4, !tbaa !12
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %33
25: ; preds = %21
%26 = load i32, ptr @VC_CONTAINER_READ_FLAG_INFO, align 4, !tbaa !10
%27 = load i32, ptr @VC_CONTAINER_READ_FLAG_SKIP, align 4, !tbaa !10
%28 = or i32 %27, %26
%29 = and i32 %28, %2
%30 = icmp eq i32 %29, 0
br i1 %30, label %31, label %33
31: ; preds = %25
%32 = load i64, ptr @VC_CONTAINER_ERROR_INVALID_ARGUMENT, align 8, !tbaa !6
br label %187
33: ; preds = %25, %21
%34 = icmp eq i32 %7, 0
br i1 %34, label %55, label %37
35: ; preds = %15
%36 = icmp eq i32 %7, 0
br i1 %36, label %51, label %49
37: ; preds = %33
%38 = load i64, ptr %1, align 8, !tbaa !14
%39 = load i64, ptr %0, align 8, !tbaa !15
%40 = icmp ult i64 %38, %39
br i1 %40, label %41, label %49
41: ; preds = %37
%42 = getelementptr inbounds i8, ptr %0, i64 24
%43 = load ptr, ptr %42, align 8, !tbaa !18
%44 = getelementptr inbounds ptr, ptr %43, i64 %38
%45 = load ptr, ptr %44, align 8, !tbaa !19
%46 = getelementptr inbounds i8, ptr %45, i64 8
%47 = load i32, ptr %46, align 8, !tbaa !20
%48 = icmp eq i32 %47, 0
br i1 %48, label %49, label %55
49: ; preds = %35, %41, %37
%50 = load i64, ptr @VC_CONTAINER_ERROR_INVALID_ARGUMENT, align 8, !tbaa !6
br label %187
51: ; preds = %35
%52 = getelementptr inbounds i8, ptr %0, i64 16
%53 = load ptr, ptr %52, align 8, !tbaa !22
%54 = getelementptr inbounds i8, ptr %53, i64 8
br label %55
55: ; preds = %33, %41, %51
%56 = phi i1 [ true, %51 ], [ false, %41 ], [ true, %33 ]
%57 = phi ptr [ %54, %51 ], [ %1, %41 ], [ %1, %33 ]
%58 = getelementptr inbounds i8, ptr %0, i64 16
%59 = load ptr, ptr %58, align 8, !tbaa !22
%60 = getelementptr inbounds i8, ptr %59, i64 48
%61 = load i32, ptr %60, align 8, !tbaa !23
%62 = icmp eq i32 %61, 0
br i1 %62, label %63, label %65
63: ; preds = %55
%64 = tail call i64 @container_read_packet(ptr noundef nonnull %0, ptr noundef nonnull %57, i32 noundef %2) #3
br label %170
65: ; preds = %55
%66 = load i32, ptr @VC_CONTAINER_READ_FLAG_INFO, align 4, !tbaa !10
%67 = and i32 %66, %2
%68 = icmp eq i32 %67, 0
%69 = load i32, ptr @VC_PACKETIZER_FLAG_INFO, align 4
%70 = select i1 %68, i32 0, i32 %69
%71 = load i32, ptr @VC_CONTAINER_READ_FLAG_SKIP, align 4, !tbaa !10
%72 = and i32 %71, %2
%73 = icmp eq i32 %72, 0
%74 = load i32, ptr @VC_PACKETIZER_FLAG_SKIP, align 4
%75 = select i1 %73, i32 0, i32 %74
%76 = or i32 %75, %70
%77 = load i64, ptr %0, align 8, !tbaa !15
%78 = icmp eq i64 %77, 0
br i1 %78, label %116, label %79
79: ; preds = %65
%80 = getelementptr inbounds i8, ptr %0, i64 24
br label %81
81: ; preds = %79, %105
%82 = phi i64 [ %77, %79 ], [ %106, %105 ]
%83 = phi i64 [ 0, %79 ], [ %109, %105 ]
%84 = phi i32 [ 0, %79 ], [ %108, %105 ]
%85 = phi i64 [ %5, %79 ], [ %107, %105 ]
%86 = load ptr, ptr %80, align 8, !tbaa !18
%87 = getelementptr inbounds ptr, ptr %86, i64 %83
%88 = load ptr, ptr %87, align 8, !tbaa !19
%89 = load ptr, ptr %88, align 8, !tbaa !25
%90 = load ptr, ptr %89, align 8, !tbaa !26
%91 = getelementptr inbounds i8, ptr %88, i64 8
%92 = load i32, ptr %91, align 8, !tbaa !20
%93 = icmp ne i32 %92, 0
%94 = icmp ne ptr %90, null
%95 = select i1 %93, i1 %94, i1 false
br i1 %95, label %96, label %105
96: ; preds = %81
br i1 %56, label %100, label %97
97: ; preds = %96
%98 = load i64, ptr %57, align 8, !tbaa !14
%99 = icmp eq i64 %98, %83
br i1 %99, label %100, label %105
100: ; preds = %96, %97
%101 = tail call i64 @vc_packetizer_read(ptr noundef nonnull %90, ptr noundef nonnull %57, i32 noundef %76) #3
store i64 %83, ptr %57, align 8, !tbaa !14
%102 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !6
%103 = icmp eq i64 %101, %102
%104 = load i64, ptr %0, align 8, !tbaa !15
br i1 %103, label %111, label %105
105: ; preds = %100, %81, %97
%106 = phi i64 [ %82, %97 ], [ %82, %81 ], [ %104, %100 ]
%107 = phi i64 [ %85, %97 ], [ %85, %81 ], [ %101, %100 ]
%108 = add i32 %84, 1
%109 = zext i32 %108 to i64
%110 = icmp ugt i64 %106, %109
br i1 %110, label %81, label %111, !llvm.loop !28
111: ; preds = %105, %100
%112 = phi i64 [ %106, %105 ], [ %104, %100 ]
%113 = phi i64 [ %109, %105 ], [ %83, %100 ]
%114 = phi i64 [ %107, %105 ], [ %101, %100 ]
%115 = icmp ugt i64 %112, %113
br i1 %115, label %170, label %116
116: ; preds = %65, %111
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%117 = load ptr, ptr %58, align 8, !tbaa !22
%118 = getelementptr inbounds i8, ptr %117, i64 8
store ptr %118, ptr %4, align 8, !tbaa !19
%119 = load i64, ptr %57, align 8, !tbaa !14
store i64 %119, ptr %118, align 8, !tbaa !14
%120 = load i32, ptr @VC_PACKETIZER_FLAG_INFO, align 4, !tbaa !10
%121 = or i32 %120, %7
%122 = tail call i64 @container_read_packet(ptr noundef nonnull %0, ptr noundef nonnull %118, i32 noundef %121) #3
%123 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !6
%124 = icmp eq i64 %122, %123
br i1 %124, label %125, label %157
125: ; preds = %116
%126 = getelementptr inbounds i8, ptr %0, i64 24
br label %127
127: ; preds = %125, %161
%128 = load ptr, ptr %126, align 8, !tbaa !18
%129 = load ptr, ptr %4, align 8, !tbaa !19
%130 = load i64, ptr %129, align 8, !tbaa !14
%131 = getelementptr inbounds ptr, ptr %128, i64 %130
%132 = load ptr, ptr %131, align 8, !tbaa !19
%133 = load ptr, ptr %132, align 8, !tbaa !25
%134 = load ptr, ptr %133, align 8, !tbaa !26
%135 = icmp eq ptr %134, null
br i1 %135, label %136, label %138
136: ; preds = %127
%137 = call i64 @container_read_packet(ptr noundef nonnull %0, ptr noundef nonnull %57, i32 noundef %2) #3
br label %159
138: ; preds = %127
%139 = load ptr, ptr %58, align 8, !tbaa !22
%140 = load i32, ptr %139, align 8, !tbaa !30
%141 = getelementptr inbounds i8, ptr %129, i64 36
store i32 %140, ptr %141, align 4, !tbaa !12
%142 = load i32, ptr @PACKETIZER_BUFFER_SIZE, align 4, !tbaa !10
%143 = getelementptr inbounds i8, ptr %129, i64 32
store i32 %142, ptr %143, align 8, !tbaa !31
%144 = getelementptr inbounds i8, ptr %129, i64 24
store i64 0, ptr %144, align 8, !tbaa !32
%145 = call i64 @container_read_packet(ptr noundef nonnull %0, ptr noundef nonnull %129, i32 noundef %7) #3
%146 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !6
%147 = icmp eq i64 %145, %146
br i1 %147, label %148, label %157
148: ; preds = %138
%149 = load ptr, ptr %4, align 8, !tbaa !19
%150 = load i64, ptr %149, align 8, !tbaa !14
store i64 %150, ptr %57, align 8, !tbaa !14
%151 = call i32 @vc_packetizer_push(ptr noundef nonnull %134, ptr noundef nonnull %149) #3
%152 = load i32, ptr @VC_PACKETIZER_FLAG_FORCE_RELEASE_INPUT, align 4, !tbaa !10
%153 = call i32 @vc_packetizer_pop(ptr noundef nonnull %134, ptr noundef nonnull %4, i32 noundef %152) #3
%154 = call i64 @vc_packetizer_read(ptr noundef nonnull %134, ptr noundef nonnull %57, i32 noundef %76) #3
%155 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !6
%156 = icmp eq i64 %154, %155
br i1 %156, label %159, label %161
157: ; preds = %138, %161, %116
%158 = phi i64 [ %122, %116 ], [ %167, %161 ], [ %145, %138 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
br label %187
159: ; preds = %148, %136
%160 = phi i64 [ %137, %136 ], [ %154, %148 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
br label %170
161: ; preds = %148
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%162 = load ptr, ptr %58, align 8, !tbaa !22
%163 = getelementptr inbounds i8, ptr %162, i64 8
store ptr %163, ptr %4, align 8, !tbaa !19
%164 = load i64, ptr %57, align 8, !tbaa !14
store i64 %164, ptr %163, align 8, !tbaa !14
%165 = load i32, ptr @VC_PACKETIZER_FLAG_INFO, align 4, !tbaa !10
%166 = or i32 %165, %7
%167 = call i64 @container_read_packet(ptr noundef nonnull %0, ptr noundef nonnull %163, i32 noundef %166) #3
%168 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !6
%169 = icmp eq i64 %167, %168
br i1 %169, label %127, label %157
170: ; preds = %159, %111, %63
%171 = phi i64 [ %114, %111 ], [ %64, %63 ], [ %160, %159 ]
%172 = load i64, ptr @VC_CONTAINER_SUCCESS, align 8, !tbaa !6
%173 = icmp eq i64 %171, %172
br i1 %173, label %174, label %187
174: ; preds = %170
%175 = getelementptr inbounds i8, ptr %57, i64 8
%176 = load i64, ptr %175, align 8, !tbaa !33
%177 = getelementptr inbounds i8, ptr %0, i64 8
%178 = load i64, ptr %177, align 8, !tbaa !34
%179 = icmp sgt i64 %176, %178
br i1 %179, label %180, label %181
180: ; preds = %174
store i64 %176, ptr %177, align 8, !tbaa !34
br label %181
181: ; preds = %174, %180
%182 = phi i64 [ %178, %174 ], [ %176, %180 ]
%183 = getelementptr inbounds i8, ptr %57, i64 16
%184 = load i64, ptr %183, align 8, !tbaa !35
%185 = icmp sgt i64 %184, %182
br i1 %185, label %186, label %187
186: ; preds = %181
store i64 %184, ptr %177, align 8, !tbaa !34
br label %187
187: ; preds = %181, %186, %157, %170, %49, %31, %19, %13
%188 = phi i64 [ %50, %49 ], [ %32, %31 ], [ %20, %19 ], [ %14, %13 ], [ %171, %170 ], [ %158, %157 ], [ %171, %186 ], [ %171, %181 ]
ret i64 %188
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @container_read_packet(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @vc_packetizer_read(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @vc_packetizer_push(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @vc_packetizer_pop(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 36}
!13 = !{!"TYPE_17__", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !11, i64 32, !11, i64 36}
!14 = !{!13, !7, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"TYPE_16__", !7, i64 0, !7, i64 8, !17, i64 16, !17, i64 24}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!16, !17, i64 24}
!19 = !{!17, !17, i64 0}
!20 = !{!21, !11, i64 8}
!21 = !{!"TYPE_14__", !17, i64 0, !11, i64 8}
!22 = !{!16, !17, i64 16}
!23 = !{!24, !11, i64 48}
!24 = !{!"TYPE_15__", !11, i64 0, !13, i64 8, !11, i64 48}
!25 = !{!21, !17, i64 0}
!26 = !{!27, !17, i64 0}
!27 = !{!"TYPE_13__", !17, i64 0}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
!30 = !{!24, !11, i64 0}
!31 = !{!13, !11, i64 32}
!32 = !{!13, !7, i64 24}
!33 = !{!13, !7, i64 8}
!34 = !{!16, !7, i64 8}
!35 = !{!13, !7, i64 16}
|
RetroArch_gfx_include_userland_containers_core_extr_containers.c_vc_container_read
|
; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/cart_hw/extr_ggenie.c_ggenie_write_word.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/cart_hw/extr_ggenie.c_ggenie_write_word.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ggenie_write_word], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ggenie_write_word(i32 noundef %0, i32 noundef %1) #0 {
%3 = lshr i32 %0, 1
%4 = and i32 %3, 31
%5 = tail call i32 @ggenie_write_regs(i32 noundef %4, i32 noundef %1) #2
ret void
}
declare i32 @ggenie_write_regs(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/cart_hw/extr_ggenie.c_ggenie_write_word.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/cart_hw/extr_ggenie.c_ggenie_write_word.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ggenie_write_word], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ggenie_write_word(i32 noundef %0, i32 noundef %1) #0 {
%3 = lshr i32 %0, 1
%4 = and i32 %3, 31
%5 = tail call i32 @ggenie_write_regs(i32 noundef %4, i32 noundef %1) #2
ret void
}
declare i32 @ggenie_write_regs(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
Provenance_Cores_Genesis-Plus-GX_PVGenesis_Genesis_GenesisCore_genplusgx_source_cart_hw_extr_ggenie.c_ggenie_write_word
|
; ModuleID = 'AnghaBench/linux/drivers/tty/serial/extr_amba-pl011.c_pl011_dma_startup.c'
source_filename = "AnghaBench/linux/drivers/tty/serial/extr_amba-pl011.c_pl011_dma_startup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @pl011_dma_startup], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @pl011_dma_startup(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/tty/serial/extr_amba-pl011.c_pl011_dma_startup.c'
source_filename = "AnghaBench/linux/drivers/tty/serial/extr_amba-pl011.c_pl011_dma_startup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pl011_dma_startup], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @pl011_dma_startup(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_tty_serial_extr_amba-pl011.c_pl011_dma_startup
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_aperture_gm.c_free_vgpu_gm.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_aperture_gm.c_free_vgpu_gm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.intel_vgpu = type { %struct.TYPE_5__, ptr }
%struct.TYPE_5__ = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @free_vgpu_gm], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @free_vgpu_gm(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.intel_vgpu, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !12
%5 = tail call i32 @mutex_lock(ptr noundef %4) #2
%6 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%7 = tail call i32 @drm_mm_remove_node(ptr noundef nonnull %6) #2
%8 = tail call i32 @drm_mm_remove_node(ptr noundef %0) #2
%9 = tail call i32 @mutex_unlock(ptr noundef %4) #2
ret void
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @drm_mm_remove_node(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"intel_vgpu", !7, i64 0, !11, i64 8}
!7 = !{!"TYPE_5__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_4__", !11, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_aperture_gm.c_free_vgpu_gm.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_aperture_gm.c_free_vgpu_gm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @free_vgpu_gm], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @free_vgpu_gm(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !13
%5 = tail call i32 @mutex_lock(ptr noundef %4) #2
%6 = getelementptr inbounds i8, ptr %0, i64 4
%7 = tail call i32 @drm_mm_remove_node(ptr noundef nonnull %6) #2
%8 = tail call i32 @drm_mm_remove_node(ptr noundef %0) #2
%9 = tail call i32 @mutex_unlock(ptr noundef %4) #2
ret void
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @drm_mm_remove_node(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"intel_vgpu", !8, i64 0, !12, i64 8}
!8 = !{!"TYPE_5__", !9, i64 0, !9, i64 4}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_4__", !12, i64 0}
|
linux_drivers_gpu_drm_i915_gvt_extr_aperture_gm.c_free_vgpu_gm
|
; ModuleID = 'AnghaBench/linux/arch/powerpc/platforms/powermac/extr_low_i2c.c_kw_i2c_close.c'
source_filename = "AnghaBench/linux/arch/powerpc/platforms/powermac/extr_low_i2c.c_kw_i2c_close.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @kw_i2c_close], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @kw_i2c_close(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = tail call i32 @mutex_unlock(ptr noundef %2) #2
ret void
}
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pmac_i2c_bus", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/arch/powerpc/platforms/powermac/extr_low_i2c.c_kw_i2c_close.c'
source_filename = "AnghaBench/linux/arch/powerpc/platforms/powermac/extr_low_i2c.c_kw_i2c_close.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @kw_i2c_close], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @kw_i2c_close(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call i32 @mutex_unlock(ptr noundef %2) #2
ret void
}
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pmac_i2c_bus", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
linux_arch_powerpc_platforms_powermac_extr_low_i2c.c_kw_i2c_close
|
; ModuleID = 'AnghaBench/linux/security/apparmor/extr_mount.c_aa_mount_change_type.c'
source_filename = "AnghaBench/linux/security/apparmor/extr_mount.c_aa_mount_change_type.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MS_REC = dso_local local_unnamed_addr global i64 0, align 8
@MS_SILENT = dso_local local_unnamed_addr global i64 0, align 8
@MS_SHARED = dso_local local_unnamed_addr global i64 0, align 8
@MS_PRIVATE = dso_local local_unnamed_addr global i64 0, align 8
@MS_SLAVE = dso_local local_unnamed_addr global i64 0, align 8
@MS_UNBINDABLE = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @aa_mount_change_type(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %0, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @AA_BUG(i32 noundef %5) #2
%7 = icmp eq ptr %1, null
%8 = zext i1 %7 to i32
%9 = tail call i32 @AA_BUG(i32 noundef %8) #2
%10 = load i64, ptr @MS_REC, align 8, !tbaa !5
%11 = load i64, ptr @MS_SILENT, align 8, !tbaa !5
%12 = or i64 %11, %10
%13 = load i64, ptr @MS_SHARED, align 8, !tbaa !5
%14 = or i64 %12, %13
%15 = load i64, ptr @MS_PRIVATE, align 8, !tbaa !5
%16 = or i64 %14, %15
%17 = load i64, ptr @MS_SLAVE, align 8, !tbaa !5
%18 = or i64 %16, %17
%19 = load i64, ptr @MS_UNBINDABLE, align 8, !tbaa !5
%20 = or i64 %18, %19
%21 = and i64 %20, %2
%22 = tail call i32 @get_buffers(ptr noundef null) #2
%23 = tail call i32 @match_mnt(ptr noundef undef, ptr noundef %1, ptr noundef null, ptr noundef null, ptr noundef null, ptr noundef null, i64 noundef %21, ptr noundef null, i32 noundef 0) #2
%24 = tail call i32 @fn_for_each_confined(ptr noundef %0, ptr noundef undef, i32 noundef %23) #2
%25 = tail call i32 @put_buffers(ptr noundef null) #2
ret i32 %24
}
declare i32 @AA_BUG(i32 noundef) local_unnamed_addr #1
declare i32 @get_buffers(ptr noundef) local_unnamed_addr #1
declare i32 @fn_for_each_confined(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @match_mnt(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @put_buffers(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/security/apparmor/extr_mount.c_aa_mount_change_type.c'
source_filename = "AnghaBench/linux/security/apparmor/extr_mount.c_aa_mount_change_type.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MS_REC = common local_unnamed_addr global i64 0, align 8
@MS_SILENT = common local_unnamed_addr global i64 0, align 8
@MS_SHARED = common local_unnamed_addr global i64 0, align 8
@MS_PRIVATE = common local_unnamed_addr global i64 0, align 8
@MS_SLAVE = common local_unnamed_addr global i64 0, align 8
@MS_UNBINDABLE = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @aa_mount_change_type(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %0, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @AA_BUG(i32 noundef %5) #2
%7 = icmp eq ptr %1, null
%8 = zext i1 %7 to i32
%9 = tail call i32 @AA_BUG(i32 noundef %8) #2
%10 = load i64, ptr @MS_REC, align 8, !tbaa !6
%11 = load i64, ptr @MS_SILENT, align 8, !tbaa !6
%12 = or i64 %11, %10
%13 = load i64, ptr @MS_SHARED, align 8, !tbaa !6
%14 = or i64 %12, %13
%15 = load i64, ptr @MS_PRIVATE, align 8, !tbaa !6
%16 = or i64 %14, %15
%17 = load i64, ptr @MS_SLAVE, align 8, !tbaa !6
%18 = or i64 %16, %17
%19 = load i64, ptr @MS_UNBINDABLE, align 8, !tbaa !6
%20 = or i64 %18, %19
%21 = and i64 %20, %2
%22 = tail call i32 @get_buffers(ptr noundef null) #2
%23 = tail call i32 @match_mnt(ptr noundef undef, ptr noundef %1, ptr noundef null, ptr noundef null, ptr noundef null, ptr noundef null, i64 noundef %21, ptr noundef null, i32 noundef 0) #2
%24 = tail call i32 @fn_for_each_confined(ptr noundef %0, ptr noundef undef, i32 noundef %23) #2
%25 = tail call i32 @put_buffers(ptr noundef null) #2
ret i32 %24
}
declare i32 @AA_BUG(i32 noundef) local_unnamed_addr #1
declare i32 @get_buffers(ptr noundef) local_unnamed_addr #1
declare i32 @fn_for_each_confined(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @match_mnt(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @put_buffers(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_security_apparmor_extr_mount.c_aa_mount_change_type
|
; ModuleID = 'AnghaBench/netdata/libnetdata/storage_number/tests/extr_....adaptive_resortable_listadaptive_resortable_list.h_arl_check.c'
source_filename = "AnghaBench/netdata/libnetdata/storage_number/tests/extr_....adaptive_resortable_listadaptive_resortable_list.h_arl_check.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32, i32, i32, i32, i32, i64, i64, ptr, ptr, i32 }
%struct.TYPE_5__ = type { i32, ptr, i32, i32, ptr, i32 }
@ARL_ENTRY_FLAG_FOUND = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @arl_check], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @arl_check(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 8
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.TYPE_5__, ptr %5, i64 0, i32 3
%7 = load i32, ptr %6, align 4, !tbaa !12
%8 = tail call i32 @strcmp(ptr noundef %1, i32 noundef %7) #2
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
%11 = tail call i64 @likely(i32 noundef %10) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %52, label %13
13: ; preds = %3
%14 = load i32, ptr @ARL_ENTRY_FLAG_FOUND, align 4, !tbaa !14
%15 = getelementptr inbounds %struct.TYPE_5__, ptr %5, i64 0, i32 5
%16 = load i32, ptr %15, align 8, !tbaa !15
%17 = or i32 %16, %14
store i32 %17, ptr %15, align 8, !tbaa !15
%18 = load i32, ptr %5, align 8, !tbaa !16
%19 = tail call i64 @unlikely(i32 noundef %18) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %32, label %21
21: ; preds = %13
%22 = getelementptr inbounds %struct.TYPE_5__, ptr %5, i64 0, i32 4
%23 = load ptr, ptr %22, align 8, !tbaa !17
%24 = load i32, ptr %6, align 4, !tbaa !12
%25 = getelementptr inbounds %struct.TYPE_5__, ptr %5, i64 0, i32 2
%26 = load i32, ptr %25, align 8, !tbaa !18
%27 = load i32, ptr %5, align 8, !tbaa !16
%28 = tail call i32 %23(i32 noundef %24, i32 noundef %26, ptr noundef %2, i32 noundef %27) #2
%29 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 5
%30 = load i64, ptr %29, align 8, !tbaa !19
%31 = add nsw i64 %30, 1
store i64 %31, ptr %29, align 8, !tbaa !19
br label %32
32: ; preds = %21, %13
%33 = getelementptr inbounds %struct.TYPE_5__, ptr %5, i64 0, i32 1
%34 = load ptr, ptr %33, align 8, !tbaa !20
store ptr %34, ptr %4, align 8, !tbaa !5
%35 = icmp eq ptr %34, null
%36 = zext i1 %35 to i32
%37 = tail call i64 @unlikely(i32 noundef %36) #2
%38 = icmp eq i64 %37, 0
br i1 %38, label %42, label %39
39: ; preds = %32
%40 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 7
%41 = load ptr, ptr %40, align 8, !tbaa !21
store ptr %41, ptr %4, align 8, !tbaa !5
br label %42
42: ; preds = %39, %32
%43 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 5
%44 = load i64, ptr %43, align 8, !tbaa !19
%45 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 6
%46 = load i64, ptr %45, align 8, !tbaa !22
%47 = icmp eq i64 %44, %46
%48 = zext i1 %47 to i32
%49 = tail call i64 @unlikely(i32 noundef %48) #2
%50 = icmp ne i64 %49, 0
%51 = zext i1 %50 to i32
br label %54
52: ; preds = %3
%53 = tail call i32 @arl_find_or_create_and_relink(ptr noundef nonnull %0, ptr noundef %1, ptr noundef %2) #2
br label %54
54: ; preds = %42, %52
%55 = phi i32 [ %53, %52 ], [ %51, %42 ]
ret i32 %55
}
declare i64 @likely(i32 noundef) local_unnamed_addr #1
declare i32 @strcmp(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @arl_find_or_create_and_relink(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 48}
!6 = !{!"TYPE_6__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !10, i64 24, !10, i64 32, !11, i64 40, !11, i64 48, !7, i64 56}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 20}
!13 = !{!"TYPE_5__", !7, i64 0, !11, i64 8, !7, i64 16, !7, i64 20, !11, i64 24, !7, i64 32}
!14 = !{!7, !7, i64 0}
!15 = !{!13, !7, i64 32}
!16 = !{!13, !7, i64 0}
!17 = !{!13, !11, i64 24}
!18 = !{!13, !7, i64 16}
!19 = !{!6, !10, i64 24}
!20 = !{!13, !11, i64 8}
!21 = !{!6, !11, i64 40}
!22 = !{!6, !10, i64 32}
|
; ModuleID = 'AnghaBench/netdata/libnetdata/storage_number/tests/extr_....adaptive_resortable_listadaptive_resortable_list.h_arl_check.c'
source_filename = "AnghaBench/netdata/libnetdata/storage_number/tests/extr_....adaptive_resortable_listadaptive_resortable_list.h_arl_check.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ARL_ENTRY_FLAG_FOUND = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @arl_check], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @arl_check(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %0, i64 48
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %5, i64 20
%7 = load i32, ptr %6, align 4, !tbaa !13
%8 = tail call i32 @strcmp(ptr noundef %1, i32 noundef %7) #2
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
%11 = tail call i64 @likely(i32 noundef %10) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %52, label %13
13: ; preds = %3
%14 = load i32, ptr @ARL_ENTRY_FLAG_FOUND, align 4, !tbaa !15
%15 = getelementptr inbounds i8, ptr %5, i64 32
%16 = load i32, ptr %15, align 8, !tbaa !16
%17 = or i32 %16, %14
store i32 %17, ptr %15, align 8, !tbaa !16
%18 = load i32, ptr %5, align 8, !tbaa !17
%19 = tail call i64 @unlikely(i32 noundef %18) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %32, label %21
21: ; preds = %13
%22 = getelementptr inbounds i8, ptr %5, i64 24
%23 = load ptr, ptr %22, align 8, !tbaa !18
%24 = load i32, ptr %6, align 4, !tbaa !13
%25 = getelementptr inbounds i8, ptr %5, i64 16
%26 = load i32, ptr %25, align 8, !tbaa !19
%27 = load i32, ptr %5, align 8, !tbaa !17
%28 = tail call i32 %23(i32 noundef %24, i32 noundef %26, ptr noundef %2, i32 noundef %27) #2
%29 = getelementptr inbounds i8, ptr %0, i64 24
%30 = load i64, ptr %29, align 8, !tbaa !20
%31 = add nsw i64 %30, 1
store i64 %31, ptr %29, align 8, !tbaa !20
br label %32
32: ; preds = %21, %13
%33 = getelementptr inbounds i8, ptr %5, i64 8
%34 = load ptr, ptr %33, align 8, !tbaa !21
store ptr %34, ptr %4, align 8, !tbaa !6
%35 = icmp eq ptr %34, null
%36 = zext i1 %35 to i32
%37 = tail call i64 @unlikely(i32 noundef %36) #2
%38 = icmp eq i64 %37, 0
br i1 %38, label %42, label %39
39: ; preds = %32
%40 = getelementptr inbounds i8, ptr %0, i64 40
%41 = load ptr, ptr %40, align 8, !tbaa !22
store ptr %41, ptr %4, align 8, !tbaa !6
br label %42
42: ; preds = %39, %32
%43 = getelementptr inbounds i8, ptr %0, i64 24
%44 = load i64, ptr %43, align 8, !tbaa !20
%45 = getelementptr inbounds i8, ptr %0, i64 32
%46 = load i64, ptr %45, align 8, !tbaa !23
%47 = icmp eq i64 %44, %46
%48 = zext i1 %47 to i32
%49 = tail call i64 @unlikely(i32 noundef %48) #2
%50 = icmp ne i64 %49, 0
%51 = zext i1 %50 to i32
br label %54
52: ; preds = %3
%53 = tail call i32 @arl_find_or_create_and_relink(ptr noundef nonnull %0, ptr noundef %1, ptr noundef %2) #2
br label %54
54: ; preds = %42, %52
%55 = phi i32 [ %53, %52 ], [ %51, %42 ]
ret i32 %55
}
declare i64 @likely(i32 noundef) local_unnamed_addr #1
declare i32 @strcmp(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @arl_find_or_create_and_relink(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 48}
!7 = !{!"TYPE_6__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24, !11, i64 32, !12, i64 40, !12, i64 48, !8, i64 56}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!14, !8, i64 20}
!14 = !{!"TYPE_5__", !8, i64 0, !12, i64 8, !8, i64 16, !8, i64 20, !12, i64 24, !8, i64 32}
!15 = !{!8, !8, i64 0}
!16 = !{!14, !8, i64 32}
!17 = !{!14, !8, i64 0}
!18 = !{!14, !12, i64 24}
!19 = !{!14, !8, i64 16}
!20 = !{!7, !11, i64 24}
!21 = !{!14, !12, i64 8}
!22 = !{!7, !12, i64 40}
!23 = !{!7, !11, i64 32}
|
netdata_libnetdata_storage_number_tests_extr_....adaptive_resortable_listadaptive_resortable_list.h_arl_check
|
; ModuleID = 'AnghaBench/linux/scripts/dtc/extr_data.c_data_copy_mem.c'
source_filename = "AnghaBench/linux/scripts/dtc/extr_data.c_data_copy_mem.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@empty_data = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i64 @data_copy_mem(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @empty_data, align 4, !tbaa !5
%4 = tail call i64 @data_grow_for(i32 noundef %3, i32 noundef %1) #2
%5 = lshr i64 %4, 32
%6 = trunc i64 %5 to i32
%7 = tail call i32 @memcpy(i32 noundef %6, ptr noundef %0, i32 noundef %1) #2
%8 = and i64 %4, -4294967296
%9 = zext i32 %1 to i64
%10 = or disjoint i64 %8, %9
ret i64 %10
}
declare i64 @data_grow_for(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/scripts/dtc/extr_data.c_data_copy_mem.c'
source_filename = "AnghaBench/linux/scripts/dtc/extr_data.c_data_copy_mem.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@empty_data = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @data_copy_mem(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @empty_data, align 4, !tbaa !6
%4 = tail call i64 @data_grow_for(i32 noundef %3, i32 noundef %1) #2
%5 = lshr i64 %4, 32
%6 = trunc nuw i64 %5 to i32
%7 = tail call i32 @memcpy(i32 noundef %6, ptr noundef %0, i32 noundef %1) #2
%8 = and i64 %4, -4294967296
%9 = zext i32 %1 to i64
%10 = or disjoint i64 %8, %9
ret i64 %10
}
declare i64 @data_grow_for(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_scripts_dtc_extr_data.c_data_copy_mem
|
; ModuleID = 'AnghaBench/libgit2/tests/diff/extr_parse.c_cl_git_assert_lineinfo_.c'
source_filename = "AnghaBench/libgit2/tests/diff/extr_parse.c_cl_git_assert_lineinfo_.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @cl_git_assert_lineinfo_], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @cl_git_assert_lineinfo_(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, i64 noundef %5, ptr noundef %6, i32 noundef %7) #0 {
%9 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #3
%10 = call i32 @git_patch_get_line_in_hunk(ptr noundef nonnull %9, ptr noundef %3, i64 noundef %4, i64 noundef %5) #3
%11 = call i32 @cl_git_expect(i32 noundef %10, i32 noundef 0, ptr noundef %6, i32 noundef %7) #3
%12 = load ptr, ptr %9, align 8, !tbaa !5
%13 = getelementptr inbounds %struct.TYPE_3__, ptr %12, i64 0, i32 2
%14 = load i32, ptr %13, align 4, !tbaa !9
%15 = call i32 @cl_assert_equal_i_src(i32 noundef %0, i32 noundef %14, ptr noundef %6, i32 noundef %7) #3
%16 = load ptr, ptr %9, align 8, !tbaa !5
%17 = getelementptr inbounds %struct.TYPE_3__, ptr %16, i64 0, i32 1
%18 = load i32, ptr %17, align 4, !tbaa !12
%19 = call i32 @cl_assert_equal_i_src(i32 noundef %1, i32 noundef %18, ptr noundef %6, i32 noundef %7) #3
%20 = load ptr, ptr %9, align 8, !tbaa !5
%21 = load i32, ptr %20, align 4, !tbaa !13
%22 = call i32 @cl_assert_equal_i_src(i32 noundef %2, i32 noundef %21, ptr noundef %6, i32 noundef %7) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cl_git_expect(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @git_patch_get_line_in_hunk(ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @cl_assert_equal_i_src(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"TYPE_3__", !11, i64 0, !11, i64 4, !11, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 4}
!13 = !{!10, !11, i64 0}
|
; ModuleID = 'AnghaBench/libgit2/tests/diff/extr_parse.c_cl_git_assert_lineinfo_.c'
source_filename = "AnghaBench/libgit2/tests/diff/extr_parse.c_cl_git_assert_lineinfo_.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cl_git_assert_lineinfo_], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @cl_git_assert_lineinfo_(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, i64 noundef %5, ptr noundef %6, i32 noundef %7) #0 {
%9 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #3
%10 = call i32 @git_patch_get_line_in_hunk(ptr noundef nonnull %9, ptr noundef %3, i64 noundef %4, i64 noundef %5) #3
%11 = call i32 @cl_git_expect(i32 noundef %10, i32 noundef 0, ptr noundef %6, i32 noundef %7) #3
%12 = load ptr, ptr %9, align 8, !tbaa !6
%13 = getelementptr inbounds i8, ptr %12, i64 8
%14 = load i32, ptr %13, align 4, !tbaa !10
%15 = call i32 @cl_assert_equal_i_src(i32 noundef %0, i32 noundef %14, ptr noundef %6, i32 noundef %7) #3
%16 = load ptr, ptr %9, align 8, !tbaa !6
%17 = getelementptr inbounds i8, ptr %16, i64 4
%18 = load i32, ptr %17, align 4, !tbaa !13
%19 = call i32 @cl_assert_equal_i_src(i32 noundef %1, i32 noundef %18, ptr noundef %6, i32 noundef %7) #3
%20 = load ptr, ptr %9, align 8, !tbaa !6
%21 = load i32, ptr %20, align 4, !tbaa !14
%22 = call i32 @cl_assert_equal_i_src(i32 noundef %2, i32 noundef %21, ptr noundef %6, i32 noundef %7) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cl_git_expect(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @git_patch_get_line_in_hunk(ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @cl_assert_equal_i_src(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"TYPE_3__", !12, i64 0, !12, i64 4, !12, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 4}
!14 = !{!11, !12, i64 0}
|
libgit2_tests_diff_extr_parse.c_cl_git_assert_lineinfo_
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/amd/xgbe/extr_xgbe-mdio.c_xgbe_an37_state_machine.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/amd/xgbe/extr_xgbe-mdio.c_xgbe_an37_state_machine.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.xgbe_prv_data = type { i32, i32, i64, i32, i32, i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { ptr }
@XGBE_AN_CL37_INT_CMPLT = dso_local local_unnamed_addr global i32 0, align 4
@XGBE_AN_MODE_CL37_SGMII = dso_local local_unnamed_addr global i64 0, align 8
@XGBE_SGMII_AN_LINK_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@link = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [12 x i8] c"CL37 AN %s\0A\00", align 1
@.str.1 = private unnamed_addr constant [29 x i8] c"Auto negotiation successful\0A\00", align 1
@XGBE_AN_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [41 x i8] c"error during auto-negotiation, state=%u\0A\00", align 1
@.str.3 = private unnamed_addr constant [20 x i8] c"CL37 AN result: %s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @xgbe_an37_state_machine], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @xgbe_an37_state_machine(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.xgbe_prv_data, ptr %0, i64 0, i32 1
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = icmp eq i32 %3, 0
br i1 %4, label %69, label %5
5: ; preds = %1
%6 = load i32, ptr @XGBE_AN_CL37_INT_CMPLT, align 4, !tbaa !14
%7 = and i32 %6, %3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = load i32, ptr %0, align 8, !tbaa !15
br label %26
11: ; preds = %5
store i32 130, ptr %0, align 8, !tbaa !15
%12 = load i32, ptr @XGBE_AN_CL37_INT_CMPLT, align 4, !tbaa !14
%13 = xor i32 %12, -1
%14 = and i32 %3, %13
store i32 %14, ptr %2, align 4, !tbaa !5
%15 = getelementptr inbounds %struct.xgbe_prv_data, ptr %0, i64 0, i32 2
%16 = load i64, ptr %15, align 8, !tbaa !16
%17 = load i64, ptr @XGBE_AN_MODE_CL37_SGMII, align 8, !tbaa !17
%18 = icmp eq i64 %16, %17
br i1 %18, label %19, label %26
19: ; preds = %11
%20 = getelementptr inbounds %struct.xgbe_prv_data, ptr %0, i64 0, i32 3
%21 = load i32, ptr %20, align 8, !tbaa !18
%22 = load i32, ptr @XGBE_SGMII_AN_LINK_STATUS, align 4, !tbaa !14
%23 = and i32 %22, %21
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %19
store i32 129, ptr %0, align 8, !tbaa !15
br label %26
26: ; preds = %9, %11, %19, %25
%27 = phi i32 [ %10, %9 ], [ 130, %11 ], [ 130, %19 ], [ 129, %25 ]
%28 = load i32, ptr @link, align 4, !tbaa !14
%29 = getelementptr inbounds %struct.xgbe_prv_data, ptr %0, i64 0, i32 5
%30 = load i32, ptr %29, align 8, !tbaa !19
%31 = tail call i32 @xgbe_state_as_string(i32 noundef %27) #2
%32 = tail call i32 (ptr, i32, i32, ptr, ...) @netif_dbg(ptr noundef nonnull %0, i32 noundef %28, i32 noundef %30, ptr noundef nonnull @.str, i32 noundef %31) #2
%33 = load i32, ptr %0, align 8, !tbaa !15
switch i32 %33, label %39 [
i32 128, label %41
i32 130, label %34
i32 129, label %41
]
34: ; preds = %26
%35 = load i32, ptr @link, align 4, !tbaa !14
%36 = load i32, ptr %29, align 8, !tbaa !19
%37 = tail call i32 (ptr, i32, i32, ptr, ...) @netif_dbg(ptr noundef nonnull %0, i32 noundef %35, i32 noundef %36, ptr noundef nonnull @.str.1) #2
%38 = load i32, ptr %0, align 8, !tbaa !15
br label %41
39: ; preds = %26
%40 = load i32, ptr @XGBE_AN_ERROR, align 4, !tbaa !14
store i32 %40, ptr %0, align 8, !tbaa !15
br label %41
41: ; preds = %39, %26, %34, %26
%42 = phi i32 [ %40, %39 ], [ %33, %26 ], [ %38, %34 ], [ %33, %26 ]
%43 = load i32, ptr @XGBE_AN_ERROR, align 4, !tbaa !14
%44 = icmp eq i32 %42, %43
br i1 %44, label %45, label %50
45: ; preds = %41
%46 = load i32, ptr %29, align 8, !tbaa !19
%47 = tail call i32 @netdev_err(i32 noundef %46, ptr noundef nonnull @.str.2, i32 noundef %33) #2
store i32 0, ptr %2, align 4, !tbaa !5
%48 = tail call i32 @xgbe_an37_clear_interrupts(ptr noundef nonnull %0) #2
%49 = load i32, ptr %0, align 8, !tbaa !15
br label %50
50: ; preds = %45, %41
%51 = phi i32 [ %49, %45 ], [ %42, %41 ]
%52 = icmp sgt i32 %51, 129
br i1 %52, label %53, label %67
53: ; preds = %50
%54 = getelementptr inbounds %struct.xgbe_prv_data, ptr %0, i64 0, i32 4
store i32 %51, ptr %54, align 4, !tbaa !20
store i32 128, ptr %0, align 8, !tbaa !15
%55 = getelementptr inbounds %struct.xgbe_prv_data, ptr %0, i64 0, i32 6
%56 = load ptr, ptr %55, align 8, !tbaa !21
%57 = icmp eq ptr %56, null
br i1 %57, label %61, label %58
58: ; preds = %53
%59 = tail call i32 %56(ptr noundef nonnull %0) #2
%60 = load i32, ptr %54, align 4, !tbaa !20
br label %61
61: ; preds = %58, %53
%62 = phi i32 [ %60, %58 ], [ %51, %53 ]
%63 = load i32, ptr @link, align 4, !tbaa !14
%64 = load i32, ptr %29, align 8, !tbaa !19
%65 = tail call i32 @xgbe_state_as_string(i32 noundef %62) #2
%66 = tail call i32 (ptr, i32, i32, ptr, ...) @netif_dbg(ptr noundef nonnull %0, i32 noundef %63, i32 noundef %64, ptr noundef nonnull @.str.3, i32 noundef %65) #2
br label %67
67: ; preds = %61, %50
%68 = tail call i32 @xgbe_an37_enable_interrupts(ptr noundef nonnull %0) #2
br label %69
69: ; preds = %1, %67
ret void
}
declare i32 @netif_dbg(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @xgbe_state_as_string(i32 noundef) local_unnamed_addr #1
declare i32 @netdev_err(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @xgbe_an37_clear_interrupts(ptr noundef) local_unnamed_addr #1
declare i32 @xgbe_an37_enable_interrupts(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"xgbe_prv_data", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !11, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!6, !7, i64 0}
!16 = !{!6, !10, i64 8}
!17 = !{!10, !10, i64 0}
!18 = !{!6, !7, i64 16}
!19 = !{!6, !7, i64 24}
!20 = !{!6, !7, i64 20}
!21 = !{!6, !13, i64 32}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/amd/xgbe/extr_xgbe-mdio.c_xgbe_an37_state_machine.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/amd/xgbe/extr_xgbe-mdio.c_xgbe_an37_state_machine.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@XGBE_AN_CL37_INT_CMPLT = common local_unnamed_addr global i32 0, align 4
@XGBE_AN_MODE_CL37_SGMII = common local_unnamed_addr global i64 0, align 8
@XGBE_SGMII_AN_LINK_STATUS = common local_unnamed_addr global i32 0, align 4
@link = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [12 x i8] c"CL37 AN %s\0A\00", align 1
@.str.1 = private unnamed_addr constant [29 x i8] c"Auto negotiation successful\0A\00", align 1
@XGBE_AN_ERROR = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [41 x i8] c"error during auto-negotiation, state=%u\0A\00", align 1
@.str.3 = private unnamed_addr constant [20 x i8] c"CL37 AN result: %s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @xgbe_an37_state_machine], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @xgbe_an37_state_machine(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %69, label %5
5: ; preds = %1
%6 = load i32, ptr @XGBE_AN_CL37_INT_CMPLT, align 4, !tbaa !15
%7 = and i32 %6, %3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = load i32, ptr %0, align 8, !tbaa !16
br label %26
11: ; preds = %5
store i32 130, ptr %0, align 8, !tbaa !16
%12 = load i32, ptr @XGBE_AN_CL37_INT_CMPLT, align 4, !tbaa !15
%13 = xor i32 %12, -1
%14 = and i32 %3, %13
store i32 %14, ptr %2, align 4, !tbaa !6
%15 = getelementptr inbounds i8, ptr %0, i64 8
%16 = load i64, ptr %15, align 8, !tbaa !17
%17 = load i64, ptr @XGBE_AN_MODE_CL37_SGMII, align 8, !tbaa !18
%18 = icmp eq i64 %16, %17
br i1 %18, label %19, label %26
19: ; preds = %11
%20 = getelementptr inbounds i8, ptr %0, i64 16
%21 = load i32, ptr %20, align 8, !tbaa !19
%22 = load i32, ptr @XGBE_SGMII_AN_LINK_STATUS, align 4, !tbaa !15
%23 = and i32 %22, %21
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %19
store i32 129, ptr %0, align 8, !tbaa !16
br label %26
26: ; preds = %9, %11, %19, %25
%27 = phi i32 [ %10, %9 ], [ 130, %11 ], [ 130, %19 ], [ 129, %25 ]
%28 = load i32, ptr @link, align 4, !tbaa !15
%29 = getelementptr inbounds i8, ptr %0, i64 24
%30 = load i32, ptr %29, align 8, !tbaa !20
%31 = tail call i32 @xgbe_state_as_string(i32 noundef %27) #2
%32 = tail call i32 (ptr, i32, i32, ptr, ...) @netif_dbg(ptr noundef nonnull %0, i32 noundef %28, i32 noundef %30, ptr noundef nonnull @.str, i32 noundef %31) #2
%33 = load i32, ptr %0, align 8, !tbaa !16
switch i32 %33, label %39 [
i32 128, label %41
i32 130, label %34
i32 129, label %41
]
34: ; preds = %26
%35 = load i32, ptr @link, align 4, !tbaa !15
%36 = load i32, ptr %29, align 8, !tbaa !20
%37 = tail call i32 (ptr, i32, i32, ptr, ...) @netif_dbg(ptr noundef nonnull %0, i32 noundef %35, i32 noundef %36, ptr noundef nonnull @.str.1) #2
%38 = load i32, ptr %0, align 8, !tbaa !16
br label %41
39: ; preds = %26
%40 = load i32, ptr @XGBE_AN_ERROR, align 4, !tbaa !15
store i32 %40, ptr %0, align 8, !tbaa !16
br label %41
41: ; preds = %39, %26, %34, %26
%42 = phi i32 [ %40, %39 ], [ %33, %26 ], [ %38, %34 ], [ %33, %26 ]
%43 = load i32, ptr @XGBE_AN_ERROR, align 4, !tbaa !15
%44 = icmp eq i32 %42, %43
br i1 %44, label %45, label %50
45: ; preds = %41
%46 = load i32, ptr %29, align 8, !tbaa !20
%47 = tail call i32 @netdev_err(i32 noundef %46, ptr noundef nonnull @.str.2, i32 noundef %33) #2
store i32 0, ptr %2, align 4, !tbaa !6
%48 = tail call i32 @xgbe_an37_clear_interrupts(ptr noundef nonnull %0) #2
%49 = load i32, ptr %0, align 8, !tbaa !16
br label %50
50: ; preds = %45, %41
%51 = phi i32 [ %49, %45 ], [ %42, %41 ]
%52 = icmp sgt i32 %51, 129
br i1 %52, label %53, label %67
53: ; preds = %50
%54 = getelementptr inbounds i8, ptr %0, i64 20
store i32 %51, ptr %54, align 4, !tbaa !21
store i32 128, ptr %0, align 8, !tbaa !16
%55 = getelementptr inbounds i8, ptr %0, i64 32
%56 = load ptr, ptr %55, align 8, !tbaa !22
%57 = icmp eq ptr %56, null
br i1 %57, label %61, label %58
58: ; preds = %53
%59 = tail call i32 %56(ptr noundef nonnull %0) #2
%60 = load i32, ptr %54, align 4, !tbaa !21
br label %61
61: ; preds = %58, %53
%62 = phi i32 [ %60, %58 ], [ %51, %53 ]
%63 = load i32, ptr @link, align 4, !tbaa !15
%64 = load i32, ptr %29, align 8, !tbaa !20
%65 = tail call i32 @xgbe_state_as_string(i32 noundef %62) #2
%66 = tail call i32 (ptr, i32, i32, ptr, ...) @netif_dbg(ptr noundef nonnull %0, i32 noundef %63, i32 noundef %64, ptr noundef nonnull @.str.3, i32 noundef %65) #2
br label %67
67: ; preds = %61, %50
%68 = tail call i32 @xgbe_an37_enable_interrupts(ptr noundef nonnull %0) #2
br label %69
69: ; preds = %1, %67
ret void
}
declare i32 @netif_dbg(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @xgbe_state_as_string(i32 noundef) local_unnamed_addr #1
declare i32 @netdev_err(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @xgbe_an37_clear_interrupts(ptr noundef) local_unnamed_addr #1
declare i32 @xgbe_an37_enable_interrupts(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"xgbe_prv_data", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16, !8, i64 20, !8, i64 24, !12, i64 32}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !14, i64 0}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!7, !8, i64 0}
!17 = !{!7, !11, i64 8}
!18 = !{!11, !11, i64 0}
!19 = !{!7, !8, i64 16}
!20 = !{!7, !8, i64 24}
!21 = !{!7, !8, i64 20}
!22 = !{!7, !14, i64 32}
|
linux_drivers_net_ethernet_amd_xgbe_extr_xgbe-mdio.c_xgbe_an37_state_machine
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/dec/tulip/extr_de4x5.c_srom_repair.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/dec/tulip/extr_de4x5.c_srom_repair.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.de4x5_private = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32, i32 }
@ETH_ALEN = dso_local local_unnamed_addr global i32 0, align 4
@srom_repair_info = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @srom_repair], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @srom_repair(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = icmp eq i32 %1, 128
br i1 %4, label %5, label %18
5: ; preds = %2
%6 = getelementptr inbounds %struct.de4x5_private, ptr %3, i64 0, i32 1
%7 = tail call i32 @memset(ptr noundef nonnull %6, i32 noundef 0, i32 noundef 4) #2
%8 = getelementptr inbounds %struct.de4x5_private, ptr %3, i64 0, i32 1, i32 1
%9 = load i32, ptr %8, align 4, !tbaa !5
%10 = load i64, ptr %0, align 8, !tbaa !11
%11 = inttoptr i64 %10 to ptr
%12 = load i32, ptr @ETH_ALEN, align 4, !tbaa !14
%13 = tail call i32 @memcpy(i32 noundef %9, ptr noundef %11, i32 noundef %12) #2
%14 = load i32, ptr %6, align 4, !tbaa !15
%15 = load ptr, ptr @srom_repair_info, align 8, !tbaa !16
%16 = getelementptr inbounds i32, ptr %15, i64 127
%17 = tail call i32 @memcpy(i32 noundef %14, ptr noundef nonnull %16, i32 noundef 100) #2
store i32 1, ptr %3, align 4, !tbaa !18
br label %18
18: ; preds = %2, %5
ret void
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"de4x5_private", !7, i64 0, !10, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !7, i64 0, !7, i64 4}
!11 = !{!12, !13, i64 0}
!12 = !{!"net_device", !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!6, !7, i64 4}
!16 = !{!17, !17, i64 0}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/dec/tulip/extr_de4x5.c_srom_repair.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/dec/tulip/extr_de4x5.c_srom_repair.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ETH_ALEN = common local_unnamed_addr global i32 0, align 4
@srom_repair_info = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @srom_repair], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @srom_repair(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = icmp eq i32 %1, 128
br i1 %4, label %5, label %18
5: ; preds = %2
%6 = getelementptr inbounds i8, ptr %3, i64 4
%7 = tail call i32 @memset(ptr noundef nonnull %6, i32 noundef 0, i32 noundef 4) #2
%8 = getelementptr inbounds i8, ptr %3, i64 8
%9 = load i32, ptr %8, align 4, !tbaa !6
%10 = load i64, ptr %0, align 8, !tbaa !12
%11 = inttoptr i64 %10 to ptr
%12 = load i32, ptr @ETH_ALEN, align 4, !tbaa !15
%13 = tail call i32 @memcpy(i32 noundef %9, ptr noundef %11, i32 noundef %12) #2
%14 = load i32, ptr %6, align 4, !tbaa !16
%15 = load ptr, ptr @srom_repair_info, align 8, !tbaa !17
%16 = getelementptr inbounds i8, ptr %15, i64 508
%17 = tail call i32 @memcpy(i32 noundef %14, ptr noundef nonnull %16, i32 noundef 100) #2
store i32 1, ptr %3, align 4, !tbaa !19
br label %18
18: ; preds = %2, %5
ret void
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"de4x5_private", !8, i64 0, !11, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !8, i64 0, !8, i64 4}
!12 = !{!13, !14, i64 0}
!13 = !{!"net_device", !14, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!7, !8, i64 4}
!17 = !{!18, !18, i64 0}
!18 = !{!"any pointer", !9, i64 0}
!19 = !{!7, !8, i64 0}
|
linux_drivers_net_ethernet_dec_tulip_extr_de4x5.c_srom_repair
|
; ModuleID = 'AnghaBench/citus/src/backend/distributed/metadata/extr_dependency.c_SupportedDependencyByCitus.c'
source_filename = "AnghaBench/citus/src/backend/distributed/metadata/extr_dependency.c_SupportedDependencyByCitus.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EnableDependencyCreation = dso_local local_unnamed_addr global i32 0, align 4
@RELKIND_COMPOSITE_TYPE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @SupportedDependencyByCitus(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @EnableDependencyCreation, align 4, !tbaa !5
%3 = icmp eq i32 %2, 0
%4 = tail call i32 @getObjectClass(ptr noundef %0) #2
br i1 %3, label %5, label %8
5: ; preds = %1
%6 = icmp eq i32 %4, 132
%7 = zext i1 %6 to i32
br label %23
8: ; preds = %1
switch i32 %4, label %22 [
i32 132, label %23
i32 133, label %23
i32 131, label %9
i32 134, label %16
]
9: ; preds = %8
%10 = load i32, ptr %0, align 4, !tbaa !9
%11 = tail call i32 @get_typtype(i32 noundef %10) #2
switch i32 %11, label %15 [
i32 128, label %23
i32 129, label %23
i32 130, label %12
]
12: ; preds = %9
%13 = load i32, ptr %0, align 4, !tbaa !9
%14 = tail call i32 @type_is_array(i32 noundef %13) #2
br label %23
15: ; preds = %9
br label %23
16: ; preds = %8
%17 = load i32, ptr %0, align 4, !tbaa !9
%18 = tail call i32 @get_rel_relkind(i32 noundef %17) #2
%19 = load i32, ptr @RELKIND_COMPOSITE_TYPE, align 4, !tbaa !5
%20 = icmp eq i32 %18, %19
%21 = zext i1 %20 to i32
br label %23
22: ; preds = %8
br label %23
23: ; preds = %16, %9, %9, %8, %8, %5, %22, %15, %12
%24 = phi i32 [ 0, %22 ], [ 0, %15 ], [ %14, %12 ], [ %7, %5 ], [ 1, %8 ], [ 1, %8 ], [ 1, %9 ], [ 1, %9 ], [ %21, %16 ]
ret i32 %24
}
declare i32 @getObjectClass(ptr noundef) local_unnamed_addr #1
declare i32 @get_typtype(i32 noundef) local_unnamed_addr #1
declare i32 @type_is_array(i32 noundef) local_unnamed_addr #1
declare i32 @get_rel_relkind(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_4__", !6, i64 0}
|
; ModuleID = 'AnghaBench/citus/src/backend/distributed/metadata/extr_dependency.c_SupportedDependencyByCitus.c'
source_filename = "AnghaBench/citus/src/backend/distributed/metadata/extr_dependency.c_SupportedDependencyByCitus.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EnableDependencyCreation = common local_unnamed_addr global i32 0, align 4
@RELKIND_COMPOSITE_TYPE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @SupportedDependencyByCitus(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @EnableDependencyCreation, align 4, !tbaa !6
%3 = icmp eq i32 %2, 0
%4 = tail call i32 @getObjectClass(ptr noundef %0) #2
br i1 %3, label %5, label %8
5: ; preds = %1
%6 = icmp eq i32 %4, 132
%7 = zext i1 %6 to i32
br label %23
8: ; preds = %1
switch i32 %4, label %22 [
i32 132, label %23
i32 133, label %23
i32 131, label %9
i32 134, label %16
]
9: ; preds = %8
%10 = load i32, ptr %0, align 4, !tbaa !10
%11 = tail call i32 @get_typtype(i32 noundef %10) #2
switch i32 %11, label %15 [
i32 128, label %23
i32 129, label %23
i32 130, label %12
]
12: ; preds = %9
%13 = load i32, ptr %0, align 4, !tbaa !10
%14 = tail call i32 @type_is_array(i32 noundef %13) #2
br label %23
15: ; preds = %9
br label %23
16: ; preds = %8
%17 = load i32, ptr %0, align 4, !tbaa !10
%18 = tail call i32 @get_rel_relkind(i32 noundef %17) #2
%19 = load i32, ptr @RELKIND_COMPOSITE_TYPE, align 4, !tbaa !6
%20 = icmp eq i32 %18, %19
%21 = zext i1 %20 to i32
br label %23
22: ; preds = %8
br label %23
23: ; preds = %16, %9, %9, %8, %8, %5, %22, %15, %12
%24 = phi i32 [ 0, %22 ], [ 0, %15 ], [ %14, %12 ], [ %7, %5 ], [ 1, %8 ], [ 1, %8 ], [ 1, %9 ], [ 1, %9 ], [ %21, %16 ]
ret i32 %24
}
declare i32 @getObjectClass(ptr noundef) local_unnamed_addr #1
declare i32 @get_typtype(i32 noundef) local_unnamed_addr #1
declare i32 @type_is_array(i32 noundef) local_unnamed_addr #1
declare i32 @get_rel_relkind(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0}
|
citus_src_backend_distributed_metadata_extr_dependency.c_SupportedDependencyByCitus
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/bridge/netfilter/extr_..br_private.h_br_multicast_is_router.c'
source_filename = "AnghaBench/fastsocket/kernel/net/bridge/netfilter/extr_..br_private.h_br_multicast_is_router.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @br_multicast_is_router], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @br_multicast_is_router(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/bridge/netfilter/extr_..br_private.h_br_multicast_is_router.c'
source_filename = "AnghaBench/fastsocket/kernel/net/bridge/netfilter/extr_..br_private.h_br_multicast_is_router.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @br_multicast_is_router], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @br_multicast_is_router(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_net_bridge_netfilter_extr_..br_private.h_br_multicast_is_router
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ocfs2/extr_xattr.c_ocfs2_reflink_xattr_buckets.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ocfs2/extr_xattr.c_ocfs2_reflink_xattr_buckets.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ocfs2_xattr_value_buf = type { i32 }
%struct.ocfs2_reflink_xattr_tree_args = type { ptr, ptr, ptr }
%struct.TYPE_14__ = type { i32, ptr }
@ocfs2_journal_access = dso_local local_unnamed_addr global i32 0, align 4
@OCFS2_JOURNAL_ACCESS_CREATE = dso_local local_unnamed_addr global i32 0, align 4
@ocfs2_get_reflink_xattr_value_root = dso_local local_unnamed_addr global i32 0, align 4
@OCFS2_JOURNAL_ACCESS_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ocfs2_reflink_xattr_buckets], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @ocfs2_reflink_xattr_buckets(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, ptr nocapture readnone %5, ptr noundef %6) #0 {
%8 = alloca %struct.ocfs2_xattr_value_buf, align 4
%9 = getelementptr inbounds %struct.ocfs2_reflink_xattr_tree_args, ptr %6, i64 0, i32 2
%10 = load ptr, ptr %9, align 8, !tbaa !5
%11 = load ptr, ptr %10, align 8, !tbaa !10
%12 = load ptr, ptr %11, align 8, !tbaa !12
%13 = tail call i32 @OCFS2_SB(ptr noundef %12) #3
%14 = tail call i32 @ocfs2_xattr_buckets_per_cluster(i32 noundef %13) #3
%15 = mul nsw i32 %14, %3
%16 = getelementptr inbounds %struct.ocfs2_reflink_xattr_tree_args, ptr %6, i64 0, i32 1
%17 = load ptr, ptr %16, align 8, !tbaa !14
%18 = load i32, ptr %17, align 8, !tbaa !15
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
%19 = load i32, ptr @ocfs2_journal_access, align 4, !tbaa !18
store i32 %19, ptr %8, align 4, !tbaa !19
%20 = icmp sgt i32 %15, 0
br i1 %20, label %21, label %95
21: ; preds = %7
%22 = icmp sgt i32 %18, 0
br label %23
23: ; preds = %21, %81
%24 = phi i32 [ %1, %21 ], [ %89, %81 ]
%25 = phi i32 [ %15, %21 ], [ %43, %81 ]
%26 = phi i32 [ %2, %21 ], [ %90, %81 ]
%27 = phi i32 [ 0, %21 ], [ %88, %81 ]
%28 = load ptr, ptr %16, align 8, !tbaa !14
%29 = call i32 @ocfs2_read_xattr_bucket(ptr noundef %28, i32 noundef %24) #3
%30 = icmp eq i32 %29, 0
br i1 %30, label %31, label %92
31: ; preds = %23
%32 = load ptr, ptr %6, align 8, !tbaa !21
%33 = call i32 @ocfs2_init_xattr_bucket(ptr noundef %32, i32 noundef %26) #3
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %92
35: ; preds = %31
%36 = icmp eq i32 %27, 0
br i1 %36, label %37, label %42
37: ; preds = %35
%38 = load ptr, ptr %16, align 8, !tbaa !14
%39 = call ptr @bucket_xh(ptr noundef %38) #3
%40 = load i32, ptr %39, align 4, !tbaa !22
%41 = call i32 @le16_to_cpu(i32 noundef %40) #3
br label %42
42: ; preds = %37, %35
%43 = phi i32 [ %41, %37 ], [ %25, %35 ]
%44 = load ptr, ptr %6, align 8, !tbaa !21
%45 = load i32, ptr @OCFS2_JOURNAL_ACCESS_CREATE, align 4, !tbaa !18
%46 = call i32 @ocfs2_xattr_bucket_journal_access(ptr noundef %0, ptr noundef %44, i32 noundef %45) #3
%47 = icmp eq i32 %46, 0
br i1 %47, label %48, label %92
48: ; preds = %42
br i1 %22, label %49, label %59
49: ; preds = %48, %49
%50 = phi i32 [ %57, %49 ], [ 0, %48 ]
%51 = load ptr, ptr %6, align 8, !tbaa !21
%52 = call i32 @bucket_block(ptr noundef %51, i32 noundef %50) #3
%53 = load ptr, ptr %16, align 8, !tbaa !14
%54 = call i32 @bucket_block(ptr noundef %53, i32 noundef %50) #3
%55 = load i32, ptr %12, align 4, !tbaa !24
%56 = call i32 @memcpy(i32 noundef %52, i32 noundef %54, i32 noundef %55) #3
%57 = add nuw nsw i32 %50, 1
%58 = icmp eq i32 %57, %18
br i1 %58, label %59, label %49, !llvm.loop !26
59: ; preds = %49, %48
%60 = load ptr, ptr %6, align 8, !tbaa !21
%61 = call i32 @ocfs2_xattr_bucket_journal_dirty(ptr noundef %0, ptr noundef %60) #3
%62 = load ptr, ptr %9, align 8, !tbaa !5
%63 = load ptr, ptr %16, align 8, !tbaa !14
%64 = getelementptr inbounds %struct.TYPE_14__, ptr %63, i64 0, i32 1
%65 = load ptr, ptr %64, align 8, !tbaa !28
%66 = load i32, ptr %65, align 4, !tbaa !18
%67 = call ptr @bucket_xh(ptr noundef %63) #3
%68 = load ptr, ptr %6, align 8, !tbaa !21
%69 = getelementptr inbounds %struct.TYPE_14__, ptr %68, i64 0, i32 1
%70 = load ptr, ptr %69, align 8, !tbaa !28
%71 = load i32, ptr %70, align 4, !tbaa !18
%72 = call ptr @bucket_xh(ptr noundef %68) #3
%73 = load i32, ptr @ocfs2_get_reflink_xattr_value_root, align 4, !tbaa !18
%74 = call i32 @ocfs2_reflink_xattr_header(ptr noundef %0, ptr noundef %62, i32 noundef %66, ptr noundef %67, i32 noundef %71, ptr noundef %72, ptr noundef nonnull %8, ptr noundef %4, i32 noundef %73, ptr noundef nonnull %6) #3
%75 = icmp eq i32 %74, 0
br i1 %75, label %76, label %92
76: ; preds = %59
%77 = load ptr, ptr %6, align 8, !tbaa !21
%78 = load i32, ptr @OCFS2_JOURNAL_ACCESS_WRITE, align 4, !tbaa !18
%79 = call i32 @ocfs2_xattr_bucket_journal_access(ptr noundef %0, ptr noundef %77, i32 noundef %78) #3
%80 = icmp eq i32 %79, 0
br i1 %80, label %81, label %92
81: ; preds = %76
%82 = load ptr, ptr %6, align 8, !tbaa !21
%83 = call i32 @ocfs2_xattr_bucket_journal_dirty(ptr noundef %0, ptr noundef %82) #3
%84 = load ptr, ptr %16, align 8, !tbaa !14
%85 = call i32 @ocfs2_xattr_bucket_relse(ptr noundef %84) #3
%86 = load ptr, ptr %6, align 8, !tbaa !21
%87 = call i32 @ocfs2_xattr_bucket_relse(ptr noundef %86) #3
%88 = add nuw nsw i32 %27, 1
%89 = add nsw i32 %24, %18
%90 = add nsw i32 %26, %18
%91 = icmp slt i32 %88, %43
br i1 %91, label %23, label %95, !llvm.loop !29
92: ; preds = %76, %59, %42, %31, %23
%93 = phi i32 [ %29, %23 ], [ %33, %31 ], [ %46, %42 ], [ %74, %59 ], [ %79, %76 ]
%94 = call i32 @mlog_errno(i32 noundef %93) #3
br label %95
95: ; preds = %81, %92, %7
%96 = phi i32 [ 0, %7 ], [ %93, %92 ], [ 0, %81 ]
%97 = load ptr, ptr %16, align 8, !tbaa !14
%98 = call i32 @ocfs2_xattr_bucket_relse(ptr noundef %97) #3
%99 = load ptr, ptr %6, align 8, !tbaa !21
%100 = call i32 @ocfs2_xattr_bucket_relse(ptr noundef %99) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
ret i32 %96
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ocfs2_xattr_buckets_per_cluster(i32 noundef) local_unnamed_addr #2
declare i32 @OCFS2_SB(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_read_xattr_bucket(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mlog_errno(i32 noundef) local_unnamed_addr #2
declare i32 @ocfs2_init_xattr_bucket(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2
declare ptr @bucket_xh(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_xattr_bucket_journal_access(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bucket_block(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ocfs2_xattr_bucket_journal_dirty(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_reflink_xattr_header(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_xattr_bucket_relse(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"ocfs2_reflink_xattr_tree_args", !7, i64 0, !7, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_15__", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_13__", !7, i64 0}
!14 = !{!6, !7, i64 8}
!15 = !{!16, !17, i64 0}
!16 = !{!"TYPE_14__", !17, i64 0, !7, i64 8}
!17 = !{!"int", !8, i64 0}
!18 = !{!17, !17, i64 0}
!19 = !{!20, !17, i64 0}
!20 = !{!"ocfs2_xattr_value_buf", !17, i64 0}
!21 = !{!6, !7, i64 0}
!22 = !{!23, !17, i64 0}
!23 = !{!"TYPE_16__", !17, i64 0}
!24 = !{!25, !17, i64 0}
!25 = !{!"super_block", !17, i64 0}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = !{!16, !7, i64 8}
!29 = distinct !{!29, !27}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ocfs2/extr_xattr.c_ocfs2_reflink_xattr_buckets.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ocfs2/extr_xattr.c_ocfs2_reflink_xattr_buckets.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.ocfs2_xattr_value_buf = type { i32 }
@ocfs2_journal_access = common local_unnamed_addr global i32 0, align 4
@OCFS2_JOURNAL_ACCESS_CREATE = common local_unnamed_addr global i32 0, align 4
@ocfs2_get_reflink_xattr_value_root = common local_unnamed_addr global i32 0, align 4
@OCFS2_JOURNAL_ACCESS_WRITE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ocfs2_reflink_xattr_buckets], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @ocfs2_reflink_xattr_buckets(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, ptr nocapture readnone %5, ptr noundef %6) #0 {
%8 = alloca %struct.ocfs2_xattr_value_buf, align 4
%9 = getelementptr inbounds i8, ptr %6, i64 16
%10 = load ptr, ptr %9, align 8, !tbaa !6
%11 = load ptr, ptr %10, align 8, !tbaa !11
%12 = load ptr, ptr %11, align 8, !tbaa !13
%13 = tail call i32 @OCFS2_SB(ptr noundef %12) #3
%14 = tail call i32 @ocfs2_xattr_buckets_per_cluster(i32 noundef %13) #3
%15 = mul nsw i32 %14, %3
%16 = getelementptr inbounds i8, ptr %6, i64 8
%17 = load ptr, ptr %16, align 8, !tbaa !15
%18 = load i32, ptr %17, align 8, !tbaa !16
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
%19 = load i32, ptr @ocfs2_journal_access, align 4, !tbaa !19
store i32 %19, ptr %8, align 4, !tbaa !20
%20 = icmp sgt i32 %15, 0
br i1 %20, label %21, label %95
21: ; preds = %7
%22 = icmp sgt i32 %18, 0
br label %23
23: ; preds = %21, %81
%24 = phi i32 [ %1, %21 ], [ %89, %81 ]
%25 = phi i32 [ %15, %21 ], [ %43, %81 ]
%26 = phi i32 [ %2, %21 ], [ %90, %81 ]
%27 = phi i32 [ 0, %21 ], [ %88, %81 ]
%28 = load ptr, ptr %16, align 8, !tbaa !15
%29 = call i32 @ocfs2_read_xattr_bucket(ptr noundef %28, i32 noundef %24) #3
%30 = icmp eq i32 %29, 0
br i1 %30, label %31, label %92
31: ; preds = %23
%32 = load ptr, ptr %6, align 8, !tbaa !22
%33 = call i32 @ocfs2_init_xattr_bucket(ptr noundef %32, i32 noundef %26) #3
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %92
35: ; preds = %31
%36 = icmp eq i32 %27, 0
br i1 %36, label %37, label %42
37: ; preds = %35
%38 = load ptr, ptr %16, align 8, !tbaa !15
%39 = call ptr @bucket_xh(ptr noundef %38) #3
%40 = load i32, ptr %39, align 4, !tbaa !23
%41 = call i32 @le16_to_cpu(i32 noundef %40) #3
br label %42
42: ; preds = %37, %35
%43 = phi i32 [ %41, %37 ], [ %25, %35 ]
%44 = load ptr, ptr %6, align 8, !tbaa !22
%45 = load i32, ptr @OCFS2_JOURNAL_ACCESS_CREATE, align 4, !tbaa !19
%46 = call i32 @ocfs2_xattr_bucket_journal_access(ptr noundef %0, ptr noundef %44, i32 noundef %45) #3
%47 = icmp eq i32 %46, 0
br i1 %47, label %48, label %92
48: ; preds = %42
br i1 %22, label %49, label %59
49: ; preds = %48, %49
%50 = phi i32 [ %57, %49 ], [ 0, %48 ]
%51 = load ptr, ptr %6, align 8, !tbaa !22
%52 = call i32 @bucket_block(ptr noundef %51, i32 noundef %50) #3
%53 = load ptr, ptr %16, align 8, !tbaa !15
%54 = call i32 @bucket_block(ptr noundef %53, i32 noundef %50) #3
%55 = load i32, ptr %12, align 4, !tbaa !25
%56 = call i32 @memcpy(i32 noundef %52, i32 noundef %54, i32 noundef %55) #3
%57 = add nuw nsw i32 %50, 1
%58 = icmp eq i32 %57, %18
br i1 %58, label %59, label %49, !llvm.loop !27
59: ; preds = %49, %48
%60 = load ptr, ptr %6, align 8, !tbaa !22
%61 = call i32 @ocfs2_xattr_bucket_journal_dirty(ptr noundef %0, ptr noundef %60) #3
%62 = load ptr, ptr %9, align 8, !tbaa !6
%63 = load ptr, ptr %16, align 8, !tbaa !15
%64 = getelementptr inbounds i8, ptr %63, i64 8
%65 = load ptr, ptr %64, align 8, !tbaa !29
%66 = load i32, ptr %65, align 4, !tbaa !19
%67 = call ptr @bucket_xh(ptr noundef %63) #3
%68 = load ptr, ptr %6, align 8, !tbaa !22
%69 = getelementptr inbounds i8, ptr %68, i64 8
%70 = load ptr, ptr %69, align 8, !tbaa !29
%71 = load i32, ptr %70, align 4, !tbaa !19
%72 = call ptr @bucket_xh(ptr noundef %68) #3
%73 = load i32, ptr @ocfs2_get_reflink_xattr_value_root, align 4, !tbaa !19
%74 = call i32 @ocfs2_reflink_xattr_header(ptr noundef %0, ptr noundef %62, i32 noundef %66, ptr noundef %67, i32 noundef %71, ptr noundef %72, ptr noundef nonnull %8, ptr noundef %4, i32 noundef %73, ptr noundef nonnull %6) #3
%75 = icmp eq i32 %74, 0
br i1 %75, label %76, label %92
76: ; preds = %59
%77 = load ptr, ptr %6, align 8, !tbaa !22
%78 = load i32, ptr @OCFS2_JOURNAL_ACCESS_WRITE, align 4, !tbaa !19
%79 = call i32 @ocfs2_xattr_bucket_journal_access(ptr noundef %0, ptr noundef %77, i32 noundef %78) #3
%80 = icmp eq i32 %79, 0
br i1 %80, label %81, label %92
81: ; preds = %76
%82 = load ptr, ptr %6, align 8, !tbaa !22
%83 = call i32 @ocfs2_xattr_bucket_journal_dirty(ptr noundef %0, ptr noundef %82) #3
%84 = load ptr, ptr %16, align 8, !tbaa !15
%85 = call i32 @ocfs2_xattr_bucket_relse(ptr noundef %84) #3
%86 = load ptr, ptr %6, align 8, !tbaa !22
%87 = call i32 @ocfs2_xattr_bucket_relse(ptr noundef %86) #3
%88 = add nuw nsw i32 %27, 1
%89 = add nsw i32 %24, %18
%90 = add nsw i32 %26, %18
%91 = icmp slt i32 %88, %43
br i1 %91, label %23, label %95, !llvm.loop !30
92: ; preds = %76, %59, %42, %31, %23
%93 = phi i32 [ %29, %23 ], [ %33, %31 ], [ %46, %42 ], [ %74, %59 ], [ %79, %76 ]
%94 = call i32 @mlog_errno(i32 noundef %93) #3
br label %95
95: ; preds = %81, %92, %7
%96 = phi i32 [ 0, %7 ], [ %93, %92 ], [ 0, %81 ]
%97 = load ptr, ptr %16, align 8, !tbaa !15
%98 = call i32 @ocfs2_xattr_bucket_relse(ptr noundef %97) #3
%99 = load ptr, ptr %6, align 8, !tbaa !22
%100 = call i32 @ocfs2_xattr_bucket_relse(ptr noundef %99) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
ret i32 %96
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ocfs2_xattr_buckets_per_cluster(i32 noundef) local_unnamed_addr #2
declare i32 @OCFS2_SB(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_read_xattr_bucket(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mlog_errno(i32 noundef) local_unnamed_addr #2
declare i32 @ocfs2_init_xattr_bucket(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2
declare ptr @bucket_xh(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_xattr_bucket_journal_access(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bucket_block(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ocfs2_xattr_bucket_journal_dirty(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_reflink_xattr_header(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_xattr_bucket_relse(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"ocfs2_reflink_xattr_tree_args", !8, i64 0, !8, i64 8, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_15__", !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"TYPE_13__", !8, i64 0}
!15 = !{!7, !8, i64 8}
!16 = !{!17, !18, i64 0}
!17 = !{!"TYPE_14__", !18, i64 0, !8, i64 8}
!18 = !{!"int", !9, i64 0}
!19 = !{!18, !18, i64 0}
!20 = !{!21, !18, i64 0}
!21 = !{!"ocfs2_xattr_value_buf", !18, i64 0}
!22 = !{!7, !8, i64 0}
!23 = !{!24, !18, i64 0}
!24 = !{!"TYPE_16__", !18, i64 0}
!25 = !{!26, !18, i64 0}
!26 = !{!"super_block", !18, i64 0}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
!29 = !{!17, !8, i64 8}
!30 = distinct !{!30, !28}
|
fastsocket_kernel_fs_ocfs2_extr_xattr.c_ocfs2_reflink_xattr_buckets
|
; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_sparc_pmu_commit_txn.c'
source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_sparc_pmu_commit_txn.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cpu_hw_events = type { i32, i32, i32, i32 }
@cpu_hw_events = dso_local global i32 0, align 4
@sparc_pmu = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@PERF_PMU_TXN_ADD = dso_local local_unnamed_addr global i32 0, align 4
@EAGAIN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sparc_pmu_commit_txn], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @sparc_pmu_commit_txn(ptr noundef %0) #0 {
%2 = tail call ptr @this_cpu_ptr(ptr noundef nonnull @cpu_hw_events) #2
%3 = load i32, ptr @sparc_pmu, align 4, !tbaa !5
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, ptr @EINVAL, align 4, !tbaa !5
%7 = sub nsw i32 0, %6
br label %40
8: ; preds = %1
%9 = load i32, ptr %2, align 4, !tbaa !9
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
%12 = tail call i32 @WARN_ON_ONCE(i32 noundef %11) #2
%13 = load i32, ptr %2, align 4, !tbaa !9
%14 = load i32, ptr @PERF_PMU_TXN_ADD, align 4, !tbaa !5
%15 = xor i32 %14, -1
%16 = and i32 %13, %15
%17 = icmp eq i32 %16, 0
br i1 %17, label %19, label %18
18: ; preds = %8
store i32 0, ptr %2, align 4, !tbaa !9
br label %40
19: ; preds = %8
%20 = getelementptr inbounds %struct.cpu_hw_events, ptr %2, i64 0, i32 1
%21 = load i32, ptr %20, align 4, !tbaa !11
%22 = getelementptr inbounds %struct.cpu_hw_events, ptr %2, i64 0, i32 3
%23 = load i32, ptr %22, align 4, !tbaa !12
%24 = tail call i64 @check_excludes(i32 noundef %23, i32 noundef 0, i32 noundef %21) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %19
%27 = load i32, ptr @EINVAL, align 4, !tbaa !5
%28 = sub nsw i32 0, %27
br label %40
29: ; preds = %19
%30 = load i32, ptr %22, align 4, !tbaa !12
%31 = getelementptr inbounds %struct.cpu_hw_events, ptr %2, i64 0, i32 2
%32 = load i32, ptr %31, align 4, !tbaa !13
%33 = tail call i64 @sparc_check_constraints(i32 noundef %30, i32 noundef %32, i32 noundef %21) #2
%34 = icmp eq i64 %33, 0
br i1 %34, label %38, label %35
35: ; preds = %29
%36 = load i32, ptr @EAGAIN, align 4, !tbaa !5
%37 = sub nsw i32 0, %36
br label %40
38: ; preds = %29
store i32 0, ptr %2, align 4, !tbaa !9
%39 = tail call i32 @perf_pmu_enable(ptr noundef %0) #2
br label %40
40: ; preds = %38, %35, %26, %18, %5
%41 = phi i32 [ 0, %18 ], [ %28, %26 ], [ %37, %35 ], [ 0, %38 ], [ %7, %5 ]
ret i32 %41
}
declare ptr @this_cpu_ptr(ptr noundef) local_unnamed_addr #1
declare i32 @WARN_ON_ONCE(i32 noundef) local_unnamed_addr #1
declare i64 @check_excludes(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @sparc_check_constraints(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @perf_pmu_enable(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"cpu_hw_events", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!11 = !{!10, !6, i64 4}
!12 = !{!10, !6, i64 12}
!13 = !{!10, !6, i64 8}
|
; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_sparc_pmu_commit_txn.c'
source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_sparc_pmu_commit_txn.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cpu_hw_events = common global i32 0, align 4
@sparc_pmu = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@PERF_PMU_TXN_ADD = common local_unnamed_addr global i32 0, align 4
@EAGAIN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sparc_pmu_commit_txn], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @sparc_pmu_commit_txn(ptr noundef %0) #0 {
%2 = tail call ptr @this_cpu_ptr(ptr noundef nonnull @cpu_hw_events) #2
%3 = load i32, ptr @sparc_pmu, align 4, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, ptr @EINVAL, align 4, !tbaa !6
%7 = sub nsw i32 0, %6
br label %40
8: ; preds = %1
%9 = load i32, ptr %2, align 4, !tbaa !10
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
%12 = tail call i32 @WARN_ON_ONCE(i32 noundef %11) #2
%13 = load i32, ptr %2, align 4, !tbaa !10
%14 = load i32, ptr @PERF_PMU_TXN_ADD, align 4, !tbaa !6
%15 = xor i32 %14, -1
%16 = and i32 %13, %15
%17 = icmp eq i32 %16, 0
br i1 %17, label %19, label %18
18: ; preds = %8
store i32 0, ptr %2, align 4, !tbaa !10
br label %40
19: ; preds = %8
%20 = getelementptr inbounds i8, ptr %2, i64 4
%21 = load i32, ptr %20, align 4, !tbaa !12
%22 = getelementptr inbounds i8, ptr %2, i64 12
%23 = load i32, ptr %22, align 4, !tbaa !13
%24 = tail call i64 @check_excludes(i32 noundef %23, i32 noundef 0, i32 noundef %21) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %19
%27 = load i32, ptr @EINVAL, align 4, !tbaa !6
%28 = sub nsw i32 0, %27
br label %40
29: ; preds = %19
%30 = load i32, ptr %22, align 4, !tbaa !13
%31 = getelementptr inbounds i8, ptr %2, i64 8
%32 = load i32, ptr %31, align 4, !tbaa !14
%33 = tail call i64 @sparc_check_constraints(i32 noundef %30, i32 noundef %32, i32 noundef %21) #2
%34 = icmp eq i64 %33, 0
br i1 %34, label %38, label %35
35: ; preds = %29
%36 = load i32, ptr @EAGAIN, align 4, !tbaa !6
%37 = sub nsw i32 0, %36
br label %40
38: ; preds = %29
store i32 0, ptr %2, align 4, !tbaa !10
%39 = tail call i32 @perf_pmu_enable(ptr noundef %0) #2
br label %40
40: ; preds = %38, %35, %26, %18, %5
%41 = phi i32 [ 0, %18 ], [ %28, %26 ], [ %37, %35 ], [ 0, %38 ], [ %7, %5 ]
ret i32 %41
}
declare ptr @this_cpu_ptr(ptr noundef) local_unnamed_addr #1
declare i32 @WARN_ON_ONCE(i32 noundef) local_unnamed_addr #1
declare i64 @check_excludes(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @sparc_check_constraints(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @perf_pmu_enable(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"cpu_hw_events", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!12 = !{!11, !7, i64 4}
!13 = !{!11, !7, i64 12}
!14 = !{!11, !7, i64 8}
|
linux_arch_sparc_kernel_extr_perf_event.c_sparc_pmu_commit_txn
|
; ModuleID = 'AnghaBench/linux/drivers/staging/wilc1000/extr_wilc_hif.c_wilc_handle_roc_expired.c'
source_filename = "AnghaBench/linux/drivers/staging/wilc1000/extr_wilc_hif.c_wilc_handle_roc_expired.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wid = type { i32, ptr, i32, i32 }
%struct.wilc_vif = type { ptr, ptr }
%struct.TYPE_4__ = type { i32, ptr }
@WID_REMAIN_ON_CHAN = dso_local local_unnamed_addr global i32 0, align 4
@WID_STR = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@WILC_FALSE_FRMWR_CHANNEL = dso_local local_unnamed_addr global i32 0, align 4
@WILC_SET_CFG = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"Failed to set remain channel\0A\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [21 x i8] c"Not in listen state\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @wilc_handle_roc_expired], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @wilc_handle_roc_expired(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca %struct.wid, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #3
%4 = getelementptr inbounds %struct.wilc_vif, ptr %0, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = load ptr, ptr %0, align 8, !tbaa !10
%7 = load i32, ptr %6, align 4, !tbaa !11
%8 = tail call ptr @wdev_priv(i32 noundef %7) #3
%9 = load i64, ptr %8, align 8, !tbaa !14
%10 = icmp eq i64 %9, 0
br i1 %10, label %43, label %11
11: ; preds = %2
%12 = load i32, ptr @WID_REMAIN_ON_CHAN, align 4, !tbaa !17
%13 = getelementptr inbounds %struct.wid, ptr %3, i64 0, i32 3
store i32 %12, ptr %13, align 4, !tbaa !18
%14 = load i32, ptr @WID_STR, align 4, !tbaa !17
%15 = getelementptr inbounds %struct.wid, ptr %3, i64 0, i32 2
store i32 %14, ptr %15, align 8, !tbaa !20
store i32 2, ptr %3, align 8, !tbaa !21
%16 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !17
%17 = tail call ptr @kmalloc(i32 noundef 2, i32 noundef %16) #3
%18 = getelementptr inbounds %struct.wid, ptr %3, i64 0, i32 1
store ptr %17, ptr %18, align 8, !tbaa !22
%19 = icmp eq ptr %17, null
br i1 %19, label %20, label %23
20: ; preds = %11
%21 = load i32, ptr @ENOMEM, align 4, !tbaa !17
%22 = sub nsw i32 0, %21
br label %46
23: ; preds = %11
store i32 0, ptr %17, align 4, !tbaa !17
%24 = load i32, ptr @WILC_FALSE_FRMWR_CHANNEL, align 4, !tbaa !17
%25 = getelementptr inbounds i32, ptr %17, i64 1
store i32 %24, ptr %25, align 4, !tbaa !17
%26 = load i32, ptr @WILC_SET_CFG, align 4, !tbaa !17
%27 = call i32 @wilc_send_config_pkt(ptr noundef nonnull %0, i32 noundef %26, ptr noundef nonnull %3, i32 noundef 1) #3
%28 = load ptr, ptr %18, align 8, !tbaa !22
%29 = call i32 @kfree(ptr noundef %28) #3
%30 = icmp eq i32 %27, 0
br i1 %30, label %36, label %31
31: ; preds = %23
%32 = load ptr, ptr %0, align 8, !tbaa !10
%33 = call i32 @netdev_err(ptr noundef %32, ptr noundef nonnull @.str) #3
%34 = load i32, ptr @EINVAL, align 4, !tbaa !17
%35 = sub nsw i32 0, %34
br label %46
36: ; preds = %23
%37 = getelementptr inbounds %struct.TYPE_4__, ptr %5, i64 0, i32 1
%38 = load ptr, ptr %37, align 8, !tbaa !23
%39 = icmp eq ptr %38, null
br i1 %39, label %46, label %40
40: ; preds = %36
%41 = load i32, ptr %5, align 8, !tbaa !26
%42 = call i32 %38(i32 noundef %41, i32 noundef %1) #3
br label %46
43: ; preds = %2
%44 = load ptr, ptr %0, align 8, !tbaa !10
%45 = tail call i32 @netdev_dbg(ptr noundef %44, ptr noundef nonnull @.str.1) #3
br label %46
46: ; preds = %43, %40, %36, %31, %20
%47 = phi i32 [ %35, %31 ], [ %22, %20 ], [ 0, %36 ], [ 0, %40 ], [ 0, %43 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #3
ret i32 %47
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @wdev_priv(i32 noundef) local_unnamed_addr #2
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @wilc_send_config_pkt(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
declare i32 @netdev_err(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @netdev_dbg(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"wilc_vif", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_5__", !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"wilc_priv", !16, i64 0}
!16 = !{!"long", !8, i64 0}
!17 = !{!13, !13, i64 0}
!18 = !{!19, !13, i64 20}
!19 = !{!"wid", !13, i64 0, !7, i64 8, !13, i64 16, !13, i64 20}
!20 = !{!19, !13, i64 16}
!21 = !{!19, !13, i64 0}
!22 = !{!19, !7, i64 8}
!23 = !{!24, !7, i64 8}
!24 = !{!"host_if_drv", !25, i64 0}
!25 = !{!"TYPE_4__", !13, i64 0, !7, i64 8}
!26 = !{!24, !13, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/wilc1000/extr_wilc_hif.c_wilc_handle_roc_expired.c'
source_filename = "AnghaBench/linux/drivers/staging/wilc1000/extr_wilc_hif.c_wilc_handle_roc_expired.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.wid = type { i32, ptr, i32, i32 }
@WID_REMAIN_ON_CHAN = common local_unnamed_addr global i32 0, align 4
@WID_STR = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@WILC_FALSE_FRMWR_CHANNEL = common local_unnamed_addr global i32 0, align 4
@WILC_SET_CFG = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"Failed to set remain channel\0A\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [21 x i8] c"Not in listen state\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @wilc_handle_roc_expired], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @wilc_handle_roc_expired(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca %struct.wid, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #3
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = load ptr, ptr %0, align 8, !tbaa !11
%7 = load i32, ptr %6, align 4, !tbaa !12
%8 = tail call ptr @wdev_priv(i32 noundef %7) #3
%9 = load i64, ptr %8, align 8, !tbaa !15
%10 = icmp eq i64 %9, 0
br i1 %10, label %43, label %11
11: ; preds = %2
%12 = load i32, ptr @WID_REMAIN_ON_CHAN, align 4, !tbaa !18
%13 = getelementptr inbounds i8, ptr %3, i64 20
store i32 %12, ptr %13, align 4, !tbaa !19
%14 = load i32, ptr @WID_STR, align 4, !tbaa !18
%15 = getelementptr inbounds i8, ptr %3, i64 16
store i32 %14, ptr %15, align 8, !tbaa !21
store i32 2, ptr %3, align 8, !tbaa !22
%16 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !18
%17 = tail call ptr @kmalloc(i32 noundef 2, i32 noundef %16) #3
%18 = getelementptr inbounds i8, ptr %3, i64 8
store ptr %17, ptr %18, align 8, !tbaa !23
%19 = icmp eq ptr %17, null
br i1 %19, label %20, label %23
20: ; preds = %11
%21 = load i32, ptr @ENOMEM, align 4, !tbaa !18
%22 = sub nsw i32 0, %21
br label %46
23: ; preds = %11
store i32 0, ptr %17, align 4, !tbaa !18
%24 = load i32, ptr @WILC_FALSE_FRMWR_CHANNEL, align 4, !tbaa !18
%25 = getelementptr inbounds i8, ptr %17, i64 4
store i32 %24, ptr %25, align 4, !tbaa !18
%26 = load i32, ptr @WILC_SET_CFG, align 4, !tbaa !18
%27 = call i32 @wilc_send_config_pkt(ptr noundef nonnull %0, i32 noundef %26, ptr noundef nonnull %3, i32 noundef 1) #3
%28 = load ptr, ptr %18, align 8, !tbaa !23
%29 = call i32 @kfree(ptr noundef %28) #3
%30 = icmp eq i32 %27, 0
br i1 %30, label %36, label %31
31: ; preds = %23
%32 = load ptr, ptr %0, align 8, !tbaa !11
%33 = call i32 @netdev_err(ptr noundef %32, ptr noundef nonnull @.str) #3
%34 = load i32, ptr @EINVAL, align 4, !tbaa !18
%35 = sub nsw i32 0, %34
br label %46
36: ; preds = %23
%37 = getelementptr inbounds i8, ptr %5, i64 8
%38 = load ptr, ptr %37, align 8, !tbaa !24
%39 = icmp eq ptr %38, null
br i1 %39, label %46, label %40
40: ; preds = %36
%41 = load i32, ptr %5, align 8, !tbaa !27
%42 = call i32 %38(i32 noundef %41, i32 noundef %1) #3
br label %46
43: ; preds = %2
%44 = load ptr, ptr %0, align 8, !tbaa !11
%45 = tail call i32 @netdev_dbg(ptr noundef %44, ptr noundef nonnull @.str.1) #3
br label %46
46: ; preds = %43, %40, %36, %31, %20
%47 = phi i32 [ %35, %31 ], [ %22, %20 ], [ 0, %36 ], [ 0, %40 ], [ 0, %43 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #3
ret i32 %47
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @wdev_priv(i32 noundef) local_unnamed_addr #2
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @wilc_send_config_pkt(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
declare i32 @netdev_err(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @netdev_dbg(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"wilc_vif", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_5__", !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"wilc_priv", !17, i64 0}
!17 = !{!"long", !9, i64 0}
!18 = !{!14, !14, i64 0}
!19 = !{!20, !14, i64 20}
!20 = !{!"wid", !14, i64 0, !8, i64 8, !14, i64 16, !14, i64 20}
!21 = !{!20, !14, i64 16}
!22 = !{!20, !14, i64 0}
!23 = !{!20, !8, i64 8}
!24 = !{!25, !8, i64 8}
!25 = !{!"host_if_drv", !26, i64 0}
!26 = !{!"TYPE_4__", !14, i64 0, !8, i64 8}
!27 = !{!25, !14, i64 0}
|
linux_drivers_staging_wilc1000_extr_wilc_hif.c_wilc_handle_roc_expired
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/boot/extr_cpucheck.c_has_fpu.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/boot/extr_cpucheck.c_has_fpu.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@X86_CR0_EM = dso_local local_unnamed_addr global i32 0, align 4
@X86_CR0_TS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @has_fpu], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @has_fpu() #0 {
%1 = alloca i64, align 8
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #2
store i64 -1, ptr %1, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #2
store i64 -1, ptr %2, align 8, !tbaa !5
%3 = tail call i32 asm "movl %cr0,$0", "=r,~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !9
%4 = load i32, ptr @X86_CR0_EM, align 4, !tbaa !10
%5 = load i32, ptr @X86_CR0_TS, align 4, !tbaa !10
%6 = or i32 %5, %4
%7 = and i32 %6, %3
%8 = icmp eq i32 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %0
%10 = xor i32 %6, -1
%11 = and i32 %3, %10
tail call void asm sideeffect "movl $0,%cr0", "r,~{dirflag},~{fpsr},~{flags}"(i32 %11) #2, !srcloc !12
br label %12
12: ; preds = %9, %0
call void asm sideeffect "fninit ; fnstsw $0 ; fnstcw $1", "=*m,=*m,*m,*m,~{dirflag},~{fpsr},~{flags}"(ptr nonnull elementtype(i64) %2, ptr nonnull elementtype(i64) %1, ptr nonnull elementtype(i64) %2, ptr nonnull elementtype(i64) %1) #2, !srcloc !13
%13 = load i64, ptr %2, align 8, !tbaa !5
%14 = icmp eq i64 %13, 0
%15 = load i64, ptr %1, align 8
%16 = and i64 %15, 4159
%17 = icmp eq i64 %16, 63
%18 = select i1 %14, i1 %17, i1 false
%19 = zext i1 %18 to i32
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #2
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #2
ret i32 %19
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }
attributes #3 = { nounwind memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 566}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{i64 685}
!13 = !{i64 735}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/boot/extr_cpucheck.c_has_fpu.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/boot/extr_cpucheck.c_has_fpu.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@X86_CR0_EM = common local_unnamed_addr global i32 0, align 4
@X86_CR0_TS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @has_fpu], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @has_fpu() #0 {
%1 = alloca i64, align 8
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #2
store i64 -1, ptr %1, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #2
store i64 -1, ptr %2, align 8, !tbaa !6
%3 = tail call i32 asm "movl %cr0,$0", "=r"() #3, !srcloc !10
%4 = load i32, ptr @X86_CR0_EM, align 4, !tbaa !11
%5 = load i32, ptr @X86_CR0_TS, align 4, !tbaa !11
%6 = or i32 %5, %4
%7 = and i32 %6, %3
%8 = icmp eq i32 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %0
%10 = xor i32 %6, -1
%11 = and i32 %3, %10
tail call void asm sideeffect "movl $0,%cr0", "r"(i32 %11) #2, !srcloc !13
br label %12
12: ; preds = %9, %0
call void asm sideeffect "fninit ; fnstsw $0 ; fnstcw $1", "=*m,=*m,*m,*m"(ptr nonnull elementtype(i64) %2, ptr nonnull elementtype(i64) %1, ptr nonnull elementtype(i64) %2, ptr nonnull elementtype(i64) %1) #2, !srcloc !14
%13 = load i64, ptr %2, align 8, !tbaa !6
%14 = icmp eq i64 %13, 0
%15 = load i64, ptr %1, align 8
%16 = and i64 %15, 4159
%17 = icmp eq i64 %16, 63
%18 = select i1 %14, i1 %17, i1 false
%19 = zext i1 %18 to i32
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #2
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #2
ret i32 %19
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }
attributes #3 = { nounwind memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{i64 566}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{i64 685}
!14 = !{i64 735}
|
fastsocket_kernel_arch_x86_boot_extr_cpucheck.c_has_fpu
|
; ModuleID = 'AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/uiports/extr_xxxwin.c_ui_triblt.c'
source_filename = "AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/uiports/extr_xxxwin.c_ui_triblt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local void @ui_triblt(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr nocapture noundef readnone %8, i32 noundef %9, i32 noundef %10) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/uiports/extr_xxxwin.c_ui_triblt.c'
source_filename = "AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/uiports/extr_xxxwin.c_ui_triblt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @ui_triblt(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr nocapture noundef readnone %8, i32 noundef %9, i32 noundef %10) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
reactos_modules_rosapps_applications_net_tsclient_rdesktop_uiports_extr_xxxwin.c_ui_triblt
|
; ModuleID = 'AnghaBench/radare2/binr/rasign2/extr_rasign2.c_main.c'
source_filename = "AnghaBench/radare2/binr/rasign2/extr_rasign2.c_main.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [10 x i8] c"o:hrsj:iV\00", align 1
@.str.1 = private unnamed_addr constant [8 x i8] c"rasign2\00", align 1
@optind = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @main(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
br label %3
3: ; preds = %5, %2
%4 = tail call i32 @getopt(i32 noundef %0, ptr noundef %1, ptr noundef nonnull @.str) #2
switch i32 %4, label %8 [
i32 -1, label %10
i32 111, label %5
i32 115, label %5
i32 114, label %5
i32 106, label %5
i32 86, label %6
]
5: ; preds = %3, %3, %3, %3
br label %3, !llvm.loop !5
6: ; preds = %3
%7 = tail call i32 @blob_version(ptr noundef nonnull @.str.1) #2
br label %17
8: ; preds = %3
%9 = tail call i32 (...) @rasign_show_help() #2
br label %17
10: ; preds = %3
%11 = load i64, ptr @optind, align 8, !tbaa !7
%12 = getelementptr inbounds ptr, ptr %1, i64 %11
%13 = load ptr, ptr %12, align 8, !tbaa !11
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = tail call i32 (...) @rasign_show_help() #2
br label %17
17: ; preds = %10, %15, %8, %6
%18 = phi i32 [ %9, %8 ], [ %7, %6 ], [ %16, %15 ], [ 0, %10 ]
ret i32 %18
}
declare i32 @getopt(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @blob_version(ptr noundef) local_unnamed_addr #1
declare i32 @rasign_show_help(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
|
; ModuleID = 'AnghaBench/radare2/binr/rasign2/extr_rasign2.c_main.c'
source_filename = "AnghaBench/radare2/binr/rasign2/extr_rasign2.c_main.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [10 x i8] c"o:hrsj:iV\00", align 1
@.str.1 = private unnamed_addr constant [8 x i8] c"rasign2\00", align 1
@optind = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @main(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
br label %3
3: ; preds = %5, %2
%4 = tail call i32 @getopt(i32 noundef %0, ptr noundef %1, ptr noundef nonnull @.str) #2
switch i32 %4, label %8 [
i32 -1, label %10
i32 111, label %5
i32 115, label %5
i32 114, label %5
i32 106, label %5
i32 86, label %6
]
5: ; preds = %3, %3, %3, %3
br label %3, !llvm.loop !6
6: ; preds = %3
%7 = tail call i32 @blob_version(ptr noundef nonnull @.str.1) #2
br label %17
8: ; preds = %3
%9 = tail call i32 @rasign_show_help() #2
br label %17
10: ; preds = %3
%11 = load i64, ptr @optind, align 8, !tbaa !8
%12 = getelementptr inbounds ptr, ptr %1, i64 %11
%13 = load ptr, ptr %12, align 8, !tbaa !12
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = tail call i32 @rasign_show_help() #2
br label %17
17: ; preds = %10, %15, %8, %6
%18 = phi i32 [ %9, %8 ], [ %7, %6 ], [ %16, %15 ], [ 0, %10 ]
ret i32 %18
}
declare i32 @getopt(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @blob_version(ptr noundef) local_unnamed_addr #1
declare i32 @rasign_show_help(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
!8 = !{!9, !9, i64 0}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !10, i64 0}
|
radare2_binr_rasign2_extr_rasign2.c_main
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath6kl/extr_wmi.c_ath6kl_wmi_rssi_threshold_event_rx.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath6kl/extr_wmi.c_ath6kl_wmi_rssi_threshold_event_rx.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wmi_rssi_threshold_params_cmd = type { i32, i32, ptr, ptr }
%struct.wmi_rssi_threshold_event = type { i32, i64 }
%struct.sq_threshold_params = type { ptr, ptr, i32, i32, i32, i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@SIGNAL_QUALITY_METRICS_RSSI = dso_local local_unnamed_addr global i64 0, align 8
@ATH6KL_DBG_WMI = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [41 x i8] c"spurious upper rssi threshold event: %d\0A\00", align 1
@WMI_RSSI_THRESHOLD1_ABOVE = dso_local local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD2_ABOVE = dso_local local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD3_ABOVE = dso_local local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD4_ABOVE = dso_local local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD5_ABOVE = dso_local local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD6_ABOVE = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [44 x i8] c"spurious lower rssi threshold event: %d %d\0A\00", align 1
@WMI_RSSI_THRESHOLD6_BELOW = dso_local local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD5_BELOW = dso_local local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD4_BELOW = dso_local local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD3_BELOW = dso_local local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD2_BELOW = dso_local local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD1_BELOW = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [37 x i8] c"unable to configure rssi thresholds\0A\00", align 1
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ath6kl_wmi_rssi_threshold_event_rx], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ath6kl_wmi_rssi_threshold_event_rx(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 {
%4 = alloca %struct.wmi_rssi_threshold_params_cmd, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3
%5 = icmp ult i32 %2, 16
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @EINVAL, align 4, !tbaa !5
%8 = sub nsw i32 0, %7
br label %57
9: ; preds = %3
%10 = getelementptr inbounds %struct.wmi_rssi_threshold_event, ptr %1, i64 0, i32 1
%11 = load i64, ptr %10, align 8, !tbaa !9
%12 = load i32, ptr %1, align 8, !tbaa !12
%13 = tail call i64 @a_sle16_to_cpu(i32 noundef %12) #3
%14 = load ptr, ptr %0, align 8, !tbaa !13
%15 = load i64, ptr @SIGNAL_QUALITY_METRICS_RSSI, align 8, !tbaa !16
%16 = getelementptr inbounds %struct.sq_threshold_params, ptr %14, i64 %15
%17 = and i64 %11, 4294967295
%18 = icmp eq i64 %17, 0
br i1 %18, label %26, label %19
19: ; preds = %9
%20 = load ptr, ptr %16, align 8, !tbaa !17
%21 = load i64, ptr %20, align 8, !tbaa !16
%22 = icmp slt i64 %13, %21
br i1 %22, label %23, label %34
23: ; preds = %19
%24 = load i32, ptr @ATH6KL_DBG_WMI, align 4, !tbaa !5
%25 = tail call i32 (i32, ptr, i64, ...) @ath6kl_dbg(i32 noundef %24, ptr noundef nonnull @.str, i64 noundef %13) #3
br label %34
26: ; preds = %9
%27 = getelementptr inbounds %struct.sq_threshold_params, ptr %14, i64 %15, i32 1
%28 = load ptr, ptr %27, align 8, !tbaa !19
%29 = load i64, ptr %28, align 8, !tbaa !16
%30 = icmp sgt i64 %13, %29
br i1 %30, label %31, label %34
31: ; preds = %26
%32 = load i32, ptr @ATH6KL_DBG_WMI, align 4, !tbaa !5
%33 = tail call i32 (i32, ptr, i64, ...) @ath6kl_dbg(i32 noundef %32, ptr noundef nonnull @.str.1, i64 noundef %13, i64 noundef %29) #3
br label %34
34: ; preds = %26, %19, %31, %23
%35 = getelementptr inbounds %struct.sq_threshold_params, ptr %14, i64 %15, i32 5
%36 = load i32, ptr %35, align 4, !tbaa !20
%37 = tail call i32 @ath6kl_wmi_get_lower_threshold(i64 noundef %13, ptr noundef nonnull %16, i32 noundef %36) #3
%38 = getelementptr inbounds %struct.sq_threshold_params, ptr %14, i64 %15, i32 4
%39 = load i32, ptr %38, align 8, !tbaa !21
%40 = tail call i32 @ath6kl_wmi_get_upper_threshold(i64 noundef %13, ptr noundef nonnull %16, i32 noundef %39) #3
%41 = tail call ptr @a_cpu_to_sle16(i32 noundef %40) #3
%42 = getelementptr inbounds %struct.wmi_rssi_threshold_params_cmd, ptr %4, i64 0, i32 3
store ptr %41, ptr %42, align 8, !tbaa !22
%43 = tail call ptr @a_cpu_to_sle16(i32 noundef %37) #3
%44 = getelementptr inbounds %struct.wmi_rssi_threshold_params_cmd, ptr %4, i64 0, i32 2
store ptr %43, ptr %44, align 8, !tbaa !24
%45 = getelementptr inbounds %struct.sq_threshold_params, ptr %14, i64 %15, i32 3
%46 = load i32, ptr %45, align 4, !tbaa !25
%47 = getelementptr inbounds %struct.wmi_rssi_threshold_params_cmd, ptr %4, i64 0, i32 1
store i32 %46, ptr %47, align 4, !tbaa !26
%48 = getelementptr inbounds %struct.sq_threshold_params, ptr %14, i64 %15, i32 2
%49 = load i32, ptr %48, align 8, !tbaa !27
%50 = tail call i32 @cpu_to_le32(i32 noundef %49) #3
store i32 %50, ptr %4, align 8, !tbaa !28
%51 = call i32 @ath6kl_wmi_send_rssi_threshold_params(ptr noundef nonnull %0, ptr noundef nonnull %4) #3
%52 = icmp eq i32 %51, 0
br i1 %52, label %57, label %53
53: ; preds = %34
%54 = call i32 @ath6kl_err(ptr noundef nonnull @.str.2) #3
%55 = load i32, ptr @EIO, align 4, !tbaa !5
%56 = sub nsw i32 0, %55
br label %57
57: ; preds = %34, %53, %6
%58 = phi i32 [ %8, %6 ], [ %56, %53 ], [ 0, %34 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3
ret i32 %58
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @a_sle16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @ath6kl_dbg(i32 noundef, ptr noundef, i64 noundef, ...) local_unnamed_addr #2
declare i32 @ath6kl_wmi_get_lower_threshold(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ath6kl_wmi_get_upper_threshold(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @a_cpu_to_sle16(i32 noundef) local_unnamed_addr #2
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #2
declare i32 @ath6kl_wmi_send_rssi_threshold_params(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ath6kl_err(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"wmi_rssi_threshold_event", !6, i64 0, !11, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !6, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"wmi", !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!11, !11, i64 0}
!17 = !{!18, !15, i64 0}
!18 = !{!"sq_threshold_params", !15, i64 0, !15, i64 8, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28}
!19 = !{!18, !15, i64 8}
!20 = !{!18, !6, i64 28}
!21 = !{!18, !6, i64 24}
!22 = !{!23, !15, i64 16}
!23 = !{!"wmi_rssi_threshold_params_cmd", !6, i64 0, !6, i64 4, !15, i64 8, !15, i64 16}
!24 = !{!23, !15, i64 8}
!25 = !{!18, !6, i64 20}
!26 = !{!23, !6, i64 4}
!27 = !{!18, !6, i64 16}
!28 = !{!23, !6, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath6kl/extr_wmi.c_ath6kl_wmi_rssi_threshold_event_rx.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath6kl/extr_wmi.c_ath6kl_wmi_rssi_threshold_event_rx.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.wmi_rssi_threshold_params_cmd = type { i32, i32, ptr, ptr }
%struct.sq_threshold_params = type { ptr, ptr, i32, i32, i32, i32 }
@EINVAL = common local_unnamed_addr global i32 0, align 4
@SIGNAL_QUALITY_METRICS_RSSI = common local_unnamed_addr global i64 0, align 8
@ATH6KL_DBG_WMI = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [41 x i8] c"spurious upper rssi threshold event: %d\0A\00", align 1
@WMI_RSSI_THRESHOLD1_ABOVE = common local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD2_ABOVE = common local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD3_ABOVE = common local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD4_ABOVE = common local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD5_ABOVE = common local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD6_ABOVE = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [44 x i8] c"spurious lower rssi threshold event: %d %d\0A\00", align 1
@WMI_RSSI_THRESHOLD6_BELOW = common local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD5_BELOW = common local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD4_BELOW = common local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD3_BELOW = common local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD2_BELOW = common local_unnamed_addr global i32 0, align 4
@WMI_RSSI_THRESHOLD1_BELOW = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [37 x i8] c"unable to configure rssi thresholds\0A\00", align 1
@EIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ath6kl_wmi_rssi_threshold_event_rx], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @ath6kl_wmi_rssi_threshold_event_rx(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 {
%4 = alloca %struct.wmi_rssi_threshold_params_cmd, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3
%5 = icmp ult i32 %2, 16
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @EINVAL, align 4, !tbaa !6
%8 = sub nsw i32 0, %7
br label %57
9: ; preds = %3
%10 = getelementptr inbounds i8, ptr %1, i64 8
%11 = load i64, ptr %10, align 8, !tbaa !10
%12 = load i32, ptr %1, align 8, !tbaa !13
%13 = tail call i64 @a_sle16_to_cpu(i32 noundef %12) #3
%14 = load ptr, ptr %0, align 8, !tbaa !14
%15 = load i64, ptr @SIGNAL_QUALITY_METRICS_RSSI, align 8, !tbaa !17
%16 = getelementptr inbounds %struct.sq_threshold_params, ptr %14, i64 %15
%17 = and i64 %11, 4294967295
%18 = icmp eq i64 %17, 0
br i1 %18, label %26, label %19
19: ; preds = %9
%20 = load ptr, ptr %16, align 8, !tbaa !18
%21 = load i64, ptr %20, align 8, !tbaa !17
%22 = icmp slt i64 %13, %21
br i1 %22, label %23, label %34
23: ; preds = %19
%24 = load i32, ptr @ATH6KL_DBG_WMI, align 4, !tbaa !6
%25 = tail call i32 (i32, ptr, i64, ...) @ath6kl_dbg(i32 noundef %24, ptr noundef nonnull @.str, i64 noundef %13) #3
br label %34
26: ; preds = %9
%27 = getelementptr inbounds i8, ptr %16, i64 8
%28 = load ptr, ptr %27, align 8, !tbaa !20
%29 = load i64, ptr %28, align 8, !tbaa !17
%30 = icmp sgt i64 %13, %29
br i1 %30, label %31, label %34
31: ; preds = %26
%32 = load i32, ptr @ATH6KL_DBG_WMI, align 4, !tbaa !6
%33 = tail call i32 (i32, ptr, i64, ...) @ath6kl_dbg(i32 noundef %32, ptr noundef nonnull @.str.1, i64 noundef %13, i64 noundef %29) #3
br label %34
34: ; preds = %26, %19, %31, %23
%35 = getelementptr inbounds i8, ptr %16, i64 28
%36 = load i32, ptr %35, align 4, !tbaa !21
%37 = tail call i32 @ath6kl_wmi_get_lower_threshold(i64 noundef %13, ptr noundef nonnull %16, i32 noundef %36) #3
%38 = getelementptr inbounds i8, ptr %16, i64 24
%39 = load i32, ptr %38, align 8, !tbaa !22
%40 = tail call i32 @ath6kl_wmi_get_upper_threshold(i64 noundef %13, ptr noundef nonnull %16, i32 noundef %39) #3
%41 = tail call ptr @a_cpu_to_sle16(i32 noundef %40) #3
%42 = getelementptr inbounds i8, ptr %4, i64 16
store ptr %41, ptr %42, align 8, !tbaa !23
%43 = tail call ptr @a_cpu_to_sle16(i32 noundef %37) #3
%44 = getelementptr inbounds i8, ptr %4, i64 8
store ptr %43, ptr %44, align 8, !tbaa !25
%45 = getelementptr inbounds i8, ptr %16, i64 20
%46 = load i32, ptr %45, align 4, !tbaa !26
%47 = getelementptr inbounds i8, ptr %4, i64 4
store i32 %46, ptr %47, align 4, !tbaa !27
%48 = getelementptr inbounds i8, ptr %16, i64 16
%49 = load i32, ptr %48, align 8, !tbaa !28
%50 = tail call i32 @cpu_to_le32(i32 noundef %49) #3
store i32 %50, ptr %4, align 8, !tbaa !29
%51 = call i32 @ath6kl_wmi_send_rssi_threshold_params(ptr noundef nonnull %0, ptr noundef nonnull %4) #3
%52 = icmp eq i32 %51, 0
br i1 %52, label %57, label %53
53: ; preds = %34
%54 = call i32 @ath6kl_err(ptr noundef nonnull @.str.2) #3
%55 = load i32, ptr @EIO, align 4, !tbaa !6
%56 = sub nsw i32 0, %55
br label %57
57: ; preds = %34, %53, %6
%58 = phi i32 [ %8, %6 ], [ %56, %53 ], [ 0, %34 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3
ret i32 %58
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @a_sle16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @ath6kl_dbg(i32 noundef, ptr noundef, i64 noundef, ...) local_unnamed_addr #2
declare i32 @ath6kl_wmi_get_lower_threshold(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ath6kl_wmi_get_upper_threshold(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @a_cpu_to_sle16(i32 noundef) local_unnamed_addr #2
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #2
declare i32 @ath6kl_wmi_send_rssi_threshold_params(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ath6kl_err(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"wmi_rssi_threshold_event", !7, i64 0, !12, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !7, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"wmi", !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!12, !12, i64 0}
!18 = !{!19, !16, i64 0}
!19 = !{!"sq_threshold_params", !16, i64 0, !16, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28}
!20 = !{!19, !16, i64 8}
!21 = !{!19, !7, i64 28}
!22 = !{!19, !7, i64 24}
!23 = !{!24, !16, i64 16}
!24 = !{!"wmi_rssi_threshold_params_cmd", !7, i64 0, !7, i64 4, !16, i64 8, !16, i64 16}
!25 = !{!24, !16, i64 8}
!26 = !{!19, !7, i64 20}
!27 = !{!24, !7, i64 4}
!28 = !{!19, !7, i64 16}
!29 = !{!24, !7, i64 0}
|
linux_drivers_net_wireless_ath_ath6kl_extr_wmi.c_ath6kl_wmi_rssi_threshold_event_rx
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/host1x/hw/extr_hw_host1x05_sync.h_host1x_sync_cbread_r.c'
source_filename = "AnghaBench/linux/drivers/gpu/host1x/hw/extr_hw_host1x05_sync.h_host1x_sync_cbread_r.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@REGISTER_STRIDE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @host1x_sync_cbread_r], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @host1x_sync_cbread_r(i32 noundef %0) #0 {
%2 = load i32, ptr @REGISTER_STRIDE, align 4, !tbaa !5
%3 = mul i32 %2, %0
%4 = add i32 %3, 3200
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/host1x/hw/extr_hw_host1x05_sync.h_host1x_sync_cbread_r.c'
source_filename = "AnghaBench/linux/drivers/gpu/host1x/hw/extr_hw_host1x05_sync.h_host1x_sync_cbread_r.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REGISTER_STRIDE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @host1x_sync_cbread_r], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @host1x_sync_cbread_r(i32 noundef %0) #0 {
%2 = load i32, ptr @REGISTER_STRIDE, align 4, !tbaa !6
%3 = mul i32 %2, %0
%4 = add i32 %3, 3200
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_gpu_host1x_hw_extr_hw_host1x05_sync.h_host1x_sync_cbread_r
|
; ModuleID = 'AnghaBench/exploitdb/exploits/solaris/local/extr_2360.c_add_env.c'
source_filename = "AnghaBench/exploitdb/exploits/solaris/local/extr_2360.c_add_env.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@env = dso_local local_unnamed_addr global ptr null, align 8
@env_pos = dso_local local_unnamed_addr global i64 0, align 8
@env_len = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @add_env(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
%3 = load ptr, ptr @env, align 8, !tbaa !5
%4 = load i64, ptr @env_pos, align 8, !tbaa !9
%5 = getelementptr inbounds ptr, ptr %3, i64 %4
br i1 %2, label %6, label %7
6: ; preds = %1
store ptr null, ptr %5, align 8, !tbaa !5
br label %37
7: ; preds = %1
store ptr %0, ptr %5, align 8, !tbaa !5
%8 = tail call i32 @strlen(ptr noundef nonnull %0) #2
%9 = add nsw i32 %8, 1
%10 = load i32, ptr @env_len, align 4, !tbaa !11
%11 = add nsw i32 %9, %10
store i32 %11, ptr @env_len, align 4, !tbaa !11
%12 = load i64, ptr @env_pos, align 8, !tbaa !9
%13 = add i64 %12, 1
store i64 %13, ptr @env_pos, align 8, !tbaa !9
%14 = tail call i32 @strlen(ptr noundef nonnull %0) #2
%15 = add nsw i32 %14, 1
%16 = and i32 %15, 3
%17 = icmp eq i32 %16, 0
br i1 %17, label %37, label %18
18: ; preds = %7
%19 = tail call i32 @strlen(ptr noundef nonnull %0) #2
br label %20
20: ; preds = %18, %20
%21 = phi i32 [ %30, %20 ], [ 0, %18 ]
%22 = tail call i32 @strlen(ptr noundef nonnull %0) #2
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, ptr %0, i64 %23
%25 = load ptr, ptr @env, align 8, !tbaa !5
%26 = load i64, ptr @env_pos, align 8, !tbaa !9
%27 = getelementptr inbounds ptr, ptr %25, i64 %26
store ptr %24, ptr %27, align 8, !tbaa !5
%28 = load i32, ptr @env_len, align 4, !tbaa !11
%29 = add nsw i32 %28, 1
store i32 %29, ptr @env_len, align 4, !tbaa !11
%30 = add nuw nsw i32 %21, 1
%31 = add i64 %26, 1
store i64 %31, ptr @env_pos, align 8, !tbaa !9
%32 = tail call i32 @strlen(ptr noundef nonnull %0) #2
%33 = add nsw i32 %32, 1
%34 = srem i32 %33, 4
%35 = sub nsw i32 4, %34
%36 = icmp ult i32 %30, %35
br i1 %36, label %20, label %37, !llvm.loop !13
37: ; preds = %20, %7, %6
%38 = load i32, ptr @env_len, align 4, !tbaa !11
ret i32 %38
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/exploitdb/exploits/solaris/local/extr_2360.c_add_env.c'
source_filename = "AnghaBench/exploitdb/exploits/solaris/local/extr_2360.c_add_env.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@env = common local_unnamed_addr global ptr null, align 8
@env_pos = common local_unnamed_addr global i64 0, align 8
@env_len = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @add_env(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
%3 = load ptr, ptr @env, align 8, !tbaa !6
%4 = load i64, ptr @env_pos, align 8, !tbaa !10
%5 = getelementptr inbounds ptr, ptr %3, i64 %4
br i1 %2, label %6, label %7
6: ; preds = %1
store ptr null, ptr %5, align 8, !tbaa !6
br label %37
7: ; preds = %1
store ptr %0, ptr %5, align 8, !tbaa !6
%8 = tail call i32 @strlen(ptr noundef nonnull %0) #2
%9 = add nsw i32 %8, 1
%10 = load i32, ptr @env_len, align 4, !tbaa !12
%11 = add nsw i32 %9, %10
store i32 %11, ptr @env_len, align 4, !tbaa !12
%12 = load i64, ptr @env_pos, align 8, !tbaa !10
%13 = add i64 %12, 1
store i64 %13, ptr @env_pos, align 8, !tbaa !10
%14 = tail call i32 @strlen(ptr noundef nonnull %0) #2
%15 = add nsw i32 %14, 1
%16 = and i32 %15, 3
%17 = icmp eq i32 %16, 0
br i1 %17, label %37, label %18
18: ; preds = %7
%19 = tail call i32 @strlen(ptr noundef nonnull %0) #2
br label %20
20: ; preds = %18, %20
%21 = phi i32 [ %30, %20 ], [ 0, %18 ]
%22 = tail call i32 @strlen(ptr noundef nonnull %0) #2
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, ptr %0, i64 %23
%25 = load ptr, ptr @env, align 8, !tbaa !6
%26 = load i64, ptr @env_pos, align 8, !tbaa !10
%27 = getelementptr inbounds ptr, ptr %25, i64 %26
store ptr %24, ptr %27, align 8, !tbaa !6
%28 = load i32, ptr @env_len, align 4, !tbaa !12
%29 = add nsw i32 %28, 1
store i32 %29, ptr @env_len, align 4, !tbaa !12
%30 = add nuw nsw i32 %21, 1
%31 = add i64 %26, 1
store i64 %31, ptr @env_pos, align 8, !tbaa !10
%32 = tail call i32 @strlen(ptr noundef nonnull %0) #2
%33 = add nsw i32 %32, 1
%34 = srem i32 %33, 4
%35 = sub nsw i32 4, %34
%36 = icmp ult i32 %30, %35
br i1 %36, label %20, label %37, !llvm.loop !14
37: ; preds = %20, %7, %6
%38 = load i32, ptr @env_len, align 4, !tbaa !12
ret i32 %38
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
|
exploitdb_exploits_solaris_local_extr_2360.c_add_env
|
; ModuleID = 'AnghaBench/linux/drivers/staging/media/imx/extr_imx-media-capture.c_vidioc_querycap.c'
source_filename = "AnghaBench/linux/drivers/staging/media/imx/extr_imx-media-capture.c_vidioc_querycap.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.v4l2_capability = type { i32, i32, i32 }
@.str = private unnamed_addr constant [18 x i8] c"imx-media-capture\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c"platform:%s\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @vidioc_querycap], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @vidioc_querycap(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2) #0 {
%4 = tail call ptr @video_drvdata(ptr noundef %0) #2
%5 = getelementptr inbounds %struct.v4l2_capability, ptr %2, i64 0, i32 2
%6 = load i32, ptr %5, align 4, !tbaa !5
%7 = tail call i32 @strscpy(i32 noundef %6, ptr noundef nonnull @.str, i32 noundef 4) #2
%8 = getelementptr inbounds %struct.v4l2_capability, ptr %2, i64 0, i32 1
%9 = load i32, ptr %8, align 4, !tbaa !10
%10 = tail call i32 @strscpy(i32 noundef %9, ptr noundef nonnull @.str, i32 noundef 4) #2
%11 = load i32, ptr %2, align 4, !tbaa !11
%12 = load ptr, ptr %4, align 8, !tbaa !12
%13 = load ptr, ptr %12, align 8, !tbaa !15
%14 = tail call i32 @snprintf(i32 noundef %11, i32 noundef 4, ptr noundef nonnull @.str.1, ptr noundef %13) #2
ret i32 0
}
declare ptr @video_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @strscpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snprintf(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"v4l2_capability", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!6, !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"capture_priv", !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"TYPE_2__", !14, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/media/imx/extr_imx-media-capture.c_vidioc_querycap.c'
source_filename = "AnghaBench/linux/drivers/staging/media/imx/extr_imx-media-capture.c_vidioc_querycap.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [18 x i8] c"imx-media-capture\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c"platform:%s\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @vidioc_querycap], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @vidioc_querycap(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2) #0 {
%4 = tail call ptr @video_drvdata(ptr noundef %0) #2
%5 = getelementptr inbounds i8, ptr %2, i64 8
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = tail call i32 @strscpy(i32 noundef %6, ptr noundef nonnull @.str, i32 noundef 4) #2
%8 = getelementptr inbounds i8, ptr %2, i64 4
%9 = load i32, ptr %8, align 4, !tbaa !11
%10 = tail call i32 @strscpy(i32 noundef %9, ptr noundef nonnull @.str, i32 noundef 4) #2
%11 = load i32, ptr %2, align 4, !tbaa !12
%12 = load ptr, ptr %4, align 8, !tbaa !13
%13 = load ptr, ptr %12, align 8, !tbaa !16
%14 = tail call i32 @snprintf(i32 noundef %11, i32 noundef 4, ptr noundef nonnull @.str.1, ptr noundef %13) #2
ret i32 0
}
declare ptr @video_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @strscpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snprintf(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"v4l2_capability", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!7, !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"capture_priv", !15, i64 0}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!17, !15, i64 0}
!17 = !{!"TYPE_2__", !15, i64 0}
|
linux_drivers_staging_media_imx_extr_imx-media-capture.c_vidioc_querycap
|
; ModuleID = 'AnghaBench/radare2/libr/core/extr_panels.c___refresh_core_offset.c'
source_filename = "AnghaBench/radare2/libr/core/extr_panels.c___refresh_core_offset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { i32, ptr }
@PANEL_CMD_DISASSEMBLY = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @__refresh_core_offset(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call ptr @__get_cur_panel(ptr noundef %3) #2
%5 = load i32, ptr @PANEL_CMD_DISASSEMBLY, align 4, !tbaa !11
%6 = tail call i64 @__check_panel_type(ptr noundef %4, i32 noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load ptr, ptr %4, align 8, !tbaa !12
%10 = load i32, ptr %9, align 4, !tbaa !14
store i32 %10, ptr %0, align 8, !tbaa !16
br label %11
11: ; preds = %8, %1
ret void
}
declare ptr @__get_cur_panel(ptr noundef) local_unnamed_addr #1
declare i64 @__check_panel_type(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_9__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !10, i64 0}
!13 = !{!"TYPE_8__", !10, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"TYPE_7__", !7, i64 0}
!16 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/radare2/libr/core/extr_panels.c___refresh_core_offset.c'
source_filename = "AnghaBench/radare2/libr/core/extr_panels.c___refresh_core_offset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PANEL_CMD_DISASSEMBLY = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @__refresh_core_offset(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call ptr @__get_cur_panel(ptr noundef %3) #2
%5 = load i32, ptr @PANEL_CMD_DISASSEMBLY, align 4, !tbaa !12
%6 = tail call i64 @__check_panel_type(ptr noundef %4, i32 noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load ptr, ptr %4, align 8, !tbaa !13
%10 = load i32, ptr %9, align 4, !tbaa !15
store i32 %10, ptr %0, align 8, !tbaa !17
br label %11
11: ; preds = %8, %1
ret void
}
declare ptr @__get_cur_panel(ptr noundef) local_unnamed_addr #1
declare i64 @__check_panel_type(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_9__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"TYPE_8__", !11, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"TYPE_7__", !8, i64 0}
!17 = !{!7, !8, i64 0}
|
radare2_libr_core_extr_panels.c___refresh_core_offset
|
; ModuleID = 'AnghaBench/linux/drivers/power/supply/extr_ltc2941-battery-gauge.c_ltc294x_get_voltage.c'
source_filename = "AnghaBench/linux/drivers/power/supply/extr_ltc2941-battery-gauge.c_ltc294x_get_voltage.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ltc294x_info = type { i32, i32 }
@LTC294X_REG_VOLTAGE_MSB = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ltc294x_get_voltage], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ltc294x_get_voltage(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
%3 = alloca [2 x i32], align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = getelementptr inbounds %struct.ltc294x_info, ptr %0, i64 0, i32 1
%5 = load i32, ptr %4, align 4, !tbaa !5
%6 = load i32, ptr @LTC294X_REG_VOLTAGE_MSB, align 4, !tbaa !10
%7 = call i32 @ltc294x_read_regs(i32 noundef %5, i32 noundef %6, ptr noundef nonnull %3, i32 noundef 2) #3
%8 = load i32, ptr %3, align 4, !tbaa !10
%9 = getelementptr inbounds [2 x i32], ptr %3, i64 0, i64 1
%10 = load i32, ptr %9, align 4, !tbaa !10
%11 = load i32, ptr %0, align 4, !tbaa !11
switch i32 %11, label %13 [
i32 129, label %14
i32 128, label %12
]
12: ; preds = %2
br label %14
13: ; preds = %2
br label %14
14: ; preds = %2, %13, %12
%15 = phi i32 [ 60000, %13 ], [ 56640, %12 ], [ 47200, %2 ]
%16 = phi i32 [ 100, %13 ], [ 1250, %12 ], [ 500, %2 ]
%17 = shl i32 %8, 8
%18 = or i32 %17, %10
%19 = mul nsw i32 %18, %15
%20 = sdiv i32 %19, 65535
%21 = mul nsw i32 %20, %16
store i32 %21, ptr %1, align 4, !tbaa !10
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %7
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ltc294x_read_regs(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"ltc294x_info", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/power/supply/extr_ltc2941-battery-gauge.c_ltc294x_get_voltage.c'
source_filename = "AnghaBench/linux/drivers/power/supply/extr_ltc2941-battery-gauge.c_ltc294x_get_voltage.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LTC294X_REG_VOLTAGE_MSB = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ltc294x_get_voltage], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ltc294x_get_voltage(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
%3 = alloca [2 x i32], align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = getelementptr inbounds i8, ptr %0, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !6
%6 = load i32, ptr @LTC294X_REG_VOLTAGE_MSB, align 4, !tbaa !11
%7 = call i32 @ltc294x_read_regs(i32 noundef %5, i32 noundef %6, ptr noundef nonnull %3, i32 noundef 2) #3
%8 = load i32, ptr %3, align 4, !tbaa !11
%9 = getelementptr inbounds i8, ptr %3, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !11
%11 = load i32, ptr %0, align 4, !tbaa !12
switch i32 %11, label %13 [
i32 129, label %14
i32 128, label %12
]
12: ; preds = %2
br label %14
13: ; preds = %2
br label %14
14: ; preds = %2, %13, %12
%15 = phi i32 [ 60000, %13 ], [ 56640, %12 ], [ 47200, %2 ]
%16 = phi i32 [ 100, %13 ], [ 1250, %12 ], [ 500, %2 ]
%17 = shl i32 %8, 8
%18 = or i32 %17, %10
%19 = mul nsw i32 %18, %15
%20 = sdiv i32 %19, 65535
%21 = mul nsw i32 %20, %16
store i32 %21, ptr %1, align 4, !tbaa !11
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %7
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ltc294x_read_regs(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"ltc294x_info", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 0}
|
linux_drivers_power_supply_extr_ltc2941-battery-gauge.c_ltc294x_get_voltage
|
; ModuleID = 'AnghaBench/xLua/build/lua-5.3.3/src/extr_luac.c_writer.c'
source_filename = "AnghaBench/xLua/build/lua-5.3.3/src/extr_luac.c_writer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @writer], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @writer(ptr noundef %0, ptr noundef %1, i64 noundef %2, ptr noundef %3) #0 {
%5 = tail call i32 @UNUSED(ptr noundef %0) #2
%6 = tail call i32 @fwrite(ptr noundef %1, i64 noundef %2, i32 noundef 1, ptr noundef %3) #2
%7 = icmp ne i32 %6, 1
%8 = icmp ne i64 %2, 0
%9 = and i1 %8, %7
%10 = zext i1 %9 to i32
ret i32 %10
}
declare i32 @UNUSED(ptr noundef) local_unnamed_addr #1
declare i32 @fwrite(ptr noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/xLua/build/lua-5.3.3/src/extr_luac.c_writer.c'
source_filename = "AnghaBench/xLua/build/lua-5.3.3/src/extr_luac.c_writer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @writer], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @writer(ptr noundef %0, ptr noundef %1, i64 noundef %2, ptr noundef %3) #0 {
%5 = tail call i32 @UNUSED(ptr noundef %0) #2
%6 = tail call i32 @fwrite(ptr noundef %1, i64 noundef %2, i32 noundef 1, ptr noundef %3) #2
%7 = icmp ne i32 %6, 1
%8 = icmp ne i64 %2, 0
%9 = and i1 %8, %7
%10 = zext i1 %9 to i32
ret i32 %10
}
declare i32 @UNUSED(ptr noundef) local_unnamed_addr #1
declare i32 @fwrite(ptr noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
xLua_build_lua-5.3.3_src_extr_luac.c_writer
|
; ModuleID = 'AnghaBench/mpv/video/out/opengl/extr_context_glx.c_glx_uninit.c'
source_filename = "AnghaBench/mpv/video/out/opengl/extr_context_glx.c_glx_uninit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ra_ctx = type { ptr, ptr }
%struct.priv = type { i64, i64 }
@None = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @glx_uninit], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @glx_uninit(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.ra_ctx, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call i32 @ra_gl_ctx_uninit(ptr noundef %0) #2
%5 = getelementptr inbounds %struct.priv, ptr %3, i64 0, i32 1
%6 = load i64, ptr %5, align 8, !tbaa !10
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = tail call i32 @XFree(i64 noundef %6) #2
br label %10
10: ; preds = %8, %1
%11 = load i64, ptr %3, align 8, !tbaa !13
%12 = icmp eq i64 %11, 0
br i1 %12, label %21, label %13
13: ; preds = %10
%14 = load ptr, ptr %0, align 8, !tbaa !14
%15 = load ptr, ptr %14, align 8, !tbaa !15
%16 = load ptr, ptr %15, align 8, !tbaa !17
%17 = load i32, ptr @None, align 4, !tbaa !19
%18 = tail call i32 @glXMakeCurrent(ptr noundef %16, i32 noundef %17, ptr noundef null) #2
%19 = load i64, ptr %3, align 8, !tbaa !13
%20 = tail call i32 @glXDestroyContext(ptr noundef %16, i64 noundef %19) #2
br label %21
21: ; preds = %13, %10
%22 = load ptr, ptr %0, align 8, !tbaa !14
%23 = tail call i32 @vo_x11_uninit(ptr noundef %22) #2
ret void
}
declare i32 @ra_gl_ctx_uninit(ptr noundef) local_unnamed_addr #1
declare i32 @XFree(i64 noundef) local_unnamed_addr #1
declare i32 @glXMakeCurrent(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @glXDestroyContext(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @vo_x11_uninit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"ra_ctx", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"priv", !12, i64 0, !12, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 0}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"TYPE_4__", !7, i64 0}
!17 = !{!18, !7, i64 0}
!18 = !{!"TYPE_3__", !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/mpv/video/out/opengl/extr_context_glx.c_glx_uninit.c'
source_filename = "AnghaBench/mpv/video/out/opengl/extr_context_glx.c_glx_uninit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@None = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @glx_uninit], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @glx_uninit(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call i32 @ra_gl_ctx_uninit(ptr noundef %0) #2
%5 = getelementptr inbounds i8, ptr %3, i64 8
%6 = load i64, ptr %5, align 8, !tbaa !11
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = tail call i32 @XFree(i64 noundef %6) #2
br label %10
10: ; preds = %8, %1
%11 = load i64, ptr %3, align 8, !tbaa !14
%12 = icmp eq i64 %11, 0
br i1 %12, label %21, label %13
13: ; preds = %10
%14 = load ptr, ptr %0, align 8, !tbaa !15
%15 = load ptr, ptr %14, align 8, !tbaa !16
%16 = load ptr, ptr %15, align 8, !tbaa !18
%17 = load i32, ptr @None, align 4, !tbaa !20
%18 = tail call i32 @glXMakeCurrent(ptr noundef %16, i32 noundef %17, ptr noundef null) #2
%19 = load i64, ptr %3, align 8, !tbaa !14
%20 = tail call i32 @glXDestroyContext(ptr noundef %16, i64 noundef %19) #2
br label %21
21: ; preds = %13, %10
%22 = load ptr, ptr %0, align 8, !tbaa !15
%23 = tail call i32 @vo_x11_uninit(ptr noundef %22) #2
ret void
}
declare i32 @ra_gl_ctx_uninit(ptr noundef) local_unnamed_addr #1
declare i32 @XFree(i64 noundef) local_unnamed_addr #1
declare i32 @glXMakeCurrent(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @glXDestroyContext(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @vo_x11_uninit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"ra_ctx", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 8}
!12 = !{!"priv", !13, i64 0, !13, i64 8}
!13 = !{!"long", !9, i64 0}
!14 = !{!12, !13, i64 0}
!15 = !{!7, !8, i64 0}
!16 = !{!17, !8, i64 0}
!17 = !{!"TYPE_4__", !8, i64 0}
!18 = !{!19, !8, i64 0}
!19 = !{!"TYPE_3__", !8, i64 0}
!20 = !{!21, !21, i64 0}
!21 = !{!"int", !9, i64 0}
|
mpv_video_out_opengl_extr_context_glx.c_glx_uninit
|
; ModuleID = 'AnghaBench/linux/arch/arm/mach-exynos/extr_suspend.c_exynos_pmu_domain_translate.c'
source_filename = "AnghaBench/linux/arch/arm/mach-exynos/extr_suspend.c_exynos_pmu_domain_translate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.irq_fwspec = type { i32, ptr, i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @exynos_pmu_domain_translate], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @exynos_pmu_domain_translate(ptr nocapture readnone %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) #0 {
%5 = getelementptr inbounds %struct.irq_fwspec, ptr %1, i64 0, i32 2
%6 = load i32, ptr %5, align 8, !tbaa !5
%7 = tail call i64 @is_of_node(i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %29, label %9
9: ; preds = %4
%10 = load i32, ptr %1, align 8, !tbaa !11
%11 = icmp eq i32 %10, 3
br i1 %11, label %15, label %12
12: ; preds = %9
%13 = load i32, ptr @EINVAL, align 4, !tbaa !12
%14 = sub nsw i32 0, %13
br label %32
15: ; preds = %9
%16 = getelementptr inbounds %struct.irq_fwspec, ptr %1, i64 0, i32 1
%17 = load ptr, ptr %16, align 8, !tbaa !13
%18 = load i64, ptr %17, align 8, !tbaa !14
%19 = icmp eq i64 %18, 0
br i1 %19, label %23, label %20
20: ; preds = %15
%21 = load i32, ptr @EINVAL, align 4, !tbaa !12
%22 = sub nsw i32 0, %21
br label %32
23: ; preds = %15
%24 = getelementptr inbounds i64, ptr %17, i64 1
%25 = load i64, ptr %24, align 8, !tbaa !14
store i64 %25, ptr %2, align 8, !tbaa !14
%26 = getelementptr inbounds i64, ptr %17, i64 2
%27 = load i64, ptr %26, align 8, !tbaa !14
%28 = trunc i64 %27 to i32
store i32 %28, ptr %3, align 4, !tbaa !12
br label %32
29: ; preds = %4
%30 = load i32, ptr @EINVAL, align 4, !tbaa !12
%31 = sub nsw i32 0, %30
br label %32
32: ; preds = %29, %23, %20, %12
%33 = phi i32 [ %14, %12 ], [ %22, %20 ], [ 0, %23 ], [ %31, %29 ]
ret i32 %33
}
declare i64 @is_of_node(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"irq_fwspec", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !10, i64 8}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !8, i64 0}
|
; ModuleID = 'AnghaBench/linux/arch/arm/mach-exynos/extr_suspend.c_exynos_pmu_domain_translate.c'
source_filename = "AnghaBench/linux/arch/arm/mach-exynos/extr_suspend.c_exynos_pmu_domain_translate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @exynos_pmu_domain_translate], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @exynos_pmu_domain_translate(ptr nocapture readnone %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) #0 {
%5 = getelementptr inbounds i8, ptr %1, i64 16
%6 = load i32, ptr %5, align 8, !tbaa !6
%7 = tail call i64 @is_of_node(i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %29, label %9
9: ; preds = %4
%10 = load i32, ptr %1, align 8, !tbaa !12
%11 = icmp eq i32 %10, 3
br i1 %11, label %15, label %12
12: ; preds = %9
%13 = load i32, ptr @EINVAL, align 4, !tbaa !13
%14 = sub nsw i32 0, %13
br label %32
15: ; preds = %9
%16 = getelementptr inbounds i8, ptr %1, i64 8
%17 = load ptr, ptr %16, align 8, !tbaa !14
%18 = load i64, ptr %17, align 8, !tbaa !15
%19 = icmp eq i64 %18, 0
br i1 %19, label %23, label %20
20: ; preds = %15
%21 = load i32, ptr @EINVAL, align 4, !tbaa !13
%22 = sub nsw i32 0, %21
br label %32
23: ; preds = %15
%24 = getelementptr inbounds i8, ptr %17, i64 8
%25 = load i64, ptr %24, align 8, !tbaa !15
store i64 %25, ptr %2, align 8, !tbaa !15
%26 = getelementptr inbounds i8, ptr %17, i64 16
%27 = load i64, ptr %26, align 8, !tbaa !15
%28 = trunc i64 %27 to i32
store i32 %28, ptr %3, align 4, !tbaa !13
br label %32
29: ; preds = %4
%30 = load i32, ptr @EINVAL, align 4, !tbaa !13
%31 = sub nsw i32 0, %30
br label %32
32: ; preds = %29, %23, %20, %12
%33 = phi i32 [ %14, %12 ], [ %22, %20 ], [ 0, %23 ], [ %31, %29 ]
ret i32 %33
}
declare i64 @is_of_node(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"irq_fwspec", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !11, i64 8}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !9, i64 0}
|
linux_arch_arm_mach-exynos_extr_suspend.c_exynos_pmu_domain_translate
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/net/extr_claw.c_claw_adname_show.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/net/extr_claw.c_claw_adname_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @claw_adname_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @claw_adname_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @ENODEV, align 4, !tbaa !5
%8 = sub nsw i32 0, %7
br label %13
9: ; preds = %3
%10 = load ptr, ptr %4, align 8, !tbaa !9
%11 = load ptr, ptr %10, align 8, !tbaa !12
%12 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, ptr noundef %11) #2
br label %13
13: ; preds = %9, %6
%14 = phi i32 [ %12, %9 ], [ %8, %6 ]
ret i32 %14
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"claw_privbk", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"claw_env", !11, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/net/extr_claw.c_claw_adname_show.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/net/extr_claw.c_claw_adname_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENODEV = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @claw_adname_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @claw_adname_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @ENODEV, align 4, !tbaa !6
%8 = sub nsw i32 0, %7
br label %13
9: ; preds = %3
%10 = load ptr, ptr %4, align 8, !tbaa !10
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, ptr noundef %11) #2
br label %13
13: ; preds = %9, %6
%14 = phi i32 [ %12, %9 ], [ %8, %6 ]
ret i32 %14
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"claw_privbk", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"claw_env", !12, i64 0}
|
fastsocket_kernel_drivers_s390_net_extr_claw.c_claw_adname_show
|
; ModuleID = 'AnghaBench/vim.js/src/extr_os_msdos.c_mch_set_normal_colors.c'
source_filename = "AnghaBench/vim.js/src/extr_os_msdos.c_mch_set_normal_colors.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@orig_attr = dso_local local_unnamed_addr global i32 0, align 4
@cterm_normal_fg_color = dso_local local_unnamed_addr global i32 0, align 4
@cterm_normal_bg_color = dso_local local_unnamed_addr global i32 0, align 4
@T_ME = dso_local local_unnamed_addr global ptr null, align 8
@ESC = dso_local local_unnamed_addr global i8 0, align 1
; Function Attrs: nounwind uwtable
define dso_local void @mch_set_normal_colors() local_unnamed_addr #0 {
%1 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
%2 = load i32, ptr @orig_attr, align 4, !tbaa !5
%3 = and i32 %2, 15
%4 = add nuw nsw i32 %3, 1
store i32 %4, ptr @cterm_normal_fg_color, align 4, !tbaa !5
%5 = lshr i32 %2, 4
%6 = and i32 %5, 15
%7 = add nuw nsw i32 %6, 1
store i32 %7, ptr @cterm_normal_bg_color, align 4, !tbaa !5
%8 = load ptr, ptr @T_ME, align 8, !tbaa !9
%9 = load i8, ptr %8, align 1, !tbaa !11
%10 = load i8, ptr @ESC, align 1, !tbaa !11
%11 = icmp eq i8 %9, %10
br i1 %11, label %12, label %30
12: ; preds = %0
%13 = getelementptr inbounds i8, ptr %8, i64 1
%14 = load i8, ptr %13, align 1, !tbaa !11
%15 = icmp eq i8 %14, 124
br i1 %15, label %16, label %30
16: ; preds = %12
%17 = getelementptr inbounds i8, ptr %8, i64 2
store ptr %17, ptr %1, align 8, !tbaa !9
%18 = call i32 @getdigits(ptr noundef nonnull %1) #3
%19 = load ptr, ptr %1, align 8, !tbaa !9
%20 = load i8, ptr %19, align 1, !tbaa !11
%21 = icmp eq i8 %20, 109
%22 = icmp sgt i32 %18, 0
%23 = select i1 %21, i1 %22, i1 false
br i1 %23, label %24, label %30
24: ; preds = %16
%25 = and i32 %18, 15
%26 = add nuw nsw i32 %25, 1
store i32 %26, ptr @cterm_normal_fg_color, align 4, !tbaa !5
%27 = lshr i32 %18, 4
%28 = and i32 %27, 15
%29 = add nuw nsw i32 %28, 1
store i32 %29, ptr @cterm_normal_bg_color, align 4, !tbaa !5
br label %30
30: ; preds = %16, %24, %12, %0
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @getdigits(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/vim.js/src/extr_os_msdos.c_mch_set_normal_colors.c'
source_filename = "AnghaBench/vim.js/src/extr_os_msdos.c_mch_set_normal_colors.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@orig_attr = common local_unnamed_addr global i32 0, align 4
@cterm_normal_fg_color = common local_unnamed_addr global i32 0, align 4
@cterm_normal_bg_color = common local_unnamed_addr global i32 0, align 4
@T_ME = common local_unnamed_addr global ptr null, align 8
@ESC = common local_unnamed_addr global i8 0, align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @mch_set_normal_colors() local_unnamed_addr #0 {
%1 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
%2 = load i32, ptr @orig_attr, align 4, !tbaa !6
%3 = and i32 %2, 15
%4 = add nuw nsw i32 %3, 1
store i32 %4, ptr @cterm_normal_fg_color, align 4, !tbaa !6
%5 = lshr i32 %2, 4
%6 = and i32 %5, 15
%7 = add nuw nsw i32 %6, 1
store i32 %7, ptr @cterm_normal_bg_color, align 4, !tbaa !6
%8 = load ptr, ptr @T_ME, align 8, !tbaa !10
%9 = load i8, ptr %8, align 1, !tbaa !12
%10 = load i8, ptr @ESC, align 1, !tbaa !12
%11 = icmp eq i8 %9, %10
br i1 %11, label %12, label %30
12: ; preds = %0
%13 = getelementptr inbounds i8, ptr %8, i64 1
%14 = load i8, ptr %13, align 1, !tbaa !12
%15 = icmp eq i8 %14, 124
br i1 %15, label %16, label %30
16: ; preds = %12
%17 = getelementptr inbounds i8, ptr %8, i64 2
store ptr %17, ptr %1, align 8, !tbaa !10
%18 = call i32 @getdigits(ptr noundef nonnull %1) #3
%19 = load ptr, ptr %1, align 8, !tbaa !10
%20 = load i8, ptr %19, align 1, !tbaa !12
%21 = icmp eq i8 %20, 109
%22 = icmp sgt i32 %18, 0
%23 = select i1 %21, i1 %22, i1 false
br i1 %23, label %24, label %30
24: ; preds = %16
%25 = and i32 %18, 15
%26 = add nuw nsw i32 %25, 1
store i32 %26, ptr @cterm_normal_fg_color, align 4, !tbaa !6
%27 = lshr i32 %18, 4
%28 = and i32 %27, 15
%29 = add nuw nsw i32 %28, 1
store i32 %29, ptr @cterm_normal_bg_color, align 4, !tbaa !6
br label %30
30: ; preds = %16, %24, %12, %0
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @getdigits(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!8, !8, i64 0}
|
vim.js_src_extr_os_msdos.c_mch_set_normal_colors
|
; ModuleID = 'AnghaBench/linux/drivers/tty/ipwireless/extr_main.c_release_ipwireless.c'
source_filename = "AnghaBench/linux/drivers/tty/ipwireless/extr_main.c_release_ipwireless.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ipw_dev = type { ptr, i64, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @release_ipwireless], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @release_ipwireless(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load ptr, ptr %2, align 8, !tbaa !11
%4 = load ptr, ptr %3, align 8, !tbaa !13
%5 = load i32, ptr %4, align 4, !tbaa !14
%6 = tail call i32 @resource_size(ptr noundef nonnull %4) #2
%7 = tail call i32 @release_region(i32 noundef %5, i32 noundef %6) #2
%8 = getelementptr inbounds %struct.ipw_dev, ptr %0, i64 0, i32 2
%9 = load i64, ptr %8, align 8, !tbaa !17
%10 = icmp eq i64 %9, 0
br i1 %10, label %21, label %11
11: ; preds = %1
%12 = load ptr, ptr %0, align 8, !tbaa !5
%13 = load ptr, ptr %12, align 8, !tbaa !11
%14 = getelementptr inbounds ptr, ptr %13, i64 2
%15 = load ptr, ptr %14, align 8, !tbaa !13
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = tail call i32 @resource_size(ptr noundef nonnull %15) #2
%18 = tail call i32 @release_mem_region(i32 noundef %16, i32 noundef %17) #2
%19 = load i64, ptr %8, align 8, !tbaa !17
%20 = tail call i32 @iounmap(i64 noundef %19) #2
br label %21
21: ; preds = %11, %1
%22 = getelementptr inbounds %struct.ipw_dev, ptr %0, i64 0, i32 1
%23 = load i64, ptr %22, align 8, !tbaa !18
%24 = icmp eq i64 %23, 0
br i1 %24, label %35, label %25
25: ; preds = %21
%26 = load ptr, ptr %0, align 8, !tbaa !5
%27 = load ptr, ptr %26, align 8, !tbaa !11
%28 = getelementptr inbounds ptr, ptr %27, i64 3
%29 = load ptr, ptr %28, align 8, !tbaa !13
%30 = load i32, ptr %29, align 4, !tbaa !14
%31 = tail call i32 @resource_size(ptr noundef nonnull %29) #2
%32 = tail call i32 @release_mem_region(i32 noundef %30, i32 noundef %31) #2
%33 = load i64, ptr %22, align 8, !tbaa !18
%34 = tail call i32 @iounmap(i64 noundef %33) #2
br label %35
35: ; preds = %25, %21
%36 = load ptr, ptr %0, align 8, !tbaa !5
%37 = tail call i32 @pcmcia_disable_device(ptr noundef %36) #2
ret void
}
declare i32 @release_region(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @resource_size(ptr noundef) local_unnamed_addr #1
declare i32 @release_mem_region(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @iounmap(i64 noundef) local_unnamed_addr #1
declare i32 @pcmcia_disable_device(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ipw_dev", !7, i64 0, !10, i64 8, !10, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"TYPE_4__", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"TYPE_3__", !16, i64 0}
!16 = !{!"int", !8, i64 0}
!17 = !{!6, !10, i64 16}
!18 = !{!6, !10, i64 8}
|
; ModuleID = 'AnghaBench/linux/drivers/tty/ipwireless/extr_main.c_release_ipwireless.c'
source_filename = "AnghaBench/linux/drivers/tty/ipwireless/extr_main.c_release_ipwireless.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @release_ipwireless], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @release_ipwireless(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load ptr, ptr %2, align 8, !tbaa !12
%4 = load ptr, ptr %3, align 8, !tbaa !14
%5 = load i32, ptr %4, align 4, !tbaa !15
%6 = tail call i32 @resource_size(ptr noundef nonnull %4) #2
%7 = tail call i32 @release_region(i32 noundef %5, i32 noundef %6) #2
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = load i64, ptr %8, align 8, !tbaa !18
%10 = icmp eq i64 %9, 0
br i1 %10, label %21, label %11
11: ; preds = %1
%12 = load ptr, ptr %0, align 8, !tbaa !6
%13 = load ptr, ptr %12, align 8, !tbaa !12
%14 = getelementptr inbounds i8, ptr %13, i64 16
%15 = load ptr, ptr %14, align 8, !tbaa !14
%16 = load i32, ptr %15, align 4, !tbaa !15
%17 = tail call i32 @resource_size(ptr noundef nonnull %15) #2
%18 = tail call i32 @release_mem_region(i32 noundef %16, i32 noundef %17) #2
%19 = load i64, ptr %8, align 8, !tbaa !18
%20 = tail call i32 @iounmap(i64 noundef %19) #2
br label %21
21: ; preds = %11, %1
%22 = getelementptr inbounds i8, ptr %0, i64 8
%23 = load i64, ptr %22, align 8, !tbaa !19
%24 = icmp eq i64 %23, 0
br i1 %24, label %35, label %25
25: ; preds = %21
%26 = load ptr, ptr %0, align 8, !tbaa !6
%27 = load ptr, ptr %26, align 8, !tbaa !12
%28 = getelementptr inbounds i8, ptr %27, i64 24
%29 = load ptr, ptr %28, align 8, !tbaa !14
%30 = load i32, ptr %29, align 4, !tbaa !15
%31 = tail call i32 @resource_size(ptr noundef nonnull %29) #2
%32 = tail call i32 @release_mem_region(i32 noundef %30, i32 noundef %31) #2
%33 = load i64, ptr %22, align 8, !tbaa !19
%34 = tail call i32 @iounmap(i64 noundef %33) #2
br label %35
35: ; preds = %25, %21
%36 = load ptr, ptr %0, align 8, !tbaa !6
%37 = tail call i32 @pcmcia_disable_device(ptr noundef %36) #2
ret void
}
declare i32 @release_region(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @resource_size(ptr noundef) local_unnamed_addr #1
declare i32 @release_mem_region(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @iounmap(i64 noundef) local_unnamed_addr #1
declare i32 @pcmcia_disable_device(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ipw_dev", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_4__", !8, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"TYPE_3__", !17, i64 0}
!17 = !{!"int", !9, i64 0}
!18 = !{!7, !11, i64 16}
!19 = !{!7, !11, i64 8}
|
linux_drivers_tty_ipwireless_extr_main.c_release_ipwireless
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/bt8xx/extr_bttv-audio-hook.c_pvbt878p9b_audio.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/bt8xx/extr_bttv-audio-hook.c_pvbt878p9b_audio.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@V4L2_TUNER_MODE_MONO = dso_local local_unnamed_addr global i32 0, align 4
@V4L2_TUNER_MODE_LANG1 = dso_local local_unnamed_addr global i32 0, align 4
@V4L2_TUNER_MODE_LANG2 = dso_local local_unnamed_addr global i32 0, align 4
@V4L2_TUNER_MODE_STEREO = dso_local local_unnamed_addr global i32 0, align 4
@bttv_gpio = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [11 x i8] c"pvbt878p9b\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @pvbt878p9b_audio(ptr noundef %0, ptr nocapture noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i64, ptr %0, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %39
6: ; preds = %3
%7 = icmp eq i32 %2, 0
br i1 %7, label %31, label %8
8: ; preds = %6
%9 = load i32, ptr %1, align 4, !tbaa !10
%10 = load i32, ptr @V4L2_TUNER_MODE_LANG1, align 4, !tbaa !13
%11 = load i32, ptr @V4L2_TUNER_MODE_LANG2, align 4, !tbaa !13
%12 = or i32 %11, %10
%13 = and i32 %12, %9
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %24
15: ; preds = %8
%16 = load i32, ptr @V4L2_TUNER_MODE_MONO, align 4, !tbaa !13
%17 = and i32 %16, %9
%18 = icmp ne i32 %17, 0
%19 = load i32, ptr @V4L2_TUNER_MODE_STEREO, align 4, !tbaa !13
%20 = and i32 %19, %9
%21 = icmp ne i32 %20, 0
%22 = select i1 %21, i1 true, i1 %18
%23 = select i1 %21, i32 2, i32 1
br i1 %22, label %24, label %39
24: ; preds = %15, %8
%25 = phi i32 [ 2, %8 ], [ %23, %15 ]
%26 = tail call i32 @gpio_bits(i32 noundef 3, i32 noundef %25) #2
%27 = load i64, ptr @bttv_gpio, align 8, !tbaa !14
%28 = icmp eq i64 %27, 0
br i1 %28, label %39, label %29
29: ; preds = %24
%30 = tail call i32 @bttv_gpio_tracking(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
br label %39
31: ; preds = %6
%32 = load i32, ptr @V4L2_TUNER_MODE_MONO, align 4, !tbaa !13
%33 = load i32, ptr @V4L2_TUNER_MODE_STEREO, align 4, !tbaa !13
%34 = or i32 %33, %32
%35 = load i32, ptr @V4L2_TUNER_MODE_LANG1, align 4, !tbaa !13
%36 = or i32 %34, %35
%37 = load i32, ptr @V4L2_TUNER_MODE_LANG2, align 4, !tbaa !13
%38 = or i32 %36, %37
store i32 %38, ptr %1, align 4, !tbaa !10
br label %39
39: ; preds = %15, %31, %24, %29, %3
ret void
}
declare i32 @gpio_bits(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bttv_gpio_tracking(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bttv", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"v4l2_tuner", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/bt8xx/extr_bttv-audio-hook.c_pvbt878p9b_audio.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/bt8xx/extr_bttv-audio-hook.c_pvbt878p9b_audio.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@V4L2_TUNER_MODE_MONO = common local_unnamed_addr global i32 0, align 4
@V4L2_TUNER_MODE_LANG1 = common local_unnamed_addr global i32 0, align 4
@V4L2_TUNER_MODE_LANG2 = common local_unnamed_addr global i32 0, align 4
@V4L2_TUNER_MODE_STEREO = common local_unnamed_addr global i32 0, align 4
@bttv_gpio = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [11 x i8] c"pvbt878p9b\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @pvbt878p9b_audio(ptr noundef %0, ptr nocapture noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i64, ptr %0, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %39
6: ; preds = %3
%7 = icmp eq i32 %2, 0
br i1 %7, label %31, label %8
8: ; preds = %6
%9 = load i32, ptr %1, align 4, !tbaa !11
%10 = load i32, ptr @V4L2_TUNER_MODE_LANG1, align 4, !tbaa !14
%11 = load i32, ptr @V4L2_TUNER_MODE_LANG2, align 4, !tbaa !14
%12 = or i32 %11, %10
%13 = and i32 %12, %9
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %24
15: ; preds = %8
%16 = load i32, ptr @V4L2_TUNER_MODE_MONO, align 4, !tbaa !14
%17 = and i32 %16, %9
%18 = icmp ne i32 %17, 0
%19 = load i32, ptr @V4L2_TUNER_MODE_STEREO, align 4, !tbaa !14
%20 = and i32 %19, %9
%21 = icmp ne i32 %20, 0
%22 = select i1 %21, i1 true, i1 %18
%23 = select i1 %21, i32 2, i32 1
br i1 %22, label %24, label %39
24: ; preds = %15, %8
%25 = phi i32 [ 2, %8 ], [ %23, %15 ]
%26 = tail call i32 @gpio_bits(i32 noundef 3, i32 noundef %25) #2
%27 = load i64, ptr @bttv_gpio, align 8, !tbaa !15
%28 = icmp eq i64 %27, 0
br i1 %28, label %39, label %29
29: ; preds = %24
%30 = tail call i32 @bttv_gpio_tracking(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
br label %39
31: ; preds = %6
%32 = load i32, ptr @V4L2_TUNER_MODE_MONO, align 4, !tbaa !14
%33 = load i32, ptr @V4L2_TUNER_MODE_STEREO, align 4, !tbaa !14
%34 = or i32 %33, %32
%35 = load i32, ptr @V4L2_TUNER_MODE_LANG1, align 4, !tbaa !14
%36 = or i32 %34, %35
%37 = load i32, ptr @V4L2_TUNER_MODE_LANG2, align 4, !tbaa !14
%38 = or i32 %36, %37
store i32 %38, ptr %1, align 4, !tbaa !11
br label %39
39: ; preds = %15, %31, %24, %29, %3
ret void
}
declare i32 @gpio_bits(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bttv_gpio_tracking(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"bttv", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"v4l2_tuner", !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!8, !8, i64 0}
|
fastsocket_kernel_drivers_media_video_bt8xx_extr_bttv-audio-hook.c_pvbt878p9b_audio
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/ale/extr_if_ale.c_ale_phy_reset.c'
source_filename = "AnghaBench/freebsd/sys/dev/ale/extr_if_ale.c_ale_phy_reset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ale_softc = type { i32, i32 }
@ALE_GPHY_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@GPHY_CTRL_HIB_EN = dso_local local_unnamed_addr global i32 0, align 4
@GPHY_CTRL_HIB_PULSE = dso_local local_unnamed_addr global i32 0, align 4
@GPHY_CTRL_SEL_ANA_RESET = dso_local local_unnamed_addr global i32 0, align 4
@GPHY_CTRL_PHY_PLL_ON = dso_local local_unnamed_addr global i32 0, align 4
@GPHY_CTRL_EXT_RESET = dso_local local_unnamed_addr global i32 0, align 4
@ATPHY_DBG_ADDR = dso_local local_unnamed_addr global i32 0, align 4
@ATPHY_DBG_DATA = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ale_phy_reset], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ale_phy_reset(ptr noundef %0) #0 {
%2 = load i32, ptr @ALE_GPHY_CTRL, align 4, !tbaa !5
%3 = load i32, ptr @GPHY_CTRL_HIB_EN, align 4, !tbaa !5
%4 = load i32, ptr @GPHY_CTRL_HIB_PULSE, align 4, !tbaa !5
%5 = or i32 %4, %3
%6 = load i32, ptr @GPHY_CTRL_SEL_ANA_RESET, align 4, !tbaa !5
%7 = or i32 %5, %6
%8 = load i32, ptr @GPHY_CTRL_PHY_PLL_ON, align 4, !tbaa !5
%9 = or i32 %7, %8
%10 = tail call i32 @CSR_WRITE_2(ptr noundef %0, i32 noundef %2, i32 noundef %9) #2
%11 = tail call i32 @DELAY(i32 noundef 1000) #2
%12 = load i32, ptr @ALE_GPHY_CTRL, align 4, !tbaa !5
%13 = load i32, ptr @GPHY_CTRL_EXT_RESET, align 4, !tbaa !5
%14 = load i32, ptr @GPHY_CTRL_HIB_EN, align 4, !tbaa !5
%15 = or i32 %14, %13
%16 = load i32, ptr @GPHY_CTRL_HIB_PULSE, align 4, !tbaa !5
%17 = or i32 %15, %16
%18 = load i32, ptr @GPHY_CTRL_SEL_ANA_RESET, align 4, !tbaa !5
%19 = or i32 %17, %18
%20 = load i32, ptr @GPHY_CTRL_PHY_PLL_ON, align 4, !tbaa !5
%21 = or i32 %19, %20
%22 = tail call i32 @CSR_WRITE_2(ptr noundef %0, i32 noundef %12, i32 noundef %21) #2
%23 = tail call i32 @DELAY(i32 noundef 1000) #2
%24 = getelementptr inbounds %struct.ale_softc, ptr %0, i64 0, i32 1
%25 = load i32, ptr %24, align 4, !tbaa !9
%26 = load i32, ptr %0, align 4, !tbaa !11
%27 = tail call i32 @ale_miibus_writereg(i32 noundef %25, i32 noundef %26, i32 noundef 29, i32 noundef 11) #2
%28 = load i32, ptr %24, align 4, !tbaa !9
%29 = load i32, ptr %0, align 4, !tbaa !11
%30 = tail call i32 @ale_miibus_writereg(i32 noundef %28, i32 noundef %29, i32 noundef 30, i32 noundef 48128) #2
%31 = load i32, ptr %24, align 4, !tbaa !9
%32 = load i32, ptr %0, align 4, !tbaa !11
%33 = tail call i32 @ale_miibus_writereg(i32 noundef %31, i32 noundef %32, i32 noundef 29, i32 noundef 0) #2
%34 = load i32, ptr %24, align 4, !tbaa !9
%35 = load i32, ptr %0, align 4, !tbaa !11
%36 = tail call i32 @ale_miibus_writereg(i32 noundef %34, i32 noundef %35, i32 noundef 30, i32 noundef 751) #2
%37 = load i32, ptr %24, align 4, !tbaa !9
%38 = load i32, ptr %0, align 4, !tbaa !11
%39 = tail call i32 @ale_miibus_writereg(i32 noundef %37, i32 noundef %38, i32 noundef 29, i32 noundef 18) #2
%40 = load i32, ptr %24, align 4, !tbaa !9
%41 = load i32, ptr %0, align 4, !tbaa !11
%42 = tail call i32 @ale_miibus_writereg(i32 noundef %40, i32 noundef %41, i32 noundef 30, i32 noundef 19460) #2
%43 = load i32, ptr %24, align 4, !tbaa !9
%44 = load i32, ptr %0, align 4, !tbaa !11
%45 = tail call i32 @ale_miibus_writereg(i32 noundef %43, i32 noundef %44, i32 noundef 29, i32 noundef 4) #2
%46 = load i32, ptr %24, align 4, !tbaa !9
%47 = load i32, ptr %0, align 4, !tbaa !11
%48 = tail call i32 @ale_miibus_writereg(i32 noundef %46, i32 noundef %47, i32 noundef 29, i32 noundef 35771) #2
%49 = load i32, ptr %24, align 4, !tbaa !9
%50 = load i32, ptr %0, align 4, !tbaa !11
%51 = tail call i32 @ale_miibus_writereg(i32 noundef %49, i32 noundef %50, i32 noundef 29, i32 noundef 5) #2
%52 = load i32, ptr %24, align 4, !tbaa !9
%53 = load i32, ptr %0, align 4, !tbaa !11
%54 = tail call i32 @ale_miibus_writereg(i32 noundef %52, i32 noundef %53, i32 noundef 29, i32 noundef 11334) #2
%55 = tail call i32 @DELAY(i32 noundef 1000) #2
ret void
}
declare i32 @CSR_WRITE_2(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DELAY(i32 noundef) local_unnamed_addr #1
declare i32 @ale_miibus_writereg(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"ale_softc", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/ale/extr_if_ale.c_ale_phy_reset.c'
source_filename = "AnghaBench/freebsd/sys/dev/ale/extr_if_ale.c_ale_phy_reset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ALE_GPHY_CTRL = common local_unnamed_addr global i32 0, align 4
@GPHY_CTRL_HIB_EN = common local_unnamed_addr global i32 0, align 4
@GPHY_CTRL_HIB_PULSE = common local_unnamed_addr global i32 0, align 4
@GPHY_CTRL_SEL_ANA_RESET = common local_unnamed_addr global i32 0, align 4
@GPHY_CTRL_PHY_PLL_ON = common local_unnamed_addr global i32 0, align 4
@GPHY_CTRL_EXT_RESET = common local_unnamed_addr global i32 0, align 4
@ATPHY_DBG_ADDR = common local_unnamed_addr global i32 0, align 4
@ATPHY_DBG_DATA = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ale_phy_reset], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ale_phy_reset(ptr noundef %0) #0 {
%2 = load i32, ptr @ALE_GPHY_CTRL, align 4, !tbaa !6
%3 = load i32, ptr @GPHY_CTRL_HIB_EN, align 4, !tbaa !6
%4 = load i32, ptr @GPHY_CTRL_HIB_PULSE, align 4, !tbaa !6
%5 = or i32 %4, %3
%6 = load i32, ptr @GPHY_CTRL_SEL_ANA_RESET, align 4, !tbaa !6
%7 = or i32 %5, %6
%8 = load i32, ptr @GPHY_CTRL_PHY_PLL_ON, align 4, !tbaa !6
%9 = or i32 %7, %8
%10 = tail call i32 @CSR_WRITE_2(ptr noundef %0, i32 noundef %2, i32 noundef %9) #2
%11 = tail call i32 @DELAY(i32 noundef 1000) #2
%12 = load i32, ptr @ALE_GPHY_CTRL, align 4, !tbaa !6
%13 = load i32, ptr @GPHY_CTRL_EXT_RESET, align 4, !tbaa !6
%14 = load i32, ptr @GPHY_CTRL_HIB_EN, align 4, !tbaa !6
%15 = or i32 %14, %13
%16 = load i32, ptr @GPHY_CTRL_HIB_PULSE, align 4, !tbaa !6
%17 = or i32 %15, %16
%18 = load i32, ptr @GPHY_CTRL_SEL_ANA_RESET, align 4, !tbaa !6
%19 = or i32 %17, %18
%20 = load i32, ptr @GPHY_CTRL_PHY_PLL_ON, align 4, !tbaa !6
%21 = or i32 %19, %20
%22 = tail call i32 @CSR_WRITE_2(ptr noundef %0, i32 noundef %12, i32 noundef %21) #2
%23 = tail call i32 @DELAY(i32 noundef 1000) #2
%24 = getelementptr inbounds i8, ptr %0, i64 4
%25 = load i32, ptr %24, align 4, !tbaa !10
%26 = load i32, ptr %0, align 4, !tbaa !12
%27 = tail call i32 @ale_miibus_writereg(i32 noundef %25, i32 noundef %26, i32 noundef 29, i32 noundef 11) #2
%28 = load i32, ptr %24, align 4, !tbaa !10
%29 = load i32, ptr %0, align 4, !tbaa !12
%30 = tail call i32 @ale_miibus_writereg(i32 noundef %28, i32 noundef %29, i32 noundef 30, i32 noundef 48128) #2
%31 = load i32, ptr %24, align 4, !tbaa !10
%32 = load i32, ptr %0, align 4, !tbaa !12
%33 = tail call i32 @ale_miibus_writereg(i32 noundef %31, i32 noundef %32, i32 noundef 29, i32 noundef 0) #2
%34 = load i32, ptr %24, align 4, !tbaa !10
%35 = load i32, ptr %0, align 4, !tbaa !12
%36 = tail call i32 @ale_miibus_writereg(i32 noundef %34, i32 noundef %35, i32 noundef 30, i32 noundef 751) #2
%37 = load i32, ptr %24, align 4, !tbaa !10
%38 = load i32, ptr %0, align 4, !tbaa !12
%39 = tail call i32 @ale_miibus_writereg(i32 noundef %37, i32 noundef %38, i32 noundef 29, i32 noundef 18) #2
%40 = load i32, ptr %24, align 4, !tbaa !10
%41 = load i32, ptr %0, align 4, !tbaa !12
%42 = tail call i32 @ale_miibus_writereg(i32 noundef %40, i32 noundef %41, i32 noundef 30, i32 noundef 19460) #2
%43 = load i32, ptr %24, align 4, !tbaa !10
%44 = load i32, ptr %0, align 4, !tbaa !12
%45 = tail call i32 @ale_miibus_writereg(i32 noundef %43, i32 noundef %44, i32 noundef 29, i32 noundef 4) #2
%46 = load i32, ptr %24, align 4, !tbaa !10
%47 = load i32, ptr %0, align 4, !tbaa !12
%48 = tail call i32 @ale_miibus_writereg(i32 noundef %46, i32 noundef %47, i32 noundef 29, i32 noundef 35771) #2
%49 = load i32, ptr %24, align 4, !tbaa !10
%50 = load i32, ptr %0, align 4, !tbaa !12
%51 = tail call i32 @ale_miibus_writereg(i32 noundef %49, i32 noundef %50, i32 noundef 29, i32 noundef 5) #2
%52 = load i32, ptr %24, align 4, !tbaa !10
%53 = load i32, ptr %0, align 4, !tbaa !12
%54 = tail call i32 @ale_miibus_writereg(i32 noundef %52, i32 noundef %53, i32 noundef 29, i32 noundef 11334) #2
%55 = tail call i32 @DELAY(i32 noundef 1000) #2
ret void
}
declare i32 @CSR_WRITE_2(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DELAY(i32 noundef) local_unnamed_addr #1
declare i32 @ale_miibus_writereg(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"ale_softc", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 0}
|
freebsd_sys_dev_ale_extr_if_ale.c_ale_phy_reset
|
; ModuleID = 'AnghaBench/linux/drivers/tty/hvc/extr_hvc_irq.c_hvc_handle_interrupt.c'
source_filename = "AnghaBench/linux/drivers/tty/hvc/extr_hvc_irq.c_hvc_handle_interrupt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @hvc_handle_interrupt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @hvc_handle_interrupt(i32 %0, ptr noundef %1) #0 {
%3 = tail call i64 @hvc_poll(ptr noundef %1) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 (...) @hvc_kick() #2
br label %7
7: ; preds = %5, %2
%8 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !5
ret i32 %8
}
declare i64 @hvc_poll(ptr noundef) local_unnamed_addr #1
declare i32 @hvc_kick(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/tty/hvc/extr_hvc_irq.c_hvc_handle_interrupt.c'
source_filename = "AnghaBench/linux/drivers/tty/hvc/extr_hvc_irq.c_hvc_handle_interrupt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @hvc_handle_interrupt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @hvc_handle_interrupt(i32 %0, ptr noundef %1) #0 {
%3 = tail call i64 @hvc_poll(ptr noundef %1) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @hvc_kick() #2
br label %7
7: ; preds = %5, %2
%8 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !6
ret i32 %8
}
declare i64 @hvc_poll(ptr noundef) local_unnamed_addr #1
declare i32 @hvc_kick(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_tty_hvc_extr_hvc_irq.c_hvc_handle_interrupt
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_init.h_bnx2x_init_min.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_init.h_bnx2x_init_min.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cmng_init = type { %struct.cmng_struct_per_port, %struct.cmng_vnic }
%struct.cmng_struct_per_port = type { %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i64, i64, i64 }
%struct.cmng_vnic = type { ptr }
%struct.cmng_init_input = type { i32, ptr }
%struct.TYPE_3__ = type { i64 }
@QM_ARB_BYTES = dso_local local_unnamed_addr global i64 0, align 8
@T_FAIR_COEF = dso_local local_unnamed_addr global i32 0, align 4
@FAIR_MEM = dso_local local_unnamed_addr global i64 0, align 8
@SDM_TICKS = dso_local local_unnamed_addr global i64 0, align 8
@BNX2X_PORT2_MODE_NUM_VNICS = dso_local local_unnamed_addr global i64 0, align 8
@MIN_ABOVE_THRESH = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @bnx2x_init_min], section "llvm.metadata"
; Function Attrs: inlinehint nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define internal void @bnx2x_init_min(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef %2) #0 {
%4 = getelementptr inbounds %struct.cmng_init, ptr %2, i64 0, i32 1
%5 = load i64, ptr @QM_ARB_BYTES, align 8, !tbaa !5
%6 = udiv i64 %5, %1
%7 = load i32, ptr @T_FAIR_COEF, align 4, !tbaa !9
%8 = load i32, ptr %0, align 8, !tbaa !11
%9 = sdiv i32 %7, %8
%10 = sext i32 %9 to i64
store i64 %5, ptr %2, align 8, !tbaa !14
%11 = mul i64 %10, %1
%12 = load i64, ptr @FAIR_MEM, align 8, !tbaa !5
%13 = mul i64 %11, %12
%14 = getelementptr inbounds %struct.TYPE_4__, ptr %2, i64 0, i32 1
store i64 %13, ptr %14, align 8, !tbaa !17
%15 = load i64, ptr @SDM_TICKS, align 8, !tbaa !5
%16 = udiv i64 %6, %15
%17 = getelementptr inbounds %struct.TYPE_4__, ptr %2, i64 0, i32 2
store i64 %16, ptr %17, align 8, !tbaa !18
%18 = load i64, ptr @BNX2X_PORT2_MODE_NUM_VNICS, align 8
%19 = icmp eq i64 %18, 0
br i1 %19, label %76, label %20
20: ; preds = %3
%21 = getelementptr inbounds %struct.cmng_init_input, ptr %0, i64 0, i32 1
%22 = load ptr, ptr %21, align 8, !tbaa !19
%23 = icmp ult i64 %18, 4
br i1 %23, label %42, label %24
24: ; preds = %20
%25 = and i64 %18, -4
br label %26
26: ; preds = %26, %24
%27 = phi i64 [ 0, %24 ], [ %36, %26 ]
%28 = phi <2 x i64> [ zeroinitializer, %24 ], [ %34, %26 ]
%29 = phi <2 x i64> [ zeroinitializer, %24 ], [ %35, %26 ]
%30 = getelementptr inbounds i64, ptr %22, i64 %27
%31 = getelementptr inbounds i64, ptr %30, i64 2
%32 = load <2 x i64>, ptr %30, align 8, !tbaa !5
%33 = load <2 x i64>, ptr %31, align 8, !tbaa !5
%34 = add <2 x i64> %32, %28
%35 = add <2 x i64> %33, %29
%36 = add nuw i64 %27, 4
%37 = icmp eq i64 %36, %25
br i1 %37, label %38, label %26, !llvm.loop !20
38: ; preds = %26
%39 = add <2 x i64> %35, %34
%40 = tail call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %39)
%41 = icmp eq i64 %18, %25
br i1 %41, label %53, label %42
42: ; preds = %20, %38
%43 = phi i64 [ 0, %20 ], [ %25, %38 ]
%44 = phi i64 [ 0, %20 ], [ %40, %38 ]
br label %45
45: ; preds = %42, %45
%46 = phi i64 [ %51, %45 ], [ %43, %42 ]
%47 = phi i64 [ %50, %45 ], [ %44, %42 ]
%48 = getelementptr inbounds i64, ptr %22, i64 %46
%49 = load i64, ptr %48, align 8, !tbaa !5
%50 = add i64 %49, %47
%51 = add nuw i64 %46, 1
%52 = icmp eq i64 %51, %18
br i1 %52, label %53, label %45, !llvm.loop !24
53: ; preds = %45, %38
%54 = phi i64 [ %40, %38 ], [ %50, %45 ]
%55 = icmp eq i64 %54, 0
br i1 %55, label %76, label %56
56: ; preds = %53
%57 = getelementptr inbounds %struct.cmng_init_input, ptr %0, i64 0, i32 1
%58 = sext i32 %7 to i64
%59 = mul i64 %54, 800
%60 = udiv i64 %58, %59
br label %61
61: ; preds = %56, %61
%62 = phi i64 [ 0, %56 ], [ %73, %61 ]
%63 = load ptr, ptr %57, align 8, !tbaa !19
%64 = getelementptr inbounds i64, ptr %63, i64 %62
%65 = load i64, ptr %64, align 8, !tbaa !5
%66 = mul i64 %65, 100
%67 = mul i64 %66, %60
%68 = load ptr, ptr %4, align 8, !tbaa !25
%69 = getelementptr inbounds %struct.TYPE_3__, ptr %68, i64 %62
store i64 %67, ptr %69, align 8, !tbaa !27
%70 = load i64, ptr @MIN_ABOVE_THRESH, align 8, !tbaa !5
%71 = add i64 %70, %5
%72 = tail call i64 @llvm.umax.i64(i64 %67, i64 %71)
store i64 %72, ptr %69, align 8
%73 = add nuw i64 %62, 1
%74 = load i64, ptr @BNX2X_PORT2_MODE_NUM_VNICS, align 8, !tbaa !5
%75 = icmp ult i64 %73, %74
br i1 %75, label %61, label %76, !llvm.loop !29
76: ; preds = %61, %3, %53
ret void
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64>) #1
attributes #0 = { inlinehint nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"cmng_init_input", !10, i64 0, !13, i64 8}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"cmng_struct_per_port", !16, i64 0}
!16 = !{!"TYPE_4__", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!15, !6, i64 8}
!18 = !{!15, !6, i64 16}
!19 = !{!12, !13, i64 8}
!20 = distinct !{!20, !21, !22, !23}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!"llvm.loop.isvectorized", i32 1}
!23 = !{!"llvm.loop.unroll.runtime.disable"}
!24 = distinct !{!24, !21, !23, !22}
!25 = !{!26, !13, i64 0}
!26 = !{!"cmng_vnic", !13, i64 0}
!27 = !{!28, !6, i64 0}
!28 = !{!"TYPE_3__", !6, i64 0}
!29 = distinct !{!29, !21}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_init.h_bnx2x_init_min.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_init.h_bnx2x_init_min.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i64 }
@QM_ARB_BYTES = common local_unnamed_addr global i64 0, align 8
@T_FAIR_COEF = common local_unnamed_addr global i32 0, align 4
@FAIR_MEM = common local_unnamed_addr global i64 0, align 8
@SDM_TICKS = common local_unnamed_addr global i64 0, align 8
@BNX2X_PORT2_MODE_NUM_VNICS = common local_unnamed_addr global i64 0, align 8
@MIN_ABOVE_THRESH = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @bnx2x_init_min], section "llvm.metadata"
; Function Attrs: inlinehint nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @bnx2x_init_min(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %2, i64 24
%5 = load i64, ptr @QM_ARB_BYTES, align 8, !tbaa !6
%6 = udiv i64 %5, %1
%7 = load i32, ptr @T_FAIR_COEF, align 4, !tbaa !10
%8 = load i32, ptr %0, align 8, !tbaa !12
%9 = sdiv i32 %7, %8
%10 = sext i32 %9 to i64
store i64 %5, ptr %2, align 8, !tbaa !15
%11 = mul i64 %10, %1
%12 = load i64, ptr @FAIR_MEM, align 8, !tbaa !6
%13 = mul i64 %11, %12
%14 = getelementptr inbounds i8, ptr %2, i64 8
store i64 %13, ptr %14, align 8, !tbaa !18
%15 = load i64, ptr @SDM_TICKS, align 8, !tbaa !6
%16 = udiv i64 %6, %15
%17 = getelementptr inbounds i8, ptr %2, i64 16
store i64 %16, ptr %17, align 8, !tbaa !19
%18 = load i64, ptr @BNX2X_PORT2_MODE_NUM_VNICS, align 8
%19 = icmp eq i64 %18, 0
br i1 %19, label %85, label %20
20: ; preds = %3
%21 = getelementptr inbounds i8, ptr %0, i64 8
%22 = load ptr, ptr %21, align 8, !tbaa !20
%23 = icmp ult i64 %18, 8
br i1 %23, label %52, label %24
24: ; preds = %20
%25 = and i64 %18, -8
br label %26
26: ; preds = %26, %24
%27 = phi i64 [ 0, %24 ], [ %44, %26 ]
%28 = phi <2 x i64> [ zeroinitializer, %24 ], [ %40, %26 ]
%29 = phi <2 x i64> [ zeroinitializer, %24 ], [ %41, %26 ]
%30 = phi <2 x i64> [ zeroinitializer, %24 ], [ %42, %26 ]
%31 = phi <2 x i64> [ zeroinitializer, %24 ], [ %43, %26 ]
%32 = getelementptr inbounds i64, ptr %22, i64 %27
%33 = getelementptr inbounds i8, ptr %32, i64 16
%34 = getelementptr inbounds i8, ptr %32, i64 32
%35 = getelementptr inbounds i8, ptr %32, i64 48
%36 = load <2 x i64>, ptr %32, align 8, !tbaa !6
%37 = load <2 x i64>, ptr %33, align 8, !tbaa !6
%38 = load <2 x i64>, ptr %34, align 8, !tbaa !6
%39 = load <2 x i64>, ptr %35, align 8, !tbaa !6
%40 = add <2 x i64> %36, %28
%41 = add <2 x i64> %37, %29
%42 = add <2 x i64> %38, %30
%43 = add <2 x i64> %39, %31
%44 = add nuw i64 %27, 8
%45 = icmp eq i64 %44, %25
br i1 %45, label %46, label %26, !llvm.loop !21
46: ; preds = %26
%47 = add <2 x i64> %41, %40
%48 = add <2 x i64> %42, %47
%49 = add <2 x i64> %43, %48
%50 = tail call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %49)
%51 = icmp eq i64 %18, %25
br i1 %51, label %63, label %52
52: ; preds = %46, %20
%53 = phi i64 [ 0, %20 ], [ %25, %46 ]
%54 = phi i64 [ 0, %20 ], [ %50, %46 ]
br label %55
55: ; preds = %52, %55
%56 = phi i64 [ %61, %55 ], [ %53, %52 ]
%57 = phi i64 [ %60, %55 ], [ %54, %52 ]
%58 = getelementptr inbounds i64, ptr %22, i64 %56
%59 = load i64, ptr %58, align 8, !tbaa !6
%60 = add i64 %59, %57
%61 = add nuw i64 %56, 1
%62 = icmp eq i64 %61, %18
br i1 %62, label %63, label %55, !llvm.loop !25
63: ; preds = %55, %46
%64 = phi i64 [ %50, %46 ], [ %60, %55 ]
%65 = icmp eq i64 %64, 0
br i1 %65, label %85, label %66
66: ; preds = %63
%67 = sext i32 %7 to i64
%68 = mul i64 %64, 800
%69 = udiv i64 %67, %68
%70 = mul i64 %69, 100
br label %71
71: ; preds = %66, %71
%72 = phi i64 [ 0, %66 ], [ %82, %71 ]
%73 = load ptr, ptr %21, align 8, !tbaa !20
%74 = getelementptr inbounds i64, ptr %73, i64 %72
%75 = load i64, ptr %74, align 8, !tbaa !6
%76 = mul i64 %75, %70
%77 = load ptr, ptr %4, align 8, !tbaa !26
%78 = getelementptr inbounds %struct.TYPE_3__, ptr %77, i64 %72
store i64 %76, ptr %78, align 8, !tbaa !28
%79 = load i64, ptr @MIN_ABOVE_THRESH, align 8, !tbaa !6
%80 = add i64 %79, %5
%81 = tail call i64 @llvm.umax.i64(i64 %76, i64 %80)
store i64 %81, ptr %78, align 8
%82 = add nuw i64 %72, 1
%83 = load i64, ptr @BNX2X_PORT2_MODE_NUM_VNICS, align 8, !tbaa !6
%84 = icmp ult i64 %82, %83
br i1 %84, label %71, label %85, !llvm.loop !30
85: ; preds = %71, %3, %63
ret void
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64>) #1
attributes #0 = { inlinehint nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"cmng_init_input", !11, i64 0, !14, i64 8}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"cmng_struct_per_port", !17, i64 0}
!17 = !{!"TYPE_4__", !7, i64 0, !7, i64 8, !7, i64 16}
!18 = !{!16, !7, i64 8}
!19 = !{!16, !7, i64 16}
!20 = !{!13, !14, i64 8}
!21 = distinct !{!21, !22, !23, !24}
!22 = !{!"llvm.loop.mustprogress"}
!23 = !{!"llvm.loop.isvectorized", i32 1}
!24 = !{!"llvm.loop.unroll.runtime.disable"}
!25 = distinct !{!25, !22, !24, !23}
!26 = !{!27, !14, i64 0}
!27 = !{!"cmng_vnic", !14, i64 0}
!28 = !{!29, !7, i64 0}
!29 = !{!"TYPE_3__", !7, i64 0}
!30 = distinct !{!30, !22}
|
linux_drivers_net_ethernet_broadcom_bnx2x_extr_bnx2x_init.h_bnx2x_init_min
|
; ModuleID = 'AnghaBench/toxcore/toxcore/extr_group.c_group_set_object.c'
source_filename = "AnghaBench/toxcore/toxcore/extr_group.c_group_set_object.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @group_set_object(ptr noundef %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @get_group_c(ptr noundef %0, i32 noundef %1) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %7, label %6
6: ; preds = %3
store ptr %2, ptr %4, align 8, !tbaa !5
br label %7
7: ; preds = %3, %6
%8 = phi i32 [ 0, %6 ], [ -1, %3 ]
ret i32 %8
}
declare ptr @get_group_c(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/toxcore/toxcore/extr_group.c_group_set_object.c'
source_filename = "AnghaBench/toxcore/toxcore/extr_group.c_group_set_object.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -1, 1) i32 @group_set_object(ptr noundef %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @get_group_c(ptr noundef %0, i32 noundef %1) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %7, label %6
6: ; preds = %3
store ptr %2, ptr %4, align 8, !tbaa !6
br label %7
7: ; preds = %3, %6
%8 = phi i32 [ 0, %6 ], [ -1, %3 ]
ret i32 %8
}
declare ptr @get_group_c(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
toxcore_toxcore_extr_group.c_group_set_object
|
; ModuleID = 'AnghaBench/freebsd/sys/security/mac_mls/extr_mac_mls.c_mls_posixshm_check_setowner.c'
source_filename = "AnghaBench/freebsd/sys/security/mac_mls/extr_mac_mls.c_mls_posixshm_check_setowner.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@mls_enabled = dso_local local_unnamed_addr global i32 0, align 4
@EACCES = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mls_posixshm_check_setowner], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mls_posixshm_check_setowner(ptr nocapture noundef readonly %0, ptr nocapture readnone %1, ptr noundef %2, i32 %3, i32 %4) #0 {
%6 = load i32, ptr @mls_enabled, align 4, !tbaa !5
%7 = icmp eq i32 %6, 0
br i1 %7, label %16, label %8
8: ; preds = %5
%9 = load ptr, ptr %0, align 8, !tbaa !9
%10 = tail call ptr @SLOT(ptr noundef %9) #2
%11 = tail call ptr @SLOT(ptr noundef %2) #2
%12 = tail call i32 @mls_dominate_effective(ptr noundef %11, ptr noundef %10) #2
%13 = icmp eq i32 %12, 0
%14 = load i32, ptr @EACCES, align 4
%15 = select i1 %13, i32 %14, i32 0
br label %16
16: ; preds = %8, %5
%17 = phi i32 [ 0, %5 ], [ %15, %8 ]
ret i32 %17
}
declare ptr @SLOT(ptr noundef) local_unnamed_addr #1
declare i32 @mls_dominate_effective(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"ucred", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/security/mac_mls/extr_mac_mls.c_mls_posixshm_check_setowner.c'
source_filename = "AnghaBench/freebsd/sys/security/mac_mls/extr_mac_mls.c_mls_posixshm_check_setowner.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@mls_enabled = common local_unnamed_addr global i32 0, align 4
@EACCES = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mls_posixshm_check_setowner], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mls_posixshm_check_setowner(ptr nocapture noundef readonly %0, ptr nocapture readnone %1, ptr noundef %2, i32 %3, i32 %4) #0 {
%6 = load i32, ptr @mls_enabled, align 4, !tbaa !6
%7 = icmp eq i32 %6, 0
br i1 %7, label %16, label %8
8: ; preds = %5
%9 = load ptr, ptr %0, align 8, !tbaa !10
%10 = tail call ptr @SLOT(ptr noundef %9) #2
%11 = tail call ptr @SLOT(ptr noundef %2) #2
%12 = tail call i32 @mls_dominate_effective(ptr noundef %11, ptr noundef %10) #2
%13 = icmp eq i32 %12, 0
%14 = load i32, ptr @EACCES, align 4
%15 = select i1 %13, i32 %14, i32 0
br label %16
16: ; preds = %8, %5
%17 = phi i32 [ 0, %5 ], [ %15, %8 ]
ret i32 %17
}
declare ptr @SLOT(ptr noundef) local_unnamed_addr #1
declare i32 @mls_dominate_effective(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"ucred", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
|
freebsd_sys_security_mac_mls_extr_mac_mls.c_mls_posixshm_check_setowner
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_sriov.c_ecore_iov_enable_vf_access.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_sriov.c_ecore_iov_enable_vf_access.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ecore_vf_info = type { i32, i32, i32, i64, i32, i64 }
%struct.ecore_hwfn = type { %struct.TYPE_2__, i32 }
%struct.TYPE_2__ = type { i64, i32 }
@IGU_VF_CONF_FUNC_EN = dso_local local_unnamed_addr global i32 0, align 4
@ECORE_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
@ECORE_MSG_IOV = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [43 x i8] c"Enable internal access for vf %x [abs %x]\0A\00", align 1
@IGU_VF_CONF_PARENT = dso_local local_unnamed_addr global i32 0, align 4
@IGU_REG_VF_CONFIGURATION_RT_OFFSET = dso_local local_unnamed_addr global i32 0, align 4
@PHASE_VF = dso_local local_unnamed_addr global i32 0, align 4
@VF_FREE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ecore_iov_enable_vf_access], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ecore_iov_enable_vf_access(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load i32, ptr @IGU_VF_CONF_FUNC_EN, align 4, !tbaa !5
store i32 0, ptr %2, align 8, !tbaa !9
%5 = getelementptr inbounds %struct.ecore_vf_info, ptr %2, i64 0, i32 5
%6 = load i64, ptr %5, align 8, !tbaa !12
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = load i32, ptr @ECORE_SUCCESS, align 4, !tbaa !5
br label %46
10: ; preds = %3
%11 = load i32, ptr @ECORE_MSG_IOV, align 4, !tbaa !5
%12 = getelementptr inbounds %struct.ecore_vf_info, ptr %2, i64 0, i32 2
%13 = load i32, ptr %12, align 8, !tbaa !13
%14 = tail call i32 @ECORE_VF_ABS_ID(ptr noundef %0, ptr noundef nonnull %2) #2
%15 = tail call i32 @DP_VERBOSE(ptr noundef %0, i32 noundef %11, ptr noundef nonnull @.str, i32 noundef %13, i32 noundef %14) #2
%16 = tail call i32 @ECORE_VF_ABS_ID(ptr noundef %0, ptr noundef nonnull %2) #2
%17 = tail call i32 @ecore_iov_vf_pglue_clear_err(ptr noundef %0, ptr noundef %1, i32 noundef %16) #2
%18 = tail call i32 @ecore_iov_vf_igu_reset(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %2) #2
%19 = load i32, ptr %12, align 8, !tbaa !13
%20 = getelementptr inbounds %struct.ecore_vf_info, ptr %2, i64 0, i32 4
%21 = load i32, ptr %20, align 8, !tbaa !14
%22 = tail call i32 @ecore_iov_enable_vf_access_msix(ptr noundef %0, ptr noundef %1, i32 noundef %19, i32 noundef %21) #2
%23 = load i32, ptr @ECORE_SUCCESS, align 4, !tbaa !5
%24 = icmp eq i32 %22, %23
br i1 %24, label %25, label %46
25: ; preds = %10
%26 = getelementptr inbounds %struct.ecore_vf_info, ptr %2, i64 0, i32 3
%27 = load i64, ptr %26, align 8, !tbaa !15
%28 = trunc i64 %27 to i32
%29 = tail call i32 @ecore_fid_pretend(ptr noundef %0, ptr noundef %1, i32 noundef %28) #2
%30 = load i32, ptr @IGU_VF_CONF_PARENT, align 4, !tbaa !5
%31 = getelementptr inbounds %struct.ecore_hwfn, ptr %0, i64 0, i32 1
%32 = load i32, ptr %31, align 8, !tbaa !16
%33 = tail call i32 @SET_FIELD(i32 noundef %4, i32 noundef %30, i32 noundef %32) #2
%34 = load i32, ptr @IGU_REG_VF_CONFIGURATION_RT_OFFSET, align 4, !tbaa !5
%35 = tail call i32 @STORE_RT_REG(ptr noundef %0, i32 noundef %34, i32 noundef %4) #2
%36 = load i32, ptr @PHASE_VF, align 4, !tbaa !5
%37 = load i32, ptr %12, align 8, !tbaa !13
%38 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
%39 = load i32, ptr %38, align 8, !tbaa !19
%40 = tail call i32 @ecore_init_run(ptr noundef %0, ptr noundef %1, i32 noundef %36, i32 noundef %37, i32 noundef %39) #2
%41 = load i64, ptr %0, align 8, !tbaa !20
%42 = trunc i64 %41 to i32
%43 = tail call i32 @ecore_fid_pretend(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %42) #2
%44 = load i32, ptr @VF_FREE, align 4, !tbaa !5
%45 = getelementptr inbounds %struct.ecore_vf_info, ptr %2, i64 0, i32 1
store i32 %44, ptr %45, align 4, !tbaa !21
br label %46
46: ; preds = %10, %25, %8
%47 = phi i32 [ %9, %8 ], [ %22, %25 ], [ %22, %10 ]
ret i32 %47
}
declare i32 @DP_VERBOSE(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ECORE_VF_ABS_ID(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ecore_iov_vf_pglue_clear_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_iov_vf_igu_reset(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ecore_iov_enable_vf_access_msix(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_fid_pretend(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_FIELD(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @STORE_RT_REG(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_init_run(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"ecore_vf_info", !6, i64 0, !6, i64 4, !6, i64 8, !11, i64 16, !6, i64 24, !11, i64 32}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !11, i64 32}
!13 = !{!10, !6, i64 8}
!14 = !{!10, !6, i64 24}
!15 = !{!10, !11, i64 16}
!16 = !{!17, !6, i64 16}
!17 = !{!"ecore_hwfn", !18, i64 0, !6, i64 16}
!18 = !{!"TYPE_2__", !11, i64 0, !6, i64 8}
!19 = !{!17, !6, i64 8}
!20 = !{!17, !11, i64 0}
!21 = !{!10, !6, i64 4}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_sriov.c_ecore_iov_enable_vf_access.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_sriov.c_ecore_iov_enable_vf_access.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IGU_VF_CONF_FUNC_EN = common local_unnamed_addr global i32 0, align 4
@ECORE_SUCCESS = common local_unnamed_addr global i32 0, align 4
@ECORE_MSG_IOV = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [43 x i8] c"Enable internal access for vf %x [abs %x]\0A\00", align 1
@IGU_VF_CONF_PARENT = common local_unnamed_addr global i32 0, align 4
@IGU_REG_VF_CONFIGURATION_RT_OFFSET = common local_unnamed_addr global i32 0, align 4
@PHASE_VF = common local_unnamed_addr global i32 0, align 4
@VF_FREE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ecore_iov_enable_vf_access], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ecore_iov_enable_vf_access(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load i32, ptr @IGU_VF_CONF_FUNC_EN, align 4, !tbaa !6
store i32 0, ptr %2, align 8, !tbaa !10
%5 = getelementptr inbounds i8, ptr %2, i64 32
%6 = load i64, ptr %5, align 8, !tbaa !13
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = load i32, ptr @ECORE_SUCCESS, align 4, !tbaa !6
br label %46
10: ; preds = %3
%11 = load i32, ptr @ECORE_MSG_IOV, align 4, !tbaa !6
%12 = getelementptr inbounds i8, ptr %2, i64 8
%13 = load i32, ptr %12, align 8, !tbaa !14
%14 = tail call i32 @ECORE_VF_ABS_ID(ptr noundef %0, ptr noundef nonnull %2) #2
%15 = tail call i32 @DP_VERBOSE(ptr noundef %0, i32 noundef %11, ptr noundef nonnull @.str, i32 noundef %13, i32 noundef %14) #2
%16 = tail call i32 @ECORE_VF_ABS_ID(ptr noundef %0, ptr noundef nonnull %2) #2
%17 = tail call i32 @ecore_iov_vf_pglue_clear_err(ptr noundef %0, ptr noundef %1, i32 noundef %16) #2
%18 = tail call i32 @ecore_iov_vf_igu_reset(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %2) #2
%19 = load i32, ptr %12, align 8, !tbaa !14
%20 = getelementptr inbounds i8, ptr %2, i64 24
%21 = load i32, ptr %20, align 8, !tbaa !15
%22 = tail call i32 @ecore_iov_enable_vf_access_msix(ptr noundef %0, ptr noundef %1, i32 noundef %19, i32 noundef %21) #2
%23 = load i32, ptr @ECORE_SUCCESS, align 4, !tbaa !6
%24 = icmp eq i32 %22, %23
br i1 %24, label %25, label %46
25: ; preds = %10
%26 = getelementptr inbounds i8, ptr %2, i64 16
%27 = load i64, ptr %26, align 8, !tbaa !16
%28 = trunc i64 %27 to i32
%29 = tail call i32 @ecore_fid_pretend(ptr noundef %0, ptr noundef %1, i32 noundef %28) #2
%30 = load i32, ptr @IGU_VF_CONF_PARENT, align 4, !tbaa !6
%31 = getelementptr inbounds i8, ptr %0, i64 16
%32 = load i32, ptr %31, align 8, !tbaa !17
%33 = tail call i32 @SET_FIELD(i32 noundef %4, i32 noundef %30, i32 noundef %32) #2
%34 = load i32, ptr @IGU_REG_VF_CONFIGURATION_RT_OFFSET, align 4, !tbaa !6
%35 = tail call i32 @STORE_RT_REG(ptr noundef %0, i32 noundef %34, i32 noundef %4) #2
%36 = load i32, ptr @PHASE_VF, align 4, !tbaa !6
%37 = load i32, ptr %12, align 8, !tbaa !14
%38 = getelementptr inbounds i8, ptr %0, i64 8
%39 = load i32, ptr %38, align 8, !tbaa !20
%40 = tail call i32 @ecore_init_run(ptr noundef %0, ptr noundef %1, i32 noundef %36, i32 noundef %37, i32 noundef %39) #2
%41 = load i64, ptr %0, align 8, !tbaa !21
%42 = trunc i64 %41 to i32
%43 = tail call i32 @ecore_fid_pretend(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %42) #2
%44 = load i32, ptr @VF_FREE, align 4, !tbaa !6
%45 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %44, ptr %45, align 4, !tbaa !22
br label %46
46: ; preds = %10, %25, %8
%47 = phi i32 [ %9, %8 ], [ %22, %25 ], [ %22, %10 ]
ret i32 %47
}
declare i32 @DP_VERBOSE(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ECORE_VF_ABS_ID(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ecore_iov_vf_pglue_clear_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_iov_vf_igu_reset(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ecore_iov_enable_vf_access_msix(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_fid_pretend(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SET_FIELD(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @STORE_RT_REG(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_init_run(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ecore_vf_info", !7, i64 0, !7, i64 4, !7, i64 8, !12, i64 16, !7, i64 24, !12, i64 32}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 32}
!14 = !{!11, !7, i64 8}
!15 = !{!11, !7, i64 24}
!16 = !{!11, !12, i64 16}
!17 = !{!18, !7, i64 16}
!18 = !{!"ecore_hwfn", !19, i64 0, !7, i64 16}
!19 = !{!"TYPE_2__", !12, i64 0, !7, i64 8}
!20 = !{!18, !7, i64 8}
!21 = !{!18, !12, i64 0}
!22 = !{!11, !7, i64 4}
|
freebsd_sys_dev_qlnx_qlnxe_extr_ecore_sriov.c_ecore_iov_enable_vf_access
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/mmc/host/extr_dwmmc.c_dma_prepare.c'
source_filename = "AnghaBench/freebsd/sys/dev/mmc/host/extr_dwmmc.c_dma_prepare.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dwmmc_softc = type { i32, i32, i32, i32, i32 }
%struct.mmc_data = type { i32, i32, i32 }
@SDMMC_INTMASK = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_INTMASK_TXDR = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_INTMASK_RXDR = dso_local local_unnamed_addr global i32 0, align 4
@dwmmc_ring_setup = dso_local local_unnamed_addr global i32 0, align 4
@BUS_DMA_NOWAIT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [20 x i8] c"dmamap_load failed\0A\00", align 1
@BUS_DMASYNC_PREWRITE = dso_local local_unnamed_addr global i32 0, align 4
@MMC_DATA_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@BUS_DMASYNC_PREREAD = dso_local local_unnamed_addr global i32 0, align 4
@DEF_MSIZE = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_FIFOTH_MSIZE_S = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_FIFOTH_RXWMARK_S = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_FIFOTH_TXWMARK_S = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_FIFOTH = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_CTRL_USE_IDMAC = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_CTRL_DMA_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_BMOD = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_BMOD_DE = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_BMOD_FB = dso_local local_unnamed_addr global i32 0, align 4
@SDMMC_PLDMND = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dma_prepare], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @dma_prepare(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !5
%4 = load i32, ptr @SDMMC_INTMASK, align 4, !tbaa !10
%5 = tail call i32 @READ4(ptr noundef %0, i32 noundef %4) #2
%6 = load i32, ptr @SDMMC_INTMASK_TXDR, align 4, !tbaa !10
%7 = load i32, ptr @SDMMC_INTMASK_RXDR, align 4, !tbaa !10
%8 = or i32 %7, %6
%9 = xor i32 %8, -1
%10 = and i32 %5, %9
%11 = load i32, ptr @SDMMC_INTMASK, align 4, !tbaa !10
%12 = tail call i32 @WRITE4(ptr noundef %0, i32 noundef %11, i32 noundef %10) #2
%13 = getelementptr inbounds %struct.dwmmc_softc, ptr %0, i64 0, i32 2
%14 = load i32, ptr %13, align 4, !tbaa !12
%15 = getelementptr inbounds %struct.dwmmc_softc, ptr %0, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = getelementptr inbounds %struct.mmc_data, ptr %3, i64 0, i32 2
%18 = load i32, ptr %17, align 4, !tbaa !15
%19 = getelementptr inbounds %struct.mmc_data, ptr %3, i64 0, i32 1
%20 = load i32, ptr %19, align 4, !tbaa !17
%21 = load i32, ptr @dwmmc_ring_setup, align 4, !tbaa !10
%22 = load i32, ptr @BUS_DMA_NOWAIT, align 4, !tbaa !10
%23 = tail call i32 @bus_dmamap_load(i32 noundef %14, i32 noundef %16, i32 noundef %18, i32 noundef %20, i32 noundef %21, ptr noundef %0, i32 noundef %22) #2
%24 = icmp eq i32 %23, 0
br i1 %24, label %27, label %25
25: ; preds = %2
%26 = tail call i32 @panic(ptr noundef nonnull @.str) #2
br label %27
27: ; preds = %25, %2
%28 = getelementptr inbounds %struct.dwmmc_softc, ptr %0, i64 0, i32 4
%29 = load i32, ptr %28, align 4, !tbaa !18
%30 = getelementptr inbounds %struct.dwmmc_softc, ptr %0, i64 0, i32 3
%31 = load i32, ptr %30, align 4, !tbaa !19
%32 = load i32, ptr @BUS_DMASYNC_PREWRITE, align 4, !tbaa !10
%33 = tail call i32 @bus_dmamap_sync(i32 noundef %29, i32 noundef %31, i32 noundef %32) #2
%34 = load i32, ptr %3, align 4, !tbaa !20
%35 = load i32, ptr @MMC_DATA_WRITE, align 4, !tbaa !10
%36 = and i32 %35, %34
%37 = icmp eq i32 %36, 0
%38 = load i32, ptr %13, align 4, !tbaa !12
%39 = load i32, ptr %15, align 4, !tbaa !14
%40 = load i32, ptr @BUS_DMASYNC_PREREAD, align 4
%41 = load i32, ptr @BUS_DMASYNC_PREWRITE, align 4
%42 = select i1 %37, i32 %40, i32 %41
%43 = tail call i32 @bus_dmamap_sync(i32 noundef %38, i32 noundef %39, i32 noundef %42) #2
%44 = load i32, ptr @DEF_MSIZE, align 4, !tbaa !10
%45 = load i32, ptr @SDMMC_FIFOTH_MSIZE_S, align 4, !tbaa !10
%46 = shl i32 %44, %45
%47 = load i32, ptr %0, align 4, !tbaa !21
%48 = sdiv i32 %47, 2
%49 = add nsw i32 %48, -1
%50 = load i32, ptr @SDMMC_FIFOTH_RXWMARK_S, align 4, !tbaa !10
%51 = shl i32 %49, %50
%52 = or i32 %51, %46
%53 = load i32, ptr @SDMMC_FIFOTH_TXWMARK_S, align 4, !tbaa !10
%54 = shl i32 %48, %53
%55 = or i32 %52, %54
%56 = load i32, ptr @SDMMC_FIFOTH, align 4, !tbaa !10
%57 = tail call i32 @WRITE4(ptr noundef nonnull %0, i32 noundef %56, i32 noundef %55) #2
%58 = tail call i32 (...) @wmb() #2
%59 = load i32, ptr @SDMMC_CTRL, align 4, !tbaa !10
%60 = tail call i32 @READ4(ptr noundef nonnull %0, i32 noundef %59) #2
%61 = load i32, ptr @SDMMC_CTRL_USE_IDMAC, align 4, !tbaa !10
%62 = load i32, ptr @SDMMC_CTRL_DMA_ENABLE, align 4, !tbaa !10
%63 = or i32 %61, %60
%64 = or i32 %63, %62
%65 = load i32, ptr @SDMMC_CTRL, align 4, !tbaa !10
%66 = tail call i32 @WRITE4(ptr noundef nonnull %0, i32 noundef %65, i32 noundef %64) #2
%67 = tail call i32 (...) @wmb() #2
%68 = load i32, ptr @SDMMC_BMOD, align 4, !tbaa !10
%69 = tail call i32 @READ4(ptr noundef nonnull %0, i32 noundef %68) #2
%70 = load i32, ptr @SDMMC_BMOD_DE, align 4, !tbaa !10
%71 = load i32, ptr @SDMMC_BMOD_FB, align 4, !tbaa !10
%72 = or i32 %70, %69
%73 = or i32 %72, %71
%74 = load i32, ptr @SDMMC_BMOD, align 4, !tbaa !10
%75 = tail call i32 @WRITE4(ptr noundef nonnull %0, i32 noundef %74, i32 noundef %73) #2
%76 = load i32, ptr @SDMMC_PLDMND, align 4, !tbaa !10
%77 = tail call i32 @WRITE4(ptr noundef nonnull %0, i32 noundef %76, i32 noundef 1) #2
ret i32 0
}
declare i32 @READ4(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @WRITE4(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bus_dmamap_load(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @panic(ptr noundef) local_unnamed_addr #1
declare i32 @bus_dmamap_sync(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wmb(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mmc_command", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"dwmmc_softc", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!14 = !{!13, !11, i64 4}
!15 = !{!16, !11, i64 8}
!16 = !{!"mmc_data", !11, i64 0, !11, i64 4, !11, i64 8}
!17 = !{!16, !11, i64 4}
!18 = !{!13, !11, i64 16}
!19 = !{!13, !11, i64 12}
!20 = !{!16, !11, i64 0}
!21 = !{!13, !11, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/mmc/host/extr_dwmmc.c_dma_prepare.c'
source_filename = "AnghaBench/freebsd/sys/dev/mmc/host/extr_dwmmc.c_dma_prepare.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SDMMC_INTMASK = common local_unnamed_addr global i32 0, align 4
@SDMMC_INTMASK_TXDR = common local_unnamed_addr global i32 0, align 4
@SDMMC_INTMASK_RXDR = common local_unnamed_addr global i32 0, align 4
@dwmmc_ring_setup = common local_unnamed_addr global i32 0, align 4
@BUS_DMA_NOWAIT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [20 x i8] c"dmamap_load failed\0A\00", align 1
@BUS_DMASYNC_PREWRITE = common local_unnamed_addr global i32 0, align 4
@MMC_DATA_WRITE = common local_unnamed_addr global i32 0, align 4
@BUS_DMASYNC_PREREAD = common local_unnamed_addr global i32 0, align 4
@DEF_MSIZE = common local_unnamed_addr global i32 0, align 4
@SDMMC_FIFOTH_MSIZE_S = common local_unnamed_addr global i32 0, align 4
@SDMMC_FIFOTH_RXWMARK_S = common local_unnamed_addr global i32 0, align 4
@SDMMC_FIFOTH_TXWMARK_S = common local_unnamed_addr global i32 0, align 4
@SDMMC_FIFOTH = common local_unnamed_addr global i32 0, align 4
@SDMMC_CTRL = common local_unnamed_addr global i32 0, align 4
@SDMMC_CTRL_USE_IDMAC = common local_unnamed_addr global i32 0, align 4
@SDMMC_CTRL_DMA_ENABLE = common local_unnamed_addr global i32 0, align 4
@SDMMC_BMOD = common local_unnamed_addr global i32 0, align 4
@SDMMC_BMOD_DE = common local_unnamed_addr global i32 0, align 4
@SDMMC_BMOD_FB = common local_unnamed_addr global i32 0, align 4
@SDMMC_PLDMND = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dma_prepare], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @dma_prepare(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !6
%4 = load i32, ptr @SDMMC_INTMASK, align 4, !tbaa !11
%5 = tail call i32 @READ4(ptr noundef %0, i32 noundef %4) #2
%6 = load i32, ptr @SDMMC_INTMASK_TXDR, align 4, !tbaa !11
%7 = load i32, ptr @SDMMC_INTMASK_RXDR, align 4, !tbaa !11
%8 = or i32 %7, %6
%9 = xor i32 %8, -1
%10 = and i32 %5, %9
%11 = load i32, ptr @SDMMC_INTMASK, align 4, !tbaa !11
%12 = tail call i32 @WRITE4(ptr noundef %0, i32 noundef %11, i32 noundef %10) #2
%13 = getelementptr inbounds i8, ptr %0, i64 8
%14 = load i32, ptr %13, align 4, !tbaa !13
%15 = getelementptr inbounds i8, ptr %0, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !15
%17 = getelementptr inbounds i8, ptr %3, i64 8
%18 = load i32, ptr %17, align 4, !tbaa !16
%19 = getelementptr inbounds i8, ptr %3, i64 4
%20 = load i32, ptr %19, align 4, !tbaa !18
%21 = load i32, ptr @dwmmc_ring_setup, align 4, !tbaa !11
%22 = load i32, ptr @BUS_DMA_NOWAIT, align 4, !tbaa !11
%23 = tail call i32 @bus_dmamap_load(i32 noundef %14, i32 noundef %16, i32 noundef %18, i32 noundef %20, i32 noundef %21, ptr noundef %0, i32 noundef %22) #2
%24 = icmp eq i32 %23, 0
br i1 %24, label %27, label %25
25: ; preds = %2
%26 = tail call i32 @panic(ptr noundef nonnull @.str) #2
br label %27
27: ; preds = %25, %2
%28 = getelementptr inbounds i8, ptr %0, i64 16
%29 = load i32, ptr %28, align 4, !tbaa !19
%30 = getelementptr inbounds i8, ptr %0, i64 12
%31 = load i32, ptr %30, align 4, !tbaa !20
%32 = load i32, ptr @BUS_DMASYNC_PREWRITE, align 4, !tbaa !11
%33 = tail call i32 @bus_dmamap_sync(i32 noundef %29, i32 noundef %31, i32 noundef %32) #2
%34 = load i32, ptr %3, align 4, !tbaa !21
%35 = load i32, ptr @MMC_DATA_WRITE, align 4, !tbaa !11
%36 = and i32 %35, %34
%37 = icmp eq i32 %36, 0
%38 = load i32, ptr %13, align 4, !tbaa !13
%39 = load i32, ptr %15, align 4, !tbaa !15
%40 = load i32, ptr @BUS_DMASYNC_PREREAD, align 4
%41 = load i32, ptr @BUS_DMASYNC_PREWRITE, align 4
%42 = select i1 %37, i32 %40, i32 %41
%43 = tail call i32 @bus_dmamap_sync(i32 noundef %38, i32 noundef %39, i32 noundef %42) #2
%44 = load i32, ptr @DEF_MSIZE, align 4, !tbaa !11
%45 = load i32, ptr @SDMMC_FIFOTH_MSIZE_S, align 4, !tbaa !11
%46 = shl i32 %44, %45
%47 = load i32, ptr %0, align 4, !tbaa !22
%48 = sdiv i32 %47, 2
%49 = add nsw i32 %48, -1
%50 = load i32, ptr @SDMMC_FIFOTH_RXWMARK_S, align 4, !tbaa !11
%51 = shl i32 %49, %50
%52 = or i32 %51, %46
%53 = load i32, ptr @SDMMC_FIFOTH_TXWMARK_S, align 4, !tbaa !11
%54 = shl i32 %48, %53
%55 = or i32 %52, %54
%56 = load i32, ptr @SDMMC_FIFOTH, align 4, !tbaa !11
%57 = tail call i32 @WRITE4(ptr noundef nonnull %0, i32 noundef %56, i32 noundef %55) #2
%58 = tail call i32 @wmb() #2
%59 = load i32, ptr @SDMMC_CTRL, align 4, !tbaa !11
%60 = tail call i32 @READ4(ptr noundef nonnull %0, i32 noundef %59) #2
%61 = load i32, ptr @SDMMC_CTRL_USE_IDMAC, align 4, !tbaa !11
%62 = load i32, ptr @SDMMC_CTRL_DMA_ENABLE, align 4, !tbaa !11
%63 = or i32 %61, %60
%64 = or i32 %63, %62
%65 = load i32, ptr @SDMMC_CTRL, align 4, !tbaa !11
%66 = tail call i32 @WRITE4(ptr noundef nonnull %0, i32 noundef %65, i32 noundef %64) #2
%67 = tail call i32 @wmb() #2
%68 = load i32, ptr @SDMMC_BMOD, align 4, !tbaa !11
%69 = tail call i32 @READ4(ptr noundef nonnull %0, i32 noundef %68) #2
%70 = load i32, ptr @SDMMC_BMOD_DE, align 4, !tbaa !11
%71 = load i32, ptr @SDMMC_BMOD_FB, align 4, !tbaa !11
%72 = or i32 %70, %69
%73 = or i32 %72, %71
%74 = load i32, ptr @SDMMC_BMOD, align 4, !tbaa !11
%75 = tail call i32 @WRITE4(ptr noundef nonnull %0, i32 noundef %74, i32 noundef %73) #2
%76 = load i32, ptr @SDMMC_PLDMND, align 4, !tbaa !11
%77 = tail call i32 @WRITE4(ptr noundef nonnull %0, i32 noundef %76, i32 noundef 1) #2
ret i32 0
}
declare i32 @READ4(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @WRITE4(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bus_dmamap_load(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @panic(ptr noundef) local_unnamed_addr #1
declare i32 @bus_dmamap_sync(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wmb(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mmc_command", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !12, i64 8}
!14 = !{!"dwmmc_softc", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16}
!15 = !{!14, !12, i64 4}
!16 = !{!17, !12, i64 8}
!17 = !{!"mmc_data", !12, i64 0, !12, i64 4, !12, i64 8}
!18 = !{!17, !12, i64 4}
!19 = !{!14, !12, i64 16}
!20 = !{!14, !12, i64 12}
!21 = !{!17, !12, i64 0}
!22 = !{!14, !12, i64 0}
|
freebsd_sys_dev_mmc_host_extr_dwmmc.c_dma_prepare
|
; ModuleID = 'AnghaBench/tengine/src/core/extr_nginx.c_ngx_set_cpu_affinity.c'
source_filename = "AnghaBench/tengine/src/core/extr_nginx.c_ngx_set_cpu_affinity.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NGX_LOG_WARN = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [65 x i8] c"\22worker_cpu_affinity\22 is not supported on this platform, ignored\00", align 1
@NGX_CONF_OK = dso_local local_unnamed_addr global ptr null, align 8
@CPU_SETSIZE = dso_local local_unnamed_addr global i64 0, align 8
@NGX_CONF_ERROR = dso_local local_unnamed_addr global ptr null, align 8
@NGX_LOG_EMERG = dso_local local_unnamed_addr global i32 0, align 4
@ngx_ncpu = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ngx_set_cpu_affinity], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @ngx_set_cpu_affinity(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture readnone %2) #0 {
%4 = load i32, ptr @NGX_LOG_WARN, align 4, !tbaa !5
%5 = tail call i32 (i32, ptr, i32, ptr, ...) @ngx_conf_log_error(i32 noundef %4, ptr noundef %0, i32 noundef 0, ptr noundef nonnull @.str) #2
%6 = load ptr, ptr @NGX_CONF_OK, align 8, !tbaa !9
ret ptr %6
}
declare i32 @ngx_conf_log_error(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
|
; ModuleID = 'AnghaBench/tengine/src/core/extr_nginx.c_ngx_set_cpu_affinity.c'
source_filename = "AnghaBench/tengine/src/core/extr_nginx.c_ngx_set_cpu_affinity.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NGX_LOG_WARN = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [65 x i8] c"\22worker_cpu_affinity\22 is not supported on this platform, ignored\00", align 1
@NGX_CONF_OK = common local_unnamed_addr global ptr null, align 8
@CPU_SETSIZE = common local_unnamed_addr global i64 0, align 8
@NGX_CONF_ERROR = common local_unnamed_addr global ptr null, align 8
@NGX_LOG_EMERG = common local_unnamed_addr global i32 0, align 4
@ngx_ncpu = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ngx_set_cpu_affinity], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @ngx_set_cpu_affinity(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture readnone %2) #0 {
%4 = load i32, ptr @NGX_LOG_WARN, align 4, !tbaa !6
%5 = tail call i32 (i32, ptr, i32, ptr, ...) @ngx_conf_log_error(i32 noundef %4, ptr noundef %0, i32 noundef 0, ptr noundef nonnull @.str) #2
%6 = load ptr, ptr @NGX_CONF_OK, align 8, !tbaa !10
ret ptr %6
}
declare i32 @ngx_conf_log_error(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
|
tengine_src_core_extr_nginx.c_ngx_set_cpu_affinity
|
; ModuleID = 'AnghaBench/linux/fs/9p/extr_vfs_addr.c_v9fs_write_begin.c'
source_filename = "AnghaBench/linux/fs/9p/extr_vfs_addr.c_v9fs_write_begin.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PAGE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@P9_DEBUG_VFS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"filp %p, mapping %p\0A\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @v9fs_write_begin], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @v9fs_write_begin(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr nocapture noundef writeonly %5, ptr nocapture readnone %6) #0 {
%8 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !5
%9 = ashr i32 %2, %8
%10 = load ptr, ptr %1, align 8, !tbaa !9
%11 = load i32, ptr @P9_DEBUG_VFS, align 4, !tbaa !5
%12 = tail call i32 @p9_debug(i32 noundef %11, ptr noundef nonnull @.str, ptr noundef %0, ptr noundef nonnull %1) #2
%13 = tail call ptr @V9FS_I(ptr noundef %10) #2
br label %14
14: ; preds = %30, %7
%15 = tail call ptr @grab_cache_page_write_begin(ptr noundef nonnull %1, i32 noundef %9, i32 noundef %4) #2
%16 = icmp eq ptr %15, null
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%19 = sub nsw i32 0, %18
br label %35
20: ; preds = %14
%21 = load i32, ptr %13, align 4, !tbaa !12
%22 = icmp eq i32 %21, 0
%23 = zext i1 %22 to i32
%24 = tail call i32 @BUG_ON(i32 noundef %23) #2
%25 = tail call i64 @PageUptodate(ptr noundef nonnull %15) #2
%26 = icmp ne i64 %25, 0
%27 = load i32, ptr @PAGE_SIZE, align 4
%28 = icmp eq i32 %27, %3
%29 = select i1 %26, i1 true, i1 %28
br i1 %29, label %35, label %30
30: ; preds = %20
%31 = load i32, ptr %13, align 4, !tbaa !12
%32 = tail call i32 @v9fs_fid_readpage(i32 noundef %31, ptr noundef nonnull %15) #2
%33 = tail call i32 @put_page(ptr noundef nonnull %15) #2
%34 = icmp eq i32 %32, 0
br i1 %34, label %14, label %35
35: ; preds = %30, %20, %17
%36 = phi i32 [ %19, %17 ], [ %32, %30 ], [ 0, %20 ]
store ptr %15, ptr %5, align 8, !tbaa !14
ret i32 %36
}
declare i32 @p9_debug(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @V9FS_I(ptr noundef) local_unnamed_addr #1
declare ptr @grab_cache_page_write_begin(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
declare i64 @PageUptodate(ptr noundef) local_unnamed_addr #1
declare i32 @v9fs_fid_readpage(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @put_page(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"address_space", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"v9fs_inode", !6, i64 0}
!14 = !{!11, !11, i64 0}
|
; ModuleID = 'AnghaBench/linux/fs/9p/extr_vfs_addr.c_v9fs_write_begin.c'
source_filename = "AnghaBench/linux/fs/9p/extr_vfs_addr.c_v9fs_write_begin.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SHIFT = common local_unnamed_addr global i32 0, align 4
@P9_DEBUG_VFS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"filp %p, mapping %p\0A\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @v9fs_write_begin], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @v9fs_write_begin(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr nocapture noundef writeonly %5, ptr nocapture readnone %6) #0 {
%8 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !6
%9 = ashr i32 %2, %8
%10 = load ptr, ptr %1, align 8, !tbaa !10
%11 = load i32, ptr @P9_DEBUG_VFS, align 4, !tbaa !6
%12 = tail call i32 @p9_debug(i32 noundef %11, ptr noundef nonnull @.str, ptr noundef %0, ptr noundef nonnull %1) #2
%13 = tail call ptr @V9FS_I(ptr noundef %10) #2
br label %14
14: ; preds = %30, %7
%15 = tail call ptr @grab_cache_page_write_begin(ptr noundef nonnull %1, i32 noundef %9, i32 noundef %4) #2
%16 = icmp eq ptr %15, null
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%19 = sub nsw i32 0, %18
br label %35
20: ; preds = %14
%21 = load i32, ptr %13, align 4, !tbaa !13
%22 = icmp eq i32 %21, 0
%23 = zext i1 %22 to i32
%24 = tail call i32 @BUG_ON(i32 noundef %23) #2
%25 = tail call i64 @PageUptodate(ptr noundef nonnull %15) #2
%26 = icmp ne i64 %25, 0
%27 = load i32, ptr @PAGE_SIZE, align 4
%28 = icmp eq i32 %27, %3
%29 = select i1 %26, i1 true, i1 %28
br i1 %29, label %35, label %30
30: ; preds = %20
%31 = load i32, ptr %13, align 4, !tbaa !13
%32 = tail call i32 @v9fs_fid_readpage(i32 noundef %31, ptr noundef nonnull %15) #2
%33 = tail call i32 @put_page(ptr noundef nonnull %15) #2
%34 = icmp eq i32 %32, 0
br i1 %34, label %14, label %35
35: ; preds = %30, %20, %17
%36 = phi i32 [ %19, %17 ], [ %32, %30 ], [ 0, %20 ]
store ptr %15, ptr %5, align 8, !tbaa !15
ret i32 %36
}
declare i32 @p9_debug(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @V9FS_I(ptr noundef) local_unnamed_addr #1
declare ptr @grab_cache_page_write_begin(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
declare i64 @PageUptodate(ptr noundef) local_unnamed_addr #1
declare i32 @v9fs_fid_readpage(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @put_page(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"address_space", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"v9fs_inode", !7, i64 0}
!15 = !{!12, !12, i64 0}
|
linux_fs_9p_extr_vfs_addr.c_v9fs_write_begin
|
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/fitz/extr_draw-scale-simple.c_check_weights.c'
source_filename = "AnghaBench/sumatrapdf/mupdf/source/fitz/extr_draw-scale-simple.c_check_weights.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @check_weights], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define internal void @check_weights(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2, float noundef %3, float noundef %4) #0 {
%6 = load ptr, ptr %0, align 8, !tbaa !5
%7 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%8 = load i32, ptr %7, align 8, !tbaa !11
%9 = sub nsw i32 %1, %8
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, ptr %6, i64 %10
%12 = load i32, ptr %11, align 4, !tbaa !12
%13 = sext i32 %12 to i64
%14 = getelementptr i32, ptr %6, i64 %13
%15 = getelementptr i32, ptr %14, i64 1
%16 = load i32, ptr %15, align 4, !tbaa !12
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %70
18: ; preds = %5
%19 = add i32 %12, 2
%20 = sext i32 %19 to i64
%21 = and i32 %16, 1
%22 = icmp eq i32 %16, 1
br i1 %22, label %49, label %23
23: ; preds = %18
%24 = and i32 %16, 2147483646
br label %25
25: ; preds = %25, %23
%26 = phi i64 [ %20, %23 ], [ %39, %25 ]
%27 = phi i32 [ 0, %23 ], [ %46, %25 ]
%28 = phi i32 [ -256, %23 ], [ %44, %25 ]
%29 = phi i32 [ 0, %23 ], [ %42, %25 ]
%30 = phi i32 [ 0, %23 ], [ %47, %25 ]
%31 = add nsw i64 %26, 1
%32 = getelementptr inbounds i32, ptr %6, i64 %26
%33 = load i32, ptr %32, align 4, !tbaa !12
%34 = add nsw i32 %33, %29
%35 = icmp sgt i32 %33, %28
%36 = tail call i32 @llvm.smax.i32(i32 %33, i32 %28)
%37 = trunc i64 %31 to i32
%38 = select i1 %35, i32 %37, i32 %27
%39 = add nsw i64 %26, 2
%40 = getelementptr inbounds i32, ptr %6, i64 %31
%41 = load i32, ptr %40, align 4, !tbaa !12
%42 = add nsw i32 %41, %34
%43 = icmp sgt i32 %41, %36
%44 = tail call i32 @llvm.smax.i32(i32 %41, i32 %36)
%45 = trunc i64 %39 to i32
%46 = select i1 %43, i32 %45, i32 %38
%47 = add i32 %30, 2
%48 = icmp eq i32 %47, %24
br i1 %48, label %49, label %25, !llvm.loop !13
49: ; preds = %25, %18
%50 = phi i32 [ undef, %18 ], [ %42, %25 ]
%51 = phi i32 [ undef, %18 ], [ %46, %25 ]
%52 = phi i64 [ %20, %18 ], [ %39, %25 ]
%53 = phi i32 [ 0, %18 ], [ %46, %25 ]
%54 = phi i32 [ -256, %18 ], [ %44, %25 ]
%55 = phi i32 [ 0, %18 ], [ %42, %25 ]
%56 = icmp eq i32 %21, 0
br i1 %56, label %65, label %57
57: ; preds = %49
%58 = getelementptr inbounds i32, ptr %6, i64 %52
%59 = load i32, ptr %58, align 4, !tbaa !12
%60 = add nsw i32 %59, %55
%61 = icmp sgt i32 %59, %54
%62 = trunc i64 %52 to i32
%63 = add i32 %62, 1
%64 = select i1 %61, i32 %63, i32 %53
br label %65
65: ; preds = %49, %57
%66 = phi i32 [ %50, %49 ], [ %60, %57 ]
%67 = phi i32 [ %51, %49 ], [ %64, %57 ]
%68 = sext i32 %67 to i64
%69 = icmp eq i32 %1, 0
br i1 %69, label %81, label %72
70: ; preds = %5
%71 = icmp eq i32 %1, 0
br i1 %71, label %83, label %72
72: ; preds = %70, %65
%73 = phi i64 [ 0, %70 ], [ %68, %65 ]
%74 = phi i32 [ 0, %70 ], [ %66, %65 ]
%75 = add nsw i32 %2, -1
%76 = icmp ne i32 %75, %1
%77 = icmp sgt i32 %74, 256
%78 = select i1 %76, i1 true, i1 %77
br i1 %78, label %102, label %79
79: ; preds = %72
%80 = icmp ne i32 %74, 256
br label %91
81: ; preds = %65
%82 = icmp sgt i32 %66, 256
br i1 %82, label %102, label %83
83: ; preds = %70, %81
%84 = phi i32 [ %66, %81 ], [ 0, %70 ]
%85 = phi i64 [ %68, %81 ], [ 0, %70 ]
%86 = fcmp olt float %3, 0x3F1A36E2E0000000
%87 = icmp ne i32 %84, 256
%88 = select i1 %86, i1 %87, i1 false
br i1 %88, label %102, label %89
89: ; preds = %83
%90 = add nsw i32 %2, -1
br label %91
91: ; preds = %89, %79
%92 = phi i64 [ %85, %89 ], [ %73, %79 ]
%93 = phi i32 [ %84, %89 ], [ %74, %79 ]
%94 = phi i32 [ %90, %89 ], [ %75, %79 ]
%95 = phi i1 [ %87, %89 ], [ %80, %79 ]
%96 = icmp eq i32 %94, %1
br i1 %96, label %97, label %110
97: ; preds = %91
%98 = sitofp i32 %2 to float
%99 = fsub float %98, %4
%100 = fcmp olt float %99, 0x3F1A36E2E0000000
%101 = select i1 %100, i1 %95, i1 false
br i1 %101, label %102, label %110
102: ; preds = %97, %83, %72, %81
%103 = phi i64 [ %68, %81 ], [ %73, %72 ], [ %85, %83 ], [ %92, %97 ]
%104 = phi i32 [ %66, %81 ], [ %74, %72 ], [ %84, %83 ], [ %93, %97 ]
%105 = getelementptr i32, ptr %6, i64 %103
%106 = getelementptr i32, ptr %105, i64 -1
%107 = load i32, ptr %106, align 4, !tbaa !12
%108 = sub i32 %107, %104
%109 = add i32 %108, 256
store i32 %109, ptr %106, align 4, !tbaa !12
br label %110
110: ; preds = %102, %97, %91
ret void
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1
attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!10, !10, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/fitz/extr_draw-scale-simple.c_check_weights.c'
source_filename = "AnghaBench/sumatrapdf/mupdf/source/fitz/extr_draw-scale-simple.c_check_weights.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @check_weights], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @check_weights(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2, float noundef %3, float noundef %4) #0 {
%6 = load ptr, ptr %0, align 8, !tbaa !6
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i32, ptr %7, align 8, !tbaa !12
%9 = sub nsw i32 %1, %8
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, ptr %6, i64 %10
%12 = load i32, ptr %11, align 4, !tbaa !13
%13 = sext i32 %12 to i64
%14 = getelementptr i32, ptr %6, i64 %13
%15 = getelementptr i8, ptr %14, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !13
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %40
18: ; preds = %5
%19 = add i32 %12, 2
%20 = sext i32 %19 to i64
br label %21
21: ; preds = %18, %21
%22 = phi i64 [ %20, %18 ], [ %27, %21 ]
%23 = phi i32 [ 0, %18 ], [ %35, %21 ]
%24 = phi i32 [ 0, %18 ], [ %34, %21 ]
%25 = phi i32 [ -256, %18 ], [ %32, %21 ]
%26 = phi i32 [ 0, %18 ], [ %30, %21 ]
%27 = add nsw i64 %22, 1
%28 = getelementptr inbounds i32, ptr %6, i64 %22
%29 = load i32, ptr %28, align 4, !tbaa !13
%30 = add nsw i32 %29, %26
%31 = icmp sgt i32 %29, %25
%32 = tail call i32 @llvm.smax.i32(i32 %29, i32 %25)
%33 = trunc nsw i64 %27 to i32
%34 = select i1 %31, i32 %33, i32 %24
%35 = add nuw nsw i32 %23, 1
%36 = icmp eq i32 %35, %16
br i1 %36, label %37, label %21, !llvm.loop !14
37: ; preds = %21
%38 = sext i32 %34 to i64
%39 = icmp eq i32 %1, 0
br i1 %39, label %51, label %42
40: ; preds = %5
%41 = icmp eq i32 %1, 0
br i1 %41, label %53, label %42
42: ; preds = %40, %37
%43 = phi i64 [ 0, %40 ], [ %38, %37 ]
%44 = phi i32 [ 0, %40 ], [ %30, %37 ]
%45 = add nsw i32 %2, -1
%46 = icmp ne i32 %45, %1
%47 = icmp sgt i32 %44, 256
%48 = select i1 %46, i1 true, i1 %47
br i1 %48, label %70, label %49
49: ; preds = %42
%50 = icmp ne i32 %44, 256
br label %62
51: ; preds = %37
%52 = icmp sgt i32 %30, 256
br i1 %52, label %70, label %53
53: ; preds = %40, %51
%54 = phi i32 [ %30, %51 ], [ 0, %40 ]
%55 = phi i64 [ %38, %51 ], [ 0, %40 ]
%56 = fcmp olt float %3, 0x3F1A36E2E0000000
%57 = icmp ne i32 %54, 256
%58 = select i1 %56, i1 %57, i1 false
br i1 %58, label %70, label %59
59: ; preds = %53
%60 = add nsw i32 %2, -1
%61 = icmp eq i32 %60, %1
br i1 %61, label %62, label %78
62: ; preds = %49, %59
%63 = phi i1 [ %50, %49 ], [ %57, %59 ]
%64 = phi i32 [ %44, %49 ], [ %54, %59 ]
%65 = phi i64 [ %43, %49 ], [ %55, %59 ]
%66 = sitofp i32 %2 to float
%67 = fsub float %66, %4
%68 = fcmp olt float %67, 0x3F1A36E2E0000000
%69 = select i1 %68, i1 %63, i1 false
br i1 %69, label %70, label %78
70: ; preds = %62, %53, %42, %51
%71 = phi i64 [ %38, %51 ], [ %43, %42 ], [ %55, %53 ], [ %65, %62 ]
%72 = phi i32 [ %30, %51 ], [ %44, %42 ], [ %54, %53 ], [ %64, %62 ]
%73 = getelementptr i32, ptr %6, i64 %71
%74 = getelementptr i8, ptr %73, i64 -4
%75 = load i32, ptr %74, align 4, !tbaa !13
%76 = sub i32 %75, %72
%77 = add i32 %76, 256
store i32 %77, ptr %74, align 4, !tbaa !13
br label %78
78: ; preds = %70, %62, %59
ret void
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!11, !11, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
|
sumatrapdf_mupdf_source_fitz_extr_draw-scale-simple.c_check_weights
|
; ModuleID = 'AnghaBench/qmk_firmware/tmk_core/protocol/extr_ps2.h_wait_clock_lo.c'
source_filename = "AnghaBench/qmk_firmware/tmk_core/protocol/extr_ps2.h_wait_clock_lo.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @wait_clock_lo], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i64 @wait_clock_lo(i64 noundef %0) #0 {
%2 = tail call i64 (...) @clock_in() #2
%3 = icmp ne i64 %2, 0
%4 = icmp ne i64 %0, 0
%5 = and i1 %3, %4
br i1 %5, label %6, label %14
6: ; preds = %1, %6
%7 = phi i64 [ %9, %6 ], [ %0, %1 ]
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !5
%8 = tail call i32 @wait_us(i32 noundef 1) #2
%9 = add nsw i64 %7, -1
%10 = tail call i64 (...) @clock_in() #2
%11 = icmp ne i64 %10, 0
%12 = icmp ne i64 %9, 0
%13 = select i1 %11, i1 %12, i1 false
br i1 %13, label %6, label %14, !llvm.loop !6
14: ; preds = %6, %1
%15 = phi i64 [ %0, %1 ], [ %9, %6 ]
ret i64 %15
}
declare i64 @clock_in(...) local_unnamed_addr #1
declare i32 @wait_us(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{i64 606}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/qmk_firmware/tmk_core/protocol/extr_ps2.h_wait_clock_lo.c'
source_filename = "AnghaBench/qmk_firmware/tmk_core/protocol/extr_ps2.h_wait_clock_lo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @wait_clock_lo], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i64 @wait_clock_lo(i64 noundef %0) #0 {
%2 = tail call i64 @clock_in() #2
%3 = icmp ne i64 %2, 0
%4 = icmp ne i64 %0, 0
%5 = and i1 %3, %4
br i1 %5, label %6, label %14
6: ; preds = %1, %6
%7 = phi i64 [ %9, %6 ], [ %0, %1 ]
tail call void asm sideeffect "", ""() #2, !srcloc !6
%8 = tail call i32 @wait_us(i32 noundef 1) #2
%9 = add nsw i64 %7, -1
%10 = tail call i64 @clock_in() #2
%11 = icmp ne i64 %10, 0
%12 = icmp ne i64 %9, 0
%13 = select i1 %11, i1 %12, i1 false
br i1 %13, label %6, label %14, !llvm.loop !7
14: ; preds = %6, %1
%15 = phi i64 [ %0, %1 ], [ %9, %6 ]
ret i64 %15
}
declare i64 @clock_in(...) local_unnamed_addr #1
declare i32 @wait_us(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{i64 606}
!7 = distinct !{!7, !8}
!8 = !{!"llvm.loop.mustprogress"}
|
qmk_firmware_tmk_core_protocol_extr_ps2.h_wait_clock_lo
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/extr_xsysace.c_ace_in32.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/extr_xsysace.c_ace_in32.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ace_in32], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @ace_in32(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @ace_in(ptr noundef %0, i32 noundef %1) #2
%4 = add nsw i32 %1, 2
%5 = tail call i32 @ace_in(ptr noundef %0, i32 noundef %4) #2
%6 = shl i32 %5, 16
%7 = or i32 %6, %3
ret i32 %7
}
declare i32 @ace_in(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/extr_xsysace.c_ace_in32.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/extr_xsysace.c_ace_in32.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ace_in32], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @ace_in32(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @ace_in(ptr noundef %0, i32 noundef %1) #2
%4 = add nsw i32 %1, 2
%5 = tail call i32 @ace_in(ptr noundef %0, i32 noundef %4) #2
%6 = shl i32 %5, 16
%7 = or i32 %6, %3
ret i32 %7
}
declare i32 @ace_in(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_drivers_block_extr_xsysace.c_ace_in32
|
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_bss_conn.c_conn_ctrl.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_bss_conn.c_conn_ctrl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_13__ = type { i32, i32, i64, i32, i64 }
%struct.TYPE_12__ = type { ptr, ptr, i64, i32, ptr, ptr, ptr, i32 }
@BIO_CONN_S_BEFORE = dso_local local_unnamed_addr global i32 0, align 4
@BIO_CONN_S_OK = dso_local local_unnamed_addr global i32 0, align 4
@BIO_FAMILY_IPV6 = dso_local local_unnamed_addr global i64 0, align 8
@BIO_FAMILY_IPV4 = dso_local local_unnamed_addr global i64 0, align 8
@BIO_PARSE_PRIO_HOST = dso_local local_unnamed_addr global i32 0, align 4
@BIO_SOCK_NONBLOCK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @conn_ctrl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @conn_ctrl(ptr noundef %0, i32 noundef %1, i64 noundef %2, ptr noundef %3) #0 {
%5 = getelementptr inbounds %struct.TYPE_13__, ptr %0, i64 0, i32 4
%6 = load i64, ptr %5, align 8, !tbaa !5
%7 = inttoptr i64 %6 to ptr
switch i32 %1, label %137 [
i32 137, label %8
i32 133, label %16
i32 132, label %23
i32 130, label %47
i32 128, label %78
i32 129, label %90
i32 131, label %93
i32 139, label %103
i32 135, label %106
i32 138, label %110
i32 134, label %110
i32 141, label %138
i32 142, label %111
i32 136, label %133
i32 140, label %134
]
8: ; preds = %4
%9 = load i32, ptr @BIO_CONN_S_BEFORE, align 4, !tbaa !11
%10 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 7
store i32 %9, ptr %10, align 8, !tbaa !12
%11 = tail call i32 @conn_close_socket(ptr noundef nonnull %0) #3
%12 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 6
%13 = load ptr, ptr %12, align 8, !tbaa !15
%14 = tail call i32 @BIO_ADDRINFO_free(ptr noundef %13) #3
store ptr null, ptr %12, align 8, !tbaa !15
%15 = getelementptr inbounds %struct.TYPE_13__, ptr %0, i64 0, i32 3
store i32 0, ptr %15, align 8, !tbaa !16
br label %138
16: ; preds = %4
%17 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 7
%18 = load i32, ptr %17, align 8, !tbaa !12
%19 = load i32, ptr @BIO_CONN_S_OK, align 4, !tbaa !11
%20 = icmp eq i32 %18, %19
br i1 %20, label %138, label %21
21: ; preds = %16
%22 = tail call i64 @conn_state(ptr noundef nonnull %0, ptr noundef nonnull %7) #3
br label %138
23: ; preds = %4
%24 = icmp eq ptr %3, null
br i1 %24, label %138, label %25
25: ; preds = %23
switch i64 %2, label %138 [
i64 0, label %26
i64 1, label %28
i64 2, label %31
i64 3, label %36
]
26: ; preds = %25
%27 = load ptr, ptr %7, align 8, !tbaa !17
store ptr %27, ptr %3, align 8, !tbaa !18
br label %138
28: ; preds = %25
%29 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 1
%30 = load ptr, ptr %29, align 8, !tbaa !19
store ptr %30, ptr %3, align 8, !tbaa !18
br label %138
31: ; preds = %25
%32 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 5
%33 = load ptr, ptr %32, align 8, !tbaa !20
%34 = tail call i64 @BIO_ADDRINFO_address(ptr noundef %33) #3
%35 = inttoptr i64 %34 to ptr
store ptr %35, ptr %3, align 8, !tbaa !18
br label %138
36: ; preds = %25
%37 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 5
%38 = load ptr, ptr %37, align 8, !tbaa !20
%39 = tail call i32 @BIO_ADDRINFO_family(ptr noundef %38) #3
switch i32 %39, label %138 [
i32 143, label %40
i32 144, label %42
i32 0, label %44
]
40: ; preds = %36
%41 = load i64, ptr @BIO_FAMILY_IPV6, align 8, !tbaa !21
br label %138
42: ; preds = %36
%43 = load i64, ptr @BIO_FAMILY_IPV4, align 8, !tbaa !21
br label %138
44: ; preds = %36
%45 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 2
%46 = load i64, ptr %45, align 8, !tbaa !22
br label %138
47: ; preds = %4
%48 = icmp eq ptr %3, null
br i1 %48, label %138, label %49
49: ; preds = %47
store i32 1, ptr %0, align 8, !tbaa !23
switch i64 %2, label %138 [
i64 0, label %50
i64 1, label %61
i64 2, label %66
i64 3, label %74
]
50: ; preds = %49
%51 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 1
%52 = load ptr, ptr %51, align 8, !tbaa !19
%53 = load ptr, ptr %7, align 8, !tbaa !17
%54 = tail call i32 @OPENSSL_free(ptr noundef %53) #3
store ptr null, ptr %7, align 8, !tbaa !17
%55 = load i32, ptr @BIO_PARSE_PRIO_HOST, align 4, !tbaa !11
%56 = tail call i64 @BIO_parse_hostserv(ptr noundef nonnull %3, ptr noundef nonnull %7, ptr noundef nonnull %51, i32 noundef %55) #3
%57 = load ptr, ptr %51, align 8, !tbaa !19
%58 = icmp eq ptr %52, %57
br i1 %58, label %138, label %59
59: ; preds = %50
%60 = tail call i32 @OPENSSL_free(ptr noundef %52) #3
br label %138
61: ; preds = %49
%62 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 1
%63 = load ptr, ptr %62, align 8, !tbaa !19
%64 = tail call i32 @OPENSSL_free(ptr noundef %63) #3
%65 = tail call ptr @BUF_strdup(ptr noundef nonnull %3) #3
store ptr %65, ptr %62, align 8, !tbaa !19
br label %138
66: ; preds = %49
%67 = tail call ptr @BIO_ADDR_hostname_string(ptr noundef nonnull %3, i32 noundef 1) #3
store ptr %67, ptr %7, align 8, !tbaa !17
%68 = tail call ptr @BIO_ADDR_service_string(ptr noundef nonnull %3, i32 noundef 1) #3
%69 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 1
store ptr %68, ptr %69, align 8, !tbaa !19
%70 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 6
%71 = load ptr, ptr %70, align 8, !tbaa !15
%72 = tail call i32 @BIO_ADDRINFO_free(ptr noundef %71) #3
%73 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 5
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %73, i8 0, i64 16, i1 false)
br label %138
74: ; preds = %49
%75 = load i32, ptr %3, align 4, !tbaa !11
%76 = sext i32 %75 to i64
%77 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 2
store i64 %76, ptr %77, align 8, !tbaa !22
br label %138
78: ; preds = %4
%79 = icmp eq i64 %2, 0
%80 = load i32, ptr @BIO_SOCK_NONBLOCK, align 4, !tbaa !11
br i1 %79, label %85, label %81
81: ; preds = %78
%82 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 3
%83 = load i32, ptr %82, align 8, !tbaa !24
%84 = or i32 %83, %80
store i32 %84, ptr %82, align 8, !tbaa !24
br label %138
85: ; preds = %78
%86 = xor i32 %80, -1
%87 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 3
%88 = load i32, ptr %87, align 8, !tbaa !24
%89 = and i32 %88, %86
store i32 %89, ptr %87, align 8, !tbaa !24
br label %138
90: ; preds = %4
%91 = trunc i64 %2 to i32
%92 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 3
store i32 %91, ptr %92, align 8, !tbaa !24
br label %138
93: ; preds = %4
%94 = load i32, ptr %0, align 8, !tbaa !23
%95 = icmp eq i32 %94, 0
br i1 %95, label %138, label %96
96: ; preds = %93
%97 = icmp eq ptr %3, null
%98 = getelementptr inbounds %struct.TYPE_13__, ptr %0, i64 0, i32 1
%99 = load i32, ptr %98, align 4, !tbaa !25
br i1 %97, label %101, label %100
100: ; preds = %96
store i32 %99, ptr %3, align 4, !tbaa !11
br label %101
101: ; preds = %96, %100
%102 = sext i32 %99 to i64
br label %138
103: ; preds = %4
%104 = getelementptr inbounds %struct.TYPE_13__, ptr %0, i64 0, i32 2
%105 = load i64, ptr %104, align 8, !tbaa !26
br label %138
106: ; preds = %4
%107 = shl i64 %2, 32
%108 = ashr exact i64 %107, 32
%109 = getelementptr inbounds %struct.TYPE_13__, ptr %0, i64 0, i32 2
store i64 %108, ptr %109, align 8, !tbaa !26
br label %138
110: ; preds = %4, %4
br label %138
111: ; preds = %4
%112 = load ptr, ptr %7, align 8, !tbaa !17
%113 = icmp eq ptr %112, null
br i1 %113, label %116, label %114
114: ; preds = %111
%115 = tail call i32 @BIO_set_conn_hostname(ptr noundef %3, ptr noundef nonnull %112) #3
br label %116
116: ; preds = %114, %111
%117 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 1
%118 = load ptr, ptr %117, align 8, !tbaa !19
%119 = icmp eq ptr %118, null
br i1 %119, label %122, label %120
120: ; preds = %116
%121 = tail call i32 @BIO_set_conn_port(ptr noundef %3, ptr noundef nonnull %118) #3
br label %122
122: ; preds = %120, %116
%123 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 2
%124 = load i64, ptr %123, align 8, !tbaa !22
%125 = trunc i64 %124 to i32
%126 = tail call i32 @BIO_set_conn_ip_family(ptr noundef %3, i32 noundef %125) #3
%127 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 3
%128 = load i32, ptr %127, align 8, !tbaa !24
%129 = tail call i32 @BIO_set_conn_mode(ptr noundef %3, i32 noundef %128) #3
%130 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 4
%131 = load ptr, ptr %130, align 8, !tbaa !27
%132 = tail call i32 @BIO_set_info_callback(ptr noundef %3, ptr noundef %131) #3
br label %138
133: ; preds = %4
br label %138
134: ; preds = %4
%135 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 4
%136 = load ptr, ptr %135, align 8, !tbaa !27
store ptr %136, ptr %3, align 8, !tbaa !18
br label %138
137: ; preds = %4
br label %138
138: ; preds = %93, %49, %50, %59, %23, %25, %36, %16, %101, %81, %85, %47, %61, %74, %66, %28, %44, %42, %40, %31, %26, %21, %137, %134, %133, %122, %4, %110, %106, %103, %90, %8
%139 = phi i64 [ 0, %137 ], [ 1, %134 ], [ 0, %133 ], [ 1, %122 ], [ 1, %4 ], [ 0, %110 ], [ 1, %106 ], [ %105, %103 ], [ %102, %101 ], [ 1, %90 ], [ 1, %81 ], [ 1, %85 ], [ 1, %61 ], [ 1, %66 ], [ 1, %74 ], [ 1, %47 ], [ 1, %26 ], [ 1, %28 ], [ 1, %31 ], [ %46, %44 ], [ %43, %42 ], [ %41, %40 ], [ %22, %21 ], [ 0, %8 ], [ 1, %16 ], [ -1, %36 ], [ 0, %25 ], [ 0, %23 ], [ %56, %59 ], [ %56, %50 ], [ 0, %49 ], [ -1, %93 ]
ret i64 %139
}
declare i32 @conn_close_socket(ptr noundef) local_unnamed_addr #1
declare i32 @BIO_ADDRINFO_free(ptr noundef) local_unnamed_addr #1
declare i64 @conn_state(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @BIO_ADDRINFO_address(ptr noundef) local_unnamed_addr #1
declare i32 @BIO_ADDRINFO_family(ptr noundef) local_unnamed_addr #1
declare i32 @OPENSSL_free(ptr noundef) local_unnamed_addr #1
declare i64 @BIO_parse_hostserv(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @BUF_strdup(ptr noundef) local_unnamed_addr #1
declare ptr @BIO_ADDR_hostname_string(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @BIO_ADDR_service_string(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIO_set_conn_hostname(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BIO_set_conn_port(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BIO_set_conn_ip_family(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIO_set_conn_mode(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIO_set_info_callback(ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"TYPE_13__", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !7, i64 56}
!13 = !{!"TYPE_12__", !14, i64 0, !14, i64 8, !10, i64 16, !7, i64 24, !14, i64 32, !14, i64 40, !14, i64 48, !7, i64 56}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!13, !14, i64 48}
!16 = !{!6, !7, i64 16}
!17 = !{!13, !14, i64 0}
!18 = !{!14, !14, i64 0}
!19 = !{!13, !14, i64 8}
!20 = !{!13, !14, i64 40}
!21 = !{!10, !10, i64 0}
!22 = !{!13, !10, i64 16}
!23 = !{!6, !7, i64 0}
!24 = !{!13, !7, i64 24}
!25 = !{!6, !7, i64 4}
!26 = !{!6, !10, i64 8}
!27 = !{!13, !14, i64 32}
|
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_bss_conn.c_conn_ctrl.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_bss_conn.c_conn_ctrl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BIO_CONN_S_BEFORE = common local_unnamed_addr global i32 0, align 4
@BIO_CONN_S_OK = common local_unnamed_addr global i32 0, align 4
@BIO_FAMILY_IPV6 = common local_unnamed_addr global i64 0, align 8
@BIO_FAMILY_IPV4 = common local_unnamed_addr global i64 0, align 8
@BIO_PARSE_PRIO_HOST = common local_unnamed_addr global i32 0, align 4
@BIO_SOCK_NONBLOCK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @conn_ctrl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @conn_ctrl(ptr noundef %0, i32 noundef %1, i64 noundef %2, ptr noundef %3) #0 {
%5 = getelementptr inbounds i8, ptr %0, i64 24
%6 = load i64, ptr %5, align 8, !tbaa !6
%7 = inttoptr i64 %6 to ptr
switch i32 %1, label %137 [
i32 137, label %8
i32 133, label %16
i32 132, label %23
i32 130, label %47
i32 128, label %78
i32 129, label %90
i32 131, label %93
i32 139, label %103
i32 135, label %106
i32 138, label %110
i32 134, label %110
i32 141, label %138
i32 142, label %111
i32 136, label %133
i32 140, label %134
]
8: ; preds = %4
%9 = load i32, ptr @BIO_CONN_S_BEFORE, align 4, !tbaa !12
%10 = getelementptr inbounds i8, ptr %7, i64 56
store i32 %9, ptr %10, align 8, !tbaa !13
%11 = tail call i32 @conn_close_socket(ptr noundef nonnull %0) #3
%12 = getelementptr inbounds i8, ptr %7, i64 48
%13 = load ptr, ptr %12, align 8, !tbaa !16
%14 = tail call i32 @BIO_ADDRINFO_free(ptr noundef %13) #3
store ptr null, ptr %12, align 8, !tbaa !16
%15 = getelementptr inbounds i8, ptr %0, i64 16
store i32 0, ptr %15, align 8, !tbaa !17
br label %138
16: ; preds = %4
%17 = getelementptr inbounds i8, ptr %7, i64 56
%18 = load i32, ptr %17, align 8, !tbaa !13
%19 = load i32, ptr @BIO_CONN_S_OK, align 4, !tbaa !12
%20 = icmp eq i32 %18, %19
br i1 %20, label %138, label %21
21: ; preds = %16
%22 = tail call i64 @conn_state(ptr noundef nonnull %0, ptr noundef nonnull %7) #3
br label %138
23: ; preds = %4
%24 = icmp eq ptr %3, null
br i1 %24, label %138, label %25
25: ; preds = %23
switch i64 %2, label %138 [
i64 0, label %26
i64 1, label %28
i64 2, label %31
i64 3, label %36
]
26: ; preds = %25
%27 = load ptr, ptr %7, align 8, !tbaa !18
store ptr %27, ptr %3, align 8, !tbaa !19
br label %138
28: ; preds = %25
%29 = getelementptr inbounds i8, ptr %7, i64 8
%30 = load ptr, ptr %29, align 8, !tbaa !20
store ptr %30, ptr %3, align 8, !tbaa !19
br label %138
31: ; preds = %25
%32 = getelementptr inbounds i8, ptr %7, i64 40
%33 = load ptr, ptr %32, align 8, !tbaa !21
%34 = tail call i64 @BIO_ADDRINFO_address(ptr noundef %33) #3
%35 = inttoptr i64 %34 to ptr
store ptr %35, ptr %3, align 8, !tbaa !19
br label %138
36: ; preds = %25
%37 = getelementptr inbounds i8, ptr %7, i64 40
%38 = load ptr, ptr %37, align 8, !tbaa !21
%39 = tail call i32 @BIO_ADDRINFO_family(ptr noundef %38) #3
switch i32 %39, label %138 [
i32 143, label %40
i32 144, label %42
i32 0, label %44
]
40: ; preds = %36
%41 = load i64, ptr @BIO_FAMILY_IPV6, align 8, !tbaa !22
br label %138
42: ; preds = %36
%43 = load i64, ptr @BIO_FAMILY_IPV4, align 8, !tbaa !22
br label %138
44: ; preds = %36
%45 = getelementptr inbounds i8, ptr %7, i64 16
%46 = load i64, ptr %45, align 8, !tbaa !23
br label %138
47: ; preds = %4
%48 = icmp eq ptr %3, null
br i1 %48, label %138, label %49
49: ; preds = %47
store i32 1, ptr %0, align 8, !tbaa !24
switch i64 %2, label %138 [
i64 0, label %50
i64 1, label %61
i64 2, label %66
i64 3, label %74
]
50: ; preds = %49
%51 = getelementptr inbounds i8, ptr %7, i64 8
%52 = load ptr, ptr %51, align 8, !tbaa !20
%53 = load ptr, ptr %7, align 8, !tbaa !18
%54 = tail call i32 @OPENSSL_free(ptr noundef %53) #3
store ptr null, ptr %7, align 8, !tbaa !18
%55 = load i32, ptr @BIO_PARSE_PRIO_HOST, align 4, !tbaa !12
%56 = tail call i64 @BIO_parse_hostserv(ptr noundef nonnull %3, ptr noundef nonnull %7, ptr noundef nonnull %51, i32 noundef %55) #3
%57 = load ptr, ptr %51, align 8, !tbaa !20
%58 = icmp eq ptr %52, %57
br i1 %58, label %138, label %59
59: ; preds = %50
%60 = tail call i32 @OPENSSL_free(ptr noundef %52) #3
br label %138
61: ; preds = %49
%62 = getelementptr inbounds i8, ptr %7, i64 8
%63 = load ptr, ptr %62, align 8, !tbaa !20
%64 = tail call i32 @OPENSSL_free(ptr noundef %63) #3
%65 = tail call ptr @BUF_strdup(ptr noundef nonnull %3) #3
store ptr %65, ptr %62, align 8, !tbaa !20
br label %138
66: ; preds = %49
%67 = tail call ptr @BIO_ADDR_hostname_string(ptr noundef nonnull %3, i32 noundef 1) #3
store ptr %67, ptr %7, align 8, !tbaa !18
%68 = tail call ptr @BIO_ADDR_service_string(ptr noundef nonnull %3, i32 noundef 1) #3
%69 = getelementptr inbounds i8, ptr %7, i64 8
store ptr %68, ptr %69, align 8, !tbaa !20
%70 = getelementptr inbounds i8, ptr %7, i64 48
%71 = load ptr, ptr %70, align 8, !tbaa !16
%72 = tail call i32 @BIO_ADDRINFO_free(ptr noundef %71) #3
%73 = getelementptr inbounds i8, ptr %7, i64 40
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %73, i8 0, i64 16, i1 false)
br label %138
74: ; preds = %49
%75 = load i32, ptr %3, align 4, !tbaa !12
%76 = sext i32 %75 to i64
%77 = getelementptr inbounds i8, ptr %7, i64 16
store i64 %76, ptr %77, align 8, !tbaa !23
br label %138
78: ; preds = %4
%79 = icmp eq i64 %2, 0
%80 = load i32, ptr @BIO_SOCK_NONBLOCK, align 4, !tbaa !12
br i1 %79, label %85, label %81
81: ; preds = %78
%82 = getelementptr inbounds i8, ptr %7, i64 24
%83 = load i32, ptr %82, align 8, !tbaa !25
%84 = or i32 %83, %80
store i32 %84, ptr %82, align 8, !tbaa !25
br label %138
85: ; preds = %78
%86 = xor i32 %80, -1
%87 = getelementptr inbounds i8, ptr %7, i64 24
%88 = load i32, ptr %87, align 8, !tbaa !25
%89 = and i32 %88, %86
store i32 %89, ptr %87, align 8, !tbaa !25
br label %138
90: ; preds = %4
%91 = trunc i64 %2 to i32
%92 = getelementptr inbounds i8, ptr %7, i64 24
store i32 %91, ptr %92, align 8, !tbaa !25
br label %138
93: ; preds = %4
%94 = load i32, ptr %0, align 8, !tbaa !24
%95 = icmp eq i32 %94, 0
br i1 %95, label %138, label %96
96: ; preds = %93
%97 = icmp eq ptr %3, null
%98 = getelementptr inbounds i8, ptr %0, i64 4
%99 = load i32, ptr %98, align 4, !tbaa !26
br i1 %97, label %101, label %100
100: ; preds = %96
store i32 %99, ptr %3, align 4, !tbaa !12
br label %101
101: ; preds = %96, %100
%102 = sext i32 %99 to i64
br label %138
103: ; preds = %4
%104 = getelementptr inbounds i8, ptr %0, i64 8
%105 = load i64, ptr %104, align 8, !tbaa !27
br label %138
106: ; preds = %4
%107 = shl i64 %2, 32
%108 = ashr exact i64 %107, 32
%109 = getelementptr inbounds i8, ptr %0, i64 8
store i64 %108, ptr %109, align 8, !tbaa !27
br label %138
110: ; preds = %4, %4
br label %138
111: ; preds = %4
%112 = load ptr, ptr %7, align 8, !tbaa !18
%113 = icmp eq ptr %112, null
br i1 %113, label %116, label %114
114: ; preds = %111
%115 = tail call i32 @BIO_set_conn_hostname(ptr noundef %3, ptr noundef nonnull %112) #3
br label %116
116: ; preds = %114, %111
%117 = getelementptr inbounds i8, ptr %7, i64 8
%118 = load ptr, ptr %117, align 8, !tbaa !20
%119 = icmp eq ptr %118, null
br i1 %119, label %122, label %120
120: ; preds = %116
%121 = tail call i32 @BIO_set_conn_port(ptr noundef %3, ptr noundef nonnull %118) #3
br label %122
122: ; preds = %120, %116
%123 = getelementptr inbounds i8, ptr %7, i64 16
%124 = load i64, ptr %123, align 8, !tbaa !23
%125 = trunc i64 %124 to i32
%126 = tail call i32 @BIO_set_conn_ip_family(ptr noundef %3, i32 noundef %125) #3
%127 = getelementptr inbounds i8, ptr %7, i64 24
%128 = load i32, ptr %127, align 8, !tbaa !25
%129 = tail call i32 @BIO_set_conn_mode(ptr noundef %3, i32 noundef %128) #3
%130 = getelementptr inbounds i8, ptr %7, i64 32
%131 = load ptr, ptr %130, align 8, !tbaa !28
%132 = tail call i32 @BIO_set_info_callback(ptr noundef %3, ptr noundef %131) #3
br label %138
133: ; preds = %4
br label %138
134: ; preds = %4
%135 = getelementptr inbounds i8, ptr %7, i64 32
%136 = load ptr, ptr %135, align 8, !tbaa !28
store ptr %136, ptr %3, align 8, !tbaa !19
br label %138
137: ; preds = %4
br label %138
138: ; preds = %93, %49, %50, %59, %23, %25, %36, %16, %101, %81, %85, %47, %61, %74, %66, %28, %44, %42, %40, %31, %26, %21, %137, %134, %133, %122, %4, %110, %106, %103, %90, %8
%139 = phi i64 [ 0, %137 ], [ 1, %134 ], [ 0, %133 ], [ 1, %122 ], [ 1, %4 ], [ 0, %110 ], [ 1, %106 ], [ %105, %103 ], [ %102, %101 ], [ 1, %90 ], [ 1, %81 ], [ 1, %85 ], [ 1, %61 ], [ 1, %66 ], [ 1, %74 ], [ 1, %47 ], [ 1, %26 ], [ 1, %28 ], [ 1, %31 ], [ %46, %44 ], [ %43, %42 ], [ %41, %40 ], [ %22, %21 ], [ 0, %8 ], [ 1, %16 ], [ -1, %36 ], [ 0, %25 ], [ 0, %23 ], [ %56, %59 ], [ %56, %50 ], [ 0, %49 ], [ -1, %93 ]
ret i64 %139
}
declare i32 @conn_close_socket(ptr noundef) local_unnamed_addr #1
declare i32 @BIO_ADDRINFO_free(ptr noundef) local_unnamed_addr #1
declare i64 @conn_state(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @BIO_ADDRINFO_address(ptr noundef) local_unnamed_addr #1
declare i32 @BIO_ADDRINFO_family(ptr noundef) local_unnamed_addr #1
declare i32 @OPENSSL_free(ptr noundef) local_unnamed_addr #1
declare i64 @BIO_parse_hostserv(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @BUF_strdup(ptr noundef) local_unnamed_addr #1
declare ptr @BIO_ADDR_hostname_string(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @BIO_ADDR_service_string(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIO_set_conn_hostname(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BIO_set_conn_port(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BIO_set_conn_ip_family(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIO_set_conn_mode(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIO_set_info_callback(ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 24}
!7 = !{!"TYPE_13__", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16, !11, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !8, i64 56}
!14 = !{!"TYPE_12__", !15, i64 0, !15, i64 8, !11, i64 16, !8, i64 24, !15, i64 32, !15, i64 40, !15, i64 48, !8, i64 56}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!14, !15, i64 48}
!17 = !{!7, !8, i64 16}
!18 = !{!14, !15, i64 0}
!19 = !{!15, !15, i64 0}
!20 = !{!14, !15, i64 8}
!21 = !{!14, !15, i64 40}
!22 = !{!11, !11, i64 0}
!23 = !{!14, !11, i64 16}
!24 = !{!7, !8, i64 0}
!25 = !{!14, !8, i64 24}
!26 = !{!7, !8, i64 4}
!27 = !{!7, !11, i64 8}
!28 = !{!14, !15, i64 32}
|
freebsd_crypto_openssl_crypto_bio_extr_bss_conn.c_conn_ctrl
|
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/x509/extr_x509_cmp.c_X509_issuer_name_hash_old.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/x509/extr_x509_cmp.c_X509_issuer_name_hash_old.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i64 @X509_issuer_name_hash_old(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = tail call i64 @X509_NAME_hash_old(i32 noundef %2) #2
ret i64 %3
}
declare i64 @X509_NAME_hash_old(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/x509/extr_x509_cmp.c_X509_issuer_name_hash_old.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/x509/extr_x509_cmp.c_X509_issuer_name_hash_old.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @X509_issuer_name_hash_old(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call i64 @X509_NAME_hash_old(i32 noundef %2) #2
ret i64 %3
}
declare i64 @X509_NAME_hash_old(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
|
freebsd_crypto_openssl_crypto_x509_extr_x509_cmp.c_X509_issuer_name_hash_old
|
; ModuleID = 'AnghaBench/freebsd/usr.sbin/bhyve/extr_xmsr.c_init_msr.c'
source_filename = "AnghaBench/freebsd/usr.sbin/bhyve/extr_xmsr.c_init_msr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [13 x i8] c"AuthenticAMD\00", align 1
@cpu_vendor_amd = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [13 x i8] c"GenuineIntel\00", align 1
@cpu_vendor_intel = dso_local local_unnamed_addr global i32 0, align 4
@stderr = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [25 x i8] c"Unknown cpu vendor \22%s\22\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @init_msr() local_unnamed_addr #0 {
%1 = alloca [4 x i32], align 16
%2 = alloca [13 x i8], align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 13, ptr nonnull %2) #3
%3 = call i32 @do_cpuid(i32 noundef 0, ptr noundef nonnull %1) #3
%4 = getelementptr inbounds [4 x i32], ptr %1, i64 0, i64 1
%5 = load i32, ptr %4, align 4, !tbaa !5
store i32 %5, ptr %2, align 4, !tbaa !5
%6 = getelementptr inbounds i32, ptr %2, i64 1
%7 = getelementptr inbounds [4 x i32], ptr %1, i64 0, i64 2
%8 = load <2 x i32>, ptr %7, align 8, !tbaa !5
%9 = shufflevector <2 x i32> %8, <2 x i32> poison, <2 x i32> <i32 1, i32 0>
store <2 x i32> %9, ptr %6, align 4, !tbaa !5
%10 = getelementptr inbounds [13 x i8], ptr %2, i64 0, i64 12
store i8 0, ptr %10, align 4, !tbaa !9
%11 = call i64 @strcmp(ptr noundef nonnull %2, ptr noundef nonnull @.str) #3
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %0
store i32 1, ptr @cpu_vendor_amd, align 4, !tbaa !5
br label %21
14: ; preds = %0
%15 = call i64 @strcmp(ptr noundef nonnull %2, ptr noundef nonnull @.str.1) #3
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %14
store i32 1, ptr @cpu_vendor_intel, align 4, !tbaa !5
br label %21
18: ; preds = %14
%19 = load i32, ptr @stderr, align 4, !tbaa !5
%20 = call i32 @fprintf(i32 noundef %19, ptr noundef nonnull @.str.2, ptr noundef nonnull %2) #3
br label %21
21: ; preds = %17, %18, %13
%22 = phi i32 [ 0, %13 ], [ 0, %17 ], [ -1, %18 ]
call void @llvm.lifetime.end.p0(i64 13, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) #3
ret i32 %22
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @do_cpuid(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @fprintf(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/usr.sbin/bhyve/extr_xmsr.c_init_msr.c'
source_filename = "AnghaBench/freebsd/usr.sbin/bhyve/extr_xmsr.c_init_msr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [13 x i8] c"AuthenticAMD\00", align 1
@cpu_vendor_amd = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [13 x i8] c"GenuineIntel\00", align 1
@cpu_vendor_intel = common local_unnamed_addr global i32 0, align 4
@stderr = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [25 x i8] c"Unknown cpu vendor \22%s\22\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -1, 1) i32 @init_msr() local_unnamed_addr #0 {
%1 = alloca [4 x i32], align 4
%2 = alloca [13 x i8], align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 13, ptr nonnull %2) #3
%3 = call i32 @do_cpuid(i32 noundef 0, ptr noundef nonnull %1) #3
%4 = getelementptr inbounds i8, ptr %1, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !6
store i32 %5, ptr %2, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %2, i64 4
%7 = getelementptr inbounds i8, ptr %1, i64 8
%8 = load <2 x i32>, ptr %7, align 4, !tbaa !6
%9 = shufflevector <2 x i32> %8, <2 x i32> poison, <2 x i32> <i32 1, i32 0>
store <2 x i32> %9, ptr %6, align 4, !tbaa !6
%10 = getelementptr inbounds i8, ptr %2, i64 12
store i8 0, ptr %10, align 4, !tbaa !10
%11 = call i64 @strcmp(ptr noundef nonnull %2, ptr noundef nonnull @.str) #3
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %0
store i32 1, ptr @cpu_vendor_amd, align 4, !tbaa !6
br label %21
14: ; preds = %0
%15 = call i64 @strcmp(ptr noundef nonnull %2, ptr noundef nonnull @.str.1) #3
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %14
store i32 1, ptr @cpu_vendor_intel, align 4, !tbaa !6
br label %21
18: ; preds = %14
%19 = load i32, ptr @stderr, align 4, !tbaa !6
%20 = call i32 @fprintf(i32 noundef %19, ptr noundef nonnull @.str.2, ptr noundef nonnull %2) #3
br label %21
21: ; preds = %17, %18, %13
%22 = phi i32 [ 0, %13 ], [ 0, %17 ], [ -1, %18 ]
call void @llvm.lifetime.end.p0(i64 13, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) #3
ret i32 %22
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @do_cpuid(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @fprintf(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
|
freebsd_usr.sbin_bhyve_extr_xmsr.c_init_msr
|
; ModuleID = 'AnghaBench/linux/drivers/mtd/nand/raw/extr_omap2.c_omap_read_buf_irq_pref.c'
source_filename = "AnghaBench/linux/drivers/mtd/nand/raw/extr_omap2.c_omap_read_buf_irq_pref.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.omap_nand_info = type { i32, %struct.TYPE_2__, i32, i32, i32, i32, ptr, i32 }
%struct.TYPE_2__ = type { i32 }
@OMAP_NAND_IO_READ = dso_local local_unnamed_addr global i32 0, align 4
@PREFETCH_FIFOTHRESHOLD_MAX = dso_local local_unnamed_addr global i32 0, align 4
@NAND_BUSWIDTH_16 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @omap_read_buf_irq_pref], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @omap_read_buf_irq_pref(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @nand_to_mtd(ptr noundef %0) #2
%5 = tail call ptr @mtd_to_omap(ptr noundef %4) #2
%6 = load i32, ptr %4, align 4, !tbaa !5
%7 = icmp slt i32 %6, %2
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @omap_read_buf_pref(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
br label %42
10: ; preds = %3
%11 = load i32, ptr @OMAP_NAND_IO_READ, align 4, !tbaa !10
%12 = getelementptr inbounds %struct.omap_nand_info, ptr %5, i64 0, i32 7
store i32 %11, ptr %12, align 8, !tbaa !11
%13 = getelementptr inbounds %struct.omap_nand_info, ptr %5, i64 0, i32 6
store ptr %1, ptr %13, align 8, !tbaa !15
%14 = getelementptr inbounds %struct.omap_nand_info, ptr %5, i64 0, i32 3
%15 = tail call i32 @init_completion(ptr noundef nonnull %14) #2
%16 = getelementptr inbounds %struct.omap_nand_info, ptr %5, i64 0, i32 2
%17 = load i32, ptr %16, align 8, !tbaa !16
%18 = load i32, ptr @PREFETCH_FIFOTHRESHOLD_MAX, align 4, !tbaa !10
%19 = sdiv i32 %18, 2
%20 = tail call i32 @omap_prefetch_enable(i32 noundef %17, i32 noundef %19, i32 noundef 0, i32 noundef %2, i32 noundef 0, ptr noundef %5) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %32
22: ; preds = %10
store i32 %2, ptr %5, align 8, !tbaa !17
%23 = getelementptr inbounds %struct.omap_nand_info, ptr %5, i64 0, i32 5
%24 = load i32, ptr %23, align 4, !tbaa !18
%25 = tail call i32 @enable_irq(i32 noundef %24) #2
%26 = getelementptr inbounds %struct.omap_nand_info, ptr %5, i64 0, i32 4
%27 = load i32, ptr %26, align 8, !tbaa !19
%28 = tail call i32 @enable_irq(i32 noundef %27) #2
%29 = tail call i32 @wait_for_completion(ptr noundef nonnull %14) #2
%30 = load i32, ptr %16, align 8, !tbaa !16
%31 = tail call i32 @omap_prefetch_reset(i32 noundef %30, ptr noundef nonnull %5) #2
br label %42
32: ; preds = %10
%33 = getelementptr inbounds %struct.omap_nand_info, ptr %5, i64 0, i32 1
%34 = load i32, ptr %33, align 4, !tbaa !20
%35 = load i32, ptr @NAND_BUSWIDTH_16, align 4, !tbaa !10
%36 = and i32 %35, %34
%37 = icmp eq i32 %36, 0
br i1 %37, label %40, label %38
38: ; preds = %32
%39 = tail call i32 @omap_read_buf16(ptr noundef nonnull %4, ptr noundef %1, i32 noundef %2) #2
br label %42
40: ; preds = %32
%41 = tail call i32 @omap_read_buf8(ptr noundef nonnull %4, ptr noundef %1, i32 noundef %2) #2
br label %42
42: ; preds = %38, %40, %22, %8
ret void
}
declare ptr @nand_to_mtd(ptr noundef) local_unnamed_addr #1
declare ptr @mtd_to_omap(ptr noundef) local_unnamed_addr #1
declare i32 @omap_read_buf_pref(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @init_completion(ptr noundef) local_unnamed_addr #1
declare i32 @omap_prefetch_enable(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @enable_irq(i32 noundef) local_unnamed_addr #1
declare i32 @wait_for_completion(ptr noundef) local_unnamed_addr #1
declare i32 @omap_prefetch_reset(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @omap_read_buf16(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @omap_read_buf8(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mtd_info", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 32}
!12 = !{!"omap_nand_info", !7, i64 0, !13, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !14, i64 24, !7, i64 32}
!13 = !{!"TYPE_2__", !7, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!12, !14, i64 24}
!16 = !{!12, !7, i64 8}
!17 = !{!12, !7, i64 0}
!18 = !{!12, !7, i64 20}
!19 = !{!12, !7, i64 16}
!20 = !{!12, !7, i64 4}
|
; ModuleID = 'AnghaBench/linux/drivers/mtd/nand/raw/extr_omap2.c_omap_read_buf_irq_pref.c'
source_filename = "AnghaBench/linux/drivers/mtd/nand/raw/extr_omap2.c_omap_read_buf_irq_pref.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OMAP_NAND_IO_READ = common local_unnamed_addr global i32 0, align 4
@PREFETCH_FIFOTHRESHOLD_MAX = common local_unnamed_addr global i32 0, align 4
@NAND_BUSWIDTH_16 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @omap_read_buf_irq_pref], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @omap_read_buf_irq_pref(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @nand_to_mtd(ptr noundef %0) #2
%5 = tail call ptr @mtd_to_omap(ptr noundef %4) #2
%6 = load i32, ptr %4, align 4, !tbaa !6
%7 = icmp slt i32 %6, %2
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @omap_read_buf_pref(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
br label %42
10: ; preds = %3
%11 = load i32, ptr @OMAP_NAND_IO_READ, align 4, !tbaa !11
%12 = getelementptr inbounds i8, ptr %5, i64 32
store i32 %11, ptr %12, align 8, !tbaa !12
%13 = getelementptr inbounds i8, ptr %5, i64 24
store ptr %1, ptr %13, align 8, !tbaa !16
%14 = getelementptr inbounds i8, ptr %5, i64 12
%15 = tail call i32 @init_completion(ptr noundef nonnull %14) #2
%16 = getelementptr inbounds i8, ptr %5, i64 8
%17 = load i32, ptr %16, align 8, !tbaa !17
%18 = load i32, ptr @PREFETCH_FIFOTHRESHOLD_MAX, align 4, !tbaa !11
%19 = sdiv i32 %18, 2
%20 = tail call i32 @omap_prefetch_enable(i32 noundef %17, i32 noundef %19, i32 noundef 0, i32 noundef %2, i32 noundef 0, ptr noundef %5) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %32
22: ; preds = %10
store i32 %2, ptr %5, align 8, !tbaa !18
%23 = getelementptr inbounds i8, ptr %5, i64 20
%24 = load i32, ptr %23, align 4, !tbaa !19
%25 = tail call i32 @enable_irq(i32 noundef %24) #2
%26 = getelementptr inbounds i8, ptr %5, i64 16
%27 = load i32, ptr %26, align 8, !tbaa !20
%28 = tail call i32 @enable_irq(i32 noundef %27) #2
%29 = tail call i32 @wait_for_completion(ptr noundef nonnull %14) #2
%30 = load i32, ptr %16, align 8, !tbaa !17
%31 = tail call i32 @omap_prefetch_reset(i32 noundef %30, ptr noundef nonnull %5) #2
br label %42
32: ; preds = %10
%33 = getelementptr inbounds i8, ptr %5, i64 4
%34 = load i32, ptr %33, align 4, !tbaa !21
%35 = load i32, ptr @NAND_BUSWIDTH_16, align 4, !tbaa !11
%36 = and i32 %35, %34
%37 = icmp eq i32 %36, 0
br i1 %37, label %40, label %38
38: ; preds = %32
%39 = tail call i32 @omap_read_buf16(ptr noundef nonnull %4, ptr noundef %1, i32 noundef %2) #2
br label %42
40: ; preds = %32
%41 = tail call i32 @omap_read_buf8(ptr noundef nonnull %4, ptr noundef %1, i32 noundef %2) #2
br label %42
42: ; preds = %38, %40, %22, %8
ret void
}
declare ptr @nand_to_mtd(ptr noundef) local_unnamed_addr #1
declare ptr @mtd_to_omap(ptr noundef) local_unnamed_addr #1
declare i32 @omap_read_buf_pref(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @init_completion(ptr noundef) local_unnamed_addr #1
declare i32 @omap_prefetch_enable(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @enable_irq(i32 noundef) local_unnamed_addr #1
declare i32 @wait_for_completion(ptr noundef) local_unnamed_addr #1
declare i32 @omap_prefetch_reset(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @omap_read_buf16(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @omap_read_buf8(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mtd_info", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 32}
!13 = !{!"omap_nand_info", !8, i64 0, !14, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !15, i64 24, !8, i64 32}
!14 = !{!"TYPE_2__", !8, i64 0}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!13, !15, i64 24}
!17 = !{!13, !8, i64 8}
!18 = !{!13, !8, i64 0}
!19 = !{!13, !8, i64 20}
!20 = !{!13, !8, i64 16}
!21 = !{!13, !8, i64 4}
|
linux_drivers_mtd_nand_raw_extr_omap2.c_omap_read_buf_irq_pref
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/otus/80211core/extr_cfunc.c_zfProcessEvent.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/otus/80211core/extr_cfunc.c_zfProcessEvent.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32, %struct.TYPE_3__, i32, ptr }
%struct.TYPE_3__ = type { i32, i32, i32, i32 }
@FALSE = dso_local local_unnamed_addr global i64 0, align 8
@TRUE = dso_local local_unnamed_addr global i64 0, align 8
@ZM_LV_0 = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [18 x i8] c"ZM_EVENT_CM_TIMER\00", align 1
@wd = dso_local local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [23 x i8] c"ZM_EVENT_CM_DISCONNECT\00", align 1
@ZM_STA_STATE_DISCONNECT = dso_local local_unnamed_addr global i32 0, align 4
@ZM_TICK_CM_BLOCK_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@ZM_TICK_CM_BLOCK_TIMEOUT_OFFSET = dso_local local_unnamed_addr global i32 0, align 4
@ZM_STATUS_MEDIA_DISCONNECT_MIC_FAIL = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [24 x i8] c"ZM_EVENT_CM_BLOCK_TIMER\00", align 1
@.str.3 = private unnamed_addr constant [42 x i8] c"ZM_EVENT_CM_BLOCK_TIMER:bAutoReconnect!=0\00", align 1
@ZM_SCAN_MGR_SCAN_INTERNAL = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [35 x i8] c"Countermeasure : Enable MIC Check \00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @zfProcessEvent(ptr noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = alloca [32 x i32], align 16
%5 = load i64, ptr @FALSE, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %4) #3
%6 = tail call i32 @zmw_get_wlan_dev(ptr noundef %0) #3
%7 = tail call i32 (...) @zmw_declare_for_critical_section() #3
%8 = call i32 @zfZeroMemory(ptr noundef nonnull %4, i32 noundef 64) #3
%9 = icmp eq i64 %2, 0
br i1 %9, label %121, label %10
10: ; preds = %3, %117
%11 = phi i64 [ %119, %117 ], [ 0, %3 ]
%12 = phi i64 [ %118, %117 ], [ 0, %3 ]
%13 = phi i64 [ %29, %117 ], [ %5, %3 ]
%14 = icmp eq i64 %12, 0
br i1 %14, label %28, label %15
15: ; preds = %10
%16 = getelementptr inbounds i32, ptr %1, i64 %11
%17 = load i32, ptr %16, align 4, !tbaa !9
br label %21
18: ; preds = %21
%19 = add nuw i64 %22, 1
%20 = icmp eq i64 %19, %12
br i1 %20, label %28, label %21, !llvm.loop !11
21: ; preds = %15, %18
%22 = phi i64 [ 0, %15 ], [ %19, %18 ]
%23 = getelementptr inbounds [32 x i32], ptr %4, i64 0, i64 %22
%24 = load i32, ptr %23, align 4, !tbaa !9
%25 = icmp eq i32 %24, %17
br i1 %25, label %26, label %18
26: ; preds = %21
%27 = load i64, ptr @TRUE, align 8, !tbaa !5
br label %28
28: ; preds = %18, %10, %26
%29 = phi i64 [ %27, %26 ], [ %13, %10 ], [ %13, %18 ]
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %117
31: ; preds = %28
%32 = getelementptr inbounds i32, ptr %1, i64 %11
%33 = load i32, ptr %32, align 4, !tbaa !9
switch i32 %33, label %117 [
i32 132, label %34
i32 128, label %40
i32 134, label %48
i32 133, label %50
i32 135, label %52
i32 136, label %57
i32 137, label %80
i32 130, label %95
i32 131, label %113
]
34: ; preds = %31
%35 = call i32 @zfScanMgrScanEventStart(ptr noundef %0) #3
%36 = add i64 %12, 1
%37 = getelementptr inbounds [32 x i32], ptr %4, i64 0, i64 %12
store i32 133, ptr %37, align 4, !tbaa !9
%38 = add i64 %12, 2
%39 = getelementptr inbounds [32 x i32], ptr %4, i64 0, i64 %36
store i32 128, ptr %39, align 4, !tbaa !9
br label %117
40: ; preds = %31
%41 = call i64 @zfScanMgrScanEventTimeout(ptr noundef %0) #3
switch i64 %41, label %117 [
i64 0, label %42
i64 1, label %45
]
42: ; preds = %40
%43 = add i64 %12, 1
%44 = getelementptr inbounds [32 x i32], ptr %4, i64 0, i64 %12
store i32 128, ptr %44, align 4, !tbaa !9
br label %117
45: ; preds = %40
%46 = add i64 %12, 1
%47 = getelementptr inbounds [32 x i32], ptr %4, i64 0, i64 %12
store i32 133, ptr %47, align 4, !tbaa !9
br label %117
48: ; preds = %31
%49 = call i32 @zfStaIbssMonitoring(ptr noundef %0, i32 noundef 0) #3
br label %117
50: ; preds = %31
%51 = call i32 @zfScanMgrScanEventRetry(ptr noundef %0) #3
br label %117
52: ; preds = %31
%53 = load i32, ptr @ZM_LV_0, align 4, !tbaa !9
%54 = call i32 @zm_msg0_mm(i32 noundef %53, ptr noundef nonnull @.str) #3
%55 = load ptr, ptr @wd, align 8, !tbaa !13
%56 = getelementptr inbounds %struct.TYPE_4__, ptr %55, i64 0, i32 2, i32 3
store i32 0, ptr %56, align 4, !tbaa !15
br label %117
57: ; preds = %31
%58 = load i32, ptr @ZM_LV_0, align 4, !tbaa !9
%59 = call i32 @zm_msg0_mm(i32 noundef %58, ptr noundef nonnull @.str.1) #3
%60 = load i32, ptr @ZM_STA_STATE_DISCONNECT, align 4, !tbaa !9
%61 = call i32 @zfChangeAdapterState(ptr noundef %0, i32 noundef %60) #3
%62 = call i32 @zmw_enter_critical_section(ptr noundef %0) #3
%63 = load i32, ptr @ZM_TICK_CM_BLOCK_TIMEOUT, align 4, !tbaa !9
%64 = load i32, ptr @ZM_TICK_CM_BLOCK_TIMEOUT_OFFSET, align 4, !tbaa !9
%65 = sub nsw i32 %63, %64
%66 = call i32 @zfTimerSchedule(ptr noundef %0, i32 noundef 137, i32 noundef %65) #3
%67 = call i32 @zmw_leave_critical_section(ptr noundef %0) #3
%68 = load ptr, ptr @wd, align 8, !tbaa !13
%69 = getelementptr inbounds %struct.TYPE_4__, ptr %68, i64 0, i32 2, i32 3
store i32 0, ptr %69, align 4, !tbaa !15
%70 = call i32 @zfHpResetKeyCache(ptr noundef %0) #3
%71 = load ptr, ptr @wd, align 8, !tbaa !13
%72 = getelementptr inbounds %struct.TYPE_4__, ptr %71, i64 0, i32 4
%73 = load ptr, ptr %72, align 8, !tbaa !18
%74 = icmp eq ptr %73, null
br i1 %74, label %117, label %75
75: ; preds = %57
%76 = load i32, ptr @ZM_STATUS_MEDIA_DISCONNECT_MIC_FAIL, align 4, !tbaa !9
%77 = getelementptr inbounds %struct.TYPE_4__, ptr %71, i64 0, i32 2
%78 = load i32, ptr %77, align 8, !tbaa !19
%79 = call i32 %73(ptr noundef %0, i32 noundef %76, i32 noundef %78) #3
br label %117
80: ; preds = %31
%81 = load i32, ptr @ZM_LV_0, align 4, !tbaa !9
%82 = call i32 @zm_msg0_mm(i32 noundef %81, ptr noundef nonnull @.str.2) #3
%83 = load ptr, ptr @wd, align 8, !tbaa !13
%84 = getelementptr inbounds %struct.TYPE_4__, ptr %83, i64 0, i32 2, i32 2
store i32 0, ptr %84, align 8, !tbaa !20
%85 = getelementptr inbounds %struct.TYPE_4__, ptr %83, i64 0, i32 2, i32 1
%86 = load i32, ptr %85, align 4, !tbaa !21
%87 = icmp eq i32 %86, 0
br i1 %87, label %117, label %88
88: ; preds = %80
%89 = load i32, ptr @ZM_LV_0, align 4, !tbaa !9
%90 = call i32 @zm_msg0_mm(i32 noundef %89, ptr noundef nonnull @.str.3) #3
%91 = load i32, ptr @ZM_SCAN_MGR_SCAN_INTERNAL, align 4, !tbaa !9
%92 = call i32 @zfScanMgrScanStop(ptr noundef %0, i32 noundef %91) #3
%93 = load i32, ptr @ZM_SCAN_MGR_SCAN_INTERNAL, align 4, !tbaa !9
%94 = call i32 @zfScanMgrScanStart(ptr noundef %0, i32 noundef %93) #3
br label %117
95: ; preds = %31
%96 = load ptr, ptr @wd, align 8, !tbaa !13
%97 = getelementptr inbounds %struct.TYPE_4__, ptr %96, i64 0, i32 3
%98 = load i32, ptr %97, align 8, !tbaa !22
%99 = icmp eq i32 %98, 0
br i1 %99, label %100, label %111
100: ; preds = %95
%101 = load i32, ptr %96, align 8, !tbaa !23
%102 = icmp slt i32 %101, 5
br i1 %102, label %103, label %111
103: ; preds = %100
%104 = getelementptr inbounds %struct.TYPE_4__, ptr %96, i64 0, i32 2
%105 = load i32, ptr %104, align 8, !tbaa !19
%106 = call i32 @zfAggSendAddbaRequest(ptr noundef %0, i32 noundef %105, i32 noundef 0, i32 noundef 0) #3
%107 = load ptr, ptr @wd, align 8, !tbaa !13
%108 = load i32, ptr %107, align 8, !tbaa !23
%109 = add nsw i32 %108, 1
store i32 %109, ptr %107, align 8, !tbaa !23
%110 = call i32 @zfTimerSchedule(ptr noundef %0, i32 noundef 130, i32 noundef 100) #3
br label %117
111: ; preds = %100, %95
%112 = call i32 @zfTimerCancel(ptr noundef %0, i32 noundef 130) #3
br label %117
113: ; preds = %31
%114 = call i32 @zm_debug_msg0(ptr noundef nonnull @.str.4) #3
%115 = load ptr, ptr @wd, align 8, !tbaa !13
%116 = getelementptr inbounds %struct.TYPE_4__, ptr %115, i64 0, i32 1
store i32 0, ptr %116, align 4, !tbaa !24
br label %117
117: ; preds = %42, %45, %40, %34, %48, %50, %52, %113, %75, %57, %88, %80, %111, %103, %31, %28
%118 = phi i64 [ %12, %28 ], [ %12, %31 ], [ %12, %113 ], [ %12, %111 ], [ %12, %103 ], [ %12, %88 ], [ %12, %80 ], [ %12, %75 ], [ %12, %57 ], [ %12, %52 ], [ %12, %50 ], [ %12, %48 ], [ %38, %34 ], [ %43, %42 ], [ %46, %45 ], [ %12, %40 ]
%119 = add nuw i64 %11, 1
%120 = icmp eq i64 %119, %2
br i1 %120, label %121, label %10, !llvm.loop !25
121: ; preds = %117, %3
call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @zmw_get_wlan_dev(ptr noundef) local_unnamed_addr #2
declare i32 @zmw_declare_for_critical_section(...) local_unnamed_addr #2
declare i32 @zfZeroMemory(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zfScanMgrScanEventStart(ptr noundef) local_unnamed_addr #2
declare i64 @zfScanMgrScanEventTimeout(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @zfStaIbssMonitoring(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zfScanMgrScanEventRetry(ptr noundef) local_unnamed_addr #2
declare i32 @zm_msg0_mm(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @zfChangeAdapterState(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zmw_enter_critical_section(ptr noundef) local_unnamed_addr #2
declare i32 @zfTimerSchedule(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zmw_leave_critical_section(ptr noundef) local_unnamed_addr #2
declare i32 @zfHpResetKeyCache(ptr noundef) local_unnamed_addr #2
declare i32 @zfScanMgrScanStop(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zfScanMgrScanStart(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zfAggSendAddbaRequest(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zfTimerCancel(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zm_debug_msg0(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!16, !10, i64 20}
!16 = !{!"TYPE_4__", !10, i64 0, !10, i64 4, !17, i64 8, !10, i64 24, !14, i64 32}
!17 = !{!"TYPE_3__", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!18 = !{!16, !14, i64 32}
!19 = !{!16, !10, i64 8}
!20 = !{!16, !10, i64 16}
!21 = !{!16, !10, i64 12}
!22 = !{!16, !10, i64 24}
!23 = !{!16, !10, i64 0}
!24 = !{!16, !10, i64 4}
!25 = distinct !{!25, !12}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/otus/80211core/extr_cfunc.c_zfProcessEvent.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/otus/80211core/extr_cfunc.c_zfProcessEvent.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FALSE = common local_unnamed_addr global i64 0, align 8
@TRUE = common local_unnamed_addr global i64 0, align 8
@ZM_LV_0 = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [18 x i8] c"ZM_EVENT_CM_TIMER\00", align 1
@wd = common local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [23 x i8] c"ZM_EVENT_CM_DISCONNECT\00", align 1
@ZM_STA_STATE_DISCONNECT = common local_unnamed_addr global i32 0, align 4
@ZM_TICK_CM_BLOCK_TIMEOUT = common local_unnamed_addr global i32 0, align 4
@ZM_TICK_CM_BLOCK_TIMEOUT_OFFSET = common local_unnamed_addr global i32 0, align 4
@ZM_STATUS_MEDIA_DISCONNECT_MIC_FAIL = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [24 x i8] c"ZM_EVENT_CM_BLOCK_TIMER\00", align 1
@.str.3 = private unnamed_addr constant [42 x i8] c"ZM_EVENT_CM_BLOCK_TIMER:bAutoReconnect!=0\00", align 1
@ZM_SCAN_MGR_SCAN_INTERNAL = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [35 x i8] c"Countermeasure : Enable MIC Check \00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @zfProcessEvent(ptr noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = alloca [32 x i32], align 4
%5 = load i64, ptr @FALSE, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %4) #3
%6 = tail call i32 @zmw_get_wlan_dev(ptr noundef %0) #3
%7 = tail call i32 @zmw_declare_for_critical_section() #3
%8 = call i32 @zfZeroMemory(ptr noundef nonnull %4, i32 noundef 64) #3
%9 = icmp eq i64 %2, 0
br i1 %9, label %119, label %10
10: ; preds = %3, %115
%11 = phi i64 [ %117, %115 ], [ 0, %3 ]
%12 = phi i64 [ %116, %115 ], [ 0, %3 ]
%13 = phi i64 [ %29, %115 ], [ %5, %3 ]
%14 = icmp eq i64 %12, 0
br i1 %14, label %28, label %15
15: ; preds = %10
%16 = getelementptr inbounds i32, ptr %1, i64 %11
%17 = load i32, ptr %16, align 4, !tbaa !10
br label %21
18: ; preds = %21
%19 = add nuw i64 %22, 1
%20 = icmp eq i64 %19, %12
br i1 %20, label %28, label %21, !llvm.loop !12
21: ; preds = %15, %18
%22 = phi i64 [ 0, %15 ], [ %19, %18 ]
%23 = getelementptr inbounds [32 x i32], ptr %4, i64 0, i64 %22
%24 = load i32, ptr %23, align 4, !tbaa !10
%25 = icmp eq i32 %24, %17
br i1 %25, label %26, label %18
26: ; preds = %21
%27 = load i64, ptr @TRUE, align 8, !tbaa !6
br label %28
28: ; preds = %18, %10, %26
%29 = phi i64 [ %27, %26 ], [ %13, %10 ], [ %13, %18 ]
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %115
31: ; preds = %28
%32 = getelementptr inbounds i32, ptr %1, i64 %11
%33 = load i32, ptr %32, align 4, !tbaa !10
switch i32 %33, label %115 [
i32 132, label %34
i32 128, label %38
i32 134, label %46
i32 133, label %48
i32 135, label %50
i32 136, label %55
i32 137, label %78
i32 130, label %93
i32 131, label %111
]
34: ; preds = %31
%35 = call i32 @zfScanMgrScanEventStart(ptr noundef %0) #3
%36 = getelementptr inbounds [32 x i32], ptr %4, i64 0, i64 %12
%37 = add i64 %12, 2
store <2 x i32> <i32 133, i32 128>, ptr %36, align 4, !tbaa !10
br label %115
38: ; preds = %31
%39 = call i64 @zfScanMgrScanEventTimeout(ptr noundef %0) #3
switch i64 %39, label %115 [
i64 0, label %40
i64 1, label %43
]
40: ; preds = %38
%41 = add i64 %12, 1
%42 = getelementptr inbounds [32 x i32], ptr %4, i64 0, i64 %12
store i32 128, ptr %42, align 4, !tbaa !10
br label %115
43: ; preds = %38
%44 = add i64 %12, 1
%45 = getelementptr inbounds [32 x i32], ptr %4, i64 0, i64 %12
store i32 133, ptr %45, align 4, !tbaa !10
br label %115
46: ; preds = %31
%47 = call i32 @zfStaIbssMonitoring(ptr noundef %0, i32 noundef 0) #3
br label %115
48: ; preds = %31
%49 = call i32 @zfScanMgrScanEventRetry(ptr noundef %0) #3
br label %115
50: ; preds = %31
%51 = load i32, ptr @ZM_LV_0, align 4, !tbaa !10
%52 = call i32 @zm_msg0_mm(i32 noundef %51, ptr noundef nonnull @.str) #3
%53 = load ptr, ptr @wd, align 8, !tbaa !14
%54 = getelementptr inbounds i8, ptr %53, i64 20
store i32 0, ptr %54, align 4, !tbaa !16
br label %115
55: ; preds = %31
%56 = load i32, ptr @ZM_LV_0, align 4, !tbaa !10
%57 = call i32 @zm_msg0_mm(i32 noundef %56, ptr noundef nonnull @.str.1) #3
%58 = load i32, ptr @ZM_STA_STATE_DISCONNECT, align 4, !tbaa !10
%59 = call i32 @zfChangeAdapterState(ptr noundef %0, i32 noundef %58) #3
%60 = call i32 @zmw_enter_critical_section(ptr noundef %0) #3
%61 = load i32, ptr @ZM_TICK_CM_BLOCK_TIMEOUT, align 4, !tbaa !10
%62 = load i32, ptr @ZM_TICK_CM_BLOCK_TIMEOUT_OFFSET, align 4, !tbaa !10
%63 = sub nsw i32 %61, %62
%64 = call i32 @zfTimerSchedule(ptr noundef %0, i32 noundef 137, i32 noundef %63) #3
%65 = call i32 @zmw_leave_critical_section(ptr noundef %0) #3
%66 = load ptr, ptr @wd, align 8, !tbaa !14
%67 = getelementptr inbounds i8, ptr %66, i64 20
store i32 0, ptr %67, align 4, !tbaa !16
%68 = call i32 @zfHpResetKeyCache(ptr noundef %0) #3
%69 = load ptr, ptr @wd, align 8, !tbaa !14
%70 = getelementptr inbounds i8, ptr %69, i64 32
%71 = load ptr, ptr %70, align 8, !tbaa !19
%72 = icmp eq ptr %71, null
br i1 %72, label %115, label %73
73: ; preds = %55
%74 = load i32, ptr @ZM_STATUS_MEDIA_DISCONNECT_MIC_FAIL, align 4, !tbaa !10
%75 = getelementptr inbounds i8, ptr %69, i64 8
%76 = load i32, ptr %75, align 8, !tbaa !20
%77 = call i32 %71(ptr noundef %0, i32 noundef %74, i32 noundef %76) #3
br label %115
78: ; preds = %31
%79 = load i32, ptr @ZM_LV_0, align 4, !tbaa !10
%80 = call i32 @zm_msg0_mm(i32 noundef %79, ptr noundef nonnull @.str.2) #3
%81 = load ptr, ptr @wd, align 8, !tbaa !14
%82 = getelementptr inbounds i8, ptr %81, i64 16
store i32 0, ptr %82, align 8, !tbaa !21
%83 = getelementptr inbounds i8, ptr %81, i64 12
%84 = load i32, ptr %83, align 4, !tbaa !22
%85 = icmp eq i32 %84, 0
br i1 %85, label %115, label %86
86: ; preds = %78
%87 = load i32, ptr @ZM_LV_0, align 4, !tbaa !10
%88 = call i32 @zm_msg0_mm(i32 noundef %87, ptr noundef nonnull @.str.3) #3
%89 = load i32, ptr @ZM_SCAN_MGR_SCAN_INTERNAL, align 4, !tbaa !10
%90 = call i32 @zfScanMgrScanStop(ptr noundef %0, i32 noundef %89) #3
%91 = load i32, ptr @ZM_SCAN_MGR_SCAN_INTERNAL, align 4, !tbaa !10
%92 = call i32 @zfScanMgrScanStart(ptr noundef %0, i32 noundef %91) #3
br label %115
93: ; preds = %31
%94 = load ptr, ptr @wd, align 8, !tbaa !14
%95 = getelementptr inbounds i8, ptr %94, i64 24
%96 = load i32, ptr %95, align 8, !tbaa !23
%97 = icmp eq i32 %96, 0
br i1 %97, label %98, label %109
98: ; preds = %93
%99 = load i32, ptr %94, align 8, !tbaa !24
%100 = icmp slt i32 %99, 5
br i1 %100, label %101, label %109
101: ; preds = %98
%102 = getelementptr inbounds i8, ptr %94, i64 8
%103 = load i32, ptr %102, align 8, !tbaa !20
%104 = call i32 @zfAggSendAddbaRequest(ptr noundef %0, i32 noundef %103, i32 noundef 0, i32 noundef 0) #3
%105 = load ptr, ptr @wd, align 8, !tbaa !14
%106 = load i32, ptr %105, align 8, !tbaa !24
%107 = add nsw i32 %106, 1
store i32 %107, ptr %105, align 8, !tbaa !24
%108 = call i32 @zfTimerSchedule(ptr noundef %0, i32 noundef 130, i32 noundef 100) #3
br label %115
109: ; preds = %98, %93
%110 = call i32 @zfTimerCancel(ptr noundef %0, i32 noundef 130) #3
br label %115
111: ; preds = %31
%112 = call i32 @zm_debug_msg0(ptr noundef nonnull @.str.4) #3
%113 = load ptr, ptr @wd, align 8, !tbaa !14
%114 = getelementptr inbounds i8, ptr %113, i64 4
store i32 0, ptr %114, align 4, !tbaa !25
br label %115
115: ; preds = %40, %43, %38, %34, %46, %48, %50, %111, %73, %55, %86, %78, %109, %101, %31, %28
%116 = phi i64 [ %12, %28 ], [ %12, %31 ], [ %12, %111 ], [ %12, %109 ], [ %12, %101 ], [ %12, %86 ], [ %12, %78 ], [ %12, %73 ], [ %12, %55 ], [ %12, %50 ], [ %12, %48 ], [ %12, %46 ], [ %37, %34 ], [ %41, %40 ], [ %44, %43 ], [ %12, %38 ]
%117 = add nuw i64 %11, 1
%118 = icmp eq i64 %117, %2
br i1 %118, label %119, label %10, !llvm.loop !26
119: ; preds = %115, %3
call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @zmw_get_wlan_dev(ptr noundef) local_unnamed_addr #2
declare i32 @zmw_declare_for_critical_section(...) local_unnamed_addr #2
declare i32 @zfZeroMemory(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zfScanMgrScanEventStart(ptr noundef) local_unnamed_addr #2
declare i64 @zfScanMgrScanEventTimeout(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @zfStaIbssMonitoring(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zfScanMgrScanEventRetry(ptr noundef) local_unnamed_addr #2
declare i32 @zm_msg0_mm(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @zfChangeAdapterState(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zmw_enter_critical_section(ptr noundef) local_unnamed_addr #2
declare i32 @zfTimerSchedule(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zmw_leave_critical_section(ptr noundef) local_unnamed_addr #2
declare i32 @zfHpResetKeyCache(ptr noundef) local_unnamed_addr #2
declare i32 @zfScanMgrScanStop(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zfScanMgrScanStart(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zfAggSendAddbaRequest(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zfTimerCancel(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zm_debug_msg0(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!17, !11, i64 20}
!17 = !{!"TYPE_4__", !11, i64 0, !11, i64 4, !18, i64 8, !11, i64 24, !15, i64 32}
!18 = !{!"TYPE_3__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!19 = !{!17, !15, i64 32}
!20 = !{!17, !11, i64 8}
!21 = !{!17, !11, i64 16}
!22 = !{!17, !11, i64 12}
!23 = !{!17, !11, i64 24}
!24 = !{!17, !11, i64 0}
!25 = !{!17, !11, i64 4}
!26 = distinct !{!26, !13}
|
fastsocket_kernel_drivers_staging_otus_80211core_extr_cfunc.c_zfProcessEvent
|
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