IR_x86
stringlengths 592
249k
| IR_arm
stringlengths 558
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| filename
stringlengths 17
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|---|---|---|
; ModuleID = 'AnghaBench/linux/kernel/time/extr_timekeeping.c_change_clocksource.c'
source_filename = "AnghaBench/linux/kernel/time/extr_timekeeping.c_change_clocksource.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, %struct.timekeeper }
%struct.timekeeper = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { ptr }
%struct.clocksource = type { ptr, i32, ptr }
@tk_core = dso_local global %struct.TYPE_4__ zeroinitializer, align 8
@timekeeper_lock = dso_local global i32 0, align 4
@TK_CLEAR_NTP = dso_local local_unnamed_addr global i32 0, align 4
@TK_MIRROR = dso_local local_unnamed_addr global i32 0, align 4
@TK_CLOCK_WAS_SET = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @change_clocksource], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @change_clocksource(ptr noundef %0) #0 {
%2 = tail call i32 @raw_spin_lock_irqsave(ptr noundef nonnull @timekeeper_lock, i64 noundef undef) #2
%3 = tail call i32 @write_seqcount_begin(ptr noundef nonnull @tk_core) #2
%4 = tail call i32 @timekeeping_forward_now(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_4__, ptr @tk_core, i64 0, i32 1)) #2
%5 = getelementptr inbounds %struct.clocksource, ptr %0, i64 0, i32 1
%6 = load i32, ptr %5, align 8, !tbaa !5
%7 = tail call i64 @try_module_get(i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %29, label %9
9: ; preds = %1
%10 = load ptr, ptr %0, align 8, !tbaa !11
%11 = icmp eq ptr %10, null
br i1 %11, label %15, label %12
12: ; preds = %9
%13 = tail call i64 %10(ptr noundef nonnull %0) #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %25
15: ; preds = %12, %9
%16 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @tk_core, i64 0, i32 1), align 8, !tbaa !12
%17 = tail call i32 @tk_setup_internals(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_4__, ptr @tk_core, i64 0, i32 1), ptr noundef nonnull %0) #2
%18 = getelementptr inbounds %struct.clocksource, ptr %16, i64 0, i32 2
%19 = load ptr, ptr %18, align 8, !tbaa !15
%20 = icmp eq ptr %19, null
br i1 %20, label %23, label %21
21: ; preds = %15
%22 = tail call i32 %19(ptr noundef nonnull %16) #2
br label %23
23: ; preds = %21, %15
%24 = getelementptr inbounds %struct.clocksource, ptr %16, i64 0, i32 1
br label %25
25: ; preds = %12, %23
%26 = phi ptr [ %24, %23 ], [ %5, %12 ]
%27 = load i32, ptr %26, align 8, !tbaa !5
%28 = tail call i32 @module_put(i32 noundef %27) #2
br label %29
29: ; preds = %25, %1
%30 = load i32, ptr @TK_CLEAR_NTP, align 4, !tbaa !16
%31 = load i32, ptr @TK_MIRROR, align 4, !tbaa !16
%32 = or i32 %31, %30
%33 = load i32, ptr @TK_CLOCK_WAS_SET, align 4, !tbaa !16
%34 = or i32 %32, %33
%35 = tail call i32 @timekeeping_update(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_4__, ptr @tk_core, i64 0, i32 1), i32 noundef %34) #2
%36 = tail call i32 @write_seqcount_end(ptr noundef nonnull @tk_core) #2
%37 = tail call i32 @raw_spin_unlock_irqrestore(ptr noundef nonnull @timekeeper_lock, i64 noundef undef) #2
ret i32 0
}
declare i32 @raw_spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @write_seqcount_begin(ptr noundef) local_unnamed_addr #1
declare i32 @timekeeping_forward_now(ptr noundef) local_unnamed_addr #1
declare i64 @try_module_get(i32 noundef) local_unnamed_addr #1
declare i32 @tk_setup_internals(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @module_put(i32 noundef) local_unnamed_addr #1
declare i32 @timekeeping_update(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @write_seqcount_end(ptr noundef) local_unnamed_addr #1
declare i32 @raw_spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"clocksource", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"timekeeper", !14, i64 0}
!14 = !{!"TYPE_3__", !7, i64 0}
!15 = !{!6, !7, i64 16}
!16 = !{!10, !10, i64 0}
|
; ModuleID = 'AnghaBench/linux/kernel/time/extr_timekeeping.c_change_clocksource.c'
source_filename = "AnghaBench/linux/kernel/time/extr_timekeeping.c_change_clocksource.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i32, %struct.timekeeper }
%struct.timekeeper = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { ptr }
@tk_core = common global %struct.TYPE_4__ zeroinitializer, align 8
@timekeeper_lock = common global i32 0, align 4
@TK_CLEAR_NTP = common local_unnamed_addr global i32 0, align 4
@TK_MIRROR = common local_unnamed_addr global i32 0, align 4
@TK_CLOCK_WAS_SET = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @change_clocksource], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @change_clocksource(ptr noundef %0) #0 {
%2 = tail call i32 @raw_spin_lock_irqsave(ptr noundef nonnull @timekeeper_lock, i64 noundef undef) #2
%3 = tail call i32 @write_seqcount_begin(ptr noundef nonnull @tk_core) #2
%4 = tail call i32 @timekeeping_forward_now(ptr noundef nonnull getelementptr inbounds (i8, ptr @tk_core, i64 8)) #2
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i32, ptr %5, align 8, !tbaa !6
%7 = tail call i64 @try_module_get(i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %29, label %9
9: ; preds = %1
%10 = load ptr, ptr %0, align 8, !tbaa !12
%11 = icmp eq ptr %10, null
br i1 %11, label %15, label %12
12: ; preds = %9
%13 = tail call i64 %10(ptr noundef nonnull %0) #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %25
15: ; preds = %12, %9
%16 = load ptr, ptr getelementptr inbounds (i8, ptr @tk_core, i64 8), align 8, !tbaa !13
%17 = tail call i32 @tk_setup_internals(ptr noundef nonnull getelementptr inbounds (i8, ptr @tk_core, i64 8), ptr noundef nonnull %0) #2
%18 = getelementptr inbounds i8, ptr %16, i64 16
%19 = load ptr, ptr %18, align 8, !tbaa !16
%20 = icmp eq ptr %19, null
br i1 %20, label %23, label %21
21: ; preds = %15
%22 = tail call i32 %19(ptr noundef nonnull %16) #2
br label %23
23: ; preds = %21, %15
%24 = getelementptr inbounds i8, ptr %16, i64 8
br label %25
25: ; preds = %12, %23
%26 = phi ptr [ %24, %23 ], [ %5, %12 ]
%27 = load i32, ptr %26, align 8, !tbaa !6
%28 = tail call i32 @module_put(i32 noundef %27) #2
br label %29
29: ; preds = %25, %1
%30 = load i32, ptr @TK_CLEAR_NTP, align 4, !tbaa !17
%31 = load i32, ptr @TK_MIRROR, align 4, !tbaa !17
%32 = or i32 %31, %30
%33 = load i32, ptr @TK_CLOCK_WAS_SET, align 4, !tbaa !17
%34 = or i32 %32, %33
%35 = tail call i32 @timekeeping_update(ptr noundef nonnull getelementptr inbounds (i8, ptr @tk_core, i64 8), i32 noundef %34) #2
%36 = tail call i32 @write_seqcount_end(ptr noundef nonnull @tk_core) #2
%37 = tail call i32 @raw_spin_unlock_irqrestore(ptr noundef nonnull @timekeeper_lock, i64 noundef undef) #2
ret i32 0
}
declare i32 @raw_spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @write_seqcount_begin(ptr noundef) local_unnamed_addr #1
declare i32 @timekeeping_forward_now(ptr noundef) local_unnamed_addr #1
declare i64 @try_module_get(i32 noundef) local_unnamed_addr #1
declare i32 @tk_setup_internals(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @module_put(i32 noundef) local_unnamed_addr #1
declare i32 @timekeeping_update(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @write_seqcount_end(ptr noundef) local_unnamed_addr #1
declare i32 @raw_spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"clocksource", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"timekeeper", !15, i64 0}
!15 = !{!"TYPE_3__", !8, i64 0}
!16 = !{!7, !8, i64 16}
!17 = !{!11, !11, i64 0}
|
linux_kernel_time_extr_timekeeping.c_change_clocksource
|
; ModuleID = 'AnghaBench/openssl/crypto/asn1/extr_tasn_prn.c_ASN1_PCTX_get_str_flags.c'
source_filename = "AnghaBench/openssl/crypto/asn1/extr_tasn_prn.c_ASN1_PCTX_get_str_flags.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local i64 @ASN1_PCTX_get_str_flags(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
ret i64 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/openssl/crypto/asn1/extr_tasn_prn.c_ASN1_PCTX_get_str_flags.c'
source_filename = "AnghaBench/openssl/crypto/asn1/extr_tasn_prn.c_ASN1_PCTX_get_str_flags.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define i64 @ASN1_PCTX_get_str_flags(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
ret i64 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
openssl_crypto_asn1_extr_tasn_prn.c_ASN1_PCTX_get_str_flags
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/bcm63xx/extr_cpu.c_bcm63xx_get_memory_size.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/bcm63xx/extr_cpu.c_bcm63xx_get_memory_size.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@bcm63xx_memory_size = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local i32 @bcm63xx_get_memory_size() local_unnamed_addr #0 {
%1 = load i32, ptr @bcm63xx_memory_size, align 4, !tbaa !5
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/bcm63xx/extr_cpu.c_bcm63xx_get_memory_size.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/bcm63xx/extr_cpu.c_bcm63xx_get_memory_size.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@bcm63xx_memory_size = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i32 @bcm63xx_get_memory_size() local_unnamed_addr #0 {
%1 = load i32, ptr @bcm63xx_memory_size, align 4, !tbaa !6
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_arch_mips_bcm63xx_extr_cpu.c_bcm63xx_get_memory_size
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_phy_g.c_b43_gphy_set_baseband_attenuation.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_phy_g.c_b43_gphy_set_baseband_attenuation.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@B43_MMIO_PHY0 = dso_local local_unnamed_addr global i32 0, align 4
@B43_PHY_DACCTL = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @b43_gphy_set_baseband_attenuation(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, ptr @B43_MMIO_PHY0, align 4, !tbaa !10
%7 = tail call i32 @b43_read16(ptr noundef nonnull %0, i32 noundef %6) #2
%8 = and i32 %7, 65520
%9 = or i32 %8, %1
%10 = tail call i32 @b43_write16(ptr noundef nonnull %0, i32 noundef %6, i32 noundef %9) #2
br label %20
11: ; preds = %2
%12 = icmp sgt i32 %3, 1
%13 = load i32, ptr @B43_PHY_DACCTL, align 4, !tbaa !10
br i1 %12, label %14, label %17
14: ; preds = %11
%15 = shl i32 %1, 2
%16 = tail call i32 @b43_phy_maskset(ptr noundef nonnull %0, i32 noundef %13, i32 noundef 65475, i32 noundef %15) #2
br label %20
17: ; preds = %11
%18 = shl i32 %1, 3
%19 = tail call i32 @b43_phy_maskset(ptr noundef nonnull %0, i32 noundef %13, i32 noundef 65415, i32 noundef %18) #2
br label %20
20: ; preds = %14, %17, %5
ret void
}
declare i32 @b43_write16(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43_read16(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43_phy_maskset(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"b43_phy", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_phy_g.c_b43_gphy_set_baseband_attenuation.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_phy_g.c_b43_gphy_set_baseband_attenuation.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@B43_MMIO_PHY0 = common local_unnamed_addr global i32 0, align 4
@B43_PHY_DACCTL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @b43_gphy_set_baseband_attenuation(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, ptr @B43_MMIO_PHY0, align 4, !tbaa !11
%7 = tail call i32 @b43_read16(ptr noundef nonnull %0, i32 noundef %6) #2
%8 = and i32 %7, 65520
%9 = or i32 %8, %1
%10 = tail call i32 @b43_write16(ptr noundef nonnull %0, i32 noundef %6, i32 noundef %9) #2
br label %20
11: ; preds = %2
%12 = icmp sgt i32 %3, 1
%13 = load i32, ptr @B43_PHY_DACCTL, align 4, !tbaa !11
br i1 %12, label %14, label %17
14: ; preds = %11
%15 = shl i32 %1, 2
%16 = tail call i32 @b43_phy_maskset(ptr noundef nonnull %0, i32 noundef %13, i32 noundef 65475, i32 noundef %15) #2
br label %20
17: ; preds = %11
%18 = shl i32 %1, 3
%19 = tail call i32 @b43_phy_maskset(ptr noundef nonnull %0, i32 noundef %13, i32 noundef 65415, i32 noundef %18) #2
br label %20
20: ; preds = %14, %17, %5
ret void
}
declare i32 @b43_write16(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43_read16(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43_phy_maskset(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"b43_phy", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
|
linux_drivers_net_wireless_broadcom_b43_extr_phy_g.c_b43_gphy_set_baseband_attenuation
|
; ModuleID = 'AnghaBench/freebsd/contrib/netbsd-tests/lib/libpthread/extr_h_resolv.c_resolvone.c'
source_filename = "AnghaBench/freebsd/contrib/netbsd-tests/lib/libpthread/extr_h_resolv.c_resolvone.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, ptr }
@hosts = dso_local local_unnamed_addr global ptr null, align 8
@debug = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [24 x i8] c"%p: %d resolving %s %d\0A\00", align 1
@STDOUT_FILENO = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [16 x i8] c"%p: host %s %s\0A\00", align 1
@.str.2 = private unnamed_addr constant [10 x i8] c"not found\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"ok\00", align 1
@stats = dso_local global i32 0, align 4
@ask = dso_local local_unnamed_addr global ptr null, align 8
@got = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @resolvone], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @resolvone(i32 noundef %0) #0 {
%2 = alloca [1024 x i8], align 16
%3 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 1024, ptr nonnull %2) #3
%4 = tail call i32 (...) @pthread_self() #3
%5 = tail call i32 (...) @random() #3
%6 = and i32 %5, 268435455
%7 = load ptr, ptr @hosts, align 8, !tbaa !5
%8 = load i32, ptr %7, align 8, !tbaa !9
%9 = srem i32 %6, %8
%10 = zext nneg i32 %9 to i64
%11 = getelementptr inbounds %struct.TYPE_2__, ptr %7, i64 0, i32 1
%12 = load ptr, ptr %11, align 8, !tbaa !12
%13 = getelementptr inbounds ptr, ptr %12, i64 %10
%14 = load ptr, ptr %13, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%15 = load i64, ptr @debug, align 8, !tbaa !13
%16 = icmp eq i64 %15, 0
br i1 %16, label %21, label %17
17: ; preds = %1
%18 = call i32 (ptr, i32, ptr, i32, ...) @snprintf(ptr noundef nonnull %2, i32 noundef 1024, ptr noundef nonnull @.str, i32 noundef %4, i32 noundef %0, ptr noundef %14, i32 noundef %9) #3
%19 = load i32, ptr @STDOUT_FILENO, align 4, !tbaa !15
%20 = call i32 @write(i32 noundef %19, ptr noundef nonnull %2, i32 noundef %18) #3
br label %21
21: ; preds = %17, %1
%22 = call i32 @getaddrinfo(ptr noundef %14, ptr noundef null, ptr noundef null, ptr noundef nonnull %3) #3
%23 = load i64, ptr @debug, align 8, !tbaa !13
%24 = icmp eq i64 %23, 0
br i1 %24, label %31, label %25
25: ; preds = %21
%26 = icmp eq i32 %22, 0
%27 = select i1 %26, ptr @.str.3, ptr @.str.2
%28 = call i32 (ptr, i32, ptr, i32, ...) @snprintf(ptr noundef nonnull %2, i32 noundef 1024, ptr noundef nonnull @.str.1, i32 noundef %4, ptr noundef %14, ptr noundef nonnull %27) #3
%29 = load i32, ptr @STDOUT_FILENO, align 4, !tbaa !15
%30 = call i32 @write(i32 noundef %29, ptr noundef nonnull %2, i32 noundef %28) #3
br label %31
31: ; preds = %25, %21
%32 = call i32 @pthread_mutex_lock(ptr noundef nonnull @stats) #3
%33 = load ptr, ptr @ask, align 8, !tbaa !5
%34 = getelementptr inbounds i32, ptr %33, i64 %10
%35 = load i32, ptr %34, align 4, !tbaa !15
%36 = add nsw i32 %35, 1
store i32 %36, ptr %34, align 4, !tbaa !15
%37 = icmp eq i32 %22, 0
%38 = zext i1 %37 to i32
%39 = load ptr, ptr @got, align 8, !tbaa !5
%40 = getelementptr inbounds i32, ptr %39, i64 %10
%41 = load i32, ptr %40, align 4, !tbaa !15
%42 = add nsw i32 %41, %38
store i32 %42, ptr %40, align 4, !tbaa !15
%43 = call i32 @pthread_mutex_unlock(ptr noundef nonnull @stats) #3
br i1 %37, label %44, label %47
44: ; preds = %31
%45 = load ptr, ptr %3, align 8, !tbaa !5
%46 = call i32 @freeaddrinfo(ptr noundef %45) #3
br label %47
47: ; preds = %44, %31
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 1024, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pthread_self(...) local_unnamed_addr #2
declare i32 @random(...) local_unnamed_addr #2
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @write(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @getaddrinfo(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @pthread_mutex_lock(ptr noundef) local_unnamed_addr #2
declare i32 @pthread_mutex_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @freeaddrinfo(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_2__", !11, i64 0, !6, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !6, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!11, !11, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/netbsd-tests/lib/libpthread/extr_h_resolv.c_resolvone.c'
source_filename = "AnghaBench/freebsd/contrib/netbsd-tests/lib/libpthread/extr_h_resolv.c_resolvone.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@hosts = common local_unnamed_addr global ptr null, align 8
@debug = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [24 x i8] c"%p: %d resolving %s %d\0A\00", align 1
@STDOUT_FILENO = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [16 x i8] c"%p: host %s %s\0A\00", align 1
@.str.2 = private unnamed_addr constant [10 x i8] c"not found\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"ok\00", align 1
@stats = common global i32 0, align 4
@ask = common local_unnamed_addr global ptr null, align 8
@got = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @resolvone], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @resolvone(i32 noundef %0) #0 {
%2 = alloca [1024 x i8], align 1
%3 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 1024, ptr nonnull %2) #3
%4 = tail call i32 @pthread_self() #3
%5 = tail call i32 @random() #3
%6 = and i32 %5, 268435455
%7 = load ptr, ptr @hosts, align 8, !tbaa !6
%8 = load i32, ptr %7, align 8, !tbaa !10
%9 = srem i32 %6, %8
%10 = zext nneg i32 %9 to i64
%11 = getelementptr inbounds i8, ptr %7, i64 8
%12 = load ptr, ptr %11, align 8, !tbaa !13
%13 = getelementptr inbounds ptr, ptr %12, i64 %10
%14 = load ptr, ptr %13, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%15 = load i64, ptr @debug, align 8, !tbaa !14
%16 = icmp eq i64 %15, 0
br i1 %16, label %21, label %17
17: ; preds = %1
%18 = call i32 (ptr, i32, ptr, i32, ...) @snprintf(ptr noundef nonnull %2, i32 noundef 1024, ptr noundef nonnull @.str, i32 noundef %4, i32 noundef %0, ptr noundef %14, i32 noundef %9) #3
%19 = load i32, ptr @STDOUT_FILENO, align 4, !tbaa !16
%20 = call i32 @write(i32 noundef %19, ptr noundef nonnull %2, i32 noundef %18) #3
br label %21
21: ; preds = %17, %1
%22 = call i32 @getaddrinfo(ptr noundef %14, ptr noundef null, ptr noundef null, ptr noundef nonnull %3) #3
%23 = load i64, ptr @debug, align 8, !tbaa !14
%24 = icmp eq i64 %23, 0
br i1 %24, label %31, label %25
25: ; preds = %21
%26 = icmp eq i32 %22, 0
%27 = select i1 %26, ptr @.str.3, ptr @.str.2
%28 = call i32 (ptr, i32, ptr, i32, ...) @snprintf(ptr noundef nonnull %2, i32 noundef 1024, ptr noundef nonnull @.str.1, i32 noundef %4, ptr noundef %14, ptr noundef nonnull %27) #3
%29 = load i32, ptr @STDOUT_FILENO, align 4, !tbaa !16
%30 = call i32 @write(i32 noundef %29, ptr noundef nonnull %2, i32 noundef %28) #3
br label %31
31: ; preds = %25, %21
%32 = call i32 @pthread_mutex_lock(ptr noundef nonnull @stats) #3
%33 = load ptr, ptr @ask, align 8, !tbaa !6
%34 = getelementptr inbounds i32, ptr %33, i64 %10
%35 = load i32, ptr %34, align 4, !tbaa !16
%36 = add nsw i32 %35, 1
store i32 %36, ptr %34, align 4, !tbaa !16
%37 = icmp eq i32 %22, 0
%38 = zext i1 %37 to i32
%39 = load ptr, ptr @got, align 8, !tbaa !6
%40 = getelementptr inbounds i32, ptr %39, i64 %10
%41 = load i32, ptr %40, align 4, !tbaa !16
%42 = add nsw i32 %41, %38
store i32 %42, ptr %40, align 4, !tbaa !16
%43 = call i32 @pthread_mutex_unlock(ptr noundef nonnull @stats) #3
br i1 %37, label %44, label %47
44: ; preds = %31
%45 = load ptr, ptr %3, align 8, !tbaa !6
%46 = call i32 @freeaddrinfo(ptr noundef %45) #3
br label %47
47: ; preds = %44, %31
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 1024, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pthread_self(...) local_unnamed_addr #2
declare i32 @random(...) local_unnamed_addr #2
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @write(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @getaddrinfo(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @pthread_mutex_lock(ptr noundef) local_unnamed_addr #2
declare i32 @pthread_mutex_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @freeaddrinfo(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0, !7, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !7, i64 8}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!12, !12, i64 0}
|
freebsd_contrib_netbsd-tests_lib_libpthread_extr_h_resolv.c_resolvone
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dpio_phy.c_bxt_port_to_phy_channel.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dpio_phy.c_bxt_port_to_phy_channel.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bxt_ddi_phy_info = type { ptr, i64 }
%struct.TYPE_2__ = type { i32 }
@DPIO_CH0 = dso_local local_unnamed_addr global i64 0, align 8
@DPIO_CH1 = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [26 x i8] c"PHY not found for PORT %c\00", align 1
@DPIO_PHY0 = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @bxt_port_to_phy_channel(ptr noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = call ptr @bxt_get_phy_list(ptr noundef %0, ptr noundef nonnull %5) #3
%7 = load i32, ptr %5, align 4, !tbaa !5
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %35
9: ; preds = %4
%10 = load i64, ptr @DPIO_CH0, align 8, !tbaa !9
%11 = load i64, ptr @DPIO_CH1, align 8
%12 = zext nneg i32 %7 to i64
br label %13
13: ; preds = %9, %32
%14 = phi i64 [ 0, %9 ], [ %33, %32 ]
%15 = getelementptr inbounds %struct.bxt_ddi_phy_info, ptr %6, i64 %14
%16 = load ptr, ptr %15, align 8, !tbaa !11
%17 = getelementptr inbounds %struct.TYPE_2__, ptr %16, i64 %10
%18 = load i32, ptr %17, align 4, !tbaa !14
%19 = icmp eq i32 %18, %1
br i1 %19, label %20, label %22
20: ; preds = %13
%21 = trunc i64 %14 to i32
store i32 %21, ptr %2, align 4, !tbaa !5
br label %40
22: ; preds = %13
%23 = getelementptr inbounds %struct.bxt_ddi_phy_info, ptr %6, i64 %14, i32 1
%24 = load i64, ptr %23, align 8, !tbaa !16
%25 = icmp eq i64 %24, 0
br i1 %25, label %32, label %26
26: ; preds = %22
%27 = getelementptr inbounds %struct.TYPE_2__, ptr %16, i64 %11
%28 = load i32, ptr %27, align 4, !tbaa !14
%29 = icmp eq i32 %28, %1
br i1 %29, label %30, label %32
30: ; preds = %26
%31 = trunc i64 %14 to i32
store i32 %31, ptr %2, align 4, !tbaa !5
br label %40
32: ; preds = %22, %26
%33 = add nuw nsw i64 %14, 1
%34 = icmp eq i64 %33, %12
br i1 %34, label %35, label %13, !llvm.loop !17
35: ; preds = %32, %4
%36 = call i32 @port_name(i32 noundef %1) #3
%37 = call i32 @WARN(i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %36) #3
%38 = load i32, ptr @DPIO_PHY0, align 4, !tbaa !5
store i32 %38, ptr %2, align 4, !tbaa !5
%39 = load i64, ptr @DPIO_CH0, align 8, !tbaa !9
br label %40
40: ; preds = %35, %30, %20
%41 = phi i64 [ %39, %35 ], [ %11, %30 ], [ %10, %20 ]
%42 = trunc i64 %41 to i32
store i32 %42, ptr %3, align 4, !tbaa !5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @bxt_get_phy_list(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @WARN(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @port_name(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"bxt_ddi_phy_info", !13, i64 0, !10, i64 8}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"TYPE_2__", !6, i64 0}
!16 = !{!12, !10, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dpio_phy.c_bxt_port_to_phy_channel.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dpio_phy.c_bxt_port_to_phy_channel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.bxt_ddi_phy_info = type { ptr, i64 }
%struct.TYPE_2__ = type { i32 }
@DPIO_CH0 = common local_unnamed_addr global i64 0, align 8
@DPIO_CH1 = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [26 x i8] c"PHY not found for PORT %c\00", align 1
@DPIO_PHY0 = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @bxt_port_to_phy_channel(ptr noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = call ptr @bxt_get_phy_list(ptr noundef %0, ptr noundef nonnull %5) #3
%7 = load i32, ptr %5, align 4, !tbaa !6
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %35
9: ; preds = %4
%10 = load i64, ptr @DPIO_CH0, align 8, !tbaa !10
%11 = load i64, ptr @DPIO_CH1, align 8
%12 = zext nneg i32 %7 to i64
br label %13
13: ; preds = %9, %32
%14 = phi i64 [ 0, %9 ], [ %33, %32 ]
%15 = getelementptr inbounds %struct.bxt_ddi_phy_info, ptr %6, i64 %14
%16 = load ptr, ptr %15, align 8, !tbaa !12
%17 = getelementptr inbounds %struct.TYPE_2__, ptr %16, i64 %10
%18 = load i32, ptr %17, align 4, !tbaa !15
%19 = icmp eq i32 %18, %1
br i1 %19, label %20, label %22
20: ; preds = %13
%21 = trunc nuw nsw i64 %14 to i32
store i32 %21, ptr %2, align 4, !tbaa !6
br label %40
22: ; preds = %13
%23 = getelementptr inbounds i8, ptr %15, i64 8
%24 = load i64, ptr %23, align 8, !tbaa !17
%25 = icmp eq i64 %24, 0
br i1 %25, label %32, label %26
26: ; preds = %22
%27 = getelementptr inbounds %struct.TYPE_2__, ptr %16, i64 %11
%28 = load i32, ptr %27, align 4, !tbaa !15
%29 = icmp eq i32 %28, %1
br i1 %29, label %30, label %32
30: ; preds = %26
%31 = trunc nuw nsw i64 %14 to i32
store i32 %31, ptr %2, align 4, !tbaa !6
br label %40
32: ; preds = %22, %26
%33 = add nuw nsw i64 %14, 1
%34 = icmp eq i64 %33, %12
br i1 %34, label %35, label %13, !llvm.loop !18
35: ; preds = %32, %4
%36 = call i32 @port_name(i32 noundef %1) #3
%37 = call i32 @WARN(i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %36) #3
%38 = load i32, ptr @DPIO_PHY0, align 4, !tbaa !6
store i32 %38, ptr %2, align 4, !tbaa !6
%39 = load i64, ptr @DPIO_CH0, align 8, !tbaa !10
br label %40
40: ; preds = %35, %30, %20
%41 = phi i64 [ %39, %35 ], [ %11, %30 ], [ %10, %20 ]
%42 = trunc i64 %41 to i32
store i32 %42, ptr %3, align 4, !tbaa !6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @bxt_get_phy_list(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @WARN(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @port_name(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"bxt_ddi_phy_info", !14, i64 0, !11, i64 8}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"TYPE_2__", !7, i64 0}
!17 = !{!13, !11, i64 8}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_gpu_drm_i915_display_extr_intel_dpio_phy.c_bxt_port_to_phy_channel
|
; ModuleID = 'AnghaBench/libgit2/tests/core/extr_wildmatch.c_test_core_wildmatch__pathmatch.c'
source_filename = "AnghaBench/libgit2/tests/core/extr_wildmatch.c_test_core_wildmatch__pathmatch.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [4 x i8] c"foo\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"fo\00", align 1
@.str.2 = private unnamed_addr constant [8 x i8] c"foo/bar\00", align 1
@.str.3 = private unnamed_addr constant [6 x i8] c"foo/*\00", align 1
@.str.4 = private unnamed_addr constant [12 x i8] c"foo/bba/arr\00", align 1
@.str.5 = private unnamed_addr constant [7 x i8] c"foo/**\00", align 1
@.str.6 = private unnamed_addr constant [5 x i8] c"foo*\00", align 1
@.str.7 = private unnamed_addr constant [6 x i8] c"foo**\00", align 1
@.str.8 = private unnamed_addr constant [9 x i8] c"foo/*arr\00", align 1
@.str.9 = private unnamed_addr constant [10 x i8] c"foo/**arr\00", align 1
@.str.10 = private unnamed_addr constant [7 x i8] c"foo/*z\00", align 1
@.str.11 = private unnamed_addr constant [8 x i8] c"foo/**z\00", align 1
@.str.12 = private unnamed_addr constant [8 x i8] c"foo?bar\00", align 1
@.str.13 = private unnamed_addr constant [10 x i8] c"foo[/]bar\00", align 1
@.str.14 = private unnamed_addr constant [13 x i8] c"foo[^a-z]bar\00", align 1
@.str.15 = private unnamed_addr constant [15 x i8] c"ab/cXd/efXg/hi\00", align 1
@.str.16 = private unnamed_addr constant [6 x i8] c"*Xg*i\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @test_core_wildmatch__pathmatch() local_unnamed_addr #0 {
%1 = tail call i32 @assert_matches(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%2 = tail call i32 @assert_matches(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.2, i32 noundef 1, i32 noundef 1, i32 noundef 1, i32 noundef 1) #2
%3 = tail call i32 @assert_matches(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef 1, i32 noundef 1, i32 noundef 1, i32 noundef 1) #2
%4 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.3, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%5 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.5, i32 noundef 1, i32 noundef 1, i32 noundef 1, i32 noundef 1) #2
%6 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.6, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%7 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.7, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%8 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.8, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%9 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.9, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%10 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.10, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%11 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.11, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%12 = tail call i32 @assert_matches(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.12, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%13 = tail call i32 @assert_matches(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.13, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%14 = tail call i32 @assert_matches(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.14, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%15 = tail call i32 @assert_matches(ptr noundef nonnull @.str.15, ptr noundef nonnull @.str.16, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
ret void
}
declare i32 @assert_matches(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/libgit2/tests/core/extr_wildmatch.c_test_core_wildmatch__pathmatch.c'
source_filename = "AnghaBench/libgit2/tests/core/extr_wildmatch.c_test_core_wildmatch__pathmatch.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"foo\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"fo\00", align 1
@.str.2 = private unnamed_addr constant [8 x i8] c"foo/bar\00", align 1
@.str.3 = private unnamed_addr constant [6 x i8] c"foo/*\00", align 1
@.str.4 = private unnamed_addr constant [12 x i8] c"foo/bba/arr\00", align 1
@.str.5 = private unnamed_addr constant [7 x i8] c"foo/**\00", align 1
@.str.6 = private unnamed_addr constant [5 x i8] c"foo*\00", align 1
@.str.7 = private unnamed_addr constant [6 x i8] c"foo**\00", align 1
@.str.8 = private unnamed_addr constant [9 x i8] c"foo/*arr\00", align 1
@.str.9 = private unnamed_addr constant [10 x i8] c"foo/**arr\00", align 1
@.str.10 = private unnamed_addr constant [7 x i8] c"foo/*z\00", align 1
@.str.11 = private unnamed_addr constant [8 x i8] c"foo/**z\00", align 1
@.str.12 = private unnamed_addr constant [8 x i8] c"foo?bar\00", align 1
@.str.13 = private unnamed_addr constant [10 x i8] c"foo[/]bar\00", align 1
@.str.14 = private unnamed_addr constant [13 x i8] c"foo[^a-z]bar\00", align 1
@.str.15 = private unnamed_addr constant [15 x i8] c"ab/cXd/efXg/hi\00", align 1
@.str.16 = private unnamed_addr constant [6 x i8] c"*Xg*i\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @test_core_wildmatch__pathmatch() local_unnamed_addr #0 {
%1 = tail call i32 @assert_matches(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%2 = tail call i32 @assert_matches(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.2, i32 noundef 1, i32 noundef 1, i32 noundef 1, i32 noundef 1) #2
%3 = tail call i32 @assert_matches(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef 1, i32 noundef 1, i32 noundef 1, i32 noundef 1) #2
%4 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.3, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%5 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.5, i32 noundef 1, i32 noundef 1, i32 noundef 1, i32 noundef 1) #2
%6 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.6, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%7 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.7, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%8 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.8, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%9 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.9, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%10 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.10, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%11 = tail call i32 @assert_matches(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.11, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%12 = tail call i32 @assert_matches(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.12, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%13 = tail call i32 @assert_matches(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.13, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%14 = tail call i32 @assert_matches(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.14, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
%15 = tail call i32 @assert_matches(ptr noundef nonnull @.str.15, ptr noundef nonnull @.str.16, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef 1) #2
ret void
}
declare i32 @assert_matches(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
libgit2_tests_core_extr_wildmatch.c_test_core_wildmatch__pathmatch
|
; ModuleID = 'AnghaBench/freebsd/gnu/usr.bin/grep/extr_kwset.c_enqueue.c'
source_filename = "AnghaBench/freebsd/gnu/usr.bin/grep/extr_kwset.c_enqueue.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.tree = type { ptr, ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @enqueue], section "llvm.metadata"
; Function Attrs: nofree nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define internal void @enqueue(ptr noundef readonly %0, ptr noundef %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %4, label %5
4: ; preds = %2, %5
ret void
5: ; preds = %2
%6 = getelementptr inbounds %struct.tree, ptr %0, i64 0, i32 2
%7 = load ptr, ptr %6, align 8, !tbaa !5
tail call void @enqueue(ptr noundef %7, ptr noundef %1)
%8 = getelementptr inbounds %struct.tree, ptr %0, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !10
tail call void @enqueue(ptr noundef %9, ptr noundef %1)
%10 = load ptr, ptr %0, align 8, !tbaa !11
%11 = load ptr, ptr %1, align 8, !tbaa !12
store ptr %10, ptr %11, align 8, !tbaa !13
store ptr %10, ptr %1, align 8, !tbaa !12
br label %4
}
attributes #0 = { nofree nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"tree", !7, i64 0, !7, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 8}
!11 = !{!6, !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"trie", !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/gnu/usr.bin/grep/extr_kwset.c_enqueue.c'
source_filename = "AnghaBench/freebsd/gnu/usr.bin/grep/extr_kwset.c_enqueue.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @enqueue], section "llvm.metadata"
; Function Attrs: nofree nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @enqueue(ptr noundef readonly %0, ptr noundef %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %4, label %5
4: ; preds = %2, %5
ret void
5: ; preds = %2
%6 = getelementptr inbounds i8, ptr %0, i64 16
%7 = load ptr, ptr %6, align 8, !tbaa !6
tail call void @enqueue(ptr noundef %7, ptr noundef %1)
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !11
tail call void @enqueue(ptr noundef %9, ptr noundef %1)
%10 = load ptr, ptr %0, align 8, !tbaa !12
%11 = load ptr, ptr %1, align 8, !tbaa !13
store ptr %10, ptr %11, align 8, !tbaa !14
store ptr %10, ptr %1, align 8, !tbaa !13
br label %4
}
attributes #0 = { nofree nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"tree", !8, i64 0, !8, i64 8, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 8}
!12 = !{!7, !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"trie", !8, i64 0}
|
freebsd_gnu_usr.bin_grep_extr_kwset.c_enqueue
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/netronome/nfp/extr_nfp_net_common.c_nfp_net_rx_csum.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/netronome/nfp/extr_nfp_net_common.c_nfp_net_rx_csum.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nfp_meta_parsed = type { i32, i64 }
%struct.sk_buff = type { i32, i64 }
%struct.nfp_net_r_vector = type { i32, i32, i32, i32, i32 }
@NETIF_F_RXCSUM = dso_local local_unnamed_addr global i32 0, align 4
@PCIE_DESC_RX_TCP_CSUM_OK = dso_local local_unnamed_addr global i32 0, align 4
@PCIE_DESC_RX_UDP_CSUM_OK = dso_local local_unnamed_addr global i32 0, align 4
@PCIE_DESC_RX_I_TCP_CSUM_OK = dso_local local_unnamed_addr global i32 0, align 4
@PCIE_DESC_RX_I_UDP_CSUM_OK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nfp_net_rx_csum], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @nfp_net_rx_csum(ptr nocapture noundef readonly %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, ptr noundef %4) #0 {
%6 = tail call i32 @skb_checksum_none_assert(ptr noundef %4) #2
%7 = load ptr, ptr %0, align 8, !tbaa !5
%8 = load i32, ptr %7, align 4, !tbaa !10
%9 = load i32, ptr @NETIF_F_RXCSUM, align 4, !tbaa !13
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %64, label %12
12: ; preds = %5
%13 = getelementptr inbounds %struct.nfp_meta_parsed, ptr %3, i64 0, i32 1
%14 = load i64, ptr %13, align 8, !tbaa !14
%15 = icmp eq i64 %14, 0
br i1 %15, label %21, label %16
16: ; preds = %12
%17 = getelementptr inbounds %struct.sk_buff, ptr %4, i64 0, i32 1
store i64 %14, ptr %17, align 8, !tbaa !17
%18 = load i32, ptr %3, align 8, !tbaa !19
store i32 %18, ptr %4, align 8, !tbaa !20
%19 = tail call i32 @u64_stats_update_begin(ptr noundef %1) #2
%20 = getelementptr inbounds %struct.nfp_net_r_vector, ptr %1, i64 0, i32 4
br label %59
21: ; preds = %12
%22 = load i32, ptr %2, align 4, !tbaa !21
%23 = tail call i32 @le16_to_cpu(i32 noundef %22) #2
%24 = tail call i64 @nfp_net_rx_csum_has_errors(i32 noundef %23) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %21
%27 = tail call i32 @u64_stats_update_begin(ptr noundef %1) #2
%28 = getelementptr inbounds %struct.nfp_net_r_vector, ptr %1, i64 0, i32 3
br label %59
29: ; preds = %21
%30 = load i32, ptr %2, align 4, !tbaa !21
%31 = load i32, ptr @PCIE_DESC_RX_TCP_CSUM_OK, align 4, !tbaa !13
%32 = and i32 %31, %30
%33 = icmp eq i32 %32, 0
br i1 %33, label %34, label %38
34: ; preds = %29
%35 = load i32, ptr @PCIE_DESC_RX_UDP_CSUM_OK, align 4, !tbaa !13
%36 = and i32 %35, %30
%37 = icmp eq i32 %36, 0
br i1 %37, label %46, label %38
38: ; preds = %34, %29
%39 = tail call i32 @__skb_incr_checksum_unnecessary(ptr noundef %4) #2
%40 = tail call i32 @u64_stats_update_begin(ptr noundef %1) #2
%41 = getelementptr inbounds %struct.nfp_net_r_vector, ptr %1, i64 0, i32 2
%42 = load i32, ptr %41, align 4, !tbaa !24
%43 = add nsw i32 %42, 1
store i32 %43, ptr %41, align 4, !tbaa !24
%44 = tail call i32 @u64_stats_update_end(ptr noundef %1) #2
%45 = load i32, ptr %2, align 4, !tbaa !21
br label %46
46: ; preds = %38, %34
%47 = phi i32 [ %45, %38 ], [ %30, %34 ]
%48 = load i32, ptr @PCIE_DESC_RX_I_TCP_CSUM_OK, align 4, !tbaa !13
%49 = and i32 %48, %47
%50 = icmp eq i32 %49, 0
br i1 %50, label %51, label %55
51: ; preds = %46
%52 = load i32, ptr @PCIE_DESC_RX_I_UDP_CSUM_OK, align 4, !tbaa !13
%53 = and i32 %52, %47
%54 = icmp eq i32 %53, 0
br i1 %54, label %64, label %55
55: ; preds = %51, %46
%56 = tail call i32 @__skb_incr_checksum_unnecessary(ptr noundef %4) #2
%57 = tail call i32 @u64_stats_update_begin(ptr noundef %1) #2
%58 = getelementptr inbounds %struct.nfp_net_r_vector, ptr %1, i64 0, i32 1
br label %59
59: ; preds = %55, %26, %16
%60 = phi ptr [ %20, %16 ], [ %28, %26 ], [ %58, %55 ]
%61 = load i32, ptr %60, align 4, !tbaa !13
%62 = add nsw i32 %61, 1
store i32 %62, ptr %60, align 4, !tbaa !13
%63 = tail call i32 @u64_stats_update_end(ptr noundef %1) #2
br label %64
64: ; preds = %59, %5, %51
ret void
}
declare i32 @skb_checksum_none_assert(ptr noundef) local_unnamed_addr #1
declare i32 @u64_stats_update_begin(ptr noundef) local_unnamed_addr #1
declare i32 @u64_stats_update_end(ptr noundef) local_unnamed_addr #1
declare i64 @nfp_net_rx_csum_has_errors(i32 noundef) local_unnamed_addr #1
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @__skb_incr_checksum_unnecessary(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"nfp_net_dp", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_3__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!15, !16, i64 8}
!15 = !{!"nfp_meta_parsed", !12, i64 0, !16, i64 8}
!16 = !{!"long", !8, i64 0}
!17 = !{!18, !16, i64 8}
!18 = !{!"sk_buff", !12, i64 0, !16, i64 8}
!19 = !{!15, !12, i64 0}
!20 = !{!18, !12, i64 0}
!21 = !{!22, !12, i64 0}
!22 = !{!"nfp_net_rx_desc", !23, i64 0}
!23 = !{!"TYPE_4__", !12, i64 0}
!24 = !{!25, !12, i64 8}
!25 = !{!"nfp_net_r_vector", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/netronome/nfp/extr_nfp_net_common.c_nfp_net_rx_csum.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/netronome/nfp/extr_nfp_net_common.c_nfp_net_rx_csum.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NETIF_F_RXCSUM = common local_unnamed_addr global i32 0, align 4
@PCIE_DESC_RX_TCP_CSUM_OK = common local_unnamed_addr global i32 0, align 4
@PCIE_DESC_RX_UDP_CSUM_OK = common local_unnamed_addr global i32 0, align 4
@PCIE_DESC_RX_I_TCP_CSUM_OK = common local_unnamed_addr global i32 0, align 4
@PCIE_DESC_RX_I_UDP_CSUM_OK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nfp_net_rx_csum], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @nfp_net_rx_csum(ptr nocapture noundef readonly %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, ptr noundef %4) #0 {
%6 = tail call i32 @skb_checksum_none_assert(ptr noundef %4) #2
%7 = load ptr, ptr %0, align 8, !tbaa !6
%8 = load i32, ptr %7, align 4, !tbaa !11
%9 = load i32, ptr @NETIF_F_RXCSUM, align 4, !tbaa !14
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %59, label %12
12: ; preds = %5
%13 = getelementptr inbounds i8, ptr %3, i64 8
%14 = load i64, ptr %13, align 8, !tbaa !15
%15 = icmp eq i64 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %12
%17 = getelementptr inbounds i8, ptr %4, i64 8
store i64 %14, ptr %17, align 8, !tbaa !18
%18 = load i32, ptr %3, align 8, !tbaa !20
store i32 %18, ptr %4, align 8, !tbaa !21
br label %52
19: ; preds = %12
%20 = load i32, ptr %2, align 4, !tbaa !22
%21 = tail call i32 @le16_to_cpu(i32 noundef %20) #2
%22 = tail call i64 @nfp_net_rx_csum_has_errors(i32 noundef %21) #2
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %52
24: ; preds = %19
%25 = load i32, ptr %2, align 4, !tbaa !22
%26 = load i32, ptr @PCIE_DESC_RX_TCP_CSUM_OK, align 4, !tbaa !14
%27 = and i32 %26, %25
%28 = icmp eq i32 %27, 0
br i1 %28, label %29, label %33
29: ; preds = %24
%30 = load i32, ptr @PCIE_DESC_RX_UDP_CSUM_OK, align 4, !tbaa !14
%31 = and i32 %30, %25
%32 = icmp eq i32 %31, 0
br i1 %32, label %41, label %33
33: ; preds = %29, %24
%34 = tail call i32 @__skb_incr_checksum_unnecessary(ptr noundef %4) #2
%35 = tail call i32 @u64_stats_update_begin(ptr noundef %1) #2
%36 = getelementptr inbounds i8, ptr %1, i64 8
%37 = load i32, ptr %36, align 4, !tbaa !25
%38 = add nsw i32 %37, 1
store i32 %38, ptr %36, align 4, !tbaa !25
%39 = tail call i32 @u64_stats_update_end(ptr noundef %1) #2
%40 = load i32, ptr %2, align 4, !tbaa !22
br label %41
41: ; preds = %33, %29
%42 = phi i32 [ %40, %33 ], [ %25, %29 ]
%43 = load i32, ptr @PCIE_DESC_RX_I_TCP_CSUM_OK, align 4, !tbaa !14
%44 = and i32 %43, %42
%45 = icmp eq i32 %44, 0
br i1 %45, label %46, label %50
46: ; preds = %41
%47 = load i32, ptr @PCIE_DESC_RX_I_UDP_CSUM_OK, align 4, !tbaa !14
%48 = and i32 %47, %42
%49 = icmp eq i32 %48, 0
br i1 %49, label %59, label %50
50: ; preds = %46, %41
%51 = tail call i32 @__skb_incr_checksum_unnecessary(ptr noundef %4) #2
br label %52
52: ; preds = %19, %50, %16
%53 = phi i64 [ 16, %16 ], [ 4, %50 ], [ 12, %19 ]
%54 = tail call i32 @u64_stats_update_begin(ptr noundef %1) #2
%55 = getelementptr inbounds i8, ptr %1, i64 %53
%56 = load i32, ptr %55, align 4, !tbaa !14
%57 = add nsw i32 %56, 1
store i32 %57, ptr %55, align 4, !tbaa !14
%58 = tail call i32 @u64_stats_update_end(ptr noundef %1) #2
br label %59
59: ; preds = %52, %5, %46
ret void
}
declare i32 @skb_checksum_none_assert(ptr noundef) local_unnamed_addr #1
declare i32 @u64_stats_update_begin(ptr noundef) local_unnamed_addr #1
declare i32 @u64_stats_update_end(ptr noundef) local_unnamed_addr #1
declare i64 @nfp_net_rx_csum_has_errors(i32 noundef) local_unnamed_addr #1
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @__skb_incr_checksum_unnecessary(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"nfp_net_dp", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_3__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!16, !17, i64 8}
!16 = !{!"nfp_meta_parsed", !13, i64 0, !17, i64 8}
!17 = !{!"long", !9, i64 0}
!18 = !{!19, !17, i64 8}
!19 = !{!"sk_buff", !13, i64 0, !17, i64 8}
!20 = !{!16, !13, i64 0}
!21 = !{!19, !13, i64 0}
!22 = !{!23, !13, i64 0}
!23 = !{!"nfp_net_rx_desc", !24, i64 0}
!24 = !{!"TYPE_4__", !13, i64 0}
!25 = !{!26, !13, i64 8}
!26 = !{!"nfp_net_r_vector", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16}
|
linux_drivers_net_ethernet_netronome_nfp_extr_nfp_net_common.c_nfp_net_rx_csum
|
; ModuleID = 'AnghaBench/git/extr_grep.c_match_next_pattern.c'
source_filename = "AnghaBench/git/extr_grep.c_match_next_pattern.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i64, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @match_next_pattern], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @match_next_pattern(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, ptr nocapture noundef %4, i32 noundef %5) #0 {
%7 = alloca %struct.TYPE_4__, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #3
%8 = call i32 @match_one_pattern(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef nonnull %7, i32 noundef %5) #3
%9 = icmp eq i32 %8, 0
br i1 %9, label %32, label %10
10: ; preds = %6
%11 = load i64, ptr %7, align 8, !tbaa !5
%12 = icmp slt i64 %11, 0
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %7, i64 0, i32 1
%14 = load i64, ptr %13, align 8
%15 = icmp slt i64 %14, 0
%16 = select i1 %12, i1 true, i1 %15
br i1 %16, label %32, label %17
17: ; preds = %10
%18 = load i64, ptr %4, align 8, !tbaa !5
%19 = icmp sgt i64 %18, -1
br i1 %19, label %20, label %30
20: ; preds = %17
%21 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 0, i32 1
%22 = load i64, ptr %21, align 8, !tbaa !10
%23 = icmp sgt i64 %22, -1
br i1 %23, label %24, label %30
24: ; preds = %20
%25 = icmp ugt i64 %11, %18
br i1 %25, label %32, label %26
26: ; preds = %24
%27 = icmp eq i64 %11, %18
%28 = icmp ult i64 %14, %22
%29 = select i1 %27, i1 %28, i1 false
br i1 %29, label %32, label %30
30: ; preds = %26, %20, %17
store i64 %11, ptr %4, align 8, !tbaa !5
%31 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 0, i32 1
store i64 %14, ptr %31, align 8, !tbaa !10
br label %32
32: ; preds = %26, %24, %10, %6, %30
%33 = phi i32 [ 1, %30 ], [ 0, %6 ], [ 0, %10 ], [ 1, %24 ], [ 1, %26 ]
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
ret i32 %33
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @match_one_pattern(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 8}
|
; ModuleID = 'AnghaBench/git/extr_grep.c_match_next_pattern.c'
source_filename = "AnghaBench/git/extr_grep.c_match_next_pattern.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i64, i64 }
@llvm.used = appending global [1 x ptr] [ptr @match_next_pattern], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @match_next_pattern(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, ptr nocapture noundef %4, i32 noundef %5) #0 {
%7 = alloca %struct.TYPE_4__, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #3
%8 = call i32 @match_one_pattern(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef nonnull %7, i32 noundef %5) #3
%9 = icmp eq i32 %8, 0
br i1 %9, label %32, label %10
10: ; preds = %6
%11 = load i64, ptr %7, align 8, !tbaa !6
%12 = icmp slt i64 %11, 0
%13 = getelementptr inbounds i8, ptr %7, i64 8
%14 = load i64, ptr %13, align 8
%15 = icmp slt i64 %14, 0
%16 = select i1 %12, i1 true, i1 %15
br i1 %16, label %32, label %17
17: ; preds = %10
%18 = load i64, ptr %4, align 8, !tbaa !6
%19 = icmp sgt i64 %18, -1
br i1 %19, label %20, label %30
20: ; preds = %17
%21 = getelementptr inbounds i8, ptr %4, i64 8
%22 = load i64, ptr %21, align 8, !tbaa !11
%23 = icmp sgt i64 %22, -1
br i1 %23, label %24, label %30
24: ; preds = %20
%25 = icmp ugt i64 %11, %18
br i1 %25, label %32, label %26
26: ; preds = %24
%27 = icmp eq i64 %11, %18
%28 = icmp ult i64 %14, %22
%29 = select i1 %27, i1 %28, i1 false
br i1 %29, label %32, label %30
30: ; preds = %26, %20, %17
store i64 %11, ptr %4, align 8, !tbaa !6
%31 = getelementptr inbounds i8, ptr %4, i64 8
store i64 %14, ptr %31, align 8, !tbaa !11
br label %32
32: ; preds = %26, %24, %10, %6, %30
%33 = phi i32 [ 1, %30 ], [ 0, %6 ], [ 0, %10 ], [ 1, %24 ], [ 1, %26 ]
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
ret i32 %33
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @match_one_pattern(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 8}
|
git_extr_grep.c_match_next_pattern
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_reg.h_mlxsw_reg_sfdf_pack.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_reg.h_mlxsw_reg_sfdf_pack.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@sfdf = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mlxsw_reg_sfdf_pack], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @mlxsw_reg_sfdf_pack(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @sfdf, align 4, !tbaa !5
%4 = tail call i32 @MLXSW_REG_ZERO(i32 noundef %3, ptr noundef %0) #2
%5 = tail call i32 @mlxsw_reg_sfdf_flush_type_set(ptr noundef %0, i32 noundef %1) #2
%6 = tail call i32 @mlxsw_reg_sfdf_flush_static_set(ptr noundef %0, i32 noundef 1) #2
ret void
}
declare i32 @MLXSW_REG_ZERO(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mlxsw_reg_sfdf_flush_type_set(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlxsw_reg_sfdf_flush_static_set(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_reg.h_mlxsw_reg_sfdf_pack.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_reg.h_mlxsw_reg_sfdf_pack.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@sfdf = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mlxsw_reg_sfdf_pack], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @mlxsw_reg_sfdf_pack(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @sfdf, align 4, !tbaa !6
%4 = tail call i32 @MLXSW_REG_ZERO(i32 noundef %3, ptr noundef %0) #2
%5 = tail call i32 @mlxsw_reg_sfdf_flush_type_set(ptr noundef %0, i32 noundef %1) #2
%6 = tail call i32 @mlxsw_reg_sfdf_flush_static_set(ptr noundef %0, i32 noundef 1) #2
ret void
}
declare i32 @MLXSW_REG_ZERO(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mlxsw_reg_sfdf_flush_type_set(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlxsw_reg_sfdf_flush_static_set(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_net_ethernet_mellanox_mlxsw_extr_reg.h_mlxsw_reg_sfdf_pack
|
; ModuleID = 'AnghaBench/macvim/src/extr_ui.c_ui_new_shellsize.c'
source_filename = "AnghaBench/macvim/src/extr_ui.c_ui_new_shellsize.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i64 }
@full_screen = dso_local local_unnamed_addr global i64 0, align 8
@exiting = dso_local local_unnamed_addr global i32 0, align 4
@gui = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
; Function Attrs: nounwind uwtable
define dso_local void @ui_new_shellsize() local_unnamed_addr #0 {
%1 = load i64, ptr @full_screen, align 8, !tbaa !5
%2 = icmp eq i64 %1, 0
%3 = load i32, ptr @exiting, align 4
%4 = icmp ne i32 %3, 0
%5 = select i1 %2, i1 true, i1 %4
br i1 %5, label %8, label %6
6: ; preds = %0
%7 = tail call i32 (...) @mch_new_shellsize() #2
br label %8
8: ; preds = %6, %0
ret void
}
declare i32 @mch_new_shellsize(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/macvim/src/extr_ui.c_ui_new_shellsize.c'
source_filename = "AnghaBench/macvim/src/extr_ui.c_ui_new_shellsize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i64 }
@full_screen = common local_unnamed_addr global i64 0, align 8
@exiting = common local_unnamed_addr global i32 0, align 4
@gui = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @ui_new_shellsize() local_unnamed_addr #0 {
%1 = load i64, ptr @full_screen, align 8, !tbaa !6
%2 = icmp eq i64 %1, 0
%3 = load i32, ptr @exiting, align 4
%4 = icmp ne i32 %3, 0
%5 = select i1 %2, i1 true, i1 %4
br i1 %5, label %8, label %6
6: ; preds = %0
%7 = tail call i32 @mch_new_shellsize() #2
br label %8
8: ; preds = %6, %0
ret void
}
declare i32 @mch_new_shellsize(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
macvim_src_extr_ui.c_ui_new_shellsize
|
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_opus_rc.c_ff_opus_rc_get_raw.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_opus_rc.c_ff_opus_rc_get_raw.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32, i32, ptr, i64 }
; Function Attrs: nounwind uwtable
define dso_local i32 @ff_opus_rc_get_raw(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%4 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1, i32 3
%5 = load i64, ptr %4, align 8, !tbaa !5
%6 = icmp eq i64 %5, 0
br i1 %6, label %25, label %7
7: ; preds = %2
%8 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1, i32 2
%9 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1, i32 1
%10 = load i32, ptr %3, align 8, !tbaa !13
br label %11
11: ; preds = %7, %15
%12 = phi i32 [ %10, %7 ], [ %22, %15 ]
%13 = phi i64 [ %5, %7 ], [ %23, %15 ]
%14 = icmp slt i32 %12, %1
br i1 %14, label %15, label %25
15: ; preds = %11
%16 = load ptr, ptr %8, align 8, !tbaa !14
%17 = getelementptr inbounds i32, ptr %16, i64 -1
store ptr %17, ptr %8, align 8, !tbaa !14
%18 = load i32, ptr %17, align 4, !tbaa !15
%19 = shl i32 %18, %12
%20 = load i32, ptr %9, align 4, !tbaa !16
%21 = or i32 %20, %19
store i32 %21, ptr %9, align 4, !tbaa !16
%22 = add nsw i32 %12, 8
store i32 %22, ptr %3, align 8, !tbaa !13
%23 = add nsw i64 %13, -1
store i64 %23, ptr %4, align 8, !tbaa !5
%24 = icmp eq i64 %23, 0
br i1 %24, label %25, label %11, !llvm.loop !17
25: ; preds = %11, %15, %2
%26 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1, i32 1
%27 = load i32, ptr %26, align 4, !tbaa !16
%28 = tail call i32 @av_mod_uintp2(i32 noundef %27, i32 noundef %1) #2
%29 = load i32, ptr %26, align 4, !tbaa !16
%30 = ashr i32 %29, %1
store i32 %30, ptr %26, align 4, !tbaa !16
%31 = load i32, ptr %3, align 8, !tbaa !13
%32 = sub nsw i32 %31, %1
store i32 %32, ptr %3, align 8, !tbaa !13
%33 = load i32, ptr %0, align 8, !tbaa !19
%34 = add nsw i32 %33, %1
store i32 %34, ptr %0, align 8, !tbaa !19
ret i32 %28
}
declare i32 @av_mod_uintp2(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 24}
!6 = !{!"TYPE_5__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_4__", !7, i64 0, !7, i64 4, !11, i64 8, !12, i64 16}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!6, !7, i64 8}
!14 = !{!6, !11, i64 16}
!15 = !{!7, !7, i64 0}
!16 = !{!6, !7, i64 12}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_opus_rc.c_ff_opus_rc_get_raw.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_opus_rc.c_ff_opus_rc_get_raw.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ff_opus_rc_get_raw(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = getelementptr inbounds i8, ptr %0, i64 24
%5 = load i64, ptr %4, align 8, !tbaa !6
%6 = icmp eq i64 %5, 0
br i1 %6, label %25, label %7
7: ; preds = %2
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = getelementptr inbounds i8, ptr %0, i64 12
%10 = load i32, ptr %3, align 8, !tbaa !14
br label %11
11: ; preds = %7, %15
%12 = phi i32 [ %10, %7 ], [ %22, %15 ]
%13 = phi i64 [ %5, %7 ], [ %23, %15 ]
%14 = icmp slt i32 %12, %1
br i1 %14, label %15, label %25
15: ; preds = %11
%16 = load ptr, ptr %8, align 8, !tbaa !15
%17 = getelementptr inbounds i8, ptr %16, i64 -4
store ptr %17, ptr %8, align 8, !tbaa !15
%18 = load i32, ptr %17, align 4, !tbaa !16
%19 = shl i32 %18, %12
%20 = load i32, ptr %9, align 4, !tbaa !17
%21 = or i32 %20, %19
store i32 %21, ptr %9, align 4, !tbaa !17
%22 = add nsw i32 %12, 8
store i32 %22, ptr %3, align 8, !tbaa !14
%23 = add nsw i64 %13, -1
store i64 %23, ptr %4, align 8, !tbaa !6
%24 = icmp eq i64 %23, 0
br i1 %24, label %25, label %11, !llvm.loop !18
25: ; preds = %11, %15, %2
%26 = getelementptr inbounds i8, ptr %0, i64 12
%27 = load i32, ptr %26, align 4, !tbaa !17
%28 = tail call i32 @av_mod_uintp2(i32 noundef %27, i32 noundef %1) #2
%29 = load i32, ptr %26, align 4, !tbaa !17
%30 = ashr i32 %29, %1
store i32 %30, ptr %26, align 4, !tbaa !17
%31 = load i32, ptr %3, align 8, !tbaa !14
%32 = sub nsw i32 %31, %1
store i32 %32, ptr %3, align 8, !tbaa !14
%33 = load i32, ptr %0, align 8, !tbaa !20
%34 = add nsw i32 %33, %1
store i32 %34, ptr %0, align 8, !tbaa !20
ret i32 %28
}
declare i32 @av_mod_uintp2(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 24}
!7 = !{!"TYPE_5__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !8, i64 0, !8, i64 4, !12, i64 8, !13, i64 16}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = !{!7, !8, i64 8}
!15 = !{!7, !12, i64 16}
!16 = !{!8, !8, i64 0}
!17 = !{!7, !8, i64 12}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!7, !8, i64 0}
|
FFmpeg_libavcodec_extr_opus_rc.c_ff_opus_rc_get_raw
|
; ModuleID = 'AnghaBench/git/extr_path.c_update_common_dir.c'
source_filename = "AnghaBench/git/extr_path.c_update_common_dir.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@common_trie = dso_local global i32 0, align 4
@check_common = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @update_common_dir], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @update_common_dir(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = sext i32 %1 to i64
%6 = getelementptr inbounds i8, ptr %4, i64 %5
%7 = tail call i32 (...) @init_common_trie() #2
%8 = load i32, ptr @check_common, align 4, !tbaa !10
%9 = tail call i64 @trie_find(ptr noundef nonnull @common_trie, ptr noundef %6, i32 noundef %8, ptr noundef null) #2
%10 = icmp sgt i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = tail call i32 @replace_dir(ptr noundef nonnull %0, i32 noundef %1, ptr noundef %2) #2
br label %13
13: ; preds = %11, %3
ret void
}
declare i32 @init_common_trie(...) local_unnamed_addr #1
declare i64 @trie_find(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @replace_dir(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"strbuf", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/git/extr_path.c_update_common_dir.c'
source_filename = "AnghaBench/git/extr_path.c_update_common_dir.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@common_trie = common global i32 0, align 4
@check_common = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @update_common_dir], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @update_common_dir(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = sext i32 %1 to i64
%6 = getelementptr inbounds i8, ptr %4, i64 %5
%7 = tail call i32 @init_common_trie() #2
%8 = load i32, ptr @check_common, align 4, !tbaa !11
%9 = tail call i64 @trie_find(ptr noundef nonnull @common_trie, ptr noundef %6, i32 noundef %8, ptr noundef null) #2
%10 = icmp sgt i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = tail call i32 @replace_dir(ptr noundef nonnull %0, i32 noundef %1, ptr noundef %2) #2
br label %13
13: ; preds = %11, %3
ret void
}
declare i32 @init_common_trie(...) local_unnamed_addr #1
declare i64 @trie_find(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @replace_dir(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"strbuf", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
|
git_extr_path.c_update_common_dir
|
; ModuleID = 'AnghaBench/fastsocket/kernel/tools/perf/util/extr_svghelper.c_cpu_model.c'
source_filename = "AnghaBench/fastsocket/kernel/tools/perf/util/extr_svghelper.c_cpu_model.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@cpu_model.cpu_m = internal global [255 x i8] zeroinitializer, align 16
@.str = private unnamed_addr constant [14 x i8] c"/proc/cpuinfo\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"r\00", align 1
@.str.2 = private unnamed_addr constant [11 x i8] c"model name\00", align 1
@.str.3 = private unnamed_addr constant [67 x i8] c"/sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies\00", align 1
@max_freq = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cpu_model], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef nonnull ptr @cpu_model() #0 {
%1 = alloca [256 x i8], align 16
call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %1) #4
store i8 0, ptr @cpu_model.cpu_m, align 16, !tbaa !5
%2 = tail call ptr @fopen(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1)
%3 = icmp eq ptr %2, null
br i1 %3, label %15, label %4
4: ; preds = %0, %7
%5 = call i64 @fgets(ptr noundef nonnull %1, i32 noundef 255, ptr noundef nonnull %2) #4
%6 = icmp eq i64 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %4
%8 = call i64 @strstr(ptr noundef nonnull %1, ptr noundef nonnull @.str.2) #4
%9 = icmp eq i64 %8, 0
br i1 %9, label %4, label %10, !llvm.loop !8
10: ; preds = %7
%11 = getelementptr inbounds [256 x i8], ptr %1, i64 0, i64 13
%12 = call i32 @strncpy(ptr noundef nonnull @cpu_model.cpu_m, ptr noundef nonnull %11, i32 noundef 255) #4
br label %13
13: ; preds = %4, %10
%14 = call i32 @fclose(ptr noundef nonnull %2)
br label %15
15: ; preds = %13, %0
%16 = call ptr @fopen(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1)
%17 = icmp eq ptr %16, null
br i1 %17, label %31, label %18
18: ; preds = %15
%19 = call i64 @fgets(ptr noundef nonnull %1, i32 noundef 255, ptr noundef nonnull %16) #4
%20 = icmp eq i64 %19, 0
br i1 %20, label %29, label %21
21: ; preds = %18, %26
%22 = call i32 @strtoull(ptr noundef nonnull %1, ptr noundef null, i32 noundef 10) #4
%23 = load i32, ptr @max_freq, align 4, !tbaa !10
%24 = icmp ugt i32 %22, %23
br i1 %24, label %25, label %26
25: ; preds = %21
store i32 %22, ptr @max_freq, align 4, !tbaa !10
br label %26
26: ; preds = %25, %21
%27 = call i64 @fgets(ptr noundef nonnull %1, i32 noundef 255, ptr noundef nonnull %16) #4
%28 = icmp eq i64 %27, 0
br i1 %28, label %29, label %21, !llvm.loop !12
29: ; preds = %26, %18
%30 = call i32 @fclose(ptr noundef nonnull %16)
br label %31
31: ; preds = %29, %15
call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %1) #4
ret ptr @cpu_model.cpu_m
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nofree nounwind
declare noalias noundef ptr @fopen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #2
declare i64 @fgets(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3
declare i64 @strstr(ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @strncpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: nofree nounwind
declare noundef i32 @fclose(ptr nocapture noundef) local_unnamed_addr #2
declare i32 @strtoull(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}
!12 = distinct !{!12, !9}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/tools/perf/util/extr_svghelper.c_cpu_model.c'
source_filename = "AnghaBench/fastsocket/kernel/tools/perf/util/extr_svghelper.c_cpu_model.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cpu_model.cpu_m = internal global [255 x i8] zeroinitializer, align 1
@.str = private unnamed_addr constant [14 x i8] c"/proc/cpuinfo\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"r\00", align 1
@.str.2 = private unnamed_addr constant [11 x i8] c"model name\00", align 1
@.str.3 = private unnamed_addr constant [67 x i8] c"/sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies\00", align 1
@max_freq = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cpu_model], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef nonnull ptr @cpu_model() #0 {
%1 = alloca [256 x i8], align 1
call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %1) #4
store i8 0, ptr @cpu_model.cpu_m, align 1, !tbaa !6
%2 = tail call ptr @fopen(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1)
%3 = icmp eq ptr %2, null
br i1 %3, label %15, label %4
4: ; preds = %0, %7
%5 = call i64 @fgets(ptr noundef nonnull %1, i32 noundef 255, ptr noundef nonnull %2) #4
%6 = icmp eq i64 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %4
%8 = call i64 @strstr(ptr noundef nonnull %1, ptr noundef nonnull @.str.2) #4
%9 = icmp eq i64 %8, 0
br i1 %9, label %4, label %10, !llvm.loop !9
10: ; preds = %7
%11 = getelementptr inbounds i8, ptr %1, i64 13
%12 = call i32 @strncpy(ptr noundef nonnull @cpu_model.cpu_m, ptr noundef nonnull %11, i32 noundef 255) #4
br label %13
13: ; preds = %4, %10
%14 = call i32 @fclose(ptr noundef nonnull %2)
br label %15
15: ; preds = %13, %0
%16 = call ptr @fopen(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1)
%17 = icmp eq ptr %16, null
br i1 %17, label %31, label %18
18: ; preds = %15
%19 = call i64 @fgets(ptr noundef nonnull %1, i32 noundef 255, ptr noundef nonnull %16) #4
%20 = icmp eq i64 %19, 0
br i1 %20, label %29, label %21
21: ; preds = %18, %26
%22 = call i32 @strtoull(ptr noundef nonnull %1, ptr noundef null, i32 noundef 10) #4
%23 = load i32, ptr @max_freq, align 4, !tbaa !11
%24 = icmp ugt i32 %22, %23
br i1 %24, label %25, label %26
25: ; preds = %21
store i32 %22, ptr @max_freq, align 4, !tbaa !11
br label %26
26: ; preds = %25, %21
%27 = call i64 @fgets(ptr noundef nonnull %1, i32 noundef 255, ptr noundef nonnull %16) #4
%28 = icmp eq i64 %27, 0
br i1 %28, label %29, label %21, !llvm.loop !13
29: ; preds = %26, %18
%30 = call i32 @fclose(ptr noundef nonnull %16)
br label %31
31: ; preds = %29, %15
call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %1) #4
ret ptr @cpu_model.cpu_m
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nofree nounwind
declare noalias noundef ptr @fopen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #2
declare i64 @fgets(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3
declare i64 @strstr(ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @strncpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: nofree nounwind
declare noundef i32 @fclose(ptr nocapture noundef) local_unnamed_addr #2
declare i32 @strtoull(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !10}
|
fastsocket_kernel_tools_perf_util_extr_svghelper.c_cpu_model
|
; ModuleID = 'AnghaBench/linux/sound/core/extr_pcm_native.c_snd_pcm_drop.c'
source_filename = "AnghaBench/linux/sound/core/extr_pcm_native.c_snd_pcm_drop.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@SNDRV_PCM_STATE_OPEN = dso_local local_unnamed_addr global i64 0, align 8
@SNDRV_PCM_STATE_DISCONNECTED = dso_local local_unnamed_addr global i64 0, align 8
@EBADFD = dso_local local_unnamed_addr global i32 0, align 4
@SNDRV_PCM_STATE_PAUSED = dso_local local_unnamed_addr global i64 0, align 8
@SNDRV_PCM_STATE_SETUP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_pcm_drop], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @snd_pcm_drop(ptr noundef %0) #0 {
%2 = tail call i64 @PCM_RUNTIME_CHECK(ptr noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i32, ptr @ENXIO, align 4, !tbaa !5
%6 = sub nsw i32 0, %5
br label %31
7: ; preds = %1
%8 = load ptr, ptr %0, align 8, !tbaa !9
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = load i64, ptr %9, align 8, !tbaa !14
%11 = load i64, ptr @SNDRV_PCM_STATE_OPEN, align 8, !tbaa !17
%12 = icmp eq i64 %10, %11
%13 = load i64, ptr @SNDRV_PCM_STATE_DISCONNECTED, align 8
%14 = icmp eq i64 %10, %13
%15 = select i1 %12, i1 true, i1 %14
br i1 %15, label %16, label %19
16: ; preds = %7
%17 = load i32, ptr @EBADFD, align 4, !tbaa !5
%18 = sub nsw i32 0, %17
br label %31
19: ; preds = %7
%20 = tail call i32 @snd_pcm_stream_lock_irq(ptr noundef nonnull %0) #2
%21 = load ptr, ptr %8, align 8, !tbaa !12
%22 = load i64, ptr %21, align 8, !tbaa !14
%23 = load i64, ptr @SNDRV_PCM_STATE_PAUSED, align 8, !tbaa !17
%24 = icmp eq i64 %22, %23
br i1 %24, label %25, label %27
25: ; preds = %19
%26 = tail call i32 @snd_pcm_pause(ptr noundef nonnull %0, i32 noundef 0) #2
br label %27
27: ; preds = %25, %19
%28 = load i32, ptr @SNDRV_PCM_STATE_SETUP, align 4, !tbaa !5
%29 = tail call i32 @snd_pcm_stop(ptr noundef nonnull %0, i32 noundef %28) #2
%30 = tail call i32 @snd_pcm_stream_unlock_irq(ptr noundef nonnull %0) #2
br label %31
31: ; preds = %27, %16, %4
%32 = phi i32 [ %6, %4 ], [ %18, %16 ], [ 0, %27 ]
ret i32 %32
}
declare i64 @PCM_RUNTIME_CHECK(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_stream_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_pause(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_pcm_stop(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_pcm_stream_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"snd_pcm_substream", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"snd_pcm_runtime", !11, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"TYPE_2__", !16, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!16, !16, i64 0}
|
; ModuleID = 'AnghaBench/linux/sound/core/extr_pcm_native.c_snd_pcm_drop.c'
source_filename = "AnghaBench/linux/sound/core/extr_pcm_native.c_snd_pcm_drop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENXIO = common local_unnamed_addr global i32 0, align 4
@SNDRV_PCM_STATE_OPEN = common local_unnamed_addr global i64 0, align 8
@SNDRV_PCM_STATE_DISCONNECTED = common local_unnamed_addr global i64 0, align 8
@EBADFD = common local_unnamed_addr global i32 0, align 4
@SNDRV_PCM_STATE_PAUSED = common local_unnamed_addr global i64 0, align 8
@SNDRV_PCM_STATE_SETUP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_pcm_drop], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @snd_pcm_drop(ptr noundef %0) #0 {
%2 = tail call i64 @PCM_RUNTIME_CHECK(ptr noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i32, ptr @ENXIO, align 4, !tbaa !6
%6 = sub nsw i32 0, %5
br label %31
7: ; preds = %1
%8 = load ptr, ptr %0, align 8, !tbaa !10
%9 = load ptr, ptr %8, align 8, !tbaa !13
%10 = load i64, ptr %9, align 8, !tbaa !15
%11 = load i64, ptr @SNDRV_PCM_STATE_OPEN, align 8, !tbaa !18
%12 = icmp eq i64 %10, %11
%13 = load i64, ptr @SNDRV_PCM_STATE_DISCONNECTED, align 8
%14 = icmp eq i64 %10, %13
%15 = select i1 %12, i1 true, i1 %14
br i1 %15, label %16, label %19
16: ; preds = %7
%17 = load i32, ptr @EBADFD, align 4, !tbaa !6
%18 = sub nsw i32 0, %17
br label %31
19: ; preds = %7
%20 = tail call i32 @snd_pcm_stream_lock_irq(ptr noundef nonnull %0) #2
%21 = load ptr, ptr %8, align 8, !tbaa !13
%22 = load i64, ptr %21, align 8, !tbaa !15
%23 = load i64, ptr @SNDRV_PCM_STATE_PAUSED, align 8, !tbaa !18
%24 = icmp eq i64 %22, %23
br i1 %24, label %25, label %27
25: ; preds = %19
%26 = tail call i32 @snd_pcm_pause(ptr noundef nonnull %0, i32 noundef 0) #2
br label %27
27: ; preds = %25, %19
%28 = load i32, ptr @SNDRV_PCM_STATE_SETUP, align 4, !tbaa !6
%29 = tail call i32 @snd_pcm_stop(ptr noundef nonnull %0, i32 noundef %28) #2
%30 = tail call i32 @snd_pcm_stream_unlock_irq(ptr noundef nonnull %0) #2
br label %31
31: ; preds = %27, %16, %4
%32 = phi i32 [ %6, %4 ], [ %18, %16 ], [ 0, %27 ]
ret i32 %32
}
declare i64 @PCM_RUNTIME_CHECK(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_stream_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @snd_pcm_pause(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_pcm_stop(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_pcm_stream_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"snd_pcm_substream", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"snd_pcm_runtime", !12, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"TYPE_2__", !17, i64 0}
!17 = !{!"long", !8, i64 0}
!18 = !{!17, !17, i64 0}
|
linux_sound_core_extr_pcm_native.c_snd_pcm_drop
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/mlx5/mlx5_ib/extr_mlx5_ib_qp.c_free_high_class_uuar.c'
source_filename = "AnghaBench/freebsd/sys/dev/mlx5/mlx5_ib/extr_mlx5_ib_qp.c_free_high_class_uuar.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mlx5_uuar_info = type { ptr, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @free_high_class_uuar], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @free_high_class_uuar(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds %struct.mlx5_uuar_info, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 8, !tbaa !5
%5 = tail call i32 @clear_bit(i32 noundef %1, i32 noundef %4) #2
%6 = load ptr, ptr %0, align 8, !tbaa !11
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i32, ptr %6, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !12
%10 = add nsw i32 %9, -1
store i32 %10, ptr %8, align 4, !tbaa !12
ret void
}
declare i32 @clear_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"mlx5_uuar_info", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!10, !10, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/mlx5/mlx5_ib/extr_mlx5_ib_qp.c_free_high_class_uuar.c'
source_filename = "AnghaBench/freebsd/sys/dev/mlx5/mlx5_ib/extr_mlx5_ib_qp.c_free_high_class_uuar.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @free_high_class_uuar], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @free_high_class_uuar(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load i32, ptr %3, align 8, !tbaa !6
%5 = tail call i32 @clear_bit(i32 noundef %1, i32 noundef %4) #2
%6 = load ptr, ptr %0, align 8, !tbaa !12
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i32, ptr %6, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !13
%10 = add nsw i32 %9, -1
store i32 %10, ptr %8, align 4, !tbaa !13
ret void
}
declare i32 @clear_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"mlx5_uuar_info", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!11, !11, i64 0}
|
freebsd_sys_dev_mlx5_mlx5_ib_extr_mlx5_ib_qp.c_free_high_class_uuar
|
; ModuleID = 'AnghaBench/openssl/test/extr_threadstest.c_test_lock.c'
source_filename = "AnghaBench/openssl/test/extr_threadstest.c_test_lock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @test_lock], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @test_lock() #0 {
%1 = tail call ptr (...) @CRYPTO_THREAD_lock_new() #2
%2 = tail call i32 @CRYPTO_THREAD_read_lock(ptr noundef %1) #2
%3 = tail call i32 @TEST_true(i32 noundef %2) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %0
%6 = tail call i32 @CRYPTO_THREAD_unlock(ptr noundef %1) #2
%7 = tail call i32 @TEST_true(i32 noundef %6) #2
%8 = icmp eq i32 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %5
%10 = tail call i32 @CRYPTO_THREAD_lock_free(ptr noundef %1) #2
br label %11
11: ; preds = %0, %5, %9
%12 = phi i32 [ 1, %9 ], [ 0, %5 ], [ 0, %0 ]
ret i32 %12
}
declare ptr @CRYPTO_THREAD_lock_new(...) local_unnamed_addr #1
declare i32 @TEST_true(i32 noundef) local_unnamed_addr #1
declare i32 @CRYPTO_THREAD_read_lock(ptr noundef) local_unnamed_addr #1
declare i32 @CRYPTO_THREAD_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @CRYPTO_THREAD_lock_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/openssl/test/extr_threadstest.c_test_lock.c'
source_filename = "AnghaBench/openssl/test/extr_threadstest.c_test_lock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @test_lock], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @test_lock() #0 {
%1 = tail call ptr @CRYPTO_THREAD_lock_new() #2
%2 = tail call i32 @CRYPTO_THREAD_read_lock(ptr noundef %1) #2
%3 = tail call i32 @TEST_true(i32 noundef %2) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %0
%6 = tail call i32 @CRYPTO_THREAD_unlock(ptr noundef %1) #2
%7 = tail call i32 @TEST_true(i32 noundef %6) #2
%8 = icmp eq i32 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %5
%10 = tail call i32 @CRYPTO_THREAD_lock_free(ptr noundef %1) #2
br label %11
11: ; preds = %0, %5, %9
%12 = phi i32 [ 1, %9 ], [ 0, %5 ], [ 0, %0 ]
ret i32 %12
}
declare ptr @CRYPTO_THREAD_lock_new(...) local_unnamed_addr #1
declare i32 @TEST_true(i32 noundef) local_unnamed_addr #1
declare i32 @CRYPTO_THREAD_read_lock(ptr noundef) local_unnamed_addr #1
declare i32 @CRYPTO_THREAD_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @CRYPTO_THREAD_lock_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
openssl_test_extr_threadstest.c_test_lock
|
; ModuleID = 'AnghaBench/linux/sound/firewire/bebob/extr_bebob_maudio.c_special_dig_out_iface_ctl_info.c'
source_filename = "AnghaBench/linux/sound/firewire/bebob/extr_bebob_maudio.c_special_dig_out_iface_ctl_info.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@special_dig_out_iface_labels = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @special_dig_out_iface_ctl_info], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @special_dig_out_iface_ctl_info(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load i32, ptr @special_dig_out_iface_labels, align 4, !tbaa !5
%4 = tail call i32 @ARRAY_SIZE(i32 noundef %3) #2
%5 = load i32, ptr @special_dig_out_iface_labels, align 4, !tbaa !5
%6 = tail call i32 @snd_ctl_enum_info(ptr noundef %1, i32 noundef 1, i32 noundef %4, i32 noundef %5) #2
ret i32 %6
}
declare i32 @snd_ctl_enum_info(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/sound/firewire/bebob/extr_bebob_maudio.c_special_dig_out_iface_ctl_info.c'
source_filename = "AnghaBench/linux/sound/firewire/bebob/extr_bebob_maudio.c_special_dig_out_iface_ctl_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@special_dig_out_iface_labels = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @special_dig_out_iface_ctl_info], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @special_dig_out_iface_ctl_info(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load i32, ptr @special_dig_out_iface_labels, align 4, !tbaa !6
%4 = tail call i32 @ARRAY_SIZE(i32 noundef %3) #2
%5 = load i32, ptr @special_dig_out_iface_labels, align 4, !tbaa !6
%6 = tail call i32 @snd_ctl_enum_info(ptr noundef %1, i32 noundef 1, i32 noundef %4, i32 noundef %5) #2
ret i32 %6
}
declare i32 @snd_ctl_enum_info(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_sound_firewire_bebob_extr_bebob_maudio.c_special_dig_out_iface_ctl_info
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv4/extr_ipip.c_ipip_fb_tunnel_init.c'
source_filename = "AnghaBench/fastsocket/kernel/net/ipv4/extr_ipip.c_ipip_fb_tunnel_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, %struct.iphdr }
%struct.iphdr = type { i32, i32, i32 }
%struct.ip_tunnel = type { %struct.TYPE_2__, ptr }
@ipip_net_id = dso_local local_unnamed_addr global i32 0, align 4
@IPPROTO_IPIP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ipip_fb_tunnel_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ipip_fb_tunnel_init(ptr noundef %0) #0 {
%2 = tail call ptr @netdev_priv(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.TYPE_2__, ptr %2, i64 0, i32 1
%4 = tail call i32 @dev_net(ptr noundef %0) #2
%5 = load i32, ptr @ipip_net_id, align 4, !tbaa !5
%6 = tail call ptr @net_generic(i32 noundef %4, i32 noundef %5) #2
%7 = getelementptr inbounds %struct.ip_tunnel, ptr %2, i64 0, i32 1
store ptr %0, ptr %7, align 8, !tbaa !9
%8 = load i32, ptr %2, align 8, !tbaa !14
%9 = load i32, ptr %0, align 4, !tbaa !15
%10 = tail call i32 @strcpy(i32 noundef %8, i32 noundef %9) #2
store i32 4, ptr %3, align 4, !tbaa !17
%11 = load i32, ptr @IPPROTO_IPIP, align 4, !tbaa !5
%12 = getelementptr inbounds %struct.TYPE_2__, ptr %2, i64 0, i32 1, i32 2
store i32 %11, ptr %12, align 4, !tbaa !18
%13 = getelementptr inbounds %struct.TYPE_2__, ptr %2, i64 0, i32 1, i32 1
store i32 5, ptr %13, align 4, !tbaa !19
%14 = tail call i32 @dev_hold(ptr noundef nonnull %0) #2
%15 = load ptr, ptr %6, align 8, !tbaa !20
store ptr %2, ptr %15, align 8, !tbaa !22
ret void
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare ptr @net_generic(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_net(ptr noundef) local_unnamed_addr #1
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_hold(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 16}
!10 = !{!"ip_tunnel", !11, i64 0, !13, i64 16}
!11 = !{!"TYPE_2__", !6, i64 0, !12, i64 4}
!12 = !{!"iphdr", !6, i64 0, !6, i64 4, !6, i64 8}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!10, !6, i64 0}
!15 = !{!16, !6, i64 0}
!16 = !{!"net_device", !6, i64 0}
!17 = !{!12, !6, i64 0}
!18 = !{!12, !6, i64 8}
!19 = !{!12, !6, i64 4}
!20 = !{!21, !13, i64 0}
!21 = !{!"ipip_net", !13, i64 0}
!22 = !{!13, !13, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv4/extr_ipip.c_ipip_fb_tunnel_init.c'
source_filename = "AnghaBench/fastsocket/kernel/net/ipv4/extr_ipip.c_ipip_fb_tunnel_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ipip_net_id = common local_unnamed_addr global i32 0, align 4
@IPPROTO_IPIP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ipip_fb_tunnel_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ipip_fb_tunnel_init(ptr noundef %0) #0 {
%2 = tail call ptr @netdev_priv(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 4
%4 = tail call i32 @dev_net(ptr noundef %0) #2
%5 = load i32, ptr @ipip_net_id, align 4, !tbaa !6
%6 = tail call ptr @net_generic(i32 noundef %4, i32 noundef %5) #2
%7 = getelementptr inbounds i8, ptr %2, i64 16
store ptr %0, ptr %7, align 8, !tbaa !10
%8 = load i32, ptr %2, align 8, !tbaa !15
%9 = load i32, ptr %0, align 4, !tbaa !16
%10 = tail call i32 @strcpy(i32 noundef %8, i32 noundef %9) #2
%11 = load i32, ptr @IPPROTO_IPIP, align 4, !tbaa !6
%12 = getelementptr inbounds i8, ptr %2, i64 12
store i32 %11, ptr %12, align 4, !tbaa !18
store <2 x i32> <i32 4, i32 5>, ptr %3, align 4, !tbaa !6
%13 = tail call i32 @dev_hold(ptr noundef nonnull %0) #2
%14 = load ptr, ptr %6, align 8, !tbaa !19
store ptr %2, ptr %14, align 8, !tbaa !21
ret void
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare ptr @net_generic(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_net(ptr noundef) local_unnamed_addr #1
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_hold(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !14, i64 16}
!11 = !{!"ip_tunnel", !12, i64 0, !14, i64 16}
!12 = !{!"TYPE_2__", !7, i64 0, !13, i64 4}
!13 = !{!"iphdr", !7, i64 0, !7, i64 4, !7, i64 8}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!11, !7, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"net_device", !7, i64 0}
!18 = !{!13, !7, i64 8}
!19 = !{!20, !14, i64 0}
!20 = !{!"ipip_net", !14, i64 0}
!21 = !{!14, !14, i64 0}
|
fastsocket_kernel_net_ipv4_extr_ipip.c_ipip_fb_tunnel_init
|
; ModuleID = 'AnghaBench/ish/fs/extr_fd.c_f_install.c'
source_filename = "AnghaBench/ish/fs/extr_fd.c_f_install.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
%struct.TYPE_4__ = type { %struct.TYPE_3__* }
%struct.TYPE_3__ = type { i32, i32 }
%struct.fd = type { i32 }
@current = dso_local local_unnamed_addr global %struct.TYPE_4__* null, align 8
@O_CLOEXEC_ = dso_local local_unnamed_addr global i32 0, align 4
@O_NONBLOCK_ = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i64 @f_install(%struct.fd* noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load %struct.TYPE_4__*, %struct.TYPE_4__** @current, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %3, i64 0, i32 0
%5 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4, align 8, !tbaa !9
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i64 0, i32 0
%7 = tail call i32 @lock(i32* noundef %6) #2
%8 = tail call i64 @f_install_start(%struct.fd* noundef %0, i32 noundef 0) #2
%9 = icmp sgt i64 %8, -1
br i1 %9, label %10, label %27
10: ; preds = %2
%11 = load i32, i32* @O_CLOEXEC_, align 4, !tbaa !11
%12 = and i32 %11, %1
%13 = icmp eq i32 %12, 0
br i1 %13, label %21, label %14
14: ; preds = %10
%15 = load %struct.TYPE_4__*, %struct.TYPE_4__** @current, align 8, !tbaa !5
%16 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %15, i64 0, i32 0
%17 = load %struct.TYPE_3__*, %struct.TYPE_3__** %16, align 8, !tbaa !9
%18 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %17, i64 0, i32 1
%19 = load i32, i32* %18, align 4, !tbaa !13
%20 = tail call i32 @bit_set(i64 noundef %8, i32 noundef %19) #2
br label %21
21: ; preds = %14, %10
%22 = load i32, i32* @O_NONBLOCK_, align 4, !tbaa !11
%23 = and i32 %22, %1
%24 = icmp eq i32 %23, 0
br i1 %24, label %27, label %25
25: ; preds = %21
%26 = tail call i32 @fd_setflags(%struct.fd* noundef %0, i32 noundef %22) #2
br label %27
27: ; preds = %21, %25, %2
%28 = load %struct.TYPE_4__*, %struct.TYPE_4__** @current, align 8, !tbaa !5
%29 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %28, i64 0, i32 0
%30 = load %struct.TYPE_3__*, %struct.TYPE_3__** %29, align 8, !tbaa !9
%31 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %30, i64 0, i32 0
%32 = tail call i32 @unlock(i32* noundef %31) #2
ret i64 %8
}
declare i32 @lock(i32* noundef) local_unnamed_addr #1
declare i64 @f_install_start(%struct.fd* noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bit_set(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fd_setflags(%struct.fd* noundef, i32 noundef) local_unnamed_addr #1
declare i32 @unlock(i32* noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_4__", !6, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 4}
!14 = !{!"TYPE_3__", !12, i64 0, !12, i64 4}
|
; ModuleID = 'AnghaBench/ish/fs/extr_fd.c_f_install.c'
source_filename = "AnghaBench/ish/fs/extr_fd.c_f_install.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@current = common local_unnamed_addr global ptr null, align 8
@O_CLOEXEC_ = common local_unnamed_addr global i32 0, align 4
@O_NONBLOCK_ = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @f_install(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr @current, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = tail call i32 @lock(ptr noundef %4) #2
%6 = tail call i64 @f_install_start(ptr noundef %0, i32 noundef 0) #2
%7 = icmp sgt i64 %6, -1
br i1 %7, label %8, label %24
8: ; preds = %2
%9 = load i32, ptr @O_CLOEXEC_, align 4, !tbaa !12
%10 = and i32 %9, %1
%11 = icmp eq i32 %10, 0
br i1 %11, label %18, label %12
12: ; preds = %8
%13 = load ptr, ptr @current, align 8, !tbaa !6
%14 = load ptr, ptr %13, align 8, !tbaa !10
%15 = getelementptr inbounds i8, ptr %14, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = tail call i32 @bit_set(i64 noundef %6, i32 noundef %16) #2
br label %18
18: ; preds = %12, %8
%19 = load i32, ptr @O_NONBLOCK_, align 4, !tbaa !12
%20 = and i32 %19, %1
%21 = icmp eq i32 %20, 0
br i1 %21, label %24, label %22
22: ; preds = %18
%23 = tail call i32 @fd_setflags(ptr noundef %0, i32 noundef %19) #2
br label %24
24: ; preds = %18, %22, %2
%25 = load ptr, ptr @current, align 8, !tbaa !6
%26 = load ptr, ptr %25, align 8, !tbaa !10
%27 = tail call i32 @unlock(ptr noundef %26) #2
ret i64 %6
}
declare i32 @lock(ptr noundef) local_unnamed_addr #1
declare i64 @f_install_start(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bit_set(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fd_setflags(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !13, i64 4}
!15 = !{!"TYPE_3__", !13, i64 0, !13, i64 4}
|
ish_fs_extr_fd.c_f_install
|
; ModuleID = 'AnghaBench/linux/drivers/irqchip/extr_irq-xtensa-mx.c_secondary_init_irq.c'
source_filename = "AnghaBench/linux/drivers/irqchip/extr_irq-xtensa-mx.c_secondary_init_irq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@cached_irq_mask = dso_local local_unnamed_addr global i32 0, align 4
@XCHAL_INTTYPE_MASK_EXTERN_EDGE = dso_local local_unnamed_addr global i32 0, align 4
@XCHAL_INTTYPE_MASK_EXTERN_LEVEL = dso_local local_unnamed_addr global i32 0, align 4
@intenable = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @secondary_init_irq() local_unnamed_addr #0 {
%1 = load i32, ptr @cached_irq_mask, align 4, !tbaa !5
%2 = load i32, ptr @XCHAL_INTTYPE_MASK_EXTERN_EDGE, align 4, !tbaa !5
%3 = load i32, ptr @XCHAL_INTTYPE_MASK_EXTERN_LEVEL, align 4, !tbaa !5
%4 = or i32 %3, %2
%5 = tail call i32 @__this_cpu_write(i32 noundef %1, i32 noundef %4) #2
%6 = load i32, ptr @XCHAL_INTTYPE_MASK_EXTERN_EDGE, align 4, !tbaa !5
%7 = load i32, ptr @XCHAL_INTTYPE_MASK_EXTERN_LEVEL, align 4, !tbaa !5
%8 = or i32 %7, %6
%9 = load i32, ptr @intenable, align 4, !tbaa !5
%10 = tail call i32 @xtensa_set_sr(i32 noundef %8, i32 noundef %9) #2
ret void
}
declare i32 @__this_cpu_write(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @xtensa_set_sr(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/irqchip/extr_irq-xtensa-mx.c_secondary_init_irq.c'
source_filename = "AnghaBench/linux/drivers/irqchip/extr_irq-xtensa-mx.c_secondary_init_irq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cached_irq_mask = common local_unnamed_addr global i32 0, align 4
@XCHAL_INTTYPE_MASK_EXTERN_EDGE = common local_unnamed_addr global i32 0, align 4
@XCHAL_INTTYPE_MASK_EXTERN_LEVEL = common local_unnamed_addr global i32 0, align 4
@intenable = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @secondary_init_irq() local_unnamed_addr #0 {
%1 = load i32, ptr @cached_irq_mask, align 4, !tbaa !6
%2 = load i32, ptr @XCHAL_INTTYPE_MASK_EXTERN_EDGE, align 4, !tbaa !6
%3 = load i32, ptr @XCHAL_INTTYPE_MASK_EXTERN_LEVEL, align 4, !tbaa !6
%4 = or i32 %3, %2
%5 = tail call i32 @__this_cpu_write(i32 noundef %1, i32 noundef %4) #2
%6 = load i32, ptr @XCHAL_INTTYPE_MASK_EXTERN_EDGE, align 4, !tbaa !6
%7 = load i32, ptr @XCHAL_INTTYPE_MASK_EXTERN_LEVEL, align 4, !tbaa !6
%8 = or i32 %7, %6
%9 = load i32, ptr @intenable, align 4, !tbaa !6
%10 = tail call i32 @xtensa_set_sr(i32 noundef %8, i32 noundef %9) #2
ret void
}
declare i32 @__this_cpu_write(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @xtensa_set_sr(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_irqchip_extr_irq-xtensa-mx.c_secondary_init_irq
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath10k/extr_snoc.c_ath10k_snoc_pktlog_rx_cb.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath10k/extr_snoc.c_ath10k_snoc_pktlog_rx_cb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ath10k_htc_rx_completion_handler = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ath10k_snoc_pktlog_rx_cb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ath10k_snoc_pktlog_rx_cb(ptr noundef %0) #0 {
%2 = load i32, ptr @ath10k_htc_rx_completion_handler, align 4, !tbaa !5
%3 = tail call i32 @ath10k_snoc_process_rx_cb(ptr noundef %0, i32 noundef %2) #2
ret void
}
declare i32 @ath10k_snoc_process_rx_cb(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath10k/extr_snoc.c_ath10k_snoc_pktlog_rx_cb.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath10k/extr_snoc.c_ath10k_snoc_pktlog_rx_cb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ath10k_htc_rx_completion_handler = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ath10k_snoc_pktlog_rx_cb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ath10k_snoc_pktlog_rx_cb(ptr noundef %0) #0 {
%2 = load i32, ptr @ath10k_htc_rx_completion_handler, align 4, !tbaa !6
%3 = tail call i32 @ath10k_snoc_process_rx_cb(ptr noundef %0, i32 noundef %2) #2
ret void
}
declare i32 @ath10k_snoc_process_rx_cb(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_net_wireless_ath_ath10k_extr_snoc.c_ath10k_snoc_pktlog_rx_cb
|
; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/hx509/extr_cert.c_hx509_cert_get_attribute.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/hx509/extr_cert.c_hx509_cert_get_attribute.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i64, ptr }
; Function Attrs: nounwind uwtable
define dso_local ptr @hx509_cert_get_attribute(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %22, label %5
5: ; preds = %2
%6 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
br label %7
7: ; preds = %5, %18
%8 = phi i64 [ 0, %5 ], [ %19, %18 ]
%9 = load ptr, ptr %6, align 8, !tbaa !12
%10 = getelementptr inbounds ptr, ptr %9, i64 %8
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = tail call i64 @der_heim_oid_cmp(ptr noundef %1, ptr noundef %11) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %7
%15 = load ptr, ptr %6, align 8, !tbaa !12
%16 = getelementptr inbounds ptr, ptr %15, i64 %8
%17 = load ptr, ptr %16, align 8, !tbaa !13
br label %22
18: ; preds = %7
%19 = add nuw i64 %8, 1
%20 = load i64, ptr %0, align 8, !tbaa !5
%21 = icmp ult i64 %19, %20
br i1 %21, label %7, label %22, !llvm.loop !14
22: ; preds = %18, %2, %14
%23 = phi ptr [ %17, %14 ], [ null, %2 ], [ null, %18 ]
ret ptr %23
}
declare i64 @der_heim_oid_cmp(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_8__", !7, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!6, !11, i64 8}
!13 = !{!11, !11, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/hx509/extr_cert.c_hx509_cert_get_attribute.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/hx509/extr_cert.c_hx509_cert_get_attribute.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @hx509_cert_get_attribute(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %22, label %5
5: ; preds = %2
%6 = getelementptr inbounds i8, ptr %0, i64 8
br label %7
7: ; preds = %5, %18
%8 = phi i64 [ 0, %5 ], [ %19, %18 ]
%9 = load ptr, ptr %6, align 8, !tbaa !13
%10 = getelementptr inbounds ptr, ptr %9, i64 %8
%11 = load ptr, ptr %10, align 8, !tbaa !14
%12 = tail call i64 @der_heim_oid_cmp(ptr noundef %1, ptr noundef %11) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %7
%15 = load ptr, ptr %6, align 8, !tbaa !13
%16 = getelementptr inbounds ptr, ptr %15, i64 %8
%17 = load ptr, ptr %16, align 8, !tbaa !14
br label %22
18: ; preds = %7
%19 = add nuw i64 %8, 1
%20 = load i64, ptr %0, align 8, !tbaa !6
%21 = icmp ult i64 %19, %20
br i1 %21, label %7, label %22, !llvm.loop !15
22: ; preds = %18, %2, %14
%23 = phi ptr [ %17, %14 ], [ null, %2 ], [ null, %18 ]
ret ptr %23
}
declare i64 @der_heim_oid_cmp(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_8__", !8, i64 0}
!8 = !{!"TYPE_6__", !9, i64 0, !12, i64 8}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!7, !12, i64 8}
!14 = !{!12, !12, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
|
freebsd_crypto_heimdal_lib_hx509_extr_cert.c_hx509_cert_get_attribute
|
; ModuleID = 'AnghaBench/fastsocket/kernel/Documentation/lguest/extr_lguest.c_cleanup_devices.c'
source_filename = "AnghaBench/fastsocket/kernel/Documentation/lguest/extr_lguest.c_cleanup_devices.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { ptr }
%struct.TYPE_4__ = type { i32 }
@devices = dso_local local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 8
@orig_term = dso_local global %struct.TYPE_4__ zeroinitializer, align 4
@ISIG = dso_local local_unnamed_addr global i32 0, align 4
@ICANON = dso_local local_unnamed_addr global i32 0, align 4
@ECHO = dso_local local_unnamed_addr global i32 0, align 4
@STDIN_FILENO = dso_local local_unnamed_addr global i32 0, align 4
@TCSANOW = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cleanup_devices], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @cleanup_devices() #0 {
%1 = load ptr, ptr @devices, align 8, !tbaa !5
%2 = icmp eq ptr %1, null
br i1 %2, label %8, label %3
3: ; preds = %0, %3
%4 = phi ptr [ %6, %3 ], [ %1, %0 ]
%5 = tail call i32 @reset_device(ptr noundef nonnull %4) #2
%6 = load ptr, ptr %4, align 8, !tbaa !5
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %3, !llvm.loop !9
8: ; preds = %3, %0
%9 = load i32, ptr @orig_term, align 4, !tbaa !11
%10 = load i32, ptr @ISIG, align 4, !tbaa !14
%11 = load i32, ptr @ICANON, align 4, !tbaa !14
%12 = or i32 %11, %10
%13 = load i32, ptr @ECHO, align 4, !tbaa !14
%14 = or i32 %12, %13
%15 = and i32 %14, %9
%16 = icmp eq i32 %15, 0
br i1 %16, label %21, label %17
17: ; preds = %8
%18 = load i32, ptr @STDIN_FILENO, align 4, !tbaa !14
%19 = load i32, ptr @TCSANOW, align 4, !tbaa !14
%20 = tail call i32 @tcsetattr(i32 noundef %18, i32 noundef %19, ptr noundef nonnull @orig_term) #2
br label %21
21: ; preds = %17, %8
ret void
}
declare i32 @reset_device(ptr noundef) local_unnamed_addr #1
declare i32 @tcsetattr(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!13, !13, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/Documentation/lguest/extr_lguest.c_cleanup_devices.c'
source_filename = "AnghaBench/fastsocket/kernel/Documentation/lguest/extr_lguest.c_cleanup_devices.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { ptr }
%struct.TYPE_4__ = type { i32 }
@devices = common local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 8
@orig_term = common global %struct.TYPE_4__ zeroinitializer, align 4
@ISIG = common local_unnamed_addr global i32 0, align 4
@ICANON = common local_unnamed_addr global i32 0, align 4
@ECHO = common local_unnamed_addr global i32 0, align 4
@STDIN_FILENO = common local_unnamed_addr global i32 0, align 4
@TCSANOW = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cleanup_devices], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @cleanup_devices() #0 {
%1 = load ptr, ptr @devices, align 8, !tbaa !6
%2 = icmp eq ptr %1, null
br i1 %2, label %8, label %3
3: ; preds = %0, %3
%4 = phi ptr [ %6, %3 ], [ %1, %0 ]
%5 = tail call i32 @reset_device(ptr noundef nonnull %4) #2
%6 = load ptr, ptr %4, align 8, !tbaa !6
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %3, !llvm.loop !10
8: ; preds = %3, %0
%9 = load i32, ptr @orig_term, align 4, !tbaa !12
%10 = load i32, ptr @ISIG, align 4, !tbaa !15
%11 = load i32, ptr @ICANON, align 4, !tbaa !15
%12 = or i32 %11, %10
%13 = load i32, ptr @ECHO, align 4, !tbaa !15
%14 = or i32 %12, %13
%15 = and i32 %14, %9
%16 = icmp eq i32 %15, 0
br i1 %16, label %21, label %17
17: ; preds = %8
%18 = load i32, ptr @STDIN_FILENO, align 4, !tbaa !15
%19 = load i32, ptr @TCSANOW, align 4, !tbaa !15
%20 = tail call i32 @tcsetattr(i32 noundef %18, i32 noundef %19, ptr noundef nonnull @orig_term) #2
br label %21
21: ; preds = %17, %8
ret void
}
declare i32 @reset_device(ptr noundef) local_unnamed_addr #1
declare i32 @tcsetattr(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"int", !8, i64 0}
!15 = !{!14, !14, i64 0}
|
fastsocket_kernel_Documentation_lguest_extr_lguest.c_cleanup_devices
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_op_classes.c_verify_channel.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_op_classes.c_verify_channel.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BW40MINUS = dso_local local_unnamed_addr global i64 0, align 8
@HOSTAPD_CHAN_HT40MINUS = dso_local local_unnamed_addr global i32 0, align 4
@NOT_ALLOWED = dso_local local_unnamed_addr global i32 0, align 4
@BW40PLUS = dso_local local_unnamed_addr global i64 0, align 8
@HOSTAPD_CHAN_HT40PLUS = dso_local local_unnamed_addr global i32 0, align 4
@BW80 = dso_local local_unnamed_addr global i64 0, align 8
@BW160 = dso_local local_unnamed_addr global i64 0, align 8
@BW80P80 = dso_local local_unnamed_addr global i64 0, align 8
@NO_IR = dso_local local_unnamed_addr global i32 0, align 4
@ALLOWED = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @verify_channel(ptr noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
store i32 0, ptr %4, align 4, !tbaa !5
%5 = call i32 @allow_channel(ptr noundef %0, i64 noundef %1, ptr noundef nonnull %4) #3
%6 = load i64, ptr @BW40MINUS, align 8, !tbaa !9
%7 = icmp eq i64 %6, %2
br i1 %7, label %8, label %16
8: ; preds = %3
%9 = load i32, ptr %4, align 4, !tbaa !5
%10 = load i32, ptr @HOSTAPD_CHAN_HT40MINUS, align 4, !tbaa !5
%11 = and i32 %10, %9
%12 = icmp eq i32 %11, 0
br i1 %12, label %55, label %13
13: ; preds = %8
%14 = add nsw i64 %1, -4
%15 = call i32 @allow_channel(ptr noundef %0, i64 noundef %14, ptr noundef null) #3
br label %42
16: ; preds = %3
%17 = load i64, ptr @BW40PLUS, align 8, !tbaa !9
%18 = icmp eq i64 %17, %2
br i1 %18, label %19, label %27
19: ; preds = %16
%20 = load i32, ptr %4, align 4, !tbaa !5
%21 = load i32, ptr @HOSTAPD_CHAN_HT40PLUS, align 4, !tbaa !5
%22 = and i32 %21, %20
%23 = icmp eq i32 %22, 0
br i1 %23, label %55, label %24
24: ; preds = %19
%25 = add nsw i64 %1, 4
%26 = call i32 @allow_channel(ptr noundef %0, i64 noundef %25, ptr noundef null) #3
br label %42
27: ; preds = %16
%28 = load i64, ptr @BW80, align 8, !tbaa !9
%29 = icmp eq i64 %28, %2
br i1 %29, label %30, label %32
30: ; preds = %27
%31 = call i32 @verify_80mhz(ptr noundef %0, i64 noundef %1) #3
br label %42
32: ; preds = %27
%33 = load i64, ptr @BW160, align 8, !tbaa !9
%34 = icmp eq i64 %33, %2
br i1 %34, label %35, label %37
35: ; preds = %32
%36 = call i32 @verify_160mhz(ptr noundef %0, i64 noundef %1) #3
br label %42
37: ; preds = %32
%38 = load i64, ptr @BW80P80, align 8, !tbaa !9
%39 = icmp eq i64 %38, %2
br i1 %39, label %40, label %42
40: ; preds = %37
%41 = call i32 @verify_80mhz(ptr noundef %0, i64 noundef %1) #3
br label %42
42: ; preds = %24, %35, %40, %37, %30, %13
%43 = phi i32 [ %5, %13 ], [ %5, %24 ], [ %31, %30 ], [ %36, %35 ], [ %41, %40 ], [ %5, %37 ]
%44 = phi i32 [ %15, %13 ], [ %26, %24 ], [ %31, %30 ], [ %36, %35 ], [ %41, %40 ], [ %5, %37 ]
%45 = load i32, ptr @NOT_ALLOWED, align 4, !tbaa !5
%46 = icmp eq i32 %43, %45
%47 = icmp eq i32 %44, %45
%48 = select i1 %46, i1 true, i1 %47
br i1 %48, label %55, label %49
49: ; preds = %42
%50 = load i32, ptr @NO_IR, align 4, !tbaa !5
%51 = icmp eq i32 %43, %50
%52 = icmp eq i32 %44, %50
%53 = select i1 %51, i1 true, i1 %52
%54 = select i1 %53, ptr @NO_IR, ptr @ALLOWED
br label %55
55: ; preds = %49, %42, %19, %8
%56 = phi ptr [ @NOT_ALLOWED, %8 ], [ @NOT_ALLOWED, %19 ], [ @NOT_ALLOWED, %42 ], [ %54, %49 ]
%57 = load i32, ptr %56, align 4, !tbaa !5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %57
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @allow_channel(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @verify_80mhz(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @verify_160mhz(ptr noundef, i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_op_classes.c_verify_channel.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_op_classes.c_verify_channel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BW40MINUS = common local_unnamed_addr global i64 0, align 8
@HOSTAPD_CHAN_HT40MINUS = common local_unnamed_addr global i32 0, align 4
@NOT_ALLOWED = common local_unnamed_addr global i32 0, align 4
@BW40PLUS = common local_unnamed_addr global i64 0, align 8
@HOSTAPD_CHAN_HT40PLUS = common local_unnamed_addr global i32 0, align 4
@BW80 = common local_unnamed_addr global i64 0, align 8
@BW160 = common local_unnamed_addr global i64 0, align 8
@BW80P80 = common local_unnamed_addr global i64 0, align 8
@NO_IR = common local_unnamed_addr global i32 0, align 4
@ALLOWED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @verify_channel(ptr noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
store i32 0, ptr %4, align 4, !tbaa !6
%5 = call i32 @allow_channel(ptr noundef %0, i64 noundef %1, ptr noundef nonnull %4) #3
%6 = load i64, ptr @BW40MINUS, align 8, !tbaa !10
%7 = icmp eq i64 %6, %2
br i1 %7, label %8, label %16
8: ; preds = %3
%9 = load i32, ptr %4, align 4, !tbaa !6
%10 = load i32, ptr @HOSTAPD_CHAN_HT40MINUS, align 4, !tbaa !6
%11 = and i32 %10, %9
%12 = icmp eq i32 %11, 0
br i1 %12, label %55, label %13
13: ; preds = %8
%14 = add nsw i64 %1, -4
%15 = call i32 @allow_channel(ptr noundef %0, i64 noundef %14, ptr noundef null) #3
br label %42
16: ; preds = %3
%17 = load i64, ptr @BW40PLUS, align 8, !tbaa !10
%18 = icmp eq i64 %17, %2
br i1 %18, label %19, label %27
19: ; preds = %16
%20 = load i32, ptr %4, align 4, !tbaa !6
%21 = load i32, ptr @HOSTAPD_CHAN_HT40PLUS, align 4, !tbaa !6
%22 = and i32 %21, %20
%23 = icmp eq i32 %22, 0
br i1 %23, label %55, label %24
24: ; preds = %19
%25 = add nsw i64 %1, 4
%26 = call i32 @allow_channel(ptr noundef %0, i64 noundef %25, ptr noundef null) #3
br label %42
27: ; preds = %16
%28 = load i64, ptr @BW80, align 8, !tbaa !10
%29 = icmp eq i64 %28, %2
br i1 %29, label %30, label %32
30: ; preds = %27
%31 = call i32 @verify_80mhz(ptr noundef %0, i64 noundef %1) #3
br label %42
32: ; preds = %27
%33 = load i64, ptr @BW160, align 8, !tbaa !10
%34 = icmp eq i64 %33, %2
br i1 %34, label %35, label %37
35: ; preds = %32
%36 = call i32 @verify_160mhz(ptr noundef %0, i64 noundef %1) #3
br label %42
37: ; preds = %32
%38 = load i64, ptr @BW80P80, align 8, !tbaa !10
%39 = icmp eq i64 %38, %2
br i1 %39, label %40, label %42
40: ; preds = %37
%41 = call i32 @verify_80mhz(ptr noundef %0, i64 noundef %1) #3
br label %42
42: ; preds = %24, %35, %40, %37, %30, %13
%43 = phi i32 [ %5, %13 ], [ %5, %24 ], [ %31, %30 ], [ %36, %35 ], [ %41, %40 ], [ %5, %37 ]
%44 = phi i32 [ %15, %13 ], [ %26, %24 ], [ %31, %30 ], [ %36, %35 ], [ %41, %40 ], [ %5, %37 ]
%45 = load i32, ptr @NOT_ALLOWED, align 4, !tbaa !6
%46 = icmp eq i32 %43, %45
%47 = icmp eq i32 %44, %45
%48 = select i1 %46, i1 true, i1 %47
br i1 %48, label %55, label %49
49: ; preds = %42
%50 = load i32, ptr @NO_IR, align 4, !tbaa !6
%51 = icmp eq i32 %43, %50
%52 = icmp eq i32 %44, %50
%53 = select i1 %51, i1 true, i1 %52
%54 = select i1 %53, ptr @NO_IR, ptr @ALLOWED
br label %55
55: ; preds = %49, %42, %19, %8
%56 = phi ptr [ @NOT_ALLOWED, %8 ], [ @NOT_ALLOWED, %19 ], [ @NOT_ALLOWED, %42 ], [ %54, %49 ]
%57 = load i32, ptr %56, align 4, !tbaa !6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %57
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @allow_channel(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @verify_80mhz(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @verify_160mhz(ptr noundef, i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
|
freebsd_contrib_wpa_wpa_supplicant_extr_op_classes.c_verify_channel
|
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/lib/isc/win32/extr_net.c_initialize_action.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/lib/isc/win32/extr_net.c_initialize_action.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PF_INET = dso_local local_unnamed_addr global i32 0, align 4
@ipv4_result = dso_local local_unnamed_addr global ptr null, align 8
@PF_INET6 = dso_local local_unnamed_addr global i32 0, align 4
@ipv6_result = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @initialize_action], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @initialize_action() #0 {
%1 = tail call i32 (...) @InitSockets() #2
%2 = load i32, ptr @PF_INET, align 4, !tbaa !5
%3 = tail call ptr @try_proto(i32 noundef %2) #2
store ptr %3, ptr @ipv4_result, align 8, !tbaa !9
ret void
}
declare i32 @InitSockets(...) local_unnamed_addr #1
declare ptr @try_proto(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/lib/isc/win32/extr_net.c_initialize_action.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/lib/isc/win32/extr_net.c_initialize_action.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PF_INET = common local_unnamed_addr global i32 0, align 4
@ipv4_result = common local_unnamed_addr global ptr null, align 8
@PF_INET6 = common local_unnamed_addr global i32 0, align 4
@ipv6_result = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @initialize_action], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @initialize_action() #0 {
%1 = tail call i32 @InitSockets() #2
%2 = load i32, ptr @PF_INET, align 4, !tbaa !6
%3 = tail call ptr @try_proto(i32 noundef %2) #2
store ptr %3, ptr @ipv4_result, align 8, !tbaa !10
ret void
}
declare i32 @InitSockets(...) local_unnamed_addr #1
declare ptr @try_proto(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
|
freebsd_contrib_ntp_lib_isc_win32_extr_net.c_initialize_action
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/syscons/extr_scterm-teken.c_scteken_default_attr.c'
source_filename = "AnghaBench/freebsd/sys/dev/syscons/extr_scterm-teken.c_scteken_default_attr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @scteken_default_attr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @scteken_default_attr(ptr nocapture noundef readonly %0, i32 noundef %1, i32 %2) #0 {
%4 = alloca i32, align 4
%5 = load ptr, ptr %0, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%6 = call i32 @scteken_sc_to_te_attr(i32 noundef %1, ptr noundef nonnull %4) #3
%7 = call i32 @teken_set_defattr(ptr noundef %5, ptr noundef nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @scteken_sc_to_te_attr(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @teken_set_defattr(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/syscons/extr_scterm-teken.c_scteken_default_attr.c'
source_filename = "AnghaBench/freebsd/sys/dev/syscons/extr_scterm-teken.c_scteken_default_attr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @scteken_default_attr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @scteken_default_attr(ptr nocapture noundef readonly %0, i32 noundef %1, i32 %2) #0 {
%4 = alloca i32, align 4
%5 = load ptr, ptr %0, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%6 = call i32 @scteken_sc_to_te_attr(i32 noundef %1, ptr noundef nonnull %4) #3
%7 = call i32 @teken_set_defattr(ptr noundef %5, ptr noundef nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @scteken_sc_to_te_attr(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @teken_set_defattr(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
freebsd_sys_dev_syscons_extr_scterm-teken.c_scteken_default_attr
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_cik_ih.c_cik_ih_resume.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_cik_ih.c_cik_ih_resume.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @cik_ih_resume], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @cik_ih_resume(ptr noundef %0) #0 {
%2 = tail call i32 @cik_ih_hw_init(ptr noundef %0) #2
ret i32 %2
}
declare i32 @cik_ih_hw_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_cik_ih.c_cik_ih_resume.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_cik_ih.c_cik_ih_resume.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cik_ih_resume], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @cik_ih_resume(ptr noundef %0) #0 {
%2 = tail call i32 @cik_ih_hw_init(ptr noundef %0) #2
ret i32 %2
}
declare i32 @cik_ih_hw_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_gpu_drm_amd_amdgpu_extr_cik_ih.c_cik_ih_resume
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_en_rx.c_mlx5e_post_rx_wqes.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_en_rx.c_mlx5e_post_rx_wqes.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mlx5e_rq = type { ptr, %struct.TYPE_5__, i32 }
%struct.TYPE_5__ = type { %struct.TYPE_6__, %struct.mlx5_wq_cyc }
%struct.TYPE_6__ = type { i64 }
%struct.mlx5_wq_cyc = type { i32 }
@MLX5E_RQ_STATE_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @mlx5e_post_rx_wqes(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.mlx5e_rq, ptr %0, i64 0, i32 1, i32 1
%3 = load i32, ptr @MLX5E_RQ_STATE_ENABLED, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.mlx5e_rq, ptr %0, i64 0, i32 2
%5 = tail call i32 @test_bit(i32 noundef %3, ptr noundef nonnull %4) #2
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i64 @unlikely(i32 noundef %7) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %33
10: ; preds = %1
%11 = getelementptr inbounds %struct.mlx5e_rq, ptr %0, i64 0, i32 1
%12 = load i64, ptr %11, align 8, !tbaa !9
%13 = tail call i64 @mlx5_wq_cyc_missing(ptr noundef nonnull %2) #2
%14 = icmp slt i64 %13, %12
br i1 %14, label %33, label %15
15: ; preds = %10, %24
%16 = tail call i32 @mlx5_wq_cyc_get_head(ptr noundef nonnull %2) #2
%17 = tail call i32 @mlx5e_alloc_rx_wqes(ptr noundef %0, i32 noundef %16, i64 noundef %12) #2
%18 = tail call i64 @unlikely(i32 noundef %17) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %15
%21 = load ptr, ptr %0, align 8, !tbaa !16
%22 = load i32, ptr %21, align 4, !tbaa !17
%23 = add nsw i32 %22, 1
store i32 %23, ptr %21, align 4, !tbaa !17
br label %28
24: ; preds = %15
%25 = tail call i32 @mlx5_wq_cyc_push_n(ptr noundef nonnull %2, i64 noundef %12) #2
%26 = tail call i64 @mlx5_wq_cyc_missing(ptr noundef nonnull %2) #2
%27 = icmp slt i64 %26, %12
br i1 %27, label %28, label %15, !llvm.loop !19
28: ; preds = %24, %20
%29 = tail call i32 (...) @dma_wmb() #2
%30 = tail call i32 @mlx5_wq_cyc_update_db_record(ptr noundef nonnull %2) #2
%31 = icmp ne i32 %17, 0
%32 = zext i1 %31 to i32
br label %33
33: ; preds = %10, %1, %28
%34 = phi i32 [ %32, %28 ], [ 0, %1 ], [ 0, %10 ]
ret i32 %34
}
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @mlx5_wq_cyc_missing(ptr noundef) local_unnamed_addr #1
declare i32 @mlx5_wq_cyc_get_head(ptr noundef) local_unnamed_addr #1
declare i32 @mlx5e_alloc_rx_wqes(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mlx5_wq_cyc_push_n(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @dma_wmb(...) local_unnamed_addr #1
declare i32 @mlx5_wq_cyc_update_db_record(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !14, i64 8}
!10 = !{!"mlx5e_rq", !11, i64 0, !12, i64 8, !6, i64 24}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"TYPE_5__", !13, i64 0, !15, i64 8}
!13 = !{!"TYPE_6__", !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!"mlx5_wq_cyc", !6, i64 0}
!16 = !{!10, !11, i64 0}
!17 = !{!18, !6, i64 0}
!18 = !{!"TYPE_4__", !6, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_en_rx.c_mlx5e_post_rx_wqes.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_en_rx.c_mlx5e_post_rx_wqes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MLX5E_RQ_STATE_ENABLED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @mlx5e_post_rx_wqes(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load i32, ptr @MLX5E_RQ_STATE_ENABLED, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 24
%5 = tail call i32 @test_bit(i32 noundef %3, ptr noundef nonnull %4) #2
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i64 @unlikely(i32 noundef %7) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %33
10: ; preds = %1
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = load i64, ptr %11, align 8, !tbaa !10
%13 = tail call i64 @mlx5_wq_cyc_missing(ptr noundef nonnull %2) #2
%14 = icmp slt i64 %13, %12
br i1 %14, label %33, label %15
15: ; preds = %10, %24
%16 = tail call i32 @mlx5_wq_cyc_get_head(ptr noundef nonnull %2) #2
%17 = tail call i32 @mlx5e_alloc_rx_wqes(ptr noundef %0, i32 noundef %16, i64 noundef %12) #2
%18 = tail call i64 @unlikely(i32 noundef %17) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %15
%21 = load ptr, ptr %0, align 8, !tbaa !17
%22 = load i32, ptr %21, align 4, !tbaa !18
%23 = add nsw i32 %22, 1
store i32 %23, ptr %21, align 4, !tbaa !18
br label %28
24: ; preds = %15
%25 = tail call i32 @mlx5_wq_cyc_push_n(ptr noundef nonnull %2, i64 noundef %12) #2
%26 = tail call i64 @mlx5_wq_cyc_missing(ptr noundef nonnull %2) #2
%27 = icmp slt i64 %26, %12
br i1 %27, label %28, label %15, !llvm.loop !20
28: ; preds = %24, %20
%29 = tail call i32 @dma_wmb() #2
%30 = tail call i32 @mlx5_wq_cyc_update_db_record(ptr noundef nonnull %2) #2
%31 = icmp ne i32 %17, 0
%32 = zext i1 %31 to i32
br label %33
33: ; preds = %10, %1, %28
%34 = phi i32 [ %32, %28 ], [ 0, %1 ], [ 0, %10 ]
ret i32 %34
}
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @mlx5_wq_cyc_missing(ptr noundef) local_unnamed_addr #1
declare i32 @mlx5_wq_cyc_get_head(ptr noundef) local_unnamed_addr #1
declare i32 @mlx5e_alloc_rx_wqes(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mlx5_wq_cyc_push_n(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @dma_wmb(...) local_unnamed_addr #1
declare i32 @mlx5_wq_cyc_update_db_record(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !15, i64 8}
!11 = !{!"mlx5e_rq", !12, i64 0, !13, i64 8, !7, i64 24}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"TYPE_5__", !14, i64 0, !16, i64 8}
!14 = !{!"TYPE_6__", !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!"mlx5_wq_cyc", !7, i64 0}
!17 = !{!11, !12, i64 0}
!18 = !{!19, !7, i64 0}
!19 = !{!"TYPE_4__", !7, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_net_ethernet_mellanox_mlx5_core_extr_en_rx.c_mlx5e_post_rx_wqes
|
; ModuleID = 'AnghaBench/linux/drivers/video/fbdev/extr_pm3fb.c_pm3fb_set_par.c'
source_filename = "AnghaBench/linux/drivers/video/fbdev/extr_pm3fb.c_pm3fb_set_par.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fb_info = type { %struct.TYPE_4__, %struct.TYPE_3__, ptr }
%struct.TYPE_4__ = type { i32, i32, i32, i32, i32, i32, i32, i64 }
%struct.TYPE_3__ = type { i32, i32 }
%struct.pm3_par = type { i32, i32 }
@FB_SYNC_HOR_HIGH_ACT = dso_local local_unnamed_addr global i32 0, align 4
@PM3VideoControl_HSYNC_ACTIVE_HIGH = dso_local local_unnamed_addr global i32 0, align 4
@PM3VideoControl_HSYNC_ACTIVE_LOW = dso_local local_unnamed_addr global i32 0, align 4
@FB_SYNC_VERT_HIGH_ACT = dso_local local_unnamed_addr global i32 0, align 4
@PM3VideoControl_VSYNC_ACTIVE_HIGH = dso_local local_unnamed_addr global i32 0, align 4
@PM3VideoControl_VSYNC_ACTIVE_LOW = dso_local local_unnamed_addr global i32 0, align 4
@FB_VMODE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@FB_VMODE_DOUBLE = dso_local local_unnamed_addr global i32 0, align 4
@PM3VideoControl_LINE_DOUBLE_ON = dso_local local_unnamed_addr global i32 0, align 4
@FB_ACTIVATE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@FB_ACTIVATE_NOW = dso_local local_unnamed_addr global i32 0, align 4
@PM3VideoControl_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [19 x i8] c"PM3Video disabled\0A\00", align 1
@PM3VideoControl_PIXELSIZE_8BIT = dso_local local_unnamed_addr global i32 0, align 4
@PM3VideoControl_PIXELSIZE_16BIT = dso_local local_unnamed_addr global i32 0, align 4
@PM3VideoControl_PIXELSIZE_32BIT = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [19 x i8] c"Unsupported depth\0A\00", align 1
@FB_VISUAL_PSEUDOCOLOR = dso_local local_unnamed_addr global i32 0, align 4
@FB_VISUAL_TRUECOLOR = dso_local local_unnamed_addr global i32 0, align 4
@PM3RD_CursorMode = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pm3fb_set_par], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @pm3fb_set_par(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.fb_info, ptr %0, i64 0, i32 2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i32, ptr %0, align 8, !tbaa !14
%5 = add nsw i32 %4, 31
%6 = and i32 %5, -32
%7 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !15
%9 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 2
%10 = load i32, ptr %9, align 8, !tbaa !16
%11 = mul nsw i32 %10, %6
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 7
%14 = load i64, ptr %13, align 8, !tbaa !17
%15 = add nsw i64 %14, %12
%16 = tail call i32 @pm3fb_shift_bpp(i32 noundef %8, i64 noundef %15) #2
%17 = getelementptr inbounds %struct.pm3_par, ptr %3, i64 0, i32 1
store i32 %16, ptr %17, align 4, !tbaa !18
store i32 0, ptr %3, align 4, !tbaa !20
%18 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 3
%19 = load i32, ptr %18, align 4, !tbaa !21
%20 = load i32, ptr @FB_SYNC_HOR_HIGH_ACT, align 4, !tbaa !22
%21 = and i32 %20, %19
%22 = icmp eq i32 %21, 0
%23 = load i32, ptr @PM3VideoControl_HSYNC_ACTIVE_LOW, align 4
%24 = load i32, ptr @PM3VideoControl_HSYNC_ACTIVE_HIGH, align 4
%25 = select i1 %22, i32 %23, i32 %24
store i32 %25, ptr %3, align 4, !tbaa !20
%26 = load i32, ptr @FB_SYNC_VERT_HIGH_ACT, align 4, !tbaa !22
%27 = and i32 %26, %19
%28 = icmp eq i32 %27, 0
%29 = load i32, ptr @PM3VideoControl_VSYNC_ACTIVE_LOW, align 4
%30 = load i32, ptr @PM3VideoControl_VSYNC_ACTIVE_HIGH, align 4
%31 = select i1 %28, i32 %29, i32 %30
%32 = or i32 %31, %25
store i32 %32, ptr %3, align 4, !tbaa !20
%33 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 4
%34 = load i32, ptr %33, align 8, !tbaa !23
%35 = load i32, ptr @FB_VMODE_MASK, align 4, !tbaa !22
%36 = and i32 %35, %34
%37 = load i32, ptr @FB_VMODE_DOUBLE, align 4, !tbaa !22
%38 = icmp eq i32 %36, %37
br i1 %38, label %39, label %42
39: ; preds = %1
%40 = load i32, ptr @PM3VideoControl_LINE_DOUBLE_ON, align 4, !tbaa !22
%41 = or i32 %40, %32
store i32 %41, ptr %3, align 4, !tbaa !20
br label %42
42: ; preds = %39, %1
%43 = phi i32 [ %41, %39 ], [ %32, %1 ]
%44 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 5
%45 = load i32, ptr %44, align 4, !tbaa !24
%46 = load i32, ptr @FB_ACTIVATE_MASK, align 4, !tbaa !22
%47 = and i32 %46, %45
%48 = load i32, ptr @FB_ACTIVATE_NOW, align 4, !tbaa !22
%49 = icmp eq i32 %47, %48
br i1 %49, label %50, label %53
50: ; preds = %42
%51 = load i32, ptr @PM3VideoControl_ENABLE, align 4, !tbaa !22
%52 = or i32 %43, %51
store i32 %52, ptr %3, align 4, !tbaa !20
br label %55
53: ; preds = %42
%54 = tail call i32 @DPRINTK(ptr noundef nonnull @.str) #2
br label %55
55: ; preds = %53, %50
switch i32 %8, label %68 [
i32 8, label %56
i32 16, label %60
i32 32, label %64
]
56: ; preds = %55
%57 = load i32, ptr @PM3VideoControl_PIXELSIZE_8BIT, align 4, !tbaa !22
%58 = load i32, ptr %3, align 4, !tbaa !20
%59 = or i32 %58, %57
store i32 %59, ptr %3, align 4, !tbaa !20
br label %70
60: ; preds = %55
%61 = load i32, ptr @PM3VideoControl_PIXELSIZE_16BIT, align 4, !tbaa !22
%62 = load i32, ptr %3, align 4, !tbaa !20
%63 = or i32 %62, %61
store i32 %63, ptr %3, align 4, !tbaa !20
br label %70
64: ; preds = %55
%65 = load i32, ptr @PM3VideoControl_PIXELSIZE_32BIT, align 4, !tbaa !22
%66 = load i32, ptr %3, align 4, !tbaa !20
%67 = or i32 %66, %65
store i32 %67, ptr %3, align 4, !tbaa !20
br label %70
68: ; preds = %55
%69 = tail call i32 @DPRINTK(ptr noundef nonnull @.str.1) #2
br label %70
70: ; preds = %68, %64, %60, %56
%71 = icmp eq i32 %8, 8
%72 = load i32, ptr @FB_VISUAL_PSEUDOCOLOR, align 4
%73 = load i32, ptr @FB_VISUAL_TRUECOLOR, align 4
%74 = select i1 %71, i32 %72, i32 %73
%75 = getelementptr inbounds %struct.fb_info, ptr %0, i64 0, i32 1
%76 = getelementptr inbounds %struct.fb_info, ptr %0, i64 0, i32 1, i32 1
store i32 %74, ptr %76, align 4, !tbaa !25
%77 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 6
%78 = load i32, ptr %77, align 8, !tbaa !26
%79 = add nsw i32 %78, 7
%80 = ashr i32 %79, 3
%81 = mul i32 %80, %8
store i32 %81, ptr %75, align 8, !tbaa !27
%82 = tail call i32 @pm3fb_clear_colormap(ptr noundef nonnull %3, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%83 = load i32, ptr @PM3RD_CursorMode, align 4, !tbaa !22
%84 = tail call i32 @PM3_WRITE_DAC_REG(ptr noundef nonnull %3, i32 noundef %83, i32 noundef 0) #2
%85 = tail call i32 @pm3fb_init_engine(ptr noundef nonnull %0) #2
%86 = tail call i32 @pm3fb_write_mode(ptr noundef nonnull %0) #2
ret i32 0
}
declare i32 @pm3fb_shift_bpp(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @DPRINTK(ptr noundef) local_unnamed_addr #1
declare i32 @pm3fb_clear_colormap(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PM3_WRITE_DAC_REG(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pm3fb_init_engine(ptr noundef) local_unnamed_addr #1
declare i32 @pm3fb_write_mode(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !13, i64 48}
!6 = !{!"fb_info", !7, i64 0, !12, i64 40, !13, i64 48}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !11, i64 32}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"TYPE_3__", !8, i64 0, !8, i64 4}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!6, !8, i64 0}
!15 = !{!6, !8, i64 4}
!16 = !{!6, !8, i64 8}
!17 = !{!6, !11, i64 32}
!18 = !{!19, !8, i64 4}
!19 = !{!"pm3_par", !8, i64 0, !8, i64 4}
!20 = !{!19, !8, i64 0}
!21 = !{!6, !8, i64 12}
!22 = !{!8, !8, i64 0}
!23 = !{!6, !8, i64 16}
!24 = !{!6, !8, i64 20}
!25 = !{!6, !8, i64 44}
!26 = !{!6, !8, i64 24}
!27 = !{!6, !8, i64 40}
|
; ModuleID = 'AnghaBench/linux/drivers/video/fbdev/extr_pm3fb.c_pm3fb_set_par.c'
source_filename = "AnghaBench/linux/drivers/video/fbdev/extr_pm3fb.c_pm3fb_set_par.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FB_SYNC_HOR_HIGH_ACT = common local_unnamed_addr global i32 0, align 4
@PM3VideoControl_HSYNC_ACTIVE_HIGH = common local_unnamed_addr global i32 0, align 4
@PM3VideoControl_HSYNC_ACTIVE_LOW = common local_unnamed_addr global i32 0, align 4
@FB_SYNC_VERT_HIGH_ACT = common local_unnamed_addr global i32 0, align 4
@PM3VideoControl_VSYNC_ACTIVE_HIGH = common local_unnamed_addr global i32 0, align 4
@PM3VideoControl_VSYNC_ACTIVE_LOW = common local_unnamed_addr global i32 0, align 4
@FB_VMODE_MASK = common local_unnamed_addr global i32 0, align 4
@FB_VMODE_DOUBLE = common local_unnamed_addr global i32 0, align 4
@PM3VideoControl_LINE_DOUBLE_ON = common local_unnamed_addr global i32 0, align 4
@FB_ACTIVATE_MASK = common local_unnamed_addr global i32 0, align 4
@FB_ACTIVATE_NOW = common local_unnamed_addr global i32 0, align 4
@PM3VideoControl_ENABLE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [19 x i8] c"PM3Video disabled\0A\00", align 1
@PM3VideoControl_PIXELSIZE_8BIT = common local_unnamed_addr global i32 0, align 4
@PM3VideoControl_PIXELSIZE_16BIT = common local_unnamed_addr global i32 0, align 4
@PM3VideoControl_PIXELSIZE_32BIT = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [19 x i8] c"Unsupported depth\0A\00", align 1
@FB_VISUAL_PSEUDOCOLOR = common local_unnamed_addr global i32 0, align 4
@FB_VISUAL_TRUECOLOR = common local_unnamed_addr global i32 0, align 4
@PM3RD_CursorMode = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pm3fb_set_par], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @pm3fb_set_par(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 48
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i32, ptr %0, align 8, !tbaa !15
%5 = add nsw i32 %4, 31
%6 = and i32 %5, -32
%7 = getelementptr inbounds i8, ptr %0, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !16
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load i32, ptr %9, align 8, !tbaa !17
%11 = mul nsw i32 %10, %6
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, ptr %0, i64 32
%14 = load i64, ptr %13, align 8, !tbaa !18
%15 = add nsw i64 %14, %12
%16 = tail call i32 @pm3fb_shift_bpp(i32 noundef %8, i64 noundef %15) #2
%17 = getelementptr inbounds i8, ptr %3, i64 4
store i32 %16, ptr %17, align 4, !tbaa !19
store i32 0, ptr %3, align 4, !tbaa !21
%18 = getelementptr inbounds i8, ptr %0, i64 12
%19 = load i32, ptr %18, align 4, !tbaa !22
%20 = load i32, ptr @FB_SYNC_HOR_HIGH_ACT, align 4, !tbaa !23
%21 = and i32 %20, %19
%22 = icmp eq i32 %21, 0
%23 = load i32, ptr @PM3VideoControl_HSYNC_ACTIVE_LOW, align 4
%24 = load i32, ptr @PM3VideoControl_HSYNC_ACTIVE_HIGH, align 4
%25 = select i1 %22, i32 %23, i32 %24
store i32 %25, ptr %3, align 4, !tbaa !21
%26 = load i32, ptr @FB_SYNC_VERT_HIGH_ACT, align 4, !tbaa !23
%27 = and i32 %26, %19
%28 = icmp eq i32 %27, 0
%29 = load i32, ptr @PM3VideoControl_VSYNC_ACTIVE_LOW, align 4
%30 = load i32, ptr @PM3VideoControl_VSYNC_ACTIVE_HIGH, align 4
%31 = select i1 %28, i32 %29, i32 %30
%32 = or i32 %31, %25
store i32 %32, ptr %3, align 4, !tbaa !21
%33 = getelementptr inbounds i8, ptr %0, i64 16
%34 = load i32, ptr %33, align 8, !tbaa !24
%35 = load i32, ptr @FB_VMODE_MASK, align 4, !tbaa !23
%36 = and i32 %35, %34
%37 = load i32, ptr @FB_VMODE_DOUBLE, align 4, !tbaa !23
%38 = icmp eq i32 %36, %37
br i1 %38, label %39, label %42
39: ; preds = %1
%40 = load i32, ptr @PM3VideoControl_LINE_DOUBLE_ON, align 4, !tbaa !23
%41 = or i32 %40, %32
store i32 %41, ptr %3, align 4, !tbaa !21
br label %42
42: ; preds = %39, %1
%43 = phi i32 [ %41, %39 ], [ %32, %1 ]
%44 = getelementptr inbounds i8, ptr %0, i64 20
%45 = load i32, ptr %44, align 4, !tbaa !25
%46 = load i32, ptr @FB_ACTIVATE_MASK, align 4, !tbaa !23
%47 = and i32 %46, %45
%48 = load i32, ptr @FB_ACTIVATE_NOW, align 4, !tbaa !23
%49 = icmp eq i32 %47, %48
br i1 %49, label %50, label %53
50: ; preds = %42
%51 = load i32, ptr @PM3VideoControl_ENABLE, align 4, !tbaa !23
%52 = or i32 %43, %51
store i32 %52, ptr %3, align 4, !tbaa !21
br label %55
53: ; preds = %42
%54 = tail call i32 @DPRINTK(ptr noundef nonnull @.str) #2
br label %55
55: ; preds = %53, %50
switch i32 %8, label %68 [
i32 8, label %56
i32 16, label %60
i32 32, label %64
]
56: ; preds = %55
%57 = load i32, ptr @PM3VideoControl_PIXELSIZE_8BIT, align 4, !tbaa !23
%58 = load i32, ptr %3, align 4, !tbaa !21
%59 = or i32 %58, %57
store i32 %59, ptr %3, align 4, !tbaa !21
br label %70
60: ; preds = %55
%61 = load i32, ptr @PM3VideoControl_PIXELSIZE_16BIT, align 4, !tbaa !23
%62 = load i32, ptr %3, align 4, !tbaa !21
%63 = or i32 %62, %61
store i32 %63, ptr %3, align 4, !tbaa !21
br label %70
64: ; preds = %55
%65 = load i32, ptr @PM3VideoControl_PIXELSIZE_32BIT, align 4, !tbaa !23
%66 = load i32, ptr %3, align 4, !tbaa !21
%67 = or i32 %66, %65
store i32 %67, ptr %3, align 4, !tbaa !21
br label %70
68: ; preds = %55
%69 = tail call i32 @DPRINTK(ptr noundef nonnull @.str.1) #2
br label %70
70: ; preds = %68, %64, %60, %56
%71 = icmp eq i32 %8, 8
%72 = load i32, ptr @FB_VISUAL_PSEUDOCOLOR, align 4
%73 = load i32, ptr @FB_VISUAL_TRUECOLOR, align 4
%74 = select i1 %71, i32 %72, i32 %73
%75 = getelementptr inbounds i8, ptr %0, i64 40
%76 = getelementptr inbounds i8, ptr %0, i64 44
store i32 %74, ptr %76, align 4, !tbaa !26
%77 = getelementptr inbounds i8, ptr %0, i64 24
%78 = load i32, ptr %77, align 8, !tbaa !27
%79 = add nsw i32 %78, 7
%80 = ashr i32 %79, 3
%81 = mul i32 %80, %8
store i32 %81, ptr %75, align 8, !tbaa !28
%82 = tail call i32 @pm3fb_clear_colormap(ptr noundef nonnull %3, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%83 = load i32, ptr @PM3RD_CursorMode, align 4, !tbaa !23
%84 = tail call i32 @PM3_WRITE_DAC_REG(ptr noundef nonnull %3, i32 noundef %83, i32 noundef 0) #2
%85 = tail call i32 @pm3fb_init_engine(ptr noundef nonnull %0) #2
%86 = tail call i32 @pm3fb_write_mode(ptr noundef nonnull %0) #2
ret i32 0
}
declare i32 @pm3fb_shift_bpp(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @DPRINTK(ptr noundef) local_unnamed_addr #1
declare i32 @pm3fb_clear_colormap(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PM3_WRITE_DAC_REG(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pm3fb_init_engine(ptr noundef) local_unnamed_addr #1
declare i32 @pm3fb_write_mode(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !14, i64 48}
!7 = !{!"fb_info", !8, i64 0, !13, i64 40, !14, i64 48}
!8 = !{!"TYPE_4__", !9, i64 0, !9, i64 4, !9, i64 8, !9, i64 12, !9, i64 16, !9, i64 20, !9, i64 24, !12, i64 32}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!"TYPE_3__", !9, i64 0, !9, i64 4}
!14 = !{!"any pointer", !10, i64 0}
!15 = !{!7, !9, i64 0}
!16 = !{!7, !9, i64 4}
!17 = !{!7, !9, i64 8}
!18 = !{!7, !12, i64 32}
!19 = !{!20, !9, i64 4}
!20 = !{!"pm3_par", !9, i64 0, !9, i64 4}
!21 = !{!20, !9, i64 0}
!22 = !{!7, !9, i64 12}
!23 = !{!9, !9, i64 0}
!24 = !{!7, !9, i64 16}
!25 = !{!7, !9, i64 20}
!26 = !{!7, !9, i64 44}
!27 = !{!7, !9, i64 24}
!28 = !{!7, !9, i64 40}
|
linux_drivers_video_fbdev_extr_pm3fb.c_pm3fb_set_par
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/microblaze/kernel/extr_prom_parse.c___of_address_to_resource.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/microblaze/kernel/extr_prom_parse.c___of_address_to_resource.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.resource = type { i64, i32, i32, i64 }
@IORESOURCE_IO = dso_local local_unnamed_addr global i32 0, align 4
@IORESOURCE_MEM = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@OF_BAD_ADDR = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @__of_address_to_resource], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @__of_address_to_resource(ptr noundef %0, ptr noundef %1, i64 noundef %2, i32 noundef %3, ptr noundef %4) #0 {
%6 = load i32, ptr @IORESOURCE_IO, align 4, !tbaa !5
%7 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !5
%8 = or i32 %7, %6
%9 = and i32 %8, %3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %5
%12 = load i32, ptr @EINVAL, align 4, !tbaa !5
%13 = sub nsw i32 0, %12
br label %36
14: ; preds = %5
%15 = tail call i64 @of_translate_address(ptr noundef %0, ptr noundef %1) #2
%16 = load i64, ptr @OF_BAD_ADDR, align 8, !tbaa !9
%17 = icmp eq i64 %15, %16
br i1 %17, label %18, label %21
18: ; preds = %14
%19 = load i32, ptr @EINVAL, align 4, !tbaa !5
%20 = sub nsw i32 0, %19
br label %36
21: ; preds = %14
%22 = tail call i32 @memset(ptr noundef %4, i32 noundef 0, i32 noundef 24) #2
%23 = load i32, ptr @IORESOURCE_IO, align 4, !tbaa !5
%24 = and i32 %23, %3
%25 = icmp eq i32 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %21
%27 = load i32, ptr @EINVAL, align 4, !tbaa !5
%28 = sub nsw i32 0, %27
br label %36
29: ; preds = %21
store i64 %15, ptr %4, align 8, !tbaa !11
%30 = add i64 %2, -1
%31 = add i64 %30, %15
%32 = getelementptr inbounds %struct.resource, ptr %4, i64 0, i32 3
store i64 %31, ptr %32, align 8, !tbaa !13
%33 = getelementptr inbounds %struct.resource, ptr %4, i64 0, i32 1
store i32 %3, ptr %33, align 8, !tbaa !14
%34 = load i32, ptr %0, align 4, !tbaa !15
%35 = getelementptr inbounds %struct.resource, ptr %4, i64 0, i32 2
store i32 %34, ptr %35, align 4, !tbaa !17
br label %36
36: ; preds = %26, %29, %18, %11
%37 = phi i32 [ %13, %11 ], [ %20, %18 ], [ 0, %29 ], [ %28, %26 ]
ret i32 %37
}
declare i64 @of_translate_address(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"resource", !10, i64 0, !6, i64 8, !6, i64 12, !10, i64 16}
!13 = !{!12, !10, i64 16}
!14 = !{!12, !6, i64 8}
!15 = !{!16, !6, i64 0}
!16 = !{!"device_node", !6, i64 0}
!17 = !{!12, !6, i64 12}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/microblaze/kernel/extr_prom_parse.c___of_address_to_resource.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/microblaze/kernel/extr_prom_parse.c___of_address_to_resource.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IORESOURCE_IO = common local_unnamed_addr global i32 0, align 4
@IORESOURCE_MEM = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@OF_BAD_ADDR = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @__of_address_to_resource], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @__of_address_to_resource(ptr noundef %0, ptr noundef %1, i64 noundef %2, i32 noundef %3, ptr noundef %4) #0 {
%6 = load i32, ptr @IORESOURCE_IO, align 4, !tbaa !6
%7 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !6
%8 = or i32 %7, %6
%9 = and i32 %8, %3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %5
%12 = load i32, ptr @EINVAL, align 4, !tbaa !6
%13 = sub nsw i32 0, %12
br label %36
14: ; preds = %5
%15 = tail call i64 @of_translate_address(ptr noundef %0, ptr noundef %1) #2
%16 = load i64, ptr @OF_BAD_ADDR, align 8, !tbaa !10
%17 = icmp eq i64 %15, %16
br i1 %17, label %18, label %21
18: ; preds = %14
%19 = load i32, ptr @EINVAL, align 4, !tbaa !6
%20 = sub nsw i32 0, %19
br label %36
21: ; preds = %14
%22 = tail call i32 @memset(ptr noundef %4, i32 noundef 0, i32 noundef 24) #2
%23 = load i32, ptr @IORESOURCE_IO, align 4, !tbaa !6
%24 = and i32 %23, %3
%25 = icmp eq i32 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %21
%27 = load i32, ptr @EINVAL, align 4, !tbaa !6
%28 = sub nsw i32 0, %27
br label %36
29: ; preds = %21
store i64 %15, ptr %4, align 8, !tbaa !12
%30 = add i64 %2, -1
%31 = add i64 %30, %15
%32 = getelementptr inbounds i8, ptr %4, i64 16
store i64 %31, ptr %32, align 8, !tbaa !14
%33 = getelementptr inbounds i8, ptr %4, i64 8
store i32 %3, ptr %33, align 8, !tbaa !15
%34 = load i32, ptr %0, align 4, !tbaa !16
%35 = getelementptr inbounds i8, ptr %4, i64 12
store i32 %34, ptr %35, align 4, !tbaa !18
br label %36
36: ; preds = %26, %29, %18, %11
%37 = phi i32 [ %13, %11 ], [ %20, %18 ], [ 0, %29 ], [ %28, %26 ]
ret i32 %37
}
declare i64 @of_translate_address(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"resource", !11, i64 0, !7, i64 8, !7, i64 12, !11, i64 16}
!14 = !{!13, !11, i64 16}
!15 = !{!13, !7, i64 8}
!16 = !{!17, !7, i64 0}
!17 = !{!"device_node", !7, i64 0}
!18 = !{!13, !7, i64 12}
|
fastsocket_kernel_arch_microblaze_kernel_extr_prom_parse.c___of_address_to_resource
|
; ModuleID = 'AnghaBench/linux/fs/befs/extr_linuxvfs.c_befs_readpage.c'
source_filename = "AnghaBench/linux/fs/befs/extr_linuxvfs.c_befs_readpage.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@befs_get_block = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @befs_readpage], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @befs_readpage(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load i32, ptr @befs_get_block, align 4, !tbaa !5
%4 = tail call i32 @block_read_full_page(ptr noundef %1, i32 noundef %3) #2
ret i32 %4
}
declare i32 @block_read_full_page(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/fs/befs/extr_linuxvfs.c_befs_readpage.c'
source_filename = "AnghaBench/linux/fs/befs/extr_linuxvfs.c_befs_readpage.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@befs_get_block = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @befs_readpage], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @befs_readpage(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load i32, ptr @befs_get_block, align 4, !tbaa !6
%4 = tail call i32 @block_read_full_page(ptr noundef %1, i32 noundef %3) #2
ret i32 %4
}
declare i32 @block_read_full_page(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_fs_befs_extr_linuxvfs.c_befs_readpage
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/kernel/extr_asm-offsets.c_output_thread_fpu_defines.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/kernel/extr_asm-offsets.c_output_thread_fpu_defines.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32, ptr }
@THREAD_FPR0 = dso_local local_unnamed_addr global i32 0, align 4
@task_struct = dso_local local_unnamed_addr global i32 0, align 4
@thread = dso_local local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@THREAD_FPR1 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR2 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR3 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR4 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR5 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR6 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR7 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR8 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR9 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR10 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR11 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR12 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR13 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR14 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR15 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR16 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR17 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR18 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR19 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR20 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR21 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR22 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR23 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR24 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR25 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR26 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR27 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR28 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR29 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR30 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FPR31 = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_FCR31 = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @output_thread_fpu_defines() local_unnamed_addr #0 {
%1 = load i32, ptr @THREAD_FPR0, align 4, !tbaa !5
%2 = load i32, ptr @task_struct, align 4, !tbaa !5
%3 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i32 @OFFSET(i32 noundef %1, i32 noundef %2, i32 noundef %4) #2
%6 = load i32, ptr @THREAD_FPR1, align 4, !tbaa !5
%7 = load i32, ptr @task_struct, align 4, !tbaa !5
%8 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%9 = getelementptr inbounds i32, ptr %8, i64 1
%10 = load i32, ptr %9, align 4, !tbaa !5
%11 = tail call i32 @OFFSET(i32 noundef %6, i32 noundef %7, i32 noundef %10) #2
%12 = load i32, ptr @THREAD_FPR2, align 4, !tbaa !5
%13 = load i32, ptr @task_struct, align 4, !tbaa !5
%14 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%15 = getelementptr inbounds i32, ptr %14, i64 2
%16 = load i32, ptr %15, align 4, !tbaa !5
%17 = tail call i32 @OFFSET(i32 noundef %12, i32 noundef %13, i32 noundef %16) #2
%18 = load i32, ptr @THREAD_FPR3, align 4, !tbaa !5
%19 = load i32, ptr @task_struct, align 4, !tbaa !5
%20 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%21 = getelementptr inbounds i32, ptr %20, i64 3
%22 = load i32, ptr %21, align 4, !tbaa !5
%23 = tail call i32 @OFFSET(i32 noundef %18, i32 noundef %19, i32 noundef %22) #2
%24 = load i32, ptr @THREAD_FPR4, align 4, !tbaa !5
%25 = load i32, ptr @task_struct, align 4, !tbaa !5
%26 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%27 = getelementptr inbounds i32, ptr %26, i64 4
%28 = load i32, ptr %27, align 4, !tbaa !5
%29 = tail call i32 @OFFSET(i32 noundef %24, i32 noundef %25, i32 noundef %28) #2
%30 = load i32, ptr @THREAD_FPR5, align 4, !tbaa !5
%31 = load i32, ptr @task_struct, align 4, !tbaa !5
%32 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%33 = getelementptr inbounds i32, ptr %32, i64 5
%34 = load i32, ptr %33, align 4, !tbaa !5
%35 = tail call i32 @OFFSET(i32 noundef %30, i32 noundef %31, i32 noundef %34) #2
%36 = load i32, ptr @THREAD_FPR6, align 4, !tbaa !5
%37 = load i32, ptr @task_struct, align 4, !tbaa !5
%38 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%39 = getelementptr inbounds i32, ptr %38, i64 6
%40 = load i32, ptr %39, align 4, !tbaa !5
%41 = tail call i32 @OFFSET(i32 noundef %36, i32 noundef %37, i32 noundef %40) #2
%42 = load i32, ptr @THREAD_FPR7, align 4, !tbaa !5
%43 = load i32, ptr @task_struct, align 4, !tbaa !5
%44 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%45 = getelementptr inbounds i32, ptr %44, i64 7
%46 = load i32, ptr %45, align 4, !tbaa !5
%47 = tail call i32 @OFFSET(i32 noundef %42, i32 noundef %43, i32 noundef %46) #2
%48 = load i32, ptr @THREAD_FPR8, align 4, !tbaa !5
%49 = load i32, ptr @task_struct, align 4, !tbaa !5
%50 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%51 = getelementptr inbounds i32, ptr %50, i64 8
%52 = load i32, ptr %51, align 4, !tbaa !5
%53 = tail call i32 @OFFSET(i32 noundef %48, i32 noundef %49, i32 noundef %52) #2
%54 = load i32, ptr @THREAD_FPR9, align 4, !tbaa !5
%55 = load i32, ptr @task_struct, align 4, !tbaa !5
%56 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%57 = getelementptr inbounds i32, ptr %56, i64 9
%58 = load i32, ptr %57, align 4, !tbaa !5
%59 = tail call i32 @OFFSET(i32 noundef %54, i32 noundef %55, i32 noundef %58) #2
%60 = load i32, ptr @THREAD_FPR10, align 4, !tbaa !5
%61 = load i32, ptr @task_struct, align 4, !tbaa !5
%62 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%63 = getelementptr inbounds i32, ptr %62, i64 10
%64 = load i32, ptr %63, align 4, !tbaa !5
%65 = tail call i32 @OFFSET(i32 noundef %60, i32 noundef %61, i32 noundef %64) #2
%66 = load i32, ptr @THREAD_FPR11, align 4, !tbaa !5
%67 = load i32, ptr @task_struct, align 4, !tbaa !5
%68 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%69 = getelementptr inbounds i32, ptr %68, i64 11
%70 = load i32, ptr %69, align 4, !tbaa !5
%71 = tail call i32 @OFFSET(i32 noundef %66, i32 noundef %67, i32 noundef %70) #2
%72 = load i32, ptr @THREAD_FPR12, align 4, !tbaa !5
%73 = load i32, ptr @task_struct, align 4, !tbaa !5
%74 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%75 = getelementptr inbounds i32, ptr %74, i64 12
%76 = load i32, ptr %75, align 4, !tbaa !5
%77 = tail call i32 @OFFSET(i32 noundef %72, i32 noundef %73, i32 noundef %76) #2
%78 = load i32, ptr @THREAD_FPR13, align 4, !tbaa !5
%79 = load i32, ptr @task_struct, align 4, !tbaa !5
%80 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%81 = getelementptr inbounds i32, ptr %80, i64 13
%82 = load i32, ptr %81, align 4, !tbaa !5
%83 = tail call i32 @OFFSET(i32 noundef %78, i32 noundef %79, i32 noundef %82) #2
%84 = load i32, ptr @THREAD_FPR14, align 4, !tbaa !5
%85 = load i32, ptr @task_struct, align 4, !tbaa !5
%86 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%87 = getelementptr inbounds i32, ptr %86, i64 14
%88 = load i32, ptr %87, align 4, !tbaa !5
%89 = tail call i32 @OFFSET(i32 noundef %84, i32 noundef %85, i32 noundef %88) #2
%90 = load i32, ptr @THREAD_FPR15, align 4, !tbaa !5
%91 = load i32, ptr @task_struct, align 4, !tbaa !5
%92 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%93 = getelementptr inbounds i32, ptr %92, i64 15
%94 = load i32, ptr %93, align 4, !tbaa !5
%95 = tail call i32 @OFFSET(i32 noundef %90, i32 noundef %91, i32 noundef %94) #2
%96 = load i32, ptr @THREAD_FPR16, align 4, !tbaa !5
%97 = load i32, ptr @task_struct, align 4, !tbaa !5
%98 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%99 = getelementptr inbounds i32, ptr %98, i64 16
%100 = load i32, ptr %99, align 4, !tbaa !5
%101 = tail call i32 @OFFSET(i32 noundef %96, i32 noundef %97, i32 noundef %100) #2
%102 = load i32, ptr @THREAD_FPR17, align 4, !tbaa !5
%103 = load i32, ptr @task_struct, align 4, !tbaa !5
%104 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%105 = getelementptr inbounds i32, ptr %104, i64 17
%106 = load i32, ptr %105, align 4, !tbaa !5
%107 = tail call i32 @OFFSET(i32 noundef %102, i32 noundef %103, i32 noundef %106) #2
%108 = load i32, ptr @THREAD_FPR18, align 4, !tbaa !5
%109 = load i32, ptr @task_struct, align 4, !tbaa !5
%110 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%111 = getelementptr inbounds i32, ptr %110, i64 18
%112 = load i32, ptr %111, align 4, !tbaa !5
%113 = tail call i32 @OFFSET(i32 noundef %108, i32 noundef %109, i32 noundef %112) #2
%114 = load i32, ptr @THREAD_FPR19, align 4, !tbaa !5
%115 = load i32, ptr @task_struct, align 4, !tbaa !5
%116 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%117 = getelementptr inbounds i32, ptr %116, i64 19
%118 = load i32, ptr %117, align 4, !tbaa !5
%119 = tail call i32 @OFFSET(i32 noundef %114, i32 noundef %115, i32 noundef %118) #2
%120 = load i32, ptr @THREAD_FPR20, align 4, !tbaa !5
%121 = load i32, ptr @task_struct, align 4, !tbaa !5
%122 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%123 = getelementptr inbounds i32, ptr %122, i64 20
%124 = load i32, ptr %123, align 4, !tbaa !5
%125 = tail call i32 @OFFSET(i32 noundef %120, i32 noundef %121, i32 noundef %124) #2
%126 = load i32, ptr @THREAD_FPR21, align 4, !tbaa !5
%127 = load i32, ptr @task_struct, align 4, !tbaa !5
%128 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%129 = getelementptr inbounds i32, ptr %128, i64 21
%130 = load i32, ptr %129, align 4, !tbaa !5
%131 = tail call i32 @OFFSET(i32 noundef %126, i32 noundef %127, i32 noundef %130) #2
%132 = load i32, ptr @THREAD_FPR22, align 4, !tbaa !5
%133 = load i32, ptr @task_struct, align 4, !tbaa !5
%134 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%135 = getelementptr inbounds i32, ptr %134, i64 22
%136 = load i32, ptr %135, align 4, !tbaa !5
%137 = tail call i32 @OFFSET(i32 noundef %132, i32 noundef %133, i32 noundef %136) #2
%138 = load i32, ptr @THREAD_FPR23, align 4, !tbaa !5
%139 = load i32, ptr @task_struct, align 4, !tbaa !5
%140 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%141 = getelementptr inbounds i32, ptr %140, i64 23
%142 = load i32, ptr %141, align 4, !tbaa !5
%143 = tail call i32 @OFFSET(i32 noundef %138, i32 noundef %139, i32 noundef %142) #2
%144 = load i32, ptr @THREAD_FPR24, align 4, !tbaa !5
%145 = load i32, ptr @task_struct, align 4, !tbaa !5
%146 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%147 = getelementptr inbounds i32, ptr %146, i64 24
%148 = load i32, ptr %147, align 4, !tbaa !5
%149 = tail call i32 @OFFSET(i32 noundef %144, i32 noundef %145, i32 noundef %148) #2
%150 = load i32, ptr @THREAD_FPR25, align 4, !tbaa !5
%151 = load i32, ptr @task_struct, align 4, !tbaa !5
%152 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%153 = getelementptr inbounds i32, ptr %152, i64 25
%154 = load i32, ptr %153, align 4, !tbaa !5
%155 = tail call i32 @OFFSET(i32 noundef %150, i32 noundef %151, i32 noundef %154) #2
%156 = load i32, ptr @THREAD_FPR26, align 4, !tbaa !5
%157 = load i32, ptr @task_struct, align 4, !tbaa !5
%158 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%159 = getelementptr inbounds i32, ptr %158, i64 26
%160 = load i32, ptr %159, align 4, !tbaa !5
%161 = tail call i32 @OFFSET(i32 noundef %156, i32 noundef %157, i32 noundef %160) #2
%162 = load i32, ptr @THREAD_FPR27, align 4, !tbaa !5
%163 = load i32, ptr @task_struct, align 4, !tbaa !5
%164 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%165 = getelementptr inbounds i32, ptr %164, i64 27
%166 = load i32, ptr %165, align 4, !tbaa !5
%167 = tail call i32 @OFFSET(i32 noundef %162, i32 noundef %163, i32 noundef %166) #2
%168 = load i32, ptr @THREAD_FPR28, align 4, !tbaa !5
%169 = load i32, ptr @task_struct, align 4, !tbaa !5
%170 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%171 = getelementptr inbounds i32, ptr %170, i64 28
%172 = load i32, ptr %171, align 4, !tbaa !5
%173 = tail call i32 @OFFSET(i32 noundef %168, i32 noundef %169, i32 noundef %172) #2
%174 = load i32, ptr @THREAD_FPR29, align 4, !tbaa !5
%175 = load i32, ptr @task_struct, align 4, !tbaa !5
%176 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%177 = getelementptr inbounds i32, ptr %176, i64 29
%178 = load i32, ptr %177, align 4, !tbaa !5
%179 = tail call i32 @OFFSET(i32 noundef %174, i32 noundef %175, i32 noundef %178) #2
%180 = load i32, ptr @THREAD_FPR30, align 4, !tbaa !5
%181 = load i32, ptr @task_struct, align 4, !tbaa !5
%182 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%183 = getelementptr inbounds i32, ptr %182, i64 30
%184 = load i32, ptr %183, align 4, !tbaa !5
%185 = tail call i32 @OFFSET(i32 noundef %180, i32 noundef %181, i32 noundef %184) #2
%186 = load i32, ptr @THREAD_FPR31, align 4, !tbaa !5
%187 = load i32, ptr @task_struct, align 4, !tbaa !5
%188 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @thread, i64 0, i32 0, i32 1), align 8, !tbaa !9
%189 = getelementptr inbounds i32, ptr %188, i64 31
%190 = load i32, ptr %189, align 4, !tbaa !5
%191 = tail call i32 @OFFSET(i32 noundef %186, i32 noundef %187, i32 noundef %190) #2
%192 = load i32, ptr @THREAD_FCR31, align 4, !tbaa !5
%193 = load i32, ptr @task_struct, align 4, !tbaa !5
%194 = load i32, ptr @thread, align 8, !tbaa !13
%195 = tail call i32 @OFFSET(i32 noundef %192, i32 noundef %193, i32 noundef %194) #2
%196 = tail call i32 (...) @BLANK() #2
ret void
}
declare i32 @OFFSET(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BLANK(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"TYPE_4__", !11, i64 0}
!11 = !{!"TYPE_3__", !6, i64 0, !12, i64 8}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !6, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/kernel/extr_asm-offsets.c_output_thread_fpu_defines.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/kernel/extr_asm-offsets.c_output_thread_fpu_defines.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32, ptr }
@THREAD_FPR0 = common local_unnamed_addr global i32 0, align 4
@task_struct = common local_unnamed_addr global i32 0, align 4
@thread = common local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@THREAD_FPR1 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR2 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR3 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR4 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR5 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR6 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR7 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR8 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR9 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR10 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR11 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR12 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR13 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR14 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR15 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR16 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR17 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR18 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR19 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR20 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR21 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR22 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR23 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR24 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR25 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR26 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR27 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR28 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR29 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR30 = common local_unnamed_addr global i32 0, align 4
@THREAD_FPR31 = common local_unnamed_addr global i32 0, align 4
@THREAD_FCR31 = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @output_thread_fpu_defines() local_unnamed_addr #0 {
%1 = load i32, ptr @THREAD_FPR0, align 4, !tbaa !6
%2 = load i32, ptr @task_struct, align 4, !tbaa !6
%3 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @OFFSET(i32 noundef %1, i32 noundef %2, i32 noundef %4) #2
%6 = load i32, ptr @THREAD_FPR1, align 4, !tbaa !6
%7 = load i32, ptr @task_struct, align 4, !tbaa !6
%8 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%9 = getelementptr inbounds i8, ptr %8, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !6
%11 = tail call i32 @OFFSET(i32 noundef %6, i32 noundef %7, i32 noundef %10) #2
%12 = load i32, ptr @THREAD_FPR2, align 4, !tbaa !6
%13 = load i32, ptr @task_struct, align 4, !tbaa !6
%14 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%15 = getelementptr inbounds i8, ptr %14, i64 8
%16 = load i32, ptr %15, align 4, !tbaa !6
%17 = tail call i32 @OFFSET(i32 noundef %12, i32 noundef %13, i32 noundef %16) #2
%18 = load i32, ptr @THREAD_FPR3, align 4, !tbaa !6
%19 = load i32, ptr @task_struct, align 4, !tbaa !6
%20 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%21 = getelementptr inbounds i8, ptr %20, i64 12
%22 = load i32, ptr %21, align 4, !tbaa !6
%23 = tail call i32 @OFFSET(i32 noundef %18, i32 noundef %19, i32 noundef %22) #2
%24 = load i32, ptr @THREAD_FPR4, align 4, !tbaa !6
%25 = load i32, ptr @task_struct, align 4, !tbaa !6
%26 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%27 = getelementptr inbounds i8, ptr %26, i64 16
%28 = load i32, ptr %27, align 4, !tbaa !6
%29 = tail call i32 @OFFSET(i32 noundef %24, i32 noundef %25, i32 noundef %28) #2
%30 = load i32, ptr @THREAD_FPR5, align 4, !tbaa !6
%31 = load i32, ptr @task_struct, align 4, !tbaa !6
%32 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%33 = getelementptr inbounds i8, ptr %32, i64 20
%34 = load i32, ptr %33, align 4, !tbaa !6
%35 = tail call i32 @OFFSET(i32 noundef %30, i32 noundef %31, i32 noundef %34) #2
%36 = load i32, ptr @THREAD_FPR6, align 4, !tbaa !6
%37 = load i32, ptr @task_struct, align 4, !tbaa !6
%38 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%39 = getelementptr inbounds i8, ptr %38, i64 24
%40 = load i32, ptr %39, align 4, !tbaa !6
%41 = tail call i32 @OFFSET(i32 noundef %36, i32 noundef %37, i32 noundef %40) #2
%42 = load i32, ptr @THREAD_FPR7, align 4, !tbaa !6
%43 = load i32, ptr @task_struct, align 4, !tbaa !6
%44 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%45 = getelementptr inbounds i8, ptr %44, i64 28
%46 = load i32, ptr %45, align 4, !tbaa !6
%47 = tail call i32 @OFFSET(i32 noundef %42, i32 noundef %43, i32 noundef %46) #2
%48 = load i32, ptr @THREAD_FPR8, align 4, !tbaa !6
%49 = load i32, ptr @task_struct, align 4, !tbaa !6
%50 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%51 = getelementptr inbounds i8, ptr %50, i64 32
%52 = load i32, ptr %51, align 4, !tbaa !6
%53 = tail call i32 @OFFSET(i32 noundef %48, i32 noundef %49, i32 noundef %52) #2
%54 = load i32, ptr @THREAD_FPR9, align 4, !tbaa !6
%55 = load i32, ptr @task_struct, align 4, !tbaa !6
%56 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%57 = getelementptr inbounds i8, ptr %56, i64 36
%58 = load i32, ptr %57, align 4, !tbaa !6
%59 = tail call i32 @OFFSET(i32 noundef %54, i32 noundef %55, i32 noundef %58) #2
%60 = load i32, ptr @THREAD_FPR10, align 4, !tbaa !6
%61 = load i32, ptr @task_struct, align 4, !tbaa !6
%62 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%63 = getelementptr inbounds i8, ptr %62, i64 40
%64 = load i32, ptr %63, align 4, !tbaa !6
%65 = tail call i32 @OFFSET(i32 noundef %60, i32 noundef %61, i32 noundef %64) #2
%66 = load i32, ptr @THREAD_FPR11, align 4, !tbaa !6
%67 = load i32, ptr @task_struct, align 4, !tbaa !6
%68 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%69 = getelementptr inbounds i8, ptr %68, i64 44
%70 = load i32, ptr %69, align 4, !tbaa !6
%71 = tail call i32 @OFFSET(i32 noundef %66, i32 noundef %67, i32 noundef %70) #2
%72 = load i32, ptr @THREAD_FPR12, align 4, !tbaa !6
%73 = load i32, ptr @task_struct, align 4, !tbaa !6
%74 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%75 = getelementptr inbounds i8, ptr %74, i64 48
%76 = load i32, ptr %75, align 4, !tbaa !6
%77 = tail call i32 @OFFSET(i32 noundef %72, i32 noundef %73, i32 noundef %76) #2
%78 = load i32, ptr @THREAD_FPR13, align 4, !tbaa !6
%79 = load i32, ptr @task_struct, align 4, !tbaa !6
%80 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%81 = getelementptr inbounds i8, ptr %80, i64 52
%82 = load i32, ptr %81, align 4, !tbaa !6
%83 = tail call i32 @OFFSET(i32 noundef %78, i32 noundef %79, i32 noundef %82) #2
%84 = load i32, ptr @THREAD_FPR14, align 4, !tbaa !6
%85 = load i32, ptr @task_struct, align 4, !tbaa !6
%86 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%87 = getelementptr inbounds i8, ptr %86, i64 56
%88 = load i32, ptr %87, align 4, !tbaa !6
%89 = tail call i32 @OFFSET(i32 noundef %84, i32 noundef %85, i32 noundef %88) #2
%90 = load i32, ptr @THREAD_FPR15, align 4, !tbaa !6
%91 = load i32, ptr @task_struct, align 4, !tbaa !6
%92 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%93 = getelementptr inbounds i8, ptr %92, i64 60
%94 = load i32, ptr %93, align 4, !tbaa !6
%95 = tail call i32 @OFFSET(i32 noundef %90, i32 noundef %91, i32 noundef %94) #2
%96 = load i32, ptr @THREAD_FPR16, align 4, !tbaa !6
%97 = load i32, ptr @task_struct, align 4, !tbaa !6
%98 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%99 = getelementptr inbounds i8, ptr %98, i64 64
%100 = load i32, ptr %99, align 4, !tbaa !6
%101 = tail call i32 @OFFSET(i32 noundef %96, i32 noundef %97, i32 noundef %100) #2
%102 = load i32, ptr @THREAD_FPR17, align 4, !tbaa !6
%103 = load i32, ptr @task_struct, align 4, !tbaa !6
%104 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%105 = getelementptr inbounds i8, ptr %104, i64 68
%106 = load i32, ptr %105, align 4, !tbaa !6
%107 = tail call i32 @OFFSET(i32 noundef %102, i32 noundef %103, i32 noundef %106) #2
%108 = load i32, ptr @THREAD_FPR18, align 4, !tbaa !6
%109 = load i32, ptr @task_struct, align 4, !tbaa !6
%110 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%111 = getelementptr inbounds i8, ptr %110, i64 72
%112 = load i32, ptr %111, align 4, !tbaa !6
%113 = tail call i32 @OFFSET(i32 noundef %108, i32 noundef %109, i32 noundef %112) #2
%114 = load i32, ptr @THREAD_FPR19, align 4, !tbaa !6
%115 = load i32, ptr @task_struct, align 4, !tbaa !6
%116 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%117 = getelementptr inbounds i8, ptr %116, i64 76
%118 = load i32, ptr %117, align 4, !tbaa !6
%119 = tail call i32 @OFFSET(i32 noundef %114, i32 noundef %115, i32 noundef %118) #2
%120 = load i32, ptr @THREAD_FPR20, align 4, !tbaa !6
%121 = load i32, ptr @task_struct, align 4, !tbaa !6
%122 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%123 = getelementptr inbounds i8, ptr %122, i64 80
%124 = load i32, ptr %123, align 4, !tbaa !6
%125 = tail call i32 @OFFSET(i32 noundef %120, i32 noundef %121, i32 noundef %124) #2
%126 = load i32, ptr @THREAD_FPR21, align 4, !tbaa !6
%127 = load i32, ptr @task_struct, align 4, !tbaa !6
%128 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%129 = getelementptr inbounds i8, ptr %128, i64 84
%130 = load i32, ptr %129, align 4, !tbaa !6
%131 = tail call i32 @OFFSET(i32 noundef %126, i32 noundef %127, i32 noundef %130) #2
%132 = load i32, ptr @THREAD_FPR22, align 4, !tbaa !6
%133 = load i32, ptr @task_struct, align 4, !tbaa !6
%134 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%135 = getelementptr inbounds i8, ptr %134, i64 88
%136 = load i32, ptr %135, align 4, !tbaa !6
%137 = tail call i32 @OFFSET(i32 noundef %132, i32 noundef %133, i32 noundef %136) #2
%138 = load i32, ptr @THREAD_FPR23, align 4, !tbaa !6
%139 = load i32, ptr @task_struct, align 4, !tbaa !6
%140 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%141 = getelementptr inbounds i8, ptr %140, i64 92
%142 = load i32, ptr %141, align 4, !tbaa !6
%143 = tail call i32 @OFFSET(i32 noundef %138, i32 noundef %139, i32 noundef %142) #2
%144 = load i32, ptr @THREAD_FPR24, align 4, !tbaa !6
%145 = load i32, ptr @task_struct, align 4, !tbaa !6
%146 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%147 = getelementptr inbounds i8, ptr %146, i64 96
%148 = load i32, ptr %147, align 4, !tbaa !6
%149 = tail call i32 @OFFSET(i32 noundef %144, i32 noundef %145, i32 noundef %148) #2
%150 = load i32, ptr @THREAD_FPR25, align 4, !tbaa !6
%151 = load i32, ptr @task_struct, align 4, !tbaa !6
%152 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%153 = getelementptr inbounds i8, ptr %152, i64 100
%154 = load i32, ptr %153, align 4, !tbaa !6
%155 = tail call i32 @OFFSET(i32 noundef %150, i32 noundef %151, i32 noundef %154) #2
%156 = load i32, ptr @THREAD_FPR26, align 4, !tbaa !6
%157 = load i32, ptr @task_struct, align 4, !tbaa !6
%158 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%159 = getelementptr inbounds i8, ptr %158, i64 104
%160 = load i32, ptr %159, align 4, !tbaa !6
%161 = tail call i32 @OFFSET(i32 noundef %156, i32 noundef %157, i32 noundef %160) #2
%162 = load i32, ptr @THREAD_FPR27, align 4, !tbaa !6
%163 = load i32, ptr @task_struct, align 4, !tbaa !6
%164 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%165 = getelementptr inbounds i8, ptr %164, i64 108
%166 = load i32, ptr %165, align 4, !tbaa !6
%167 = tail call i32 @OFFSET(i32 noundef %162, i32 noundef %163, i32 noundef %166) #2
%168 = load i32, ptr @THREAD_FPR28, align 4, !tbaa !6
%169 = load i32, ptr @task_struct, align 4, !tbaa !6
%170 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%171 = getelementptr inbounds i8, ptr %170, i64 112
%172 = load i32, ptr %171, align 4, !tbaa !6
%173 = tail call i32 @OFFSET(i32 noundef %168, i32 noundef %169, i32 noundef %172) #2
%174 = load i32, ptr @THREAD_FPR29, align 4, !tbaa !6
%175 = load i32, ptr @task_struct, align 4, !tbaa !6
%176 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%177 = getelementptr inbounds i8, ptr %176, i64 116
%178 = load i32, ptr %177, align 4, !tbaa !6
%179 = tail call i32 @OFFSET(i32 noundef %174, i32 noundef %175, i32 noundef %178) #2
%180 = load i32, ptr @THREAD_FPR30, align 4, !tbaa !6
%181 = load i32, ptr @task_struct, align 4, !tbaa !6
%182 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%183 = getelementptr inbounds i8, ptr %182, i64 120
%184 = load i32, ptr %183, align 4, !tbaa !6
%185 = tail call i32 @OFFSET(i32 noundef %180, i32 noundef %181, i32 noundef %184) #2
%186 = load i32, ptr @THREAD_FPR31, align 4, !tbaa !6
%187 = load i32, ptr @task_struct, align 4, !tbaa !6
%188 = load ptr, ptr getelementptr inbounds (i8, ptr @thread, i64 8), align 8, !tbaa !10
%189 = getelementptr inbounds i8, ptr %188, i64 124
%190 = load i32, ptr %189, align 4, !tbaa !6
%191 = tail call i32 @OFFSET(i32 noundef %186, i32 noundef %187, i32 noundef %190) #2
%192 = load i32, ptr @THREAD_FCR31, align 4, !tbaa !6
%193 = load i32, ptr @task_struct, align 4, !tbaa !6
%194 = load i32, ptr @thread, align 8, !tbaa !14
%195 = tail call i32 @OFFSET(i32 noundef %192, i32 noundef %193, i32 noundef %194) #2
%196 = tail call i32 @BLANK() #2
ret void
}
declare i32 @OFFSET(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BLANK(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !7, i64 0, !13, i64 8}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !7, i64 0}
|
fastsocket_kernel_arch_mips_kernel_extr_asm-offsets.c_output_thread_fpu_defines
|
; ModuleID = 'AnghaBench/freebsd/sys/security/mac_test/extr_mac_test.c_test_bpfdesc_destroy_label.c'
source_filename = "AnghaBench/freebsd/sys/security/mac_test/extr_mac_test.c_test_bpfdesc_destroy_label.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MAGIC_BPF = dso_local local_unnamed_addr global i32 0, align 4
@bpfdesc_destroy_label = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @test_bpfdesc_destroy_label], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @test_bpfdesc_destroy_label(ptr noundef %0) #0 {
%2 = load i32, ptr @MAGIC_BPF, align 4, !tbaa !5
%3 = tail call i32 @LABEL_DESTROY(ptr noundef %0, i32 noundef %2) #2
%4 = load i32, ptr @bpfdesc_destroy_label, align 4, !tbaa !5
%5 = tail call i32 @COUNTER_INC(i32 noundef %4) #2
ret void
}
declare i32 @LABEL_DESTROY(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @COUNTER_INC(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/sys/security/mac_test/extr_mac_test.c_test_bpfdesc_destroy_label.c'
source_filename = "AnghaBench/freebsd/sys/security/mac_test/extr_mac_test.c_test_bpfdesc_destroy_label.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAGIC_BPF = common local_unnamed_addr global i32 0, align 4
@bpfdesc_destroy_label = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @test_bpfdesc_destroy_label], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @test_bpfdesc_destroy_label(ptr noundef %0) #0 {
%2 = load i32, ptr @MAGIC_BPF, align 4, !tbaa !6
%3 = tail call i32 @LABEL_DESTROY(ptr noundef %0, i32 noundef %2) #2
%4 = load i32, ptr @bpfdesc_destroy_label, align 4, !tbaa !6
%5 = tail call i32 @COUNTER_INC(i32 noundef %4) #2
ret void
}
declare i32 @LABEL_DESTROY(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @COUNTER_INC(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_sys_security_mac_test_extr_mac_test.c_test_bpfdesc_destroy_label
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/tegra/extr_dsi.c_tegra_dsi_setup_clocks.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/tegra/extr_dsi.c_tegra_dsi_setup_clocks.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.tegra_dsi = type { i32, i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @tegra_dsi_setup_clocks], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @tegra_dsi_setup_clocks(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.tegra_dsi, ptr %0, i64 0, i32 1
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = tail call ptr @clk_get_parent(i32 noundef %3) #3
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, ptr @EINVAL, align 4, !tbaa !10
%8 = sub nsw i32 0, %7
br label %13
9: ; preds = %1
%10 = load i32, ptr %0, align 4, !tbaa !11
%11 = tail call i32 @clk_set_parent(ptr noundef nonnull %4, i32 noundef %10) #3
%12 = tail call i32 @llvm.smin.i32(i32 %11, i32 0)
br label %13
13: ; preds = %9, %6
%14 = phi i32 [ %8, %6 ], [ %12, %9 ]
ret i32 %14
}
declare ptr @clk_get_parent(i32 noundef) local_unnamed_addr #1
declare i32 @clk_set_parent(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"tegra_dsi", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/tegra/extr_dsi.c_tegra_dsi_setup_clocks.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/tegra/extr_dsi.c_tegra_dsi_setup_clocks.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tegra_dsi_setup_clocks], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @tegra_dsi_setup_clocks(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = tail call ptr @clk_get_parent(i32 noundef %3) #3
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, ptr @EINVAL, align 4, !tbaa !11
%8 = sub nsw i32 0, %7
br label %13
9: ; preds = %1
%10 = load i32, ptr %0, align 4, !tbaa !12
%11 = tail call i32 @clk_set_parent(ptr noundef nonnull %4, i32 noundef %10) #3
%12 = tail call i32 @llvm.smin.i32(i32 %11, i32 0)
br label %13
13: ; preds = %9, %6
%14 = phi i32 [ %8, %6 ], [ %12, %9 ]
ret i32 %14
}
declare ptr @clk_get_parent(i32 noundef) local_unnamed_addr #1
declare i32 @clk_set_parent(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"tegra_dsi", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 0}
|
linux_drivers_gpu_drm_tegra_extr_dsi.c_tegra_dsi_setup_clocks
|
; ModuleID = 'AnghaBench/sway/sway/desktop/extr_render.c_render_containers.c'
source_filename = "AnghaBench/sway/sway/desktop/extr_render.c_render_containers.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.parent_data = type { i32, ptr }
%struct.TYPE_3__ = type { i32, ptr }
@config = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @render_containers], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @render_containers(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load ptr, ptr @config, align 8, !tbaa !5
%5 = load i64, ptr %4, align 8, !tbaa !9
%6 = icmp eq i64 %5, 0
br i1 %6, label %20, label %7
7: ; preds = %3
%8 = getelementptr inbounds %struct.parent_data, ptr %2, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = load i32, ptr %9, align 8, !tbaa !15
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %20
12: ; preds = %7
%13 = getelementptr inbounds %struct.TYPE_3__, ptr %9, i64 0, i32 1
%14 = load ptr, ptr %13, align 8, !tbaa !17
%15 = load ptr, ptr %14, align 8, !tbaa !5
%16 = load i64, ptr %15, align 8, !tbaa !18
%17 = icmp eq i64 %16, 0
br i1 %17, label %20, label %18
18: ; preds = %12
%19 = tail call i32 @render_containers_linear(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %2) #2
br label %28
20: ; preds = %12, %7, %3
%21 = load i32, ptr %2, align 8, !tbaa !20
switch i32 %21, label %28 [
i32 131, label %22
i32 132, label %22
i32 128, label %22
i32 130, label %24
i32 129, label %26
]
22: ; preds = %20, %20, %20
%23 = tail call i32 @render_containers_linear(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %2) #2
br label %28
24: ; preds = %20
%25 = tail call i32 @render_containers_stacked(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %2) #2
br label %28
26: ; preds = %20
%27 = tail call i32 @render_containers_tabbed(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %2) #2
br label %28
28: ; preds = %18, %20, %26, %24, %22
ret void
}
declare i32 @render_containers_linear(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @render_containers_stacked(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @render_containers_tabbed(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_4__", !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!13, !6, i64 8}
!13 = !{!"parent_data", !14, i64 0, !6, i64 8}
!14 = !{!"int", !7, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"TYPE_3__", !14, i64 0, !6, i64 8}
!17 = !{!16, !6, i64 8}
!18 = !{!19, !11, i64 0}
!19 = !{!"sway_container", !11, i64 0}
!20 = !{!13, !14, i64 0}
|
; ModuleID = 'AnghaBench/sway/sway/desktop/extr_render.c_render_containers.c'
source_filename = "AnghaBench/sway/sway/desktop/extr_render.c_render_containers.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@config = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @render_containers], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @render_containers(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load ptr, ptr @config, align 8, !tbaa !6
%5 = load i64, ptr %4, align 8, !tbaa !10
%6 = icmp eq i64 %5, 0
br i1 %6, label %20, label %7
7: ; preds = %3
%8 = getelementptr inbounds i8, ptr %2, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !13
%10 = load i32, ptr %9, align 8, !tbaa !16
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %20
12: ; preds = %7
%13 = getelementptr inbounds i8, ptr %9, i64 8
%14 = load ptr, ptr %13, align 8, !tbaa !18
%15 = load ptr, ptr %14, align 8, !tbaa !6
%16 = load i64, ptr %15, align 8, !tbaa !19
%17 = icmp eq i64 %16, 0
br i1 %17, label %20, label %18
18: ; preds = %12
%19 = tail call i32 @render_containers_linear(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %2) #2
br label %28
20: ; preds = %12, %7, %3
%21 = load i32, ptr %2, align 8, !tbaa !21
switch i32 %21, label %28 [
i32 131, label %22
i32 132, label %22
i32 128, label %22
i32 130, label %24
i32 129, label %26
]
22: ; preds = %20, %20, %20
%23 = tail call i32 @render_containers_linear(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %2) #2
br label %28
24: ; preds = %20
%25 = tail call i32 @render_containers_stacked(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %2) #2
br label %28
26: ; preds = %20
%27 = tail call i32 @render_containers_tabbed(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %2) #2
br label %28
28: ; preds = %18, %20, %26, %24, %22
ret void
}
declare i32 @render_containers_linear(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @render_containers_stacked(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @render_containers_tabbed(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!14, !7, i64 8}
!14 = !{!"parent_data", !15, i64 0, !7, i64 8}
!15 = !{!"int", !8, i64 0}
!16 = !{!17, !15, i64 0}
!17 = !{!"TYPE_3__", !15, i64 0, !7, i64 8}
!18 = !{!17, !7, i64 8}
!19 = !{!20, !12, i64 0}
!20 = !{!"sway_container", !12, i64 0}
!21 = !{!14, !15, i64 0}
|
sway_sway_desktop_extr_render.c_render_containers
|
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_amc6821.c_amc6821_probe.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_amc6821.c_amc6821_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.i2c_client = type { i32, %struct.device }
%struct.device = type { i32 }
%struct.amc6821_data = type { i32, ptr }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@amc6821_groups = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @amc6821_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @amc6821_probe(ptr noundef %0, ptr nocapture readnone %1) #0 {
%3 = getelementptr inbounds %struct.i2c_client, ptr %0, i64 0, i32 1
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%5 = tail call ptr @devm_kzalloc(ptr noundef nonnull %3, i32 noundef 16, i32 noundef %4) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%9 = sub nsw i32 0, %8
br label %20
10: ; preds = %2
%11 = getelementptr inbounds %struct.amc6821_data, ptr %5, i64 0, i32 1
store ptr %0, ptr %11, align 8, !tbaa !9
%12 = tail call i32 @mutex_init(ptr noundef nonnull %5) #2
%13 = tail call i32 @amc6821_init_client(ptr noundef %0) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %10
%16 = load i32, ptr %0, align 4, !tbaa !12
%17 = load i32, ptr @amc6821_groups, align 4, !tbaa !5
%18 = tail call ptr @devm_hwmon_device_register_with_groups(ptr noundef nonnull %3, i32 noundef %16, ptr noundef nonnull %5, i32 noundef %17) #2
%19 = tail call i32 @PTR_ERR_OR_ZERO(ptr noundef %18) #2
br label %20
20: ; preds = %10, %15, %7
%21 = phi i32 [ %19, %15 ], [ %9, %7 ], [ %13, %10 ]
ret i32 %21
}
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_init(ptr noundef) local_unnamed_addr #1
declare i32 @amc6821_init_client(ptr noundef) local_unnamed_addr #1
declare ptr @devm_hwmon_device_register_with_groups(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PTR_ERR_OR_ZERO(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"amc6821_data", !6, i64 0, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"i2c_client", !6, i64 0, !14, i64 4}
!14 = !{!"device", !6, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_amc6821.c_amc6821_probe.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_amc6821.c_amc6821_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@amc6821_groups = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @amc6821_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @amc6821_probe(ptr noundef %0, ptr nocapture readnone %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%5 = tail call ptr @devm_kzalloc(ptr noundef nonnull %3, i32 noundef 16, i32 noundef %4) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%9 = sub nsw i32 0, %8
br label %20
10: ; preds = %2
%11 = getelementptr inbounds i8, ptr %5, i64 8
store ptr %0, ptr %11, align 8, !tbaa !10
%12 = tail call i32 @mutex_init(ptr noundef nonnull %5) #2
%13 = tail call i32 @amc6821_init_client(ptr noundef %0) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %10
%16 = load i32, ptr %0, align 4, !tbaa !13
%17 = load i32, ptr @amc6821_groups, align 4, !tbaa !6
%18 = tail call ptr @devm_hwmon_device_register_with_groups(ptr noundef nonnull %3, i32 noundef %16, ptr noundef nonnull %5, i32 noundef %17) #2
%19 = tail call i32 @PTR_ERR_OR_ZERO(ptr noundef %18) #2
br label %20
20: ; preds = %10, %15, %7
%21 = phi i32 [ %19, %15 ], [ %9, %7 ], [ %13, %10 ]
ret i32 %21
}
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_init(ptr noundef) local_unnamed_addr #1
declare i32 @amc6821_init_client(ptr noundef) local_unnamed_addr #1
declare ptr @devm_hwmon_device_register_with_groups(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PTR_ERR_OR_ZERO(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"amc6821_data", !7, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"i2c_client", !7, i64 0, !15, i64 4}
!15 = !{!"device", !7, i64 0}
|
linux_drivers_hwmon_extr_amc6821.c_amc6821_probe
|
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_thinkpad_acpi.c_hotkey_init_tablet_mode.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_thinkpad_acpi.c_hotkey_init_tablet_mode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32 }
%struct.TYPE_4__ = type { i32 }
@hkey_handle = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [5 x i8] c"GMMS\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"qdd\00", align 1
@TP_HOTKEY_TABLET_USES_GMMS = dso_local local_unnamed_addr global i32 0, align 4
@tp_features = dso_local local_unnamed_addr global %struct.TYPE_3__ zeroinitializer, align 4
@.str.2 = private unnamed_addr constant [5 x i8] c"MHKG\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"qd\00", align 1
@TP_HOTKEY_TABLET_USES_MHKG = dso_local local_unnamed_addr global i32 0, align 4
@TP_HOTKEY_TABLET_MASK = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [59 x i8] c"Tablet mode switch found (type: %s), currently in %s mode\0A\00", align 1
@.str.5 = private unnamed_addr constant [7 x i8] c"tablet\00", align 1
@.str.6 = private unnamed_addr constant [7 x i8] c"laptop\00", align 1
@hotkey_dev_attributes = dso_local local_unnamed_addr global i32 0, align 4
@dev_attr_hotkey_tablet_mode = dso_local global %struct.TYPE_4__ zeroinitializer, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @hotkey_init_tablet_mode], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @hotkey_init_tablet_mode() #0 {
%1 = alloca i32, align 4
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%3 = load i32, ptr @hkey_handle, align 4, !tbaa !5
%4 = call i64 (i32, ptr, ptr, ptr, ...) @acpi_evalf(i32 noundef %3, ptr noundef nonnull %1, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 0) #3
%5 = icmp eq i64 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %0
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%7 = load i32, ptr %1, align 4, !tbaa !5
%8 = call i32 @hotkey_gmms_get_tablet_mode(i32 noundef %7, ptr noundef nonnull %2) #3
%9 = load i32, ptr %2, align 4, !tbaa !5
%10 = icmp eq i32 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %6
%12 = load i32, ptr @TP_HOTKEY_TABLET_USES_GMMS, align 4, !tbaa !5
store i32 %12, ptr @tp_features, align 4, !tbaa !9
br label %13
13: ; preds = %11, %6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %25
14: ; preds = %0
%15 = load i32, ptr @hkey_handle, align 4, !tbaa !5
%16 = call i64 (i32, ptr, ptr, ptr, ...) @acpi_evalf(i32 noundef %15, ptr noundef nonnull %1, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3) #3
%17 = icmp eq i64 %16, 0
br i1 %17, label %25, label %18
18: ; preds = %14
%19 = load i32, ptr @TP_HOTKEY_TABLET_USES_MHKG, align 4, !tbaa !5
store i32 %19, ptr @tp_features, align 4, !tbaa !9
%20 = load i32, ptr %1, align 4, !tbaa !5
%21 = load i32, ptr @TP_HOTKEY_TABLET_MASK, align 4, !tbaa !5
%22 = and i32 %21, %20
%23 = icmp ne i32 %22, 0
%24 = zext i1 %23 to i32
br label %25
25: ; preds = %14, %18, %13
%26 = phi i32 [ %8, %13 ], [ %24, %18 ], [ 0, %14 ]
%27 = phi ptr [ @.str, %13 ], [ @.str.2, %18 ], [ null, %14 ]
%28 = load i32, ptr @tp_features, align 4, !tbaa !9
%29 = icmp eq i32 %28, 0
br i1 %29, label %38, label %30
30: ; preds = %25
%31 = icmp eq i32 %26, 0
%32 = select i1 %31, ptr @.str.6, ptr @.str.5
%33 = call i32 @pr_info(ptr noundef nonnull @.str.4, ptr noundef %27, ptr noundef nonnull %32) #3
%34 = load i32, ptr @hotkey_dev_attributes, align 4, !tbaa !5
%35 = call i32 @add_to_attr_set(i32 noundef %34, ptr noundef nonnull @dev_attr_hotkey_tablet_mode) #3
%36 = icmp eq i32 %35, 0
%37 = select i1 %36, i32 %26, i32 -1
br label %38
38: ; preds = %30, %25
%39 = phi i32 [ 0, %25 ], [ %37, %30 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret i32 %39
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @acpi_evalf(i32 noundef, ptr noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #2
declare i32 @hotkey_gmms_get_tablet_mode(i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @pr_info(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @add_to_attr_set(i32 noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_3__", !6, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_thinkpad_acpi.c_hotkey_init_tablet_mode.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_thinkpad_acpi.c_hotkey_init_tablet_mode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i32 }
%struct.TYPE_4__ = type { i32 }
@hkey_handle = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [5 x i8] c"GMMS\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"qdd\00", align 1
@TP_HOTKEY_TABLET_USES_GMMS = common local_unnamed_addr global i32 0, align 4
@tp_features = common local_unnamed_addr global %struct.TYPE_3__ zeroinitializer, align 4
@.str.2 = private unnamed_addr constant [5 x i8] c"MHKG\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"qd\00", align 1
@TP_HOTKEY_TABLET_USES_MHKG = common local_unnamed_addr global i32 0, align 4
@TP_HOTKEY_TABLET_MASK = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [59 x i8] c"Tablet mode switch found (type: %s), currently in %s mode\0A\00", align 1
@.str.5 = private unnamed_addr constant [7 x i8] c"tablet\00", align 1
@.str.6 = private unnamed_addr constant [7 x i8] c"laptop\00", align 1
@hotkey_dev_attributes = common local_unnamed_addr global i32 0, align 4
@dev_attr_hotkey_tablet_mode = common global %struct.TYPE_4__ zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @hotkey_init_tablet_mode], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @hotkey_init_tablet_mode() #0 {
%1 = alloca i32, align 4
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%3 = load i32, ptr @hkey_handle, align 4, !tbaa !6
%4 = call i64 (i32, ptr, ptr, ptr, ...) @acpi_evalf(i32 noundef %3, ptr noundef nonnull %1, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 0) #3
%5 = icmp eq i64 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %0
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%7 = load i32, ptr %1, align 4, !tbaa !6
%8 = call i32 @hotkey_gmms_get_tablet_mode(i32 noundef %7, ptr noundef nonnull %2) #3
%9 = load i32, ptr %2, align 4, !tbaa !6
%10 = icmp eq i32 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %6
%12 = load i32, ptr @TP_HOTKEY_TABLET_USES_GMMS, align 4, !tbaa !6
store i32 %12, ptr @tp_features, align 4, !tbaa !10
br label %13
13: ; preds = %11, %6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %25
14: ; preds = %0
%15 = load i32, ptr @hkey_handle, align 4, !tbaa !6
%16 = call i64 (i32, ptr, ptr, ptr, ...) @acpi_evalf(i32 noundef %15, ptr noundef nonnull %1, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3) #3
%17 = icmp eq i64 %16, 0
br i1 %17, label %25, label %18
18: ; preds = %14
%19 = load i32, ptr @TP_HOTKEY_TABLET_USES_MHKG, align 4, !tbaa !6
store i32 %19, ptr @tp_features, align 4, !tbaa !10
%20 = load i32, ptr %1, align 4, !tbaa !6
%21 = load i32, ptr @TP_HOTKEY_TABLET_MASK, align 4, !tbaa !6
%22 = and i32 %21, %20
%23 = icmp ne i32 %22, 0
%24 = zext i1 %23 to i32
br label %25
25: ; preds = %14, %18, %13
%26 = phi i32 [ %8, %13 ], [ %24, %18 ], [ 0, %14 ]
%27 = phi ptr [ @.str, %13 ], [ @.str.2, %18 ], [ null, %14 ]
%28 = load i32, ptr @tp_features, align 4, !tbaa !10
%29 = icmp eq i32 %28, 0
br i1 %29, label %38, label %30
30: ; preds = %25
%31 = icmp eq i32 %26, 0
%32 = select i1 %31, ptr @.str.6, ptr @.str.5
%33 = call i32 @pr_info(ptr noundef nonnull @.str.4, ptr noundef %27, ptr noundef nonnull %32) #3
%34 = load i32, ptr @hotkey_dev_attributes, align 4, !tbaa !6
%35 = call i32 @add_to_attr_set(i32 noundef %34, ptr noundef nonnull @dev_attr_hotkey_tablet_mode) #3
%36 = icmp eq i32 %35, 0
%37 = select i1 %36, i32 %26, i32 -1
br label %38
38: ; preds = %30, %25
%39 = phi i32 [ 0, %25 ], [ %37, %30 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret i32 %39
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @acpi_evalf(i32 noundef, ptr noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #2
declare i32 @hotkey_gmms_get_tablet_mode(i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @pr_info(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @add_to_attr_set(i32 noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_3__", !7, i64 0}
|
linux_drivers_platform_x86_extr_thinkpad_acpi.c_hotkey_init_tablet_mode
|
; ModuleID = 'AnghaBench/git/extr_sequencer.c_update_abort_safety_file.c'
source_filename = "AnghaBench/git/extr_sequencer.c_update_abort_safety_file.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.object_id = type { i32 }
@.str = private unnamed_addr constant [5 x i8] c"HEAD\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@.str.2 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @update_abort_safety_file], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @update_abort_safety_file() #0 {
%1 = alloca %struct.object_id, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%2 = tail call i32 (...) @git_path_seq_dir() #3
%3 = tail call i32 @file_exists(i32 noundef %2) #3
%4 = icmp eq i32 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %0
%6 = call i32 @get_oid(ptr noundef nonnull @.str, ptr noundef nonnull %1) #3
%7 = icmp eq i32 %6, 0
%8 = call i32 (...) @git_path_abort_safety_file() #3
br i1 %7, label %9, label %12
9: ; preds = %5
%10 = call ptr @oid_to_hex(ptr noundef nonnull %1) #3
%11 = call i32 @write_file(i32 noundef %8, ptr noundef nonnull @.str.1, ptr noundef %10) #3
br label %14
12: ; preds = %5
%13 = call i32 @write_file(i32 noundef %8, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2) #3
br label %14
14: ; preds = %9, %12, %0
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @file_exists(i32 noundef) local_unnamed_addr #2
declare i32 @git_path_seq_dir(...) local_unnamed_addr #2
declare i32 @get_oid(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @write_file(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @git_path_abort_safety_file(...) local_unnamed_addr #2
declare ptr @oid_to_hex(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/git/extr_sequencer.c_update_abort_safety_file.c'
source_filename = "AnghaBench/git/extr_sequencer.c_update_abort_safety_file.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.object_id = type { i32 }
@.str = private unnamed_addr constant [5 x i8] c"HEAD\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@.str.2 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@llvm.used = appending global [1 x ptr] [ptr @update_abort_safety_file], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @update_abort_safety_file() #0 {
%1 = alloca %struct.object_id, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%2 = tail call i32 @git_path_seq_dir() #3
%3 = tail call i32 @file_exists(i32 noundef %2) #3
%4 = icmp eq i32 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %0
%6 = call i32 @get_oid(ptr noundef nonnull @.str, ptr noundef nonnull %1) #3
%7 = icmp eq i32 %6, 0
%8 = call i32 @git_path_abort_safety_file() #3
br i1 %7, label %9, label %12
9: ; preds = %5
%10 = call ptr @oid_to_hex(ptr noundef nonnull %1) #3
%11 = call i32 @write_file(i32 noundef %8, ptr noundef nonnull @.str.1, ptr noundef %10) #3
br label %14
12: ; preds = %5
%13 = call i32 @write_file(i32 noundef %8, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2) #3
br label %14
14: ; preds = %9, %12, %0
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @file_exists(i32 noundef) local_unnamed_addr #2
declare i32 @git_path_seq_dir(...) local_unnamed_addr #2
declare i32 @get_oid(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @write_file(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @git_path_abort_safety_file(...) local_unnamed_addr #2
declare ptr @oid_to_hex(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
git_extr_sequencer.c_update_abort_safety_file
|
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/svnserve/extr_logger.c_logger__write.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/svnserve/extr_logger.c_logger__write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
@SVN_NO_ERROR = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local ptr @logger__write(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
store i32 %2, ptr %4, align 4, !tbaa !5
%5 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%6 = load i32, ptr %5, align 4, !tbaa !9
%7 = load i32, ptr %0, align 4, !tbaa !11
%8 = call i32 @svn_stream_write(i32 noundef %7, ptr noundef %1, ptr noundef nonnull %4) #2
%9 = call i32 @SVN_MUTEX__WITH_LOCK(i32 noundef %6, i32 noundef %8) #2
%10 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !12
ret ptr %10
}
declare i32 @SVN_MUTEX__WITH_LOCK(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @svn_stream_write(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"TYPE_3__", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/svnserve/extr_logger.c_logger__write.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/svnserve/extr_logger.c_logger__write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SVN_NO_ERROR = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @logger__write(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
store i32 %2, ptr %4, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !10
%7 = load i32, ptr %0, align 4, !tbaa !12
%8 = call i32 @svn_stream_write(i32 noundef %7, ptr noundef %1, ptr noundef nonnull %4) #2
%9 = call i32 @SVN_MUTEX__WITH_LOCK(i32 noundef %6, i32 noundef %8) #2
%10 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !13
ret ptr %10
}
declare i32 @SVN_MUTEX__WITH_LOCK(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @svn_stream_write(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"TYPE_3__", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
|
freebsd_contrib_subversion_subversion_svnserve_extr_logger.c_logger__write
|
; ModuleID = 'AnghaBench/hashcat/src/modules/extr_module_13731.c_module_init.c'
source_filename = "AnghaBench/hashcat/src/modules/extr_module_13731.c_module_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, ptr, i32, i32, i32, ptr, i32, ptr, ptr, ptr, i32, ptr, ptr, i32, ptr, ptr, i32, i32, i32, ptr, i32, ptr, ptr, ptr, i32, ptr, ptr, ptr, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i32, ptr, ptr, ptr, i32, ptr, ptr, ptr, i32, ptr, ptr, ptr, ptr, i32, ptr, i32, i32, i32, i32, i32, ptr, i32, ptr, ptr, ptr, ptr, i32, i32, i32 }
@MODULE_CONTEXT_SIZE_CURRENT = dso_local local_unnamed_addr global i32 0, align 4
@MODULE_INTERFACE_VERSION_CURRENT = dso_local local_unnamed_addr global i32 0, align 4
@module_attack_exec = dso_local local_unnamed_addr global i32 0, align 4
@MODULE_DEFAULT = dso_local local_unnamed_addr global ptr null, align 8
@module_build_plain_postprocess = dso_local local_unnamed_addr global i32 0, align 4
@module_dgst_pos0 = dso_local local_unnamed_addr global i32 0, align 4
@module_dgst_pos1 = dso_local local_unnamed_addr global i32 0, align 4
@module_dgst_pos2 = dso_local local_unnamed_addr global i32 0, align 4
@module_dgst_pos3 = dso_local local_unnamed_addr global i32 0, align 4
@module_dgst_size = dso_local local_unnamed_addr global i32 0, align 4
@module_esalt_size = dso_local local_unnamed_addr global i32 0, align 4
@module_hash_binary_parse = dso_local local_unnamed_addr global i32 0, align 4
@module_hash_decode = dso_local local_unnamed_addr global i32 0, align 4
@module_hash_init_selftest = dso_local local_unnamed_addr global i32 0, align 4
@module_hash_category = dso_local local_unnamed_addr global i32 0, align 4
@module_hash_name = dso_local local_unnamed_addr global i32 0, align 4
@module_jit_build_options = dso_local local_unnamed_addr global i32 0, align 4
@module_kernel_loops_max = dso_local local_unnamed_addr global i32 0, align 4
@module_kern_type = dso_local local_unnamed_addr global i32 0, align 4
@module_opti_type = dso_local local_unnamed_addr global i32 0, align 4
@module_opts_type = dso_local local_unnamed_addr global i32 0, align 4
@module_outfile_check_disable = dso_local local_unnamed_addr global i32 0, align 4
@module_potfile_disable = dso_local local_unnamed_addr global i32 0, align 4
@module_pw_max = dso_local local_unnamed_addr global i32 0, align 4
@module_salt_type = dso_local local_unnamed_addr global i32 0, align 4
@module_st_hash = dso_local local_unnamed_addr global i32 0, align 4
@module_st_pass = dso_local local_unnamed_addr global i32 0, align 4
@module_tmp_size = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable
define dso_local void @module_init(ptr noundef writeonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @MODULE_CONTEXT_SIZE_CURRENT, align 4, !tbaa !5
%3 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 67
store i32 %2, ptr %3, align 8, !tbaa !9
%4 = load i32, ptr @MODULE_INTERFACE_VERSION_CURRENT, align 4, !tbaa !5
%5 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 66
store i32 %4, ptr %5, align 4, !tbaa !12
%6 = load i32, ptr @module_attack_exec, align 4, !tbaa !5
%7 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 65
store i32 %6, ptr %7, align 8, !tbaa !13
%8 = load ptr, ptr @MODULE_DEFAULT, align 8, !tbaa !14
%9 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 64
store ptr %8, ptr %9, align 8, !tbaa !15
%10 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 63
store ptr %8, ptr %10, align 8, !tbaa !16
%11 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 62
store ptr %8, ptr %11, align 8, !tbaa !17
%12 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 61
store ptr %8, ptr %12, align 8, !tbaa !18
%13 = load i32, ptr @module_build_plain_postprocess, align 4, !tbaa !5
%14 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 60
store i32 %13, ptr %14, align 8, !tbaa !19
%15 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 59
store ptr %8, ptr %15, align 8, !tbaa !20
%16 = load i32, ptr @module_dgst_pos0, align 4, !tbaa !5
%17 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 58
store i32 %16, ptr %17, align 8, !tbaa !21
%18 = load i32, ptr @module_dgst_pos1, align 4, !tbaa !5
%19 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 57
store i32 %18, ptr %19, align 4, !tbaa !22
%20 = load i32, ptr @module_dgst_pos2, align 4, !tbaa !5
%21 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 56
store i32 %20, ptr %21, align 8, !tbaa !23
%22 = load i32, ptr @module_dgst_pos3, align 4, !tbaa !5
%23 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 55
store i32 %22, ptr %23, align 4, !tbaa !24
%24 = load i32, ptr @module_dgst_size, align 4, !tbaa !5
%25 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 54
store i32 %24, ptr %25, align 8, !tbaa !25
%26 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 53
store ptr %8, ptr %26, align 8, !tbaa !26
%27 = load i32, ptr @module_esalt_size, align 4, !tbaa !5
%28 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 52
store i32 %27, ptr %28, align 8, !tbaa !27
%29 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 51
store ptr %8, ptr %29, align 8, !tbaa !28
%30 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 50
store ptr %8, ptr %30, align 8, !tbaa !29
%31 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 49
store ptr %8, ptr %31, align 8, !tbaa !30
%32 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 48
store ptr %8, ptr %32, align 8, !tbaa !31
%33 = load i32, ptr @module_hash_binary_parse, align 4, !tbaa !5
%34 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 47
store i32 %33, ptr %34, align 8, !tbaa !32
%35 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 46
store ptr %8, ptr %35, align 8, !tbaa !33
%36 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 45
store ptr %8, ptr %36, align 8, !tbaa !34
%37 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 44
store ptr %8, ptr %37, align 8, !tbaa !35
%38 = load i32, ptr @module_hash_decode, align 4, !tbaa !5
%39 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 43
store i32 %38, ptr %39, align 8, !tbaa !36
%40 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 42
store ptr %8, ptr %40, align 8, !tbaa !37
%41 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 41
store ptr %8, ptr %41, align 8, !tbaa !38
%42 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 40
store ptr %8, ptr %42, align 8, !tbaa !39
%43 = load i32, ptr @module_hash_init_selftest, align 4, !tbaa !5
%44 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 39
store i32 %43, ptr %44, align 8, !tbaa !40
%45 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 38
store ptr %8, ptr %45, align 8, !tbaa !41
%46 = load i32, ptr @module_hash_category, align 4, !tbaa !5
%47 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 37
store i32 %46, ptr %47, align 4, !tbaa !42
%48 = load i32, ptr @module_hash_name, align 4, !tbaa !5
%49 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 36
store i32 %48, ptr %49, align 8, !tbaa !43
%50 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 35
store ptr %8, ptr %50, align 8, !tbaa !44
%51 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 34
store ptr %8, ptr %51, align 8, !tbaa !45
%52 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 33
store ptr %8, ptr %52, align 8, !tbaa !46
%53 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 32
store ptr %8, ptr %53, align 8, !tbaa !47
%54 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 31
store ptr %8, ptr %54, align 8, !tbaa !48
%55 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 30
store ptr %8, ptr %55, align 8, !tbaa !49
%56 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 29
store ptr %8, ptr %56, align 8, !tbaa !50
%57 = load i32, ptr @module_jit_build_options, align 4, !tbaa !5
%58 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 28
store i32 %57, ptr %58, align 8, !tbaa !51
%59 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 27
store ptr %8, ptr %59, align 8, !tbaa !52
%60 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 26
store ptr %8, ptr %60, align 8, !tbaa !53
%61 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 25
store ptr %8, ptr %61, align 8, !tbaa !54
%62 = load i32, ptr @module_kernel_loops_max, align 4, !tbaa !5
%63 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 24
store i32 %62, ptr %63, align 8, !tbaa !55
%64 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 23
store ptr %8, ptr %64, align 8, !tbaa !56
%65 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 22
store ptr %8, ptr %65, align 8, !tbaa !57
%66 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 21
store ptr %8, ptr %66, align 8, !tbaa !58
%67 = load i32, ptr @module_kern_type, align 4, !tbaa !5
%68 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 20
store i32 %67, ptr %68, align 8, !tbaa !59
%69 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 19
store ptr %8, ptr %69, align 8, !tbaa !60
%70 = load i32, ptr @module_opti_type, align 4, !tbaa !5
%71 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 18
store i32 %70, ptr %71, align 8, !tbaa !61
%72 = load i32, ptr @module_opts_type, align 4, !tbaa !5
%73 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 17
store i32 %72, ptr %73, align 4, !tbaa !62
%74 = load i32, ptr @module_outfile_check_disable, align 4, !tbaa !5
%75 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 16
store i32 %74, ptr %75, align 8, !tbaa !63
%76 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 15
store ptr %8, ptr %76, align 8, !tbaa !64
%77 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 14
store ptr %8, ptr %77, align 8, !tbaa !65
%78 = load i32, ptr @module_potfile_disable, align 4, !tbaa !5
%79 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 13
store i32 %78, ptr %79, align 8, !tbaa !66
%80 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 12
store ptr %8, ptr %80, align 8, !tbaa !67
%81 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 11
store ptr %8, ptr %81, align 8, !tbaa !68
%82 = load i32, ptr @module_pw_max, align 4, !tbaa !5
%83 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 10
store i32 %82, ptr %83, align 8, !tbaa !69
%84 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 9
store ptr %8, ptr %84, align 8, !tbaa !70
%85 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 8
store ptr %8, ptr %85, align 8, !tbaa !71
%86 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 7
store ptr %8, ptr %86, align 8, !tbaa !72
%87 = load i32, ptr @module_salt_type, align 4, !tbaa !5
%88 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 6
store i32 %87, ptr %88, align 8, !tbaa !73
%89 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 5
store ptr %8, ptr %89, align 8, !tbaa !74
%90 = load i32, ptr @module_st_hash, align 4, !tbaa !5
%91 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 4
store i32 %90, ptr %91, align 8, !tbaa !75
%92 = load i32, ptr @module_st_pass, align 4, !tbaa !5
%93 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 3
store i32 %92, ptr %93, align 4, !tbaa !76
%94 = load i32, ptr @module_tmp_size, align 4, !tbaa !5
%95 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
store i32 %94, ptr %95, align 8, !tbaa !77
%96 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
store ptr %8, ptr %96, align 8, !tbaa !78
store ptr %8, ptr %0, align 8, !tbaa !79
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 488}
!10 = !{!"TYPE_3__", !11, i64 0, !11, i64 8, !6, i64 16, !6, i64 20, !6, i64 24, !11, i64 32, !6, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !6, i64 72, !11, i64 80, !11, i64 88, !6, i64 96, !11, i64 104, !11, i64 112, !6, i64 120, !6, i64 124, !6, i64 128, !11, i64 136, !6, i64 144, !11, i64 152, !11, i64 160, !11, i64 168, !6, i64 176, !11, i64 184, !11, i64 192, !11, i64 200, !6, i64 208, !11, i64 216, !11, i64 224, !11, i64 232, !11, i64 240, !11, i64 248, !11, i64 256, !11, i64 264, !6, i64 272, !6, i64 276, !11, i64 280, !6, i64 288, !11, i64 296, !11, i64 304, !11, i64 312, !6, i64 320, !11, i64 328, !11, i64 336, !11, i64 344, !6, i64 352, !11, i64 360, !11, i64 368, !11, i64 376, !11, i64 384, !6, i64 392, !11, i64 400, !6, i64 408, !6, i64 412, !6, i64 416, !6, i64 420, !6, i64 424, !11, i64 432, !6, i64 440, !11, i64 448, !11, i64 456, !11, i64 464, !11, i64 472, !6, i64 480, !6, i64 484, !6, i64 488}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !6, i64 484}
!13 = !{!10, !6, i64 480}
!14 = !{!11, !11, i64 0}
!15 = !{!10, !11, i64 472}
!16 = !{!10, !11, i64 464}
!17 = !{!10, !11, i64 456}
!18 = !{!10, !11, i64 448}
!19 = !{!10, !6, i64 440}
!20 = !{!10, !11, i64 432}
!21 = !{!10, !6, i64 424}
!22 = !{!10, !6, i64 420}
!23 = !{!10, !6, i64 416}
!24 = !{!10, !6, i64 412}
!25 = !{!10, !6, i64 408}
!26 = !{!10, !11, i64 400}
!27 = !{!10, !6, i64 392}
!28 = !{!10, !11, i64 384}
!29 = !{!10, !11, i64 376}
!30 = !{!10, !11, i64 368}
!31 = !{!10, !11, i64 360}
!32 = !{!10, !6, i64 352}
!33 = !{!10, !11, i64 344}
!34 = !{!10, !11, i64 336}
!35 = !{!10, !11, i64 328}
!36 = !{!10, !6, i64 320}
!37 = !{!10, !11, i64 312}
!38 = !{!10, !11, i64 304}
!39 = !{!10, !11, i64 296}
!40 = !{!10, !6, i64 288}
!41 = !{!10, !11, i64 280}
!42 = !{!10, !6, i64 276}
!43 = !{!10, !6, i64 272}
!44 = !{!10, !11, i64 264}
!45 = !{!10, !11, i64 256}
!46 = !{!10, !11, i64 248}
!47 = !{!10, !11, i64 240}
!48 = !{!10, !11, i64 232}
!49 = !{!10, !11, i64 224}
!50 = !{!10, !11, i64 216}
!51 = !{!10, !6, i64 208}
!52 = !{!10, !11, i64 200}
!53 = !{!10, !11, i64 192}
!54 = !{!10, !11, i64 184}
!55 = !{!10, !6, i64 176}
!56 = !{!10, !11, i64 168}
!57 = !{!10, !11, i64 160}
!58 = !{!10, !11, i64 152}
!59 = !{!10, !6, i64 144}
!60 = !{!10, !11, i64 136}
!61 = !{!10, !6, i64 128}
!62 = !{!10, !6, i64 124}
!63 = !{!10, !6, i64 120}
!64 = !{!10, !11, i64 112}
!65 = !{!10, !11, i64 104}
!66 = !{!10, !6, i64 96}
!67 = !{!10, !11, i64 88}
!68 = !{!10, !11, i64 80}
!69 = !{!10, !6, i64 72}
!70 = !{!10, !11, i64 64}
!71 = !{!10, !11, i64 56}
!72 = !{!10, !11, i64 48}
!73 = !{!10, !6, i64 40}
!74 = !{!10, !11, i64 32}
!75 = !{!10, !6, i64 24}
!76 = !{!10, !6, i64 20}
!77 = !{!10, !6, i64 16}
!78 = !{!10, !11, i64 8}
!79 = !{!10, !11, i64 0}
|
; ModuleID = 'AnghaBench/hashcat/src/modules/extr_module_13731.c_module_init.c'
source_filename = "AnghaBench/hashcat/src/modules/extr_module_13731.c_module_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MODULE_CONTEXT_SIZE_CURRENT = common local_unnamed_addr global i32 0, align 4
@MODULE_INTERFACE_VERSION_CURRENT = common local_unnamed_addr global i32 0, align 4
@module_attack_exec = common local_unnamed_addr global i32 0, align 4
@MODULE_DEFAULT = common local_unnamed_addr global ptr null, align 8
@module_build_plain_postprocess = common local_unnamed_addr global i32 0, align 4
@module_dgst_pos0 = common local_unnamed_addr global i32 0, align 4
@module_dgst_pos1 = common local_unnamed_addr global i32 0, align 4
@module_dgst_pos2 = common local_unnamed_addr global i32 0, align 4
@module_dgst_pos3 = common local_unnamed_addr global i32 0, align 4
@module_dgst_size = common local_unnamed_addr global i32 0, align 4
@module_esalt_size = common local_unnamed_addr global i32 0, align 4
@module_hash_binary_parse = common local_unnamed_addr global i32 0, align 4
@module_hash_decode = common local_unnamed_addr global i32 0, align 4
@module_hash_init_selftest = common local_unnamed_addr global i32 0, align 4
@module_hash_category = common local_unnamed_addr global i32 0, align 4
@module_hash_name = common local_unnamed_addr global i32 0, align 4
@module_jit_build_options = common local_unnamed_addr global i32 0, align 4
@module_kernel_loops_max = common local_unnamed_addr global i32 0, align 4
@module_kern_type = common local_unnamed_addr global i32 0, align 4
@module_opti_type = common local_unnamed_addr global i32 0, align 4
@module_opts_type = common local_unnamed_addr global i32 0, align 4
@module_outfile_check_disable = common local_unnamed_addr global i32 0, align 4
@module_potfile_disable = common local_unnamed_addr global i32 0, align 4
@module_pw_max = common local_unnamed_addr global i32 0, align 4
@module_salt_type = common local_unnamed_addr global i32 0, align 4
@module_st_hash = common local_unnamed_addr global i32 0, align 4
@module_st_pass = common local_unnamed_addr global i32 0, align 4
@module_tmp_size = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define void @module_init(ptr noundef writeonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @MODULE_CONTEXT_SIZE_CURRENT, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 488
store i32 %2, ptr %3, align 8, !tbaa !10
%4 = load i32, ptr @MODULE_INTERFACE_VERSION_CURRENT, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 484
store i32 %4, ptr %5, align 4, !tbaa !13
%6 = load i32, ptr @module_attack_exec, align 4, !tbaa !6
%7 = getelementptr inbounds i8, ptr %0, i64 480
store i32 %6, ptr %7, align 8, !tbaa !14
%8 = load ptr, ptr @MODULE_DEFAULT, align 8, !tbaa !15
%9 = getelementptr inbounds i8, ptr %0, i64 472
store ptr %8, ptr %9, align 8, !tbaa !16
%10 = getelementptr inbounds i8, ptr %0, i64 464
store ptr %8, ptr %10, align 8, !tbaa !17
%11 = getelementptr inbounds i8, ptr %0, i64 456
store ptr %8, ptr %11, align 8, !tbaa !18
%12 = getelementptr inbounds i8, ptr %0, i64 448
store ptr %8, ptr %12, align 8, !tbaa !19
%13 = load i32, ptr @module_build_plain_postprocess, align 4, !tbaa !6
%14 = getelementptr inbounds i8, ptr %0, i64 440
store i32 %13, ptr %14, align 8, !tbaa !20
%15 = getelementptr inbounds i8, ptr %0, i64 432
store ptr %8, ptr %15, align 8, !tbaa !21
%16 = load i32, ptr @module_dgst_pos0, align 4, !tbaa !6
%17 = getelementptr inbounds i8, ptr %0, i64 424
store i32 %16, ptr %17, align 8, !tbaa !22
%18 = load i32, ptr @module_dgst_pos1, align 4, !tbaa !6
%19 = getelementptr inbounds i8, ptr %0, i64 420
store i32 %18, ptr %19, align 4, !tbaa !23
%20 = load i32, ptr @module_dgst_pos2, align 4, !tbaa !6
%21 = getelementptr inbounds i8, ptr %0, i64 416
store i32 %20, ptr %21, align 8, !tbaa !24
%22 = load i32, ptr @module_dgst_pos3, align 4, !tbaa !6
%23 = getelementptr inbounds i8, ptr %0, i64 412
store i32 %22, ptr %23, align 4, !tbaa !25
%24 = load i32, ptr @module_dgst_size, align 4, !tbaa !6
%25 = getelementptr inbounds i8, ptr %0, i64 408
store i32 %24, ptr %25, align 8, !tbaa !26
%26 = getelementptr inbounds i8, ptr %0, i64 400
store ptr %8, ptr %26, align 8, !tbaa !27
%27 = load i32, ptr @module_esalt_size, align 4, !tbaa !6
%28 = getelementptr inbounds i8, ptr %0, i64 392
store i32 %27, ptr %28, align 8, !tbaa !28
%29 = getelementptr inbounds i8, ptr %0, i64 384
store ptr %8, ptr %29, align 8, !tbaa !29
%30 = getelementptr inbounds i8, ptr %0, i64 376
store ptr %8, ptr %30, align 8, !tbaa !30
%31 = getelementptr inbounds i8, ptr %0, i64 368
store ptr %8, ptr %31, align 8, !tbaa !31
%32 = getelementptr inbounds i8, ptr %0, i64 360
store ptr %8, ptr %32, align 8, !tbaa !32
%33 = load i32, ptr @module_hash_binary_parse, align 4, !tbaa !6
%34 = getelementptr inbounds i8, ptr %0, i64 352
store i32 %33, ptr %34, align 8, !tbaa !33
%35 = getelementptr inbounds i8, ptr %0, i64 344
store ptr %8, ptr %35, align 8, !tbaa !34
%36 = getelementptr inbounds i8, ptr %0, i64 336
store ptr %8, ptr %36, align 8, !tbaa !35
%37 = getelementptr inbounds i8, ptr %0, i64 328
store ptr %8, ptr %37, align 8, !tbaa !36
%38 = load i32, ptr @module_hash_decode, align 4, !tbaa !6
%39 = getelementptr inbounds i8, ptr %0, i64 320
store i32 %38, ptr %39, align 8, !tbaa !37
%40 = getelementptr inbounds i8, ptr %0, i64 312
store ptr %8, ptr %40, align 8, !tbaa !38
%41 = getelementptr inbounds i8, ptr %0, i64 304
store ptr %8, ptr %41, align 8, !tbaa !39
%42 = getelementptr inbounds i8, ptr %0, i64 296
store ptr %8, ptr %42, align 8, !tbaa !40
%43 = load i32, ptr @module_hash_init_selftest, align 4, !tbaa !6
%44 = getelementptr inbounds i8, ptr %0, i64 288
store i32 %43, ptr %44, align 8, !tbaa !41
%45 = getelementptr inbounds i8, ptr %0, i64 280
store ptr %8, ptr %45, align 8, !tbaa !42
%46 = load i32, ptr @module_hash_category, align 4, !tbaa !6
%47 = getelementptr inbounds i8, ptr %0, i64 276
store i32 %46, ptr %47, align 4, !tbaa !43
%48 = load i32, ptr @module_hash_name, align 4, !tbaa !6
%49 = getelementptr inbounds i8, ptr %0, i64 272
store i32 %48, ptr %49, align 8, !tbaa !44
%50 = getelementptr inbounds i8, ptr %0, i64 264
store ptr %8, ptr %50, align 8, !tbaa !45
%51 = getelementptr inbounds i8, ptr %0, i64 256
store ptr %8, ptr %51, align 8, !tbaa !46
%52 = getelementptr inbounds i8, ptr %0, i64 248
store ptr %8, ptr %52, align 8, !tbaa !47
%53 = getelementptr inbounds i8, ptr %0, i64 240
store ptr %8, ptr %53, align 8, !tbaa !48
%54 = getelementptr inbounds i8, ptr %0, i64 232
store ptr %8, ptr %54, align 8, !tbaa !49
%55 = getelementptr inbounds i8, ptr %0, i64 224
store ptr %8, ptr %55, align 8, !tbaa !50
%56 = getelementptr inbounds i8, ptr %0, i64 216
store ptr %8, ptr %56, align 8, !tbaa !51
%57 = load i32, ptr @module_jit_build_options, align 4, !tbaa !6
%58 = getelementptr inbounds i8, ptr %0, i64 208
store i32 %57, ptr %58, align 8, !tbaa !52
%59 = getelementptr inbounds i8, ptr %0, i64 200
store ptr %8, ptr %59, align 8, !tbaa !53
%60 = getelementptr inbounds i8, ptr %0, i64 192
store ptr %8, ptr %60, align 8, !tbaa !54
%61 = getelementptr inbounds i8, ptr %0, i64 184
store ptr %8, ptr %61, align 8, !tbaa !55
%62 = load i32, ptr @module_kernel_loops_max, align 4, !tbaa !6
%63 = getelementptr inbounds i8, ptr %0, i64 176
store i32 %62, ptr %63, align 8, !tbaa !56
%64 = getelementptr inbounds i8, ptr %0, i64 168
store ptr %8, ptr %64, align 8, !tbaa !57
%65 = getelementptr inbounds i8, ptr %0, i64 160
store ptr %8, ptr %65, align 8, !tbaa !58
%66 = getelementptr inbounds i8, ptr %0, i64 152
store ptr %8, ptr %66, align 8, !tbaa !59
%67 = load i32, ptr @module_kern_type, align 4, !tbaa !6
%68 = getelementptr inbounds i8, ptr %0, i64 144
store i32 %67, ptr %68, align 8, !tbaa !60
%69 = getelementptr inbounds i8, ptr %0, i64 136
store ptr %8, ptr %69, align 8, !tbaa !61
%70 = load i32, ptr @module_opti_type, align 4, !tbaa !6
%71 = getelementptr inbounds i8, ptr %0, i64 128
store i32 %70, ptr %71, align 8, !tbaa !62
%72 = load i32, ptr @module_opts_type, align 4, !tbaa !6
%73 = getelementptr inbounds i8, ptr %0, i64 124
store i32 %72, ptr %73, align 4, !tbaa !63
%74 = load i32, ptr @module_outfile_check_disable, align 4, !tbaa !6
%75 = getelementptr inbounds i8, ptr %0, i64 120
store i32 %74, ptr %75, align 8, !tbaa !64
%76 = getelementptr inbounds i8, ptr %0, i64 112
store ptr %8, ptr %76, align 8, !tbaa !65
%77 = getelementptr inbounds i8, ptr %0, i64 104
store ptr %8, ptr %77, align 8, !tbaa !66
%78 = load i32, ptr @module_potfile_disable, align 4, !tbaa !6
%79 = getelementptr inbounds i8, ptr %0, i64 96
store i32 %78, ptr %79, align 8, !tbaa !67
%80 = getelementptr inbounds i8, ptr %0, i64 88
store ptr %8, ptr %80, align 8, !tbaa !68
%81 = getelementptr inbounds i8, ptr %0, i64 80
store ptr %8, ptr %81, align 8, !tbaa !69
%82 = load i32, ptr @module_pw_max, align 4, !tbaa !6
%83 = getelementptr inbounds i8, ptr %0, i64 72
store i32 %82, ptr %83, align 8, !tbaa !70
%84 = getelementptr inbounds i8, ptr %0, i64 64
store ptr %8, ptr %84, align 8, !tbaa !71
%85 = getelementptr inbounds i8, ptr %0, i64 56
store ptr %8, ptr %85, align 8, !tbaa !72
%86 = getelementptr inbounds i8, ptr %0, i64 48
store ptr %8, ptr %86, align 8, !tbaa !73
%87 = load i32, ptr @module_salt_type, align 4, !tbaa !6
%88 = getelementptr inbounds i8, ptr %0, i64 40
store i32 %87, ptr %88, align 8, !tbaa !74
%89 = getelementptr inbounds i8, ptr %0, i64 32
store ptr %8, ptr %89, align 8, !tbaa !75
%90 = load i32, ptr @module_st_hash, align 4, !tbaa !6
%91 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %90, ptr %91, align 8, !tbaa !76
%92 = load i32, ptr @module_st_pass, align 4, !tbaa !6
%93 = getelementptr inbounds i8, ptr %0, i64 20
store i32 %92, ptr %93, align 4, !tbaa !77
%94 = load i32, ptr @module_tmp_size, align 4, !tbaa !6
%95 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %94, ptr %95, align 8, !tbaa !78
%96 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %8, ptr %96, align 8, !tbaa !79
store ptr %8, ptr %0, align 8, !tbaa !80
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 488}
!11 = !{!"TYPE_3__", !12, i64 0, !12, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !12, i64 32, !7, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !7, i64 72, !12, i64 80, !12, i64 88, !7, i64 96, !12, i64 104, !12, i64 112, !7, i64 120, !7, i64 124, !7, i64 128, !12, i64 136, !7, i64 144, !12, i64 152, !12, i64 160, !12, i64 168, !7, i64 176, !12, i64 184, !12, i64 192, !12, i64 200, !7, i64 208, !12, i64 216, !12, i64 224, !12, i64 232, !12, i64 240, !12, i64 248, !12, i64 256, !12, i64 264, !7, i64 272, !7, i64 276, !12, i64 280, !7, i64 288, !12, i64 296, !12, i64 304, !12, i64 312, !7, i64 320, !12, i64 328, !12, i64 336, !12, i64 344, !7, i64 352, !12, i64 360, !12, i64 368, !12, i64 376, !12, i64 384, !7, i64 392, !12, i64 400, !7, i64 408, !7, i64 412, !7, i64 416, !7, i64 420, !7, i64 424, !12, i64 432, !7, i64 440, !12, i64 448, !12, i64 456, !12, i64 464, !12, i64 472, !7, i64 480, !7, i64 484, !7, i64 488}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !7, i64 484}
!14 = !{!11, !7, i64 480}
!15 = !{!12, !12, i64 0}
!16 = !{!11, !12, i64 472}
!17 = !{!11, !12, i64 464}
!18 = !{!11, !12, i64 456}
!19 = !{!11, !12, i64 448}
!20 = !{!11, !7, i64 440}
!21 = !{!11, !12, i64 432}
!22 = !{!11, !7, i64 424}
!23 = !{!11, !7, i64 420}
!24 = !{!11, !7, i64 416}
!25 = !{!11, !7, i64 412}
!26 = !{!11, !7, i64 408}
!27 = !{!11, !12, i64 400}
!28 = !{!11, !7, i64 392}
!29 = !{!11, !12, i64 384}
!30 = !{!11, !12, i64 376}
!31 = !{!11, !12, i64 368}
!32 = !{!11, !12, i64 360}
!33 = !{!11, !7, i64 352}
!34 = !{!11, !12, i64 344}
!35 = !{!11, !12, i64 336}
!36 = !{!11, !12, i64 328}
!37 = !{!11, !7, i64 320}
!38 = !{!11, !12, i64 312}
!39 = !{!11, !12, i64 304}
!40 = !{!11, !12, i64 296}
!41 = !{!11, !7, i64 288}
!42 = !{!11, !12, i64 280}
!43 = !{!11, !7, i64 276}
!44 = !{!11, !7, i64 272}
!45 = !{!11, !12, i64 264}
!46 = !{!11, !12, i64 256}
!47 = !{!11, !12, i64 248}
!48 = !{!11, !12, i64 240}
!49 = !{!11, !12, i64 232}
!50 = !{!11, !12, i64 224}
!51 = !{!11, !12, i64 216}
!52 = !{!11, !7, i64 208}
!53 = !{!11, !12, i64 200}
!54 = !{!11, !12, i64 192}
!55 = !{!11, !12, i64 184}
!56 = !{!11, !7, i64 176}
!57 = !{!11, !12, i64 168}
!58 = !{!11, !12, i64 160}
!59 = !{!11, !12, i64 152}
!60 = !{!11, !7, i64 144}
!61 = !{!11, !12, i64 136}
!62 = !{!11, !7, i64 128}
!63 = !{!11, !7, i64 124}
!64 = !{!11, !7, i64 120}
!65 = !{!11, !12, i64 112}
!66 = !{!11, !12, i64 104}
!67 = !{!11, !7, i64 96}
!68 = !{!11, !12, i64 88}
!69 = !{!11, !12, i64 80}
!70 = !{!11, !7, i64 72}
!71 = !{!11, !12, i64 64}
!72 = !{!11, !12, i64 56}
!73 = !{!11, !12, i64 48}
!74 = !{!11, !7, i64 40}
!75 = !{!11, !12, i64 32}
!76 = !{!11, !7, i64 24}
!77 = !{!11, !7, i64 20}
!78 = !{!11, !7, i64 16}
!79 = !{!11, !12, i64 8}
!80 = !{!11, !12, i64 0}
|
hashcat_src_modules_extr_module_13731.c_module_init
|
; ModuleID = 'AnghaBench/esp-idf/components/wpa_supplicant/src/esp_supplicant/extr_esp_wps.c_wps_rxq_init.c'
source_filename = "AnghaBench/esp-idf/components/wpa_supplicant/src/esp_supplicant/extr_esp_wps.c_wps_rxq_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@s_wps_rxq = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wps_rxq_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @wps_rxq_init() #0 {
%1 = tail call i32 (...) @DATA_MUTEX_TAKE() #2
%2 = tail call i32 @STAILQ_INIT(ptr noundef nonnull @s_wps_rxq) #2
%3 = tail call i32 (...) @DATA_MUTEX_GIVE() #2
ret void
}
declare i32 @DATA_MUTEX_TAKE(...) local_unnamed_addr #1
declare i32 @STAILQ_INIT(ptr noundef) local_unnamed_addr #1
declare i32 @DATA_MUTEX_GIVE(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/esp-idf/components/wpa_supplicant/src/esp_supplicant/extr_esp_wps.c_wps_rxq_init.c'
source_filename = "AnghaBench/esp-idf/components/wpa_supplicant/src/esp_supplicant/extr_esp_wps.c_wps_rxq_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@s_wps_rxq = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wps_rxq_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @wps_rxq_init() #0 {
%1 = tail call i32 @DATA_MUTEX_TAKE() #2
%2 = tail call i32 @STAILQ_INIT(ptr noundef nonnull @s_wps_rxq) #2
%3 = tail call i32 @DATA_MUTEX_GIVE() #2
ret void
}
declare i32 @DATA_MUTEX_TAKE(...) local_unnamed_addr #1
declare i32 @STAILQ_INIT(ptr noundef) local_unnamed_addr #1
declare i32 @DATA_MUTEX_GIVE(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
esp-idf_components_wpa_supplicant_src_esp_supplicant_extr_esp_wps.c_wps_rxq_init
|
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/fitz/extr_color-icc-create.c_add_xyzdata.c'
source_filename = "AnghaBench/sumatrapdf/mupdf/source/fitz/extr_color-icc-create.c_add_xyzdata.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@icSigXYZType = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @add_xyzdata], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @add_xyzdata(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = load i32, ptr @icSigXYZType, align 4, !tbaa !5
%5 = tail call i32 @fz_append_int32_be(ptr noundef %0, ptr noundef %1, i32 noundef %4) #2
%6 = tail call i32 @fz_append_byte_n(ptr noundef %0, ptr noundef %1, i32 noundef 0, i32 noundef 4) #2
%7 = load i32, ptr %2, align 4, !tbaa !5
%8 = tail call i32 @fz_append_int32_be(ptr noundef %0, ptr noundef %1, i32 noundef %7) #2
%9 = getelementptr inbounds i32, ptr %2, i64 1
%10 = load i32, ptr %9, align 4, !tbaa !5
%11 = tail call i32 @fz_append_int32_be(ptr noundef %0, ptr noundef %1, i32 noundef %10) #2
%12 = getelementptr inbounds i32, ptr %2, i64 2
%13 = load i32, ptr %12, align 4, !tbaa !5
%14 = tail call i32 @fz_append_int32_be(ptr noundef %0, ptr noundef %1, i32 noundef %13) #2
ret void
}
declare i32 @fz_append_int32_be(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fz_append_byte_n(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/fitz/extr_color-icc-create.c_add_xyzdata.c'
source_filename = "AnghaBench/sumatrapdf/mupdf/source/fitz/extr_color-icc-create.c_add_xyzdata.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@icSigXYZType = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @add_xyzdata], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @add_xyzdata(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = load i32, ptr @icSigXYZType, align 4, !tbaa !6
%5 = tail call i32 @fz_append_int32_be(ptr noundef %0, ptr noundef %1, i32 noundef %4) #2
%6 = tail call i32 @fz_append_byte_n(ptr noundef %0, ptr noundef %1, i32 noundef 0, i32 noundef 4) #2
%7 = load i32, ptr %2, align 4, !tbaa !6
%8 = tail call i32 @fz_append_int32_be(ptr noundef %0, ptr noundef %1, i32 noundef %7) #2
%9 = getelementptr inbounds i8, ptr %2, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !6
%11 = tail call i32 @fz_append_int32_be(ptr noundef %0, ptr noundef %1, i32 noundef %10) #2
%12 = getelementptr inbounds i8, ptr %2, i64 8
%13 = load i32, ptr %12, align 4, !tbaa !6
%14 = tail call i32 @fz_append_int32_be(ptr noundef %0, ptr noundef %1, i32 noundef %13) #2
ret void
}
declare i32 @fz_append_int32_be(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fz_append_byte_n(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
sumatrapdf_mupdf_source_fitz_extr_color-icc-create.c_add_xyzdata
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_svm.c___scale_tsc.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_svm.c___scale_tsc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @__scale_tsc], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal i32 @__scale_tsc(i32 %0, i32 %1) #0 {
ret i32 poison
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_svm.c___scale_tsc.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_svm.c___scale_tsc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @__scale_tsc], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal i32 @__scale_tsc(i32 %0, i32 %1) #0 {
ret i32 poison
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
fastsocket_kernel_arch_x86_kvm_extr_svm.c___scale_tsc
|
; ModuleID = 'AnghaBench/linux/arch/m68k/emu/extr_nfeth.c_nfeth_interrupt.c'
source_filename = "AnghaBench/linux/arch/m68k/emu/extr_nfeth.c_nfeth_interrupt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@nfEtherID = dso_local local_unnamed_addr global i64 0, align 8
@XIF_IRQ = dso_local local_unnamed_addr global i64 0, align 8
@MAX_UNIT = dso_local local_unnamed_addr global i32 0, align 4
@nfeth_dev = dso_local local_unnamed_addr global ptr null, align 8
@IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nfeth_interrupt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nfeth_interrupt(i32 %0, ptr nocapture readnone %1) #0 {
%3 = load i64, ptr @nfEtherID, align 8, !tbaa !5
%4 = load i64, ptr @XIF_IRQ, align 8, !tbaa !5
%5 = add nsw i64 %4, %3
%6 = tail call i32 @nf_call(i64 noundef %5, i32 noundef 0) #2
%7 = load i32, ptr @MAX_UNIT, align 4, !tbaa !9
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %33
9: ; preds = %2, %27
%10 = phi i32 [ %28, %27 ], [ %7, %2 ]
%11 = phi i64 [ %30, %27 ], [ 0, %2 ]
%12 = phi i32 [ %29, %27 ], [ 1, %2 ]
%13 = and i32 %12, %6
%14 = icmp eq i32 %13, 0
br i1 %14, label %27, label %15
15: ; preds = %9
%16 = load ptr, ptr @nfeth_dev, align 8, !tbaa !11
%17 = getelementptr inbounds i64, ptr %16, i64 %11
%18 = load i64, ptr %17, align 8, !tbaa !5
%19 = icmp eq i64 %18, 0
br i1 %19, label %27, label %20
20: ; preds = %15
%21 = tail call i32 @recv_packet(i64 noundef %18) #2
%22 = load i64, ptr @nfEtherID, align 8, !tbaa !5
%23 = load i64, ptr @XIF_IRQ, align 8, !tbaa !5
%24 = add nsw i64 %23, %22
%25 = tail call i32 @nf_call(i64 noundef %24, i32 noundef %12) #2
%26 = load i32, ptr @MAX_UNIT, align 4, !tbaa !9
br label %27
27: ; preds = %9, %15, %20
%28 = phi i32 [ %10, %9 ], [ %10, %15 ], [ %26, %20 ]
%29 = shl i32 %12, 1
%30 = add nuw nsw i64 %11, 1
%31 = sext i32 %28 to i64
%32 = icmp slt i64 %30, %31
br i1 %32, label %9, label %33, !llvm.loop !13
33: ; preds = %27, %2
%34 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !9
ret i32 %34
}
declare i32 @nf_call(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @recv_packet(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/arch/m68k/emu/extr_nfeth.c_nfeth_interrupt.c'
source_filename = "AnghaBench/linux/arch/m68k/emu/extr_nfeth.c_nfeth_interrupt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@nfEtherID = common local_unnamed_addr global i64 0, align 8
@XIF_IRQ = common local_unnamed_addr global i64 0, align 8
@MAX_UNIT = common local_unnamed_addr global i32 0, align 4
@nfeth_dev = common local_unnamed_addr global ptr null, align 8
@IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nfeth_interrupt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @nfeth_interrupt(i32 %0, ptr nocapture readnone %1) #0 {
%3 = load i64, ptr @nfEtherID, align 8, !tbaa !6
%4 = load i64, ptr @XIF_IRQ, align 8, !tbaa !6
%5 = add nsw i64 %4, %3
%6 = tail call i32 @nf_call(i64 noundef %5, i32 noundef 0) #2
%7 = load i32, ptr @MAX_UNIT, align 4, !tbaa !10
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %33
9: ; preds = %2, %27
%10 = phi i32 [ %28, %27 ], [ %7, %2 ]
%11 = phi i64 [ %30, %27 ], [ 0, %2 ]
%12 = phi i32 [ %29, %27 ], [ 1, %2 ]
%13 = and i32 %12, %6
%14 = icmp eq i32 %13, 0
br i1 %14, label %27, label %15
15: ; preds = %9
%16 = load ptr, ptr @nfeth_dev, align 8, !tbaa !12
%17 = getelementptr inbounds i64, ptr %16, i64 %11
%18 = load i64, ptr %17, align 8, !tbaa !6
%19 = icmp eq i64 %18, 0
br i1 %19, label %27, label %20
20: ; preds = %15
%21 = tail call i32 @recv_packet(i64 noundef %18) #2
%22 = load i64, ptr @nfEtherID, align 8, !tbaa !6
%23 = load i64, ptr @XIF_IRQ, align 8, !tbaa !6
%24 = add nsw i64 %23, %22
%25 = tail call i32 @nf_call(i64 noundef %24, i32 noundef %12) #2
%26 = load i32, ptr @MAX_UNIT, align 4, !tbaa !10
br label %27
27: ; preds = %9, %15, %20
%28 = phi i32 [ %10, %9 ], [ %10, %15 ], [ %26, %20 ]
%29 = shl i32 %12, 1
%30 = add nuw nsw i64 %11, 1
%31 = sext i32 %28 to i64
%32 = icmp slt i64 %30, %31
br i1 %32, label %9, label %33, !llvm.loop !14
33: ; preds = %27, %2
%34 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !10
ret i32 %34
}
declare i32 @nf_call(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @recv_packet(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
|
linux_arch_m68k_emu_extr_nfeth.c_nfeth_interrupt
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_sdvo.c_intel_sdvo_ddc_proxy_func.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_sdvo.c_intel_sdvo_ddc_proxy_func.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @intel_sdvo_ddc_proxy_func], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @intel_sdvo_ddc_proxy_func(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load ptr, ptr %2, align 8, !tbaa !10
%4 = load ptr, ptr %3, align 8, !tbaa !12
%5 = load ptr, ptr %4, align 8, !tbaa !14
%6 = tail call i32 %5(ptr noundef nonnull %3) #1
ret i32 %6
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"i2c_adapter", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"intel_sdvo", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_4__", !7, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"TYPE_3__", !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_sdvo.c_intel_sdvo_ddc_proxy_func.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_sdvo.c_intel_sdvo_ddc_proxy_func.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @intel_sdvo_ddc_proxy_func], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @intel_sdvo_ddc_proxy_func(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load ptr, ptr %2, align 8, !tbaa !11
%4 = load ptr, ptr %3, align 8, !tbaa !13
%5 = load ptr, ptr %4, align 8, !tbaa !15
%6 = tail call i32 %5(ptr noundef nonnull %3) #1
ret i32 %6
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"i2c_adapter", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"intel_sdvo", !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"TYPE_4__", !8, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"TYPE_3__", !8, i64 0}
|
fastsocket_kernel_drivers_gpu_drm_i915_extr_intel_sdvo.c_intel_sdvo_ddc_proxy_func
|
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_delta/extr_branch.c_svn_branch__rev_bid_create.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_delta/extr_branch.c_svn_branch__rev_bid_create.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local ptr @svn_branch__rev_bid_create(i32 noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @apr_palloc(ptr noundef %2, i32 noundef 8) #2
%5 = tail call i32 @apr_pstrdup(ptr noundef %2, ptr noundef %1) #2
%6 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 0, i32 1
store i32 %5, ptr %6, align 4, !tbaa !5
store i32 %0, ptr %4, align 4, !tbaa !10
ret ptr %4
}
declare ptr @apr_palloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @apr_pstrdup(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_4__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_delta/extr_branch.c_svn_branch__rev_bid_create.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_delta/extr_branch.c_svn_branch__rev_bid_create.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @svn_branch__rev_bid_create(i32 noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @apr_palloc(ptr noundef %2, i32 noundef 8) #2
%5 = tail call i32 @apr_pstrdup(ptr noundef %2, ptr noundef %1) #2
%6 = getelementptr inbounds i8, ptr %4, i64 4
store i32 %5, ptr %6, align 4, !tbaa !6
store i32 %0, ptr %4, align 4, !tbaa !11
ret ptr %4
}
declare ptr @apr_palloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @apr_pstrdup(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
|
freebsd_contrib_subversion_subversion_libsvn_delta_extr_branch.c_svn_branch__rev_bid_create
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_mv643xx_eth.c_wrlp.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_mv643xx_eth.c_wrlp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @wrlp], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @wrlp(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i64, ptr %0, align 8, !tbaa !5
%5 = sext i32 %1 to i64
%6 = add nsw i64 %4, %5
%7 = tail call i32 @writel(i32 noundef %2, i64 noundef %6) #2
ret void
}
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mv643xx_eth_private", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_mv643xx_eth.c_wrlp.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_mv643xx_eth.c_wrlp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @wrlp], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @wrlp(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i64, ptr %0, align 8, !tbaa !6
%5 = sext i32 %1 to i64
%6 = add nsw i64 %4, %5
%7 = tail call i32 @writel(i32 noundef %2, i64 noundef %6) #2
ret void
}
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mv643xx_eth_private", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_drivers_net_extr_mv643xx_eth.c_wrlp
|
; ModuleID = 'AnghaBench/linux/arch/x86/kernel/cpu/mce/extr_core.c_mce_no_way_out.c'
source_filename = "AnghaBench/linux/arch/x86/kernel/cpu/mce/extr_core.c_mce_no_way_out.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr }
%struct.TYPE_4__ = type { i32 }
%struct.mce = type { i32, i32 }
@mce_num_banks = dso_local local_unnamed_addr global i32 0, align 4
@msr_ops = dso_local local_unnamed_addr global %struct.TYPE_3__ zeroinitializer, align 8
@MCI_STATUS_VAL = dso_local local_unnamed_addr global i32 0, align 4
@mca_cfg = dso_local local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 4
@MCE_PANIC_SEVERITY = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @mce_no_way_out], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @mce_no_way_out(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%6 = load i32, ptr @mce_num_banks, align 4, !tbaa !5
%7 = tail call i32 @this_cpu_read(i32 noundef %6) #3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %33
9: ; preds = %4, %28
%10 = phi i32 [ %29, %28 ], [ 0, %4 ]
%11 = load ptr, ptr @msr_ops, align 8, !tbaa !9
%12 = call i32 %11(i32 noundef %10) #3
%13 = call i32 @mce_rdmsrl(i32 noundef %12) #3
store i32 %13, ptr %0, align 4, !tbaa !12
%14 = load i32, ptr @MCI_STATUS_VAL, align 4, !tbaa !5
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %28, label %17
17: ; preds = %9
%18 = call i32 @__set_bit(i32 noundef %10, ptr noundef %2) #3
%19 = call i32 @quirk_no_way_out(i32 noundef %10, ptr noundef nonnull %0, ptr noundef %3) #3
%20 = load i32, ptr @mca_cfg, align 4, !tbaa !14
%21 = call i64 @mce_severity(ptr noundef nonnull %0, i32 noundef %20, ptr noundef nonnull %5, i32 noundef 1) #3
%22 = load i64, ptr @MCE_PANIC_SEVERITY, align 8, !tbaa !16
%23 = icmp slt i64 %21, %22
br i1 %23, label %28, label %24
24: ; preds = %17
%25 = getelementptr inbounds %struct.mce, ptr %0, i64 0, i32 1
store i32 %10, ptr %25, align 4, !tbaa !18
%26 = call i32 @mce_read_aux(ptr noundef nonnull %0, i32 noundef %10) #3
%27 = load ptr, ptr %5, align 8, !tbaa !19
store ptr %27, ptr %1, align 8, !tbaa !19
br label %33
28: ; preds = %17, %9
%29 = add nuw nsw i32 %10, 1
%30 = load i32, ptr @mce_num_banks, align 4, !tbaa !5
%31 = call i32 @this_cpu_read(i32 noundef %30) #3
%32 = icmp slt i32 %29, %31
br i1 %32, label %9, label %33, !llvm.loop !20
33: ; preds = %28, %4, %24
%34 = phi i32 [ 1, %24 ], [ 0, %4 ], [ 0, %28 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret i32 %34
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @this_cpu_read(i32 noundef) local_unnamed_addr #2
declare i32 @mce_rdmsrl(i32 noundef) local_unnamed_addr #2
declare i32 @__set_bit(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @quirk_no_way_out(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @mce_severity(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mce_read_aux(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_3__", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"mce", !6, i64 0, !6, i64 4}
!14 = !{!15, !6, i64 0}
!15 = !{!"TYPE_4__", !6, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!13, !6, i64 4}
!19 = !{!11, !11, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/arch/x86/kernel/cpu/mce/extr_core.c_mce_no_way_out.c'
source_filename = "AnghaBench/linux/arch/x86/kernel/cpu/mce/extr_core.c_mce_no_way_out.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { ptr }
%struct.TYPE_4__ = type { i32 }
@mce_num_banks = common local_unnamed_addr global i32 0, align 4
@msr_ops = common local_unnamed_addr global %struct.TYPE_3__ zeroinitializer, align 8
@MCI_STATUS_VAL = common local_unnamed_addr global i32 0, align 4
@mca_cfg = common local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 4
@MCE_PANIC_SEVERITY = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @mce_no_way_out], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @mce_no_way_out(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%6 = load i32, ptr @mce_num_banks, align 4, !tbaa !6
%7 = tail call i32 @this_cpu_read(i32 noundef %6) #3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %33
9: ; preds = %4, %28
%10 = phi i32 [ %29, %28 ], [ 0, %4 ]
%11 = load ptr, ptr @msr_ops, align 8, !tbaa !10
%12 = call i32 %11(i32 noundef %10) #3
%13 = call i32 @mce_rdmsrl(i32 noundef %12) #3
store i32 %13, ptr %0, align 4, !tbaa !13
%14 = load i32, ptr @MCI_STATUS_VAL, align 4, !tbaa !6
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %28, label %17
17: ; preds = %9
%18 = call i32 @__set_bit(i32 noundef %10, ptr noundef %2) #3
%19 = call i32 @quirk_no_way_out(i32 noundef %10, ptr noundef nonnull %0, ptr noundef %3) #3
%20 = load i32, ptr @mca_cfg, align 4, !tbaa !15
%21 = call i64 @mce_severity(ptr noundef nonnull %0, i32 noundef %20, ptr noundef nonnull %5, i32 noundef 1) #3
%22 = load i64, ptr @MCE_PANIC_SEVERITY, align 8, !tbaa !17
%23 = icmp slt i64 %21, %22
br i1 %23, label %28, label %24
24: ; preds = %17
%25 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %10, ptr %25, align 4, !tbaa !19
%26 = call i32 @mce_read_aux(ptr noundef nonnull %0, i32 noundef %10) #3
%27 = load ptr, ptr %5, align 8, !tbaa !20
store ptr %27, ptr %1, align 8, !tbaa !20
br label %33
28: ; preds = %17, %9
%29 = add nuw nsw i32 %10, 1
%30 = load i32, ptr @mce_num_banks, align 4, !tbaa !6
%31 = call i32 @this_cpu_read(i32 noundef %30) #3
%32 = icmp slt i32 %29, %31
br i1 %32, label %9, label %33, !llvm.loop !21
33: ; preds = %28, %4, %24
%34 = phi i32 [ 1, %24 ], [ 0, %4 ], [ 0, %28 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret i32 %34
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @this_cpu_read(i32 noundef) local_unnamed_addr #2
declare i32 @mce_rdmsrl(i32 noundef) local_unnamed_addr #2
declare i32 @__set_bit(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @quirk_no_way_out(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @mce_severity(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mce_read_aux(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_3__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"mce", !7, i64 0, !7, i64 4}
!15 = !{!16, !7, i64 0}
!16 = !{!"TYPE_4__", !7, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"long", !8, i64 0}
!19 = !{!14, !7, i64 4}
!20 = !{!12, !12, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
|
linux_arch_x86_kernel_cpu_mce_extr_core.c_mce_no_way_out
|
; ModuleID = 'AnghaBench/linux/drivers/md/persistent-data/extr_dm-block-manager.c_dm_bm_nr_blocks.c'
source_filename = "AnghaBench/linux/drivers/md/persistent-data/extr_dm-block-manager.c_dm_bm_nr_blocks.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @dm_bm_nr_blocks(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = tail call i32 @dm_bufio_get_device_size(i32 noundef %2) #2
ret i32 %3
}
declare i32 @dm_bufio_get_device_size(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dm_block_manager", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/md/persistent-data/extr_dm-block-manager.c_dm_bm_nr_blocks.c'
source_filename = "AnghaBench/linux/drivers/md/persistent-data/extr_dm-block-manager.c_dm_bm_nr_blocks.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @dm_bm_nr_blocks(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call i32 @dm_bufio_get_device_size(i32 noundef %2) #2
ret i32 %3
}
declare i32 @dm_bufio_get_device_size(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dm_block_manager", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_md_persistent-data_extr_dm-block-manager.c_dm_bm_nr_blocks
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_urtw.c_urtw_8225_set_txpwrlvl.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_urtw.c_urtw_8225_set_txpwrlvl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.urtw_softc = type { ptr, ptr, i32 }
@urtw_8225_txpwr_cck_ch14 = dso_local local_unnamed_addr global ptr null, align 8
@urtw_8225_txpwr_cck = dso_local local_unnamed_addr global ptr null, align 8
@URTW_TX_GAIN_CCK = dso_local local_unnamed_addr global i32 0, align 4
@urtw_8225_tx_gain_cck_ofdm = dso_local local_unnamed_addr global ptr null, align 8
@URTW_8225_ANAPARAM2_ON = dso_local local_unnamed_addr global i32 0, align 4
@URTW_TX_GAIN_OFDM = dso_local local_unnamed_addr global i32 0, align 4
@urtw_8225_txpwr_ofdm = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @urtw_8225_set_txpwrlvl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @urtw_8225_set_txpwrlvl(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, ptr %3, i64 %4
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = freeze i32 %6
%8 = and i32 %7, 255
%9 = getelementptr inbounds %struct.urtw_softc, ptr %0, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !12
%11 = getelementptr inbounds i32, ptr %10, i64 %4
%12 = load i32, ptr %11, align 4, !tbaa !11
%13 = tail call i32 @llvm.umin.i32(i32 %8, i32 11)
%14 = icmp ult i32 %8, 6
%15 = icmp ugt i32 %8, 5
%16 = icmp eq i32 %1, 14
%17 = load ptr, ptr @urtw_8225_txpwr_cck_ch14, align 8
%18 = load ptr, ptr @urtw_8225_txpwr_cck, align 8
%19 = select i1 %16, ptr %17, ptr %18
%20 = load i32, ptr @URTW_TX_GAIN_CCK, align 4, !tbaa !11
%21 = load ptr, ptr @urtw_8225_tx_gain_cck_ofdm, align 8, !tbaa !13
%22 = zext i1 %15 to i64
%23 = getelementptr inbounds i32, ptr %21, i64 %22
%24 = load i32, ptr %23, align 4, !tbaa !11
%25 = ashr i32 %24, 1
%26 = tail call i32 @urtw_write8_m(ptr noundef nonnull %0, i32 noundef %20, i32 noundef %25) #3
%27 = shl nuw nsw i32 %13, 3
%28 = add nsw i32 %27, -48
%29 = select i1 %14, i32 %27, i32 %28
%30 = zext nneg i32 %29 to i64
%31 = getelementptr inbounds i32, ptr %19, i64 %30
%32 = load i32, ptr %31, align 4, !tbaa !11
%33 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 68, i32 noundef %32) #3
%34 = or disjoint i32 %29, 1
%35 = zext nneg i32 %34 to i64
%36 = getelementptr inbounds i32, ptr %19, i64 %35
%37 = load i32, ptr %36, align 4, !tbaa !11
%38 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 69, i32 noundef %37) #3
%39 = or disjoint i32 %29, 2
%40 = zext nneg i32 %39 to i64
%41 = getelementptr inbounds i32, ptr %19, i64 %40
%42 = load i32, ptr %41, align 4, !tbaa !11
%43 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 70, i32 noundef %42) #3
%44 = or disjoint i32 %29, 3
%45 = zext nneg i32 %44 to i64
%46 = getelementptr inbounds i32, ptr %19, i64 %45
%47 = load i32, ptr %46, align 4, !tbaa !11
%48 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 71, i32 noundef %47) #3
%49 = or disjoint i32 %29, 4
%50 = zext nneg i32 %49 to i64
%51 = getelementptr inbounds i32, ptr %19, i64 %50
%52 = load i32, ptr %51, align 4, !tbaa !11
%53 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 72, i32 noundef %52) #3
%54 = or disjoint i32 %29, 5
%55 = zext nneg i32 %54 to i64
%56 = getelementptr inbounds i32, ptr %19, i64 %55
%57 = load i32, ptr %56, align 4, !tbaa !11
%58 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 73, i32 noundef %57) #3
%59 = or disjoint i32 %29, 6
%60 = zext nneg i32 %59 to i64
%61 = getelementptr inbounds i32, ptr %19, i64 %60
%62 = load i32, ptr %61, align 4, !tbaa !11
%63 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 74, i32 noundef %62) #3
%64 = or disjoint i32 %29, 7
%65 = zext nneg i32 %64 to i64
%66 = getelementptr inbounds i32, ptr %19, i64 %65
%67 = load i32, ptr %66, align 4, !tbaa !11
%68 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 75, i32 noundef %67) #3
%69 = getelementptr inbounds %struct.urtw_softc, ptr %0, i64 0, i32 2
%70 = tail call i32 @usb_pause_mtx(ptr noundef nonnull %69, i32 noundef 1) #3
%71 = load i32, ptr @URTW_8225_ANAPARAM2_ON, align 4, !tbaa !11
%72 = tail call i64 @urtw_8185_set_anaparam2(ptr noundef nonnull %0, i32 noundef %71) #3
%73 = icmp eq i64 %72, 0
br i1 %73, label %74, label %103
74: ; preds = %2
%75 = and i32 %12, 255
%76 = icmp ugt i32 %75, 15
%77 = tail call i32 @llvm.umin.i32(i32 %75, i32 25)
%78 = trunc i32 %77 to i8
%79 = add nuw nsw i8 %78, 10
%80 = select i1 %76, i8 25, i8 %79
%81 = udiv i8 %80, 6
%82 = urem i8 %80, 6
%83 = tail call i32 @urtw_8187_write_phy_ofdm(ptr noundef nonnull %0, i32 noundef 2, i32 noundef 66) #3
%84 = tail call i32 @urtw_8187_write_phy_ofdm(ptr noundef nonnull %0, i32 noundef 6, i32 noundef 0) #3
%85 = tail call i32 @urtw_8187_write_phy_ofdm(ptr noundef nonnull %0, i32 noundef 8, i32 noundef 0) #3
%86 = load i32, ptr @URTW_TX_GAIN_OFDM, align 4, !tbaa !11
%87 = load ptr, ptr @urtw_8225_tx_gain_cck_ofdm, align 8, !tbaa !13
%88 = zext nneg i8 %81 to i64
%89 = getelementptr inbounds i32, ptr %87, i64 %88
%90 = load i32, ptr %89, align 4, !tbaa !11
%91 = ashr i32 %90, 1
%92 = tail call i32 @urtw_write8_m(ptr noundef nonnull %0, i32 noundef %86, i32 noundef %91) #3
%93 = load ptr, ptr @urtw_8225_txpwr_ofdm, align 8, !tbaa !13
%94 = zext nneg i8 %82 to i64
%95 = getelementptr inbounds i32, ptr %93, i64 %94
%96 = load i32, ptr %95, align 4, !tbaa !11
%97 = tail call i32 @urtw_8187_write_phy_ofdm(ptr noundef nonnull %0, i32 noundef 5, i32 noundef %96) #3
%98 = load ptr, ptr @urtw_8225_txpwr_ofdm, align 8, !tbaa !13
%99 = getelementptr inbounds i32, ptr %98, i64 %94
%100 = load i32, ptr %99, align 4, !tbaa !11
%101 = tail call i32 @urtw_8187_write_phy_ofdm(ptr noundef nonnull %0, i32 noundef 7, i32 noundef %100) #3
%102 = tail call i32 @usb_pause_mtx(ptr noundef nonnull %69, i32 noundef 1) #3
br label %103
103: ; preds = %2, %74
ret i64 %72
}
declare i32 @urtw_write8_m(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @urtw_8187_write_phy_cck(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @usb_pause_mtx(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @urtw_8185_set_anaparam2(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @urtw_8187_write_phy_ofdm(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"urtw_softc", !7, i64 0, !7, i64 8, !10, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!6, !7, i64 8}
!13 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_urtw.c_urtw_8225_set_txpwrlvl.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_urtw.c_urtw_8225_set_txpwrlvl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@urtw_8225_txpwr_cck_ch14 = common local_unnamed_addr global ptr null, align 8
@urtw_8225_txpwr_cck = common local_unnamed_addr global ptr null, align 8
@URTW_TX_GAIN_CCK = common local_unnamed_addr global i32 0, align 4
@urtw_8225_tx_gain_cck_ofdm = common local_unnamed_addr global ptr null, align 8
@URTW_8225_ANAPARAM2_ON = common local_unnamed_addr global i32 0, align 4
@URTW_TX_GAIN_OFDM = common local_unnamed_addr global i32 0, align 4
@urtw_8225_txpwr_ofdm = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @urtw_8225_set_txpwrlvl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @urtw_8225_set_txpwrlvl(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, ptr %3, i64 %4
%6 = load i32, ptr %5, align 4, !tbaa !12
%7 = freeze i32 %6
%8 = and i32 %7, 255
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = getelementptr inbounds i32, ptr %10, i64 %4
%12 = load i32, ptr %11, align 4, !tbaa !12
%13 = tail call i32 @llvm.umin.i32(i32 %8, i32 11)
%14 = icmp ult i32 %8, 6
%15 = icmp ugt i32 %8, 5
%16 = icmp eq i32 %1, 14
%17 = load ptr, ptr @urtw_8225_txpwr_cck_ch14, align 8
%18 = load ptr, ptr @urtw_8225_txpwr_cck, align 8
%19 = select i1 %16, ptr %17, ptr %18
%20 = load i32, ptr @URTW_TX_GAIN_CCK, align 4, !tbaa !12
%21 = load ptr, ptr @urtw_8225_tx_gain_cck_ofdm, align 8, !tbaa !14
%22 = zext i1 %15 to i64
%23 = getelementptr inbounds i32, ptr %21, i64 %22
%24 = load i32, ptr %23, align 4, !tbaa !12
%25 = ashr i32 %24, 1
%26 = tail call i32 @urtw_write8_m(ptr noundef nonnull %0, i32 noundef %20, i32 noundef %25) #3
%27 = shl nuw nsw i32 %13, 3
%28 = add nsw i32 %27, -48
%29 = select i1 %14, i32 %27, i32 %28
%30 = zext i32 %29 to i64
%31 = getelementptr inbounds i32, ptr %19, i64 %30
%32 = load i32, ptr %31, align 4, !tbaa !12
%33 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 68, i32 noundef %32) #3
%34 = or disjoint i64 %30, 1
%35 = getelementptr inbounds i32, ptr %19, i64 %34
%36 = load i32, ptr %35, align 4, !tbaa !12
%37 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 69, i32 noundef %36) #3
%38 = or disjoint i64 %30, 2
%39 = getelementptr inbounds i32, ptr %19, i64 %38
%40 = load i32, ptr %39, align 4, !tbaa !12
%41 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 70, i32 noundef %40) #3
%42 = or disjoint i64 %30, 3
%43 = getelementptr inbounds i32, ptr %19, i64 %42
%44 = load i32, ptr %43, align 4, !tbaa !12
%45 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 71, i32 noundef %44) #3
%46 = or disjoint i64 %30, 4
%47 = getelementptr inbounds i32, ptr %19, i64 %46
%48 = load i32, ptr %47, align 4, !tbaa !12
%49 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 72, i32 noundef %48) #3
%50 = or disjoint i64 %30, 5
%51 = getelementptr inbounds i32, ptr %19, i64 %50
%52 = load i32, ptr %51, align 4, !tbaa !12
%53 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 73, i32 noundef %52) #3
%54 = or disjoint i64 %30, 6
%55 = getelementptr inbounds i32, ptr %19, i64 %54
%56 = load i32, ptr %55, align 4, !tbaa !12
%57 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 74, i32 noundef %56) #3
%58 = or disjoint i64 %30, 7
%59 = getelementptr inbounds i32, ptr %19, i64 %58
%60 = load i32, ptr %59, align 4, !tbaa !12
%61 = tail call i32 @urtw_8187_write_phy_cck(ptr noundef nonnull %0, i32 noundef 75, i32 noundef %60) #3
%62 = getelementptr inbounds i8, ptr %0, i64 16
%63 = tail call i32 @usb_pause_mtx(ptr noundef nonnull %62, i32 noundef 1) #3
%64 = load i32, ptr @URTW_8225_ANAPARAM2_ON, align 4, !tbaa !12
%65 = tail call i64 @urtw_8185_set_anaparam2(ptr noundef nonnull %0, i32 noundef %64) #3
%66 = icmp eq i64 %65, 0
br i1 %66, label %67, label %98
67: ; preds = %2
%68 = and i32 %12, 255
%69 = icmp ugt i32 %68, 15
%70 = tail call i32 @llvm.umin.i32(i32 %68, i32 25)
%71 = trunc nuw nsw i32 %70 to i8
%72 = add nuw nsw i8 %71, 10
%73 = select i1 %69, i8 25, i8 %72
%74 = freeze i8 %73
%75 = udiv i8 %74, 6
%76 = mul i8 %75, 6
%77 = sub i8 %74, %76
%78 = tail call i32 @urtw_8187_write_phy_ofdm(ptr noundef nonnull %0, i32 noundef 2, i32 noundef 66) #3
%79 = tail call i32 @urtw_8187_write_phy_ofdm(ptr noundef nonnull %0, i32 noundef 6, i32 noundef 0) #3
%80 = tail call i32 @urtw_8187_write_phy_ofdm(ptr noundef nonnull %0, i32 noundef 8, i32 noundef 0) #3
%81 = load i32, ptr @URTW_TX_GAIN_OFDM, align 4, !tbaa !12
%82 = load ptr, ptr @urtw_8225_tx_gain_cck_ofdm, align 8, !tbaa !14
%83 = zext nneg i8 %75 to i64
%84 = getelementptr inbounds i32, ptr %82, i64 %83
%85 = load i32, ptr %84, align 4, !tbaa !12
%86 = ashr i32 %85, 1
%87 = tail call i32 @urtw_write8_m(ptr noundef nonnull %0, i32 noundef %81, i32 noundef %86) #3
%88 = load ptr, ptr @urtw_8225_txpwr_ofdm, align 8, !tbaa !14
%89 = zext nneg i8 %77 to i64
%90 = getelementptr inbounds i32, ptr %88, i64 %89
%91 = load i32, ptr %90, align 4, !tbaa !12
%92 = tail call i32 @urtw_8187_write_phy_ofdm(ptr noundef nonnull %0, i32 noundef 5, i32 noundef %91) #3
%93 = load ptr, ptr @urtw_8225_txpwr_ofdm, align 8, !tbaa !14
%94 = getelementptr inbounds i32, ptr %93, i64 %89
%95 = load i32, ptr %94, align 4, !tbaa !12
%96 = tail call i32 @urtw_8187_write_phy_ofdm(ptr noundef nonnull %0, i32 noundef 7, i32 noundef %95) #3
%97 = tail call i32 @usb_pause_mtx(ptr noundef nonnull %62, i32 noundef 1) #3
br label %98
98: ; preds = %2, %67
ret i64 %65
}
declare i32 @urtw_write8_m(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @urtw_8187_write_phy_cck(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @usb_pause_mtx(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @urtw_8185_set_anaparam2(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @urtw_8187_write_phy_ofdm(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"urtw_softc", !8, i64 0, !8, i64 8, !11, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !8, i64 8}
!14 = !{!8, !8, i64 0}
|
freebsd_sys_dev_usb_wlan_extr_if_urtw.c_urtw_8225_set_txpwrlvl
|
; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/krb5/extr_store_emem.c_emem_trunc.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/krb5/extr_store_emem.c_emem_trunc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { ptr, i64, ptr, i32 }
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @emem_trunc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @emem_trunc(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = inttoptr i64 %3 to ptr
%5 = icmp eq i32 %1, 0
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load ptr, ptr %4, align 8, !tbaa !10
%8 = tail call i32 @free(ptr noundef %7) #3
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %4, i8 0, i64 24, i1 false)
br label %38
9: ; preds = %2
%10 = sext i32 %1 to i64
%11 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 1
%12 = load i64, ptr %11, align 8, !tbaa !14
%13 = icmp ult i64 %12, %10
%14 = lshr i64 %12, 1
%15 = icmp ugt i64 %14, %10
%16 = or i1 %13, %15
%17 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 2
%18 = load ptr, ptr %17, align 8, !tbaa !15
%19 = load ptr, ptr %4, align 8, !tbaa !10
br i1 %16, label %20, label %38
20: ; preds = %9
%21 = ptrtoint ptr %18 to i64
%22 = ptrtoint ptr %19 to i64
%23 = sub i64 %21, %22
%24 = tail call ptr @realloc(ptr noundef %19, i32 noundef %1) #3
%25 = icmp eq ptr %24, null
br i1 %25, label %26, label %28
26: ; preds = %20
%27 = load i32, ptr @ENOMEM, align 4, !tbaa !16
br label %50
28: ; preds = %20
%29 = load i64, ptr %11, align 8, !tbaa !14
%30 = icmp ult i64 %29, %10
br i1 %30, label %31, label %36
31: ; preds = %28
%32 = getelementptr inbounds i8, ptr %24, i64 %29
%33 = trunc i64 %29 to i32
%34 = sub i32 %1, %33
%35 = tail call i32 @memset(ptr noundef nonnull %32, i32 noundef 0, i32 noundef %34) #3
br label %36
36: ; preds = %28, %31
store i64 %10, ptr %11, align 8, !tbaa !14
store ptr %24, ptr %4, align 8, !tbaa !10
%37 = getelementptr inbounds i8, ptr %24, i64 %23
store ptr %37, ptr %17, align 8, !tbaa !15
br label %38
38: ; preds = %9, %36, %6
%39 = phi i64 [ %10, %36 ], [ 0, %6 ], [ %10, %9 ]
%40 = phi ptr [ %24, %36 ], [ null, %6 ], [ %19, %9 ]
%41 = phi ptr [ %37, %36 ], [ null, %6 ], [ %18, %9 ]
%42 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 3
store i32 %1, ptr %42, align 8, !tbaa !17
%43 = ptrtoint ptr %41 to i64
%44 = ptrtoint ptr %40 to i64
%45 = sub i64 %43, %44
%46 = icmp sgt i64 %45, %39
br i1 %46, label %47, label %50
47: ; preds = %38
%48 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 2
%49 = getelementptr inbounds i8, ptr %40, i64 %39
store ptr %49, ptr %48, align 8, !tbaa !15
br label %50
50: ; preds = %26, %38, %47
%51 = phi i32 [ 0, %47 ], [ 0, %38 ], [ %27, %26 ]
ret i32 %51
}
declare i32 @free(ptr noundef) local_unnamed_addr #1
declare ptr @realloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_5__", !12, i64 0, !7, i64 8, !12, i64 16, !13, i64 24}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!11, !7, i64 8}
!15 = !{!11, !12, i64 16}
!16 = !{!13, !13, i64 0}
!17 = !{!11, !13, i64 24}
|
; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/krb5/extr_store_emem.c_emem_trunc.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/krb5/extr_store_emem.c_emem_trunc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @emem_trunc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @emem_trunc(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = inttoptr i64 %3 to ptr
%5 = icmp eq i32 %1, 0
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load ptr, ptr %4, align 8, !tbaa !11
%8 = tail call i32 @free(ptr noundef %7) #3
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %4, i8 0, i64 24, i1 false)
br label %38
9: ; preds = %2
%10 = sext i32 %1 to i64
%11 = getelementptr inbounds i8, ptr %4, i64 8
%12 = load i64, ptr %11, align 8, !tbaa !15
%13 = icmp ult i64 %12, %10
%14 = lshr i64 %12, 1
%15 = icmp ugt i64 %14, %10
%16 = or i1 %13, %15
%17 = getelementptr inbounds i8, ptr %4, i64 16
%18 = load ptr, ptr %17, align 8, !tbaa !16
%19 = load ptr, ptr %4, align 8, !tbaa !11
br i1 %16, label %20, label %38
20: ; preds = %9
%21 = ptrtoint ptr %18 to i64
%22 = ptrtoint ptr %19 to i64
%23 = sub i64 %21, %22
%24 = tail call ptr @realloc(ptr noundef %19, i32 noundef %1) #3
%25 = icmp eq ptr %24, null
br i1 %25, label %26, label %28
26: ; preds = %20
%27 = load i32, ptr @ENOMEM, align 4, !tbaa !17
br label %50
28: ; preds = %20
%29 = load i64, ptr %11, align 8, !tbaa !15
%30 = icmp ult i64 %29, %10
br i1 %30, label %31, label %36
31: ; preds = %28
%32 = getelementptr inbounds i8, ptr %24, i64 %29
%33 = trunc i64 %29 to i32
%34 = sub i32 %1, %33
%35 = tail call i32 @memset(ptr noundef nonnull %32, i32 noundef 0, i32 noundef %34) #3
br label %36
36: ; preds = %28, %31
store i64 %10, ptr %11, align 8, !tbaa !15
store ptr %24, ptr %4, align 8, !tbaa !11
%37 = getelementptr inbounds i8, ptr %24, i64 %23
store ptr %37, ptr %17, align 8, !tbaa !16
br label %38
38: ; preds = %9, %36, %6
%39 = phi i64 [ %10, %36 ], [ 0, %6 ], [ %10, %9 ]
%40 = phi ptr [ %24, %36 ], [ null, %6 ], [ %19, %9 ]
%41 = phi ptr [ %37, %36 ], [ null, %6 ], [ %18, %9 ]
%42 = getelementptr inbounds i8, ptr %4, i64 24
store i32 %1, ptr %42, align 8, !tbaa !18
%43 = ptrtoint ptr %41 to i64
%44 = ptrtoint ptr %40 to i64
%45 = sub i64 %43, %44
%46 = icmp sgt i64 %45, %39
br i1 %46, label %47, label %50
47: ; preds = %38
%48 = getelementptr inbounds i8, ptr %4, i64 16
%49 = getelementptr inbounds i8, ptr %40, i64 %39
store ptr %49, ptr %48, align 8, !tbaa !16
br label %50
50: ; preds = %26, %38, %47
%51 = phi i32 [ 0, %47 ], [ 0, %38 ], [ %27, %26 ]
ret i32 %51
}
declare i32 @free(ptr noundef) local_unnamed_addr #1
declare ptr @realloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_5__", !13, i64 0, !8, i64 8, !13, i64 16, !14, i64 24}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!12, !8, i64 8}
!16 = !{!12, !13, i64 16}
!17 = !{!14, !14, i64 0}
!18 = !{!12, !14, i64 24}
|
freebsd_crypto_heimdal_lib_krb5_extr_store_emem.c_emem_trunc
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/wireless/extr_nl80211.c_nl80211_get_interface.c'
source_filename = "AnghaBench/fastsocket/kernel/net/wireless/extr_nl80211.c_nl80211_get_interface.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.genl_info = type { i32, i32, ptr }
@NLMSG_DEFAULT_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@ENOBUFS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nl80211_get_interface], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nl80211_get_interface(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.genl_info, ptr %1, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = getelementptr inbounds ptr, ptr %4, i64 1
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = load i32, ptr @NLMSG_DEFAULT_SIZE, align 4, !tbaa !12
%9 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !12
%10 = tail call ptr @nlmsg_new(i32 noundef %8, i32 noundef %9) #2
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, ptr @ENOMEM, align 4, !tbaa !12
%14 = sub nsw i32 0, %13
br label %27
15: ; preds = %2
%16 = getelementptr inbounds %struct.genl_info, ptr %1, i64 0, i32 1
%17 = load i32, ptr %16, align 4, !tbaa !13
%18 = load i32, ptr %1, align 8, !tbaa !14
%19 = tail call i64 @nl80211_send_iface(ptr noundef nonnull %10, i32 noundef %17, i32 noundef %18, i32 noundef 0, ptr noundef %5, ptr noundef %7) #2
%20 = icmp slt i64 %19, 0
br i1 %20, label %21, label %25
21: ; preds = %15
%22 = tail call i32 @nlmsg_free(ptr noundef nonnull %10) #2
%23 = load i32, ptr @ENOBUFS, align 4, !tbaa !12
%24 = sub nsw i32 0, %23
br label %27
25: ; preds = %15
%26 = tail call i32 @genlmsg_reply(ptr noundef nonnull %10, ptr noundef nonnull %1) #2
br label %27
27: ; preds = %25, %21, %12
%28 = phi i32 [ %24, %21 ], [ %26, %25 ], [ %14, %12 ]
ret i32 %28
}
declare ptr @nlmsg_new(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @nl80211_send_iface(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nlmsg_free(ptr noundef) local_unnamed_addr #1
declare i32 @genlmsg_reply(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"genl_info", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 4}
!14 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/wireless/extr_nl80211.c_nl80211_get_interface.c'
source_filename = "AnghaBench/fastsocket/kernel/net/wireless/extr_nl80211.c_nl80211_get_interface.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NLMSG_DEFAULT_SIZE = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@ENOBUFS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nl80211_get_interface], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @nl80211_get_interface(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !12
%6 = getelementptr inbounds i8, ptr %4, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = load i32, ptr @NLMSG_DEFAULT_SIZE, align 4, !tbaa !13
%9 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !13
%10 = tail call ptr @nlmsg_new(i32 noundef %8, i32 noundef %9) #2
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, ptr @ENOMEM, align 4, !tbaa !13
%14 = sub nsw i32 0, %13
br label %27
15: ; preds = %2
%16 = getelementptr inbounds i8, ptr %1, i64 4
%17 = load i32, ptr %16, align 4, !tbaa !14
%18 = load i32, ptr %1, align 8, !tbaa !15
%19 = tail call i64 @nl80211_send_iface(ptr noundef nonnull %10, i32 noundef %17, i32 noundef %18, i32 noundef 0, ptr noundef %5, ptr noundef %7) #2
%20 = icmp slt i64 %19, 0
br i1 %20, label %21, label %25
21: ; preds = %15
%22 = tail call i32 @nlmsg_free(ptr noundef nonnull %10) #2
%23 = load i32, ptr @ENOBUFS, align 4, !tbaa !13
%24 = sub nsw i32 0, %23
br label %27
25: ; preds = %15
%26 = tail call i32 @genlmsg_reply(ptr noundef nonnull %10, ptr noundef nonnull %1) #2
br label %27
27: ; preds = %25, %21, %12
%28 = phi i32 [ %24, %21 ], [ %26, %25 ], [ %14, %12 ]
ret i32 %28
}
declare ptr @nlmsg_new(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @nl80211_send_iface(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nlmsg_free(ptr noundef) local_unnamed_addr #1
declare i32 @genlmsg_reply(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"genl_info", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !8, i64 4}
!15 = !{!7, !8, i64 0}
|
fastsocket_kernel_net_wireless_extr_nl80211.c_nl80211_get_interface
|
; ModuleID = 'AnghaBench/linux/net/batman-adv/extr_main.h_batadv_compare_eth.c'
source_filename = "AnghaBench/linux/net/batman-adv/extr_main.h_batadv_compare_eth.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @batadv_compare_eth], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @batadv_compare_eth(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @ether_addr_equal_unaligned(ptr noundef %0, ptr noundef %1) #2
ret i32 %3
}
declare i32 @ether_addr_equal_unaligned(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/net/batman-adv/extr_main.h_batadv_compare_eth.c'
source_filename = "AnghaBench/linux/net/batman-adv/extr_main.h_batadv_compare_eth.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @batadv_compare_eth], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @batadv_compare_eth(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @ether_addr_equal_unaligned(ptr noundef %0, ptr noundef %1) #2
ret i32 %3
}
declare i32 @ether_addr_equal_unaligned(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_net_batman-adv_extr_main.h_batadv_compare_eth
|
; ModuleID = 'AnghaBench/linux/net/dccp/extr_ackvec.c___ackvec_idx_add.c'
source_filename = "AnghaBench/linux/net/dccp/extr_ackvec.c___ackvec_idx_add.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DCCPAV_MAX_ACKVEC_LEN = dso_local local_unnamed_addr constant i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @__ackvec_idx_add], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal i32 @__ackvec_idx_add(i32 %0, i32 %1) #0 {
ret i32 poison
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/net/dccp/extr_ackvec.c___ackvec_idx_add.c'
source_filename = "AnghaBench/linux/net/dccp/extr_ackvec.c___ackvec_idx_add.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DCCPAV_MAX_ACKVEC_LEN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @__ackvec_idx_add], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @__ackvec_idx_add(i32 noundef %0, i32 noundef %1) #0 {
%3 = add nsw i32 %1, %0
%4 = load i32, ptr @DCCPAV_MAX_ACKVEC_LEN, align 4, !tbaa !6
%5 = srem i32 %3, %4
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_net_dccp_extr_ackvec.c___ackvec_idx_add
|
; ModuleID = 'AnghaBench/linux/drivers/media/pci/saa7134/extr_saa7134-go7007.c_saa7134_go7007_s_std.c'
source_filename = "AnghaBench/linux/drivers/media/pci/saa7134/extr_saa7134-go7007.c_saa7134_go7007_s_std.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @saa7134_go7007_s_std], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @saa7134_go7007_s_std(ptr nocapture readnone %0, i32 %1) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/media/pci/saa7134/extr_saa7134-go7007.c_saa7134_go7007_s_std.c'
source_filename = "AnghaBench/linux/drivers/media/pci/saa7134/extr_saa7134-go7007.c_saa7134_go7007_s_std.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @saa7134_go7007_s_std], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @saa7134_go7007_s_std(ptr nocapture readnone %0, i32 %1) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_media_pci_saa7134_extr_saa7134-go7007.c_saa7134_go7007_s_std
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/uwb/extr_whc-rc.c_whcrc_reset.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/uwb/extr_whc-rc.c_whcrc_reset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @whcrc_reset], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @whcrc_reset(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load i32, ptr %2, align 4, !tbaa !10
%4 = tail call i32 @umc_controller_reset(i32 noundef %3) #2
ret i32 %4
}
declare i32 @umc_controller_reset(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"uwb_rc", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"whcrc", !12, i64 0}
!12 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/uwb/extr_whc-rc.c_whcrc_reset.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/uwb/extr_whc-rc.c_whcrc_reset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @whcrc_reset], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @whcrc_reset(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr %2, align 4, !tbaa !11
%4 = tail call i32 @umc_controller_reset(i32 noundef %3) #2
ret i32 %4
}
declare i32 @umc_controller_reset(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"uwb_rc", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"whcrc", !13, i64 0}
!13 = !{!"int", !9, i64 0}
|
fastsocket_kernel_drivers_uwb_extr_whc-rc.c_whcrc_reset
|
; ModuleID = 'AnghaBench/freebsd/contrib/file/src/extr_cdf.c_cdf_tole8.c'
source_filename = "AnghaBench/freebsd/contrib/file/src/extr_cdf.c_cdf_tole8.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @cdf_tole8(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @CDF_TOLE8(i32 noundef %0) #2
ret i32 %2
}
declare i32 @CDF_TOLE8(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/file/src/extr_cdf.c_cdf_tole8.c'
source_filename = "AnghaBench/freebsd/contrib/file/src/extr_cdf.c_cdf_tole8.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @cdf_tole8(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @CDF_TOLE8(i32 noundef %0) #2
ret i32 %2
}
declare i32 @CDF_TOLE8(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_contrib_file_src_extr_cdf.c_cdf_tole8
|
; ModuleID = 'AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_subjRequiresPage.c'
source_filename = "AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_subjRequiresPage.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i64, ptr }
%struct.TYPE_7__ = type { i32, ptr }
%struct.TYPE_6__ = type { i64, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @subjRequiresPage], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @subjRequiresPage(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i64, ptr %0, align 8, !tbaa !11
%5 = load i32, ptr %3, align 8, !tbaa !12
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %28
7: ; preds = %1
%8 = getelementptr inbounds %struct.TYPE_7__, ptr %3, i64 0, i32 1
br label %9
9: ; preds = %7, %23
%10 = phi i32 [ %5, %7 ], [ %24, %23 ]
%11 = phi i64 [ 0, %7 ], [ %25, %23 ]
%12 = load ptr, ptr %8, align 8, !tbaa !15
%13 = getelementptr inbounds %struct.TYPE_6__, ptr %12, i64 %11
%14 = load i64, ptr %13, align 8, !tbaa !16
%15 = icmp slt i64 %14, %4
br i1 %15, label %23, label %16
16: ; preds = %9
%17 = getelementptr inbounds %struct.TYPE_6__, ptr %12, i64 %11, i32 1
%18 = load i32, ptr %17, align 8, !tbaa !18
%19 = tail call i64 @sqlite3BitvecTestNotNull(i32 noundef %18, i64 noundef %4) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %28, label %21
21: ; preds = %16
%22 = load i32, ptr %3, align 8, !tbaa !12
br label %23
23: ; preds = %21, %9
%24 = phi i32 [ %22, %21 ], [ %10, %9 ]
%25 = add nuw nsw i64 %11, 1
%26 = sext i32 %24 to i64
%27 = icmp slt i64 %25, %26
br i1 %27, label %9, label %28, !llvm.loop !19
28: ; preds = %16, %23, %1
%29 = phi i32 [ 0, %1 ], [ 0, %23 ], [ 1, %16 ]
ret i32 %29
}
declare i64 @sqlite3BitvecTestNotNull(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_5__", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_7__", !14, i64 0, !10, i64 8}
!14 = !{!"int", !8, i64 0}
!15 = !{!13, !10, i64 8}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_6__", !7, i64 0, !14, i64 8}
!18 = !{!17, !14, i64 8}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_subjRequiresPage.c'
source_filename = "AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_subjRequiresPage.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_6__ = type { i64, i32 }
@llvm.used = appending global [1 x ptr] [ptr @subjRequiresPage], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @subjRequiresPage(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i64, ptr %0, align 8, !tbaa !12
%5 = load i32, ptr %3, align 8, !tbaa !13
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %28
7: ; preds = %1
%8 = getelementptr inbounds i8, ptr %3, i64 8
br label %9
9: ; preds = %7, %23
%10 = phi i32 [ %5, %7 ], [ %24, %23 ]
%11 = phi i64 [ 0, %7 ], [ %25, %23 ]
%12 = load ptr, ptr %8, align 8, !tbaa !16
%13 = getelementptr inbounds %struct.TYPE_6__, ptr %12, i64 %11
%14 = load i64, ptr %13, align 8, !tbaa !17
%15 = icmp slt i64 %14, %4
br i1 %15, label %23, label %16
16: ; preds = %9
%17 = getelementptr inbounds i8, ptr %13, i64 8
%18 = load i32, ptr %17, align 8, !tbaa !19
%19 = tail call i64 @sqlite3BitvecTestNotNull(i32 noundef %18, i64 noundef %4) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %28, label %21
21: ; preds = %16
%22 = load i32, ptr %3, align 8, !tbaa !13
br label %23
23: ; preds = %21, %9
%24 = phi i32 [ %22, %21 ], [ %10, %9 ]
%25 = add nuw nsw i64 %11, 1
%26 = sext i32 %24 to i64
%27 = icmp slt i64 %25, %26
br i1 %27, label %9, label %28, !llvm.loop !20
28: ; preds = %16, %23, %1
%29 = phi i32 [ 0, %1 ], [ 0, %23 ], [ 1, %16 ]
ret i32 %29
}
declare i64 @sqlite3BitvecTestNotNull(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_5__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_7__", !15, i64 0, !11, i64 8}
!15 = !{!"int", !9, i64 0}
!16 = !{!14, !11, i64 8}
!17 = !{!18, !8, i64 0}
!18 = !{!"TYPE_6__", !8, i64 0, !15, i64 8}
!19 = !{!18, !15, i64 8}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
|
ccv_lib_3rdparty_sqlite3_extr_sqlite3.c_subjRequiresPage
|
; ModuleID = 'AnghaBench/libevent/extr_http.c_evhttp_uri_get_userinfo.c'
source_filename = "AnghaBench/libevent/extr_http.c_evhttp_uri_get_userinfo.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local ptr @evhttp_uri_get_userinfo(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"evhttp_uri", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/libevent/extr_http.c_evhttp_uri_get_userinfo.c'
source_filename = "AnghaBench/libevent/extr_http.c_evhttp_uri_get_userinfo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @evhttp_uri_get_userinfo(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"evhttp_uri", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
libevent_extr_http.c_evhttp_uri_get_userinfo
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/atm/extr_mpoa_caches.c_eg_cache_get_by_tag.c'
source_filename = "AnghaBench/fastsocket/kernel/net/atm/extr_mpoa_caches.c_eg_cache_get_by_tag.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mpoa_client = type { i32, ptr }
%struct.TYPE_5__ = type { ptr, i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @eg_cache_get_by_tag], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @eg_cache_get_by_tag(i64 noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @read_lock_irqsave(ptr noundef %1, i64 noundef undef) #2
%4 = getelementptr inbounds %struct.mpoa_client, ptr %1, i64 0, i32 1
br label %5
5: ; preds = %9, %2
%6 = phi ptr [ %4, %2 ], [ %7, %9 ]
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = icmp eq ptr %7, null
br i1 %8, label %16, label %9
9: ; preds = %5
%10 = getelementptr inbounds %struct.TYPE_5__, ptr %7, i64 0, i32 2
%11 = load i64, ptr %10, align 8, !tbaa !9
%12 = icmp eq i64 %11, %0
br i1 %12, label %13, label %5, !llvm.loop !14
13: ; preds = %9
%14 = getelementptr inbounds %struct.TYPE_5__, ptr %7, i64 0, i32 1
%15 = tail call i32 @atomic_inc(ptr noundef nonnull %14) #2
br label %16
16: ; preds = %5, %13
%17 = tail call i32 @read_unlock_irqrestore(ptr noundef %1, i64 noundef undef) #2
ret ptr %7
}
declare i32 @read_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
declare i32 @read_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 16}
!10 = !{!"TYPE_5__", !6, i64 0, !11, i64 8, !12, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/net/atm/extr_mpoa_caches.c_eg_cache_get_by_tag.c'
source_filename = "AnghaBench/fastsocket/kernel/net/atm/extr_mpoa_caches.c_eg_cache_get_by_tag.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @eg_cache_get_by_tag], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @eg_cache_get_by_tag(i64 noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @read_lock_irqsave(ptr noundef %1, i64 noundef undef) #2
%4 = getelementptr inbounds i8, ptr %1, i64 8
br label %5
5: ; preds = %9, %2
%6 = phi ptr [ %4, %2 ], [ %7, %9 ]
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = icmp eq ptr %7, null
br i1 %8, label %16, label %9
9: ; preds = %5
%10 = getelementptr inbounds i8, ptr %7, i64 16
%11 = load i64, ptr %10, align 8, !tbaa !10
%12 = icmp eq i64 %11, %0
br i1 %12, label %13, label %5, !llvm.loop !15
13: ; preds = %9
%14 = getelementptr inbounds i8, ptr %7, i64 8
%15 = tail call i32 @atomic_inc(ptr noundef nonnull %14) #2
br label %16
16: ; preds = %5, %13
%17 = tail call i32 @read_unlock_irqrestore(ptr noundef %1, i64 noundef undef) #2
ret ptr %7
}
declare i32 @read_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
declare i32 @read_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !14, i64 16}
!11 = !{!"TYPE_5__", !7, i64 0, !12, i64 8, !13, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
|
fastsocket_kernel_net_atm_extr_mpoa_caches.c_eg_cache_get_by_tag
|
; ModuleID = 'AnghaBench/linux/drivers/tty/serial/extr_fsl_lpuart.c_lpuart_copy_rx_to_tty.c'
source_filename = "AnghaBench/linux/drivers/tty/serial/extr_fsl_lpuart.c_lpuart_copy_rx_to_tty.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dma_tx_state = type { i64 }
%struct.lpuart_port = type { i64, i32, %struct.TYPE_8__, %struct.TYPE_9__, i32, i32, i32, %struct.circ_buf }
%struct.TYPE_8__ = type { i32, i32, %struct.TYPE_7__, i64, ptr }
%struct.TYPE_7__ = type { i32, i32, i32 }
%struct.TYPE_9__ = type { i64 }
%struct.circ_buf = type { i64, i64, i32 }
@UARTSTAT = dso_local local_unnamed_addr global i32 0, align 4
@UARTSTAT_PE = dso_local local_unnamed_addr global i64 0, align 8
@UARTSTAT_FE = dso_local local_unnamed_addr global i64 0, align 8
@UARTDATA = dso_local local_unnamed_addr global i32 0, align 4
@UARTSR1 = dso_local local_unnamed_addr global i64 0, align 8
@UARTSR1_PE = dso_local local_unnamed_addr global i8 0, align 1
@UARTSR1_FE = dso_local local_unnamed_addr global i8 0, align 1
@UARTCR2 = dso_local local_unnamed_addr global i64 0, align 8
@UARTCR2_RE = dso_local local_unnamed_addr global i8 0, align 1
@UARTDR = dso_local local_unnamed_addr global i64 0, align 8
@UARTSFIFO = dso_local local_unnamed_addr global i64 0, align 8
@UARTSFIFO_RXUF = dso_local local_unnamed_addr global i32 0, align 4
@UARTCFIFO_RXFLUSH = dso_local local_unnamed_addr global i8 0, align 1
@UARTCFIFO = dso_local local_unnamed_addr global i64 0, align 8
@DMA_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"Rx DMA transfer failed!\0A\00", align 1
@DMA_FROM_DEVICE = dso_local local_unnamed_addr global i32 0, align 4
@jiffies = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @lpuart_copy_rx_to_tty], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @lpuart_copy_rx_to_tty(ptr noundef %0) #0 {
%2 = alloca %struct.dma_tx_state, align 8
%3 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 2
%4 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 2, i32 4
%5 = load ptr, ptr %4, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%6 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 7
%7 = tail call i64 @lpuart_is_32(ptr noundef %0) #3
%8 = icmp eq i64 %7, 0
br i1 %8, label %35, label %9
9: ; preds = %1
%10 = load i32, ptr @UARTSTAT, align 4, !tbaa !16
%11 = tail call i64 @lpuart32_read(ptr noundef nonnull %3, i32 noundef %10) #3
%12 = load i64, ptr @UARTSTAT_PE, align 8, !tbaa !17
%13 = load i64, ptr @UARTSTAT_FE, align 8, !tbaa !17
%14 = or i64 %13, %12
%15 = and i64 %14, %11
%16 = icmp eq i64 %15, 0
br i1 %16, label %108, label %17
17: ; preds = %9
%18 = load i32, ptr @UARTDATA, align 4, !tbaa !16
%19 = tail call i64 @lpuart32_read(ptr noundef nonnull %3, i32 noundef %18) #3
%20 = load i64, ptr @UARTSTAT_PE, align 8, !tbaa !17
%21 = and i64 %20, %11
%22 = icmp eq i64 %21, 0
br i1 %22, label %27, label %23
23: ; preds = %17
%24 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 2, i32 2, i32 2
%25 = load i32, ptr %24, align 8, !tbaa !18
%26 = add nsw i32 %25, 1
store i32 %26, ptr %24, align 8, !tbaa !18
br label %108
27: ; preds = %17
%28 = load i64, ptr @UARTSTAT_FE, align 8, !tbaa !17
%29 = and i64 %28, %11
%30 = icmp eq i64 %29, 0
br i1 %30, label %108, label %31
31: ; preds = %27
%32 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 2, i32 2, i32 1
%33 = load i32, ptr %32, align 4, !tbaa !19
%34 = add nsw i32 %33, 1
store i32 %34, ptr %32, align 4, !tbaa !19
br label %108
35: ; preds = %1
%36 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 2, i32 3
%37 = load i64, ptr %36, align 8, !tbaa !20
%38 = load i64, ptr @UARTSR1, align 8, !tbaa !17
%39 = add nsw i64 %38, %37
%40 = tail call i32 @readb(i64 noundef %39) #3
%41 = load i8, ptr @UARTSR1_PE, align 1, !tbaa !21
%42 = load i8, ptr @UARTSR1_FE, align 1, !tbaa !21
%43 = or i8 %42, %41
%44 = zext i8 %43 to i32
%45 = and i32 %40, %44
%46 = icmp eq i32 %45, 0
br i1 %46, label %108, label %47
47: ; preds = %35
%48 = load i64, ptr %36, align 8, !tbaa !20
%49 = load i64, ptr @UARTCR2, align 8, !tbaa !17
%50 = add nsw i64 %49, %48
%51 = tail call i32 @readb(i64 noundef %50) #3
%52 = load i8, ptr @UARTCR2_RE, align 1, !tbaa !21
%53 = zext i8 %52 to i32
%54 = xor i32 %53, -1
%55 = and i32 %51, %54
%56 = trunc i32 %55 to i8
%57 = load i64, ptr %36, align 8, !tbaa !20
%58 = load i64, ptr @UARTCR2, align 8, !tbaa !17
%59 = add nsw i64 %58, %57
%60 = tail call i32 @writeb(i8 noundef zeroext %56, i64 noundef %59) #3
%61 = load i64, ptr %36, align 8, !tbaa !20
%62 = load i64, ptr @UARTDR, align 8, !tbaa !17
%63 = add nsw i64 %62, %61
%64 = tail call i32 @readb(i64 noundef %63) #3
%65 = load i8, ptr @UARTSR1_PE, align 1, !tbaa !21
%66 = zext i8 %65 to i32
%67 = and i32 %40, %66
%68 = icmp eq i32 %67, 0
br i1 %68, label %73, label %69
69: ; preds = %47
%70 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 2, i32 2, i32 2
%71 = load i32, ptr %70, align 8, !tbaa !18
%72 = add nsw i32 %71, 1
store i32 %72, ptr %70, align 8, !tbaa !18
br label %82
73: ; preds = %47
%74 = load i8, ptr @UARTSR1_FE, align 1, !tbaa !21
%75 = zext i8 %74 to i32
%76 = and i32 %40, %75
%77 = icmp eq i32 %76, 0
br i1 %77, label %82, label %78
78: ; preds = %73
%79 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 2, i32 2, i32 1
%80 = load i32, ptr %79, align 4, !tbaa !19
%81 = add nsw i32 %80, 1
store i32 %81, ptr %79, align 4, !tbaa !19
br label %82
82: ; preds = %73, %78, %69
%83 = load i64, ptr %36, align 8, !tbaa !20
%84 = load i64, ptr @UARTSFIFO, align 8, !tbaa !17
%85 = add nsw i64 %84, %83
%86 = tail call i32 @readb(i64 noundef %85) #3
%87 = load i32, ptr @UARTSFIFO_RXUF, align 4, !tbaa !16
%88 = and i32 %87, %86
%89 = icmp eq i32 %88, 0
br i1 %89, label %101, label %90
90: ; preds = %82
%91 = trunc i32 %87 to i8
%92 = load i64, ptr %36, align 8, !tbaa !20
%93 = load i64, ptr @UARTSFIFO, align 8, !tbaa !17
%94 = add nsw i64 %93, %92
%95 = tail call i32 @writeb(i8 noundef zeroext %91, i64 noundef %94) #3
%96 = load i8, ptr @UARTCFIFO_RXFLUSH, align 1, !tbaa !21
%97 = load i64, ptr %36, align 8, !tbaa !20
%98 = load i64, ptr @UARTCFIFO, align 8, !tbaa !17
%99 = add nsw i64 %98, %97
%100 = tail call i32 @writeb(i8 noundef zeroext %96, i64 noundef %99) #3
br label %101
101: ; preds = %90, %82
%102 = load i8, ptr @UARTCR2_RE, align 1, !tbaa !21
%103 = or i8 %102, %56
%104 = load i64, ptr %36, align 8, !tbaa !20
%105 = load i64, ptr @UARTCR2, align 8, !tbaa !17
%106 = add nsw i64 %105, %104
%107 = tail call i32 @writeb(i8 noundef zeroext %103, i64 noundef %106) #3
br label %108
108: ; preds = %35, %101, %9, %27, %31, %23
%109 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 6
%110 = load i32, ptr %109, align 8, !tbaa !22
%111 = tail call i32 @async_tx_ack(i32 noundef %110) #3
%112 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %3, i64 noundef undef) #3
%113 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 5
%114 = load i32, ptr %113, align 4, !tbaa !23
%115 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 4
%116 = load i32, ptr %115, align 8, !tbaa !24
%117 = call i32 @dmaengine_tx_status(i32 noundef %114, i32 noundef %116, ptr noundef nonnull %2) #3
%118 = load i32, ptr @DMA_ERROR, align 4, !tbaa !16
%119 = icmp eq i32 %117, %118
%120 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 2, i32 1
%121 = load i32, ptr %120, align 4, !tbaa !25
br i1 %119, label %122, label %125
122: ; preds = %108
%123 = call i32 @dev_err(i32 noundef %121, ptr noundef nonnull @.str) #3
%124 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %3, i64 noundef undef) #3
br label %184
125: ; preds = %108
%126 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 3
%127 = load i32, ptr @DMA_FROM_DEVICE, align 4, !tbaa !16
%128 = call i32 @dma_sync_sg_for_cpu(i32 noundef %121, ptr noundef nonnull %126, i32 noundef 1, i32 noundef %127) #3
%129 = load i64, ptr %126, align 8, !tbaa !26
%130 = load i64, ptr %2, align 8, !tbaa !27
%131 = sub nsw i64 %129, %130
store i64 %131, ptr %6, align 8, !tbaa !29
%132 = lshr i64 %130, 63
%133 = trunc i64 %132 to i32
%134 = call i32 @BUG_ON(i32 noundef %133) #3
%135 = load i64, ptr %6, align 8, !tbaa !29
%136 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 7, i32 1
%137 = load i64, ptr %136, align 8, !tbaa !30
%138 = icmp slt i64 %135, %137
br i1 %138, label %139, label %152
139: ; preds = %125
%140 = load i64, ptr %126, align 8, !tbaa !26
%141 = sub nsw i64 %140, %137
%142 = trunc i64 %141 to i32
%143 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 7, i32 2
%144 = load i32, ptr %143, align 8, !tbaa !31
%145 = trunc i64 %137 to i32
%146 = add i32 %144, %145
%147 = call i32 @tty_insert_flip_string(ptr noundef %5, i32 noundef %146, i32 noundef %142) #3
store i64 0, ptr %136, align 8, !tbaa !30
%148 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 2, i32 2
%149 = load i32, ptr %148, align 8, !tbaa !32
%150 = add nsw i32 %149, %142
store i32 %150, ptr %148, align 8, !tbaa !32
%151 = load i64, ptr %6, align 8, !tbaa !29
br label %152
152: ; preds = %139, %125
%153 = phi i64 [ %151, %139 ], [ %135, %125 ]
%154 = phi i64 [ 0, %139 ], [ %137, %125 ]
%155 = icmp slt i64 %154, %153
br i1 %155, label %156, label %173
156: ; preds = %152
%157 = sub nsw i64 %153, %154
%158 = trunc i64 %157 to i32
%159 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 7, i32 2
%160 = load i32, ptr %159, align 8, !tbaa !31
%161 = trunc i64 %154 to i32
%162 = add i32 %160, %161
%163 = call i32 @tty_insert_flip_string(ptr noundef %5, i32 noundef %162, i32 noundef %158) #3
%164 = load i64, ptr %6, align 8, !tbaa !29
%165 = load i64, ptr %126, align 8, !tbaa !26
%166 = icmp slt i64 %164, %165
br i1 %166, label %168, label %167
167: ; preds = %156
store i64 0, ptr %6, align 8, !tbaa !29
br label %168
168: ; preds = %167, %156
%169 = phi i64 [ 0, %167 ], [ %164, %156 ]
store i64 %169, ptr %136, align 8, !tbaa !30
%170 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 2, i32 2
%171 = load i32, ptr %170, align 8, !tbaa !32
%172 = add nsw i32 %171, %158
store i32 %172, ptr %170, align 8, !tbaa !32
br label %173
173: ; preds = %168, %152
%174 = load i32, ptr %120, align 4, !tbaa !25
%175 = load i32, ptr @DMA_FROM_DEVICE, align 4, !tbaa !16
%176 = call i32 @dma_sync_sg_for_device(i32 noundef %174, ptr noundef nonnull %126, i32 noundef 1, i32 noundef %175) #3
%177 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %3, i64 noundef undef) #3
%178 = call i32 @tty_flip_buffer_push(ptr noundef %5) #3
%179 = getelementptr inbounds %struct.lpuart_port, ptr %0, i64 0, i32 1
%180 = load i64, ptr @jiffies, align 8, !tbaa !17
%181 = load i64, ptr %0, align 8, !tbaa !33
%182 = add nsw i64 %181, %180
%183 = call i32 @mod_timer(ptr noundef nonnull %179, i64 noundef %182) #3
br label %184
184: ; preds = %173, %122
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @lpuart_is_32(ptr noundef) local_unnamed_addr #2
declare i64 @lpuart32_read(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @readb(i64 noundef) local_unnamed_addr #2
declare i32 @writeb(i8 noundef zeroext, i64 noundef) local_unnamed_addr #2
declare i32 @async_tx_ack(i32 noundef) local_unnamed_addr #2
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @dmaengine_tx_status(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @dma_sync_sg_for_cpu(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2
declare i32 @tty_insert_flip_string(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dma_sync_sg_for_device(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @tty_flip_buffer_push(ptr noundef) local_unnamed_addr #2
declare i32 @mod_timer(ptr noundef, i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !13, i64 48}
!6 = !{!"lpuart_port", !7, i64 0, !10, i64 8, !11, i64 16, !14, i64 56, !10, i64 64, !10, i64 68, !10, i64 72, !15, i64 80}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"TYPE_8__", !10, i64 0, !10, i64 4, !12, i64 8, !7, i64 24, !13, i64 32}
!12 = !{!"TYPE_7__", !10, i64 0, !10, i64 4, !10, i64 8}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"TYPE_9__", !7, i64 0}
!15 = !{!"circ_buf", !7, i64 0, !7, i64 8, !10, i64 16}
!16 = !{!10, !10, i64 0}
!17 = !{!7, !7, i64 0}
!18 = !{!6, !10, i64 32}
!19 = !{!6, !10, i64 28}
!20 = !{!6, !7, i64 40}
!21 = !{!8, !8, i64 0}
!22 = !{!6, !10, i64 72}
!23 = !{!6, !10, i64 68}
!24 = !{!6, !10, i64 64}
!25 = !{!6, !10, i64 20}
!26 = !{!6, !7, i64 56}
!27 = !{!28, !7, i64 0}
!28 = !{!"dma_tx_state", !7, i64 0}
!29 = !{!15, !7, i64 0}
!30 = !{!15, !7, i64 8}
!31 = !{!15, !10, i64 16}
!32 = !{!6, !10, i64 24}
!33 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/drivers/tty/serial/extr_fsl_lpuart.c_lpuart_copy_rx_to_tty.c'
source_filename = "AnghaBench/linux/drivers/tty/serial/extr_fsl_lpuart.c_lpuart_copy_rx_to_tty.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.dma_tx_state = type { i64 }
@UARTSTAT = common local_unnamed_addr global i32 0, align 4
@UARTSTAT_PE = common local_unnamed_addr global i64 0, align 8
@UARTSTAT_FE = common local_unnamed_addr global i64 0, align 8
@UARTDATA = common local_unnamed_addr global i32 0, align 4
@UARTSR1 = common local_unnamed_addr global i64 0, align 8
@UARTSR1_PE = common local_unnamed_addr global i8 0, align 1
@UARTSR1_FE = common local_unnamed_addr global i8 0, align 1
@UARTCR2 = common local_unnamed_addr global i64 0, align 8
@UARTCR2_RE = common local_unnamed_addr global i8 0, align 1
@UARTDR = common local_unnamed_addr global i64 0, align 8
@UARTSFIFO = common local_unnamed_addr global i64 0, align 8
@UARTSFIFO_RXUF = common local_unnamed_addr global i32 0, align 4
@UARTCFIFO_RXFLUSH = common local_unnamed_addr global i8 0, align 1
@UARTCFIFO = common local_unnamed_addr global i64 0, align 8
@DMA_ERROR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"Rx DMA transfer failed!\0A\00", align 1
@DMA_FROM_DEVICE = common local_unnamed_addr global i32 0, align 4
@jiffies = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @lpuart_copy_rx_to_tty], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @lpuart_copy_rx_to_tty(ptr noundef %0) #0 {
%2 = alloca %struct.dma_tx_state, align 8
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = getelementptr inbounds i8, ptr %0, i64 48
%5 = load ptr, ptr %4, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%6 = getelementptr inbounds i8, ptr %0, i64 80
%7 = tail call i64 @lpuart_is_32(ptr noundef %0) #3
%8 = icmp eq i64 %7, 0
br i1 %8, label %35, label %9
9: ; preds = %1
%10 = load i32, ptr @UARTSTAT, align 4, !tbaa !17
%11 = tail call i64 @lpuart32_read(ptr noundef nonnull %3, i32 noundef %10) #3
%12 = load i64, ptr @UARTSTAT_PE, align 8, !tbaa !18
%13 = load i64, ptr @UARTSTAT_FE, align 8, !tbaa !18
%14 = or i64 %13, %12
%15 = and i64 %14, %11
%16 = icmp eq i64 %15, 0
br i1 %16, label %108, label %17
17: ; preds = %9
%18 = load i32, ptr @UARTDATA, align 4, !tbaa !17
%19 = tail call i64 @lpuart32_read(ptr noundef nonnull %3, i32 noundef %18) #3
%20 = load i64, ptr @UARTSTAT_PE, align 8, !tbaa !18
%21 = and i64 %20, %11
%22 = icmp eq i64 %21, 0
br i1 %22, label %27, label %23
23: ; preds = %17
%24 = getelementptr inbounds i8, ptr %0, i64 32
%25 = load i32, ptr %24, align 8, !tbaa !19
%26 = add nsw i32 %25, 1
store i32 %26, ptr %24, align 8, !tbaa !19
br label %108
27: ; preds = %17
%28 = load i64, ptr @UARTSTAT_FE, align 8, !tbaa !18
%29 = and i64 %28, %11
%30 = icmp eq i64 %29, 0
br i1 %30, label %108, label %31
31: ; preds = %27
%32 = getelementptr inbounds i8, ptr %0, i64 28
%33 = load i32, ptr %32, align 4, !tbaa !20
%34 = add nsw i32 %33, 1
store i32 %34, ptr %32, align 4, !tbaa !20
br label %108
35: ; preds = %1
%36 = getelementptr inbounds i8, ptr %0, i64 40
%37 = load i64, ptr %36, align 8, !tbaa !21
%38 = load i64, ptr @UARTSR1, align 8, !tbaa !18
%39 = add nsw i64 %38, %37
%40 = tail call i32 @readb(i64 noundef %39) #3
%41 = load i8, ptr @UARTSR1_PE, align 1, !tbaa !22
%42 = load i8, ptr @UARTSR1_FE, align 1, !tbaa !22
%43 = or i8 %42, %41
%44 = zext i8 %43 to i32
%45 = and i32 %40, %44
%46 = icmp eq i32 %45, 0
br i1 %46, label %108, label %47
47: ; preds = %35
%48 = load i64, ptr %36, align 8, !tbaa !21
%49 = load i64, ptr @UARTCR2, align 8, !tbaa !18
%50 = add nsw i64 %49, %48
%51 = tail call i32 @readb(i64 noundef %50) #3
%52 = load i8, ptr @UARTCR2_RE, align 1, !tbaa !22
%53 = zext i8 %52 to i32
%54 = xor i32 %53, -1
%55 = and i32 %51, %54
%56 = trunc i32 %55 to i8
%57 = load i64, ptr %36, align 8, !tbaa !21
%58 = load i64, ptr @UARTCR2, align 8, !tbaa !18
%59 = add nsw i64 %58, %57
%60 = tail call i32 @writeb(i8 noundef zeroext %56, i64 noundef %59) #3
%61 = load i64, ptr %36, align 8, !tbaa !21
%62 = load i64, ptr @UARTDR, align 8, !tbaa !18
%63 = add nsw i64 %62, %61
%64 = tail call i32 @readb(i64 noundef %63) #3
%65 = load i8, ptr @UARTSR1_PE, align 1, !tbaa !22
%66 = zext i8 %65 to i32
%67 = and i32 %40, %66
%68 = icmp eq i32 %67, 0
br i1 %68, label %73, label %69
69: ; preds = %47
%70 = getelementptr inbounds i8, ptr %0, i64 32
%71 = load i32, ptr %70, align 8, !tbaa !19
%72 = add nsw i32 %71, 1
store i32 %72, ptr %70, align 8, !tbaa !19
br label %82
73: ; preds = %47
%74 = load i8, ptr @UARTSR1_FE, align 1, !tbaa !22
%75 = zext i8 %74 to i32
%76 = and i32 %40, %75
%77 = icmp eq i32 %76, 0
br i1 %77, label %82, label %78
78: ; preds = %73
%79 = getelementptr inbounds i8, ptr %0, i64 28
%80 = load i32, ptr %79, align 4, !tbaa !20
%81 = add nsw i32 %80, 1
store i32 %81, ptr %79, align 4, !tbaa !20
br label %82
82: ; preds = %73, %78, %69
%83 = load i64, ptr %36, align 8, !tbaa !21
%84 = load i64, ptr @UARTSFIFO, align 8, !tbaa !18
%85 = add nsw i64 %84, %83
%86 = tail call i32 @readb(i64 noundef %85) #3
%87 = load i32, ptr @UARTSFIFO_RXUF, align 4, !tbaa !17
%88 = and i32 %87, %86
%89 = icmp eq i32 %88, 0
br i1 %89, label %101, label %90
90: ; preds = %82
%91 = trunc i32 %87 to i8
%92 = load i64, ptr %36, align 8, !tbaa !21
%93 = load i64, ptr @UARTSFIFO, align 8, !tbaa !18
%94 = add nsw i64 %93, %92
%95 = tail call i32 @writeb(i8 noundef zeroext %91, i64 noundef %94) #3
%96 = load i8, ptr @UARTCFIFO_RXFLUSH, align 1, !tbaa !22
%97 = load i64, ptr %36, align 8, !tbaa !21
%98 = load i64, ptr @UARTCFIFO, align 8, !tbaa !18
%99 = add nsw i64 %98, %97
%100 = tail call i32 @writeb(i8 noundef zeroext %96, i64 noundef %99) #3
br label %101
101: ; preds = %90, %82
%102 = load i8, ptr @UARTCR2_RE, align 1, !tbaa !22
%103 = or i8 %102, %56
%104 = load i64, ptr %36, align 8, !tbaa !21
%105 = load i64, ptr @UARTCR2, align 8, !tbaa !18
%106 = add nsw i64 %105, %104
%107 = tail call i32 @writeb(i8 noundef zeroext %103, i64 noundef %106) #3
br label %108
108: ; preds = %35, %101, %9, %27, %31, %23
%109 = getelementptr inbounds i8, ptr %0, i64 72
%110 = load i32, ptr %109, align 8, !tbaa !23
%111 = tail call i32 @async_tx_ack(i32 noundef %110) #3
%112 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %3, i64 noundef undef) #3
%113 = getelementptr inbounds i8, ptr %0, i64 68
%114 = load i32, ptr %113, align 4, !tbaa !24
%115 = getelementptr inbounds i8, ptr %0, i64 64
%116 = load i32, ptr %115, align 8, !tbaa !25
%117 = call i32 @dmaengine_tx_status(i32 noundef %114, i32 noundef %116, ptr noundef nonnull %2) #3
%118 = load i32, ptr @DMA_ERROR, align 4, !tbaa !17
%119 = icmp eq i32 %117, %118
%120 = getelementptr inbounds i8, ptr %0, i64 20
%121 = load i32, ptr %120, align 4, !tbaa !26
br i1 %119, label %122, label %125
122: ; preds = %108
%123 = call i32 @dev_err(i32 noundef %121, ptr noundef nonnull @.str) #3
%124 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %3, i64 noundef undef) #3
br label %184
125: ; preds = %108
%126 = getelementptr inbounds i8, ptr %0, i64 56
%127 = load i32, ptr @DMA_FROM_DEVICE, align 4, !tbaa !17
%128 = call i32 @dma_sync_sg_for_cpu(i32 noundef %121, ptr noundef nonnull %126, i32 noundef 1, i32 noundef %127) #3
%129 = load i64, ptr %126, align 8, !tbaa !27
%130 = load i64, ptr %2, align 8, !tbaa !28
%131 = sub nsw i64 %129, %130
store i64 %131, ptr %6, align 8, !tbaa !30
%132 = lshr i64 %130, 63
%133 = trunc nuw nsw i64 %132 to i32
%134 = call i32 @BUG_ON(i32 noundef %133) #3
%135 = load i64, ptr %6, align 8, !tbaa !30
%136 = getelementptr inbounds i8, ptr %0, i64 88
%137 = load i64, ptr %136, align 8, !tbaa !31
%138 = icmp slt i64 %135, %137
br i1 %138, label %139, label %152
139: ; preds = %125
%140 = load i64, ptr %126, align 8, !tbaa !27
%141 = sub nsw i64 %140, %137
%142 = trunc i64 %141 to i32
%143 = getelementptr inbounds i8, ptr %0, i64 96
%144 = load i32, ptr %143, align 8, !tbaa !32
%145 = trunc i64 %137 to i32
%146 = add i32 %144, %145
%147 = call i32 @tty_insert_flip_string(ptr noundef %5, i32 noundef %146, i32 noundef %142) #3
store i64 0, ptr %136, align 8, !tbaa !31
%148 = getelementptr inbounds i8, ptr %0, i64 24
%149 = load i32, ptr %148, align 8, !tbaa !33
%150 = add nsw i32 %149, %142
store i32 %150, ptr %148, align 8, !tbaa !33
%151 = load i64, ptr %6, align 8, !tbaa !30
br label %152
152: ; preds = %139, %125
%153 = phi i64 [ %151, %139 ], [ %135, %125 ]
%154 = phi i64 [ 0, %139 ], [ %137, %125 ]
%155 = icmp slt i64 %154, %153
br i1 %155, label %156, label %173
156: ; preds = %152
%157 = sub nsw i64 %153, %154
%158 = trunc i64 %157 to i32
%159 = getelementptr inbounds i8, ptr %0, i64 96
%160 = load i32, ptr %159, align 8, !tbaa !32
%161 = trunc i64 %154 to i32
%162 = add i32 %160, %161
%163 = call i32 @tty_insert_flip_string(ptr noundef %5, i32 noundef %162, i32 noundef %158) #3
%164 = load i64, ptr %6, align 8, !tbaa !30
%165 = load i64, ptr %126, align 8, !tbaa !27
%166 = icmp slt i64 %164, %165
br i1 %166, label %168, label %167
167: ; preds = %156
store i64 0, ptr %6, align 8, !tbaa !30
br label %168
168: ; preds = %167, %156
%169 = phi i64 [ 0, %167 ], [ %164, %156 ]
store i64 %169, ptr %136, align 8, !tbaa !31
%170 = getelementptr inbounds i8, ptr %0, i64 24
%171 = load i32, ptr %170, align 8, !tbaa !33
%172 = add nsw i32 %171, %158
store i32 %172, ptr %170, align 8, !tbaa !33
br label %173
173: ; preds = %168, %152
%174 = load i32, ptr %120, align 4, !tbaa !26
%175 = load i32, ptr @DMA_FROM_DEVICE, align 4, !tbaa !17
%176 = call i32 @dma_sync_sg_for_device(i32 noundef %174, ptr noundef nonnull %126, i32 noundef 1, i32 noundef %175) #3
%177 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %3, i64 noundef undef) #3
%178 = call i32 @tty_flip_buffer_push(ptr noundef %5) #3
%179 = getelementptr inbounds i8, ptr %0, i64 8
%180 = load i64, ptr @jiffies, align 8, !tbaa !18
%181 = load i64, ptr %0, align 8, !tbaa !34
%182 = add nsw i64 %181, %180
%183 = call i32 @mod_timer(ptr noundef nonnull %179, i64 noundef %182) #3
br label %184
184: ; preds = %173, %122
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @lpuart_is_32(ptr noundef) local_unnamed_addr #2
declare i64 @lpuart32_read(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @readb(i64 noundef) local_unnamed_addr #2
declare i32 @writeb(i8 noundef zeroext, i64 noundef) local_unnamed_addr #2
declare i32 @async_tx_ack(i32 noundef) local_unnamed_addr #2
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @dmaengine_tx_status(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @dma_sync_sg_for_cpu(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2
declare i32 @tty_insert_flip_string(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dma_sync_sg_for_device(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @tty_flip_buffer_push(ptr noundef) local_unnamed_addr #2
declare i32 @mod_timer(ptr noundef, i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !14, i64 48}
!7 = !{!"lpuart_port", !8, i64 0, !11, i64 8, !12, i64 16, !15, i64 56, !11, i64 64, !11, i64 68, !11, i64 72, !16, i64 80}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"TYPE_8__", !11, i64 0, !11, i64 4, !13, i64 8, !8, i64 24, !14, i64 32}
!13 = !{!"TYPE_7__", !11, i64 0, !11, i64 4, !11, i64 8}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!"TYPE_9__", !8, i64 0}
!16 = !{!"circ_buf", !8, i64 0, !8, i64 8, !11, i64 16}
!17 = !{!11, !11, i64 0}
!18 = !{!8, !8, i64 0}
!19 = !{!7, !11, i64 32}
!20 = !{!7, !11, i64 28}
!21 = !{!7, !8, i64 40}
!22 = !{!9, !9, i64 0}
!23 = !{!7, !11, i64 72}
!24 = !{!7, !11, i64 68}
!25 = !{!7, !11, i64 64}
!26 = !{!7, !11, i64 20}
!27 = !{!7, !8, i64 56}
!28 = !{!29, !8, i64 0}
!29 = !{!"dma_tx_state", !8, i64 0}
!30 = !{!16, !8, i64 0}
!31 = !{!16, !8, i64 8}
!32 = !{!16, !11, i64 16}
!33 = !{!7, !11, i64 24}
!34 = !{!7, !8, i64 0}
|
linux_drivers_tty_serial_extr_fsl_lpuart.c_lpuart_copy_rx_to_tty
|
; ModuleID = 'AnghaBench/linux/arch/xtensa/platforms/iss/extr_simdisk.c_simdisk_transfer.c'
source_filename = "AnghaBench/linux/arch/xtensa/platforms/iss/extr_simdisk.c_simdisk_transfer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.simdisk = type { i64, i32, i32 }
@SECTOR_SHIFT = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [25 x i8] c"Beyond-end %s (%ld %ld)\0A\00", align 1
@.str.1 = private unnamed_addr constant [6 x i8] c"write\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"read\00", align 1
@SEEK_SET = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [22 x i8] c"SIMDISK: IO error %d\0A\00", align 1
@errno = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @simdisk_transfer], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @simdisk_transfer(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, i32 noundef %4) #0 {
%6 = load i64, ptr @SECTOR_SHIFT, align 8, !tbaa !5
%7 = shl i64 %1, %6
%8 = shl i64 %2, %6
%9 = load i64, ptr %0, align 8, !tbaa !9
%10 = icmp ugt i64 %7, %9
%11 = sub i64 %9, %7
%12 = icmp ult i64 %11, %8
%13 = select i1 %10, i1 true, i1 %12
br i1 %13, label %14, label %18
14: ; preds = %5
%15 = icmp eq i32 %4, 0
%16 = select i1 %15, ptr @.str.2, ptr @.str.1
%17 = tail call i32 @pr_notice(ptr noundef nonnull @.str, ptr noundef nonnull %16, i64 noundef %7, i64 noundef %8) #2
br label %52
18: ; preds = %5
%19 = getelementptr inbounds %struct.simdisk, ptr %0, i64 0, i32 1
%20 = tail call i32 @spin_lock(ptr noundef nonnull %19) #2
%21 = icmp eq i64 %8, 0
br i1 %21, label %50, label %22
22: ; preds = %18
%23 = getelementptr inbounds %struct.simdisk, ptr %0, i64 0, i32 2
%24 = icmp eq i32 %4, 0
br label %25
25: ; preds = %22, %45
%26 = phi i64 [ %8, %22 ], [ %48, %45 ]
%27 = phi i64 [ %7, %22 ], [ %47, %45 ]
%28 = phi ptr [ %3, %22 ], [ %46, %45 ]
%29 = load i32, ptr %23, align 4, !tbaa !12
%30 = load i32, ptr @SEEK_SET, align 4, !tbaa !13
%31 = tail call i32 @simc_lseek(i32 noundef %29, i64 noundef %27, i32 noundef %30) #2
%32 = load i8, ptr %28, align 1, !tbaa !14
%33 = tail call i32 @READ_ONCE(i8 noundef signext %32) #2
%34 = load i32, ptr %23, align 4, !tbaa !12
br i1 %24, label %37, label %35
35: ; preds = %25
%36 = tail call i64 @simc_write(i32 noundef %34, ptr noundef nonnull %28, i64 noundef %26) #2
br label %39
37: ; preds = %25
%38 = tail call i64 @simc_read(i32 noundef %34, ptr noundef nonnull %28, i64 noundef %26) #2
br label %39
39: ; preds = %37, %35
%40 = phi i64 [ %36, %35 ], [ %38, %37 ]
%41 = icmp eq i64 %40, -1
br i1 %41, label %42, label %45
42: ; preds = %39
%43 = load i32, ptr @errno, align 4, !tbaa !13
%44 = tail call i32 @pr_err(ptr noundef nonnull @.str.3, i32 noundef %43) #2
br label %50
45: ; preds = %39
%46 = getelementptr inbounds i8, ptr %28, i64 %40
%47 = add i64 %40, %27
%48 = sub i64 %26, %40
%49 = icmp eq i64 %48, 0
br i1 %49, label %50, label %25
50: ; preds = %45, %18, %42
%51 = tail call i32 @spin_unlock(ptr noundef nonnull %19) #2
br label %52
52: ; preds = %50, %14
ret void
}
declare i32 @pr_notice(ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @simc_lseek(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @READ_ONCE(i8 noundef signext) local_unnamed_addr #1
declare i64 @simc_write(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @simc_read(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"simdisk", !6, i64 0, !11, i64 8, !11, i64 12}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 12}
!13 = !{!11, !11, i64 0}
!14 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/linux/arch/xtensa/platforms/iss/extr_simdisk.c_simdisk_transfer.c'
source_filename = "AnghaBench/linux/arch/xtensa/platforms/iss/extr_simdisk.c_simdisk_transfer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SECTOR_SHIFT = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [25 x i8] c"Beyond-end %s (%ld %ld)\0A\00", align 1
@.str.1 = private unnamed_addr constant [6 x i8] c"write\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"read\00", align 1
@SEEK_SET = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [22 x i8] c"SIMDISK: IO error %d\0A\00", align 1
@errno = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @simdisk_transfer], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @simdisk_transfer(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, i32 noundef %4) #0 {
%6 = load i64, ptr @SECTOR_SHIFT, align 8, !tbaa !6
%7 = shl i64 %1, %6
%8 = shl i64 %2, %6
%9 = load i64, ptr %0, align 8, !tbaa !10
%10 = icmp ugt i64 %7, %9
%11 = sub i64 %9, %7
%12 = icmp ult i64 %11, %8
%13 = select i1 %10, i1 true, i1 %12
br i1 %13, label %14, label %18
14: ; preds = %5
%15 = icmp eq i32 %4, 0
%16 = select i1 %15, ptr @.str.2, ptr @.str.1
%17 = tail call i32 @pr_notice(ptr noundef nonnull @.str, ptr noundef nonnull %16, i64 noundef %7, i64 noundef %8) #2
br label %52
18: ; preds = %5
%19 = getelementptr inbounds i8, ptr %0, i64 8
%20 = tail call i32 @spin_lock(ptr noundef nonnull %19) #2
%21 = icmp eq i64 %8, 0
br i1 %21, label %50, label %22
22: ; preds = %18
%23 = getelementptr inbounds i8, ptr %0, i64 12
%24 = icmp eq i32 %4, 0
br label %25
25: ; preds = %22, %45
%26 = phi i64 [ %8, %22 ], [ %48, %45 ]
%27 = phi i64 [ %7, %22 ], [ %47, %45 ]
%28 = phi ptr [ %3, %22 ], [ %46, %45 ]
%29 = load i32, ptr %23, align 4, !tbaa !13
%30 = load i32, ptr @SEEK_SET, align 4, !tbaa !14
%31 = tail call i32 @simc_lseek(i32 noundef %29, i64 noundef %27, i32 noundef %30) #2
%32 = load i8, ptr %28, align 1, !tbaa !15
%33 = tail call i32 @READ_ONCE(i8 noundef signext %32) #2
%34 = load i32, ptr %23, align 4, !tbaa !13
br i1 %24, label %37, label %35
35: ; preds = %25
%36 = tail call i64 @simc_write(i32 noundef %34, ptr noundef nonnull %28, i64 noundef %26) #2
br label %39
37: ; preds = %25
%38 = tail call i64 @simc_read(i32 noundef %34, ptr noundef nonnull %28, i64 noundef %26) #2
br label %39
39: ; preds = %37, %35
%40 = phi i64 [ %36, %35 ], [ %38, %37 ]
%41 = icmp eq i64 %40, -1
br i1 %41, label %42, label %45
42: ; preds = %39
%43 = load i32, ptr @errno, align 4, !tbaa !14
%44 = tail call i32 @pr_err(ptr noundef nonnull @.str.3, i32 noundef %43) #2
br label %50
45: ; preds = %39
%46 = getelementptr inbounds i8, ptr %28, i64 %40
%47 = add i64 %40, %27
%48 = sub i64 %26, %40
%49 = icmp eq i64 %48, 0
br i1 %49, label %50, label %25
50: ; preds = %45, %18, %42
%51 = tail call i32 @spin_unlock(ptr noundef nonnull %19) #2
br label %52
52: ; preds = %50, %14
ret void
}
declare i32 @pr_notice(ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @simc_lseek(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @READ_ONCE(i8 noundef signext) local_unnamed_addr #1
declare i64 @simc_write(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @simc_read(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"simdisk", !7, i64 0, !12, i64 8, !12, i64 12}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 12}
!14 = !{!12, !12, i64 0}
!15 = !{!8, !8, i64 0}
|
linux_arch_xtensa_platforms_iss_extr_simdisk.c_simdisk_transfer
|
; ModuleID = 'AnghaBench/linux/drivers/target/extr_target_core_transport.c_release_se_kmem_caches.c'
source_filename = "AnghaBench/linux/drivers/target/extr_target_core_transport.c_release_se_kmem_caches.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@target_completion_wq = dso_local local_unnamed_addr global i32 0, align 4
@se_sess_cache = dso_local local_unnamed_addr global i32 0, align 4
@se_ua_cache = dso_local local_unnamed_addr global i32 0, align 4
@t10_pr_reg_cache = dso_local local_unnamed_addr global i32 0, align 4
@t10_alua_lu_gp_cache = dso_local local_unnamed_addr global i32 0, align 4
@t10_alua_lu_gp_mem_cache = dso_local local_unnamed_addr global i32 0, align 4
@t10_alua_tg_pt_gp_cache = dso_local local_unnamed_addr global i32 0, align 4
@t10_alua_lba_map_cache = dso_local local_unnamed_addr global i32 0, align 4
@t10_alua_lba_map_mem_cache = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @release_se_kmem_caches() local_unnamed_addr #0 {
%1 = load i32, ptr @target_completion_wq, align 4, !tbaa !5
%2 = tail call i32 @destroy_workqueue(i32 noundef %1) #2
%3 = load i32, ptr @se_sess_cache, align 4, !tbaa !5
%4 = tail call i32 @kmem_cache_destroy(i32 noundef %3) #2
%5 = load i32, ptr @se_ua_cache, align 4, !tbaa !5
%6 = tail call i32 @kmem_cache_destroy(i32 noundef %5) #2
%7 = load i32, ptr @t10_pr_reg_cache, align 4, !tbaa !5
%8 = tail call i32 @kmem_cache_destroy(i32 noundef %7) #2
%9 = load i32, ptr @t10_alua_lu_gp_cache, align 4, !tbaa !5
%10 = tail call i32 @kmem_cache_destroy(i32 noundef %9) #2
%11 = load i32, ptr @t10_alua_lu_gp_mem_cache, align 4, !tbaa !5
%12 = tail call i32 @kmem_cache_destroy(i32 noundef %11) #2
%13 = load i32, ptr @t10_alua_tg_pt_gp_cache, align 4, !tbaa !5
%14 = tail call i32 @kmem_cache_destroy(i32 noundef %13) #2
%15 = load i32, ptr @t10_alua_lba_map_cache, align 4, !tbaa !5
%16 = tail call i32 @kmem_cache_destroy(i32 noundef %15) #2
%17 = load i32, ptr @t10_alua_lba_map_mem_cache, align 4, !tbaa !5
%18 = tail call i32 @kmem_cache_destroy(i32 noundef %17) #2
ret void
}
declare i32 @destroy_workqueue(i32 noundef) local_unnamed_addr #1
declare i32 @kmem_cache_destroy(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/target/extr_target_core_transport.c_release_se_kmem_caches.c'
source_filename = "AnghaBench/linux/drivers/target/extr_target_core_transport.c_release_se_kmem_caches.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@target_completion_wq = common local_unnamed_addr global i32 0, align 4
@se_sess_cache = common local_unnamed_addr global i32 0, align 4
@se_ua_cache = common local_unnamed_addr global i32 0, align 4
@t10_pr_reg_cache = common local_unnamed_addr global i32 0, align 4
@t10_alua_lu_gp_cache = common local_unnamed_addr global i32 0, align 4
@t10_alua_lu_gp_mem_cache = common local_unnamed_addr global i32 0, align 4
@t10_alua_tg_pt_gp_cache = common local_unnamed_addr global i32 0, align 4
@t10_alua_lba_map_cache = common local_unnamed_addr global i32 0, align 4
@t10_alua_lba_map_mem_cache = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @release_se_kmem_caches() local_unnamed_addr #0 {
%1 = load i32, ptr @target_completion_wq, align 4, !tbaa !6
%2 = tail call i32 @destroy_workqueue(i32 noundef %1) #2
%3 = load i32, ptr @se_sess_cache, align 4, !tbaa !6
%4 = tail call i32 @kmem_cache_destroy(i32 noundef %3) #2
%5 = load i32, ptr @se_ua_cache, align 4, !tbaa !6
%6 = tail call i32 @kmem_cache_destroy(i32 noundef %5) #2
%7 = load i32, ptr @t10_pr_reg_cache, align 4, !tbaa !6
%8 = tail call i32 @kmem_cache_destroy(i32 noundef %7) #2
%9 = load i32, ptr @t10_alua_lu_gp_cache, align 4, !tbaa !6
%10 = tail call i32 @kmem_cache_destroy(i32 noundef %9) #2
%11 = load i32, ptr @t10_alua_lu_gp_mem_cache, align 4, !tbaa !6
%12 = tail call i32 @kmem_cache_destroy(i32 noundef %11) #2
%13 = load i32, ptr @t10_alua_tg_pt_gp_cache, align 4, !tbaa !6
%14 = tail call i32 @kmem_cache_destroy(i32 noundef %13) #2
%15 = load i32, ptr @t10_alua_lba_map_cache, align 4, !tbaa !6
%16 = tail call i32 @kmem_cache_destroy(i32 noundef %15) #2
%17 = load i32, ptr @t10_alua_lba_map_mem_cache, align 4, !tbaa !6
%18 = tail call i32 @kmem_cache_destroy(i32 noundef %17) #2
ret void
}
declare i32 @destroy_workqueue(i32 noundef) local_unnamed_addr #1
declare i32 @kmem_cache_destroy(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_target_extr_target_core_transport.c_release_se_kmem_caches
|
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_repos/extr_deprecated.c_svn_repos_load_fs4.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_repos/extr_deprecated.c_svn_repos_load_fs4.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @svn_repos_load_fs4(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, ptr noundef %10, i32 noundef %11, ptr noundef %12, ptr noundef %13) local_unnamed_addr #0 {
%15 = load i32, ptr @FALSE, align 4, !tbaa !5
%16 = tail call ptr @svn_repos_load_fs5(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %7, i32 noundef %7, i32 noundef %8, i32 noundef %15, i32 noundef %9, ptr noundef %10, i32 noundef %11, ptr noundef %12, ptr noundef %13) #2
ret ptr %16
}
declare ptr @svn_repos_load_fs5(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_repos/extr_deprecated.c_svn_repos_load_fs4.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_repos/extr_deprecated.c_svn_repos_load_fs4.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FALSE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @svn_repos_load_fs4(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, ptr noundef %10, i32 noundef %11, ptr noundef %12, ptr noundef %13) local_unnamed_addr #0 {
%15 = load i32, ptr @FALSE, align 4, !tbaa !6
%16 = tail call ptr @svn_repos_load_fs5(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %7, i32 noundef %7, i32 noundef %8, i32 noundef %15, i32 noundef %9, ptr noundef %10, i32 noundef %11, ptr noundef %12, ptr noundef %13) #2
ret ptr %16
}
declare ptr @svn_repos_load_fs5(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_contrib_subversion_subversion_libsvn_repos_extr_deprecated.c_svn_repos_load_fs4
|
; ModuleID = 'AnghaBench/raspberry-pi-os/exercises/lesson02/2/evopen/src/extr_mini_uart.c_uart_recv.c'
source_filename = "AnghaBench/raspberry-pi-os/exercises/lesson02/2/evopen/src/extr_mini_uart.c_uart_recv.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AUX_MU_LSR_REG = dso_local local_unnamed_addr global i32 0, align 4
@AUX_MU_IO_REG = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local signext i8 @uart_recv() local_unnamed_addr #0 {
br label %1
1: ; preds = %1, %0
%2 = load i32, ptr @AUX_MU_LSR_REG, align 4, !tbaa !5
%3 = tail call i32 @get32(i32 noundef %2) #2
%4 = and i32 %3, 1
%5 = icmp eq i32 %4, 0
br i1 %5, label %1, label %6
6: ; preds = %1
%7 = load i32, ptr @AUX_MU_IO_REG, align 4, !tbaa !5
%8 = tail call i32 @get32(i32 noundef %7) #2
%9 = trunc i32 %8 to i8
ret i8 %9
}
declare i32 @get32(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/raspberry-pi-os/exercises/lesson02/2/evopen/src/extr_mini_uart.c_uart_recv.c'
source_filename = "AnghaBench/raspberry-pi-os/exercises/lesson02/2/evopen/src/extr_mini_uart.c_uart_recv.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AUX_MU_LSR_REG = common local_unnamed_addr global i32 0, align 4
@AUX_MU_IO_REG = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define signext i8 @uart_recv() local_unnamed_addr #0 {
br label %1
1: ; preds = %1, %0
%2 = load i32, ptr @AUX_MU_LSR_REG, align 4, !tbaa !6
%3 = tail call i32 @get32(i32 noundef %2) #2
%4 = and i32 %3, 1
%5 = icmp eq i32 %4, 0
br i1 %5, label %1, label %6
6: ; preds = %1
%7 = load i32, ptr @AUX_MU_IO_REG, align 4, !tbaa !6
%8 = tail call i32 @get32(i32 noundef %7) #2
%9 = trunc i32 %8 to i8
ret i8 %9
}
declare i32 @get32(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
raspberry-pi-os_exercises_lesson02_2_evopen_src_extr_mini_uart.c_uart_recv
|
; ModuleID = 'AnghaBench/freebsd/contrib/libstdc++/libmath/extr_stubs.c_frexpl.c'
source_filename = "AnghaBench/freebsd/contrib/libstdc++/libmath/extr_stubs.c_frexpl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local x86_fp80 @frexpl(x86_fp80 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = fptrunc x86_fp80 %0 to double
%4 = tail call x86_fp80 @frexp(double noundef %3, ptr noundef %1) #2
ret x86_fp80 %4
}
declare x86_fp80 @frexp(double noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/libstdc++/libmath/extr_stubs.c_frexpl.c'
source_filename = "AnghaBench/freebsd/contrib/libstdc++/libmath/extr_stubs.c_frexpl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define double @frexpl(double noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = tail call double @frexp(double noundef %0, ptr noundef %1)
ret double %3
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: write)
declare double @frexp(double noundef, ptr nocapture noundef) local_unnamed_addr #1
attributes #0 = { mustprogress nofree nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: write) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_contrib_libstdc++_libmath_extr_stubs.c_frexpl
|
; ModuleID = 'AnghaBench/linux/drivers/pinctrl/bcm/extr_pinctrl-nsp-gpio.c_nsp_gpio_direction_output.c'
source_filename = "AnghaBench/linux/drivers/pinctrl/bcm/extr_pinctrl-nsp-gpio.c_nsp_gpio_direction_output.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nsp_gpio = type { i32, i32 }
@REG = dso_local local_unnamed_addr global i32 0, align 4
@NSP_GPIO_OUT_EN = dso_local local_unnamed_addr global i32 0, align 4
@NSP_GPIO_DATA_OUT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"gpio:%u set output, value:%d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @nsp_gpio_direction_output], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @nsp_gpio_direction_output(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @gpiochip_get_data(ptr noundef %0) #2
%5 = getelementptr inbounds %struct.nsp_gpio, ptr %4, i64 0, i32 1
%6 = tail call i32 @raw_spin_lock_irqsave(ptr noundef nonnull %5, i64 noundef undef) #2
%7 = load i32, ptr @REG, align 4, !tbaa !5
%8 = load i32, ptr @NSP_GPIO_OUT_EN, align 4, !tbaa !5
%9 = tail call i32 @nsp_set_bit(ptr noundef %4, i32 noundef %7, i32 noundef %8, i32 noundef %1, i32 noundef 1) #2
%10 = load i32, ptr @REG, align 4, !tbaa !5
%11 = load i32, ptr @NSP_GPIO_DATA_OUT, align 4, !tbaa !5
%12 = icmp ne i32 %2, 0
%13 = zext i1 %12 to i32
%14 = tail call i32 @nsp_set_bit(ptr noundef %4, i32 noundef %10, i32 noundef %11, i32 noundef %1, i32 noundef %13) #2
%15 = tail call i32 @raw_spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
%16 = load i32, ptr %4, align 4, !tbaa !9
%17 = tail call i32 @dev_dbg(i32 noundef %16, ptr noundef nonnull @.str, i32 noundef %1, i32 noundef %2) #2
ret i32 0
}
declare ptr @gpiochip_get_data(ptr noundef) local_unnamed_addr #1
declare i32 @raw_spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @nsp_set_bit(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @raw_spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"nsp_gpio", !6, i64 0, !6, i64 4}
|
; ModuleID = 'AnghaBench/linux/drivers/pinctrl/bcm/extr_pinctrl-nsp-gpio.c_nsp_gpio_direction_output.c'
source_filename = "AnghaBench/linux/drivers/pinctrl/bcm/extr_pinctrl-nsp-gpio.c_nsp_gpio_direction_output.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REG = common local_unnamed_addr global i32 0, align 4
@NSP_GPIO_OUT_EN = common local_unnamed_addr global i32 0, align 4
@NSP_GPIO_DATA_OUT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"gpio:%u set output, value:%d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @nsp_gpio_direction_output], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @nsp_gpio_direction_output(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @gpiochip_get_data(ptr noundef %0) #2
%5 = getelementptr inbounds i8, ptr %4, i64 4
%6 = tail call i32 @raw_spin_lock_irqsave(ptr noundef nonnull %5, i64 noundef undef) #2
%7 = load i32, ptr @REG, align 4, !tbaa !6
%8 = load i32, ptr @NSP_GPIO_OUT_EN, align 4, !tbaa !6
%9 = tail call i32 @nsp_set_bit(ptr noundef %4, i32 noundef %7, i32 noundef %8, i32 noundef %1, i32 noundef 1) #2
%10 = load i32, ptr @REG, align 4, !tbaa !6
%11 = load i32, ptr @NSP_GPIO_DATA_OUT, align 4, !tbaa !6
%12 = icmp ne i32 %2, 0
%13 = zext i1 %12 to i32
%14 = tail call i32 @nsp_set_bit(ptr noundef %4, i32 noundef %10, i32 noundef %11, i32 noundef %1, i32 noundef %13) #2
%15 = tail call i32 @raw_spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
%16 = load i32, ptr %4, align 4, !tbaa !10
%17 = tail call i32 @dev_dbg(i32 noundef %16, ptr noundef nonnull @.str, i32 noundef %1, i32 noundef %2) #2
ret i32 0
}
declare ptr @gpiochip_get_data(ptr noundef) local_unnamed_addr #1
declare i32 @raw_spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @nsp_set_bit(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @raw_spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"nsp_gpio", !7, i64 0, !7, i64 4}
|
linux_drivers_pinctrl_bcm_extr_pinctrl-nsp-gpio.c_nsp_gpio_direction_output
|
; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_and_8_re_ai.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_and_8_re_ai.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DX = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_N = dso_local local_unnamed_addr global i32 0, align 4
@CFLAG_CLEAR = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_C = dso_local local_unnamed_addr global i32 0, align 4
@VFLAG_CLEAR = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_V = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_Z = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @m68k_op_and_8_re_ai], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @m68k_op_and_8_re_ai() #0 {
%1 = tail call i32 (...) @EA_AY_AI_8() #2
%2 = load i32, ptr @DX, align 4, !tbaa !5
%3 = tail call i32 @m68ki_read_8(i32 noundef %1) #2
%4 = and i32 %3, %2
%5 = tail call i32 @NFLAG_8(i32 noundef %4) #2
store i32 %5, ptr @FLAG_N, align 4, !tbaa !5
%6 = load i32, ptr @CFLAG_CLEAR, align 4, !tbaa !5
store i32 %6, ptr @FLAG_C, align 4, !tbaa !5
%7 = load i32, ptr @VFLAG_CLEAR, align 4, !tbaa !5
store i32 %7, ptr @FLAG_V, align 4, !tbaa !5
%8 = tail call i32 @MASK_OUT_ABOVE_8(i32 noundef %4) #2
store i32 %8, ptr @FLAG_Z, align 4, !tbaa !5
%9 = tail call i32 @m68ki_write_8(i32 noundef %1, i32 noundef %8) #2
ret void
}
declare i32 @EA_AY_AI_8(...) local_unnamed_addr #1
declare i32 @m68ki_read_8(i32 noundef) local_unnamed_addr #1
declare i32 @NFLAG_8(i32 noundef) local_unnamed_addr #1
declare i32 @MASK_OUT_ABOVE_8(i32 noundef) local_unnamed_addr #1
declare i32 @m68ki_write_8(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_and_8_re_ai.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_and_8_re_ai.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DX = common local_unnamed_addr global i32 0, align 4
@FLAG_N = common local_unnamed_addr global i32 0, align 4
@CFLAG_CLEAR = common local_unnamed_addr global i32 0, align 4
@FLAG_C = common local_unnamed_addr global i32 0, align 4
@VFLAG_CLEAR = common local_unnamed_addr global i32 0, align 4
@FLAG_V = common local_unnamed_addr global i32 0, align 4
@FLAG_Z = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @m68k_op_and_8_re_ai], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @m68k_op_and_8_re_ai() #0 {
%1 = tail call i32 @EA_AY_AI_8() #2
%2 = load i32, ptr @DX, align 4, !tbaa !6
%3 = tail call i32 @m68ki_read_8(i32 noundef %1) #2
%4 = and i32 %3, %2
%5 = tail call i32 @NFLAG_8(i32 noundef %4) #2
store i32 %5, ptr @FLAG_N, align 4, !tbaa !6
%6 = load i32, ptr @CFLAG_CLEAR, align 4, !tbaa !6
store i32 %6, ptr @FLAG_C, align 4, !tbaa !6
%7 = load i32, ptr @VFLAG_CLEAR, align 4, !tbaa !6
store i32 %7, ptr @FLAG_V, align 4, !tbaa !6
%8 = tail call i32 @MASK_OUT_ABOVE_8(i32 noundef %4) #2
store i32 %8, ptr @FLAG_Z, align 4, !tbaa !6
%9 = tail call i32 @m68ki_write_8(i32 noundef %1, i32 noundef %8) #2
ret void
}
declare i32 @EA_AY_AI_8(...) local_unnamed_addr #1
declare i32 @m68ki_read_8(i32 noundef) local_unnamed_addr #1
declare i32 @NFLAG_8(i32 noundef) local_unnamed_addr #1
declare i32 @MASK_OUT_ABOVE_8(i32 noundef) local_unnamed_addr #1
declare i32 @m68ki_write_8(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
Provenance_Cores_Genesis-Plus-GX_PVGenesis_Genesis_GenesisCore_genplusgx_source_m68k_extr_m68kops.h_m68k_op_and_8_re_ai
|
; ModuleID = 'AnghaBench/freebsd/sys/arm/allwinner/extr_aw_spi.c_aw_spi_clock_test_cdr2.c'
source_filename = "AnghaBench/freebsd/sys/arm/allwinner/extr_aw_spi.c_aw_spi_clock_test_cdr2.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AW_SPI_CCR_CDR2_MASK = dso_local local_unnamed_addr global i32 0, align 4
@AW_SPI_CCR_CDR2_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@AW_SPI_CCR_DRS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @aw_spi_clock_test_cdr2], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal i64 @aw_spi_clock_test_cdr2(ptr nocapture noundef readonly %0, i64 %1, ptr nocapture noundef writeonly %2) #0 {
%4 = load i32, ptr @AW_SPI_CCR_CDR2_MASK, align 4, !tbaa !5
%5 = load i32, ptr @AW_SPI_CCR_CDR2_SHIFT, align 4, !tbaa !5
%6 = ashr i32 %4, %5
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %51
8: ; preds = %3
%9 = load i32, ptr %0, align 4, !tbaa !9
%10 = and i32 %6, 1
%11 = icmp eq i32 %6, 1
br i1 %11, label %37, label %12
12: ; preds = %8
%13 = and i32 %6, 2147483646
br label %14
14: ; preds = %14, %12
%15 = phi i32 [ undef, %12 ], [ %33, %14 ]
%16 = phi i64 [ 0, %12 ], [ %32, %14 ]
%17 = phi i32 [ 0, %12 ], [ %34, %14 ]
%18 = phi i32 [ 0, %12 ], [ %35, %14 ]
%19 = shl nuw nsw i32 %17, 1
%20 = or disjoint i32 %19, 1
%21 = sdiv i32 %9, %20
%22 = sext i32 %21 to i64
%23 = icmp slt i64 %16, %22
%24 = tail call i64 @llvm.smax.i64(i64 %16, i64 %22)
%25 = select i1 %23, i32 %17, i32 %15
%26 = or disjoint i32 %17, 1
%27 = shl nuw nsw i32 %26, 1
%28 = or disjoint i32 %27, 1
%29 = sdiv i32 %9, %28
%30 = sext i32 %29 to i64
%31 = icmp slt i64 %24, %30
%32 = tail call i64 @llvm.smax.i64(i64 %24, i64 %30)
%33 = select i1 %31, i32 %26, i32 %25
%34 = add nuw nsw i32 %17, 2
%35 = add nuw i32 %18, 2
%36 = icmp eq i32 %35, %13
br i1 %36, label %37, label %14, !llvm.loop !11
37: ; preds = %14, %8
%38 = phi i64 [ undef, %8 ], [ %32, %14 ]
%39 = phi i32 [ undef, %8 ], [ %33, %14 ]
%40 = phi i64 [ 0, %8 ], [ %32, %14 ]
%41 = phi i32 [ 0, %8 ], [ %34, %14 ]
%42 = icmp eq i32 %10, 0
br i1 %42, label %51, label %43
43: ; preds = %37
%44 = shl nuw nsw i32 %41, 1
%45 = or disjoint i32 %44, 1
%46 = sdiv i32 %9, %45
%47 = sext i32 %46 to i64
%48 = icmp slt i64 %40, %47
%49 = tail call i64 @llvm.smax.i64(i64 %40, i64 %47)
%50 = select i1 %48, i32 %41, i32 %39
br label %51
51: ; preds = %43, %37, %3
%52 = phi i64 [ 0, %3 ], [ %38, %37 ], [ %49, %43 ]
%53 = phi i32 [ undef, %3 ], [ %39, %37 ], [ %50, %43 ]
%54 = load i32, ptr @AW_SPI_CCR_DRS, align 4, !tbaa !5
%55 = shl i32 %53, %5
%56 = or i32 %54, %55
store i32 %56, ptr %2, align 4, !tbaa !5
ret i64 %52
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smax.i64(i64, i64) #1
attributes #0 = { nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"aw_spi_softc", !6, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/freebsd/sys/arm/allwinner/extr_aw_spi.c_aw_spi_clock_test_cdr2.c'
source_filename = "AnghaBench/freebsd/sys/arm/allwinner/extr_aw_spi.c_aw_spi_clock_test_cdr2.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AW_SPI_CCR_CDR2_MASK = common local_unnamed_addr global i32 0, align 4
@AW_SPI_CCR_CDR2_SHIFT = common local_unnamed_addr global i32 0, align 4
@AW_SPI_CCR_DRS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @aw_spi_clock_test_cdr2], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal range(i64 -2147483648, 2147483648) i64 @aw_spi_clock_test_cdr2(ptr nocapture noundef readonly %0, i64 %1, ptr nocapture noundef writeonly %2) #0 {
%4 = load i32, ptr @AW_SPI_CCR_CDR2_MASK, align 4, !tbaa !6
%5 = load i32, ptr @AW_SPI_CCR_CDR2_SHIFT, align 4, !tbaa !6
%6 = ashr i32 %4, %5
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %23
8: ; preds = %3
%9 = load i32, ptr %0, align 4, !tbaa !10
br label %10
10: ; preds = %8, %10
%11 = phi i32 [ undef, %8 ], [ %20, %10 ]
%12 = phi i64 [ 0, %8 ], [ %19, %10 ]
%13 = phi i32 [ 0, %8 ], [ %21, %10 ]
%14 = shl nuw nsw i32 %13, 1
%15 = or disjoint i32 %14, 1
%16 = sdiv i32 %9, %15
%17 = sext i32 %16 to i64
%18 = icmp slt i64 %12, %17
%19 = tail call i64 @llvm.smax.i64(i64 %12, i64 %17)
%20 = select i1 %18, i32 %13, i32 %11
%21 = add nuw nsw i32 %13, 1
%22 = icmp eq i32 %21, %6
br i1 %22, label %23, label %10, !llvm.loop !12
23: ; preds = %10, %3
%24 = phi i64 [ 0, %3 ], [ %19, %10 ]
%25 = phi i32 [ undef, %3 ], [ %20, %10 ]
%26 = load i32, ptr @AW_SPI_CCR_DRS, align 4, !tbaa !6
%27 = shl i32 %25, %5
%28 = or i32 %26, %27
store i32 %28, ptr %2, align 4, !tbaa !6
ret i64 %24
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smax.i64(i64, i64) #1
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"aw_spi_softc", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
|
freebsd_sys_arm_allwinner_extr_aw_spi.c_aw_spi_clock_test_cdr2
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/mpt/extr_mpt.c_mpt_config_reply_handler.c'
source_filename = "AnghaBench/freebsd/sys/dev/mpt/extr_mpt.c_mpt_config_reply_handler.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_10__ = type { i32, i32, i64 }
%struct.TYPE_12__ = type { i32, i32, i32 }
%struct.TYPE_13__ = type { i32, i32, i32 }
@REQ_STATE_QUEUED = dso_local local_unnamed_addr global i32 0, align 4
@REQ_STATE_DONE = dso_local local_unnamed_addr global i32 0, align 4
@links = dso_local local_unnamed_addr global i32 0, align 4
@REQ_STATE_NEED_WAKEUP = dso_local local_unnamed_addr global i32 0, align 4
@REQ_STATE_TIMEDOUT = dso_local local_unnamed_addr global i32 0, align 4
@TRUE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mpt_config_reply_handler], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mpt_config_reply_handler(ptr noundef %0, ptr noundef %1, i32 %2, ptr noundef %3) #0 {
%5 = icmp eq ptr %1, null
br i1 %5, label %40, label %6
6: ; preds = %4
%7 = icmp eq ptr %3, null
br i1 %7, label %19, label %8
8: ; preds = %6
%9 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 2
%10 = load i64, ptr %9, align 8, !tbaa !5
%11 = inttoptr i64 %10 to ptr
%12 = load i32, ptr %3, align 4, !tbaa !11
%13 = tail call i32 @le16toh(i32 noundef %12) #2
%14 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 1
store i32 %13, ptr %14, align 4, !tbaa !13
%15 = getelementptr inbounds %struct.TYPE_12__, ptr %3, i64 0, i32 2
%16 = getelementptr inbounds %struct.TYPE_13__, ptr %11, i64 0, i32 2
%17 = tail call i32 @bcopy(ptr noundef nonnull %15, ptr noundef nonnull %16, i32 noundef 4) #2
%18 = load <2 x i32>, ptr %3, align 4, !tbaa !14
store <2 x i32> %18, ptr %11, align 4, !tbaa !14
br label %19
19: ; preds = %8, %6
%20 = load i32, ptr @REQ_STATE_QUEUED, align 4, !tbaa !14
%21 = xor i32 %20, -1
%22 = load i32, ptr %1, align 8, !tbaa !15
%23 = and i32 %22, %21
store i32 %23, ptr %1, align 8, !tbaa !15
%24 = load i32, ptr @REQ_STATE_DONE, align 4, !tbaa !14
%25 = or i32 %24, %23
store i32 %25, ptr %1, align 8, !tbaa !15
%26 = load i32, ptr @links, align 4, !tbaa !14
%27 = tail call i32 @TAILQ_REMOVE(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %26) #2
%28 = load i32, ptr %1, align 8, !tbaa !15
%29 = load i32, ptr @REQ_STATE_NEED_WAKEUP, align 4, !tbaa !14
%30 = and i32 %29, %28
%31 = icmp eq i32 %30, 0
br i1 %31, label %34, label %32
32: ; preds = %19
%33 = tail call i32 @wakeup(ptr noundef nonnull %1) #2
br label %40
34: ; preds = %19
%35 = load i32, ptr @REQ_STATE_TIMEDOUT, align 4, !tbaa !14
%36 = and i32 %35, %28
%37 = icmp eq i32 %36, 0
br i1 %37, label %40, label %38
38: ; preds = %34
%39 = tail call i32 @mpt_free_request(ptr noundef %0, ptr noundef nonnull %1) #2
br label %40
40: ; preds = %32, %38, %34, %4
%41 = load i32, ptr @TRUE, align 4, !tbaa !14
ret i32 %41
}
declare i32 @le16toh(i32 noundef) local_unnamed_addr #1
declare i32 @bcopy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @TAILQ_REMOVE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wakeup(ptr noundef) local_unnamed_addr #1
declare i32 @mpt_free_request(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_10__", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"TYPE_11__", !7, i64 0}
!13 = !{!6, !7, i64 4}
!14 = !{!7, !7, i64 0}
!15 = !{!6, !7, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/dev/mpt/extr_mpt.c_mpt_config_reply_handler.c'
source_filename = "AnghaBench/freebsd/sys/dev/mpt/extr_mpt.c_mpt_config_reply_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REQ_STATE_QUEUED = common local_unnamed_addr global i32 0, align 4
@REQ_STATE_DONE = common local_unnamed_addr global i32 0, align 4
@links = common local_unnamed_addr global i32 0, align 4
@REQ_STATE_NEED_WAKEUP = common local_unnamed_addr global i32 0, align 4
@REQ_STATE_TIMEDOUT = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mpt_config_reply_handler], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mpt_config_reply_handler(ptr noundef %0, ptr noundef %1, i32 %2, ptr noundef %3) #0 {
%5 = icmp eq ptr %1, null
br i1 %5, label %40, label %6
6: ; preds = %4
%7 = icmp eq ptr %3, null
br i1 %7, label %19, label %8
8: ; preds = %6
%9 = getelementptr inbounds i8, ptr %1, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !6
%11 = inttoptr i64 %10 to ptr
%12 = load i32, ptr %3, align 4, !tbaa !12
%13 = tail call i32 @le16toh(i32 noundef %12) #2
%14 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %13, ptr %14, align 4, !tbaa !14
%15 = getelementptr inbounds i8, ptr %3, i64 8
%16 = getelementptr inbounds i8, ptr %11, i64 8
%17 = tail call i32 @bcopy(ptr noundef nonnull %15, ptr noundef nonnull %16, i32 noundef 4) #2
%18 = load <2 x i32>, ptr %3, align 4, !tbaa !15
store <2 x i32> %18, ptr %11, align 4, !tbaa !15
br label %19
19: ; preds = %8, %6
%20 = load i32, ptr @REQ_STATE_QUEUED, align 4, !tbaa !15
%21 = xor i32 %20, -1
%22 = load i32, ptr %1, align 8, !tbaa !16
%23 = and i32 %22, %21
store i32 %23, ptr %1, align 8, !tbaa !16
%24 = load i32, ptr @REQ_STATE_DONE, align 4, !tbaa !15
%25 = or i32 %24, %23
store i32 %25, ptr %1, align 8, !tbaa !16
%26 = load i32, ptr @links, align 4, !tbaa !15
%27 = tail call i32 @TAILQ_REMOVE(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %26) #2
%28 = load i32, ptr %1, align 8, !tbaa !16
%29 = load i32, ptr @REQ_STATE_NEED_WAKEUP, align 4, !tbaa !15
%30 = and i32 %29, %28
%31 = icmp eq i32 %30, 0
br i1 %31, label %34, label %32
32: ; preds = %19
%33 = tail call i32 @wakeup(ptr noundef nonnull %1) #2
br label %40
34: ; preds = %19
%35 = load i32, ptr @REQ_STATE_TIMEDOUT, align 4, !tbaa !15
%36 = and i32 %35, %28
%37 = icmp eq i32 %36, 0
br i1 %37, label %40, label %38
38: ; preds = %34
%39 = tail call i32 @mpt_free_request(ptr noundef %0, ptr noundef nonnull %1) #2
br label %40
40: ; preds = %32, %38, %34, %4
%41 = load i32, ptr @TRUE, align 4, !tbaa !15
ret i32 %41
}
declare i32 @le16toh(i32 noundef) local_unnamed_addr #1
declare i32 @bcopy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @TAILQ_REMOVE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wakeup(ptr noundef) local_unnamed_addr #1
declare i32 @mpt_free_request(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_10__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_11__", !8, i64 0}
!14 = !{!7, !8, i64 4}
!15 = !{!8, !8, i64 0}
!16 = !{!7, !8, i64 0}
|
freebsd_sys_dev_mpt_extr_mpt.c_mpt_config_reply_handler
|
; ModuleID = 'AnghaBench/linux/drivers/clk/qcom/extr_clk-smd-rpm.c_clk_smd_rpm_set_rate_active.c'
source_filename = "AnghaBench/linux/drivers/clk/qcom/extr_clk-smd-rpm.c_clk_smd_rpm_set_rate_active.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.clk_smd_rpm_req = type { i32, i32, i32 }
%struct.clk_smd_rpm = type { i32, i32, i32, i32 }
@QCOM_SMD_RPM_ACTIVE_STATE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @clk_smd_rpm_set_rate_active], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @clk_smd_rpm_set_rate_active(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = alloca %struct.clk_smd_rpm_req, align 4
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
%4 = tail call i32 @DIV_ROUND_UP(i64 noundef %1, i32 noundef 1000) #3
%5 = tail call i32 @cpu_to_le32(i32 noundef %4) #3
store i32 %5, ptr %3, align 4, !tbaa !5
%6 = getelementptr inbounds %struct.clk_smd_rpm_req, ptr %3, i64 0, i32 1
%7 = tail call i32 @cpu_to_le32(i32 noundef 4) #3
store i32 %7, ptr %6, align 4, !tbaa !10
%8 = getelementptr inbounds %struct.clk_smd_rpm_req, ptr %3, i64 0, i32 2
%9 = load i32, ptr %0, align 4, !tbaa !11
%10 = tail call i32 @cpu_to_le32(i32 noundef %9) #3
store i32 %10, ptr %8, align 4, !tbaa !13
%11 = getelementptr inbounds %struct.clk_smd_rpm, ptr %0, i64 0, i32 3
%12 = load i32, ptr %11, align 4, !tbaa !14
%13 = load i32, ptr @QCOM_SMD_RPM_ACTIVE_STATE, align 4, !tbaa !15
%14 = getelementptr inbounds %struct.clk_smd_rpm, ptr %0, i64 0, i32 2
%15 = load i32, ptr %14, align 4, !tbaa !16
%16 = getelementptr inbounds %struct.clk_smd_rpm, ptr %0, i64 0, i32 1
%17 = load i32, ptr %16, align 4, !tbaa !17
%18 = call i32 @qcom_rpm_smd_write(i32 noundef %12, i32 noundef %13, i32 noundef %15, i32 noundef %17, ptr noundef nonnull %3, i32 noundef 12) #3
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3
ret i32 %18
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #2
declare i32 @DIV_ROUND_UP(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @qcom_rpm_smd_write(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"clk_smd_rpm_req", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!12, !7, i64 0}
!12 = !{!"clk_smd_rpm", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!13 = !{!6, !7, i64 8}
!14 = !{!12, !7, i64 12}
!15 = !{!7, !7, i64 0}
!16 = !{!12, !7, i64 8}
!17 = !{!12, !7, i64 4}
|
; ModuleID = 'AnghaBench/linux/drivers/clk/qcom/extr_clk-smd-rpm.c_clk_smd_rpm_set_rate_active.c'
source_filename = "AnghaBench/linux/drivers/clk/qcom/extr_clk-smd-rpm.c_clk_smd_rpm_set_rate_active.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.clk_smd_rpm_req = type { i32, i32, i32 }
@QCOM_SMD_RPM_ACTIVE_STATE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @clk_smd_rpm_set_rate_active], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @clk_smd_rpm_set_rate_active(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = alloca %struct.clk_smd_rpm_req, align 4
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
%4 = tail call i32 @DIV_ROUND_UP(i64 noundef %1, i32 noundef 1000) #3
%5 = tail call i32 @cpu_to_le32(i32 noundef %4) #3
store i32 %5, ptr %3, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %3, i64 4
%7 = tail call i32 @cpu_to_le32(i32 noundef 4) #3
store i32 %7, ptr %6, align 4, !tbaa !11
%8 = getelementptr inbounds i8, ptr %3, i64 8
%9 = load i32, ptr %0, align 4, !tbaa !12
%10 = tail call i32 @cpu_to_le32(i32 noundef %9) #3
store i32 %10, ptr %8, align 4, !tbaa !14
%11 = getelementptr inbounds i8, ptr %0, i64 12
%12 = load i32, ptr %11, align 4, !tbaa !15
%13 = load i32, ptr @QCOM_SMD_RPM_ACTIVE_STATE, align 4, !tbaa !16
%14 = getelementptr inbounds i8, ptr %0, i64 8
%15 = load i32, ptr %14, align 4, !tbaa !17
%16 = getelementptr inbounds i8, ptr %0, i64 4
%17 = load i32, ptr %16, align 4, !tbaa !18
%18 = call i32 @qcom_rpm_smd_write(i32 noundef %12, i32 noundef %13, i32 noundef %15, i32 noundef %17, ptr noundef nonnull %3, i32 noundef 12) #3
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3
ret i32 %18
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #2
declare i32 @DIV_ROUND_UP(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @qcom_rpm_smd_write(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"clk_smd_rpm_req", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!13, !8, i64 0}
!13 = !{!"clk_smd_rpm", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!14 = !{!7, !8, i64 8}
!15 = !{!13, !8, i64 12}
!16 = !{!8, !8, i64 0}
!17 = !{!13, !8, i64 8}
!18 = !{!13, !8, i64 4}
|
linux_drivers_clk_qcom_extr_clk-smd-rpm.c_clk_smd_rpm_set_rate_active
|
; ModuleID = 'AnghaBench/freebsd/sys/net80211/extr_ieee80211_crypto_none.c_none_demic.c'
source_filename = "AnghaBench/freebsd/sys/net80211/extr_ieee80211_crypto_none.c_none_demic.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @none_demic], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable
define internal noundef i32 @none_demic(ptr nocapture noundef readonly %0, ptr nocapture readnone %1, i32 %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = add nsw i32 %5, 1
store i32 %6, ptr %4, align 4, !tbaa !10
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ieee80211_key", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"ieee80211vap", !12, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"int", !8, i64 0}
|
; ModuleID = 'AnghaBench/freebsd/sys/net80211/extr_ieee80211_crypto_none.c_none_demic.c'
source_filename = "AnghaBench/freebsd/sys/net80211/extr_ieee80211_crypto_none.c_none_demic.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @none_demic], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal noundef i32 @none_demic(ptr nocapture noundef readonly %0, ptr nocapture readnone %1, i32 %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = add nsw i32 %5, 1
store i32 %6, ptr %4, align 4, !tbaa !11
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ieee80211_key", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !14, i64 0}
!12 = !{!"ieee80211vap", !13, i64 0}
!13 = !{!"TYPE_2__", !14, i64 0}
!14 = !{!"int", !9, i64 0}
|
freebsd_sys_net80211_extr_ieee80211_crypto_none.c_none_demic
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/ttpci/extr_av7110_av.c_aux_ring_buffer_write.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/ttpci/extr_av7110_av.c_aux_ring_buffer_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @aux_ring_buffer_write], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i64 @aux_ring_buffer_write(ptr noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = icmp eq i64 %2, 0
br i1 %4, label %30, label %5
5: ; preds = %3, %19
%6 = phi i64 [ %27, %19 ], [ %2, %3 ]
%7 = phi ptr [ %28, %19 ], [ %1, %3 ]
%8 = tail call i32 @dvb_ringbuffer_free(ptr noundef %0) #2
%9 = icmp slt i32 %8, 2048
br i1 %9, label %10, label %19
10: ; preds = %5
%11 = load i32, ptr %0, align 4, !tbaa !5
%12 = tail call i32 @dvb_ringbuffer_free(ptr noundef nonnull %0) #2
%13 = icmp sgt i32 %12, 2047
%14 = zext i1 %13 to i32
%15 = tail call i64 @wait_event_interruptible(i32 noundef %11, i32 noundef %14) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %19, label %17
17: ; preds = %10
%18 = sub i64 %2, %6
br label %30
19: ; preds = %10, %5
%20 = tail call i32 @dvb_ringbuffer_free(ptr noundef %0) #2
%21 = sext i32 %20 to i64
%22 = icmp ult i64 %6, %21
%23 = trunc i64 %6 to i32
%24 = select i1 %22, i32 %23, i32 %20
%25 = tail call i32 @dvb_ringbuffer_write(ptr noundef %0, ptr noundef %7, i32 noundef %24) #2
%26 = sext i32 %24 to i64
%27 = sub i64 %6, %26
%28 = getelementptr inbounds i32, ptr %7, i64 %26
%29 = icmp eq i64 %27, 0
br i1 %29, label %30, label %5, !llvm.loop !10
30: ; preds = %19, %3, %17
%31 = phi i64 [ %18, %17 ], [ 0, %3 ], [ %2, %19 ]
ret i64 %31
}
declare i32 @dvb_ringbuffer_free(ptr noundef) local_unnamed_addr #1
declare i64 @wait_event_interruptible(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dvb_ringbuffer_write(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dvb_ringbuffer", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/ttpci/extr_av7110_av.c_aux_ring_buffer_write.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/ttpci/extr_av7110_av.c_aux_ring_buffer_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @aux_ring_buffer_write], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i64 @aux_ring_buffer_write(ptr noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = icmp eq i64 %2, 0
br i1 %4, label %30, label %5
5: ; preds = %3, %19
%6 = phi i64 [ %27, %19 ], [ %2, %3 ]
%7 = phi ptr [ %28, %19 ], [ %1, %3 ]
%8 = tail call i32 @dvb_ringbuffer_free(ptr noundef %0) #2
%9 = icmp slt i32 %8, 2048
br i1 %9, label %10, label %19
10: ; preds = %5
%11 = load i32, ptr %0, align 4, !tbaa !6
%12 = tail call i32 @dvb_ringbuffer_free(ptr noundef nonnull %0) #2
%13 = icmp sgt i32 %12, 2047
%14 = zext i1 %13 to i32
%15 = tail call i64 @wait_event_interruptible(i32 noundef %11, i32 noundef %14) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %19, label %17
17: ; preds = %10
%18 = sub i64 %2, %6
br label %30
19: ; preds = %10, %5
%20 = tail call i32 @dvb_ringbuffer_free(ptr noundef %0) #2
%21 = sext i32 %20 to i64
%22 = icmp ult i64 %6, %21
%23 = trunc i64 %6 to i32
%24 = select i1 %22, i32 %23, i32 %20
%25 = tail call i32 @dvb_ringbuffer_write(ptr noundef %0, ptr noundef %7, i32 noundef %24) #2
%26 = sext i32 %24 to i64
%27 = sub i64 %6, %26
%28 = getelementptr inbounds i32, ptr %7, i64 %26
%29 = icmp eq i64 %27, 0
br i1 %29, label %30, label %5, !llvm.loop !11
30: ; preds = %19, %3, %17
%31 = phi i64 [ %18, %17 ], [ 0, %3 ], [ %2, %19 ]
ret i64 %31
}
declare i32 @dvb_ringbuffer_free(ptr noundef) local_unnamed_addr #1
declare i64 @wait_event_interruptible(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dvb_ringbuffer_write(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dvb_ringbuffer", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
|
fastsocket_kernel_drivers_media_dvb_ttpci_extr_av7110_av.c_aux_ring_buffer_write
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_global_deinit.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_global_deinit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @dpp_global_deinit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @dpp_global_clear(ptr noundef %0) #2
%3 = tail call i32 @os_free(ptr noundef %0) #2
ret void
}
declare i32 @dpp_global_clear(ptr noundef) local_unnamed_addr #1
declare i32 @os_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_global_deinit.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_global_deinit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @dpp_global_deinit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @dpp_global_clear(ptr noundef %0) #2
%3 = tail call i32 @os_free(ptr noundef %0) #2
ret void
}
declare i32 @dpp_global_clear(ptr noundef) local_unnamed_addr #1
declare i32 @os_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
freebsd_contrib_wpa_src_common_extr_dpp.c_dpp_global_deinit
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_ras.c_amdgpu_ras_release_vram.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_ras.c_amdgpu_ras_release_vram.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @amdgpu_ras_release_vram], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @amdgpu_ras_release_vram(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = tail call i32 @amdgpu_bo_free_kernel(ptr noundef %1, ptr noundef null, ptr noundef null) #2
ret i32 0
}
declare i32 @amdgpu_bo_free_kernel(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_ras.c_amdgpu_ras_release_vram.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_ras.c_amdgpu_ras_release_vram.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @amdgpu_ras_release_vram], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @amdgpu_ras_release_vram(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = tail call i32 @amdgpu_bo_free_kernel(ptr noundef %1, ptr noundef null, ptr noundef null) #2
ret i32 0
}
declare i32 @amdgpu_bo_free_kernel(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
linux_drivers_gpu_drm_amd_amdgpu_extr_amdgpu_ras.c_amdgpu_ras_release_vram
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9003_eeprom.c_ar9003_hw_get_target_power_eeprom.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9003_eeprom.c_ar9003_hw_get_target_power_eeprom.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ar9300RateSize = dso_local local_unnamed_addr global i32 0, align 4
@REGULATORY = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [18 x i8] c"TPC[%02d] 0x%08x\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ar9003_hw_get_target_power_eeprom], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ar9003_hw_get_target_power_eeprom(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @IS_CHAN_2GHZ(ptr noundef %1) #2
%5 = tail call ptr @ath9k_hw_common(ptr noundef %0) #2
%6 = load i32, ptr %1, align 4, !tbaa !5
%7 = icmp eq i32 %4, 0
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @ar9003_hw_get_cck_target_powers(ptr noundef %0, i32 noundef %6, ptr noundef %2) #2
br label %10
10: ; preds = %8, %3
%11 = tail call i32 @ar9003_hw_get_legacy_target_powers(ptr noundef %0, i32 noundef %6, ptr noundef %2, i32 noundef %4) #2
%12 = tail call i32 @ar9003_hw_get_ht20_target_powers(ptr noundef %0, i32 noundef %6, ptr noundef %2, i32 noundef %4) #2
%13 = tail call i64 @IS_CHAN_HT40(ptr noundef nonnull %1) #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %10
%16 = tail call i32 @ar9003_hw_get_ht40_target_powers(ptr noundef %0, i32 noundef %6, ptr noundef %2, i32 noundef %4) #2
br label %17
17: ; preds = %15, %10
%18 = load i32, ptr @ar9300RateSize, align 4, !tbaa !10
%19 = icmp eq i32 %18, 0
br i1 %19, label %31, label %20
20: ; preds = %17, %20
%21 = phi i64 [ %27, %20 ], [ 0, %17 ]
%22 = load i32, ptr @REGULATORY, align 4, !tbaa !10
%23 = getelementptr inbounds i32, ptr %2, i64 %21
%24 = load i32, ptr %23, align 4, !tbaa !10
%25 = trunc i64 %21 to i32
%26 = tail call i32 @ath_dbg(ptr noundef %5, i32 noundef %22, ptr noundef nonnull @.str, i32 noundef %25, i32 noundef %24) #2
%27 = add nuw nsw i64 %21, 1
%28 = load i32, ptr @ar9300RateSize, align 4, !tbaa !10
%29 = zext i32 %28 to i64
%30 = icmp ult i64 %27, %29
br i1 %30, label %20, label %31, !llvm.loop !11
31: ; preds = %20, %17
ret void
}
declare i32 @IS_CHAN_2GHZ(ptr noundef) local_unnamed_addr #1
declare ptr @ath9k_hw_common(ptr noundef) local_unnamed_addr #1
declare i32 @ar9003_hw_get_cck_target_powers(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ar9003_hw_get_legacy_target_powers(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ar9003_hw_get_ht20_target_powers(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_CHAN_HT40(ptr noundef) local_unnamed_addr #1
declare i32 @ar9003_hw_get_ht40_target_powers(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ath_dbg(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ath9k_channel", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9003_eeprom.c_ar9003_hw_get_target_power_eeprom.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9003_eeprom.c_ar9003_hw_get_target_power_eeprom.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ar9300RateSize = common local_unnamed_addr global i32 0, align 4
@REGULATORY = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [18 x i8] c"TPC[%02d] 0x%08x\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ar9003_hw_get_target_power_eeprom], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ar9003_hw_get_target_power_eeprom(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @IS_CHAN_2GHZ(ptr noundef %1) #2
%5 = tail call ptr @ath9k_hw_common(ptr noundef %0) #2
%6 = load i32, ptr %1, align 4, !tbaa !6
%7 = icmp eq i32 %4, 0
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @ar9003_hw_get_cck_target_powers(ptr noundef %0, i32 noundef %6, ptr noundef %2) #2
br label %10
10: ; preds = %8, %3
%11 = tail call i32 @ar9003_hw_get_legacy_target_powers(ptr noundef %0, i32 noundef %6, ptr noundef %2, i32 noundef %4) #2
%12 = tail call i32 @ar9003_hw_get_ht20_target_powers(ptr noundef %0, i32 noundef %6, ptr noundef %2, i32 noundef %4) #2
%13 = tail call i64 @IS_CHAN_HT40(ptr noundef nonnull %1) #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %10
%16 = tail call i32 @ar9003_hw_get_ht40_target_powers(ptr noundef %0, i32 noundef %6, ptr noundef %2, i32 noundef %4) #2
br label %17
17: ; preds = %15, %10
%18 = load i32, ptr @ar9300RateSize, align 4, !tbaa !11
%19 = icmp eq i32 %18, 0
br i1 %19, label %31, label %20
20: ; preds = %17, %20
%21 = phi i64 [ %27, %20 ], [ 0, %17 ]
%22 = load i32, ptr @REGULATORY, align 4, !tbaa !11
%23 = getelementptr inbounds i32, ptr %2, i64 %21
%24 = load i32, ptr %23, align 4, !tbaa !11
%25 = trunc nuw i64 %21 to i32
%26 = tail call i32 @ath_dbg(ptr noundef %5, i32 noundef %22, ptr noundef nonnull @.str, i32 noundef %25, i32 noundef %24) #2
%27 = add nuw nsw i64 %21, 1
%28 = load i32, ptr @ar9300RateSize, align 4, !tbaa !11
%29 = zext i32 %28 to i64
%30 = icmp ult i64 %27, %29
br i1 %30, label %20, label %31, !llvm.loop !12
31: ; preds = %20, %17
ret void
}
declare i32 @IS_CHAN_2GHZ(ptr noundef) local_unnamed_addr #1
declare ptr @ath9k_hw_common(ptr noundef) local_unnamed_addr #1
declare i32 @ar9003_hw_get_cck_target_powers(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ar9003_hw_get_legacy_target_powers(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ar9003_hw_get_ht20_target_powers(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_CHAN_HT40(ptr noundef) local_unnamed_addr #1
declare i32 @ar9003_hw_get_ht40_target_powers(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ath_dbg(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ath9k_channel", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
|
linux_drivers_net_wireless_ath_ath9k_extr_ar9003_eeprom.c_ar9003_hw_get_target_power_eeprom
|
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StGetBridgeSupport.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StGetBridgeSupport.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32 }
@ERR_NO_ERROR = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @StGetBridgeSupport(ptr nocapture noundef readnone %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @Zero(ptr noundef %1, i32 noundef 8) #2
%4 = tail call i32 (...) @IsBridgeSupported() #2
%5 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 1
store i32 %4, ptr %5, align 4, !tbaa !5
%6 = tail call i32 (...) @IsNeedWinPcap() #2
store i32 %6, ptr %1, align 4, !tbaa !10
%7 = load i32, ptr @ERR_NO_ERROR, align 4, !tbaa !11
ret i32 %7
}
declare i32 @Zero(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IsBridgeSupported(...) local_unnamed_addr #1
declare i32 @IsNeedWinPcap(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_4__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!7, !7, i64 0}
|
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StGetBridgeSupport.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StGetBridgeSupport.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ERR_NO_ERROR = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @StGetBridgeSupport(ptr nocapture noundef readnone %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @Zero(ptr noundef %1, i32 noundef 8) #2
%4 = tail call i32 @IsBridgeSupported() #2
%5 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %4, ptr %5, align 4, !tbaa !6
%6 = tail call i32 @IsNeedWinPcap() #2
store i32 %6, ptr %1, align 4, !tbaa !11
%7 = load i32, ptr @ERR_NO_ERROR, align 4, !tbaa !12
ret i32 %7
}
declare i32 @Zero(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IsBridgeSupported(...) local_unnamed_addr #1
declare i32 @IsNeedWinPcap(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
!12 = !{!8, !8, i64 0}
|
SoftEtherVPN_src_Cedar_extr_Admin.c_StGetBridgeSupport
|
; ModuleID = 'AnghaBench/reactos/sdk/tools/fatten/fatfs/option/extr_ccsbcs.c_ff_convert.c'
source_filename = "AnghaBench/reactos/sdk/tools/fatten/fatfs/option/extr_ccsbcs.c_ff_convert.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@Tbl = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define dso_local i32 @ff_convert(i32 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = icmp slt i32 %0, 128
br i1 %3, label %44, label %4
4: ; preds = %2
%5 = icmp eq i64 %1, 0
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = load ptr, ptr @Tbl, align 8, !tbaa !5
br label %16
8: ; preds = %4
%9 = icmp ugt i32 %0, 255
br i1 %9, label %44, label %10
10: ; preds = %8
%11 = load ptr, ptr @Tbl, align 8, !tbaa !5
%12 = zext nneg i32 %0 to i64
%13 = getelementptr i32, ptr %11, i64 %12
%14 = getelementptr i32, ptr %13, i64 -128
%15 = load i32, ptr %14, align 4, !tbaa !9
br label %44
16: ; preds = %36, %6
%17 = phi i64 [ 0, %6 ], [ %37, %36 ]
%18 = getelementptr inbounds i32, ptr %7, i64 %17
%19 = load i32, ptr %18, align 4, !tbaa !9
%20 = icmp eq i32 %19, %0
br i1 %20, label %39, label %21
21: ; preds = %16
%22 = or disjoint i64 %17, 1
%23 = getelementptr inbounds i32, ptr %7, i64 %22
%24 = load i32, ptr %23, align 4, !tbaa !9
%25 = icmp eq i32 %24, %0
br i1 %25, label %39, label %26
26: ; preds = %21
%27 = or disjoint i64 %17, 2
%28 = getelementptr inbounds i32, ptr %7, i64 %27
%29 = load i32, ptr %28, align 4, !tbaa !9
%30 = icmp eq i32 %29, %0
br i1 %30, label %39, label %31
31: ; preds = %26
%32 = or disjoint i64 %17, 3
%33 = getelementptr inbounds i32, ptr %7, i64 %32
%34 = load i32, ptr %33, align 4, !tbaa !9
%35 = icmp eq i32 %34, %0
br i1 %35, label %39, label %36
36: ; preds = %31
%37 = add nuw nsw i64 %17, 4
%38 = icmp eq i64 %37, 128
br i1 %38, label %44, label %16, !llvm.loop !11
39: ; preds = %31, %26, %21, %16
%40 = phi i64 [ %17, %16 ], [ %22, %21 ], [ %27, %26 ], [ %32, %31 ]
%41 = trunc i64 %40 to i32
%42 = and i32 %41, 255
%43 = xor i32 %42, 128
br label %44
44: ; preds = %36, %39, %10, %8, %2
%45 = phi i32 [ %0, %2 ], [ %15, %10 ], [ 0, %8 ], [ %43, %39 ], [ 0, %36 ]
ret i32 %45
}
attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
|
; ModuleID = 'AnghaBench/reactos/sdk/tools/fatten/fatfs/option/extr_ccsbcs.c_ff_convert.c'
source_filename = "AnghaBench/reactos/sdk/tools/fatten/fatfs/option/extr_ccsbcs.c_ff_convert.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@Tbl = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define i32 @ff_convert(i32 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = icmp slt i32 %0, 128
br i1 %3, label %28, label %4
4: ; preds = %2
%5 = icmp eq i64 %1, 0
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = load ptr, ptr @Tbl, align 8, !tbaa !6
br label %16
8: ; preds = %4
%9 = icmp ugt i32 %0, 255
br i1 %9, label %28, label %10
10: ; preds = %8
%11 = load ptr, ptr @Tbl, align 8, !tbaa !6
%12 = zext nneg i32 %0 to i64
%13 = getelementptr i32, ptr %11, i64 %12
%14 = getelementptr i8, ptr %13, i64 -512
%15 = load i32, ptr %14, align 4, !tbaa !10
br label %28
16: ; preds = %6, %21
%17 = phi i64 [ 0, %6 ], [ %22, %21 ]
%18 = getelementptr inbounds i32, ptr %7, i64 %17
%19 = load i32, ptr %18, align 4, !tbaa !10
%20 = icmp eq i32 %19, %0
br i1 %20, label %24, label %21
21: ; preds = %16
%22 = add nuw nsw i64 %17, 1
%23 = icmp eq i64 %22, 128
br i1 %23, label %28, label %16, !llvm.loop !12
24: ; preds = %16
%25 = trunc nuw nsw i64 %17 to i32
%26 = and i32 %25, 255
%27 = xor i32 %26, 128
br label %28
28: ; preds = %21, %24, %10, %8, %2
%29 = phi i32 [ %0, %2 ], [ %15, %10 ], [ 0, %8 ], [ %27, %24 ], [ 0, %21 ]
ret i32 %29
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
|
reactos_sdk_tools_fatten_fatfs_option_extr_ccsbcs.c_ff_convert
|
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/msxml3/extr_saxreader.c__bstr_.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/msxml3/extr_saxreader.c__bstr_.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@alloced_bstrs_count = dso_local local_unnamed_addr global i64 0, align 8
@alloced_bstrs = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @_bstr_], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @_bstr_(ptr noundef %0) #0 {
%2 = load i64, ptr @alloced_bstrs_count, align 8, !tbaa !5
%3 = load ptr, ptr @alloced_bstrs, align 8, !tbaa !9
%4 = tail call i64 @ARRAY_SIZE(ptr noundef %3) #2
%5 = icmp ult i64 %2, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 noundef %6) #2
%8 = tail call i32 @alloc_str_from_narrow(ptr noundef %0) #2
%9 = load ptr, ptr @alloced_bstrs, align 8, !tbaa !9
%10 = load i64, ptr @alloced_bstrs_count, align 8, !tbaa !5
%11 = getelementptr inbounds i32, ptr %9, i64 %10
store i32 %8, ptr %11, align 4, !tbaa !11
%12 = add i64 %10, 1
store i64 %12, ptr @alloced_bstrs_count, align 8, !tbaa !5
ret i32 %8
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i64 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @alloc_str_from_narrow(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
|
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/msxml3/extr_saxreader.c__bstr_.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/msxml3/extr_saxreader.c__bstr_.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@alloced_bstrs_count = common local_unnamed_addr global i64 0, align 8
@alloced_bstrs = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @_bstr_], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @_bstr_(ptr noundef %0) #0 {
%2 = load i64, ptr @alloced_bstrs_count, align 8, !tbaa !6
%3 = load ptr, ptr @alloced_bstrs, align 8, !tbaa !10
%4 = tail call i64 @ARRAY_SIZE(ptr noundef %3) #2
%5 = icmp ult i64 %2, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 noundef %6) #2
%8 = tail call i32 @alloc_str_from_narrow(ptr noundef %0) #2
%9 = load ptr, ptr @alloced_bstrs, align 8, !tbaa !10
%10 = load i64, ptr @alloced_bstrs_count, align 8, !tbaa !6
%11 = getelementptr inbounds i32, ptr %9, i64 %10
store i32 %8, ptr %11, align 4, !tbaa !12
%12 = add i64 %10, 1
store i64 %12, ptr @alloced_bstrs_count, align 8, !tbaa !6
ret i32 %8
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i64 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @alloc_str_from_narrow(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
|
reactos_modules_rostests_winetests_msxml3_extr_saxreader.c__bstr_
|
; ModuleID = 'AnghaBench/freebsd/usr.bin/xargs/extr_strnsubst.c_strnsubst.c'
source_filename = "AnghaBench/freebsd/usr.bin/xargs/extr_strnsubst.c_strnsubst.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [7 x i8] c"calloc\00", align 1
@.str.1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
; Function Attrs: nounwind uwtable
define dso_local void @strnsubst(ptr nocapture noundef %0, ptr noundef readonly %1, ptr noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = load ptr, ptr %0, align 8, !tbaa !5
%6 = icmp eq ptr %5, null
br i1 %6, label %59, label %7
7: ; preds = %4
%8 = icmp eq i64 %3, 0
br i1 %8, label %9, label %12
9: ; preds = %7
%10 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %5)
%11 = add i64 %10, 1
br label %12
12: ; preds = %9, %7
%13 = phi i64 [ %11, %9 ], [ %3, %7 ]
%14 = phi ptr [ null, %9 ], [ %1, %7 ]
%15 = tail call ptr @calloc(i32 noundef 1, i64 noundef %13) #3
%16 = icmp eq ptr %15, null
br i1 %16, label %17, label %19
17: ; preds = %12
%18 = tail call i32 @err(i32 noundef 1, ptr noundef nonnull @.str) #3
br label %19
19: ; preds = %17, %12
%20 = icmp eq ptr %2, null
%21 = select i1 %20, ptr @.str.1, ptr %2
%22 = icmp eq ptr %14, null
br i1 %22, label %29, label %23
23: ; preds = %19
%24 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %5)
%25 = icmp eq i64 %13, %24
br i1 %25, label %29, label %26
26: ; preds = %23
%27 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %5, ptr noundef nonnull dereferenceable(1) %14)
%28 = icmp eq ptr %27, null
br i1 %28, label %55, label %31
29: ; preds = %23, %19
%30 = tail call i32 @strlcpy(ptr noundef %15, ptr noundef nonnull %5, i64 noundef %13) #3
br label %58
31: ; preds = %26, %45
%32 = phi ptr [ %53, %45 ], [ %27, %26 ]
%33 = phi ptr [ %52, %45 ], [ %5, %26 ]
%34 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %15)
%35 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %33)
%36 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %21)
%37 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %14)
%38 = add i64 %34, 1
%39 = add i64 %38, %35
%40 = add i64 %39, %36
%41 = sub i64 %40, %37
%42 = icmp ugt i64 %41, %13
br i1 %42, label %43, label %45
43: ; preds = %31
%44 = tail call i32 @strlcat(ptr noundef %15, ptr noundef %33, i64 noundef %13) #3
br label %58
45: ; preds = %31
%46 = ptrtoint ptr %32 to i64
%47 = ptrtoint ptr %33 to i64
%48 = sub i64 %46, %47
%49 = tail call i32 @strncat(ptr noundef %15, ptr noundef %33, i64 noundef %48) #3
%50 = tail call i32 @strcat(ptr noundef %15, ptr noundef nonnull %21) #3
%51 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %14)
%52 = getelementptr inbounds i8, ptr %32, i64 %51
%53 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %52, ptr noundef nonnull dereferenceable(1) %14)
%54 = icmp eq ptr %53, null
br i1 %54, label %55, label %31
55: ; preds = %45, %26
%56 = phi ptr [ %5, %26 ], [ %52, %45 ]
%57 = tail call i32 @strcat(ptr noundef %15, ptr noundef %56) #3
br label %58
58: ; preds = %55, %43, %29
store ptr %15, ptr %0, align 8, !tbaa !5
br label %59
59: ; preds = %4, %58
ret void
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i64 @strlen(ptr nocapture noundef) local_unnamed_addr #1
declare ptr @calloc(i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @err(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strlcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare ptr @strstr(ptr noundef, ptr nocapture noundef) local_unnamed_addr #1
declare i32 @strlcat(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @strncat(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @strcat(ptr noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/usr.bin/xargs/extr_strnsubst.c_strnsubst.c'
source_filename = "AnghaBench/freebsd/usr.bin/xargs/extr_strnsubst.c_strnsubst.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [7 x i8] c"calloc\00", align 1
@.str.1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @strnsubst(ptr nocapture noundef %0, ptr noundef readonly %1, ptr noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = icmp eq ptr %5, null
br i1 %6, label %59, label %7
7: ; preds = %4
%8 = icmp eq i64 %3, 0
br i1 %8, label %9, label %12
9: ; preds = %7
%10 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %5) #3
%11 = add i64 %10, 1
br label %12
12: ; preds = %9, %7
%13 = phi i64 [ %11, %9 ], [ %3, %7 ]
%14 = phi ptr [ null, %9 ], [ %1, %7 ]
%15 = tail call ptr @calloc(i32 noundef 1, i64 noundef %13) #3
%16 = icmp eq ptr %15, null
br i1 %16, label %17, label %19
17: ; preds = %12
%18 = tail call i32 @err(i32 noundef 1, ptr noundef nonnull @.str) #3
br label %19
19: ; preds = %17, %12
%20 = icmp eq ptr %2, null
%21 = select i1 %20, ptr @.str.1, ptr %2
%22 = icmp eq ptr %14, null
br i1 %22, label %29, label %23
23: ; preds = %19
%24 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %5) #3
%25 = icmp eq i64 %13, %24
br i1 %25, label %29, label %26
26: ; preds = %23
%27 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %5, ptr noundef nonnull dereferenceable(1) %14)
%28 = icmp eq ptr %27, null
br i1 %28, label %55, label %31
29: ; preds = %23, %19
%30 = tail call i32 @strlcpy(ptr noundef %15, ptr noundef nonnull %5, i64 noundef %13) #3
br label %58
31: ; preds = %26, %45
%32 = phi ptr [ %53, %45 ], [ %27, %26 ]
%33 = phi ptr [ %52, %45 ], [ %5, %26 ]
%34 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %15) #3
%35 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %33) #3
%36 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %21) #3
%37 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %14) #3
%38 = add i64 %34, 1
%39 = add i64 %38, %35
%40 = add i64 %39, %36
%41 = sub i64 %40, %37
%42 = icmp ugt i64 %41, %13
br i1 %42, label %43, label %45
43: ; preds = %31
%44 = tail call i32 @strlcat(ptr noundef %15, ptr noundef %33, i64 noundef %13) #3
br label %58
45: ; preds = %31
%46 = ptrtoint ptr %32 to i64
%47 = ptrtoint ptr %33 to i64
%48 = sub i64 %46, %47
%49 = tail call i32 @strncat(ptr noundef %15, ptr noundef %33, i64 noundef %48) #3
%50 = tail call i32 @strcat(ptr noundef %15, ptr noundef nonnull %21) #3
%51 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %14) #3
%52 = getelementptr inbounds i8, ptr %32, i64 %51
%53 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %52, ptr noundef nonnull dereferenceable(1) %14)
%54 = icmp eq ptr %53, null
br i1 %54, label %55, label %31
55: ; preds = %45, %26
%56 = phi ptr [ %5, %26 ], [ %52, %45 ]
%57 = tail call i32 @strcat(ptr noundef %15, ptr noundef %56) #3
br label %58
58: ; preds = %55, %43, %29
store ptr %15, ptr %0, align 8, !tbaa !6
br label %59
59: ; preds = %4, %58
ret void
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i64 @strlen(ptr nocapture noundef) local_unnamed_addr #1
declare ptr @calloc(i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @err(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strlcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare ptr @strstr(ptr noundef, ptr nocapture noundef) local_unnamed_addr #1
declare i32 @strlcat(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @strncat(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @strcat(ptr noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
freebsd_usr.bin_xargs_extr_strnsubst.c_strnsubst
|
; ModuleID = 'AnghaBench/freebsd/contrib/elftoolchain/elfdump/extr_elfdump.c_find_gotrel.c'
source_filename = "AnghaBench/freebsd/contrib/elftoolchain/elfdump/extr_elfdump.c_find_gotrel.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rel_entry = type { i64, %struct.TYPE_8__, i32 }
%struct.TYPE_8__ = type { %struct.TYPE_10__, i32 }
%struct.TYPE_10__ = type { i64, i32 }
%struct.elfdump = type { i64, ptr }
%struct.section = type { i64, i64, i64, i32, i32, i32 }
@SHT_REL = dso_local local_unnamed_addr global i64 0, align 8
@SHT_RELA = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [23 x i8] c"elf_getdata failed: %s\00", align 1
@.str.1 = private unnamed_addr constant [23 x i8] c"gelf_getrel failed: %s\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @find_gotrel], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @find_gotrel(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 {
%4 = alloca %struct.rel_entry, align 8
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = load i64, ptr %0, align 8, !tbaa !5
%7 = icmp eq i64 %6, 0
br i1 %7, label %103, label %8
8: ; preds = %3
%9 = getelementptr inbounds %struct.elfdump, ptr %0, i64 0, i32 1
%10 = getelementptr inbounds %struct.rel_entry, ptr %4, i64 0, i32 1, i32 1
%11 = getelementptr inbounds %struct.rel_entry, ptr %4, i64 0, i32 1
%12 = getelementptr inbounds %struct.section, ptr %1, i64 0, i32 2
%13 = getelementptr inbounds %struct.section, ptr %1, i64 0, i32 1
%14 = getelementptr inbounds %struct.rel_entry, ptr %4, i64 0, i32 1, i32 0, i32 1
%15 = getelementptr inbounds %struct.rel_entry, ptr %4, i64 0, i32 2
%16 = getelementptr inbounds %struct.section, ptr %1, i64 0, i32 3
br label %17
17: ; preds = %8, %99
%18 = phi i64 [ 0, %8 ], [ %100, %99 ]
%19 = load ptr, ptr %9, align 8, !tbaa !11
%20 = getelementptr inbounds %struct.section, ptr %19, i64 %18
%21 = load i64, ptr %20, align 8, !tbaa !12
%22 = load i64, ptr @SHT_REL, align 8, !tbaa !15
%23 = icmp eq i64 %21, %22
%24 = load i64, ptr @SHT_RELA, align 8
%25 = icmp eq i64 %21, %24
%26 = select i1 %23, i1 true, i1 %25
br i1 %26, label %27, label %99
27: ; preds = %17
%28 = call i32 (...) @elf_errno() #3
%29 = getelementptr inbounds %struct.section, ptr %19, i64 %18, i32 5
%30 = load i32, ptr %29, align 8, !tbaa !16
%31 = call ptr @elf_getdata(i32 noundef %30, ptr noundef null) #3
%32 = icmp eq ptr %31, null
br i1 %32, label %33, label %39
33: ; preds = %27
%34 = call i32 (...) @elf_errno() #3
%35 = icmp eq i32 %34, 0
br i1 %35, label %103, label %36
36: ; preds = %33
%37 = call i32 @elf_errmsg(i32 noundef %34) #3
%38 = call i32 @warnx(ptr noundef nonnull @.str, i32 noundef %37) #3
br label %103
39: ; preds = %27
%40 = call i32 @memset(ptr noundef nonnull %4, i32 noundef 0, i32 noundef 40) #3
%41 = load i64, ptr %20, align 8, !tbaa !12
store i64 %41, ptr %4, align 8, !tbaa !17
%42 = load i64, ptr %31, align 8, !tbaa !21
%43 = getelementptr inbounds %struct.section, ptr %19, i64 %18, i32 1
%44 = load i64, ptr %43, align 8, !tbaa !23
%45 = icmp eq i64 %42, %44
%46 = zext i1 %45 to i32
%47 = call i32 @assert(i32 noundef %46) #3
%48 = call i32 @get_ent_count(ptr noundef nonnull %20, ptr noundef nonnull %5) #3
%49 = icmp eq i32 %48, 0
br i1 %49, label %103, label %50
50: ; preds = %39
%51 = load i32, ptr %5, align 4, !tbaa !24
%52 = icmp sgt i32 %51, 0
br i1 %52, label %53, label %99
53: ; preds = %50
%54 = getelementptr inbounds %struct.section, ptr %19, i64 %18, i32 4
br label %55
55: ; preds = %53, %95
%56 = phi i32 [ 0, %53 ], [ %96, %95 ]
%57 = load i64, ptr %20, align 8, !tbaa !12
%58 = load i64, ptr @SHT_REL, align 8, !tbaa !15
%59 = icmp eq i64 %57, %58
br i1 %59, label %60, label %66
60: ; preds = %55
%61 = call ptr @gelf_getrel(ptr noundef nonnull %31, i32 noundef %56, ptr noundef nonnull %11) #3
%62 = icmp eq ptr %61, %11
br i1 %62, label %72, label %63
63: ; preds = %60
%64 = call i32 @elf_errmsg(i32 noundef -1) #3
%65 = call i32 @warnx(ptr noundef nonnull @.str.1, i32 noundef %64) #3
br label %95
66: ; preds = %55
%67 = call ptr @gelf_getrela(ptr noundef nonnull %31, i32 noundef %56, ptr noundef nonnull %10) #3
%68 = icmp eq ptr %67, %10
br i1 %68, label %72, label %69
69: ; preds = %66
%70 = call i32 @elf_errmsg(i32 noundef -1) #3
%71 = call i32 @warnx(ptr noundef nonnull @.str.1, i32 noundef %70) #3
br label %95
72: ; preds = %66, %60
%73 = load i64, ptr %11, align 8, !tbaa !25
%74 = load i64, ptr %12, align 8, !tbaa !26
%75 = icmp slt i64 %73, %74
br i1 %75, label %95, label %76
76: ; preds = %72
%77 = load i64, ptr %13, align 8, !tbaa !23
%78 = add nsw i64 %77, %74
%79 = icmp slt i64 %73, %78
br i1 %79, label %80, label %95
80: ; preds = %76
%81 = load i32, ptr %54, align 4, !tbaa !27
%82 = load i32, ptr %14, align 8, !tbaa !28
%83 = call i32 @GELF_R_SYM(i32 noundef %82) #3
%84 = call i32 @get_symbol_name(ptr noundef nonnull %0, i32 noundef %81, i32 noundef %83) #3
store i32 %84, ptr %15, align 8, !tbaa !29
%85 = load i64, ptr %11, align 8, !tbaa !25
%86 = load i64, ptr %12, align 8, !tbaa !26
%87 = sub nsw i64 %85, %86
%88 = load i32, ptr %16, align 8, !tbaa !30
%89 = sext i32 %88 to i64
%90 = sdiv i64 %87, %89
%91 = shl i64 %90, 32
%92 = ashr exact i64 %91, 32
%93 = getelementptr inbounds %struct.rel_entry, ptr %2, i64 %92
%94 = call i32 @memcpy(ptr noundef %93, ptr noundef nonnull %4, i32 noundef 40) #3
br label %95
95: ; preds = %72, %76, %80, %69, %63
%96 = add nuw nsw i32 %56, 1
%97 = load i32, ptr %5, align 4, !tbaa !24
%98 = icmp slt i32 %96, %97
br i1 %98, label %55, label %99, !llvm.loop !31
99: ; preds = %95, %50, %17
%100 = add nuw i64 %18, 1
%101 = load i64, ptr %0, align 8, !tbaa !5
%102 = icmp ult i64 %100, %101
br i1 %102, label %17, label %103, !llvm.loop !33
103: ; preds = %39, %99, %3, %33, %36
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @elf_errno(...) local_unnamed_addr #2
declare ptr @elf_getdata(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @warnx(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @elf_errmsg(i32 noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @assert(i32 noundef) local_unnamed_addr #2
declare i32 @get_ent_count(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @gelf_getrel(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @gelf_getrela(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @get_symbol_name(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @GELF_R_SYM(i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"elfdump", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !7, i64 0}
!13 = !{!"section", !7, i64 0, !7, i64 8, !7, i64 16, !14, i64 24, !14, i64 28, !14, i64 32}
!14 = !{!"int", !8, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{!13, !14, i64 32}
!17 = !{!18, !7, i64 0}
!18 = !{!"rel_entry", !7, i64 0, !19, i64 8, !14, i64 32}
!19 = !{!"TYPE_8__", !20, i64 0, !14, i64 16}
!20 = !{!"TYPE_10__", !7, i64 0, !14, i64 8}
!21 = !{!22, !7, i64 0}
!22 = !{!"TYPE_9__", !7, i64 0}
!23 = !{!13, !7, i64 8}
!24 = !{!14, !14, i64 0}
!25 = !{!18, !7, i64 8}
!26 = !{!13, !7, i64 16}
!27 = !{!13, !14, i64 28}
!28 = !{!18, !14, i64 16}
!29 = !{!18, !14, i64 32}
!30 = !{!13, !14, i64 24}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = distinct !{!33, !32}
|
; ModuleID = 'AnghaBench/freebsd/contrib/elftoolchain/elfdump/extr_elfdump.c_find_gotrel.c'
source_filename = "AnghaBench/freebsd/contrib/elftoolchain/elfdump/extr_elfdump.c_find_gotrel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.rel_entry = type { i64, %struct.TYPE_8__, i32 }
%struct.TYPE_8__ = type { %struct.TYPE_10__, i32 }
%struct.TYPE_10__ = type { i64, i32 }
%struct.section = type { i64, i64, i64, i32, i32, i32 }
@SHT_REL = common local_unnamed_addr global i64 0, align 8
@SHT_RELA = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [23 x i8] c"elf_getdata failed: %s\00", align 1
@.str.1 = private unnamed_addr constant [23 x i8] c"gelf_getrel failed: %s\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @find_gotrel], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @find_gotrel(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 {
%4 = alloca %struct.rel_entry, align 8
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = load i64, ptr %0, align 8, !tbaa !6
%7 = icmp eq i64 %6, 0
br i1 %7, label %103, label %8
8: ; preds = %3
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = getelementptr inbounds i8, ptr %4, i64 24
%11 = getelementptr inbounds i8, ptr %4, i64 8
%12 = getelementptr inbounds i8, ptr %1, i64 16
%13 = getelementptr inbounds i8, ptr %1, i64 8
%14 = getelementptr inbounds i8, ptr %4, i64 16
%15 = getelementptr inbounds i8, ptr %4, i64 32
%16 = getelementptr inbounds i8, ptr %1, i64 24
br label %17
17: ; preds = %8, %99
%18 = phi i64 [ 0, %8 ], [ %100, %99 ]
%19 = load ptr, ptr %9, align 8, !tbaa !12
%20 = getelementptr inbounds %struct.section, ptr %19, i64 %18
%21 = load i64, ptr %20, align 8, !tbaa !13
%22 = load i64, ptr @SHT_REL, align 8, !tbaa !16
%23 = icmp eq i64 %21, %22
%24 = load i64, ptr @SHT_RELA, align 8
%25 = icmp eq i64 %21, %24
%26 = select i1 %23, i1 true, i1 %25
br i1 %26, label %27, label %99
27: ; preds = %17
%28 = call i32 @elf_errno() #3
%29 = getelementptr inbounds i8, ptr %20, i64 32
%30 = load i32, ptr %29, align 8, !tbaa !17
%31 = call ptr @elf_getdata(i32 noundef %30, ptr noundef null) #3
%32 = icmp eq ptr %31, null
br i1 %32, label %33, label %39
33: ; preds = %27
%34 = call i32 @elf_errno() #3
%35 = icmp eq i32 %34, 0
br i1 %35, label %103, label %36
36: ; preds = %33
%37 = call i32 @elf_errmsg(i32 noundef %34) #3
%38 = call i32 @warnx(ptr noundef nonnull @.str, i32 noundef %37) #3
br label %103
39: ; preds = %27
%40 = call i32 @memset(ptr noundef nonnull %4, i32 noundef 0, i32 noundef 40) #3
%41 = load i64, ptr %20, align 8, !tbaa !13
store i64 %41, ptr %4, align 8, !tbaa !18
%42 = load i64, ptr %31, align 8, !tbaa !22
%43 = getelementptr inbounds i8, ptr %20, i64 8
%44 = load i64, ptr %43, align 8, !tbaa !24
%45 = icmp eq i64 %42, %44
%46 = zext i1 %45 to i32
%47 = call i32 @assert(i32 noundef %46) #3
%48 = call i32 @get_ent_count(ptr noundef nonnull %20, ptr noundef nonnull %5) #3
%49 = icmp eq i32 %48, 0
br i1 %49, label %103, label %50
50: ; preds = %39
%51 = load i32, ptr %5, align 4, !tbaa !25
%52 = icmp sgt i32 %51, 0
br i1 %52, label %53, label %99
53: ; preds = %50
%54 = getelementptr inbounds i8, ptr %20, i64 28
br label %55
55: ; preds = %53, %95
%56 = phi i32 [ 0, %53 ], [ %96, %95 ]
%57 = load i64, ptr %20, align 8, !tbaa !13
%58 = load i64, ptr @SHT_REL, align 8, !tbaa !16
%59 = icmp eq i64 %57, %58
br i1 %59, label %60, label %66
60: ; preds = %55
%61 = call ptr @gelf_getrel(ptr noundef nonnull %31, i32 noundef %56, ptr noundef nonnull %11) #3
%62 = icmp eq ptr %61, %11
br i1 %62, label %72, label %63
63: ; preds = %60
%64 = call i32 @elf_errmsg(i32 noundef -1) #3
%65 = call i32 @warnx(ptr noundef nonnull @.str.1, i32 noundef %64) #3
br label %95
66: ; preds = %55
%67 = call ptr @gelf_getrela(ptr noundef nonnull %31, i32 noundef %56, ptr noundef nonnull %10) #3
%68 = icmp eq ptr %67, %10
br i1 %68, label %72, label %69
69: ; preds = %66
%70 = call i32 @elf_errmsg(i32 noundef -1) #3
%71 = call i32 @warnx(ptr noundef nonnull @.str.1, i32 noundef %70) #3
br label %95
72: ; preds = %66, %60
%73 = load i64, ptr %11, align 8, !tbaa !26
%74 = load i64, ptr %12, align 8, !tbaa !27
%75 = icmp slt i64 %73, %74
br i1 %75, label %95, label %76
76: ; preds = %72
%77 = load i64, ptr %13, align 8, !tbaa !24
%78 = add nsw i64 %77, %74
%79 = icmp slt i64 %73, %78
br i1 %79, label %80, label %95
80: ; preds = %76
%81 = load i32, ptr %54, align 4, !tbaa !28
%82 = load i32, ptr %14, align 8, !tbaa !29
%83 = call i32 @GELF_R_SYM(i32 noundef %82) #3
%84 = call i32 @get_symbol_name(ptr noundef nonnull %0, i32 noundef %81, i32 noundef %83) #3
store i32 %84, ptr %15, align 8, !tbaa !30
%85 = load i64, ptr %11, align 8, !tbaa !26
%86 = load i64, ptr %12, align 8, !tbaa !27
%87 = sub nsw i64 %85, %86
%88 = load i32, ptr %16, align 8, !tbaa !31
%89 = sext i32 %88 to i64
%90 = sdiv i64 %87, %89
%91 = shl i64 %90, 32
%92 = ashr exact i64 %91, 32
%93 = getelementptr inbounds %struct.rel_entry, ptr %2, i64 %92
%94 = call i32 @memcpy(ptr noundef %93, ptr noundef nonnull %4, i32 noundef 40) #3
br label %95
95: ; preds = %72, %76, %80, %69, %63
%96 = add nuw nsw i32 %56, 1
%97 = load i32, ptr %5, align 4, !tbaa !25
%98 = icmp slt i32 %96, %97
br i1 %98, label %55, label %99, !llvm.loop !32
99: ; preds = %95, %50, %17
%100 = add nuw i64 %18, 1
%101 = load i64, ptr %0, align 8, !tbaa !6
%102 = icmp ult i64 %100, %101
br i1 %102, label %17, label %103, !llvm.loop !34
103: ; preds = %39, %99, %3, %33, %36
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @elf_errno(...) local_unnamed_addr #2
declare ptr @elf_getdata(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @warnx(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @elf_errmsg(i32 noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @assert(i32 noundef) local_unnamed_addr #2
declare i32 @get_ent_count(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @gelf_getrel(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @gelf_getrela(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @get_symbol_name(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @GELF_R_SYM(i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"elfdump", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !8, i64 0}
!14 = !{!"section", !8, i64 0, !8, i64 8, !8, i64 16, !15, i64 24, !15, i64 28, !15, i64 32}
!15 = !{!"int", !9, i64 0}
!16 = !{!8, !8, i64 0}
!17 = !{!14, !15, i64 32}
!18 = !{!19, !8, i64 0}
!19 = !{!"rel_entry", !8, i64 0, !20, i64 8, !15, i64 32}
!20 = !{!"TYPE_8__", !21, i64 0, !15, i64 16}
!21 = !{!"TYPE_10__", !8, i64 0, !15, i64 8}
!22 = !{!23, !8, i64 0}
!23 = !{!"TYPE_9__", !8, i64 0}
!24 = !{!14, !8, i64 8}
!25 = !{!15, !15, i64 0}
!26 = !{!19, !8, i64 8}
!27 = !{!14, !8, i64 16}
!28 = !{!14, !15, i64 28}
!29 = !{!19, !15, i64 16}
!30 = !{!19, !15, i64 32}
!31 = !{!14, !15, i64 24}
!32 = distinct !{!32, !33}
!33 = !{!"llvm.loop.mustprogress"}
!34 = distinct !{!34, !33}
|
freebsd_contrib_elftoolchain_elfdump_extr_elfdump.c_find_gotrel
|
; ModuleID = 'AnghaBench/sqlcipher/src/extr_btree.c_sqlite3BtreeCommit.c'
source_filename = "AnghaBench/sqlcipher/src/extr_btree.c_sqlite3BtreeCommit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SQLITE_OK = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @sqlite3BtreeCommit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @sqlite3BtreeEnter(ptr noundef %0) #2
%3 = tail call i32 @sqlite3BtreeCommitPhaseOne(ptr noundef %0, i32 noundef 0) #2
%4 = load i32, ptr @SQLITE_OK, align 4, !tbaa !5
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @sqlite3BtreeCommitPhaseTwo(ptr noundef %0, i32 noundef 0) #2
br label %8
8: ; preds = %6, %1
%9 = phi i32 [ %7, %6 ], [ %3, %1 ]
%10 = tail call i32 @sqlite3BtreeLeave(ptr noundef %0) #2
ret i32 %9
}
declare i32 @sqlite3BtreeEnter(ptr noundef) local_unnamed_addr #1
declare i32 @sqlite3BtreeCommitPhaseOne(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3BtreeCommitPhaseTwo(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3BtreeLeave(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/sqlcipher/src/extr_btree.c_sqlite3BtreeCommit.c'
source_filename = "AnghaBench/sqlcipher/src/extr_btree.c_sqlite3BtreeCommit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SQLITE_OK = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @sqlite3BtreeCommit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @sqlite3BtreeEnter(ptr noundef %0) #2
%3 = tail call i32 @sqlite3BtreeCommitPhaseOne(ptr noundef %0, i32 noundef 0) #2
%4 = load i32, ptr @SQLITE_OK, align 4, !tbaa !6
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @sqlite3BtreeCommitPhaseTwo(ptr noundef %0, i32 noundef 0) #2
br label %8
8: ; preds = %6, %1
%9 = phi i32 [ %7, %6 ], [ %3, %1 ]
%10 = tail call i32 @sqlite3BtreeLeave(ptr noundef %0) #2
ret i32 %9
}
declare i32 @sqlite3BtreeEnter(ptr noundef) local_unnamed_addr #1
declare i32 @sqlite3BtreeCommitPhaseOne(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3BtreeCommitPhaseTwo(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3BtreeLeave(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
sqlcipher_src_extr_btree.c_sqlite3BtreeCommit
|
; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_eeprom.c_eeprom_read16.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_eeprom.c_eeprom_read16.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, i32 }
@_func_enter_ = dso_local local_unnamed_addr global i32 0, align 4
@_module_rtl871x_eeprom_c_ = dso_local local_unnamed_addr global i32 0, align 4
@_drv_err_ = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"padapter->bSurpriseRemoved==true\00", align 1
@EE_9346CR = dso_local local_unnamed_addr global i32 0, align 4
@_EEDI = dso_local local_unnamed_addr global i32 0, align 4
@_EEDO = dso_local local_unnamed_addr global i32 0, align 4
@_EESK = dso_local local_unnamed_addr global i32 0, align 4
@_EEM0 = dso_local local_unnamed_addr global i32 0, align 4
@_EEM1 = dso_local local_unnamed_addr global i32 0, align 4
@_EECS = dso_local local_unnamed_addr global i32 0, align 4
@EEPROM_READ_OPCODE = dso_local local_unnamed_addr global i32 0, align 4
@_func_exit_ = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @eeprom_read16(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = icmp eq i32 %3, 1
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, ptr @_module_rtl871x_eeprom_c_, align 4, !tbaa !10
%7 = load i32, ptr @_drv_err_, align 4, !tbaa !10
%8 = tail call i32 @RT_TRACE(i32 noundef %6, i32 noundef %7, ptr noundef nonnull @.str) #2
br label %42
9: ; preds = %2
%10 = load i32, ptr @EE_9346CR, align 4, !tbaa !10
%11 = tail call i32 @rtw_read8(ptr noundef nonnull %0, i32 noundef %10) #2
%12 = load i32, ptr %0, align 4, !tbaa !5
%13 = icmp eq i32 %12, 1
br i1 %13, label %14, label %18
14: ; preds = %9
%15 = load i32, ptr @_module_rtl871x_eeprom_c_, align 4, !tbaa !10
%16 = load i32, ptr @_drv_err_, align 4, !tbaa !10
%17 = tail call i32 @RT_TRACE(i32 noundef %15, i32 noundef %16, ptr noundef nonnull @.str) #2
br label %42
18: ; preds = %9
%19 = load i32, ptr @_EEDI, align 4, !tbaa !10
%20 = load i32, ptr @_EEDO, align 4, !tbaa !10
%21 = or i32 %20, %19
%22 = load i32, ptr @_EESK, align 4, !tbaa !10
%23 = or i32 %21, %22
%24 = load i32, ptr @_EEM0, align 4, !tbaa !10
%25 = or i32 %23, %24
%26 = xor i32 %25, -1
%27 = and i32 %11, %26
%28 = load i32, ptr @_EEM1, align 4, !tbaa !10
%29 = load i32, ptr @_EECS, align 4, !tbaa !10
%30 = or i32 %29, %28
%31 = or i32 %30, %27
%32 = load i32, ptr @EE_9346CR, align 4, !tbaa !10
%33 = trunc i32 %31 to i8
%34 = tail call i32 @rtw_write8(ptr noundef nonnull %0, i32 noundef %32, i8 noundef zeroext %33) #2
%35 = load i32, ptr @EEPROM_READ_OPCODE, align 4, !tbaa !10
%36 = tail call i32 @shift_out_bits(ptr noundef nonnull %0, i32 noundef %35, i32 noundef 3) #2
%37 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%38 = load i32, ptr %37, align 4, !tbaa !11
%39 = tail call i32 @shift_out_bits(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %38) #2
%40 = tail call i32 @shift_in_bits(ptr noundef nonnull %0) #2
%41 = tail call i32 @eeprom_clean(ptr noundef nonnull %0) #2
br label %42
42: ; preds = %18, %14, %5
%43 = phi i32 [ 0, %5 ], [ 0, %14 ], [ %40, %18 ]
ret i32 %43
}
declare i32 @RT_TRACE(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rtw_read8(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rtw_write8(ptr noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @shift_out_bits(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @shift_in_bits(ptr noundef) local_unnamed_addr #1
declare i32 @eeprom_clean(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_8__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 4}
|
; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_eeprom.c_eeprom_read16.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_eeprom.c_eeprom_read16.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@_func_enter_ = common local_unnamed_addr global i32 0, align 4
@_module_rtl871x_eeprom_c_ = common local_unnamed_addr global i32 0, align 4
@_drv_err_ = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"padapter->bSurpriseRemoved==true\00", align 1
@EE_9346CR = common local_unnamed_addr global i32 0, align 4
@_EEDI = common local_unnamed_addr global i32 0, align 4
@_EEDO = common local_unnamed_addr global i32 0, align 4
@_EESK = common local_unnamed_addr global i32 0, align 4
@_EEM0 = common local_unnamed_addr global i32 0, align 4
@_EEM1 = common local_unnamed_addr global i32 0, align 4
@_EECS = common local_unnamed_addr global i32 0, align 4
@EEPROM_READ_OPCODE = common local_unnamed_addr global i32 0, align 4
@_func_exit_ = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @eeprom_read16(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = icmp eq i32 %3, 1
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, ptr @_module_rtl871x_eeprom_c_, align 4, !tbaa !11
%7 = load i32, ptr @_drv_err_, align 4, !tbaa !11
%8 = tail call i32 @RT_TRACE(i32 noundef %6, i32 noundef %7, ptr noundef nonnull @.str) #2
br label %42
9: ; preds = %2
%10 = load i32, ptr @EE_9346CR, align 4, !tbaa !11
%11 = tail call i32 @rtw_read8(ptr noundef nonnull %0, i32 noundef %10) #2
%12 = load i32, ptr %0, align 4, !tbaa !6
%13 = icmp eq i32 %12, 1
br i1 %13, label %14, label %18
14: ; preds = %9
%15 = load i32, ptr @_module_rtl871x_eeprom_c_, align 4, !tbaa !11
%16 = load i32, ptr @_drv_err_, align 4, !tbaa !11
%17 = tail call i32 @RT_TRACE(i32 noundef %15, i32 noundef %16, ptr noundef nonnull @.str) #2
br label %42
18: ; preds = %9
%19 = load i32, ptr @_EEDI, align 4, !tbaa !11
%20 = load i32, ptr @_EEDO, align 4, !tbaa !11
%21 = or i32 %20, %19
%22 = load i32, ptr @_EESK, align 4, !tbaa !11
%23 = or i32 %21, %22
%24 = load i32, ptr @_EEM0, align 4, !tbaa !11
%25 = or i32 %23, %24
%26 = xor i32 %25, -1
%27 = and i32 %11, %26
%28 = load i32, ptr @_EEM1, align 4, !tbaa !11
%29 = load i32, ptr @_EECS, align 4, !tbaa !11
%30 = or i32 %29, %28
%31 = or i32 %30, %27
%32 = load i32, ptr @EE_9346CR, align 4, !tbaa !11
%33 = trunc i32 %31 to i8
%34 = tail call i32 @rtw_write8(ptr noundef nonnull %0, i32 noundef %32, i8 noundef zeroext %33) #2
%35 = load i32, ptr @EEPROM_READ_OPCODE, align 4, !tbaa !11
%36 = tail call i32 @shift_out_bits(ptr noundef nonnull %0, i32 noundef %35, i32 noundef 3) #2
%37 = getelementptr inbounds i8, ptr %0, i64 4
%38 = load i32, ptr %37, align 4, !tbaa !12
%39 = tail call i32 @shift_out_bits(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %38) #2
%40 = tail call i32 @shift_in_bits(ptr noundef nonnull %0) #2
%41 = tail call i32 @eeprom_clean(ptr noundef nonnull %0) #2
br label %42
42: ; preds = %18, %14, %5
%43 = phi i32 [ 0, %5 ], [ 0, %14 ], [ %40, %18 ]
ret i32 %43
}
declare i32 @RT_TRACE(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rtw_read8(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rtw_write8(ptr noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @shift_out_bits(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @shift_in_bits(ptr noundef) local_unnamed_addr #1
declare i32 @eeprom_clean(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_8__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 4}
|
linux_drivers_staging_rtl8723bs_core_extr_rtw_eeprom.c_eeprom_read16
|
; ModuleID = 'AnghaBench/kphp-kdb/targ/extr_targ-import-dump.c_process_matches_row.c'
source_filename = "AnghaBench/kphp-kdb/targ/extr_targ-import-dump.c_process_matches_row.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.lev_proposal = type { i32, i32, i64, i32 }
@L = dso_local local_unnamed_addr global ptr null, align 8
@mp_question = dso_local local_unnamed_addr global i64 0, align 8
@S = dso_local local_unnamed_addr global ptr null, align 8
@I = dso_local local_unnamed_addr global ptr null, align 8
@mp_id = dso_local local_unnamed_addr global i64 0, align 8
@user_id = dso_local local_unnamed_addr global i64 0, align 8
@mp_category = dso_local local_unnamed_addr global i64 0, align 8
@LEV_TARG_PROPOSAL = dso_local local_unnamed_addr global i32 0, align 4
@adj_rec = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @process_matches_row() local_unnamed_addr #0 {
%1 = load ptr, ptr @L, align 8, !tbaa !5
%2 = load i64, ptr @mp_question, align 8, !tbaa !9
%3 = getelementptr inbounds i32, ptr %1, i64 %2
%4 = load i32, ptr %3, align 4, !tbaa !11
%5 = load ptr, ptr @S, align 8, !tbaa !5
%6 = getelementptr inbounds ptr, ptr %5, i64 %2
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = load ptr, ptr @I, align 8, !tbaa !5
%9 = load i64, ptr @mp_id, align 8, !tbaa !9
%10 = getelementptr inbounds i64, ptr %8, i64 %9
%11 = load i64, ptr %10, align 8, !tbaa !9
store i64 %11, ptr @user_id, align 8, !tbaa !9
%12 = tail call i32 @fits(i64 noundef %11) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %281, label %14
14: ; preds = %0
%15 = load ptr, ptr @I, align 8, !tbaa !5
%16 = load i64, ptr @mp_category, align 8, !tbaa !9
%17 = getelementptr inbounds i64, ptr %15, i64 %16
%18 = load i64, ptr %17, align 8, !tbaa !9
%19 = icmp ne i64 %18, 0
%20 = icmp eq i32 %4, 0
%21 = select i1 %19, i1 true, i1 %20
%22 = icmp sgt i32 %4, 1023
%23 = select i1 %21, i1 true, i1 %22
br i1 %23, label %281, label %24
24: ; preds = %14
%25 = add nsw i32 %4, 11
%26 = tail call ptr @write_alloc(i32 noundef %25) #2
%27 = load i32, ptr @LEV_TARG_PROPOSAL, align 4, !tbaa !11
%28 = getelementptr inbounds %struct.lev_proposal, ptr %26, i64 0, i32 3
store i32 %27, ptr %28, align 8, !tbaa !13
%29 = load i64, ptr @user_id, align 8, !tbaa !9
%30 = getelementptr inbounds %struct.lev_proposal, ptr %26, i64 0, i32 2
store i64 %29, ptr %30, align 8, !tbaa !15
store i32 %4, ptr %26, align 8, !tbaa !16
%31 = icmp sgt i32 %4, 0
br i1 %31, label %32, label %275
32: ; preds = %24
%33 = zext nneg i32 %4 to i64
%34 = icmp ult i32 %4, 8
br i1 %34, label %264, label %35
35: ; preds = %32
%36 = icmp ult i32 %4, 32
br i1 %36, label %213, label %37
37: ; preds = %35
%38 = and i64 %33, 2147483616
br label %39
39: ; preds = %205, %37
%40 = phi i64 [ 0, %37 ], [ %206, %205 ]
%41 = or disjoint i64 %40, 16
%42 = getelementptr inbounds i8, ptr %7, i64 %40
%43 = getelementptr inbounds i8, ptr %42, i64 16
%44 = load <16 x i8>, ptr %42, align 1, !tbaa !17
%45 = load <16 x i8>, ptr %43, align 1, !tbaa !17
%46 = icmp ult <16 x i8> %44, <i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32>
%47 = icmp ult <16 x i8> %45, <i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32>
%48 = extractelement <16 x i1> %46, i64 0
br i1 %48, label %49, label %51
49: ; preds = %39
%50 = getelementptr inbounds i8, ptr %7, i64 %40
store i8 32, ptr %50, align 1, !tbaa !17
br label %51
51: ; preds = %49, %39
%52 = extractelement <16 x i1> %46, i64 1
br i1 %52, label %53, label %56
53: ; preds = %51
%54 = or disjoint i64 %40, 1
%55 = getelementptr inbounds i8, ptr %7, i64 %54
store i8 32, ptr %55, align 1, !tbaa !17
br label %56
56: ; preds = %53, %51
%57 = extractelement <16 x i1> %46, i64 2
br i1 %57, label %58, label %61
58: ; preds = %56
%59 = or disjoint i64 %40, 2
%60 = getelementptr inbounds i8, ptr %7, i64 %59
store i8 32, ptr %60, align 1, !tbaa !17
br label %61
61: ; preds = %58, %56
%62 = extractelement <16 x i1> %46, i64 3
br i1 %62, label %63, label %66
63: ; preds = %61
%64 = or disjoint i64 %40, 3
%65 = getelementptr inbounds i8, ptr %7, i64 %64
store i8 32, ptr %65, align 1, !tbaa !17
br label %66
66: ; preds = %63, %61
%67 = extractelement <16 x i1> %46, i64 4
br i1 %67, label %68, label %71
68: ; preds = %66
%69 = or disjoint i64 %40, 4
%70 = getelementptr inbounds i8, ptr %7, i64 %69
store i8 32, ptr %70, align 1, !tbaa !17
br label %71
71: ; preds = %68, %66
%72 = extractelement <16 x i1> %46, i64 5
br i1 %72, label %73, label %76
73: ; preds = %71
%74 = or disjoint i64 %40, 5
%75 = getelementptr inbounds i8, ptr %7, i64 %74
store i8 32, ptr %75, align 1, !tbaa !17
br label %76
76: ; preds = %73, %71
%77 = extractelement <16 x i1> %46, i64 6
br i1 %77, label %78, label %81
78: ; preds = %76
%79 = or disjoint i64 %40, 6
%80 = getelementptr inbounds i8, ptr %7, i64 %79
store i8 32, ptr %80, align 1, !tbaa !17
br label %81
81: ; preds = %78, %76
%82 = extractelement <16 x i1> %46, i64 7
br i1 %82, label %83, label %86
83: ; preds = %81
%84 = or disjoint i64 %40, 7
%85 = getelementptr inbounds i8, ptr %7, i64 %84
store i8 32, ptr %85, align 1, !tbaa !17
br label %86
86: ; preds = %83, %81
%87 = extractelement <16 x i1> %46, i64 8
br i1 %87, label %88, label %91
88: ; preds = %86
%89 = or disjoint i64 %40, 8
%90 = getelementptr inbounds i8, ptr %7, i64 %89
store i8 32, ptr %90, align 1, !tbaa !17
br label %91
91: ; preds = %88, %86
%92 = extractelement <16 x i1> %46, i64 9
br i1 %92, label %93, label %96
93: ; preds = %91
%94 = or disjoint i64 %40, 9
%95 = getelementptr inbounds i8, ptr %7, i64 %94
store i8 32, ptr %95, align 1, !tbaa !17
br label %96
96: ; preds = %93, %91
%97 = extractelement <16 x i1> %46, i64 10
br i1 %97, label %98, label %101
98: ; preds = %96
%99 = or disjoint i64 %40, 10
%100 = getelementptr inbounds i8, ptr %7, i64 %99
store i8 32, ptr %100, align 1, !tbaa !17
br label %101
101: ; preds = %98, %96
%102 = extractelement <16 x i1> %46, i64 11
br i1 %102, label %103, label %106
103: ; preds = %101
%104 = or disjoint i64 %40, 11
%105 = getelementptr inbounds i8, ptr %7, i64 %104
store i8 32, ptr %105, align 1, !tbaa !17
br label %106
106: ; preds = %103, %101
%107 = extractelement <16 x i1> %46, i64 12
br i1 %107, label %108, label %111
108: ; preds = %106
%109 = or disjoint i64 %40, 12
%110 = getelementptr inbounds i8, ptr %7, i64 %109
store i8 32, ptr %110, align 1, !tbaa !17
br label %111
111: ; preds = %108, %106
%112 = extractelement <16 x i1> %46, i64 13
br i1 %112, label %113, label %116
113: ; preds = %111
%114 = or disjoint i64 %40, 13
%115 = getelementptr inbounds i8, ptr %7, i64 %114
store i8 32, ptr %115, align 1, !tbaa !17
br label %116
116: ; preds = %113, %111
%117 = extractelement <16 x i1> %46, i64 14
br i1 %117, label %118, label %121
118: ; preds = %116
%119 = or disjoint i64 %40, 14
%120 = getelementptr inbounds i8, ptr %7, i64 %119
store i8 32, ptr %120, align 1, !tbaa !17
br label %121
121: ; preds = %118, %116
%122 = extractelement <16 x i1> %46, i64 15
br i1 %122, label %123, label %126
123: ; preds = %121
%124 = or disjoint i64 %40, 15
%125 = getelementptr inbounds i8, ptr %7, i64 %124
store i8 32, ptr %125, align 1, !tbaa !17
br label %126
126: ; preds = %123, %121
%127 = extractelement <16 x i1> %47, i64 0
br i1 %127, label %128, label %130
128: ; preds = %126
%129 = getelementptr inbounds i8, ptr %7, i64 %41
store i8 32, ptr %129, align 1, !tbaa !17
br label %130
130: ; preds = %128, %126
%131 = extractelement <16 x i1> %47, i64 1
br i1 %131, label %132, label %135
132: ; preds = %130
%133 = or disjoint i64 %40, 17
%134 = getelementptr inbounds i8, ptr %7, i64 %133
store i8 32, ptr %134, align 1, !tbaa !17
br label %135
135: ; preds = %132, %130
%136 = extractelement <16 x i1> %47, i64 2
br i1 %136, label %137, label %140
137: ; preds = %135
%138 = or disjoint i64 %40, 18
%139 = getelementptr inbounds i8, ptr %7, i64 %138
store i8 32, ptr %139, align 1, !tbaa !17
br label %140
140: ; preds = %137, %135
%141 = extractelement <16 x i1> %47, i64 3
br i1 %141, label %142, label %145
142: ; preds = %140
%143 = or disjoint i64 %40, 19
%144 = getelementptr inbounds i8, ptr %7, i64 %143
store i8 32, ptr %144, align 1, !tbaa !17
br label %145
145: ; preds = %142, %140
%146 = extractelement <16 x i1> %47, i64 4
br i1 %146, label %147, label %150
147: ; preds = %145
%148 = or disjoint i64 %40, 20
%149 = getelementptr inbounds i8, ptr %7, i64 %148
store i8 32, ptr %149, align 1, !tbaa !17
br label %150
150: ; preds = %147, %145
%151 = extractelement <16 x i1> %47, i64 5
br i1 %151, label %152, label %155
152: ; preds = %150
%153 = or disjoint i64 %40, 21
%154 = getelementptr inbounds i8, ptr %7, i64 %153
store i8 32, ptr %154, align 1, !tbaa !17
br label %155
155: ; preds = %152, %150
%156 = extractelement <16 x i1> %47, i64 6
br i1 %156, label %157, label %160
157: ; preds = %155
%158 = or disjoint i64 %40, 22
%159 = getelementptr inbounds i8, ptr %7, i64 %158
store i8 32, ptr %159, align 1, !tbaa !17
br label %160
160: ; preds = %157, %155
%161 = extractelement <16 x i1> %47, i64 7
br i1 %161, label %162, label %165
162: ; preds = %160
%163 = or disjoint i64 %40, 23
%164 = getelementptr inbounds i8, ptr %7, i64 %163
store i8 32, ptr %164, align 1, !tbaa !17
br label %165
165: ; preds = %162, %160
%166 = extractelement <16 x i1> %47, i64 8
br i1 %166, label %167, label %170
167: ; preds = %165
%168 = or disjoint i64 %40, 24
%169 = getelementptr inbounds i8, ptr %7, i64 %168
store i8 32, ptr %169, align 1, !tbaa !17
br label %170
170: ; preds = %167, %165
%171 = extractelement <16 x i1> %47, i64 9
br i1 %171, label %172, label %175
172: ; preds = %170
%173 = or disjoint i64 %40, 25
%174 = getelementptr inbounds i8, ptr %7, i64 %173
store i8 32, ptr %174, align 1, !tbaa !17
br label %175
175: ; preds = %172, %170
%176 = extractelement <16 x i1> %47, i64 10
br i1 %176, label %177, label %180
177: ; preds = %175
%178 = or disjoint i64 %40, 26
%179 = getelementptr inbounds i8, ptr %7, i64 %178
store i8 32, ptr %179, align 1, !tbaa !17
br label %180
180: ; preds = %177, %175
%181 = extractelement <16 x i1> %47, i64 11
br i1 %181, label %182, label %185
182: ; preds = %180
%183 = or disjoint i64 %40, 27
%184 = getelementptr inbounds i8, ptr %7, i64 %183
store i8 32, ptr %184, align 1, !tbaa !17
br label %185
185: ; preds = %182, %180
%186 = extractelement <16 x i1> %47, i64 12
br i1 %186, label %187, label %190
187: ; preds = %185
%188 = or disjoint i64 %40, 28
%189 = getelementptr inbounds i8, ptr %7, i64 %188
store i8 32, ptr %189, align 1, !tbaa !17
br label %190
190: ; preds = %187, %185
%191 = extractelement <16 x i1> %47, i64 13
br i1 %191, label %192, label %195
192: ; preds = %190
%193 = or disjoint i64 %40, 29
%194 = getelementptr inbounds i8, ptr %7, i64 %193
store i8 32, ptr %194, align 1, !tbaa !17
br label %195
195: ; preds = %192, %190
%196 = extractelement <16 x i1> %47, i64 14
br i1 %196, label %197, label %200
197: ; preds = %195
%198 = or disjoint i64 %40, 30
%199 = getelementptr inbounds i8, ptr %7, i64 %198
store i8 32, ptr %199, align 1, !tbaa !17
br label %200
200: ; preds = %197, %195
%201 = extractelement <16 x i1> %47, i64 15
br i1 %201, label %202, label %205
202: ; preds = %200
%203 = or disjoint i64 %40, 31
%204 = getelementptr inbounds i8, ptr %7, i64 %203
store i8 32, ptr %204, align 1, !tbaa !17
br label %205
205: ; preds = %202, %200
%206 = add nuw i64 %40, 32
%207 = icmp eq i64 %206, %38
br i1 %207, label %208, label %39, !llvm.loop !18
208: ; preds = %205
%209 = icmp eq i64 %38, %33
br i1 %209, label %275, label %210
210: ; preds = %208
%211 = and i64 %33, 24
%212 = icmp eq i64 %211, 0
br i1 %212, label %264, label %213
213: ; preds = %35, %210
%214 = phi i64 [ %38, %210 ], [ 0, %35 ]
%215 = and i64 %33, 2147483640
br label %216
216: ; preds = %259, %213
%217 = phi i64 [ %214, %213 ], [ %260, %259 ]
%218 = getelementptr inbounds i8, ptr %7, i64 %217
%219 = load <8 x i8>, ptr %218, align 1, !tbaa !17
%220 = icmp ult <8 x i8> %219, <i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32>
%221 = extractelement <8 x i1> %220, i64 0
br i1 %221, label %222, label %224
222: ; preds = %216
%223 = getelementptr inbounds i8, ptr %7, i64 %217
store i8 32, ptr %223, align 1, !tbaa !17
br label %224
224: ; preds = %222, %216
%225 = extractelement <8 x i1> %220, i64 1
br i1 %225, label %226, label %229
226: ; preds = %224
%227 = or disjoint i64 %217, 1
%228 = getelementptr inbounds i8, ptr %7, i64 %227
store i8 32, ptr %228, align 1, !tbaa !17
br label %229
229: ; preds = %226, %224
%230 = extractelement <8 x i1> %220, i64 2
br i1 %230, label %231, label %234
231: ; preds = %229
%232 = or disjoint i64 %217, 2
%233 = getelementptr inbounds i8, ptr %7, i64 %232
store i8 32, ptr %233, align 1, !tbaa !17
br label %234
234: ; preds = %231, %229
%235 = extractelement <8 x i1> %220, i64 3
br i1 %235, label %236, label %239
236: ; preds = %234
%237 = or disjoint i64 %217, 3
%238 = getelementptr inbounds i8, ptr %7, i64 %237
store i8 32, ptr %238, align 1, !tbaa !17
br label %239
239: ; preds = %236, %234
%240 = extractelement <8 x i1> %220, i64 4
br i1 %240, label %241, label %244
241: ; preds = %239
%242 = or disjoint i64 %217, 4
%243 = getelementptr inbounds i8, ptr %7, i64 %242
store i8 32, ptr %243, align 1, !tbaa !17
br label %244
244: ; preds = %241, %239
%245 = extractelement <8 x i1> %220, i64 5
br i1 %245, label %246, label %249
246: ; preds = %244
%247 = or disjoint i64 %217, 5
%248 = getelementptr inbounds i8, ptr %7, i64 %247
store i8 32, ptr %248, align 1, !tbaa !17
br label %249
249: ; preds = %246, %244
%250 = extractelement <8 x i1> %220, i64 6
br i1 %250, label %251, label %254
251: ; preds = %249
%252 = or disjoint i64 %217, 6
%253 = getelementptr inbounds i8, ptr %7, i64 %252
store i8 32, ptr %253, align 1, !tbaa !17
br label %254
254: ; preds = %251, %249
%255 = extractelement <8 x i1> %220, i64 7
br i1 %255, label %256, label %259
256: ; preds = %254
%257 = or disjoint i64 %217, 7
%258 = getelementptr inbounds i8, ptr %7, i64 %257
store i8 32, ptr %258, align 1, !tbaa !17
br label %259
259: ; preds = %256, %254
%260 = add nuw i64 %217, 8
%261 = icmp eq i64 %260, %215
br i1 %261, label %262, label %216, !llvm.loop !22
262: ; preds = %259
%263 = icmp eq i64 %215, %33
br i1 %263, label %275, label %264
264: ; preds = %32, %210, %262
%265 = phi i64 [ 0, %32 ], [ %38, %210 ], [ %215, %262 ]
br label %266
266: ; preds = %264, %272
%267 = phi i64 [ %273, %272 ], [ %265, %264 ]
%268 = getelementptr inbounds i8, ptr %7, i64 %267
%269 = load i8, ptr %268, align 1, !tbaa !17
%270 = icmp ult i8 %269, 32
br i1 %270, label %271, label %272
271: ; preds = %266
store i8 32, ptr %268, align 1, !tbaa !17
br label %272
272: ; preds = %266, %271
%273 = add nuw nsw i64 %267, 1
%274 = icmp eq i64 %273, %33
br i1 %274, label %275, label %266, !llvm.loop !23
275: ; preds = %272, %208, %262, %24
%276 = getelementptr inbounds %struct.lev_proposal, ptr %26, i64 0, i32 1
%277 = load i32, ptr %276, align 4, !tbaa !24
%278 = tail call i32 @strcpy(i32 noundef %277, ptr noundef %7) #2
%279 = load i32, ptr @adj_rec, align 4, !tbaa !11
%280 = add nsw i32 %279, 1
store i32 %280, ptr @adj_rec, align 4, !tbaa !11
br label %281
281: ; preds = %0, %14, %275
ret void
}
declare i32 @fits(i64 noundef) local_unnamed_addr #1
declare ptr @write_alloc(i32 noundef) local_unnamed_addr #1
declare i32 @strcpy(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 16}
!14 = !{!"lev_proposal", !12, i64 0, !12, i64 4, !10, i64 8, !12, i64 16}
!15 = !{!14, !10, i64 8}
!16 = !{!14, !12, i64 0}
!17 = !{!7, !7, i64 0}
!18 = distinct !{!18, !19, !20, !21}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!"llvm.loop.isvectorized", i32 1}
!21 = !{!"llvm.loop.unroll.runtime.disable"}
!22 = distinct !{!22, !19, !20, !21}
!23 = distinct !{!23, !19, !21, !20}
!24 = !{!14, !12, i64 4}
|
; ModuleID = 'AnghaBench/kphp-kdb/targ/extr_targ-import-dump.c_process_matches_row.c'
source_filename = "AnghaBench/kphp-kdb/targ/extr_targ-import-dump.c_process_matches_row.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@L = common local_unnamed_addr global ptr null, align 8
@mp_question = common local_unnamed_addr global i64 0, align 8
@S = common local_unnamed_addr global ptr null, align 8
@I = common local_unnamed_addr global ptr null, align 8
@mp_id = common local_unnamed_addr global i64 0, align 8
@user_id = common local_unnamed_addr global i64 0, align 8
@mp_category = common local_unnamed_addr global i64 0, align 8
@LEV_TARG_PROPOSAL = common local_unnamed_addr global i32 0, align 4
@adj_rec = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @process_matches_row() local_unnamed_addr #0 {
%1 = load ptr, ptr @L, align 8, !tbaa !6
%2 = load i64, ptr @mp_question, align 8, !tbaa !10
%3 = getelementptr inbounds i32, ptr %1, i64 %2
%4 = load i32, ptr %3, align 4, !tbaa !12
%5 = load ptr, ptr @S, align 8, !tbaa !6
%6 = getelementptr inbounds ptr, ptr %5, i64 %2
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = load ptr, ptr @I, align 8, !tbaa !6
%9 = load i64, ptr @mp_id, align 8, !tbaa !10
%10 = getelementptr inbounds i64, ptr %8, i64 %9
%11 = load i64, ptr %10, align 8, !tbaa !10
store i64 %11, ptr @user_id, align 8, !tbaa !10
%12 = tail call i32 @fits(i64 noundef %11) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %198, label %14
14: ; preds = %0
%15 = load ptr, ptr @I, align 8, !tbaa !6
%16 = load i64, ptr @mp_category, align 8, !tbaa !10
%17 = getelementptr inbounds i64, ptr %15, i64 %16
%18 = load i64, ptr %17, align 8, !tbaa !10
%19 = icmp ne i64 %18, 0
%20 = icmp eq i32 %4, 0
%21 = icmp sgt i32 %4, 1023
%22 = or i1 %20, %21
%23 = select i1 %19, i1 true, i1 %22
br i1 %23, label %198, label %24
24: ; preds = %14
%25 = add nsw i32 %4, 11
%26 = tail call ptr @write_alloc(i32 noundef %25) #2
%27 = load i32, ptr @LEV_TARG_PROPOSAL, align 4, !tbaa !12
%28 = getelementptr inbounds i8, ptr %26, i64 16
store i32 %27, ptr %28, align 8, !tbaa !14
%29 = load i64, ptr @user_id, align 8, !tbaa !10
%30 = getelementptr inbounds i8, ptr %26, i64 8
store i64 %29, ptr %30, align 8, !tbaa !16
store i32 %4, ptr %26, align 8, !tbaa !17
%31 = icmp sgt i32 %4, 0
br i1 %31, label %32, label %192
32: ; preds = %24
%33 = zext nneg i32 %4 to i64
%34 = icmp ult i32 %4, 8
br i1 %34, label %181, label %35
35: ; preds = %32
%36 = icmp ult i32 %4, 16
br i1 %36, label %130, label %37
37: ; preds = %35
%38 = and i64 %33, 2147483632
br label %39
39: ; preds = %122, %37
%40 = phi i64 [ 0, %37 ], [ %123, %122 ]
%41 = getelementptr inbounds i8, ptr %7, i64 %40
%42 = load <16 x i8>, ptr %41, align 1, !tbaa !18
%43 = icmp ult <16 x i8> %42, <i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32>
%44 = extractelement <16 x i1> %43, i64 0
br i1 %44, label %45, label %47
45: ; preds = %39
%46 = getelementptr inbounds i8, ptr %7, i64 %40
store i8 32, ptr %46, align 1, !tbaa !18
br label %47
47: ; preds = %45, %39
%48 = extractelement <16 x i1> %43, i64 1
br i1 %48, label %49, label %52
49: ; preds = %47
%50 = or disjoint i64 %40, 1
%51 = getelementptr inbounds i8, ptr %7, i64 %50
store i8 32, ptr %51, align 1, !tbaa !18
br label %52
52: ; preds = %49, %47
%53 = extractelement <16 x i1> %43, i64 2
br i1 %53, label %54, label %57
54: ; preds = %52
%55 = or disjoint i64 %40, 2
%56 = getelementptr inbounds i8, ptr %7, i64 %55
store i8 32, ptr %56, align 1, !tbaa !18
br label %57
57: ; preds = %54, %52
%58 = extractelement <16 x i1> %43, i64 3
br i1 %58, label %59, label %62
59: ; preds = %57
%60 = or disjoint i64 %40, 3
%61 = getelementptr inbounds i8, ptr %7, i64 %60
store i8 32, ptr %61, align 1, !tbaa !18
br label %62
62: ; preds = %59, %57
%63 = extractelement <16 x i1> %43, i64 4
br i1 %63, label %64, label %67
64: ; preds = %62
%65 = or disjoint i64 %40, 4
%66 = getelementptr inbounds i8, ptr %7, i64 %65
store i8 32, ptr %66, align 1, !tbaa !18
br label %67
67: ; preds = %64, %62
%68 = extractelement <16 x i1> %43, i64 5
br i1 %68, label %69, label %72
69: ; preds = %67
%70 = or disjoint i64 %40, 5
%71 = getelementptr inbounds i8, ptr %7, i64 %70
store i8 32, ptr %71, align 1, !tbaa !18
br label %72
72: ; preds = %69, %67
%73 = extractelement <16 x i1> %43, i64 6
br i1 %73, label %74, label %77
74: ; preds = %72
%75 = or disjoint i64 %40, 6
%76 = getelementptr inbounds i8, ptr %7, i64 %75
store i8 32, ptr %76, align 1, !tbaa !18
br label %77
77: ; preds = %74, %72
%78 = extractelement <16 x i1> %43, i64 7
br i1 %78, label %79, label %82
79: ; preds = %77
%80 = or disjoint i64 %40, 7
%81 = getelementptr inbounds i8, ptr %7, i64 %80
store i8 32, ptr %81, align 1, !tbaa !18
br label %82
82: ; preds = %79, %77
%83 = extractelement <16 x i1> %43, i64 8
br i1 %83, label %84, label %87
84: ; preds = %82
%85 = or disjoint i64 %40, 8
%86 = getelementptr inbounds i8, ptr %7, i64 %85
store i8 32, ptr %86, align 1, !tbaa !18
br label %87
87: ; preds = %84, %82
%88 = extractelement <16 x i1> %43, i64 9
br i1 %88, label %89, label %92
89: ; preds = %87
%90 = or disjoint i64 %40, 9
%91 = getelementptr inbounds i8, ptr %7, i64 %90
store i8 32, ptr %91, align 1, !tbaa !18
br label %92
92: ; preds = %89, %87
%93 = extractelement <16 x i1> %43, i64 10
br i1 %93, label %94, label %97
94: ; preds = %92
%95 = or disjoint i64 %40, 10
%96 = getelementptr inbounds i8, ptr %7, i64 %95
store i8 32, ptr %96, align 1, !tbaa !18
br label %97
97: ; preds = %94, %92
%98 = extractelement <16 x i1> %43, i64 11
br i1 %98, label %99, label %102
99: ; preds = %97
%100 = or disjoint i64 %40, 11
%101 = getelementptr inbounds i8, ptr %7, i64 %100
store i8 32, ptr %101, align 1, !tbaa !18
br label %102
102: ; preds = %99, %97
%103 = extractelement <16 x i1> %43, i64 12
br i1 %103, label %104, label %107
104: ; preds = %102
%105 = or disjoint i64 %40, 12
%106 = getelementptr inbounds i8, ptr %7, i64 %105
store i8 32, ptr %106, align 1, !tbaa !18
br label %107
107: ; preds = %104, %102
%108 = extractelement <16 x i1> %43, i64 13
br i1 %108, label %109, label %112
109: ; preds = %107
%110 = or disjoint i64 %40, 13
%111 = getelementptr inbounds i8, ptr %7, i64 %110
store i8 32, ptr %111, align 1, !tbaa !18
br label %112
112: ; preds = %109, %107
%113 = extractelement <16 x i1> %43, i64 14
br i1 %113, label %114, label %117
114: ; preds = %112
%115 = or disjoint i64 %40, 14
%116 = getelementptr inbounds i8, ptr %7, i64 %115
store i8 32, ptr %116, align 1, !tbaa !18
br label %117
117: ; preds = %114, %112
%118 = extractelement <16 x i1> %43, i64 15
br i1 %118, label %119, label %122
119: ; preds = %117
%120 = or disjoint i64 %40, 15
%121 = getelementptr inbounds i8, ptr %7, i64 %120
store i8 32, ptr %121, align 1, !tbaa !18
br label %122
122: ; preds = %119, %117
%123 = add nuw i64 %40, 16
%124 = icmp eq i64 %123, %38
br i1 %124, label %125, label %39, !llvm.loop !19
125: ; preds = %122
%126 = icmp eq i64 %38, %33
br i1 %126, label %192, label %127
127: ; preds = %125
%128 = and i64 %33, 8
%129 = icmp eq i64 %128, 0
br i1 %129, label %181, label %130
130: ; preds = %35, %127
%131 = phi i64 [ %38, %127 ], [ 0, %35 ]
%132 = and i64 %33, 2147483640
br label %133
133: ; preds = %176, %130
%134 = phi i64 [ %131, %130 ], [ %177, %176 ]
%135 = getelementptr inbounds i8, ptr %7, i64 %134
%136 = load <8 x i8>, ptr %135, align 1, !tbaa !18
%137 = icmp ult <8 x i8> %136, <i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32>
%138 = extractelement <8 x i1> %137, i64 0
br i1 %138, label %139, label %141
139: ; preds = %133
%140 = getelementptr inbounds i8, ptr %7, i64 %134
store i8 32, ptr %140, align 1, !tbaa !18
br label %141
141: ; preds = %139, %133
%142 = extractelement <8 x i1> %137, i64 1
br i1 %142, label %143, label %146
143: ; preds = %141
%144 = or disjoint i64 %134, 1
%145 = getelementptr inbounds i8, ptr %7, i64 %144
store i8 32, ptr %145, align 1, !tbaa !18
br label %146
146: ; preds = %143, %141
%147 = extractelement <8 x i1> %137, i64 2
br i1 %147, label %148, label %151
148: ; preds = %146
%149 = or disjoint i64 %134, 2
%150 = getelementptr inbounds i8, ptr %7, i64 %149
store i8 32, ptr %150, align 1, !tbaa !18
br label %151
151: ; preds = %148, %146
%152 = extractelement <8 x i1> %137, i64 3
br i1 %152, label %153, label %156
153: ; preds = %151
%154 = or disjoint i64 %134, 3
%155 = getelementptr inbounds i8, ptr %7, i64 %154
store i8 32, ptr %155, align 1, !tbaa !18
br label %156
156: ; preds = %153, %151
%157 = extractelement <8 x i1> %137, i64 4
br i1 %157, label %158, label %161
158: ; preds = %156
%159 = or disjoint i64 %134, 4
%160 = getelementptr inbounds i8, ptr %7, i64 %159
store i8 32, ptr %160, align 1, !tbaa !18
br label %161
161: ; preds = %158, %156
%162 = extractelement <8 x i1> %137, i64 5
br i1 %162, label %163, label %166
163: ; preds = %161
%164 = or disjoint i64 %134, 5
%165 = getelementptr inbounds i8, ptr %7, i64 %164
store i8 32, ptr %165, align 1, !tbaa !18
br label %166
166: ; preds = %163, %161
%167 = extractelement <8 x i1> %137, i64 6
br i1 %167, label %168, label %171
168: ; preds = %166
%169 = or disjoint i64 %134, 6
%170 = getelementptr inbounds i8, ptr %7, i64 %169
store i8 32, ptr %170, align 1, !tbaa !18
br label %171
171: ; preds = %168, %166
%172 = extractelement <8 x i1> %137, i64 7
br i1 %172, label %173, label %176
173: ; preds = %171
%174 = or disjoint i64 %134, 7
%175 = getelementptr inbounds i8, ptr %7, i64 %174
store i8 32, ptr %175, align 1, !tbaa !18
br label %176
176: ; preds = %173, %171
%177 = add nuw i64 %134, 8
%178 = icmp eq i64 %177, %132
br i1 %178, label %179, label %133, !llvm.loop !23
179: ; preds = %176
%180 = icmp eq i64 %132, %33
br i1 %180, label %192, label %181
181: ; preds = %179, %32, %127
%182 = phi i64 [ 0, %32 ], [ %38, %127 ], [ %132, %179 ]
br label %183
183: ; preds = %181, %189
%184 = phi i64 [ %190, %189 ], [ %182, %181 ]
%185 = getelementptr inbounds i8, ptr %7, i64 %184
%186 = load i8, ptr %185, align 1, !tbaa !18
%187 = icmp ult i8 %186, 32
br i1 %187, label %188, label %189
188: ; preds = %183
store i8 32, ptr %185, align 1, !tbaa !18
br label %189
189: ; preds = %183, %188
%190 = add nuw nsw i64 %184, 1
%191 = icmp eq i64 %190, %33
br i1 %191, label %192, label %183, !llvm.loop !24
192: ; preds = %189, %125, %179, %24
%193 = getelementptr inbounds i8, ptr %26, i64 4
%194 = load i32, ptr %193, align 4, !tbaa !25
%195 = tail call i32 @strcpy(i32 noundef %194, ptr noundef %7) #2
%196 = load i32, ptr @adj_rec, align 4, !tbaa !12
%197 = add nsw i32 %196, 1
store i32 %197, ptr @adj_rec, align 4, !tbaa !12
br label %198
198: ; preds = %0, %14, %192
ret void
}
declare i32 @fits(i64 noundef) local_unnamed_addr #1
declare ptr @write_alloc(i32 noundef) local_unnamed_addr #1
declare i32 @strcpy(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !13, i64 16}
!15 = !{!"lev_proposal", !13, i64 0, !13, i64 4, !11, i64 8, !13, i64 16}
!16 = !{!15, !11, i64 8}
!17 = !{!15, !13, i64 0}
!18 = !{!8, !8, i64 0}
!19 = distinct !{!19, !20, !21, !22}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!"llvm.loop.isvectorized", i32 1}
!22 = !{!"llvm.loop.unroll.runtime.disable"}
!23 = distinct !{!23, !20, !21, !22}
!24 = distinct !{!24, !20, !22, !21}
!25 = !{!15, !13, i64 4}
|
kphp-kdb_targ_extr_targ-import-dump.c_process_matches_row
|
; ModuleID = 'AnghaBench/postgres/src/backend/storage/file/extr_fd.c_SyncDataDirectory.c'
source_filename = "AnghaBench/postgres/src/backend/storage/file/extr_fd.c_SyncDataDirectory.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.stat = type { i32 }
@enableFsync = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [7 x i8] c"pg_wal\00", align 1
@LOG = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [29 x i8] c"could not stat file \22%s\22: %m\00", align 1
@.str.2 = private unnamed_addr constant [2 x i8] c".\00", align 1
@datadir_fsync_fname = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [10 x i8] c"pg_tblspc\00", align 1
@DEBUG1 = dso_local local_unnamed_addr global i32 0, align 4
@pre_sync_fname = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @SyncDataDirectory() local_unnamed_addr #0 {
%1 = alloca %struct.stat, align 4
%2 = load i32, ptr @enableFsync, align 4, !tbaa !5
%3 = icmp eq i32 %2, 0
br i1 %3, label %28, label %4
4: ; preds = %0
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%5 = call i64 @lstat(ptr noundef nonnull @.str, ptr noundef nonnull %1) #3
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, ptr @LOG, align 4, !tbaa !5
%9 = call i32 (...) @errcode_for_file_access() #3
%10 = call i32 @errmsg(ptr noundef nonnull @.str.1, ptr noundef nonnull @.str) #3
%11 = call i32 @ereport(i32 noundef %8, i32 noundef %10) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
br label %19
12: ; preds = %4
%13 = load i32, ptr %1, align 4, !tbaa !9
%14 = call i64 @S_ISLNK(i32 noundef %13) #3
%15 = icmp eq i64 %14, 0
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
%16 = load i32, ptr @datadir_fsync_fname, align 4, !tbaa !5
%17 = load i32, ptr @LOG, align 4, !tbaa !5
%18 = call i32 @walkdir(ptr noundef nonnull @.str.2, i32 noundef %16, i32 noundef 0, i32 noundef %17) #3
br i1 %15, label %24, label %19
19: ; preds = %12, %7
%20 = phi ptr [ @.str.2, %7 ], [ @.str, %12 ]
%21 = load i32, ptr @datadir_fsync_fname, align 4, !tbaa !5
%22 = load i32, ptr @LOG, align 4, !tbaa !5
%23 = call i32 @walkdir(ptr noundef nonnull %20, i32 noundef %21, i32 noundef 0, i32 noundef %22) #3
br label %24
24: ; preds = %19, %12
%25 = load i32, ptr @datadir_fsync_fname, align 4, !tbaa !5
%26 = load i32, ptr @LOG, align 4, !tbaa !5
%27 = call i32 @walkdir(ptr noundef nonnull @.str.3, i32 noundef %25, i32 noundef 1, i32 noundef %26) #3
br label %28
28: ; preds = %0, %24
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @lstat(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ereport(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @errcode_for_file_access(...) local_unnamed_addr #2
declare i32 @errmsg(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @S_ISLNK(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @walkdir(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"stat", !6, i64 0}
|
; ModuleID = 'AnghaBench/postgres/src/backend/storage/file/extr_fd.c_SyncDataDirectory.c'
source_filename = "AnghaBench/postgres/src/backend/storage/file/extr_fd.c_SyncDataDirectory.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.stat = type { i32 }
@enableFsync = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [7 x i8] c"pg_wal\00", align 1
@LOG = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [29 x i8] c"could not stat file \22%s\22: %m\00", align 1
@.str.2 = private unnamed_addr constant [2 x i8] c".\00", align 1
@datadir_fsync_fname = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [10 x i8] c"pg_tblspc\00", align 1
@DEBUG1 = common local_unnamed_addr global i32 0, align 4
@pre_sync_fname = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @SyncDataDirectory() local_unnamed_addr #0 {
%1 = alloca %struct.stat, align 4
%2 = load i32, ptr @enableFsync, align 4, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %28, label %4
4: ; preds = %0
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%5 = call i64 @lstat(ptr noundef nonnull @.str, ptr noundef nonnull %1) #3
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, ptr @LOG, align 4, !tbaa !6
%9 = call i32 @errcode_for_file_access() #3
%10 = call i32 @errmsg(ptr noundef nonnull @.str.1, ptr noundef nonnull @.str) #3
%11 = call i32 @ereport(i32 noundef %8, i32 noundef %10) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
br label %19
12: ; preds = %4
%13 = load i32, ptr %1, align 4, !tbaa !10
%14 = call i64 @S_ISLNK(i32 noundef %13) #3
%15 = icmp eq i64 %14, 0
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
%16 = load i32, ptr @datadir_fsync_fname, align 4, !tbaa !6
%17 = load i32, ptr @LOG, align 4, !tbaa !6
%18 = call i32 @walkdir(ptr noundef nonnull @.str.2, i32 noundef %16, i32 noundef 0, i32 noundef %17) #3
br i1 %15, label %24, label %19
19: ; preds = %12, %7
%20 = phi ptr [ @.str.2, %7 ], [ @.str, %12 ]
%21 = load i32, ptr @datadir_fsync_fname, align 4, !tbaa !6
%22 = load i32, ptr @LOG, align 4, !tbaa !6
%23 = call i32 @walkdir(ptr noundef nonnull %20, i32 noundef %21, i32 noundef 0, i32 noundef %22) #3
br label %24
24: ; preds = %19, %12
%25 = load i32, ptr @datadir_fsync_fname, align 4, !tbaa !6
%26 = load i32, ptr @LOG, align 4, !tbaa !6
%27 = call i32 @walkdir(ptr noundef nonnull @.str.3, i32 noundef %25, i32 noundef 1, i32 noundef %26) #3
br label %28
28: ; preds = %0, %24
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @lstat(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ereport(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @errcode_for_file_access(...) local_unnamed_addr #2
declare i32 @errmsg(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @S_ISLNK(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @walkdir(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"stat", !7, i64 0}
|
postgres_src_backend_storage_file_extr_fd.c_SyncDataDirectory
|
; ModuleID = 'AnghaBench/RetroArch/deps/libvita2d/source/extr_vita2d_texture.c_vita2d_draw_texture_tint_part.c'
source_filename = "AnghaBench/RetroArch/deps/libvita2d/source/extr_vita2d_texture.c_vita2d_draw_texture_tint_part.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @vita2d_draw_texture_tint_part(ptr noundef %0, float noundef %1, float noundef %2, float noundef %3, float noundef %4, float noundef %5, float noundef %6, i32 noundef %7) local_unnamed_addr #0 {
%9 = tail call i32 (...) @set_texture_tint_program() #2
%10 = tail call i32 (...) @set_texture_wvp_uniform() #2
%11 = tail call i32 @set_texture_tint_color_uniform(i32 noundef %7) #2
%12 = tail call i32 @draw_texture_part_generic(ptr noundef %0, float noundef %1, float noundef %2, float noundef %3, float noundef %4, float noundef %5, float noundef %6) #2
ret void
}
declare i32 @set_texture_tint_program(...) local_unnamed_addr #1
declare i32 @set_texture_wvp_uniform(...) local_unnamed_addr #1
declare i32 @set_texture_tint_color_uniform(i32 noundef) local_unnamed_addr #1
declare i32 @draw_texture_part_generic(ptr noundef, float noundef, float noundef, float noundef, float noundef, float noundef, float noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/RetroArch/deps/libvita2d/source/extr_vita2d_texture.c_vita2d_draw_texture_tint_part.c'
source_filename = "AnghaBench/RetroArch/deps/libvita2d/source/extr_vita2d_texture.c_vita2d_draw_texture_tint_part.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @vita2d_draw_texture_tint_part(ptr noundef %0, float noundef %1, float noundef %2, float noundef %3, float noundef %4, float noundef %5, float noundef %6, i32 noundef %7) local_unnamed_addr #0 {
%9 = tail call i32 @set_texture_tint_program() #2
%10 = tail call i32 @set_texture_wvp_uniform() #2
%11 = tail call i32 @set_texture_tint_color_uniform(i32 noundef %7) #2
%12 = tail call i32 @draw_texture_part_generic(ptr noundef %0, float noundef %1, float noundef %2, float noundef %3, float noundef %4, float noundef %5, float noundef %6) #2
ret void
}
declare i32 @set_texture_tint_program(...) local_unnamed_addr #1
declare i32 @set_texture_wvp_uniform(...) local_unnamed_addr #1
declare i32 @set_texture_tint_color_uniform(i32 noundef) local_unnamed_addr #1
declare i32 @draw_texture_part_generic(ptr noundef, float noundef, float noundef, float noundef, float noundef, float noundef, float noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
RetroArch_deps_libvita2d_source_extr_vita2d_texture.c_vita2d_draw_texture_tint_part
|
; ModuleID = 'AnghaBench/mimikatz/modules/extr_sqlite3_omit.c_total_changes.c'
source_filename = "AnghaBench/mimikatz/modules/extr_sqlite3_omit.c_total_changes.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @total_changes], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @total_changes(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @sqlite3_context_db_handle(ptr noundef %0) #2
%5 = tail call i32 @UNUSED_PARAMETER2(i32 noundef %1, ptr noundef %2) #2
%6 = tail call i32 @sqlite3_total_changes(ptr noundef %4) #2
%7 = tail call i32 @sqlite3_result_int(ptr noundef %0, i32 noundef %6) #2
ret void
}
declare ptr @sqlite3_context_db_handle(ptr noundef) local_unnamed_addr #1
declare i32 @UNUSED_PARAMETER2(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sqlite3_result_int(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3_total_changes(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/mimikatz/modules/extr_sqlite3_omit.c_total_changes.c'
source_filename = "AnghaBench/mimikatz/modules/extr_sqlite3_omit.c_total_changes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @total_changes], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @total_changes(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @sqlite3_context_db_handle(ptr noundef %0) #2
%5 = tail call i32 @UNUSED_PARAMETER2(i32 noundef %1, ptr noundef %2) #2
%6 = tail call i32 @sqlite3_total_changes(ptr noundef %4) #2
%7 = tail call i32 @sqlite3_result_int(ptr noundef %0, i32 noundef %6) #2
ret void
}
declare ptr @sqlite3_context_db_handle(ptr noundef) local_unnamed_addr #1
declare i32 @UNUSED_PARAMETER2(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sqlite3_result_int(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3_total_changes(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
mimikatz_modules_extr_sqlite3_omit.c_total_changes
|
; ModuleID = 'AnghaBench/mpv/video/out/extr_x11_common.c_vo_x11_check_net_wm_state_fullscreen_change.c'
source_filename = "AnghaBench/mpv/video/out/extr_x11_common.c_vo_x11_check_net_wm_state_fullscreen_change.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vo = type { ptr, ptr }
%struct.vo_x11_state = type { i32, i32, i32, i32, i32, i32, i32, i64 }
@vo_wm_FULLSCREEN = dso_local local_unnamed_addr global i32 0, align 4
@_NET_WM_STATE = dso_local local_unnamed_addr global i32 0, align 4
@XA_ATOM = dso_local local_unnamed_addr global i32 0, align 4
@_NET_WM_STATE_FULLSCREEN = dso_local local_unnamed_addr global i32 0, align 4
@VO_EVENT_FULLSCREEN_STATE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @vo_x11_check_net_wm_state_fullscreen_change], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vo_x11_check_net_wm_state_fullscreen_change(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = getelementptr inbounds %struct.vo, ptr %0, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.vo_x11_state, ptr %4, i64 0, i32 7
%6 = load i64, ptr %5, align 8, !tbaa !10
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %77
8: ; preds = %1
%9 = load i32, ptr %4, align 8, !tbaa !14
%10 = load i32, ptr @vo_wm_FULLSCREEN, align 4, !tbaa !15
%11 = and i32 %10, %9
%12 = icmp eq i32 %11, 0
br i1 %12, label %77, label %13
13: ; preds = %8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%14 = getelementptr inbounds %struct.vo_x11_state, ptr %4, i64 0, i32 6
%15 = load i32, ptr %14, align 8, !tbaa !16
%16 = load i32, ptr @_NET_WM_STATE, align 4, !tbaa !15
%17 = tail call i64 @XA(ptr noundef nonnull %4, i32 noundef %16) #3
%18 = load i32, ptr @XA_ATOM, align 4, !tbaa !15
%19 = call ptr @x11_get_property(ptr noundef nonnull %4, i32 noundef %15, i64 noundef %17, i32 noundef %18, i32 noundef 32, ptr noundef nonnull %2) #3
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %31
21: ; preds = %13
%22 = load ptr, ptr %0, align 8, !tbaa !17
%23 = load i32, ptr %22, align 4, !tbaa !18
%24 = icmp eq i32 %23, 0
br i1 %24, label %76, label %25
25: ; preds = %21
store i32 0, ptr %22, align 4, !tbaa !18
%26 = getelementptr inbounds %struct.vo_x11_state, ptr %4, i64 0, i32 1
store i32 0, ptr %26, align 4, !tbaa !20
%27 = load i32, ptr @VO_EVENT_FULLSCREEN_STATE, align 4, !tbaa !15
%28 = getelementptr inbounds %struct.vo_x11_state, ptr %4, i64 0, i32 5
%29 = load i32, ptr %28, align 4, !tbaa !21
%30 = or i32 %29, %27
store i32 %30, ptr %28, align 4, !tbaa !21
br label %60
31: ; preds = %13
%32 = load i32, ptr @_NET_WM_STATE_FULLSCREEN, align 4, !tbaa !15
%33 = call i64 @XA(ptr noundef nonnull %4, i32 noundef %32) #3
%34 = load i32, ptr %2, align 4, !tbaa !15
%35 = icmp sgt i32 %34, 0
br i1 %35, label %36, label %46
36: ; preds = %31
%37 = zext nneg i32 %34 to i64
br label %41
38: ; preds = %41
%39 = add nuw nsw i64 %42, 1
%40 = icmp eq i64 %39, %37
br i1 %40, label %46, label %41, !llvm.loop !22
41: ; preds = %36, %38
%42 = phi i64 [ 0, %36 ], [ %39, %38 ]
%43 = getelementptr inbounds i64, ptr %19, i64 %42
%44 = load i64, ptr %43, align 8, !tbaa !24
%45 = icmp eq i64 %44, %33
br i1 %45, label %46, label %38
46: ; preds = %41, %38, %31
%47 = phi i1 [ false, %31 ], [ %45, %38 ], [ %45, %41 ]
%48 = phi i32 [ 0, %31 ], [ 1, %41 ], [ 0, %38 ]
%49 = call i32 @XFree(ptr noundef nonnull %19) #3
%50 = load ptr, ptr %0, align 8, !tbaa !17
%51 = load i32, ptr %50, align 4, !tbaa !18
%52 = icmp ne i32 %51, 0
%53 = xor i1 %47, %52
br i1 %53, label %54, label %76
54: ; preds = %46
store i32 %48, ptr %50, align 4, !tbaa !18
%55 = getelementptr inbounds %struct.vo_x11_state, ptr %4, i64 0, i32 1
store i32 %48, ptr %55, align 4, !tbaa !20
%56 = load i32, ptr @VO_EVENT_FULLSCREEN_STATE, align 4, !tbaa !15
%57 = getelementptr inbounds %struct.vo_x11_state, ptr %4, i64 0, i32 5
%58 = load i32, ptr %57, align 4, !tbaa !21
%59 = or i32 %58, %56
store i32 %59, ptr %57, align 4, !tbaa !21
br i1 %47, label %72, label %60
60: ; preds = %25, %54
%61 = getelementptr inbounds %struct.vo_x11_state, ptr %4, i64 0, i32 2
%62 = load i32, ptr %61, align 8, !tbaa !25
%63 = icmp eq i32 %62, 0
%64 = getelementptr inbounds %struct.vo_x11_state, ptr %4, i64 0, i32 3
%65 = load i32, ptr %64, align 4, !tbaa !26
%66 = icmp eq i32 %65, 0
%67 = select i1 %63, i1 %66, i1 false
br i1 %67, label %72, label %68
68: ; preds = %60
%69 = getelementptr inbounds %struct.vo_x11_state, ptr %4, i64 0, i32 4
%70 = load i32, ptr %69, align 8, !tbaa !27
%71 = call i32 @vo_x11_move_resize(ptr noundef nonnull %0, i32 noundef %62, i32 noundef %65, i32 noundef %70) #3
br label %72
72: ; preds = %60, %68, %54
%73 = getelementptr inbounds %struct.vo_x11_state, ptr %4, i64 0, i32 3
store i32 0, ptr %73, align 4, !tbaa !26
%74 = getelementptr inbounds %struct.vo_x11_state, ptr %4, i64 0, i32 2
store i32 0, ptr %74, align 8, !tbaa !25
%75 = call i32 @vo_x11_update_composition_hint(ptr noundef nonnull %0) #3
br label %76
76: ; preds = %21, %46, %72
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %77
77: ; preds = %8, %76, %1
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @x11_get_property(ptr noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @XA(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @XFree(ptr noundef) local_unnamed_addr #2
declare i32 @vo_x11_move_resize(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vo_x11_update_composition_hint(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"vo", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 32}
!11 = !{!"vo_x11_state", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !13, i64 32}
!12 = !{!"int", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !12, i64 0}
!15 = !{!12, !12, i64 0}
!16 = !{!11, !12, i64 24}
!17 = !{!6, !7, i64 0}
!18 = !{!19, !12, i64 0}
!19 = !{!"TYPE_2__", !12, i64 0}
!20 = !{!11, !12, i64 4}
!21 = !{!11, !12, i64 20}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!13, !13, i64 0}
!25 = !{!11, !12, i64 8}
!26 = !{!11, !12, i64 12}
!27 = !{!11, !12, i64 16}
|
; ModuleID = 'AnghaBench/mpv/video/out/extr_x11_common.c_vo_x11_check_net_wm_state_fullscreen_change.c'
source_filename = "AnghaBench/mpv/video/out/extr_x11_common.c_vo_x11_check_net_wm_state_fullscreen_change.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@vo_wm_FULLSCREEN = common local_unnamed_addr global i32 0, align 4
@_NET_WM_STATE = common local_unnamed_addr global i32 0, align 4
@XA_ATOM = common local_unnamed_addr global i32 0, align 4
@_NET_WM_STATE_FULLSCREEN = common local_unnamed_addr global i32 0, align 4
@VO_EVENT_FULLSCREEN_STATE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vo_x11_check_net_wm_state_fullscreen_change], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vo_x11_check_net_wm_state_fullscreen_change(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %4, i64 32
%6 = load i64, ptr %5, align 8, !tbaa !11
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %76
8: ; preds = %1
%9 = load i32, ptr %4, align 8, !tbaa !15
%10 = load i32, ptr @vo_wm_FULLSCREEN, align 4, !tbaa !16
%11 = and i32 %10, %9
%12 = icmp eq i32 %11, 0
br i1 %12, label %76, label %13
13: ; preds = %8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%14 = getelementptr inbounds i8, ptr %4, i64 24
%15 = load i32, ptr %14, align 8, !tbaa !17
%16 = load i32, ptr @_NET_WM_STATE, align 4, !tbaa !16
%17 = tail call i64 @XA(ptr noundef nonnull %4, i32 noundef %16) #3
%18 = load i32, ptr @XA_ATOM, align 4, !tbaa !16
%19 = call ptr @x11_get_property(ptr noundef nonnull %4, i32 noundef %15, i64 noundef %17, i32 noundef %18, i32 noundef 32, ptr noundef nonnull %2) #3
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %31
21: ; preds = %13
%22 = load ptr, ptr %0, align 8, !tbaa !18
%23 = load i32, ptr %22, align 4, !tbaa !19
%24 = icmp eq i32 %23, 0
br i1 %24, label %75, label %25
25: ; preds = %21
store i32 0, ptr %22, align 4, !tbaa !19
%26 = getelementptr inbounds i8, ptr %4, i64 4
store i32 0, ptr %26, align 4, !tbaa !21
%27 = load i32, ptr @VO_EVENT_FULLSCREEN_STATE, align 4, !tbaa !16
%28 = getelementptr inbounds i8, ptr %4, i64 20
%29 = load i32, ptr %28, align 4, !tbaa !22
%30 = or i32 %29, %27
store i32 %30, ptr %28, align 4, !tbaa !22
br label %60
31: ; preds = %13
%32 = load i32, ptr @_NET_WM_STATE_FULLSCREEN, align 4, !tbaa !16
%33 = call i64 @XA(ptr noundef nonnull %4, i32 noundef %32) #3
%34 = load i32, ptr %2, align 4, !tbaa !16
%35 = icmp sgt i32 %34, 0
br i1 %35, label %36, label %46
36: ; preds = %31
%37 = zext nneg i32 %34 to i64
br label %41
38: ; preds = %41
%39 = add nuw nsw i64 %42, 1
%40 = icmp eq i64 %39, %37
br i1 %40, label %46, label %41, !llvm.loop !23
41: ; preds = %36, %38
%42 = phi i64 [ 0, %36 ], [ %39, %38 ]
%43 = getelementptr inbounds i64, ptr %19, i64 %42
%44 = load i64, ptr %43, align 8, !tbaa !25
%45 = icmp eq i64 %44, %33
br i1 %45, label %46, label %38
46: ; preds = %41, %38, %31
%47 = phi i1 [ false, %31 ], [ %45, %38 ], [ %45, %41 ]
%48 = phi i32 [ 0, %31 ], [ 1, %41 ], [ 0, %38 ]
%49 = call i32 @XFree(ptr noundef nonnull %19) #3
%50 = load ptr, ptr %0, align 8, !tbaa !18
%51 = load i32, ptr %50, align 4, !tbaa !19
%52 = icmp ne i32 %51, 0
%53 = xor i1 %47, %52
br i1 %53, label %54, label %75
54: ; preds = %46
store i32 %48, ptr %50, align 4, !tbaa !19
%55 = getelementptr inbounds i8, ptr %4, i64 4
store i32 %48, ptr %55, align 4, !tbaa !21
%56 = load i32, ptr @VO_EVENT_FULLSCREEN_STATE, align 4, !tbaa !16
%57 = getelementptr inbounds i8, ptr %4, i64 20
%58 = load i32, ptr %57, align 4, !tbaa !22
%59 = or i32 %58, %56
store i32 %59, ptr %57, align 4, !tbaa !22
br i1 %47, label %72, label %60
60: ; preds = %25, %54
%61 = getelementptr inbounds i8, ptr %4, i64 8
%62 = load i32, ptr %61, align 8, !tbaa !26
%63 = icmp eq i32 %62, 0
%64 = getelementptr inbounds i8, ptr %4, i64 12
%65 = load i32, ptr %64, align 4, !tbaa !27
%66 = icmp eq i32 %65, 0
%67 = select i1 %63, i1 %66, i1 false
br i1 %67, label %72, label %68
68: ; preds = %60
%69 = getelementptr inbounds i8, ptr %4, i64 16
%70 = load i32, ptr %69, align 8, !tbaa !28
%71 = call i32 @vo_x11_move_resize(ptr noundef nonnull %0, i32 noundef %62, i32 noundef %65, i32 noundef %70) #3
br label %72
72: ; preds = %60, %68, %54
%73 = getelementptr inbounds i8, ptr %4, i64 8
store <2 x i32> zeroinitializer, ptr %73, align 8, !tbaa !16
%74 = call i32 @vo_x11_update_composition_hint(ptr noundef nonnull %0) #3
br label %75
75: ; preds = %21, %46, %72
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %76
76: ; preds = %8, %75, %1
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @x11_get_property(ptr noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @XA(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @XFree(ptr noundef) local_unnamed_addr #2
declare i32 @vo_x11_move_resize(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vo_x11_update_composition_hint(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"vo", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !14, i64 32}
!12 = !{!"vo_x11_state", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !13, i64 24, !14, i64 32}
!13 = !{!"int", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!12, !13, i64 0}
!16 = !{!13, !13, i64 0}
!17 = !{!12, !13, i64 24}
!18 = !{!7, !8, i64 0}
!19 = !{!20, !13, i64 0}
!20 = !{!"TYPE_2__", !13, i64 0}
!21 = !{!12, !13, i64 4}
!22 = !{!12, !13, i64 20}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!14, !14, i64 0}
!26 = !{!12, !13, i64 8}
!27 = !{!12, !13, i64 12}
!28 = !{!12, !13, i64 16}
|
mpv_video_out_extr_x11_common.c_vo_x11_check_net_wm_state_fullscreen_change
|
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_tree.c_value_member.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_tree.c_value_member.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NULL_TREE = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i64 @value_member(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i64 %1, 0
br i1 %3, label %11, label %4
4: ; preds = %2, %8
%5 = phi i64 [ %9, %8 ], [ %1, %2 ]
%6 = tail call i64 @TREE_VALUE(i64 noundef %5) #2
%7 = icmp eq i64 %6, %0
br i1 %7, label %13, label %8
8: ; preds = %4
%9 = tail call i64 @TREE_CHAIN(i64 noundef %5) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %4, !llvm.loop !5
11: ; preds = %8, %2
%12 = load i64, ptr @NULL_TREE, align 8, !tbaa !7
br label %13
13: ; preds = %4, %11
%14 = phi i64 [ %12, %11 ], [ %5, %4 ]
ret i64 %14
}
declare i64 @TREE_VALUE(i64 noundef) local_unnamed_addr #1
declare i64 @TREE_CHAIN(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_tree.c_value_member.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_tree.c_value_member.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NULL_TREE = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @value_member(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i64 %1, 0
br i1 %3, label %11, label %4
4: ; preds = %2, %8
%5 = phi i64 [ %9, %8 ], [ %1, %2 ]
%6 = tail call i64 @TREE_VALUE(i64 noundef %5) #2
%7 = icmp eq i64 %6, %0
br i1 %7, label %13, label %8
8: ; preds = %4
%9 = tail call i64 @TREE_CHAIN(i64 noundef %5) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %4, !llvm.loop !6
11: ; preds = %8, %2
%12 = load i64, ptr @NULL_TREE, align 8, !tbaa !8
br label %13
13: ; preds = %4, %11
%14 = phi i64 [ %12, %11 ], [ %5, %4 ]
ret i64 %14
}
declare i64 @TREE_VALUE(i64 noundef) local_unnamed_addr #1
declare i64 @TREE_CHAIN(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
!8 = !{!9, !9, i64 0}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
|
freebsd_contrib_gcc_extr_tree.c_value_member
|
; ModuleID = 'AnghaBench/freebsd/sys/arm/allwinner/a20/extr_a20_cpu_cfg.c_a20_cpu_cfg_attach.c'
source_filename = "AnghaBench/freebsd/sys/arm/allwinner/a20/extr_a20_cpu_cfg.c_a20_cpu_cfg_attach.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.a20_cpu_cfg_softc = type { i32, i32, i32 }
@a20_cpu_cfg_sc = dso_local local_unnamed_addr global ptr null, align 8
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@SYS_RES_MEMORY = dso_local local_unnamed_addr global i32 0, align 4
@RF_ACTIVE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [29 x i8] c"could not allocate resource\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @a20_cpu_cfg_attach], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @a20_cpu_cfg_attach(i32 noundef %0) #0 {
%2 = alloca i32, align 4
%3 = tail call ptr @device_get_softc(i32 noundef %0) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !5
%4 = load ptr, ptr @a20_cpu_cfg_sc, align 8, !tbaa !9
%5 = icmp eq ptr %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = load i32, ptr @ENXIO, align 4, !tbaa !5
br label %22
8: ; preds = %1
%9 = load i32, ptr @SYS_RES_MEMORY, align 4, !tbaa !5
%10 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !5
%11 = call i32 @bus_alloc_resource_any(i32 noundef %0, i32 noundef %9, ptr noundef nonnull %2, i32 noundef %10) #3
store i32 %11, ptr %3, align 4, !tbaa !11
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str) #3
%15 = load i32, ptr @ENXIO, align 4, !tbaa !5
br label %22
16: ; preds = %8
%17 = call i32 @rman_get_bustag(i32 noundef %11) #3
%18 = getelementptr inbounds %struct.a20_cpu_cfg_softc, ptr %3, i64 0, i32 2
store i32 %17, ptr %18, align 4, !tbaa !13
%19 = load i32, ptr %3, align 4, !tbaa !11
%20 = call i32 @rman_get_bushandle(i32 noundef %19) #3
%21 = getelementptr inbounds %struct.a20_cpu_cfg_softc, ptr %3, i64 0, i32 1
store i32 %20, ptr %21, align 4, !tbaa !14
store ptr %3, ptr @a20_cpu_cfg_sc, align 8, !tbaa !9
br label %22
22: ; preds = %16, %13, %6
%23 = phi i32 [ %7, %6 ], [ 0, %16 ], [ %15, %13 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #2
declare i32 @bus_alloc_resource_any(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @rman_get_bustag(i32 noundef) local_unnamed_addr #2
declare i32 @rman_get_bushandle(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"a20_cpu_cfg_softc", !6, i64 0, !6, i64 4, !6, i64 8}
!13 = !{!12, !6, i64 8}
!14 = !{!12, !6, i64 4}
|
; ModuleID = 'AnghaBench/freebsd/sys/arm/allwinner/a20/extr_a20_cpu_cfg.c_a20_cpu_cfg_attach.c'
source_filename = "AnghaBench/freebsd/sys/arm/allwinner/a20/extr_a20_cpu_cfg.c_a20_cpu_cfg_attach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@a20_cpu_cfg_sc = common local_unnamed_addr global ptr null, align 8
@ENXIO = common local_unnamed_addr global i32 0, align 4
@SYS_RES_MEMORY = common local_unnamed_addr global i32 0, align 4
@RF_ACTIVE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [29 x i8] c"could not allocate resource\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @a20_cpu_cfg_attach], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @a20_cpu_cfg_attach(i32 noundef %0) #0 {
%2 = alloca i32, align 4
%3 = tail call ptr @device_get_softc(i32 noundef %0) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !6
%4 = load ptr, ptr @a20_cpu_cfg_sc, align 8, !tbaa !10
%5 = icmp eq ptr %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = load i32, ptr @ENXIO, align 4, !tbaa !6
br label %22
8: ; preds = %1
%9 = load i32, ptr @SYS_RES_MEMORY, align 4, !tbaa !6
%10 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !6
%11 = call i32 @bus_alloc_resource_any(i32 noundef %0, i32 noundef %9, ptr noundef nonnull %2, i32 noundef %10) #3
store i32 %11, ptr %3, align 4, !tbaa !12
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str) #3
%15 = load i32, ptr @ENXIO, align 4, !tbaa !6
br label %22
16: ; preds = %8
%17 = call i32 @rman_get_bustag(i32 noundef %11) #3
%18 = getelementptr inbounds i8, ptr %3, i64 8
store i32 %17, ptr %18, align 4, !tbaa !14
%19 = load i32, ptr %3, align 4, !tbaa !12
%20 = call i32 @rman_get_bushandle(i32 noundef %19) #3
%21 = getelementptr inbounds i8, ptr %3, i64 4
store i32 %20, ptr %21, align 4, !tbaa !15
store ptr %3, ptr @a20_cpu_cfg_sc, align 8, !tbaa !10
br label %22
22: ; preds = %16, %13, %6
%23 = phi i32 [ %7, %6 ], [ 0, %16 ], [ %15, %13 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #2
declare i32 @bus_alloc_resource_any(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @rman_get_bustag(i32 noundef) local_unnamed_addr #2
declare i32 @rman_get_bushandle(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"a20_cpu_cfg_softc", !7, i64 0, !7, i64 4, !7, i64 8}
!14 = !{!13, !7, i64 8}
!15 = !{!13, !7, i64 4}
|
freebsd_sys_arm_allwinner_a20_extr_a20_cpu_cfg.c_a20_cpu_cfg_attach
|
; ModuleID = 'AnghaBench/reactos/sdk/tools/spec2def/extr_spec2def.c_OutputLine_def_MS.c'
source_filename = "AnghaBench/reactos/sdk/tools/spec2def/extr_spec2def.c_OutputLine_def_MS.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i64, i32, i32, %struct.TYPE_6__, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { ptr, ptr }
@gbImportLib = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [8 x i8] c"=_stub_\00", align 1
@giArch = dso_local local_unnamed_addr global i64 0, align 8
@ARCH_X86 = dso_local local_unnamed_addr global i64 0, align 8
@CC_STDCALL = dso_local local_unnamed_addr global i64 0, align 8
@CC_FASTCALL = dso_local local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [5 x i8] c"%.*s\00", align 1
@FL_STUB = dso_local local_unnamed_addr global i32 0, align 4
@CC_STUB = dso_local local_unnamed_addr global i64 0, align 8
@.str.3 = private unnamed_addr constant [17 x i8] c"=stub_function%d\00", align 1
@gbTracing = dso_local local_unnamed_addr global i64 0, align 8
@FL_NORELAY = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [18 x i8] c"=$relaytrace$%.*s\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @OutputLine_def_MS(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 3
%4 = tail call i32 @PrintName(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %3, i32 noundef 0) #4
%5 = load i64, ptr @gbImportLib, align 8, !tbaa !5
%6 = icmp eq i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = tail call i64 @fwrite(ptr nonnull @.str, i64 7, i64 1, ptr %0)
%9 = tail call i32 @PrintName(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %3, i32 noundef 0) #4
br label %82
10: ; preds = %2
%11 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 4
%12 = load ptr, ptr %11, align 8, !tbaa !9
%13 = icmp eq ptr %12, null
br i1 %13, label %45, label %14
14: ; preds = %10
%15 = load ptr, ptr %3, align 8, !tbaa !14
%16 = load i8, ptr %15, align 1, !tbaa !15
%17 = icmp eq i8 %16, 63
br i1 %17, label %82, label %18
18: ; preds = %14
%19 = tail call i32 @fputc(i32 61, ptr %0)
%20 = load i64, ptr @giArch, align 8, !tbaa !5
%21 = load i64, ptr @ARCH_X86, align 8, !tbaa !5
%22 = icmp eq i64 %20, %21
br i1 %22, label %23, label %40
23: ; preds = %18
%24 = load ptr, ptr %3, align 8, !tbaa !14
%25 = tail call i64 @ScanToken(ptr noundef %24, i8 noundef signext 64) #4
%26 = icmp eq i64 %25, 0
br i1 %26, label %40, label %27
27: ; preds = %23
%28 = load ptr, ptr %11, align 8, !tbaa !9
%29 = tail call i64 @ScanToken(ptr noundef %28, i8 noundef signext 64) #4
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %40
31: ; preds = %27
%32 = load i64, ptr %1, align 8, !tbaa !16
%33 = load i64, ptr @CC_STDCALL, align 8, !tbaa !5
%34 = icmp eq i64 %32, %33
%35 = load i64, ptr @CC_FASTCALL, align 8
%36 = icmp eq i64 %32, %35
%37 = select i1 %34, i1 true, i1 %36
br i1 %37, label %38, label %40
38: ; preds = %31
%39 = tail call i32 @PrintName(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %11, i32 noundef 1) #4
br label %82
40: ; preds = %31, %27, %23, %18
%41 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 4, i32 1
%42 = load ptr, ptr %41, align 8, !tbaa !17
%43 = load ptr, ptr %11, align 8, !tbaa !9
%44 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %0, ptr noundef nonnull @.str.2, ptr noundef %42, ptr noundef %43)
br label %82
45: ; preds = %10
%46 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 1
%47 = load i32, ptr %46, align 8, !tbaa !18
%48 = load i32, ptr @FL_STUB, align 4, !tbaa !19
%49 = and i32 %48, %47
%50 = icmp eq i32 %49, 0
br i1 %50, label %51, label %55
51: ; preds = %45
%52 = load i64, ptr %1, align 8, !tbaa !16
%53 = load i64, ptr @CC_STUB, align 8, !tbaa !5
%54 = icmp eq i64 %52, %53
br i1 %54, label %55, label %63
55: ; preds = %51, %45
%56 = load ptr, ptr %3, align 8, !tbaa !14
%57 = load i8, ptr %56, align 1, !tbaa !15
%58 = icmp eq i8 %57, 63
br i1 %58, label %59, label %63
59: ; preds = %55
%60 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 2
%61 = load i32, ptr %60, align 4, !tbaa !20
%62 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %0, ptr noundef nonnull @.str.3, i32 noundef %61)
br label %82
63: ; preds = %55, %51
%64 = load i64, ptr @gbTracing, align 8, !tbaa !5
%65 = icmp eq i64 %64, 0
br i1 %65, label %82, label %66
66: ; preds = %63
%67 = load i32, ptr @FL_NORELAY, align 4, !tbaa !19
%68 = and i32 %67, %47
%69 = icmp eq i32 %68, 0
br i1 %69, label %70, label %82
70: ; preds = %66
%71 = load i64, ptr %1, align 8, !tbaa !16
%72 = load i64, ptr @CC_STDCALL, align 8, !tbaa !5
%73 = icmp eq i64 %71, %72
br i1 %73, label %74, label %82
74: ; preds = %70
%75 = load ptr, ptr %3, align 8, !tbaa !14
%76 = load i8, ptr %75, align 1, !tbaa !15
%77 = icmp eq i8 %76, 63
br i1 %77, label %82, label %78
78: ; preds = %74
%79 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 3, i32 1
%80 = load ptr, ptr %79, align 8, !tbaa !21
%81 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %0, ptr noundef nonnull @.str.4, ptr noundef %80, ptr noundef nonnull %75)
br label %82
82: ; preds = %38, %40, %14, %63, %66, %70, %74, %78, %59, %7
ret void
}
declare i32 @PrintName(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare i64 @ScanToken(ptr noundef, i8 noundef signext) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i64 @fwrite(ptr nocapture noundef, i64 noundef, i64 noundef, ptr nocapture noundef) local_unnamed_addr #3
; Function Attrs: nofree nounwind
declare noundef i32 @fputc(i32 noundef, ptr nocapture noundef) local_unnamed_addr #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 32}
!10 = !{!"TYPE_5__", !6, i64 0, !11, i64 8, !11, i64 12, !12, i64 16, !12, i64 32}
!11 = !{!"int", !7, i64 0}
!12 = !{!"TYPE_6__", !13, i64 0, !13, i64 8}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!10, !13, i64 16}
!15 = !{!7, !7, i64 0}
!16 = !{!10, !6, i64 0}
!17 = !{!10, !13, i64 40}
!18 = !{!10, !11, i64 8}
!19 = !{!11, !11, i64 0}
!20 = !{!10, !11, i64 12}
!21 = !{!10, !13, i64 24}
|
; ModuleID = 'AnghaBench/reactos/sdk/tools/spec2def/extr_spec2def.c_OutputLine_def_MS.c'
source_filename = "AnghaBench/reactos/sdk/tools/spec2def/extr_spec2def.c_OutputLine_def_MS.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@gbImportLib = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [8 x i8] c"=_stub_\00", align 1
@giArch = common local_unnamed_addr global i64 0, align 8
@ARCH_X86 = common local_unnamed_addr global i64 0, align 8
@CC_STDCALL = common local_unnamed_addr global i64 0, align 8
@CC_FASTCALL = common local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [5 x i8] c"%.*s\00", align 1
@FL_STUB = common local_unnamed_addr global i32 0, align 4
@CC_STUB = common local_unnamed_addr global i64 0, align 8
@.str.3 = private unnamed_addr constant [17 x i8] c"=stub_function%d\00", align 1
@gbTracing = common local_unnamed_addr global i64 0, align 8
@FL_NORELAY = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [18 x i8] c"=$relaytrace$%.*s\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @OutputLine_def_MS(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 16
%4 = tail call i32 @PrintName(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %3, i32 noundef 0) #4
%5 = load i64, ptr @gbImportLib, align 8, !tbaa !6
%6 = icmp eq i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = tail call i64 @fwrite(ptr nonnull @.str, i64 7, i64 1, ptr %0)
%9 = tail call i32 @PrintName(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %3, i32 noundef 0) #4
br label %82
10: ; preds = %2
%11 = getelementptr inbounds i8, ptr %1, i64 32
%12 = load ptr, ptr %11, align 8, !tbaa !10
%13 = icmp eq ptr %12, null
br i1 %13, label %45, label %14
14: ; preds = %10
%15 = load ptr, ptr %3, align 8, !tbaa !15
%16 = load i8, ptr %15, align 1, !tbaa !16
%17 = icmp eq i8 %16, 63
br i1 %17, label %82, label %18
18: ; preds = %14
%19 = tail call i32 @fputc(i32 61, ptr %0)
%20 = load i64, ptr @giArch, align 8, !tbaa !6
%21 = load i64, ptr @ARCH_X86, align 8, !tbaa !6
%22 = icmp eq i64 %20, %21
br i1 %22, label %23, label %40
23: ; preds = %18
%24 = load ptr, ptr %3, align 8, !tbaa !15
%25 = tail call i64 @ScanToken(ptr noundef %24, i8 noundef signext 64) #4
%26 = icmp eq i64 %25, 0
br i1 %26, label %40, label %27
27: ; preds = %23
%28 = load ptr, ptr %11, align 8, !tbaa !10
%29 = tail call i64 @ScanToken(ptr noundef %28, i8 noundef signext 64) #4
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %40
31: ; preds = %27
%32 = load i64, ptr %1, align 8, !tbaa !17
%33 = load i64, ptr @CC_STDCALL, align 8, !tbaa !6
%34 = icmp eq i64 %32, %33
%35 = load i64, ptr @CC_FASTCALL, align 8
%36 = icmp eq i64 %32, %35
%37 = select i1 %34, i1 true, i1 %36
br i1 %37, label %38, label %40
38: ; preds = %31
%39 = tail call i32 @PrintName(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %11, i32 noundef 1) #4
br label %82
40: ; preds = %31, %27, %23, %18
%41 = getelementptr inbounds i8, ptr %1, i64 40
%42 = load ptr, ptr %41, align 8, !tbaa !18
%43 = load ptr, ptr %11, align 8, !tbaa !10
%44 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %0, ptr noundef nonnull @.str.2, ptr noundef %42, ptr noundef %43)
br label %82
45: ; preds = %10
%46 = getelementptr inbounds i8, ptr %1, i64 8
%47 = load i32, ptr %46, align 8, !tbaa !19
%48 = load i32, ptr @FL_STUB, align 4, !tbaa !20
%49 = and i32 %48, %47
%50 = icmp eq i32 %49, 0
br i1 %50, label %51, label %55
51: ; preds = %45
%52 = load i64, ptr %1, align 8, !tbaa !17
%53 = load i64, ptr @CC_STUB, align 8, !tbaa !6
%54 = icmp eq i64 %52, %53
br i1 %54, label %55, label %63
55: ; preds = %51, %45
%56 = load ptr, ptr %3, align 8, !tbaa !15
%57 = load i8, ptr %56, align 1, !tbaa !16
%58 = icmp eq i8 %57, 63
br i1 %58, label %59, label %63
59: ; preds = %55
%60 = getelementptr inbounds i8, ptr %1, i64 12
%61 = load i32, ptr %60, align 4, !tbaa !21
%62 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %0, ptr noundef nonnull @.str.3, i32 noundef %61)
br label %82
63: ; preds = %55, %51
%64 = load i64, ptr @gbTracing, align 8, !tbaa !6
%65 = icmp eq i64 %64, 0
br i1 %65, label %82, label %66
66: ; preds = %63
%67 = load i32, ptr @FL_NORELAY, align 4, !tbaa !20
%68 = and i32 %67, %47
%69 = icmp eq i32 %68, 0
br i1 %69, label %70, label %82
70: ; preds = %66
%71 = load i64, ptr %1, align 8, !tbaa !17
%72 = load i64, ptr @CC_STDCALL, align 8, !tbaa !6
%73 = icmp eq i64 %71, %72
br i1 %73, label %74, label %82
74: ; preds = %70
%75 = load ptr, ptr %3, align 8, !tbaa !15
%76 = load i8, ptr %75, align 1, !tbaa !16
%77 = icmp eq i8 %76, 63
br i1 %77, label %82, label %78
78: ; preds = %74
%79 = getelementptr inbounds i8, ptr %1, i64 24
%80 = load ptr, ptr %79, align 8, !tbaa !22
%81 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %0, ptr noundef nonnull @.str.4, ptr noundef %80, ptr noundef nonnull %75)
br label %82
82: ; preds = %38, %40, %14, %63, %66, %70, %74, %78, %59, %7
ret void
}
declare i32 @PrintName(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare i64 @ScanToken(ptr noundef, i8 noundef signext) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i64 @fwrite(ptr nocapture noundef, i64 noundef, i64 noundef, ptr nocapture noundef) local_unnamed_addr #3
; Function Attrs: nofree nounwind
declare noundef i32 @fputc(i32 noundef, ptr nocapture noundef) local_unnamed_addr #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree nounwind }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !14, i64 32}
!11 = !{!"TYPE_5__", !7, i64 0, !12, i64 8, !12, i64 12, !13, i64 16, !13, i64 32}
!12 = !{!"int", !8, i64 0}
!13 = !{!"TYPE_6__", !14, i64 0, !14, i64 8}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!11, !14, i64 16}
!16 = !{!8, !8, i64 0}
!17 = !{!11, !7, i64 0}
!18 = !{!11, !14, i64 40}
!19 = !{!11, !12, i64 8}
!20 = !{!12, !12, i64 0}
!21 = !{!11, !12, i64 12}
!22 = !{!11, !14, i64 24}
|
reactos_sdk_tools_spec2def_extr_spec2def.c_OutputLine_def_MS
|
; ModuleID = 'AnghaBench/h2o/t/00unit/lib/http2/extr_........libhttp2hpack.c_h2o_hpack_encode_huffman.c'
source_filename = "AnghaBench/h2o/t/00unit/lib/http2/extr_........libhttp2hpack.c_h2o_hpack_encode_huffman.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i64 }
@huff_sym_table = dso_local local_unnamed_addr global ptr null, align 8
@SIZE_MAX = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define dso_local i64 @h2o_hpack_encode_huffman(ptr noundef %0, ptr noundef readonly %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = getelementptr inbounds i32, ptr %0, i64 %2
%5 = getelementptr inbounds i32, ptr %1, i64 %2
%6 = icmp eq i64 %2, 0
br i1 %6, label %34, label %7
7: ; preds = %3
%8 = load ptr, ptr @huff_sym_table, align 8, !tbaa !5
br label %11
9: ; preds = %21
%10 = icmp eq ptr %15, %5
br i1 %10, label %31, label %11, !llvm.loop !9
11: ; preds = %7, %9
%12 = phi i32 [ 40, %7 ], [ %23, %9 ]
%13 = phi ptr [ %1, %7 ], [ %15, %9 ]
%14 = phi ptr [ %0, %7 ], [ %22, %9 ]
%15 = getelementptr inbounds i32, ptr %13, i64 1
%16 = load i32, ptr %13, align 4, !tbaa !11
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 %17
%19 = load i32, ptr %18, align 8, !tbaa !13
%20 = sub nsw i32 %12, %19
br label %21
21: ; preds = %25, %11
%22 = phi ptr [ %14, %11 ], [ %26, %25 ]
%23 = phi i32 [ %20, %11 ], [ %27, %25 ]
%24 = icmp sgt i32 %23, 32
br i1 %24, label %9, label %25
25: ; preds = %21
%26 = getelementptr inbounds i32, ptr %22, i64 1
%27 = add nsw i32 %23, 8
%28 = icmp eq ptr %26, %4
br i1 %28, label %29, label %21, !llvm.loop !16
29: ; preds = %25
%30 = load i64, ptr @SIZE_MAX, align 8, !tbaa !17
br label %46
31: ; preds = %9
%32 = icmp ne i32 %23, 40
%33 = zext i1 %32 to i64
br label %34
34: ; preds = %31, %3
%35 = phi ptr [ %0, %3 ], [ %22, %31 ]
%36 = phi i64 [ 0, %3 ], [ %33, %31 ]
%37 = getelementptr inbounds i32, ptr %35, i64 %36
%38 = icmp eq ptr %37, %4
br i1 %38, label %39, label %41
39: ; preds = %34
%40 = load i64, ptr @SIZE_MAX, align 8, !tbaa !17
br label %46
41: ; preds = %34
%42 = ptrtoint ptr %37 to i64
%43 = ptrtoint ptr %0 to i64
%44 = sub i64 %42, %43
%45 = ashr exact i64 %44, 2
br label %46
46: ; preds = %29, %41, %39
%47 = phi i64 [ %40, %39 ], [ %45, %41 ], [ %30, %29 ]
ret i64 %47
}
attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_3__", !12, i64 0, !15, i64 8}
!15 = !{!"long", !7, i64 0}
!16 = distinct !{!16, !10}
!17 = !{!15, !15, i64 0}
|
; ModuleID = 'AnghaBench/h2o/t/00unit/lib/http2/extr_........libhttp2hpack.c_h2o_hpack_encode_huffman.c'
source_filename = "AnghaBench/h2o/t/00unit/lib/http2/extr_........libhttp2hpack.c_h2o_hpack_encode_huffman.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i32, i64 }
@huff_sym_table = common local_unnamed_addr global ptr null, align 8
@SIZE_MAX = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define i64 @h2o_hpack_encode_huffman(ptr noundef %0, ptr noundef readonly %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = getelementptr inbounds i32, ptr %0, i64 %2
%5 = getelementptr inbounds i32, ptr %1, i64 %2
%6 = icmp eq i64 %2, 0
br i1 %6, label %34, label %7
7: ; preds = %3
%8 = load ptr, ptr @huff_sym_table, align 8, !tbaa !6
br label %11
9: ; preds = %21
%10 = icmp eq ptr %15, %5
br i1 %10, label %31, label %11, !llvm.loop !10
11: ; preds = %7, %9
%12 = phi i32 [ 40, %7 ], [ %23, %9 ]
%13 = phi ptr [ %1, %7 ], [ %15, %9 ]
%14 = phi ptr [ %0, %7 ], [ %22, %9 ]
%15 = getelementptr inbounds i8, ptr %13, i64 4
%16 = load i32, ptr %13, align 4, !tbaa !12
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 %17
%19 = load i32, ptr %18, align 8, !tbaa !14
%20 = sub nsw i32 %12, %19
br label %21
21: ; preds = %25, %11
%22 = phi ptr [ %14, %11 ], [ %26, %25 ]
%23 = phi i32 [ %20, %11 ], [ %27, %25 ]
%24 = icmp sgt i32 %23, 32
br i1 %24, label %9, label %25
25: ; preds = %21
%26 = getelementptr inbounds i8, ptr %22, i64 4
%27 = add nsw i32 %23, 8
%28 = icmp eq ptr %26, %4
br i1 %28, label %29, label %21, !llvm.loop !17
29: ; preds = %25
%30 = load i64, ptr @SIZE_MAX, align 8, !tbaa !18
br label %46
31: ; preds = %9
%32 = icmp eq i32 %23, 40
%33 = select i1 %32, i64 0, i64 4
br label %34
34: ; preds = %31, %3
%35 = phi ptr [ %0, %3 ], [ %22, %31 ]
%36 = phi i64 [ 0, %3 ], [ %33, %31 ]
%37 = getelementptr inbounds i8, ptr %35, i64 %36
%38 = icmp eq ptr %37, %4
br i1 %38, label %39, label %41
39: ; preds = %34
%40 = load i64, ptr @SIZE_MAX, align 8, !tbaa !18
br label %46
41: ; preds = %34
%42 = ptrtoint ptr %37 to i64
%43 = ptrtoint ptr %0 to i64
%44 = sub i64 %42, %43
%45 = ashr exact i64 %44, 2
br label %46
46: ; preds = %29, %41, %39
%47 = phi i64 [ %40, %39 ], [ %45, %41 ], [ %30, %29 ]
ret i64 %47
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_3__", !13, i64 0, !16, i64 8}
!16 = !{!"long", !8, i64 0}
!17 = distinct !{!17, !11}
!18 = !{!16, !16, i64 0}
|
h2o_t_00unit_lib_http2_extr_........libhttp2hpack.c_h2o_hpack_encode_huffman
|
; ModuleID = 'AnghaBench/exploitdb/exploits/windows/dos/extr_28263.c_usage.c'
source_filename = "AnghaBench/exploitdb/exploits/windows/dos/extr_28263.c_usage.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@stderr = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [39 x i8] c"Usage: %s <dst> <src> <size> <number>\0A\00", align 1
@.str.1 = private unnamed_addr constant [26 x i8] c"dst:\09Destination Address\0A\00", align 1
@.str.2 = private unnamed_addr constant [21 x i8] c"src:\09Source Address\0A\00", align 1
@.str.3 = private unnamed_addr constant [22 x i8] c"size:\09Size of packet\0A\00", align 1
@.str.4 = private unnamed_addr constant [15 x i8] c"num:\09packets\0A\0A\00", align 1
; Function Attrs: noreturn nounwind uwtable
define dso_local void @usage(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @stderr, align 4, !tbaa !5
%3 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %2, ptr noundef nonnull @.str, ptr noundef %0) #3
%4 = load i32, ptr @stderr, align 4, !tbaa !5
%5 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %4, ptr noundef nonnull @.str.1) #3
%6 = load i32, ptr @stderr, align 4, !tbaa !5
%7 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %6, ptr noundef nonnull @.str.2) #3
%8 = load i32, ptr @stderr, align 4, !tbaa !5
%9 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %8, ptr noundef nonnull @.str.3) #3
%10 = load i32, ptr @stderr, align 4, !tbaa !5
%11 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %10, ptr noundef nonnull @.str.4) #3
%12 = tail call i32 @exit(i32 noundef 1) #4
unreachable
}
declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/exploitdb/exploits/windows/dos/extr_28263.c_usage.c'
source_filename = "AnghaBench/exploitdb/exploits/windows/dos/extr_28263.c_usage.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@stderr = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [39 x i8] c"Usage: %s <dst> <src> <size> <number>\0A\00", align 1
@.str.1 = private unnamed_addr constant [26 x i8] c"dst:\09Destination Address\0A\00", align 1
@.str.2 = private unnamed_addr constant [21 x i8] c"src:\09Source Address\0A\00", align 1
@.str.3 = private unnamed_addr constant [22 x i8] c"size:\09Size of packet\0A\00", align 1
@.str.4 = private unnamed_addr constant [15 x i8] c"num:\09packets\0A\0A\00", align 1
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define void @usage(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @stderr, align 4, !tbaa !6
%3 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %2, ptr noundef nonnull @.str, ptr noundef %0) #3
%4 = load i32, ptr @stderr, align 4, !tbaa !6
%5 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %4, ptr noundef nonnull @.str.1) #3
%6 = load i32, ptr @stderr, align 4, !tbaa !6
%7 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %6, ptr noundef nonnull @.str.2) #3
%8 = load i32, ptr @stderr, align 4, !tbaa !6
%9 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %8, ptr noundef nonnull @.str.3) #3
%10 = load i32, ptr @stderr, align 4, !tbaa !6
%11 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %10, ptr noundef nonnull @.str.4) #3
%12 = tail call i32 @exit(i32 noundef 1) #4
unreachable
}
declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
exploitdb_exploits_windows_dos_extr_28263.c_usage
|
; ModuleID = 'AnghaBench/linux/net/ipv6/extr_esp6.c_esp_remove_trailer.c'
source_filename = "AnghaBench/linux/net/ipv6/extr_esp6.c_esp_remove_trailer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.xfrm_offload = type { i32, i32 }
%struct.sk_buff = type { i32, i64, i32 }
@XFRM_ESP_NO_TRAILER = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [48 x i8] c"ipsec esp packet is garbage padlen=%d, elen=%d\0A\00", align 1
@CHECKSUM_COMPLETE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @esp_remove_trailer], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @esp_remove_trailer(ptr noundef %0) #0 {
%2 = alloca [2 x i32], align 4
%3 = tail call ptr @xfrm_input_state(ptr noundef %0) #3
%4 = tail call ptr @xfrm_offload(ptr noundef %0) #3
%5 = load ptr, ptr %3, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%6 = tail call i32 @crypto_aead_authsize(ptr noundef %5) #3
%7 = tail call i32 @crypto_aead_ivsize(ptr noundef %5) #3
%8 = load i32, ptr %0, align 8, !tbaa !10
%9 = sub i32 %8, %7
%10 = add i32 %9, -4
%11 = icmp eq ptr %4, null
br i1 %11, label %20, label %12
12: ; preds = %1
%13 = load i32, ptr %4, align 4, !tbaa !14
%14 = load i32, ptr @XFRM_ESP_NO_TRAILER, align 4, !tbaa !16
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %12
%18 = getelementptr inbounds %struct.xfrm_offload, ptr %4, i64 0, i32 1
%19 = load i32, ptr %18, align 4, !tbaa !17
br label %56
20: ; preds = %12, %1
%21 = sub i32 %8, %6
%22 = add i32 %21, -2
%23 = call i32 @skb_copy_bits(ptr noundef nonnull %0, i32 noundef %22, ptr noundef nonnull %2, i32 noundef 2) #3
%24 = call i32 @BUG_ON(i32 noundef %23) #3
%25 = load i32, ptr %2, align 4, !tbaa !16
%26 = add nsw i32 %25, 2
%27 = add nsw i32 %26, %6
%28 = icmp slt i32 %27, %10
br i1 %28, label %34, label %29
29: ; preds = %20
%30 = load i32, ptr @EINVAL, align 4, !tbaa !16
%31 = sub nsw i32 0, %30
%32 = sub nsw i32 %10, %6
%33 = call i32 @net_dbg_ratelimited(ptr noundef nonnull @.str, i32 noundef %26, i32 noundef %32) #3
br label %56
34: ; preds = %20
%35 = add i32 %6, 2
%36 = add i32 %35, %25
%37 = getelementptr inbounds %struct.sk_buff, ptr %0, i64 0, i32 1
%38 = load i64, ptr %37, align 8, !tbaa !18
%39 = load i64, ptr @CHECKSUM_COMPLETE, align 8, !tbaa !19
%40 = icmp eq i64 %38, %39
br i1 %40, label %41, label %50
41: ; preds = %34
%42 = load i32, ptr %0, align 8, !tbaa !10
%43 = sub nsw i32 %42, %36
%44 = call i32 @skb_checksum(ptr noundef nonnull %0, i32 noundef %43, i32 noundef %36, i32 noundef 0) #3
%45 = getelementptr inbounds %struct.sk_buff, ptr %0, i64 0, i32 2
%46 = load i32, ptr %45, align 8, !tbaa !20
%47 = load i32, ptr %0, align 8, !tbaa !10
%48 = sub nsw i32 %47, %36
%49 = call i32 @csum_block_sub(i32 noundef %46, i32 noundef %44, i32 noundef %48) #3
store i32 %49, ptr %45, align 8, !tbaa !20
br label %50
50: ; preds = %41, %34
%51 = load i32, ptr %0, align 8, !tbaa !10
%52 = sub nsw i32 %51, %36
%53 = call i32 @pskb_trim(ptr noundef nonnull %0, i32 noundef %52) #3
%54 = getelementptr inbounds [2 x i32], ptr %2, i64 0, i64 1
%55 = load i32, ptr %54, align 4, !tbaa !16
br label %56
56: ; preds = %50, %29, %17
%57 = phi i32 [ %19, %17 ], [ %31, %29 ], [ %55, %50 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %57
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @xfrm_input_state(ptr noundef) local_unnamed_addr #2
declare ptr @xfrm_offload(ptr noundef) local_unnamed_addr #2
declare i32 @crypto_aead_authsize(ptr noundef) local_unnamed_addr #2
declare i32 @crypto_aead_ivsize(ptr noundef) local_unnamed_addr #2
declare i32 @skb_copy_bits(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2
declare i32 @net_dbg_ratelimited(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @skb_checksum(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @csum_block_sub(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pskb_trim(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"xfrm_state", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"sk_buff", !12, i64 0, !13, i64 8, !12, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"xfrm_offload", !12, i64 0, !12, i64 4}
!16 = !{!12, !12, i64 0}
!17 = !{!15, !12, i64 4}
!18 = !{!11, !13, i64 8}
!19 = !{!13, !13, i64 0}
!20 = !{!11, !12, i64 16}
|
; ModuleID = 'AnghaBench/linux/net/ipv6/extr_esp6.c_esp_remove_trailer.c'
source_filename = "AnghaBench/linux/net/ipv6/extr_esp6.c_esp_remove_trailer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@XFRM_ESP_NO_TRAILER = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [48 x i8] c"ipsec esp packet is garbage padlen=%d, elen=%d\0A\00", align 1
@CHECKSUM_COMPLETE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @esp_remove_trailer], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @esp_remove_trailer(ptr noundef %0) #0 {
%2 = alloca [2 x i32], align 4
%3 = tail call ptr @xfrm_input_state(ptr noundef %0) #3
%4 = tail call ptr @xfrm_offload(ptr noundef %0) #3
%5 = load ptr, ptr %3, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%6 = tail call i32 @crypto_aead_authsize(ptr noundef %5) #3
%7 = tail call i32 @crypto_aead_ivsize(ptr noundef %5) #3
%8 = load i32, ptr %0, align 8, !tbaa !11
%9 = sub i32 %8, %7
%10 = add i32 %9, -4
%11 = icmp eq ptr %4, null
br i1 %11, label %20, label %12
12: ; preds = %1
%13 = load i32, ptr %4, align 4, !tbaa !15
%14 = load i32, ptr @XFRM_ESP_NO_TRAILER, align 4, !tbaa !17
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %12
%18 = getelementptr inbounds i8, ptr %4, i64 4
%19 = load i32, ptr %18, align 4, !tbaa !18
br label %56
20: ; preds = %12, %1
%21 = sub i32 %8, %6
%22 = add i32 %21, -2
%23 = call i32 @skb_copy_bits(ptr noundef nonnull %0, i32 noundef %22, ptr noundef nonnull %2, i32 noundef 2) #3
%24 = call i32 @BUG_ON(i32 noundef %23) #3
%25 = load i32, ptr %2, align 4, !tbaa !17
%26 = add nsw i32 %25, 2
%27 = add nsw i32 %26, %6
%28 = icmp slt i32 %27, %10
br i1 %28, label %34, label %29
29: ; preds = %20
%30 = load i32, ptr @EINVAL, align 4, !tbaa !17
%31 = sub nsw i32 0, %30
%32 = sub nsw i32 %10, %6
%33 = call i32 @net_dbg_ratelimited(ptr noundef nonnull @.str, i32 noundef %26, i32 noundef %32) #3
br label %56
34: ; preds = %20
%35 = add i32 %6, 2
%36 = add i32 %35, %25
%37 = getelementptr inbounds i8, ptr %0, i64 8
%38 = load i64, ptr %37, align 8, !tbaa !19
%39 = load i64, ptr @CHECKSUM_COMPLETE, align 8, !tbaa !20
%40 = icmp eq i64 %38, %39
br i1 %40, label %41, label %50
41: ; preds = %34
%42 = load i32, ptr %0, align 8, !tbaa !11
%43 = sub nsw i32 %42, %36
%44 = call i32 @skb_checksum(ptr noundef nonnull %0, i32 noundef %43, i32 noundef %36, i32 noundef 0) #3
%45 = getelementptr inbounds i8, ptr %0, i64 16
%46 = load i32, ptr %45, align 8, !tbaa !21
%47 = load i32, ptr %0, align 8, !tbaa !11
%48 = sub nsw i32 %47, %36
%49 = call i32 @csum_block_sub(i32 noundef %46, i32 noundef %44, i32 noundef %48) #3
store i32 %49, ptr %45, align 8, !tbaa !21
br label %50
50: ; preds = %41, %34
%51 = load i32, ptr %0, align 8, !tbaa !11
%52 = sub nsw i32 %51, %36
%53 = call i32 @pskb_trim(ptr noundef nonnull %0, i32 noundef %52) #3
%54 = getelementptr inbounds i8, ptr %2, i64 4
%55 = load i32, ptr %54, align 4, !tbaa !17
br label %56
56: ; preds = %50, %29, %17
%57 = phi i32 [ %19, %17 ], [ %31, %29 ], [ %55, %50 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %57
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @xfrm_input_state(ptr noundef) local_unnamed_addr #2
declare ptr @xfrm_offload(ptr noundef) local_unnamed_addr #2
declare i32 @crypto_aead_authsize(ptr noundef) local_unnamed_addr #2
declare i32 @crypto_aead_ivsize(ptr noundef) local_unnamed_addr #2
declare i32 @skb_copy_bits(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2
declare i32 @net_dbg_ratelimited(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @skb_checksum(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @csum_block_sub(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pskb_trim(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"xfrm_state", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"sk_buff", !13, i64 0, !14, i64 8, !13, i64 16}
!13 = !{!"int", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!16, !13, i64 0}
!16 = !{!"xfrm_offload", !13, i64 0, !13, i64 4}
!17 = !{!13, !13, i64 0}
!18 = !{!16, !13, i64 4}
!19 = !{!12, !14, i64 8}
!20 = !{!14, !14, i64 0}
!21 = !{!12, !13, i64 16}
|
linux_net_ipv6_extr_esp6.c_esp_remove_trailer
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/misc/extr_enclosure.c_enclosure_release.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/misc/extr_enclosure.c_enclosure_release.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @enclosure_release], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @enclosure_release(ptr noundef %0) #0 {
%2 = tail call ptr @to_enclosure_device(ptr noundef %0) #2
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call i32 @put_device(i32 noundef %3) #2
%5 = tail call i32 @kfree(ptr noundef %2) #2
ret void
}
declare ptr @to_enclosure_device(ptr noundef) local_unnamed_addr #1
declare i32 @put_device(i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"device", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/misc/extr_enclosure.c_enclosure_release.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/misc/extr_enclosure.c_enclosure_release.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @enclosure_release], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @enclosure_release(ptr noundef %0) #0 {
%2 = tail call ptr @to_enclosure_device(ptr noundef %0) #2
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call i32 @put_device(i32 noundef %3) #2
%5 = tail call i32 @kfree(ptr noundef %2) #2
ret void
}
declare ptr @to_enclosure_device(ptr noundef) local_unnamed_addr #1
declare i32 @put_device(i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"device", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
fastsocket_kernel_drivers_misc_extr_enclosure.c_enclosure_release
|
; ModuleID = 'AnghaBench/lz4/lib/extr_lz4hc.c_LZ4_sizeofStateHC.c'
source_filename = "AnghaBench/lz4/lib/extr_lz4hc.c_LZ4_sizeofStateHC.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @LZ4_sizeofStateHC() local_unnamed_addr #0 {
ret i32 4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
|
; ModuleID = 'AnghaBench/lz4/lib/extr_lz4hc.c_LZ4_sizeofStateHC.c'
source_filename = "AnghaBench/lz4/lib/extr_lz4hc.c_LZ4_sizeofStateHC.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i32 @LZ4_sizeofStateHC() local_unnamed_addr #0 {
ret i32 4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
|
lz4_lib_extr_lz4hc.c_LZ4_sizeofStateHC
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/ixgbe/extr_ixgbe_main.c_ixgbe_get_tx_completed.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/ixgbe/extr_ixgbe_main.c_ixgbe_get_tx_completed.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ixgbe_get_tx_completed], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal i32 @ixgbe_get_tx_completed(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"ixgbe_ring", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
|
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/ixgbe/extr_ixgbe_main.c_ixgbe_get_tx_completed.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/ixgbe/extr_ixgbe_main.c_ixgbe_get_tx_completed.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ixgbe_get_tx_completed], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @ixgbe_get_tx_completed(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"ixgbe_ring", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
|
linux_drivers_net_ethernet_intel_ixgbe_extr_ixgbe_main.c_ixgbe_get_tx_completed
|
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/uctf/extr_tst.printtype.c_main.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/uctf/extr_tst.printtype.c_main.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32, i32 }
; Function Attrs: noreturn nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
%1 = alloca %struct.TYPE_5__, align 4
%2 = alloca %struct.TYPE_5__, align 4
%3 = alloca %struct.TYPE_5__, align 4
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
store i32 1, ptr %3, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.TYPE_5__, ptr %3, i64 0, i32 1
store i32 4, ptr %4, align 4, !tbaa !10
%5 = getelementptr inbounds %struct.TYPE_5__, ptr %3, i64 0, i32 2
store i32 0, ptr %5, align 4, !tbaa !11
store i32 6, ptr %1, align 4, !tbaa !5
%6 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 1
store i32 4, ptr %6, align 4, !tbaa !10
%7 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 2
store i32 1, ptr %7, align 4, !tbaa !11
store i32 10, ptr %2, align 4, !tbaa !5
%8 = getelementptr inbounds %struct.TYPE_5__, ptr %2, i64 0, i32 1
store i32 3, ptr %8, align 4, !tbaa !10
%9 = getelementptr inbounds %struct.TYPE_5__, ptr %2, i64 0, i32 2
store i32 1, ptr %9, align 4, !tbaa !11
br label %10
10: ; preds = %10, %0
%11 = call i32 @ff_getgameid(ptr noundef nonnull %3) #3
%12 = call i32 @ff_getpartysize(ptr noundef nonnull %2) #3
%13 = call i32 @ff_getsummons(ptr noundef nonnull %1) #3
%14 = call i32 @sleep(i32 noundef 1) #3
br label %10
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ff_getgameid(ptr noundef) local_unnamed_addr #2
declare i32 @ff_getpartysize(ptr noundef) local_unnamed_addr #2
declare i32 @ff_getsummons(ptr noundef) local_unnamed_addr #2
declare i32 @sleep(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!6, !7, i64 8}
|
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/uctf/extr_tst.printtype.c_main.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/uctf/extr_tst.printtype.c_main.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { i32, i32, i32 }
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define noundef i32 @main() local_unnamed_addr #0 {
%1 = alloca %struct.TYPE_5__, align 8
%2 = alloca %struct.TYPE_5__, align 8
%3 = alloca %struct.TYPE_5__, align 8
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
store <2 x i32> <i32 1, i32 4>, ptr %3, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %3, i64 8
store i32 0, ptr %4, align 8, !tbaa !10
store <2 x i32> <i32 6, i32 4>, ptr %1, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %1, i64 8
store i32 1, ptr %5, align 8, !tbaa !10
store <2 x i32> <i32 10, i32 3>, ptr %2, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %2, i64 8
store i32 1, ptr %6, align 8, !tbaa !10
br label %7
7: ; preds = %7, %0
%8 = call i32 @ff_getgameid(ptr noundef nonnull %3) #3
%9 = call i32 @ff_getpartysize(ptr noundef nonnull %2) #3
%10 = call i32 @ff_getsummons(ptr noundef nonnull %1) #3
%11 = call i32 @sleep(i32 noundef 1) #3
br label %7
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ff_getgameid(ptr noundef) local_unnamed_addr #2
declare i32 @ff_getpartysize(ptr noundef) local_unnamed_addr #2
declare i32 @ff_getsummons(ptr noundef) local_unnamed_addr #2
declare i32 @sleep(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !7, i64 8}
|
freebsd_cddl_contrib_opensolaris_cmd_dtrace_test_tst_common_uctf_extr_tst.printtype.c_main
|
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