repo_name
stringlengths 6
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| path
stringlengths 4
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| size
int64 1.02k
768k
| content
stringlengths 15
207k
| license
stringclasses 14
values |
|---|---|---|---|---|
bangonkali/sram
|
i2c_sram_embedded.v
| 8,345 |
module MODULE1 (
VAR3,
VAR38,
VAR35,
VAR7,
VAR20,
state,
VAR29
);
inout VAR3;
input VAR38;
wire VAR34;
reg VAR33;
reg VAR4;
input [6:0] VAR35;
output reg [6:0] VAR20;
reg [7:0] VAR18;
output reg VAR29;
reg [8:0] counter;
output reg [32:0] state;
output reg [7:0] VAR7;
assign VAR34 = VAR3;
assign VAR3 = VAR33 ? VAR4: 1'VAR1;
parameter VAR22 = 1;
parameter VAR23 = 2;
parameter VAR41 = 3;
parameter VAR12 = 4;
parameter VAR2 = 5;
parameter VAR17 = 6;
parameter VAR8 = 9;
parameter VAR11 = 10;
parameter VAR9 = 11;
parameter VAR21 = 12;
parameter VAR45 = 13;
parameter VAR27 = 14;
parameter VAR28 = 15;
parameter VAR42 = 16;
parameter VAR6 = 17;
parameter VAR10 = 18;
parameter VAR46 = 19;
parameter VAR30 = 20;
parameter VAR36 = 21;
parameter VAR19 = 22;
reg clk;
reg [7:0] address;
wire [15:0] VAR32;
reg [15:0] VAR37;
inout [15:0] VAR40;
reg VAR5;
reg VAR13;
reg VAR14;
reg reset;
reg [15:0] VAR24;
reg [7:0] VAR31;
reg [7:0] VAR16;
wire VAR39;
wire VAR47;
wire VAR26;
assign VAR39 = !VAR13;
assign VAR25 = !VAR5;
assign VAR26 = VAR14;
assign VAR40 = (VAR39 && VAR25 && VAR26) ? VAR37 : 'VAR15;
assign VAR32 = VAR40;
VAR44 VAR43(
.address(address),
.VAR40(VAR40),
.VAR5(VAR5),
.VAR13(VAR13),
.VAR14(VAR14),
.reset(reset)
);
|
mit
|
GSejas/Dise-o-ASIC-FPGA-FPU
|
ASIC_FLOW/Approximate_Adders/integracion_fisica/front_end/db/GeAr_N16_R4_P4_syn.v
| 3,578 |
module MODULE1 ( VAR13, VAR22, VAR28, VAR65, VAR6 );
input [8:0] VAR13;
input [8:0] VAR22;
output [8:0] VAR65;
input VAR28;
output VAR6;
wire VAR50, VAR39, VAR43, VAR83, VAR4, VAR5, VAR63, VAR11;
VAR46 VAR15 ( .VAR13(VAR13[3]), .VAR22(VAR22[3]), .VAR12(VAR43) );
VAR25 VAR70 ( .VAR61(VAR13[1]), .VAR72(VAR22[1]), .VAR8(VAR22[0]), .VAR81(VAR13[0]), .VAR12(VAR50) );
VAR82 VAR26 ( .VAR10(VAR22[1]), .VAR37(VAR13[1]), .VAR8(VAR50), .VAR12(VAR39) );
VAR32 VAR36 ( .VAR61(VAR22[2]), .VAR72(VAR13[2]), .VAR8(VAR22[2]), .VAR76(VAR39), .VAR81(VAR13[2]), .VAR51(
VAR39), .VAR12(VAR83) );
VAR54 VAR64 ( .VAR8(VAR83), .VAR76(VAR43), .VAR10(VAR13[3]), .VAR37(VAR22[3]), .VAR12(VAR4) );
VAR44 VAR79 ( .VAR13(VAR13[4]), .VAR22(VAR22[4]), .VAR59(VAR4), .VAR6(VAR5), .VAR35(VAR65[4]) );
VAR44 VAR30 ( .VAR13(VAR13[5]), .VAR22(VAR22[5]), .VAR59(VAR5), .VAR6(VAR63), .VAR35(VAR65[5]) );
VAR44 VAR71 ( .VAR13(VAR13[6]), .VAR22(VAR22[6]), .VAR59(VAR63), .VAR6(VAR11), .VAR35(VAR65[6]) );
VAR44 VAR74 ( .VAR13(VAR13[7]), .VAR22(VAR22[7]), .VAR59(VAR11), .VAR6(VAR65[8]), .VAR35(VAR65[7]) );
VAR23 ("VAR31.VAR45");
endmodule
module MODULE2 ( VAR13, VAR22, VAR28, VAR65, VAR6 );
input [7:0] VAR13;
input [7:0] VAR22;
output [7:0] VAR65;
input VAR28;
output VAR6;
wire VAR3, VAR57, VAR69, VAR50, VAR39, VAR43, VAR83, VAR4, VAR5;
VAR47 VAR15 ( .VAR13(VAR13[3]), .VAR22(VAR22[3]), .VAR12(VAR69) );
VAR77 VAR70 ( .VAR13(VAR22[7]), .VAR22(VAR83), .VAR12(VAR65[7]) );
VAR24 VAR26 ( .VAR8(VAR50), .VAR76(VAR69), .VAR10(VAR13[3]), .VAR37(VAR22[3]), .VAR12(VAR4) );
VAR40 VAR36 ( .VAR61(VAR22[2]), .VAR72(VAR13[2]), .VAR8(VAR22[2]), .VAR76(VAR57), .VAR81(VAR13[2]), .VAR51(
VAR57), .VAR12(VAR50) );
VAR56 VAR64 ( .VAR13(VAR13[5]), .VAR22(VAR22[5]), .VAR28(VAR39), .VAR6(VAR5), .VAR35(VAR65[5]) );
VAR82 VAR79 ( .VAR10(VAR22[1]), .VAR37(VAR13[1]), .VAR8(VAR3), .VAR12(VAR57) );
VAR9 VAR30 ( .VAR13(VAR13[7]), .VAR22(VAR43), .VAR12(VAR83) );
VAR25 VAR71 ( .VAR61(VAR13[1]), .VAR72(VAR22[1]), .VAR8(VAR22[0]), .VAR81(VAR13[0]), .VAR12(VAR3) );
VAR44 VAR74 ( .VAR13(VAR13[4]), .VAR22(VAR22[4]), .VAR59(VAR4), .VAR6(VAR39), .VAR35(VAR65[4]) );
VAR44 VAR66 ( .VAR13(VAR13[6]), .VAR22(VAR22[6]), .VAR59(VAR5), .VAR6(VAR43), .VAR35(VAR65[6]) );
VAR23 ("VAR31.VAR45");
endmodule
module MODULE3 ( VAR16, VAR53, VAR62 );
input [15:0] VAR16;
input [15:0] VAR53;
output [16:0] VAR62;
wire VAR78, VAR49, VAR75, VAR17, VAR80, VAR73, VAR60, VAR7, VAR21,
VAR14, VAR2,
VAR42, VAR67,
VAR19, VAR58,
VAR18;
MODULE1 MODULE1 ( .VAR13({1'b0, VAR16[15:8]}), .VAR22({1'b0,
VAR53[15:8]}), .VAR28(1'b0), .VAR65({VAR62[16:12], VAR21,
VAR14, VAR2, VAR42}) );
MODULE2 MODULE2 ( .VAR13(VAR16[11:4]), .VAR22(VAR53[11:4]), .VAR28(
1'b0), .VAR65({VAR62[11:8], VAR67, VAR19,
VAR58, VAR18}) );
VAR77 VAR55 ( .VAR13(VAR49), .VAR22(VAR78), .VAR12(VAR62[7]) );
VAR77 VAR38 ( .VAR13(VAR16[7]), .VAR22(VAR53[7]), .VAR12(VAR78) );
VAR33 VAR34 ( .VAR13(VAR53[0]), .VAR22(VAR16[0]), .VAR6(VAR7), .VAR35(VAR62[0]) );
VAR44 VAR1 ( .VAR13(VAR16[6]), .VAR22(VAR53[6]), .VAR59(VAR75), .VAR6(VAR49), .VAR35(VAR62[6]) );
VAR44 VAR41 ( .VAR13(VAR16[5]), .VAR22(VAR53[5]), .VAR59(VAR17), .VAR6(VAR75), .VAR35(VAR62[5]) );
VAR44 VAR27 ( .VAR13(VAR16[4]), .VAR22(VAR53[4]), .VAR59(VAR80), .VAR6(VAR17), .VAR35(VAR62[4]) );
VAR44 VAR48 ( .VAR13(VAR16[3]), .VAR22(VAR53[3]), .VAR59(VAR73), .VAR6(VAR80), .VAR35(VAR62[3]) );
VAR44 VAR52 ( .VAR13(VAR16[2]), .VAR22(VAR53[2]), .VAR59(VAR60), .VAR6(VAR73), .VAR35(VAR62[2]) );
VAR44 VAR29 ( .VAR13(VAR16[1]), .VAR22(VAR53[1]), .VAR59(VAR7), .VAR6(VAR60), .VAR35(VAR62[1]) );
VAR23 ("VAR31.VAR45");
endmodule
|
gpl-3.0
|
google/skywater-pdk-libs-sky130_fd_sc_ms
|
cells/einvp/sky130_fd_sc_ms__einvp.blackbox.v
| 1,268 |
module MODULE1 (
VAR2 ,
VAR7 ,
VAR3
);
output VAR2 ;
input VAR7 ;
input VAR3;
supply1 VAR6;
supply0 VAR4;
supply1 VAR1 ;
supply0 VAR5 ;
endmodule
|
apache-2.0
|
mbus/mbus
|
layer_controller_v3/verilog/int_action_rom.v
| 9,818 |
module MODULE1 #(
parameter VAR19 = 13
)
(
output [VAR13*VAR19-1:0] VAR14,
output [(VAR11*3)*VAR19-1:0] VAR9,
output [2*VAR19-1:0] VAR5
);
wire [VAR13-1:0] VAR29 [0:VAR19-1];
wire [(VAR11*3)-1:0] VAR21 [0:VAR19-1];
wire [1:0] VAR15 [0:VAR19-1];
genvar VAR6;
generate
for (VAR6=0; VAR6<VAR19; VAR6=VAR6+1)
begin: VAR17
assign VAR14[VAR13*(VAR6+1)-1:VAR13*VAR6] = VAR29[VAR6];
assign VAR9[(VAR11*3)*(VAR6+1)-1:(VAR11*3)*VAR6] = VAR21[VAR6];
assign VAR5[2*(VAR6+1)-1:2*VAR6] = VAR15[VAR6];
end
endgenerate
localparam VAR20 = 3;
localparam VAR12 = 3;
localparam VAR23 = 5;
wire [7:0] VAR1 [0:VAR20-1];
wire [7:0] VAR7 [0:VAR20-1];
wire [7:0] VAR3[0:VAR20-1];
wire [7:0] VAR31[0:VAR20-1];
wire [7:0] VAR10 [0:5];
wire [23:0] VAR26 [0:5];
wire [29:0] VAR28 [0:VAR23-1];
wire [7:0] VAR24 [0:VAR23-1];
wire [19:0] VAR2 [0:VAR23-1];
wire [29:0] VAR27 [0:VAR23-1];
generate
for (VAR6=0; VAR6<VAR20; VAR6=VAR6+1)
begin: VAR32
assign VAR21[VAR6] = (((VAR1[VAR6]<<24 | VAR7[VAR6]<<16 | VAR3[VAR6]<<8 | VAR31[VAR6])<<VAR11*2) | {(VAR11*2){1'b0}});
assign VAR15[VAR6] = 2'b01;
assign VAR29[VAR6] = VAR22;
end
endgenerate
assign VAR1[0] = 8'h0; assign VAR7[0] = 8'h0; assign VAR3[0] = {4'd4, VAR25};assign VAR31[0] = 8'h0;
assign VAR1[1] = 8'h2; assign VAR7[1] = 8'h4; assign VAR3[1] = {4'd4, VAR25}; assign VAR31[1] = 8'h2;
assign VAR1[2] = 8'h0; assign VAR7[2] = 8'd9; assign VAR3[2] = {4'd4, VAR16, 2'b00};assign VAR31[2] = 8'd100;
generate
for (VAR6=0; VAR6<VAR12; VAR6=VAR6+1)
begin: VAR8
assign VAR29[VAR20+VAR6] = VAR25;
end
endgenerate
assign VAR10[0] = 8'b0; assign VAR26[0] = 24'habcdef; assign VAR15[VAR20] = 2'b01; assign VAR21[VAR20] = (((VAR10[0]<<24 | VAR26[0])<<(VAR11*2)) | {(VAR11*2){1'b0}});
assign VAR10[1] = 8'd1; assign VAR26[1] = 24'h123456; assign VAR10[2] = 8'd3; assign VAR26[2] = 24'h987654; assign VAR15[VAR20+1] = 2'b10; assign VAR21[VAR20+1] = (((VAR10[1]<<24 | VAR26[1])<<(VAR11*2)) | ((VAR10[2]<<24 | VAR26[2])<<VAR11) | {(VAR11){1'b0}});
assign VAR10[3] = 8'd2; assign VAR26[3] = 24'h123321; assign VAR10[4] = 8'd4; assign VAR26[4] = 24'habccba; assign VAR10[5] = 8'd6; assign VAR26[5] = 24'h090785; assign VAR15[VAR20+2] = 2'b11; assign VAR21[VAR20+2] = ((VAR10[3]<<24 | VAR26[3])<<(VAR11*2)) | ((VAR10[4]<<24 | VAR26[4])<<VAR11) | (VAR10[5]<<24 | VAR26[5]);
generate
for (VAR6=0; VAR6<VAR23; VAR6=VAR6+1)
begin: VAR30
assign VAR21[VAR20 + VAR12 + VAR6] = ((((VAR24[VAR6]<<24) | (4'b0<<20) | VAR2[VAR6])<<(VAR11*2)) | ((VAR28[VAR6]<<2) | 2'b0)<<VAR11) | ((VAR27[VAR6]<<2) | 2'b0);
assign VAR29[VAR20 + VAR12 + VAR6] = VAR4;
end
endgenerate
assign VAR28[0] = 30'h0; assign VAR24[0] = {4'd4, VAR18}; assign VAR2[0] = 20'd0; assign VAR27[0] = 30'd1; assign VAR15[VAR20+VAR12] = 2'b11;
assign VAR28[1] = 30'h1; assign VAR24[1] = {4'd4, VAR18}; assign VAR2[1] = 20'd4; assign VAR27[1] = 30'd2; assign VAR15[VAR20+VAR12+1] = 2'b11;
assign VAR28[2] = 30'd100; assign VAR24[2] = {4'd3, VAR25}; assign VAR2[2] = 20'd0; assign VAR27[2] = 30'd0; assign VAR15[VAR20+VAR12+2] = 2'b10;
assign VAR28[3] = 30'd101; assign VAR24[3] = {4'd3, VAR25}; assign VAR2[3] = 20'd3; assign VAR27[3] = 30'd0; assign VAR15[VAR20+VAR12+3] = 2'b10;
assign VAR28[4] = 30'd0; assign VAR24[4] = {4'd4, VAR16, 2'b01}; assign VAR2[4] = 20'd9; assign VAR27[4] = 30'd0; assign VAR15[VAR20+VAR12+4] = 2'b10;
assign VAR15[VAR20 + VAR12 + VAR23] = 2'b00; assign VAR29[VAR20 + VAR12 + VAR23] = 4'b0; assign VAR21[VAR20 + VAR12 + VAR23] = 96'b0;
assign VAR15[VAR20 + VAR12 + VAR23 + 1] = 2'b01;
assign VAR29[VAR20 + VAR12 + VAR23 + 1] = 4'b1100; assign VAR21[VAR20 + VAR12 + VAR23 + 1] = 96'b0;
endmodule
|
apache-2.0
|
sundw2014/sdr-transmiter
|
software/AD9708_FPGA/ROM_Sin.v
| 6,348 |
module MODULE1 (
address,
VAR42,
VAR49);
input [15:0] address;
input VAR42;
output [7:0] VAR49;
tri1 VAR42;
wire [7:0] VAR18;
wire [7:0] VAR49 = VAR18[7:0];
VAR32 VAR20 (
.VAR1 (address),
.VAR36 (VAR42),
.VAR13 (VAR18),
.VAR38 (1'b0),
.VAR25 (1'b0),
.VAR4 (1'b1),
.VAR39 (1'b0),
.VAR26 (1'b0),
.VAR45 (1'b1),
.VAR43 (1'b1),
.VAR35 (1'b1),
.VAR21 (1'b1),
.VAR17 (1'b1),
.VAR14 (1'b1),
.VAR11 (1'b1),
.VAR44 ({8{1'b1}}),
.VAR5 (1'b1),
.VAR37 (),
.VAR16 (),
.VAR2 (1'b1),
.VAR12 (1'b1),
.VAR23 (1'b0),
.VAR6 (1'b0));
VAR20.VAR48 = "VAR51",
VAR20.VAR19 = "VAR51",
VAR20.VAR46 = "VAR9.VAR34",
VAR20.VAR28 = "VAR47 VAR7",
VAR20.VAR27 = "VAR40=VAR24",
VAR20.VAR50 = "VAR32",
VAR20.VAR10 = 50000,
VAR20.VAR41 = "VAR8",
VAR20.VAR30 = "VAR33",
VAR20.VAR22 = "VAR31",
VAR20.VAR29 = 16,
VAR20.VAR15 = 8,
VAR20.VAR3 = 1;
endmodule
|
mit
|
google/skywater-pdk-libs-sky130_fd_sc_lp
|
cells/buf/sky130_fd_sc_lp__buf_m.v
| 1,990 |
module MODULE1 (
VAR8 ,
VAR4 ,
VAR1,
VAR3,
VAR2 ,
VAR5
);
output VAR8 ;
input VAR4 ;
input VAR1;
input VAR3;
input VAR2 ;
input VAR5 ;
VAR6 VAR7 (
.VAR8(VAR8),
.VAR4(VAR4),
.VAR1(VAR1),
.VAR3(VAR3),
.VAR2(VAR2),
.VAR5(VAR5)
);
endmodule
module MODULE1 (
VAR8,
VAR4
);
output VAR8;
input VAR4;
supply1 VAR1;
supply0 VAR3;
supply1 VAR2 ;
supply0 VAR5 ;
VAR6 VAR7 (
.VAR8(VAR8),
.VAR4(VAR4)
);
endmodule
|
apache-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_hdll
|
cells/nor2b/sky130_fd_sc_hdll__nor2b.behavioral.pp.v
| 1,989 |
module MODULE1 (
VAR14 ,
VAR1 ,
VAR3 ,
VAR10,
VAR7,
VAR9 ,
VAR12
);
output VAR14 ;
input VAR1 ;
input VAR3 ;
input VAR10;
input VAR7;
input VAR9 ;
input VAR12 ;
wire VAR2 ;
wire VAR13 ;
wire VAR11;
not VAR15 (VAR2 , VAR1 );
and VAR6 (VAR13 , VAR2, VAR3 );
VAR8 VAR5 (VAR11, VAR13, VAR10, VAR7);
buf VAR4 (VAR14 , VAR11 );
endmodule
|
apache-2.0
|
tommythorn/yari
|
DE2-70/rtl/ssram_ctrl.v
| 9,869 |
module MODULE1
(input wire VAR22
,input wire reset
,output VAR30
,input [1:0] VAR52
,input [29:0] VAR21 ,input VAR34
,input VAR40
,input [31:0] VAR11
,input [3:0] VAR50
,output reg [31:0] VAR15
,output reg [1:0] VAR10 = 0
,output wire VAR3
,output reg VAR38 = 1 ,output reg VAR58 = 1 ,output reg [18:0] VAR35 = 0
,output reg [ 3:0] VAR6 = 1 ,output reg VAR46 = 1 ,output reg VAR51 = 1 ,inout wire [ 3:0] VAR13 ,inout wire [31:0] VAR17
,output wire VAR8 ,output wire VAR31 ,output wire VAR59 ,output wire VAR61 ,output wire VAR23
,inout [14:0] VAR26 ,inout VAR27 ,output [21:0] VAR24 ,output VAR5 ,output VAR47 ,output VAR41 ,input VAR14 ,output VAR56 ,output VAR43 ,output VAR16 );
parameter VAR37 = 2;
parameter VAR2 = 0;
parameter VAR54 = 3'd1 << VAR37;
parameter VAR18 = 7'd90; parameter VAR28 = 7'd20;
assign VAR3 = VAR22; assign VAR8 = 1; assign VAR23 = 1; assign VAR31 = 0; assign VAR59 = 1; assign VAR61 = 0;
reg [31:0] VAR57;
reg VAR25 = 0;
assign VAR17 = VAR25 ? VAR57 : 'VAR44;
reg [ 1:0] VAR19 = 2'd0;
reg [21:0] VAR42 = 22'd0;
reg [31:0] VAR48 = 0;
wire [15:0] VAR39;
wire VAR20 = 1'd0;
reg VAR9= 1'd0;
parameter VAR53 = 7; reg [VAR53:0]
VAR7 = 1'd0;
assign {VAR27,VAR26}
= VAR9 ? VAR20 : 16'VAR45;
assign VAR39 = {VAR27,VAR26};
assign VAR24 = VAR42;
assign VAR16 = 0;
assign VAR43 = 0;
assign VAR5 = 1;
assign VAR47 = 1;
assign VAR41 = 0; assign VAR56 = 1;
parameter VAR36 = 0;
parameter VAR29 = 1;
parameter VAR55 = 2;
parameter VAR4 = 3;
parameter VAR49 = 4;
parameter VAR12 = 5;
reg [ 5:0] state = VAR36;
reg [VAR37:0] VAR1 = 0;
reg [ 1:0] VAR33 = 0;
reg [ 1:0] VAR60 = 0;
reg [ 1:0] VAR32 = 0;
assign VAR30 = state != VAR36 ||
VAR40 && VAR60;
always @(posedge VAR22) begin
if (reset) begin
VAR10 <= 0;
VAR32 <= 0;
VAR60 <= 0;
state <= VAR36;
end else begin
VAR15 <= VAR17;
VAR10 <= VAR32;
VAR32 <= VAR60;
VAR60 <= VAR33;
end
VAR38 <= 1;
VAR6 <= 15;
VAR51 <= 1;
VAR58 <= 1;
case (state)
VAR36:
if (VAR34 && VAR21[29:26] == 4'hB) begin
VAR42 <= {VAR21[20:2],3'd0};
VAR7 <= (VAR18 + VAR28 - 1'd1) / VAR28 - 1'd1;
VAR19 <= VAR52;
VAR33 <= 0; state <= VAR12;
end else if (VAR34) begin
VAR35 <= VAR21[18:0];
VAR38 <= 0;
VAR25 <= 0;
VAR46 <= 0;
VAR33 <= VAR52;
VAR1 <= VAR54 - 2'd3; state <= VAR55;
end else if (VAR40 && !VAR60) begin
VAR35 <= VAR21[18:0];
VAR38 <= 0;
VAR25 <= 1;
VAR57 <= VAR11;
VAR6 <= ~VAR50;
VAR51 <= 0;
VAR46 <= 1 ;
VAR33 <= 0;
end else begin
VAR33 <= 0;
VAR25 <= 0;
end
VAR55: begin
VAR58 <= 0;
VAR25 <= 0;
VAR1 <= VAR1 - 1'd1;
if (VAR1[VAR37])
state <= VAR36;
end
VAR29: begin
state <= VAR36;
VAR25 <= 0;
end
VAR4: begin
VAR25 <= 1;
VAR51 <= 1;
state <= VAR36;
end
VAR49: begin
VAR25 <= 1;
VAR51 <= 1;
state <= VAR36;
end
VAR12: begin
if (!VAR7[VAR53])
VAR7 <= VAR7 - 1'd1;
end
else begin
VAR48 <= {VAR48[15:0], VAR39[7:0], VAR39[15:8]};
VAR15 <= {VAR48[15:0], VAR39[7:0], VAR39[15:8]};
VAR42 <= VAR42 + 1'd1;
VAR10 <= VAR42[0] ? VAR19 : 2'd0;
VAR7 <= (VAR18 + VAR28 - 1'd1) / VAR28 - 1'd1;
if (VAR42[2:0] == 7)
state <= VAR36;
end
end
endcase
end
endmodule
|
gpl-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_ms
|
cells/dlrbp/sky130_fd_sc_ms__dlrbp.pp.blackbox.v
| 1,440 |
module MODULE1 (
VAR9 ,
VAR5 ,
VAR3,
VAR7 ,
VAR6 ,
VAR1 ,
VAR4 ,
VAR8 ,
VAR2
);
output VAR9 ;
output VAR5 ;
input VAR3;
input VAR7 ;
input VAR6 ;
input VAR1 ;
input VAR4 ;
input VAR8 ;
input VAR2 ;
endmodule
|
apache-2.0
|
ILoveSpeccy/Aeon-Lite
|
cores/radio-86rk/src/rk_kbd.v
| 4,868 |
module MODULE1(
input clk,
input reset,
input VAR13,
input VAR1,
input[7:0] addr,
output reg[7:0] VAR5,
output reg VAR6,
output reg VAR2,
output[2:0] VAR7);
reg[7:0] VAR9[10:0];
assign VAR7 = VAR9[8][2:0];
always @(addr,VAR9) begin
VAR5 =
(VAR9[0] & {8{addr[0]}})|
(VAR9[1] & {8{addr[1]}})|
(VAR9[2] & {8{addr[2]}})|
(VAR9[3] & {8{addr[3]}})|
(VAR9[4] & {8{addr[4]}})|
(VAR9[5] & {8{addr[5]}})|
(VAR9[6] & {8{addr[6]}})|
(VAR9[7] & {8{addr[7]}});
end
reg[2:0] VAR11;
reg[3:0] VAR15;
reg VAR14;
reg VAR3;
reg[3:0] VAR10;
reg[11:0] VAR4;
wire[11:0] VAR8 = {VAR1,VAR4[11:1]};
wire[7:0] VAR12 = VAR8[9:2];
always @(*) begin
case (VAR12)
8'h6C: {VAR11,VAR15} = 7'h00; 8'h7D: {VAR11,VAR15} = 7'h10; 8'h76: {VAR11,VAR15} = 7'h20; 8'h05: {VAR11,VAR15} = 7'h30; 8'h06: {VAR11,VAR15} = 7'h40; 8'h04: {VAR11,VAR15} = 7'h50; 8'h0C: {VAR11,VAR15} = 7'h60; 8'h03: {VAR11,VAR15} = 7'h70;
8'h0D: {VAR11,VAR15} = 7'h01; 8'h71: {VAR11,VAR15} = 7'h11; 8'h5A: {VAR11,VAR15} = 7'h21; 8'h66: {VAR11,VAR15} = 7'h31; 8'h6B: {VAR11,VAR15} = 7'h41; 8'h75: {VAR11,VAR15} = 7'h51; 8'h74: {VAR11,VAR15} = 7'h61; 8'h72: {VAR11,VAR15} = 7'h71;
8'h45: {VAR11,VAR15} = 7'h02; 8'h16: {VAR11,VAR15} = 7'h12; 8'h1E: {VAR11,VAR15} = 7'h22; 8'h26: {VAR11,VAR15} = 7'h32; 8'h25: {VAR11,VAR15} = 7'h42; 8'h2E: {VAR11,VAR15} = 7'h52; 8'h36: {VAR11,VAR15} = 7'h62; 8'h3D: {VAR11,VAR15} = 7'h72;
8'h3E: {VAR11,VAR15} = 7'h03; 8'h46: {VAR11,VAR15} = 7'h13; 8'h55: {VAR11,VAR15} = 7'h23; 8'h0E: {VAR11,VAR15} = 7'h33; 8'h41: {VAR11,VAR15} = 7'h43; 8'h4E: {VAR11,VAR15} = 7'h53; 8'h49: {VAR11,VAR15} = 7'h63; 8'h4A: {VAR11,VAR15} = VAR14 ? 7'h73 : 7'h73;
8'h4C: {VAR11,VAR15} = 7'h04; 8'h1C: {VAR11,VAR15} = 7'h14; 8'h32: {VAR11,VAR15} = 7'h24; 8'h21: {VAR11,VAR15} = 7'h34; 8'h23: {VAR11,VAR15} = 7'h44; 8'h24: {VAR11,VAR15} = 7'h54; 8'h2B: {VAR11,VAR15} = 7'h64; 8'h34: {VAR11,VAR15} = 7'h74;
8'h33: {VAR11,VAR15} = 7'h05; 8'h43: {VAR11,VAR15} = 7'h15; 8'h3B: {VAR11,VAR15} = 7'h25; 8'h42: {VAR11,VAR15} = 7'h35; 8'h4B: {VAR11,VAR15} = 7'h45; 8'h3A: {VAR11,VAR15} = 7'h55; 8'h31: {VAR11,VAR15} = 7'h65; 8'h44: {VAR11,VAR15} = 7'h75;
8'h4D: {VAR11,VAR15} = 7'h06; 8'h15: {VAR11,VAR15} = 7'h16; 8'h2D: {VAR11,VAR15} = 7'h26; 8'h1B: {VAR11,VAR15} = 7'h36; 8'h2C: {VAR11,VAR15} = 7'h46; 8'h3C: {VAR11,VAR15} = 7'h56; 8'h2A: {VAR11,VAR15} = 7'h66; 8'h1D: {VAR11,VAR15} = 7'h76;
8'h22: {VAR11,VAR15} = 7'h07; 8'h35: {VAR11,VAR15} = 7'h17; 8'h1A: {VAR11,VAR15} = 7'h27; 8'h54: {VAR11,VAR15} = 7'h37; 8'h52: {VAR11,VAR15} = 7'h47; 8'h5B: {VAR11,VAR15} = 7'h57; 8'h5D: {VAR11,VAR15} = 7'h67; 8'h29: {VAR11,VAR15} = 7'h77;
8'h12: {VAR11,VAR15} = 7'h08; 8'h59: {VAR11,VAR15} = 7'h08; 8'h14: {VAR11,VAR15} = VAR14 ? 7'h18 : 7'h18; 8'h11: {VAR11,VAR15} = 7'h28;
default: {VAR11,VAR15} = 7'h7F;
endcase
end
always @(posedge clk or posedge reset) begin
if (reset) begin
VAR10 <= 0;
VAR4 <= 12'hFFF;
VAR14 <= 0;
VAR3 <= 0;
VAR9[0] <= 0;
VAR9[1] <= 0;
VAR9[2] <= 0;
VAR9[3] <= 0;
VAR9[4] <= 0;
VAR9[5] <= 0;
VAR9[6] <= 0;
VAR9[7] <= 0;
VAR9[8] <= 0;
VAR9[9] <= 0;
VAR9[10] <= 0;
VAR6 <= 0;
end else begin
VAR10 <= {VAR13,VAR10[3:1]};
if (VAR10==4'b1) begin
if (VAR8[11]==1'b1 && ^VAR8[10:2]==1'b1 && VAR8[1:0]==2'b1) begin
VAR4 <= 12'hFFF;
end
if (VAR12==8'hE0) VAR14 <= 1'b1; else
end
if (VAR12==8'hF0) VAR3 <= 1'b1; else
begin
VAR14 <= 0;
VAR3 <= 0;
if(VAR15!=4'hF) VAR9[VAR15][VAR11] <= ~VAR3;
end
if(VAR12 == 8'h07 && VAR3 == 1'b0) VAR6 <= 1'b1; else VAR6 <= 1'b0;
if(VAR12 == 8'h78 && VAR3 == 1'b0) VAR2 <= !VAR2;
end
end else
VAR4 <= VAR8;
end
end
end
endmodule
|
gpl-3.0
|
google/skywater-pdk-libs-sky130_fd_sc_ms
|
cells/nor3b/sky130_fd_sc_ms__nor3b.functional.pp.v
| 1,995 |
module MODULE1 (
VAR14 ,
VAR12 ,
VAR16 ,
VAR5 ,
VAR3,
VAR13,
VAR9 ,
VAR4
);
output VAR14 ;
input VAR12 ;
input VAR16 ;
input VAR5 ;
input VAR3;
input VAR13;
input VAR9 ;
input VAR4 ;
wire VAR6 ;
wire VAR10 ;
wire VAR8;
nor VAR15 (VAR6 , VAR12, VAR16 );
and VAR7 (VAR10 , VAR5, VAR6 );
VAR11 VAR1 (VAR8, VAR10, VAR3, VAR13);
buf VAR2 (VAR14 , VAR8 );
endmodule
|
apache-2.0
|
dries007/Basys3
|
VGA_text/VGA_text.srcs/sources_1/ip/ClockDivider/ClockDivider.v
| 4,048 |
module MODULE1
(
input clk,
output VAR4,
output VAR5,
output VAR1
);
VAR3 VAR2
(
.clk(clk),
.VAR4(VAR4),
.VAR5(VAR5),
.VAR1(VAR1)
);
endmodule
|
mit
|
google/skywater-pdk-libs-sky130_fd_sc_lp
|
cells/o32ai/sky130_fd_sc_lp__o32ai_lp.v
| 2,449 |
module MODULE1 (
VAR7 ,
VAR3 ,
VAR6 ,
VAR10 ,
VAR9 ,
VAR2 ,
VAR5,
VAR8,
VAR12 ,
VAR4
);
output VAR7 ;
input VAR3 ;
input VAR6 ;
input VAR10 ;
input VAR9 ;
input VAR2 ;
input VAR5;
input VAR8;
input VAR12 ;
input VAR4 ;
VAR11 VAR1 (
.VAR7(VAR7),
.VAR3(VAR3),
.VAR6(VAR6),
.VAR10(VAR10),
.VAR9(VAR9),
.VAR2(VAR2),
.VAR5(VAR5),
.VAR8(VAR8),
.VAR12(VAR12),
.VAR4(VAR4)
);
endmodule
module MODULE1 (
VAR7 ,
VAR3,
VAR6,
VAR10,
VAR9,
VAR2
);
output VAR7 ;
input VAR3;
input VAR6;
input VAR10;
input VAR9;
input VAR2;
supply1 VAR5;
supply0 VAR8;
supply1 VAR12 ;
supply0 VAR4 ;
VAR11 VAR1 (
.VAR7(VAR7),
.VAR3(VAR3),
.VAR6(VAR6),
.VAR10(VAR10),
.VAR9(VAR9),
.VAR2(VAR2)
);
endmodule
|
apache-2.0
|
litex-hub/pythondata-cpu-blackparrot
|
pythondata_cpu_blackparrot/system_verilog/black-parrot/external/basejump_stl/bsg_noc/bsg_wormhole_router_input_control.v
| 1,678 |
module MODULE1 #(parameter VAR6(VAR3), parameter VAR6(VAR14))
(input VAR20
, input VAR17
, input VAR2
, input [VAR3-1:0] VAR12
, input [VAR14-1:0] VAR9
, input VAR10
, output [VAR3-1:0] VAR21
, output VAR18
, output VAR4
);
wire [VAR14-1:0] VAR7;
wire VAR22 = (!VAR7);
wire VAR19 = VAR22 & VAR2;
VAR15 #(.VAR1(VAR14), .VAR5(1'b1)) VAR8
(.VAR20
,.VAR17
,.VAR13 (VAR10 & VAR22) ,.VAR23 (VAR9)
,.VAR11 (VAR10 & ~VAR22) ,.VAR16(VAR7) );
assign VAR21 = VAR19 ? VAR12 : '0;
assign VAR18 = VAR22;
assign VAR4 = VAR19;
endmodule
|
bsd-3-clause
|
mshaklunov/usb_devtrsac
|
rtl/usb_fifo_sync.v
| 3,196 |
module MODULE1 #(
parameter VAR5=4,
parameter VAR14=0,
parameter VAR18=0
)
(
input clk,
input VAR21,
input VAR12,
input VAR9,
input[(1<<VAR14)-1:0] VAR13,
input VAR17,
output[(1<<VAR18)-1:0] VAR3,
output VAR2,
output VAR1
);
localparam VAR11= 1<<VAR5;
reg[VAR11-1:0] VAR16;
reg[VAR5:VAR14] VAR6;
reg[VAR5:VAR18] VAR19;
generate
genvar VAR4;
for(VAR4=0; VAR4<(1<<VAR18); VAR4=VAR4+1)
begin:VAR10
assign VAR3[VAR4]= VAR16[ (VAR19[VAR5-1:VAR18]<<
VAR18)+VAR4 ];
end
if(VAR14>VAR18)
begin
assign VAR2= VAR6[VAR5]!=VAR19[VAR5] &
VAR6[VAR5-1:VAR14]==
VAR19[VAR5-1:VAR14] ? 1'b1 : 1'b0;
assign VAR1= VAR6[VAR5:VAR14]==
VAR19[VAR5:VAR14] ? 1'b1 : 1'b0;
end
else
begin
assign VAR2= VAR6[VAR5]!=VAR19[VAR5] &
VAR6[VAR5-1:VAR18]==
VAR19[VAR5-1:VAR18] ? 1'b1 : 1'b0;
assign VAR1= VAR6[VAR5:VAR18]==
VAR19[VAR5:VAR18] ? 1'b1 : 1'b0;
end
endgenerate
always @(posedge clk, negedge VAR21)
begin
if(!VAR21)
begin
VAR6<={(VAR5-VAR14+1){1'b0}};
VAR19<={(VAR5-VAR18+1){1'b0}};
end
else
begin
if(!VAR12)
begin
VAR6<={(VAR5-VAR14+1){1'b0}};
VAR19<={(VAR5-VAR18+1){1'b0}};
end
else
begin
VAR6<= VAR9 & !VAR2 ? VAR6+1'b1 : VAR6;
VAR19<= VAR17 & !VAR1 ? VAR19+1'b1 : VAR19;
end
end
end
generate
genvar VAR20,VAR15;
for(VAR20=0; VAR20<(VAR11>>VAR14); VAR20=VAR20+1)
begin:VAR8
for(VAR15=VAR20*(1<<VAR14) ; VAR15<(VAR20+1)*(1<<VAR14) ; VAR15=VAR15+1)
begin:VAR7
always @(posedge clk, negedge VAR21)
if(!VAR21)
VAR16[VAR15]<=1'b0;
end
else
VAR16[VAR15]<= VAR6[VAR5-1:VAR14]==VAR20 &
!VAR2 & VAR9 ? VAR13[VAR15%(1<<VAR14)] :
VAR16[VAR15];
end
end
endgenerate
endmodule
|
mit
|
kyzhai/NUNY
|
src/hardware/moon.v
| 6,344 |
module MODULE1 (
address,
VAR24,
VAR37);
input [11:0] address;
input VAR24;
output [11:0] VAR37;
tri1 VAR24;
wire [11:0] VAR12;
wire [11:0] VAR37 = VAR12[11:0];
VAR21 VAR18 (
.VAR31 (address),
.VAR32 (VAR24),
.VAR28 (VAR12),
.VAR7 (1'b0),
.VAR1 (1'b0),
.VAR40 (1'b1),
.VAR17 (1'b0),
.VAR47 (1'b0),
.VAR33 (1'b1),
.VAR4 (1'b1),
.VAR10 (1'b1),
.VAR50 (1'b1),
.VAR49 (1'b1),
.VAR15 (1'b1),
.VAR38 (1'b1),
.VAR27 ({12{1'b1}}),
.VAR43 (1'b1),
.VAR5 (),
.VAR2 (),
.VAR41 (1'b1),
.VAR29 (1'b1),
.VAR36 (1'b0),
.VAR11 (1'b0));
VAR18.VAR30 = "VAR39",
VAR18.VAR19 = "VAR20",
VAR18.VAR14 = "VAR20",
VAR18.VAR35 = "../VAR34/MODULE1.VAR42",
VAR18.VAR6 = "VAR26 VAR51",
VAR18.VAR8 = "VAR48=VAR45",
VAR18.VAR22 = "VAR21",
VAR18.VAR25 = 4096,
VAR18.VAR16 = "VAR46",
VAR18.VAR23 = "VAR39",
VAR18.VAR9 = "VAR52",
VAR18.VAR13 = 12,
VAR18.VAR44 = 12,
VAR18.VAR3 = 1;
endmodule
|
gpl-2.0
|
SymbiFlow/prjxray-experiments-archive-2017
|
bram_rom/top.v
| 23,591 |
module MODULE2(input clk, VAR103, VAR62, output do);
localparam integer VAR71 = 256;
localparam integer VAR7 = 256;
reg [VAR71-1:0] din;
wire [VAR7-1:0] dout;
reg [VAR71-1:0] VAR109;
reg [VAR7-1:0] VAR182;
always @(posedge clk) begin
VAR109 <= {VAR109, VAR62};
VAR182 <= {VAR182, VAR109[VAR71-1]};
if (VAR103) begin
din <= VAR109;
VAR182 <= dout;
end
end
assign do = VAR182[VAR7-1];
MODULE1 MODULE1 (
.clk(clk),
.din(din),
.dout(dout)
);
endmodule
module MODULE1(input clk, input [255:0] din, output [255:0] dout);
MODULE4 #(.VAR97("VAR82"))
MODULE4(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
endmodule
module MODULE4 (input clk, input [7:0] din, output [7:0] dout);
parameter VAR97 = "";
VAR164 #(
.VAR181(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR174(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR24(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR88(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR40(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR20(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR100(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR23(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR163(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR21(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR98(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR39(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR72(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR42(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR147(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR49(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR166(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR11(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR189(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR192(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR184(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR172(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR4(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR61(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR33(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR38(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR59(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR176(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR9(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR92(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR6(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR156(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR161(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR136(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR160(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR87(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR159(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR37(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR125(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR81(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR43(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR120(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR56(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR183(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR19(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR29(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR70(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR106(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR34(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR177(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR57(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR63(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR90(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR186(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR52(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR185(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR124(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR68(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR5(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR89(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR119(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR84(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR60(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR107(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR143(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR101(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR190(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR165(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR117(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR154(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR47(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR110(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR8(1'b0),
.VAR80(1'b0),
.VAR148(1'b0),
.VAR155(1'b0),
.VAR105(1'b0),
.VAR67(1'b0),
.VAR48(1'b0),
.VAR32(1'b0),
.VAR74("VAR96"),
.VAR16("VAR3"),
.VAR104("VAR3"),
.VAR31("VAR180")
) VAR112 (
.VAR15(din[0]),
.VAR178(din[1]),
.VAR30(din[2]),
.VAR83(din[3]),
.VAR14(din[4]),
.VAR151(din[5]),
.VAR102(din[6]),
.VAR45(din[7]),
.VAR129(din[0]),
.VAR64(din[1]),
.VAR142(din[2]),
.VAR187(din[3]),
.VAR126(din[4]),
.VAR65(din[5]),
.VAR127(din[6]),
.VAR135(din[7]),
.VAR130(din[0]),
.VAR35(din[1]),
.VAR93(dout[0]),
.VAR1(dout[1]),
.VAR162(dout[2]),
.VAR114(dout[3]));
endmodule
module MODULE3 (input clk, input [7:0] din, output [7:0] dout);
parameter VAR97 = "";
VAR121 #(
.VAR181(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR174(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR24(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR88(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR40(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR20(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR100(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR23(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR158(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR73(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR44(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR18(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR79(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR75(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR94(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR25(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR163(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR21(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR98(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR39(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR72(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR42(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR147(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR49(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR166(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR11(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR189(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR192(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR184(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR172(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR4(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR61(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR33(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR38(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR59(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR176(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR9(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR92(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR6(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR156(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR161(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR136(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR160(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR87(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR159(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR37(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR125(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR81(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR43(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR120(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR56(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR183(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR19(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR29(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR70(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR106(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR34(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR177(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR57(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR63(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR90(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR186(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR52(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR185(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR124(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR68(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR5(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR89(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR119(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR84(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR60(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR107(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR143(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR101(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR190(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR165(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR117(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR154(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR47(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR110(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR138(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR149(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR108(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR157(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR86(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR145(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR150(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR22(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR99(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR168(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR2(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR152(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR123(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR46(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR133(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR191(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR28(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR188(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR122(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR13(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR85(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR146(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR153(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR51(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR78(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR141(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR111(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR50(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR26(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR167(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR134(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR137(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR175(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR69(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR91(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR53(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR12(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR17(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR170(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR95(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR113(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR116(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR55(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR144(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR36(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR77(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR131(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR179(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR169(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR173(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR10(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR54(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR128(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR41(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR76(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR27(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR66(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR58(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR139(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR115(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR140(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR171(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR132(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR118(256'h0000000000000000000000000000000000000000000000000000000000000000),
.VAR8(1'b0),
.VAR80(1'b0),
.VAR148(1'b0),
.VAR155(1'b0),
.VAR105(1'b0),
.VAR67(1'b0),
.VAR48(1'b0),
.VAR32(1'b0),
.VAR74("VAR96"),
.VAR16("VAR3"),
.VAR104("VAR3"),
.VAR31("VAR180")
) VAR112 (
.VAR15(din[0]),
.VAR178(din[1]),
.VAR30(din[2]),
.VAR83(din[3]),
.VAR14(din[4]),
.VAR151(din[5]),
.VAR102(din[6]),
.VAR45(din[7]),
.VAR129(din[0]),
.VAR64(din[1]),
.VAR142(din[2]),
.VAR187(din[3]),
.VAR126(din[4]),
.VAR65(din[5]),
.VAR127(din[6]),
.VAR135(din[7]),
.VAR130(din[0]),
.VAR35(din[1]),
.VAR93(dout[0]),
.VAR1(dout[1]),
.VAR162(dout[2]),
.VAR114(dout[3]));
endmodule
|
isc
|
alexforencich/verilog-ethernet
|
rtl/eth_phy_10g_rx_frame_sync.v
| 4,493 |
module MODULE1 #
(
parameter VAR5 = 2,
parameter VAR8 = 1,
parameter VAR6 = 8
)
(
input wire clk,
input wire rst,
input wire [VAR5-1:0] VAR4,
output wire VAR7,
output wire VAR9
);
parameter VAR1 = VAR8 > VAR6 ? VAR8 : VAR6;
parameter VAR3 = VAR2(VAR1);
|
mit
|
jmacneal/Design-Project
|
Display/VGA_Controller/VGA_Audio_PLL.v
| 11,713 |
module MODULE1 (
VAR38,
VAR13,
VAR51,
VAR50,
VAR41);
input VAR38;
input VAR13;
output VAR51;
output VAR50;
output VAR41;
wire [5:0] VAR6;
wire [0:0] VAR56 = 1'h0;
wire [2:2] VAR7 = VAR6[2:2];
wire [1:1] VAR5 = VAR6[1:1];
wire [0:0] VAR59 = VAR6[0:0];
wire VAR51 = VAR59;
wire VAR50 = VAR5;
wire VAR41 = VAR7;
wire VAR16 = VAR13;
wire [1:0] VAR25 = {VAR56, VAR16};
VAR34 VAR12 (
.VAR9 (VAR25),
.VAR38 (VAR38),
.clk (VAR6)
,
.VAR43 (),
.VAR54 (),
.VAR52 (),
.VAR49 (),
.VAR28 (),
.VAR36 (),
.VAR23 (),
.VAR35 (),
.VAR11 (),
.VAR21 (),
.VAR42 (),
.VAR8 (),
.VAR22 (),
.VAR18 (),
.VAR31 (),
.VAR1 (),
.VAR40 (),
.VAR2 (),
.VAR44 (),
.VAR55 (),
.VAR10 (),
.VAR19 ()
);
VAR12.VAR30 = 15,
VAR12.VAR26 = 50,
VAR12.VAR29 = 14,
VAR12.VAR4 = "0",
VAR12.VAR53 = 3,
VAR12.VAR37 = 50,
VAR12.VAR33 = 2,
VAR12.VAR32 = "0",
VAR12.VAR17 = 15,
VAR12.VAR14 = 50,
VAR12.VAR24 = 14,
VAR12.VAR60 = "-9921",
VAR12.VAR27 = "VAR46",
VAR12.VAR48 = 37037,
VAR12.VAR3 = "VAR39 VAR45",
VAR12.VAR47 = "VAR34",
VAR12.VAR58 = "VAR20",
VAR12.VAR15 = "VAR57";
endmodule
|
gpl-3.0
|
jeremyherbert/real_time_stdev
|
variance/hdl/variance.v
| 3,439 |
module MODULE1 #(
parameter VAR1=14, parameter VAR9=7 )
(
input wire [VAR1-1:0] VAR12,
output reg [VAR1*2-1:0] VAR15,
input wire reset,
input wire clk
);
reg [VAR16(VAR4 * VAR13)-1:0] VAR8;
reg [VAR16(VAR18 * VAR13)-1:0] VAR7;
wire [VAR1-1:0] VAR19;
wire VAR3;
VAR14 #(.VAR1(VAR1), .VAR17(VAR13)) VAR5 (
.VAR12(VAR12),
.VAR15(VAR19),
.VAR23(VAR3),
.reset(reset),
.clk(clk)
);
reg [VAR16(VAR4*VAR4 * (VAR13+1))-1:0] VAR10 [2:0];
reg [VAR16(VAR18 * (VAR13+1))-1:0] VAR11 [2:0];
reg [VAR1-1:0] VAR6 [2:0];
reg [VAR1-1:0] VAR2 [2:0];
reg [VAR16(VAR22(2,VAR1*2))-1:0] VAR21 [2:0];
reg [VAR16(VAR22(2,VAR1*2))-1:0] VAR20 [2:0];
always @(posedge clk) begin
if (reset == 1'b0) begin
VAR8 <= 0;
VAR7 <= 0;
VAR6[0] <= 0; VAR6[1] <= 0; VAR6[2] <= 0;
VAR21[0] <= 0; VAR21[1] <= 0; VAR21[2] <= 0;
VAR2[0] <= 0; VAR2[1] <= 0; VAR2[2] <= 0;
VAR20[0] <= 0; VAR20[1] <= 0; VAR20[2] <= 0;
end else begin
VAR6[0] <= VAR12;
VAR6[1] <= VAR6[0];
VAR6[2] <= VAR6[1];
VAR21[0] <= VAR12*VAR12;
VAR21[1] <= VAR21[0];
VAR21[2] <= VAR21[1];
if (VAR3) begin
VAR2[0] <= VAR19;
VAR2[1] <= VAR2[0];
VAR2[2] <= VAR2[1];
VAR20[0] <= VAR19*VAR19;
VAR20[1] <= VAR20[0];
VAR20[2] <= VAR20[1];
VAR8 <= VAR8 + VAR6[2] - VAR2[2];
VAR7 <= VAR7 + VAR21[2] - VAR20[2];
VAR10[0] <= (VAR8 >> VAR9) * (VAR8 >> VAR9);
VAR10[1] <= VAR10[0];
VAR10[2] <= VAR10[1];
VAR11[0] <= (VAR7 >> VAR9);
VAR11[1] <= VAR11[0];
VAR11[2] <= VAR11[1];
VAR15 <= VAR11[2] - VAR10[2];
end else begin
VAR8 <= VAR8 + VAR6[2];
VAR7 <= VAR7 + VAR21[2];
end
end
end
|
mit
|
google/skywater-pdk-libs-sky130_fd_sc_ls
|
cells/a21boi/sky130_fd_sc_ls__a21boi.symbol.v
| 1,397 |
module MODULE1 (
input VAR2 ,
input VAR8 ,
input VAR3,
output VAR7
);
supply1 VAR6;
supply0 VAR1;
supply1 VAR4 ;
supply0 VAR5 ;
endmodule
|
apache-2.0
|
csturton/wirepatch
|
system/hardware/cores/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_crc32.v
| 3,955 |
module MODULE1 (clk, VAR3, enable, VAR4, VAR2, rst, VAR1, VAR5);
input clk;
input VAR3;
input enable;
input VAR4;
input VAR2;
input rst;
output [31:0] VAR1;
output VAR5;
reg [31:0] VAR6;
wire [31:0] VAR7;
assign VAR7[0] = VAR6[1];
assign VAR7[1] = VAR6[2];
assign VAR7[2] = VAR6[3];
assign VAR7[3] = VAR6[4];
assign VAR7[4] = VAR6[5];
assign VAR7[5] = VAR6[6] ^ VAR3 ^ VAR6[0];
assign VAR7[6] = VAR6[7];
assign VAR7[7] = VAR6[8];
assign VAR7[8] = VAR6[9] ^ VAR3 ^ VAR6[0];
assign VAR7[9] = VAR6[10] ^ VAR3 ^ VAR6[0];
assign VAR7[10] = VAR6[11];
assign VAR7[11] = VAR6[12];
assign VAR7[12] = VAR6[13];
assign VAR7[13] = VAR6[14];
assign VAR7[14] = VAR6[15];
assign VAR7[15] = VAR6[16] ^ VAR3 ^ VAR6[0];
assign VAR7[16] = VAR6[17];
assign VAR7[17] = VAR6[18];
assign VAR7[18] = VAR6[19];
assign VAR7[19] = VAR6[20] ^ VAR3 ^ VAR6[0];
assign VAR7[20] = VAR6[21] ^ VAR3 ^ VAR6[0];
assign VAR7[21] = VAR6[22] ^ VAR3 ^ VAR6[0];
assign VAR7[22] = VAR6[23];
assign VAR7[23] = VAR6[24] ^ VAR3 ^ VAR6[0];
assign VAR7[24] = VAR6[25] ^ VAR3 ^ VAR6[0];
assign VAR7[25] = VAR6[26];
assign VAR7[26] = VAR6[27] ^ VAR3 ^ VAR6[0];
assign VAR7[27] = VAR6[28] ^ VAR3 ^ VAR6[0];
assign VAR7[28] = VAR6[29];
assign VAR7[29] = VAR6[30] ^ VAR3 ^ VAR6[0];
assign VAR7[30] = VAR6[31] ^ VAR3 ^ VAR6[0];
assign VAR7[31] = VAR3 ^ VAR6[0];
always @ (posedge clk or posedge rst)
begin
if(rst)
VAR6[31:0] <= 32'hffffffff;
end
else if(VAR2)
VAR6[31:0] <= 32'hffffffff;
else if(enable)
VAR6[31:0] <= VAR7;
else if (VAR4)
VAR6[31:0] <= {1'b0, VAR6[31:1]};
end
assign VAR1 = VAR6; assign VAR5 = VAR6[0];
endmodule
|
mit
|
jcrono/sd-host
|
src/cmd/communication/deserializer.v
| 1,335 |
module MODULE1(
clk, enable, reset, VAR3, in, out, VAR1 );
parameter VAR5 = 136; parameter VAR4 = 8; parameter VAR2 = 8'hFF;
input clk, enable, reset, in;
input [VAR4-1:0] VAR3;
output reg VAR1;
output reg [VAR5-1:0] out;
reg [VAR4-1:0] counter;
always@(posedge reset) begin
out = 0;
counter = VAR3;
VAR1 = 0;
end
always@(posedge clk) begin
if(enable) begin
if(~VAR1) begin out[counter] <= in;
counter = counter - 1; end
end else begin
VAR1 = 0;
end
end
always@(counter) begin
if(counter == VAR2) begin VAR1 = 1;
end
end
always@(VAR1) begin
counter = VAR3; end
endmodule
|
gpl-3.0
|
google/skywater-pdk-libs-sky130_fd_sc_ms
|
cells/mux2/sky130_fd_sc_ms__mux2.functional.pp.v
| 1,902 |
module MODULE1 (
VAR1 ,
VAR5 ,
VAR4 ,
VAR11 ,
VAR14,
VAR10,
VAR3 ,
VAR7
);
output VAR1 ;
input VAR5 ;
input VAR4 ;
input VAR11 ;
input VAR14;
input VAR10;
input VAR3 ;
input VAR7 ;
wire VAR15 ;
wire VAR13;
VAR2 VAR12 (VAR15 , VAR5, VAR4, VAR11 );
VAR8 VAR6 (VAR13, VAR15, VAR14, VAR10);
buf VAR9 (VAR1 , VAR13 );
endmodule
|
apache-2.0
|
peteasa/oh
|
src/common/hdl/oh_par2ser.v
| 2,386 |
module MODULE1 #(parameter VAR9 = 64, parameter VAR17 = 1, parameter VAR11 = VAR4(VAR9/VAR17) )
(
input clk, input VAR8, input [VAR9-1:0] din, output [VAR17-1:0] dout, output VAR7, input VAR5, input VAR14, input [7:0] VAR13, input VAR16, input VAR6, input VAR10, output VAR15 );
reg [VAR9-1:0] VAR1;
reg [VAR11-1:0] VAR2;
wire VAR3;
wire VAR12;
assign VAR3 = VAR5 & ~VAR10 & ~VAR12;
always @ (posedge clk or negedge VAR8)
if(!VAR8)
VAR2[VAR11-1:0] <= 'b0;
else if(VAR3)
VAR2[VAR11-1:0] <= VAR13[VAR11-1:0]; else if(VAR14 & VAR12)
VAR2[VAR11-1:0] <= VAR2[VAR11-1:0] - 1'b1;
assign VAR12 = |VAR2[VAR11-1:0];
assign VAR7 = VAR12;
assign VAR15 = VAR10 | VAR12;
always @ (posedge clk)
if(VAR3)
VAR1[VAR9-1:0] = din[VAR9-1:0];
else if(VAR14 & VAR16)
VAR1[VAR9-1:0] = {{(VAR17){VAR6}}, VAR1[VAR9-1:VAR17]};
else if(VAR14)
VAR1[VAR9-1:0] = {VAR1[VAR9-VAR17-1:0],{(VAR17){VAR6}}};
assign dout[VAR17-1:0] = VAR16 ? VAR1[VAR17-1:0] :
VAR1[VAR9-1:VAR9-VAR17];
endmodule
|
mit
|
chimeh/stopwatch_verilog
|
src/clock_div.v
| 2,103 |
module MODULE1(input VAR8, input VAR4, output VAR9, output VAR11);
wire VAR10; wire VAR6;
assign VAR9 = VAR10;
assign VAR11 = VAR6;
MODULE3 MODULE1 (.clk(VAR8),
.VAR4(VAR4),
.VAR2(VAR10));
MODULE2 MODULE2(.clk(VAR8),
.VAR4(VAR4),
.VAR5(VAR6));
endmodule
module MODULE3(clk, VAR4, VAR2);
input clk;
input VAR4;
output VAR2;
reg VAR2;
reg [19:0] VAR3;
always @(negedge VAR4 or posedge clk)begin
if(~VAR4) VAR3 <= 0;
end
else if (VAR3 >= 50000) begin
VAR2 <= 0;
VAR3 <= 0; end
else if (VAR3 < 25000) begin
VAR2 <= 0;
VAR3 <= VAR3 + 1; end
else if ((VAR3 >= 25000) && (VAR3 < 50000)) begin
VAR2 <= 1;
VAR3 <= VAR3 + 1; end
end endmodule
module MODULE2(clk, VAR4, VAR5);
input clk;
input VAR4;
output VAR5;
reg VAR5;
reg [19:0] VAR3;
always @(negedge VAR4 or posedge clk)begin
if(~VAR4) VAR3 <= 0;
end
else if (VAR3 >= 500000) begin
VAR5 <= 0;
VAR3 <= 0; end
else if (VAR3 < 250000) begin
VAR5 <= 0;
VAR3 <= VAR3 + 1; end
else if ((VAR3 >= 250000) && (VAR3 < 500000)) begin
VAR5 <= 1;
VAR3 <= VAR3 + 1; end
end endmodule
|
unlicense
|
sergev/vak-opensource
|
hardware/basys3/abacus/divider.v
| 1,366 |
module MODULE1(
input [7:0] VAR1, input [7:0] VAR7, input clk,
output [7:0] VAR6, output [7:0] VAR5
);
integer VAR2;
reg [7:0] VAR8;
reg [7:0] VAR4;reg [7:0] VAR3;
always @(posedge clk) begin
VAR3 [7:0] = 8'b0; VAR4 [7:0] = VAR1[7:0];
for (VAR2=0;VAR2<=7;VAR2=VAR2+1) begin
VAR3 = VAR3<<1;VAR3[0] = VAR4[7];VAR4 = VAR4<<1;VAR4[0] = 1'b0;
if ( VAR3 >= VAR7) begin
VAR3 = VAR3-VAR7;
VAR4[0] = 1'b1;
end
end
end
assign VAR5 [7:0] = VAR3[7:0];
assign VAR6 [7:0] = VAR4[7:0];
endmodule
|
apache-2.0
|
google/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0
|
cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.behavioral.pp.v
| 18,950 |
module MODULE1( VAR37, VAR43, VAR194, VAR72, VAR100, VAR149, VAR220, VAR56 );
input VAR72, VAR194, VAR37, VAR100, VAR43;
inout VAR220, VAR56;
output VAR149;
reg VAR135;
VAR186 VAR271(.VAR37(VAR37),.VAR43(VAR43),.VAR194(VAR194),.VAR72(VAR72),.VAR100(VAR100),.VAR149(VAR149),.VAR220(VAR220),.VAR56(VAR56),.VAR135(VAR135));
VAR186 VAR64(.VAR37(VAR37),.VAR43(VAR43),.VAR194(VAR194),.VAR72(VAR72),.VAR100(VAR100),.VAR149(VAR149),.VAR220(VAR220),.VAR56(VAR56),.VAR135(VAR135));
not VAR164(VAR81,VAR194);
not VAR255(VAR79,VAR37);
and VAR53(VAR301,VAR79,VAR81);
and VAR157(VAR293,VAR100,VAR301);
not VAR240(VAR256,VAR43);
and VAR28(VAR147,VAR256,VAR293);
not VAR84(VAR274,VAR194);
not VAR107(VAR36,VAR37);
and VAR249(VAR112,VAR36,VAR274);
and VAR299(VAR195,VAR100,VAR112);
and VAR31(VAR57,VAR43,VAR195);
not VAR254(VAR283,VAR194);
and VAR33(VAR300,VAR37,VAR283);
and VAR129(VAR163,VAR100,VAR300);
not VAR90(VAR21,VAR43);
and VAR137(VAR87,VAR21,VAR163);
not VAR143(VAR39,VAR194);
and VAR191(VAR46,VAR37,VAR39);
and VAR67(VAR76,VAR100,VAR46);
and VAR83(VAR305,VAR43,VAR76);
not VAR290(VAR126,VAR37);
and VAR239(VAR243,VAR126,VAR194);
and VAR232(VAR122,VAR100,VAR243);
not VAR103(VAR303,VAR43);
and VAR167(VAR97,VAR303,VAR122);
not VAR251(VAR101,VAR37);
and VAR268(VAR242,VAR101,VAR194);
and VAR307(VAR35,VAR100,VAR242);
and VAR227(VAR102,VAR43,VAR35);
and VAR225(VAR154,VAR37,VAR194);
and VAR248(VAR20,VAR100,VAR154);
not VAR140(VAR294,VAR43);
and VAR288(VAR10,VAR294,VAR20);
and VAR49(VAR73,VAR37,VAR194);
and VAR214(VAR70,VAR100,VAR73);
and VAR206(VAR187,VAR43,VAR70);
not VAR289(VAR150,VAR37);
and VAR178(VAR208,VAR100,VAR150);
not VAR60(VAR42,VAR43);
and VAR264(VAR198,VAR42,VAR208);
not VAR199(VAR125,VAR37);
and VAR12(VAR217,VAR100,VAR125);
and VAR22(VAR2,VAR43,VAR217);
not VAR188(VAR221,VAR194);
and VAR292(VAR266,VAR100,VAR221);
and VAR109(VAR118,VAR43,VAR266);
and VAR286(VAR192,VAR100,VAR194);
not VAR17(VAR34,VAR43);
and VAR120(VAR269,VAR34,VAR192);
not VAR196(VAR75,VAR194);
not VAR58(VAR63,VAR37);
and VAR184(VAR93,VAR63,VAR75);
not VAR88(VAR302,VAR43);
and VAR104(VAR223,VAR302,VAR93);
not VAR212(VAR80,VAR194);
not VAR182(VAR1,VAR37);
and VAR25(VAR237,VAR1,VAR80);
and VAR124(VAR27,VAR43,VAR237);
not VAR69(VAR55,VAR194);
and VAR204(VAR159,VAR37,VAR55);
not VAR207(VAR312,VAR43);
and VAR231(VAR175,VAR312,VAR159);
and VAR9(VAR7,VAR37,VAR194);
not VAR267(VAR71,VAR43);
and VAR282(VAR213,VAR71,VAR7);
not VAR44(VAR54,VAR72);
not VAR284(VAR85,VAR194);
and VAR133(VAR200,VAR85,VAR54);
not VAR285(VAR209,VAR37);
and VAR3(VAR61,VAR209,VAR200);
not VAR162(VAR113,VAR43);
and VAR29(VAR235,VAR113,VAR61);
not VAR91(VAR117,VAR72);
not VAR173(VAR257,VAR194);
and VAR119(VAR216,VAR257,VAR117);
not VAR108(VAR296,VAR37);
and VAR183(VAR136,VAR296,VAR216);
and VAR18(VAR132,VAR43,VAR136);
not VAR197(VAR114,VAR72);
not VAR26(VAR261,VAR194);
and VAR226(VAR66,VAR261,VAR114);
and VAR116(VAR52,VAR37,VAR66);
not VAR181(VAR241,VAR43);
and VAR252(VAR176,VAR241,VAR52);
not VAR215(VAR177,VAR72);
not VAR158(VAR152,VAR194);
and VAR308(VAR179,VAR152,VAR177);
and VAR96(VAR287,VAR37,VAR179);
and VAR156(VAR250,VAR43,VAR287);
not VAR68(VAR309,VAR72);
and VAR291(VAR210,VAR194,VAR309);
not VAR138(VAR51,VAR37);
and VAR193(VAR180,VAR51,VAR210);
not VAR275(VAR30,VAR43);
and VAR94(VAR141,VAR30,VAR180);
not VAR238(VAR111,VAR72);
and VAR233(VAR13,VAR194,VAR111);
not VAR304(VAR131,VAR37);
and VAR165(VAR38,VAR131,VAR13);
and VAR310(VAR311,VAR43,VAR38);
not VAR92(VAR185,VAR72);
and VAR123(VAR144,VAR194,VAR185);
and VAR48(VAR247,VAR37,VAR144);
not VAR281(VAR202,VAR43);
and VAR23(VAR78,VAR202,VAR247);
not VAR40(VAR148,VAR72);
and VAR151(VAR65,VAR194,VAR148);
and VAR297(VAR205,VAR37,VAR65);
and VAR278(VAR127,VAR43,VAR205);
not VAR134(VAR16,VAR194);
and VAR219(VAR15,VAR16,VAR72);
not VAR224(VAR50,VAR37);
and VAR145(VAR260,VAR50,VAR15);
not VAR262(VAR234,VAR43);
and VAR110(VAR246,VAR234,VAR260);
not VAR153(VAR211,VAR194);
and VAR47(VAR89,VAR211,VAR72);
not VAR121(VAR276,VAR37);
and VAR189(VAR41,VAR276,VAR89);
and VAR115(VAR236,VAR43,VAR41);
not VAR172(VAR171,VAR194);
and VAR229(VAR86,VAR171,VAR72);
and VAR273(VAR59,VAR37,VAR86);
not VAR62(VAR201,VAR43);
and VAR139(VAR142,VAR201,VAR59);
not VAR5(VAR45,VAR194);
and VAR280(VAR95,VAR45,VAR72);
and VAR265(VAR4,VAR37,VAR95);
and VAR218(VAR160,VAR43,VAR4);
and VAR106(VAR161,VAR194,VAR72);
not VAR244(VAR166,VAR37);
and VAR259(VAR272,VAR166,VAR161);
not VAR174(VAR14,VAR43);
and VAR99(VAR228,VAR14,VAR272);
and VAR155(VAR169,VAR194,VAR72);
not VAR170(VAR77,VAR37);
and VAR277(VAR6,VAR77,VAR169);
and VAR168(VAR190,VAR43,VAR6);
and VAR19(VAR245,VAR194,VAR72);
and VAR128(VAR295,VAR37,VAR245);
not VAR298(VAR230,VAR43);
and VAR146(VAR279,VAR230,VAR295);
and VAR82(VAR8,VAR194,VAR72);
and VAR263(VAR306,VAR37,VAR8);
and VAR98(VAR24,VAR43,VAR306);
not VAR258(VAR130,VAR194);
and VAR253(VAR74,VAR37,VAR130);
and VAR105(VAR32,VAR100,VAR74);
and VAR11(VAR203,VAR37,VAR194);
and VAR270(VAR222,VAR100,VAR203);
|
apache-2.0
|
titorgalaxy/lzw
|
hw/src/StroppedMemory.v
| 9,306 |
module MODULE1(
VAR32,
VAR55,
VAR35,
VAR27,
VAR34,
VAR14,
reset,
clk
);
parameter VAR12 = VAR52; parameter VAR53 = VAR52; parameter VAR36 = VAR44;
output reg [VAR44-1:0] VAR32;
input [VAR44-1:0] VAR55;
input [VAR44+VAR13-1:0] VAR35; input [VAR37-1:0] VAR27; input VAR34; input VAR14;
input reset;
input clk;
reg [VAR44-1:0] VAR51; reg [VAR44-1:0] VAR58; reg [VAR37-1:0] VAR2;
wire [VAR44-1:0] VAR54;
reg [VAR44-1:0] VAR1;
reg [VAR44-1:0] VAR22;
reg [VAR37-1:0] VAR46;
reg VAR45;
reg VAR39;
wire [VAR44-1:0] VAR68;
reg [VAR44-1:0] VAR64;
reg [VAR44-1:0] VAR29;
reg [VAR37-1:0] VAR43;
reg VAR16;
reg VAR49;
reg [VAR44-1:0] VAR69; reg [VAR44-1:0] VAR9; reg [VAR37-1:0] VAR23;
wire [VAR44-1:0] VAR21;
reg [VAR44-1:0] VAR20;
reg [VAR44-1:0] VAR62;
reg [VAR37-1:0] VAR48;
reg VAR18;
reg VAR5;
wire [VAR44-1:0] VAR25;
reg [VAR44-1:0] VAR7;
reg [VAR44-1:0] VAR30;
reg [VAR37-1:0] VAR3;
reg VAR56;
reg VAR61;
reg [VAR37-1:0] VAR8;
reg [VAR44-1:0] VAR57;
reg [VAR37-1:0] VAR24;
reg [VAR44-1:0] VAR50;
reg [VAR37-1:0] VAR28;
reg [VAR44-1:0] VAR11;
wire [2*VAR44-1:0] VAR47; wire [VAR44-1:0] VAR59;
always @ begin
VAR32 <= {VAR59, 1'b1} & VAR47;
end
always @(posedge clk) begin
if(reset) begin
VAR11 <= 0;
VAR8 <= 0;
VAR57 <= 0; VAR50 <= 0;
VAR24 <= 0; VAR28 <= 0;
end
else begin
VAR11 <= (VAR35/VAR44)%2;
VAR8 <= (VAR35%VAR44);
VAR57 <= VAR35; VAR50 <= VAR35;
VAR24 <= VAR27; VAR28 <= VAR27;
end
end
VAR40 #(
.VAR19 (VAR12 ),
.VAR65 ((VAR65<=1) ? 0 : (VAR65-1) ), .VAR36 (VAR36 ),
.VAR17 (VAR17 )
)
VAR38 (
.VAR4 (VAR54 ),
.VAR60 (VAR1 ),
.VAR33 (VAR22 ),
.VAR42 (VAR17-1 ), .VAR67 (VAR45 ),
.VAR31 (VAR39 ),
.VAR66 (VAR21 ),
.VAR26 (VAR20 ),
.VAR41 (VAR62 ),
.VAR6 (VAR17-1 ), .VAR63 (VAR18 ),
.VAR10 (VAR5 ),
.clk (clk ),
.reset (reset )
);
VAR40 #(
.VAR19 (VAR53 ),
.VAR65 ((VAR65<=1) ? 0 : (VAR65-1) ), .VAR36 (VAR36 ),
.VAR17 (VAR17 )
)
VAR15 (
.VAR4 (VAR68 ),
.VAR60 (VAR64 ),
.VAR33 (VAR29 ),
.VAR42 (VAR17-1 ), .VAR67 (VAR16 ),
.VAR31 (VAR49 ),
.VAR66 (VAR25 ),
.VAR26 (VAR7 ),
.VAR41 (VAR30 ),
.VAR6 (VAR17-1 ), .VAR63 (VAR56 ),
.VAR10 (VAR61 ),
.clk (clk ),
.reset (reset )
);
endmodule
|
gpl-3.0
|
devinacker/sd2snes
|
verilog/sd2snes_cx4/cx4.v
| 27,294 |
module MODULE1(
input [7:0] VAR35,
output [7:0] VAR22,
input [12:0] VAR26,
input VAR27,
input VAR17,
input VAR28,
input VAR43,
input [7:0] VAR49,
output [23:0] VAR13,
output VAR30,
input VAR20,
output VAR45,
output [2:0] VAR21,
input VAR48
);
reg [2:0] VAR1;
parameter VAR12 = 2'b00;
parameter VAR54 = 2'b01;
parameter VAR41 = 2'b10;
assign VAR21 = VAR1;
wire VAR39 = VAR27 & (VAR26[11:0] < 12'hc00);
wire VAR37 = VAR27 & (VAR26[12:5] == 8'b11111010) & (VAR26[4:0] < 5'b10011);
wire VAR9 = VAR27 & (VAR26[12:5] == 8'b11111010) & (VAR26[4:0] >= 5'b10011);
wire VAR31 = (VAR27 & (VAR26[12:5] == 8'b11111011)) | (VAR45 & VAR17);
wire VAR4 = VAR27 & (&(VAR26[12:7]) && VAR26[5:4] != 2'b11);
wire VAR33 = VAR27 & (VAR26[12:5] == 8'b11110000);
wire [7:0] VAR5;
reg [7:0] VAR36;
wire [7:0] VAR16;
wire [7:0] VAR29;
wire [7:0] VAR50;
wire [7:0] VAR24;
assign VAR22 = VAR39 ? VAR5
: VAR37 ? VAR16
: VAR9 ? VAR29
: VAR31 ? VAR50
: VAR4 ? VAR24
: 8'h00;
reg [23:0] VAR42;
reg [15:0] VAR38;
reg [23:0] VAR23;
reg VAR8;
reg [23:0] VAR52;
reg [1:0] VAR14;
reg [14:0] VAR2;
reg [7:0] VAR7;
reg [7:0] VAR25;
reg VAR34;
reg VAR47;
assign VAR45 = |VAR1;
reg [7:0] VAR18 [31:0];
reg [7:0] VAR10 [47:0];
wire [47:0] VAR11;
reg [14:0] VAR53[1:0];
reg [23:0] const [15:0];
reg [14:0] VAR3 [1:0];
reg [1:0] VAR51;
reg [14:0] VAR44;
reg [14:0] VAR46;
reg VAR19;
reg VAR15;
reg VAR32;
reg [7:0] VAR40 [7:0];
reg [7:0] VAR6;
|
gpl-2.0
|
csturton/wirepatch
|
system/hardware/cores/or1200/or1200_freeze.v
| 6,703 |
module MODULE1
(
clk, rst,
VAR8, VAR16, VAR4, VAR32, VAR2, VAR26,
VAR18, VAR24, VAR12,
VAR15, VAR3,
VAR6, VAR9, VAR11, VAR25, VAR20, VAR13,
VAR14, VAR1,
VAR19, VAR28
);
input clk;
input rst;
input [VAR22-1:0] VAR8;
input [VAR31-1:0] VAR16;
input VAR4;
input VAR32;
input VAR2;
input VAR26;
input VAR18;
input VAR15;
input VAR3;
input VAR24;
input VAR12;
output VAR6;
output VAR9;
output VAR11;
output VAR25;
output VAR20;
input VAR13;
input VAR14;
input VAR1;
input VAR19;
input VAR28;
wire VAR5;
reg [VAR22-1:0] VAR17;
reg VAR23;
reg [VAR31-1:0] VAR27;
assign VAR6 = (VAR24 & !VAR13) | VAR23;
assign VAR9 = VAR11 | VAR32;
assign VAR11 = (VAR2 | (~VAR18 & VAR26) | VAR5
| (|VAR27) | VAR15) | VAR24;
assign VAR25 = VAR20;
assign VAR20 = (VAR2 | (~VAR18 & VAR26) | VAR5
| (|VAR27)) | VAR24 | VAR3;
always @(posedge clk or VAR29 rst)
if (rst == VAR30)
VAR23 <= 1'b0;
else if (VAR19 | VAR28)
VAR23 <= VAR4;
else if (!VAR4)
VAR23 <= 1'b0;
assign VAR5 = |VAR17;
always @(posedge clk or VAR29 rst)
if (rst == VAR30)
VAR17 <= VAR22'd0;
else if (|VAR17)
VAR17 <= VAR17 - VAR22'd1;
else if (|VAR8 & !VAR25)
VAR17 <= VAR8;
always @(posedge clk or VAR29 rst)
if (rst == VAR30)
VAR27 <= 0;
else if ((VAR27 == VAR10) & !VAR12)
VAR27 <= 0;
else if ((VAR27 == VAR21) & VAR14)
VAR27 <= 0;
else if ((VAR27 == VAR7) & VAR1)
VAR27 <= 0;
else if (!VAR25)
VAR27 <= VAR16;
endmodule
|
mit
|
CMU-SAFARI/NOCulator
|
hring/hw/buffered/src/c_max_sel.v
| 3,252 |
module MODULE1
(VAR5, VAR19);
parameter VAR1 = 32;
parameter VAR2 = 4;
input [0:VAR1*VAR2-1] VAR5;
output [0:VAR1-1] VAR19;
wire [0:VAR1-1] VAR19;
wire [0:VAR2*VAR1-1] VAR9
VAR14
.VAR18(VAR1))
VAR20
(.VAR17(VAR5),
.VAR3(VAR9));
wire [0:VAR2-1] VAR8;
VAR15
.VAR4(VAR2))
VAR24
(.VAR17(VAR9),
.VAR3(VAR8));
wire [0:VAR2-1] VAR13;
VAR22
.VAR4(VAR2))
VAR11
(.VAR17(VAR9),
.VAR3(VAR13));
wire [0:VAR2-1] VAR7;
assign VAR7 = VAR8 & VAR13;
wire [0:VAR2-1] VAR16;
VAR6
VAR10
(.req(VAR7),
.VAR12(VAR16));
VAR23
.VAR4(VAR1))
VAR21
(.select({VAR16, ~|VAR7}),
.VAR17({VAR9, {VAR1{1'b1}}}),
.VAR3(VAR19));
endmodule
|
mit
|
google/skywater-pdk-libs-sky130_fd_sc_hdll
|
cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.v
| 2,135 |
module MODULE2 (
VAR7 ,
VAR1 ,
VAR4,
VAR8,
VAR2 ,
VAR5
);
output VAR7 ;
input VAR1 ;
input VAR4;
input VAR8;
input VAR2 ;
input VAR5 ;
VAR3 VAR6 (
.VAR7(VAR7),
.VAR1(VAR1),
.VAR4(VAR4),
.VAR8(VAR8),
.VAR2(VAR2),
.VAR5(VAR5)
);
endmodule
module MODULE2 (
VAR7,
VAR1
);
output VAR7;
input VAR1;
supply1 VAR4;
supply0 VAR8;
supply1 VAR2 ;
supply0 VAR5 ;
VAR3 VAR6 (
.VAR7(VAR7),
.VAR1(VAR1)
);
endmodule
|
apache-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_hd
|
cells/or3b/sky130_fd_sc_hd__or3b.behavioral.pp.v
| 1,951 |
module MODULE1 (
VAR13 ,
VAR10 ,
VAR8 ,
VAR15 ,
VAR2,
VAR7,
VAR16 ,
VAR5
);
output VAR13 ;
input VAR10 ;
input VAR8 ;
input VAR15 ;
input VAR2;
input VAR7;
input VAR16 ;
input VAR5 ;
wire VAR9 ;
wire VAR3 ;
wire VAR11;
not VAR12 (VAR9 , VAR15 );
or VAR4 (VAR3 , VAR8, VAR10, VAR9 );
VAR14 VAR6 (VAR11, VAR3, VAR2, VAR7);
buf VAR1 (VAR13 , VAR11 );
endmodule
|
apache-2.0
|
sh-chris110/chris
|
FPGA/chris.system.dma.ok/Qsys/soc_design/synthesis/submodules/soc_design_dma.v
| 32,931 |
module MODULE1 (
VAR63,
clk,
VAR4,
VAR20,
VAR75,
VAR108,
VAR50,
VAR81,
VAR88,
VAR99,
VAR76,
VAR25,
VAR57,
VAR21
)
;
output [ 15: 0] VAR21;
input VAR63;
input clk;
input VAR4;
input [ 2: 0] VAR20;
input VAR75;
input VAR108;
input [ 25: 0] VAR50;
input VAR81;
input [ 15: 0] VAR88;
input VAR99;
input [ 25: 0] VAR76;
input [ 4: 0] VAR25;
input VAR57;
wire VAR33;
wire [ 15: 0] VAR21;
wire VAR98;
wire VAR71;
reg VAR24;
assign VAR33 = VAR75 & ~VAR108 & ((VAR20 == 6) || (VAR20 == 7));
assign VAR98 = VAR75 & ~VAR108 & (VAR20 == 3);
assign VAR71 = ((VAR33 && VAR50[3] || VAR98))? VAR76[1 : 0] :
(VAR99)? (VAR24 + VAR25) :
VAR24;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR24 <= 0;
end
else if (VAR4)
VAR24 <= VAR71;
end
assign VAR21[15 : 8] = VAR88[15 : 8];
assign VAR21[7 : 0] = ({8 {(VAR63 & (VAR24 == 0))}} & VAR88[7 : 0]) |
({8 {(VAR63 & (VAR24 == 1))}} & VAR88[15 : 8]) |
({8 {VAR81}} & VAR88[7 : 0]);
endmodule
module MODULE6 (
VAR63,
VAR81,
VAR56,
VAR114
)
;
output [ 1: 0] VAR114;
input VAR63;
input VAR81;
input [ 25: 0] VAR56;
wire VAR48;
wire VAR44;
wire [ 1: 0] VAR114;
assign VAR44 = VAR56[0] == 1'h1;
assign VAR48 = VAR56[0] == 1'h0;
assign VAR114 = ({2 {VAR63}} & {VAR44, VAR48}) |
({2 {VAR81}} & 2'b11);
endmodule
module MODULE5 (
clk,
VAR86,
VAR47,
VAR105,
VAR57,
VAR45,
VAR53,
VAR96,
VAR69
)
;
output [ 15: 0] VAR69;
input clk;
input [ 15: 0] VAR86;
input [ 4: 0] VAR47;
input VAR105;
input VAR57;
input [ 4: 0] VAR45;
input VAR53;
input VAR96;
reg [ 15: 0] VAR126 [ 31: 0];
wire [ 15: 0] VAR69;
reg [ 4: 0] VAR76;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR76 <= 0;
end
else if (VAR105)
VAR76 <= VAR47;
end
assign VAR69 = VAR126[VAR76];
always @(posedge VAR53)
begin
if (VAR96)
VAR126[VAR45] <= VAR86;
end
endmodule
module MODULE3 (
clk,
VAR4,
VAR85,
VAR21,
VAR83,
VAR9,
VAR13,
VAR57,
VAR52,
VAR55,
VAR30,
VAR42
)
;
output VAR52;
output VAR55;
output [ 15: 0] VAR30;
output VAR42;
input clk;
input VAR4;
input VAR85;
input [ 15: 0] VAR21;
input VAR83;
input VAR9;
input VAR13;
input VAR57;
wire [ 4: 0] VAR74;
reg [ 4: 0] VAR122;
wire VAR52;
wire VAR29;
reg VAR55;
reg VAR117;
wire VAR46;
wire [ 15: 0] VAR37;
wire [ 15: 0] VAR30;
reg VAR123;
reg [ 15: 0] VAR43;
wire [ 4: 0] VAR84;
wire VAR78;
wire VAR42;
wire [ 4: 0] VAR125;
wire [ 4: 0] VAR47;
reg [ 4: 0] VAR1;
reg [ 4: 0] VAR45;
wire VAR72;
assign VAR125 = (VAR83)? VAR45 - 1 :
VAR45;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR45 <= 0;
end
else if (VAR4)
if (VAR9)
VAR45 <= 0;
else
VAR45 <= VAR125;
end
assign VAR47 = VAR9 ? 0 : VAR85 ? (VAR1 - 1) : VAR1;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR1 <= 0;
end
else
VAR1 <= VAR47;
end
assign VAR52 = ~VAR55;
assign VAR46 = VAR83 & ~VAR85;
assign VAR29 = VAR85 & ~VAR83;
assign VAR74 = VAR1 - 1;
assign VAR84 = (VAR13)? VAR122 - 1 :
VAR122;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR122 <= {5 {1'b1}};
end
else if (VAR4)
if (VAR9)
VAR122 <= {5 {1'b1}};
else
VAR122 <= VAR84;
end
assign VAR78 = VAR9 | ((~VAR46 & VAR55) | (VAR29 & (VAR45 == VAR74)));
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR55 <= 1;
end
else if (VAR4)
VAR55 <= VAR78;
end
assign VAR42 = ~VAR9 & ((~VAR29 & VAR117) | (VAR13 & (VAR122 == VAR47)));
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR117 <= 0;
end
else if (VAR4)
VAR117 <= VAR42;
end
assign VAR72 = VAR83 && (VAR45 == VAR47);
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR43 <= 0;
end
else if (VAR72)
VAR43 <= VAR21;
end
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR123 <= 0;
end
else if (VAR72)
VAR123 <= -1;
else if (VAR85)
VAR123 <= 0;
end
assign VAR30 = VAR123 ? VAR43 : VAR37;
MODULE5 MODULE6
(
.clk (clk),
.VAR86 (VAR21),
.VAR69 (VAR37),
.VAR47 (VAR47),
.VAR105 (1'b1),
.VAR57 (VAR57),
.VAR45 (VAR45),
.VAR53 (clk),
.VAR96 (VAR83)
);
endmodule
module MODULE7 (
clk,
VAR4,
VAR93,
VAR18,
VAR42,
VAR17,
VAR57,
VAR38,
VAR36
)
;
output VAR38;
output VAR36;
input clk;
input VAR4;
input VAR93;
input VAR18;
input VAR42;
input VAR17;
input VAR57;
wire VAR38;
wire VAR36;
wire VAR111;
reg VAR12;
reg VAR58;
reg VAR65;
assign VAR36 = ~VAR12;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR12 <= 0;
end
else if (VAR4)
VAR12 <= VAR111;
end
assign VAR38 = VAR12 & ~VAR17;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR65 <= 1;
end
else if (VAR4)
VAR65 <= ((VAR65 == 1) & (VAR93 == 0)) |
((VAR65 == 1) & (VAR18 == 1)) |
((VAR65 == 1) & (VAR42 == 1)) |
((VAR58 == 1) & (VAR42 == 1) & (VAR17 == 0)) |
((VAR58 == 1) & (VAR18 == 1) & (VAR17 == 0));
end
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR58 <= 0;
end
else if (VAR4)
VAR58 <= ((VAR65 == 1) & (VAR42 == 0) & (VAR18 == 0) & (VAR93 == 1)) |
((VAR58 == 1) & (VAR17 == 1)) |
((VAR58 == 1) & (VAR42 == 0) & (VAR18 == 0) & (VAR17 == 0));
end
assign VAR111 = ({1 {((VAR58 && (VAR17 == 1)))}} & 1) |
({1 {((VAR58 && (VAR18 == 0) && (VAR42 == 0) && (VAR17 == 0)))}} & 1) |
({1 {((VAR65 && (VAR93 == 1) && (VAR18 == 0) && (VAR42 == 0)))}} & 1);
endmodule
module MODULE2 (
VAR62,
VAR52,
VAR7,
VAR85,
VAR35,
VAR41,
VAR67
)
;
output VAR85;
output VAR35;
output VAR41;
output VAR67;
input VAR62;
input VAR52;
input VAR7;
wire VAR85;
wire VAR35;
wire VAR41;
wire VAR67;
assign VAR67 = VAR52 & ~VAR62;
assign VAR41 = ~VAR67;
assign VAR85 = VAR67 & ~VAR7;
assign VAR35 = VAR85;
endmodule
module MODULE4 (
clk,
VAR20,
VAR75,
VAR108,
VAR50,
VAR88,
VAR99,
VAR17,
VAR28,
VAR7,
VAR82,
VAR91,
VAR76,
VAR16,
VAR34,
VAR56,
VAR114,
VAR27,
VAR11,
VAR73
)
;
output VAR82;
output [ 25: 0] VAR91;
output [ 25: 0] VAR76;
output VAR16;
output VAR34;
output [ 25: 0] VAR56;
output [ 1: 0] VAR114;
output VAR27;
output VAR11;
output [ 15: 0] VAR73;
input clk;
input [ 2: 0] VAR20;
input VAR75;
input VAR108;
input [ 25: 0] VAR50;
input [ 15: 0] VAR88;
input VAR99;
input VAR17;
input VAR28;
input VAR7;
wire VAR51;
wire VAR63;
wire VAR4;
reg [ 12: 0] VAR94;
reg VAR19;
reg VAR62;
reg VAR115;
reg VAR87;
wire VAR82;
reg [ 25: 0] VAR91;
reg VAR8;
wire VAR77;
reg VAR5;
wire VAR110;
wire VAR23;
wire VAR52;
wire VAR55;
wire [ 15: 0] VAR30;
wire [ 15: 0] VAR61;
wire [ 15: 0] VAR59;
wire VAR85;
wire [ 15: 0] VAR21;
wire VAR83;
wire VAR80;
wire VAR9;
wire VAR93;
wire VAR81;
wire VAR95;
wire VAR38;
wire VAR35;
wire VAR15;
reg VAR112;
reg [ 25: 0] VAR79;
reg VAR118;
wire VAR36;
wire VAR41;
wire [ 12: 0] VAR10;
wire [ 25: 0] VAR14;
wire VAR18;
wire VAR32;
wire VAR42;
wire [ 25: 0] VAR26;
wire VAR120;
wire VAR49;
wire [ 25: 0] VAR68;
wire VAR89;
wire [ 25: 0] VAR64;
wire [ 25: 0] VAR66;
wire VAR31;
wire VAR101;
wire VAR113;
wire [ 25: 0] VAR76;
wire VAR16;
wire VAR6;
reg VAR92;
wire VAR34;
reg [ 25: 0] VAR76;
wire [ 4: 0] VAR25;
wire VAR60;
reg VAR40;
reg VAR57;
wire VAR109;
reg VAR2;
wire VAR119;
wire [ 4: 0] VAR97;
wire VAR116;
wire VAR70;
wire VAR104;
reg VAR106;
wire word;
wire [ 25: 0] VAR56;
wire [ 1: 0] VAR114;
wire VAR27;
wire VAR90;
reg VAR100;
wire VAR67;
wire VAR11;
wire [ 15: 0] VAR73;
reg [ 25: 0] VAR56;
wire [ 4: 0] VAR103;
reg [ 25: 0] VAR39;
reg VAR22;
assign VAR4 = 1;
MODULE1 MODULE5
(
.VAR63 (VAR63),
.clk (clk),
.VAR4 (VAR4),
.VAR20 (VAR20),
.VAR75 (VAR75),
.VAR108 (VAR108),
.VAR50 (VAR50),
.VAR21 (VAR21),
.VAR81 (VAR81),
.VAR88 (VAR88),
.VAR99 (VAR99),
.VAR76 (VAR76),
.VAR25 (VAR25),
.VAR57 (VAR57)
);
MODULE6 MODULE2
(
.VAR63 (VAR63),
.VAR81 (VAR81),
.VAR56 (VAR56),
.VAR114 (VAR114)
);
assign VAR34 = VAR36;
assign VAR116 = VAR75 & ~VAR108 & (VAR20 == 0);
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR76 <= 26'h0;
end
else if (VAR4)
VAR76 <= VAR68;
end
assign VAR68 = ((VAR75 & ~VAR108 & (VAR20 == 1)))? VAR50 :
(VAR38)? (VAR76 + VAR25) :
VAR76;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR56 <= 26'h0;
end
else if (VAR4)
VAR56 <= VAR64;
end
assign VAR64 = ((VAR75 & ~VAR108 & (VAR20 == 2)))? VAR50 :
(VAR35)? (VAR56 + VAR103) :
VAR56;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR79 <= 26'h0;
end
else if (VAR4)
VAR79 <= VAR26;
end
assign VAR26 = ((VAR75 & ~VAR108 & (VAR20 == 3)))? VAR50 :
((VAR38 && (!VAR118)))? VAR79 - {1'b0,
1'b0,
1'b0,
VAR81,
VAR63} :
VAR79;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR94 <= 13'h84;
end
else if (VAR4)
VAR94 <= VAR10;
end
assign VAR10 = ((VAR75 & ~VAR108 & ((VAR20 == 6) || (VAR20 == 7))))? VAR50 :
VAR94;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR39 <= 26'h0;
end
else if (VAR4)
VAR39 <= VAR66;
end
assign VAR66 = ((VAR75 & ~VAR108 & (VAR20 == 3)))? VAR50 :
((VAR35 && (!VAR22)))? VAR39 - {1'b0,
1'b0,
1'b0,
VAR81,
VAR63} :
VAR39;
assign VAR31 = VAR35 && (!VAR22) && ((VAR39 - {1'b0,
1'b0,
1'b0,
VAR81,
VAR63}) == 0);
assign VAR120 = VAR38 && (!VAR118) && ((VAR79 - {1'b0,
1'b0,
1'b0,
VAR81,
VAR63}) == 0);
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR118 <= 1;
end
else if (VAR4)
if (VAR75 & ~VAR108 & (VAR20 == 3))
VAR118 <= 0;
else if (VAR120)
VAR118 <= -1;
end
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR22 <= 1;
end
else if (VAR4)
if (VAR75 & ~VAR108 & (VAR20 == 3))
VAR22 <= 0;
else if (VAR31)
VAR22 <= -1;
end
assign VAR103 = (VAR70)? 0 :
{1'b0,
1'b0,
1'b0,
VAR81,
VAR63};
assign VAR25 = (VAR113)? 0 :
{1'b0,
1'b0,
1'b0,
VAR81,
VAR63};
assign VAR14 = ({26 {(VAR20 == 0)}} & VAR97) |
({26 {(VAR20 == 1)}} & VAR76) |
({26 {(VAR20 == 2)}} & VAR56) |
({26 {(VAR20 == 3)}} & VAR39) |
({26 {(VAR20 == 6)}} & VAR94);
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR91 <= 0;
end
else if (VAR4)
VAR91 <= VAR14;
end
assign VAR77 = VAR93 & VAR5;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR8 <= 0;
end
else if (VAR4)
if (VAR116)
VAR8 <= 0;
else if (VAR77 & ~VAR19)
VAR8 <= -1;
end
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR19 <= 0;
end
else if (VAR4)
VAR19 <= VAR77;
end
assign VAR51 = VAR93 & ~VAR5;
assign VAR97[0] = VAR8;
assign VAR97[1] = VAR51;
assign VAR97[2] = VAR40;
assign VAR97[3] = VAR106;
assign VAR97[4] = VAR112;
assign VAR63 = VAR94[0];
assign VAR81 = VAR94[1];
assign word = VAR94[2];
assign VAR93 = VAR94[3];
assign VAR95 = VAR94[4];
assign VAR60 = VAR94[5];
assign VAR104 = VAR94[6];
assign VAR15 = VAR94[7];
assign VAR113 = VAR94[8];
assign VAR70 = VAR94[9];
assign VAR110 = VAR94[10];
assign VAR101 = VAR94[11];
assign VAR119 = VAR94[12];
assign VAR82 = VAR95 & VAR8;
assign VAR49 = ~VAR116 && (VAR92 || (VAR6 & VAR60));
assign VAR89 = ~VAR116 && (VAR100 || (VAR35 & VAR90 & VAR104));
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR92 <= 0;
end
else if (VAR4)
VAR92 <= VAR49;
end
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR100 <= 0;
end
else if (VAR4)
VAR100 <= VAR89;
end
assign VAR9 = ~VAR19 & VAR77;
MODULE3 MODULE1
(
.clk (clk),
.VAR4 (VAR4),
.VAR52 (VAR52),
.VAR55 (VAR55),
.VAR30 (VAR30),
.VAR85 (VAR85),
.VAR21 (VAR21),
.VAR83 (VAR83),
.VAR9 (VAR9),
.VAR13 (VAR38),
.VAR42 (VAR42),
.VAR57 (VAR57)
);
MODULE7 MODULE4
(
.clk (clk),
.VAR4 (VAR4),
.VAR93 (VAR93),
.VAR38 (VAR38),
.VAR36 (VAR36),
.VAR18 (VAR18),
.VAR42 (VAR42),
.VAR17 (VAR17),
.VAR57 (VAR57)
);
assign VAR83 = VAR80;
assign VAR23 = VAR90 & VAR104;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR62 <= 0;
end
else if (VAR4)
VAR62 <= VAR23;
end
MODULE2 MODULE3
(
.VAR62 (VAR62),
.VAR52 (VAR52),
.VAR85 (VAR85),
.VAR35 (VAR35),
.VAR41 (VAR41),
.VAR67 (VAR67),
.VAR7 (VAR7)
);
assign VAR18 = (VAR15 && (VAR120 || (VAR118))) | VAR49 | VAR32;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR112 <= 0;
end
else if (VAR4)
if (VAR116)
VAR112 <= 0;
else if (~VAR19 & VAR77 && (VAR22))
VAR112 <= -1;
end
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR40 <= 0;
end
else if (VAR4)
if (VAR116)
VAR40 <= 0;
else if (VAR55 & VAR92 & VAR115)
VAR40 <= -1;
end
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR106 <= 0;
end
else if (VAR4)
if (VAR116)
VAR106 <= 0;
else if (VAR100)
VAR106 <= -1;
end
assign VAR32 = (VAR15 && (VAR31 || VAR22)) | VAR89 | VAR55 & VAR115;
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR115 <= 0;
end
else if (VAR4)
VAR115 <= VAR92;
end
always @(posedge clk or negedge VAR57)
begin
if (VAR57 == 0)
VAR5 <= 0;
end
else if (VAR4)
VAR5 <= VAR32;
end
assign VAR76 = VAR76;
assign VAR56 = VAR56;
assign VAR27 = VAR67;
assign VAR16 = ~VAR34;
assign VAR11 = VAR41;
assign VAR61 = {VAR30[7 : 0],
VAR30[7 : 0]};
assign VAR59 = VAR30[15 : 0];
assign VAR73 = ({16 {VAR63}} & VAR61) |
({16 {VAR81}} & VAR59);
assign VAR80 = VAR99;
assign VAR109 = ((VAR75 & ~VAR108 & ((VAR20 == 6) || (VAR20 == 7)))) & (VAR20 != 7) & VAR50[12];
always @(posedge clk or negedge VAR28)
begin
if (VAR28 == 0)
VAR87 <= 0;
end
else if (VAR109 | VAR2)
VAR87 <= VAR119 & ~VAR2;
end
always @(posedge clk or negedge VAR28)
begin
if (VAR28 == 0)
VAR2 <= 0;
end
else if (VAR109 | VAR2)
VAR2 <= VAR87 & ~VAR2;
end
always @(posedge clk or negedge VAR28)
begin
if (VAR28 == 0)
VAR57 <= 0;
end
else
VAR57 <= ~(~VAR28 | VAR2);
end
assign VAR6 = 0;
assign VAR90 = 0;
endmodule
|
gpl-2.0
|
chipsalliance/yosys-f4pga-plugins
|
ql-qlf-plugin/qlf_k6n10f/dsp_map.v
| 4,730 |
module \VAR7 (input [19:0] VAR2, input [17:0] VAR20, output [37:0] VAR17);
parameter VAR32 = 0;
parameter VAR22 = 0;
parameter VAR34 = 0;
parameter VAR1 = 0;
parameter VAR37 = 0;
wire [19:0] VAR12;
wire [17:0] VAR24;
wire [37:0] VAR16;
assign VAR12 = (VAR34 == 20) ? VAR2 :
(VAR32) ? {{(20 - VAR34){VAR2[VAR34-1]}}, VAR2} :
{{(20 - VAR34){1'b0}}, VAR2};
assign VAR24 = (VAR1 == 18) ? VAR20 :
(VAR22) ? {{(18 - VAR1){VAR20[VAR1-1]}}, VAR20} :
{{(18 - VAR1){1'b0}}, VAR20};
generate if (VAR19 == 0) begin
VAR38 VAR27 (
.VAR6 (VAR12),
.VAR5 (VAR24),
.VAR11 (6'd0),
.VAR13 (VAR16),
.VAR10 (3'd0),
.VAR36 (1'b0),
.VAR4 (!VAR32),
.VAR21 (!VAR22),
.VAR8 (3'd0),
.VAR25 (1'b0),
.VAR26 (6'd0),
.VAR29 (1'b0),
.VAR30 (1'b0),
.VAR15 (1'b0)
);
end else begin
VAR35 #(
.VAR31 (3'd0),
.VAR18 (1'b0),
.VAR9 (6'd0),
.VAR14 (1'b0),
.VAR23 (1'b0)
) VAR27 (
.VAR6 (VAR12),
.VAR5 (VAR24),
.VAR11 (6'd0),
.VAR13 (VAR16),
.VAR10 (3'd0),
.VAR36 (1'b0),
.VAR4 (!VAR32),
.VAR21 (!VAR22),
.VAR30 (1'b0)
);
end endgenerate
assign VAR17 = VAR16;
endmodule
module \VAR3 (input [9:0] VAR2, input [8:0] VAR20, output [18:0] VAR17);
parameter VAR32 = 0;
parameter VAR22 = 0;
parameter VAR34 = 0;
parameter VAR1 = 0;
parameter VAR37 = 0;
wire [ 9:0] VAR12;
wire [ 8:0] VAR24;
wire [18:0] VAR16;
assign VAR12 = (VAR34 == 10) ? VAR2 :
(VAR32) ? {{(10 - VAR34){VAR2[VAR34-1]}}, VAR2} :
{{(10 - VAR34){1'b0}}, VAR2};
assign VAR24 = (VAR1 == 9) ? VAR20 :
(VAR22) ? {{( 9 - VAR1){VAR20[VAR1-1]}}, VAR20} :
{{( 9 - VAR1){1'b0}}, VAR20};
generate if (VAR19 == 0) begin
VAR28 VAR27 (
.VAR6 (VAR12),
.VAR5 (VAR24),
.VAR11 (6'd0),
.VAR13 (VAR16),
.VAR10 (3'd0),
.VAR36 (1'b0),
.VAR4 (!VAR32),
.VAR21 (!VAR22),
.VAR8 (3'd0),
.VAR25 (1'b0),
.VAR26 (6'd0),
.VAR29 (1'b0),
.VAR30 (1'b0),
.VAR15 (1'b0)
);
end else begin
VAR33 #(
.VAR31 (3'd0),
.VAR18 (1'b0),
.VAR9 (6'd0),
.VAR14 (1'b0),
.VAR23 (1'b0)
) VAR27 (
.VAR6 (VAR12),
.VAR5 (VAR24),
.VAR11 (6'd0),
.VAR13 (VAR16),
.VAR10 (3'd0),
.VAR36 (1'b0),
.VAR4 (!VAR32),
.VAR21 (!VAR22),
.VAR30 (1'b0)
);
end endgenerate
assign VAR17 = VAR16;
endmodule
|
apache-2.0
|
ShepardSiegel/ocpi
|
coregen/ddr3_s4_uniphy/ddr3_s4_uniphy/alt_mem_ddrx_ecc_decoder_64_syn.v
| 58,593 |
module MODULE2
(
VAR121,
VAR165) ;
input [6:0] VAR121;
output [127:0] VAR165;
tri0 [6:0] VAR121;
wire [5:0] VAR61;
wire VAR169;
wire VAR250;
wire [127:0] VAR202;
wire [63:0] VAR129;
wire [63:0] VAR145;
wire [3:0] VAR155;
wire [3:0] VAR150;
wire [3:0] VAR181;
wire [3:0] VAR133;
wire [3:0] VAR157;
wire [3:0] VAR184;
wire [3:0] VAR106;
wire [3:0] VAR79;
wire [3:0] VAR92;
wire [3:0] VAR229;
wire [3:0] VAR24;
wire [3:0] VAR118;
wire [3:0] VAR98;
wire [3:0] VAR198;
wire [3:0] VAR144;
wire [3:0] VAR95;
wire [3:0] VAR7;
wire [3:0] VAR97;
wire [3:0] VAR158;
wire [3:0] VAR228;
wire [3:0] VAR16;
wire [3:0] VAR175;
wire [3:0] VAR217;
wire [3:0] VAR182;
wire [3:0] VAR75;
wire [3:0] VAR224;
wire [3:0] VAR149;
wire [3:0] VAR209;
wire [3:0] VAR103;
wire [3:0] VAR64;
wire [3:0] VAR42;
wire [3:0] VAR46;
wire [3:0] VAR194;
wire [3:0] VAR186;
wire [3:0] VAR248;
wire [3:0] VAR170;
wire [3:0] VAR66;
wire [3:0] VAR50;
wire [3:0] VAR86;
wire [3:0] VAR62;
wire [3:0] VAR222;
wire [3:0] VAR151;
wire [3:0] VAR60;
wire [3:0] VAR122;
wire [3:0] VAR178;
wire [3:0] VAR160;
wire [3:0] VAR72;
wire [3:0] VAR199;
wire [3:0] VAR105;
wire [3:0] VAR203;
wire [3:0] VAR73;
wire [3:0] VAR241;
wire [3:0] VAR57;
wire [3:0] VAR243;
wire [3:0] VAR211;
wire [3:0] VAR108;
wire [3:0] VAR74;
wire [3:0] VAR223;
wire [3:0] VAR231;
wire [3:0] VAR6;
wire [3:0] VAR116;
wire [3:0] VAR27;
wire [3:0] VAR130;
wire [3:0] VAR173;
wire [3:0] VAR120;
wire [3:0] VAR195;
wire [3:0] VAR8;
wire [3:0] VAR22;
wire [3:0] VAR69;
wire [3:0] VAR81;
wire [3:0] VAR204;
wire [3:0] VAR206;
wire [3:0] VAR236;
wire [3:0] VAR112;
wire [3:0] VAR35;
wire [3:0] VAR55;
wire [3:0] VAR85;
wire [3:0] VAR47;
wire [3:0] VAR2;
wire [3:0] VAR111;
wire [3:0] VAR247;
wire [3:0] VAR180;
wire [3:0] VAR167;
wire [3:0] VAR67;
wire [3:0] VAR48;
wire [3:0] VAR128;
wire [3:0] VAR58;
wire [3:0] VAR11;
wire [3:0] VAR196;
wire [3:0] VAR39;
wire [3:0] VAR140;
wire [3:0] VAR102;
wire [3:0] VAR34;
wire [3:0] VAR107;
wire [3:0] VAR134;
wire [3:0] VAR28;
wire [3:0] VAR214;
wire [3:0] VAR87;
wire [3:0] VAR174;
wire [3:0] VAR44;
wire [3:0] VAR100;
wire [3:0] VAR238;
wire [3:0] VAR117;
wire [3:0] VAR43;
wire [3:0] VAR123;
wire [3:0] VAR101;
wire [3:0] VAR232;
wire [3:0] VAR76;
wire [3:0] VAR164;
wire [3:0] VAR148;
wire [3:0] VAR32;
wire [3:0] VAR172;
wire [3:0] VAR13;
wire [3:0] VAR205;
wire [3:0] VAR20;
wire [3:0] VAR177;
wire [3:0] VAR49;
wire [3:0] VAR176;
wire [3:0] VAR21;
wire [3:0] VAR235;
wire [3:0] VAR89;
wire [3:0] VAR191;
wire [3:0] VAR154;
wire [3:0] VAR10;
wire [3:0] VAR146;
wire [3:0] VAR185;
wire [3:0] VAR59;
wire [3:0] VAR15;
wire [3:0] VAR36;
wire [3:0] VAR136;
wire [3:0] VAR109;
wire [3:0] VAR208;
wire [3:0] VAR31;
wire [3:0] VAR166;
wire [3:0] VAR91;
wire [3:0] VAR12;
wire [3:0] VAR45;
wire [3:0] VAR197;
wire [3:0] VAR126;
wire [3:0] VAR141;
wire [3:0] VAR207;
wire [3:0] VAR221;
wire [3:0] VAR190;
wire [3:0] VAR227;
wire [2:0] VAR52;
wire [2:0] VAR230;
assign
VAR61 = VAR121[5:0],
VAR169 = (~ VAR121[6]),
VAR250 = VAR121[6],
VAR165 = VAR202,
VAR202 = {VAR145[63:0], VAR129},
VAR129 = {{VAR173[3], VAR130[3], VAR27[3], VAR116[3], VAR6[3], VAR231[3], VAR223[3], VAR74[3]}, {VAR211[3], VAR243[3], VAR57[3], VAR241[3], VAR73[3], VAR203[3], VAR105[3], VAR199[3]}, {VAR160[3], VAR178[3], VAR122[3], VAR60[3], VAR151[3], VAR222[3], VAR62[3], VAR86[3]}, {VAR66[3], VAR170[3], VAR248[3], VAR186[3], VAR194[3], VAR46[3], VAR42[3], VAR64[3]}, {VAR209[3], VAR149[3], VAR224[3], VAR75[3], VAR182[3], VAR217[3], VAR175[3], VAR16[3]}, {VAR158[3], VAR97[3], VAR7[3], VAR95[3], VAR144[3], VAR198[3], VAR98[3], VAR118[3]}, {VAR229[3], VAR92[3], VAR79[3], VAR106[3], VAR184[3], VAR157[3], VAR133[3], VAR181[3]}, {VAR155[3], VAR227[3], VAR190[3], VAR221[3], VAR207[3], VAR141[3], VAR126[3], VAR197[3]}},
VAR145 = {{VAR12[3], VAR91[3], VAR166[3], VAR31[3], VAR208[3], VAR109[3], VAR136[3], VAR36[3]}, {VAR59[3], VAR185[3], VAR146[3], VAR10[3], VAR154[3], VAR191[3], VAR89[3], VAR235[3]}, {VAR176[3], VAR49[3], VAR177[3], VAR20[3], VAR205[3], VAR13[3], VAR172[3], VAR32[3]}, {VAR164[3], VAR76[3], VAR232[3], VAR101[3], VAR123[3], VAR43[3], VAR117[3], VAR238[3]}, {VAR44[3], VAR174[3], VAR87[3], VAR214[3], VAR28[3], VAR134[3], VAR107[3], VAR34[3]}, {VAR140[3], VAR39[3], VAR196[3], VAR11[3], VAR58[3], VAR128[3], VAR48[3], VAR67[3]}, {VAR180[3], VAR247[3], VAR111[3], VAR2[3], VAR47[3], VAR85[3], VAR55[3], VAR35[3]}, {VAR236[3], VAR206[3], VAR204[3], VAR81[3], VAR69[3], VAR22[3], VAR8[3], VAR195[3]}},
VAR155 = {(VAR155[2] & VAR230[2]), (VAR155[1] & VAR230[1]), (VAR155[0] & VAR230[0]), VAR45[3]},
VAR150 = {(VAR150[2] & (~ VAR61[5])), (VAR150[1] & (~ VAR61[4])), (VAR150[0] & VAR61[3]), VAR169},
VAR181 = {(VAR181[2] & (~ VAR230[2])), (VAR181[1] & (~ VAR230[1])), (VAR181[0] & (~ VAR230[0])), VAR150[3]},
VAR133 = {(VAR133[2] & (~ VAR230[2])), (VAR133[1] & (~ VAR230[1])), (VAR133[0] & VAR230[0]), VAR150[3]},
VAR157 = {(VAR157[2] & (~ VAR230[2])), (VAR157[1] & VAR230[1]), (VAR157[0] & (~ VAR230[0])), VAR150[3]},
VAR184 = {(VAR184[2] & (~ VAR230[2])), (VAR184[1] & VAR230[1]), (VAR184[0] & VAR230[0]), VAR150[3]},
VAR106 = {(VAR106[2] & VAR230[2]), (VAR106[1] & (~ VAR230[1])), (VAR106[0] & (~ VAR230[0])), VAR150[3]},
VAR79 = {(VAR79[2] & VAR230[2]), (VAR79[1] & (~ VAR230[1])), (VAR79[0] & VAR230[0]), VAR150[3]},
VAR92 = {(VAR92[2] & VAR230[2]), (VAR92[1] & VAR230[1]), (VAR92[0] & (~ VAR230[0])), VAR150[3]},
VAR229 = {(VAR229[2] & VAR230[2]), (VAR229[1] & VAR230[1]), (VAR229[0] & VAR230[0]), VAR150[3]},
VAR24 = {(VAR24[2] & (~ VAR61[5])), (VAR24[1] & VAR61[4]), (VAR24[0] & (~ VAR61[3])), VAR169},
VAR118 = {(VAR118[2] & (~ VAR230[2])), (VAR118[1] & (~ VAR230[1])), (VAR118[0] & (~ VAR230[0])), VAR24[3]},
VAR98 = {(VAR98[2] & (~ VAR230[2])), (VAR98[1] & (~ VAR230[1])), (VAR98[0] & VAR230[0]), VAR24[3]},
VAR198 = {(VAR198[2] & (~ VAR230[2])), (VAR198[1] & VAR230[1]), (VAR198[0] & (~ VAR230[0])), VAR24[3]},
VAR144 = {(VAR144[2] & (~ VAR230[2])), (VAR144[1] & VAR230[1]), (VAR144[0] & VAR230[0]), VAR24[3]},
VAR95 = {(VAR95[2] & VAR230[2]), (VAR95[1] & (~ VAR230[1])), (VAR95[0] & (~ VAR230[0])), VAR24[3]},
VAR7 = {(VAR7[2] & VAR230[2]), (VAR7[1] & (~ VAR230[1])), (VAR7[0] & VAR230[0]), VAR24[3]},
VAR97 = {(VAR97[2] & VAR230[2]), (VAR97[1] & VAR230[1]), (VAR97[0] & (~ VAR230[0])), VAR24[3]},
VAR158 = {(VAR158[2] & VAR230[2]), (VAR158[1] & VAR230[1]), (VAR158[0] & VAR230[0]), VAR24[3]},
VAR228 = {(VAR228[2] & (~ VAR61[5])), (VAR228[1] & VAR61[4]), (VAR228[0] & VAR61[3]), VAR169},
VAR16 = {(VAR16[2] & (~ VAR230[2])), (VAR16[1] & (~ VAR230[1])), (VAR16[0] & (~ VAR230[0])), VAR228[3]},
VAR175 = {(VAR175[2] & (~ VAR230[2])), (VAR175[1] & (~ VAR230[1])), (VAR175[0] & VAR230[0]), VAR228[3]},
VAR217 = {(VAR217[2] & (~ VAR230[2])), (VAR217[1] & VAR230[1]), (VAR217[0] & (~ VAR230[0])), VAR228[3]},
VAR182 = {(VAR182[2] & (~ VAR230[2])), (VAR182[1] & VAR230[1]), (VAR182[0] & VAR230[0]), VAR228[3]},
VAR75 = {(VAR75[2] & VAR230[2]), (VAR75[1] & (~ VAR230[1])), (VAR75[0] & (~ VAR230[0])), VAR228[3]},
VAR224 = {(VAR224[2] & VAR230[2]), (VAR224[1] & (~ VAR230[1])), (VAR224[0] & VAR230[0]), VAR228[3]},
VAR149 = {(VAR149[2] & VAR230[2]), (VAR149[1] & VAR230[1]), (VAR149[0] & (~ VAR230[0])), VAR228[3]},
VAR209 = {(VAR209[2] & VAR230[2]), (VAR209[1] & VAR230[1]), (VAR209[0] & VAR230[0]), VAR228[3]},
VAR103 = {(VAR103[2] & VAR61[5]), (VAR103[1] & (~ VAR61[4])), (VAR103[0] & (~ VAR61[3])), VAR169},
VAR64 = {(VAR64[2] & (~ VAR230[2])), (VAR64[1] & (~ VAR230[1])), (VAR64[0] & (~ VAR230[0])), VAR103[3]},
VAR42 = {(VAR42[2] & (~ VAR230[2])), (VAR42[1] & (~ VAR230[1])), (VAR42[0] & VAR230[0]), VAR103[3]},
VAR46 = {(VAR46[2] & (~ VAR230[2])), (VAR46[1] & VAR230[1]), (VAR46[0] & (~ VAR230[0])), VAR103[3]},
VAR194 = {(VAR194[2] & (~ VAR230[2])), (VAR194[1] & VAR230[1]), (VAR194[0] & VAR230[0]), VAR103[3]},
VAR186 = {(VAR186[2] & VAR230[2]), (VAR186[1] & (~ VAR230[1])), (VAR186[0] & (~ VAR230[0])), VAR103[3]},
VAR248 = {(VAR248[2] & VAR230[2]), (VAR248[1] & (~ VAR230[1])), (VAR248[0] & VAR230[0]), VAR103[3]},
VAR170 = {(VAR170[2] & VAR230[2]), (VAR170[1] & VAR230[1]), (VAR170[0] & (~ VAR230[0])), VAR103[3]},
VAR66 = {(VAR66[2] & VAR230[2]), (VAR66[1] & VAR230[1]), (VAR66[0] & VAR230[0]), VAR103[3]},
VAR50 = {(VAR50[2] & VAR61[5]), (VAR50[1] & (~ VAR61[4])), (VAR50[0] & VAR61[3]), VAR169},
VAR86 = {(VAR86[2] & (~ VAR230[2])), (VAR86[1] & (~ VAR230[1])), (VAR86[0] & (~ VAR230[0])), VAR50[3]},
VAR62 = {(VAR62[2] & (~ VAR230[2])), (VAR62[1] & (~ VAR230[1])), (VAR62[0] & VAR230[0]), VAR50[3]},
VAR222 = {(VAR222[2] & (~ VAR230[2])), (VAR222[1] & VAR230[1]), (VAR222[0] & (~ VAR230[0])), VAR50[3]},
VAR151 = {(VAR151[2] & (~ VAR230[2])), (VAR151[1] & VAR230[1]), (VAR151[0] & VAR230[0]), VAR50[3]},
VAR60 = {(VAR60[2] & VAR230[2]), (VAR60[1] & (~ VAR230[1])), (VAR60[0] & (~ VAR230[0])), VAR50[3]},
VAR122 = {(VAR122[2] & VAR230[2]), (VAR122[1] & (~ VAR230[1])), (VAR122[0] & VAR230[0]), VAR50[3]},
VAR178 = {(VAR178[2] & VAR230[2]), (VAR178[1] & VAR230[1]), (VAR178[0] & (~ VAR230[0])), VAR50[3]},
VAR160 = {(VAR160[2] & VAR230[2]), (VAR160[1] & VAR230[1]), (VAR160[0] & VAR230[0]), VAR50[3]},
VAR72 = {(VAR72[2] & VAR61[5]), (VAR72[1] & VAR61[4]), (VAR72[0] & (~ VAR61[3])), VAR169},
VAR199 = {(VAR199[2] & (~ VAR230[2])), (VAR199[1] & (~ VAR230[1])), (VAR199[0] & (~ VAR230[0])), VAR72[3]},
VAR105 = {(VAR105[2] & (~ VAR230[2])), (VAR105[1] & (~ VAR230[1])), (VAR105[0] & VAR230[0]), VAR72[3]},
VAR203 = {(VAR203[2] & (~ VAR230[2])), (VAR203[1] & VAR230[1]), (VAR203[0] & (~ VAR230[0])), VAR72[3]},
VAR73 = {(VAR73[2] & (~ VAR230[2])), (VAR73[1] & VAR230[1]), (VAR73[0] & VAR230[0]), VAR72[3]},
VAR241 = {(VAR241[2] & VAR230[2]), (VAR241[1] & (~ VAR230[1])), (VAR241[0] & (~ VAR230[0])), VAR72[3]},
VAR57 = {(VAR57[2] & VAR230[2]), (VAR57[1] & (~ VAR230[1])), (VAR57[0] & VAR230[0]), VAR72[3]},
VAR243 = {(VAR243[2] & VAR230[2]), (VAR243[1] & VAR230[1]), (VAR243[0] & (~ VAR230[0])), VAR72[3]},
VAR211 = {(VAR211[2] & VAR230[2]), (VAR211[1] & VAR230[1]), (VAR211[0] & VAR230[0]), VAR72[3]},
VAR108 = {(VAR108[2] & VAR61[5]), (VAR108[1] & VAR61[4]), (VAR108[0] & VAR61[3]), VAR169},
VAR74 = {(VAR74[2] & (~ VAR230[2])), (VAR74[1] & (~ VAR230[1])), (VAR74[0] & (~ VAR230[0])), VAR108[3]},
VAR223 = {(VAR223[2] & (~ VAR230[2])), (VAR223[1] & (~ VAR230[1])), (VAR223[0] & VAR230[0]), VAR108[3]},
VAR231 = {(VAR231[2] & (~ VAR230[2])), (VAR231[1] & VAR230[1]), (VAR231[0] & (~ VAR230[0])), VAR108[3]},
VAR6 = {(VAR6[2] & (~ VAR230[2])), (VAR6[1] & VAR230[1]), (VAR6[0] & VAR230[0]), VAR108[3]},
VAR116 = {(VAR116[2] & VAR230[2]), (VAR116[1] & (~ VAR230[1])), (VAR116[0] & (~ VAR230[0])), VAR108[3]},
VAR27 = {(VAR27[2] & VAR230[2]), (VAR27[1] & (~ VAR230[1])), (VAR27[0] & VAR230[0]), VAR108[3]},
VAR130 = {(VAR130[2] & VAR230[2]), (VAR130[1] & VAR230[1]), (VAR130[0] & (~ VAR230[0])), VAR108[3]},
VAR173 = {(VAR173[2] & VAR230[2]), (VAR173[1] & VAR230[1]), (VAR173[0] & VAR230[0]), VAR108[3]},
VAR120 = {(VAR120[2] & (~ VAR61[5])), (VAR120[1] & (~ VAR61[4])), (VAR120[0] & (~ VAR61[3])), VAR250},
VAR195 = {(VAR195[2] & (~ VAR52[2])), (VAR195[1] & (~ VAR52[1])), (VAR195[0] & (~ VAR52[0])), VAR120[3]},
VAR8 = {(VAR8[2] & (~ VAR52[2])), (VAR8[1] & (~ VAR52[1])), (VAR8[0] & VAR52[0]), VAR120[3]},
VAR22 = {(VAR22[2] & (~ VAR52[2])), (VAR22[1] & VAR52[1]), (VAR22[0] & (~ VAR52[0])), VAR120[3]},
VAR69 = {(VAR69[2] & (~ VAR52[2])), (VAR69[1] & VAR52[1]), (VAR69[0] & VAR52[0]), VAR120[3]},
VAR81 = {(VAR81[2] & VAR52[2]), (VAR81[1] & (~ VAR52[1])), (VAR81[0] & (~ VAR52[0])), VAR120[3]},
VAR204 = {(VAR204[2] & VAR52[2]), (VAR204[1] & (~ VAR52[1])), (VAR204[0] & VAR52[0]), VAR120[3]},
VAR206 = {(VAR206[2] & VAR52[2]), (VAR206[1] & VAR52[1]), (VAR206[0] & (~ VAR52[0])), VAR120[3]},
VAR236 = {(VAR236[2] & VAR52[2]), (VAR236[1] & VAR52[1]), (VAR236[0] & VAR52[0]), VAR120[3]},
VAR112 = {(VAR112[2] & (~ VAR61[5])), (VAR112[1] & (~ VAR61[4])), (VAR112[0] & VAR61[3]), VAR250},
VAR35 = {(VAR35[2] & (~ VAR52[2])), (VAR35[1] & (~ VAR52[1])), (VAR35[0] & (~ VAR52[0])), VAR112[3]},
VAR55 = {(VAR55[2] & (~ VAR52[2])), (VAR55[1] & (~ VAR52[1])), (VAR55[0] & VAR52[0]), VAR112[3]},
VAR85 = {(VAR85[2] & (~ VAR52[2])), (VAR85[1] & VAR52[1]), (VAR85[0] & (~ VAR52[0])), VAR112[3]},
VAR47 = {(VAR47[2] & (~ VAR52[2])), (VAR47[1] & VAR52[1]), (VAR47[0] & VAR52[0]), VAR112[3]},
VAR2 = {(VAR2[2] & VAR52[2]), (VAR2[1] & (~ VAR52[1])), (VAR2[0] & (~ VAR52[0])), VAR112[3]},
VAR111 = {(VAR111[2] & VAR52[2]), (VAR111[1] & (~ VAR52[1])), (VAR111[0] & VAR52[0]), VAR112[3]},
VAR247 = {(VAR247[2] & VAR52[2]), (VAR247[1] & VAR52[1]), (VAR247[0] & (~ VAR52[0])), VAR112[3]},
VAR180 = {(VAR180[2] & VAR52[2]), (VAR180[1] & VAR52[1]), (VAR180[0] & VAR52[0]), VAR112[3]},
VAR167 = {(VAR167[2] & (~ VAR61[5])), (VAR167[1] & VAR61[4]), (VAR167[0] & (~ VAR61[3])), VAR250},
VAR67 = {(VAR67[2] & (~ VAR52[2])), (VAR67[1] & (~ VAR52[1])), (VAR67[0] & (~ VAR52[0])), VAR167[3]},
VAR48 = {(VAR48[2] & (~ VAR52[2])), (VAR48[1] & (~ VAR52[1])), (VAR48[0] & VAR52[0]), VAR167[3]},
VAR128 = {(VAR128[2] & (~ VAR52[2])), (VAR128[1] & VAR52[1]), (VAR128[0] & (~ VAR52[0])), VAR167[3]},
VAR58 = {(VAR58[2] & (~ VAR52[2])), (VAR58[1] & VAR52[1]), (VAR58[0] & VAR52[0]), VAR167[3]},
VAR11 = {(VAR11[2] & VAR52[2]), (VAR11[1] & (~ VAR52[1])), (VAR11[0] & (~ VAR52[0])), VAR167[3]},
VAR196 = {(VAR196[2] & VAR52[2]), (VAR196[1] & (~ VAR52[1])), (VAR196[0] & VAR52[0]), VAR167[3]},
VAR39 = {(VAR39[2] & VAR52[2]), (VAR39[1] & VAR52[1]), (VAR39[0] & (~ VAR52[0])), VAR167[3]},
VAR140 = {(VAR140[2] & VAR52[2]), (VAR140[1] & VAR52[1]), (VAR140[0] & VAR52[0]), VAR167[3]},
VAR102 = {(VAR102[2] & (~ VAR61[5])), (VAR102[1] & VAR61[4]), (VAR102[0] & VAR61[3]), VAR250},
VAR34 = {(VAR34[2] & (~ VAR52[2])), (VAR34[1] & (~ VAR52[1])), (VAR34[0] & (~ VAR52[0])), VAR102[3]},
VAR107 = {(VAR107[2] & (~ VAR52[2])), (VAR107[1] & (~ VAR52[1])), (VAR107[0] & VAR52[0]), VAR102[3]},
VAR134 = {(VAR134[2] & (~ VAR52[2])), (VAR134[1] & VAR52[1]), (VAR134[0] & (~ VAR52[0])), VAR102[3]},
VAR28 = {(VAR28[2] & (~ VAR52[2])), (VAR28[1] & VAR52[1]), (VAR28[0] & VAR52[0]), VAR102[3]},
VAR214 = {(VAR214[2] & VAR52[2]), (VAR214[1] & (~ VAR52[1])), (VAR214[0] & (~ VAR52[0])), VAR102[3]},
VAR87 = {(VAR87[2] & VAR52[2]), (VAR87[1] & (~ VAR52[1])), (VAR87[0] & VAR52[0]), VAR102[3]},
VAR174 = {(VAR174[2] & VAR52[2]), (VAR174[1] & VAR52[1]), (VAR174[0] & (~ VAR52[0])), VAR102[3]},
VAR44 = {(VAR44[2] & VAR52[2]), (VAR44[1] & VAR52[1]), (VAR44[0] & VAR52[0]), VAR102[3]},
VAR100 = {(VAR100[2] & VAR61[5]), (VAR100[1] & (~ VAR61[4])), (VAR100[0] & (~ VAR61[3])), VAR250},
VAR238 = {(VAR238[2] & (~ VAR52[2])), (VAR238[1] & (~ VAR52[1])), (VAR238[0] & (~ VAR52[0])), VAR100[3]},
VAR117 = {(VAR117[2] & (~ VAR52[2])), (VAR117[1] & (~ VAR52[1])), (VAR117[0] & VAR52[0]), VAR100[3]},
VAR43 = {(VAR43[2] & (~ VAR52[2])), (VAR43[1] & VAR52[1]), (VAR43[0] & (~ VAR52[0])), VAR100[3]},
VAR123 = {(VAR123[2] & (~ VAR52[2])), (VAR123[1] & VAR52[1]), (VAR123[0] & VAR52[0]), VAR100[3]},
VAR101 = {(VAR101[2] & VAR52[2]), (VAR101[1] & (~ VAR52[1])), (VAR101[0] & (~ VAR52[0])), VAR100[3]},
VAR232 = {(VAR232[2] & VAR52[2]), (VAR232[1] & (~ VAR52[1])), (VAR232[0] & VAR52[0]), VAR100[3]},
VAR76 = {(VAR76[2] & VAR52[2]), (VAR76[1] & VAR52[1]), (VAR76[0] & (~ VAR52[0])), VAR100[3]},
VAR164 = {(VAR164[2] & VAR52[2]), (VAR164[1] & VAR52[1]), (VAR164[0] & VAR52[0]), VAR100[3]},
VAR148 = {(VAR148[2] & VAR61[5]), (VAR148[1] & (~ VAR61[4])), (VAR148[0] & VAR61[3]), VAR250},
VAR32 = {(VAR32[2] & (~ VAR52[2])), (VAR32[1] & (~ VAR52[1])), (VAR32[0] & (~ VAR52[0])), VAR148[3]},
VAR172 = {(VAR172[2] & (~ VAR52[2])), (VAR172[1] & (~ VAR52[1])), (VAR172[0] & VAR52[0]), VAR148[3]},
VAR13 = {(VAR13[2] & (~ VAR52[2])), (VAR13[1] & VAR52[1]), (VAR13[0] & (~ VAR52[0])), VAR148[3]},
VAR205 = {(VAR205[2] & (~ VAR52[2])), (VAR205[1] & VAR52[1]), (VAR205[0] & VAR52[0]), VAR148[3]},
VAR20 = {(VAR20[2] & VAR52[2]), (VAR20[1] & (~ VAR52[1])), (VAR20[0] & (~ VAR52[0])), VAR148[3]},
VAR177 = {(VAR177[2] & VAR52[2]), (VAR177[1] & (~ VAR52[1])), (VAR177[0] & VAR52[0]), VAR148[3]},
VAR49 = {(VAR49[2] & VAR52[2]), (VAR49[1] & VAR52[1]), (VAR49[0] & (~ VAR52[0])), VAR148[3]},
VAR176 = {(VAR176[2] & VAR52[2]), (VAR176[1] & VAR52[1]), (VAR176[0] & VAR52[0]), VAR148[3]},
VAR21 = {(VAR21[2] & VAR61[5]), (VAR21[1] & VAR61[4]), (VAR21[0] & (~ VAR61[3])), VAR250},
VAR235 = {(VAR235[2] & (~ VAR52[2])), (VAR235[1] & (~ VAR52[1])), (VAR235[0] & (~ VAR52[0])), VAR21[3]},
VAR89 = {(VAR89[2] & (~ VAR52[2])), (VAR89[1] & (~ VAR52[1])), (VAR89[0] & VAR52[0]), VAR21[3]},
VAR191 = {(VAR191[2] & (~ VAR52[2])), (VAR191[1] & VAR52[1]), (VAR191[0] & (~ VAR52[0])), VAR21[3]},
VAR154 = {(VAR154[2] & (~ VAR52[2])), (VAR154[1] & VAR52[1]), (VAR154[0] & VAR52[0]), VAR21[3]},
VAR10 = {(VAR10[2] & VAR52[2]), (VAR10[1] & (~ VAR52[1])), (VAR10[0] & (~ VAR52[0])), VAR21[3]},
VAR146 = {(VAR146[2] & VAR52[2]), (VAR146[1] & (~ VAR52[1])), (VAR146[0] & VAR52[0]), VAR21[3]},
VAR185 = {(VAR185[2] & VAR52[2]), (VAR185[1] & VAR52[1]), (VAR185[0] & (~ VAR52[0])), VAR21[3]},
VAR59 = {(VAR59[2] & VAR52[2]), (VAR59[1] & VAR52[1]), (VAR59[0] & VAR52[0]), VAR21[3]},
VAR15 = {(VAR15[2] & VAR61[5]), (VAR15[1] & VAR61[4]), (VAR15[0] & VAR61[3]), VAR250},
VAR36 = {(VAR36[2] & (~ VAR52[2])), (VAR36[1] & (~ VAR52[1])), (VAR36[0] & (~ VAR52[0])), VAR15[3]},
VAR136 = {(VAR136[2] & (~ VAR52[2])), (VAR136[1] & (~ VAR52[1])), (VAR136[0] & VAR52[0]), VAR15[3]},
VAR109 = {(VAR109[2] & (~ VAR52[2])), (VAR109[1] & VAR52[1]), (VAR109[0] & (~ VAR52[0])), VAR15[3]},
VAR208 = {(VAR208[2] & (~ VAR52[2])), (VAR208[1] & VAR52[1]), (VAR208[0] & VAR52[0]), VAR15[3]},
VAR31 = {(VAR31[2] & VAR52[2]), (VAR31[1] & (~ VAR52[1])), (VAR31[0] & (~ VAR52[0])), VAR15[3]},
VAR166 = {(VAR166[2] & VAR52[2]), (VAR166[1] & (~ VAR52[1])), (VAR166[0] & VAR52[0]), VAR15[3]},
VAR91 = {(VAR91[2] & VAR52[2]), (VAR91[1] & VAR52[1]), (VAR91[0] & (~ VAR52[0])), VAR15[3]},
VAR12 = {(VAR12[2] & VAR52[2]), (VAR12[1] & VAR52[1]), (VAR12[0] & VAR52[0]), VAR15[3]},
VAR45 = {(VAR45[2] & (~ VAR61[5])), (VAR45[1] & (~ VAR61[4])), (VAR45[0] & (~ VAR61[3])), VAR169},
VAR197 = {(VAR197[2] & (~ VAR230[2])), (VAR197[1] & (~ VAR230[1])), (VAR197[0] & (~ VAR230[0])), VAR45[3]},
VAR126 = {(VAR126[2] & (~ VAR230[2])), (VAR126[1] & (~ VAR230[1])), (VAR126[0] & VAR230[0]), VAR45[3]},
VAR141 = {(VAR141[2] & (~ VAR230[2])), (VAR141[1] & VAR230[1]), (VAR141[0] & (~ VAR230[0])), VAR45[3]},
VAR207 = {(VAR207[2] & (~ VAR230[2])), (VAR207[1] & VAR230[1]), (VAR207[0] & VAR230[0]), VAR45[3]},
VAR221 = {(VAR221[2] & VAR230[2]), (VAR221[1] & (~ VAR230[1])), (VAR221[0] & (~ VAR230[0])), VAR45[3]},
VAR190 = {(VAR190[2] & VAR230[2]), (VAR190[1] & (~ VAR230[1])), (VAR190[0] & VAR230[0]), VAR45[3]},
VAR227 = {(VAR227[2] & VAR230[2]), (VAR227[1] & VAR230[1]), (VAR227[0] & (~ VAR230[0])), VAR45[3]},
VAR52 = VAR61[2:0],
VAR230 = VAR61[2:0];
endmodule
module MODULE3
(
VAR121,
VAR14,
VAR94,
VAR193,
VAR233) ;
input [71:0] VAR121;
output VAR14;
output VAR94;
output VAR193;
output [63:0] VAR233;
wire [127:0] VAR244;
wire VAR161;
wire VAR168;
wire VAR156;
wire VAR38;
wire VAR56;
wire VAR234;
wire VAR187;
wire VAR220;
wire VAR96;
wire VAR17;
wire VAR127;
wire VAR137;
wire VAR26;
wire VAR65;
wire VAR9;
wire VAR143;
wire VAR153;
wire VAR115;
wire VAR183;
wire VAR70;
wire VAR77;
wire VAR124;
wire VAR3;
wire VAR54;
wire VAR159;
wire VAR51;
wire VAR88;
wire VAR68;
wire VAR84;
wire VAR30;
wire VAR1;
wire VAR218;
wire VAR225;
wire VAR240;
wire VAR226;
wire VAR249;
wire VAR200;
wire VAR152;
wire VAR78;
wire VAR132;
wire VAR135;
wire VAR40;
wire VAR25;
wire VAR5;
wire VAR216;
wire VAR29;
wire VAR246;
wire VAR90;
wire VAR179;
wire VAR33;
wire VAR171;
wire VAR23;
wire VAR242;
wire VAR4;
wire VAR114;
wire VAR125;
wire VAR80;
wire VAR93;
wire VAR213;
wire VAR139;
wire VAR19;
wire VAR163;
wire VAR119;
wire VAR147;
wire VAR53;
wire [63:0] VAR201;
wire [71:0] VAR61;
wire [127:0] VAR192;
wire VAR212;
wire VAR110;
wire VAR245;
wire [35:0] VAR83;
wire [17:0] VAR210;
wire [8:0] VAR215;
wire [3:0] VAR63;
wire [1:0] VAR104;
wire [30:0] VAR99;
wire [6:0] VAR113;
wire VAR71;
wire [70:0] VAR82;
wire [6:0] VAR142;
wire [63:0] VAR239;
wire VAR189;
wire VAR131;
wire [5:0] VAR237;
wire [7:0] VAR162;
MODULE2 MODULE1
(
.VAR121(VAR162[6:0]),
.VAR165(VAR244));
assign VAR161 = (VAR162[7] == 1'b1) ? (VAR192[3] ^ VAR61[0]) : VAR61[0];
assign VAR168 = (VAR162[7] == 1'b1) ? (VAR192[5] ^ VAR61[1]) : VAR61[1];
assign VAR156 = (VAR162[7] == 1'b1) ? (VAR192[15] ^ VAR61[10]) : VAR61[10];
assign VAR38 = (VAR162[7] == 1'b1) ? (VAR192[17] ^ VAR61[11]) : VAR61[11];
assign VAR56 = (VAR162[7] == 1'b1) ? (VAR192[18] ^ VAR61[12]) : VAR61[12];
assign VAR234 = (VAR162[7] == 1'b1) ? (VAR192[19] ^ VAR61[13]) : VAR61[13];
assign VAR187 = (VAR162[7] == 1'b1) ? (VAR192[20] ^ VAR61[14]) : VAR61[14];
assign VAR220 = (VAR162[7] == 1'b1) ? (VAR192[21] ^ VAR61[15]) : VAR61[15];
assign VAR96 = (VAR162[7] == 1'b1) ? (VAR192[22] ^ VAR61[16]) : VAR61[16];
assign VAR17 = (VAR162[7] == 1'b1) ? (VAR192[23] ^ VAR61[17]) : VAR61[17];
assign VAR127 = (VAR162[7] == 1'b1) ? (VAR192[24] ^ VAR61[18]) : VAR61[18];
assign VAR137 = (VAR162[7] == 1'b1) ? (VAR192[25] ^ VAR61[19]) : VAR61[19];
assign VAR26 = (VAR162[7] == 1'b1) ? (VAR192[6] ^ VAR61[2]) : VAR61[2];
assign VAR65 = (VAR162[7] == 1'b1) ? (VAR192[26] ^ VAR61[20]) : VAR61[20];
assign VAR9 = (VAR162[7] == 1'b1) ? (VAR192[27] ^ VAR61[21]) : VAR61[21];
assign VAR143 = (VAR162[7] == 1'b1) ? (VAR192[28] ^ VAR61[22]) : VAR61[22];
assign VAR153 = (VAR162[7] == 1'b1) ? (VAR192[29] ^ VAR61[23]) : VAR61[23];
assign VAR115 = (VAR162[7] == 1'b1) ? (VAR192[30] ^ VAR61[24]) : VAR61[24];
assign VAR183 = (VAR162[7] == 1'b1) ? (VAR192[31] ^ VAR61[25]) : VAR61[25];
assign VAR70 = (VAR162[7] == 1'b1) ? (VAR192[33] ^ VAR61[26]) : VAR61[26];
assign VAR77 = (VAR162[7] == 1'b1) ? (VAR192[34] ^ VAR61[27]) : VAR61[27];
assign VAR124 = (VAR162[7] == 1'b1) ? (VAR192[35] ^ VAR61[28]) : VAR61[28];
assign VAR3 = (VAR162[7] == 1'b1) ? (VAR192[36] ^ VAR61[29]) : VAR61[29];
assign VAR54 = (VAR162[7] == 1'b1) ? (VAR192[7] ^ VAR61[3]) : VAR61[3];
assign VAR159 = (VAR162[7] == 1'b1) ? (VAR192[37] ^ VAR61[30]) : VAR61[30];
assign VAR51 = (VAR162[7] == 1'b1) ? (VAR192[38] ^ VAR61[31]) : VAR61[31];
assign VAR88 = (VAR162[7] == 1'b1) ? (VAR192[39] ^ VAR61[32]) : VAR61[32];
assign VAR68 = (VAR162[7] == 1'b1) ? (VAR192[40] ^ VAR61[33]) : VAR61[33];
assign VAR84 = (VAR162[7] == 1'b1) ? (VAR192[41] ^ VAR61[34]) : VAR61[34];
assign VAR30 = (VAR162[7] == 1'b1) ? (VAR192[42] ^ VAR61[35]) : VAR61[35];
assign VAR1 = (VAR162[7] == 1'b1) ? (VAR192[43] ^ VAR61[36]) : VAR61[36];
assign VAR218 = (VAR162[7] == 1'b1) ? (VAR192[44] ^ VAR61[37]) : VAR61[37];
assign VAR225 = (VAR162[7] == 1'b1) ? (VAR192[45] ^ VAR61[38]) : VAR61[38];
assign VAR240 = (VAR162[7] == 1'b1) ? (VAR192[46] ^ VAR61[39]) : VAR61[39];
assign VAR226 = (VAR162[7] == 1'b1) ? (VAR192[9] ^ VAR61[4]) : VAR61[4];
assign VAR249 = (VAR162[7] == 1'b1) ? (VAR192[47] ^ VAR61[40]) : VAR61[40];
assign VAR200 = (VAR162[7] == 1'b1) ? (VAR192[48] ^ VAR61[41]) : VAR61[41];
assign VAR152 = (VAR162[7] == 1'b1) ? (VAR192[49] ^ VAR61[42]) : VAR61[42];
assign VAR78 = (VAR162[7] == 1'b1) ? (VAR192[50] ^ VAR61[43]) : VAR61[43];
assign VAR132 = (VAR162[7] == 1'b1) ? (VAR192[51] ^ VAR61[44]) : VAR61[44];
assign VAR135 = (VAR162[7] == 1'b1) ? (VAR192[52] ^ VAR61[45]) : VAR61[45];
assign VAR40 = (VAR162[7] == 1'b1) ? (VAR192[53] ^ VAR61[46]) : VAR61[46];
assign VAR25 = (VAR162[7] == 1'b1) ? (VAR192[54] ^ VAR61[47]) : VAR61[47];
assign VAR5 = (VAR162[7] == 1'b1) ? (VAR192[55] ^ VAR61[48]) : VAR61[48];
assign VAR216 = (VAR162[7] == 1'b1) ? (VAR192[56] ^ VAR61[49]) : VAR61[49];
assign VAR29 = (VAR162[7] == 1'b1) ? (VAR192[10] ^ VAR61[5]) : VAR61[5];
assign VAR246 = (VAR162[7] == 1'b1) ? (VAR192[57] ^ VAR61[50]) : VAR61[50];
assign VAR90 = (VAR162[7] == 1'b1) ? (VAR192[58] ^ VAR61[51]) : VAR61[51];
assign VAR179 = (VAR162[7] == 1'b1) ? (VAR192[59] ^ VAR61[52]) : VAR61[52];
assign VAR33 = (VAR162[7] == 1'b1) ? (VAR192[60] ^ VAR61[53]) : VAR61[53];
assign VAR171 = (VAR162[7] == 1'b1) ? (VAR192[61] ^ VAR61[54]) : VAR61[54];
assign VAR23 = (VAR162[7] == 1'b1) ? (VAR192[62] ^ VAR61[55]) : VAR61[55];
assign VAR242 = (VAR162[7] == 1'b1) ? (VAR192[63] ^ VAR61[56]) : VAR61[56];
assign VAR4 = (VAR162[7] == 1'b1) ? (VAR192[65] ^ VAR61[57]) : VAR61[57];
assign VAR114 = (VAR162[7] == 1'b1) ? (VAR192[66] ^ VAR61[58]) : VAR61[58];
assign VAR125 = (VAR162[7] == 1'b1) ? (VAR192[67] ^ VAR61[59]) : VAR61[59];
assign VAR80 = (VAR162[7] == 1'b1) ? (VAR192[11] ^ VAR61[6]) : VAR61[6];
assign VAR93 = (VAR162[7] == 1'b1) ? (VAR192[68] ^ VAR61[60]) : VAR61[60];
assign VAR213 = (VAR162[7] == 1'b1) ? (VAR192[69] ^ VAR61[61]) : VAR61[61];
assign VAR139 = (VAR162[7] == 1'b1) ? (VAR192[70] ^ VAR61[62]) : VAR61[62];
assign VAR19 = (VAR162[7] == 1'b1) ? (VAR192[71] ^ VAR61[63]) : VAR61[63];
assign VAR163 = (VAR162[7] == 1'b1) ? (VAR192[12] ^ VAR61[7]) : VAR61[7];
assign VAR119 = (VAR162[7] == 1'b1) ? (VAR192[13] ^ VAR61[8]) : VAR61[8];
assign VAR147 = (VAR162[7] == 1'b1) ? (VAR192[14] ^ VAR61[9]) : VAR61[9];
assign
VAR53 = VAR201[63],
VAR201 = {(VAR201[62] | VAR192[71]), (VAR201[61] | VAR192[70]), (VAR201[60] | VAR192[69]), (VAR201[59] | VAR192[68]), (VAR201[58] | VAR192[67]), (VAR201[57] | VAR192[66]), (VAR201[56] | VAR192[65]), (VAR201[55] | VAR192[63]), (VAR201[54] | VAR192[62]), (VAR201[53] | VAR192[61]), (VAR201[52] | VAR192[60]), (VAR201[51] | VAR192[59]), (VAR201[50] | VAR192[58]), (VAR201[49] | VAR192[57]), (VAR201[48] | VAR192[56]), (VAR201[47] | VAR192[55]), (VAR201[46] | VAR192[54]), (VAR201[45] | VAR192[53]), (VAR201[44] | VAR192[52]), (VAR201[43] | VAR192[51]), (VAR201[42] | VAR192[50]), (VAR201[41] | VAR192[49]), (VAR201[40] | VAR192[48]), (VAR201[39] | VAR192[47]), (VAR201[38] | VAR192[46]), (VAR201[37] | VAR192[45]), (VAR201[36] | VAR192[44]), (VAR201[35] | VAR192[43]), (VAR201[34] | VAR192[42]), (VAR201[33] | VAR192[41]), (VAR201[32] | VAR192[40]), (VAR201[31] | VAR192[39]), (VAR201[30] | VAR192[38]), (VAR201[29] | VAR192[37]), (VAR201[28] | VAR192[36]), (VAR201[27] | VAR192[35]), (VAR201[26] | VAR192[34]), (VAR201[25] | VAR192[33]), (VAR201[24] | VAR192[31]), (VAR201[23] | VAR192[30]), (VAR201[22] | VAR192[29]), (VAR201[21] | VAR192[28]), (VAR201[20] | VAR192[27]), (VAR201[19] | VAR192[26]), (VAR201[18] | VAR192[25]), (VAR201[17] | VAR192[24]), (VAR201[16] | VAR192[23]), (VAR201[15] | VAR192[22]), (VAR201[14] | VAR192[21]), (VAR201[13] | VAR192[20]), (VAR201[12] | VAR192[19]), (VAR201[11] | VAR192[18]), (VAR201[10] | VAR192[17]), (VAR201[9] | VAR192[15]), (VAR201[8] | VAR192[14]), (VAR201[7] | VAR192[13]), (VAR201[6] | VAR192[12]), (VAR201[5] | VAR192[11]), (VAR201[4] | VAR192[10]), (VAR201[3] | VAR192[9]), (VAR201[2]
| VAR192[7]), (VAR201[1] | VAR192[6]), (VAR201[0] | VAR192[5]), VAR192[3]},
VAR61 = VAR121,
VAR192 = VAR244,
VAR14 = VAR212,
VAR212 = ((VAR189 & VAR131) & VAR53),
VAR94 = VAR110,
VAR110 = (VAR189 & (~ (VAR131 & VAR71))),
VAR193 = VAR245,
VAR245 = (VAR110 & (~ VAR212)),
VAR83 = {(VAR61[63] ^ VAR83[34]), (VAR61[61] ^ VAR83[33]), (VAR61[59] ^ VAR83[32]), (VAR61[57] ^ VAR83[31]), (VAR61[56] ^ VAR83[30]), (VAR61[54] ^ VAR83[29]), (VAR61[52] ^ VAR83[28]), (VAR61[50] ^ VAR83[27]), (VAR61[48] ^ VAR83[26]), (VAR61[46] ^ VAR83[25]), (VAR61[44] ^ VAR83[24]), (VAR61[42] ^ VAR83[23]), (VAR61[40] ^ VAR83[22]), (VAR61[38] ^ VAR83[21]), (VAR61[36] ^ VAR83[20]), (VAR61[34] ^ VAR83[19]), (VAR61[32] ^ VAR83[18]), (VAR61[30] ^ VAR83[17]), (VAR61[28] ^ VAR83[16]), (VAR61[26] ^ VAR83[15]), (VAR61[25] ^ VAR83[14]), (VAR61[23] ^ VAR83[13]), (VAR61[21] ^ VAR83[12]), (VAR61[19] ^ VAR83[11]), (VAR61[17] ^ VAR83[10]), (VAR61[15] ^ VAR83[9]), (VAR61[13] ^ VAR83[8]), (VAR61[11] ^ VAR83[7]), (VAR61[10] ^ VAR83[6]), (VAR61[8] ^ VAR83[5]), (VAR61[6] ^ VAR83[4]), (VAR61[4] ^ VAR83[3]), (VAR61[3] ^ VAR83[2]), (VAR61[1] ^ VAR83[1]), (VAR61[0] ^ VAR83[0]), VAR61[64]},
VAR210 = {((VAR61[62] ^ VAR61[63]) ^ VAR210[16]), ((VAR61[58] ^ VAR61[59]) ^ VAR210[15]), ((VAR61[55] ^ VAR61[56]) ^ VAR210[14]), ((VAR61[51] ^ VAR61[52]) ^ VAR210[13]), ((VAR61[47] ^ VAR61[48]) ^ VAR210[12]), ((VAR61[43] ^ VAR61[44]) ^ VAR210[11]), ((VAR61[39] ^ VAR61[40]) ^ VAR210[10]), ((VAR61[35] ^ VAR61[36]) ^ VAR210[9]), ((VAR61[31] ^ VAR61[32]) ^ VAR210[8]), ((VAR61[27] ^ VAR61[28]) ^ VAR210[7]), ((VAR61[24] ^ VAR61[25]) ^ VAR210[6]), ((VAR61[20] ^ VAR61[21]) ^ VAR210[5]), ((VAR61[16] ^ VAR61[17]) ^ VAR210[4]), ((VAR61[12] ^ VAR61[13]) ^ VAR210[3]), ((VAR61[9] ^ VAR61[10]) ^ VAR210[2]), ((VAR61[5] ^ VAR61[6]) ^ VAR210[1]), ((VAR61[2] ^ VAR61[3]) ^ VAR210[0]), (VAR61[65] ^ VAR61[0])},
VAR215 = {((((VAR61[60] ^ VAR61[61]) ^ VAR61[62]) ^ VAR61[63]) ^ VAR215[7]), ((((VAR61[53] ^ VAR61[54]) ^ VAR61[55]) ^ VAR61[56]) ^ VAR215[6]), ((((VAR61[45] ^ VAR61[46]) ^ VAR61[47]) ^ VAR61[48]) ^ VAR215[5]), ((((VAR61[37] ^ VAR61[38]) ^ VAR61[39]) ^ VAR61[40]) ^ VAR215[4]), ((((VAR61[29] ^ VAR61[30]) ^ VAR61[31]) ^ VAR61[32]) ^ VAR215[3]), ((((VAR61[22] ^ VAR61[23]) ^ VAR61[24]) ^ VAR61[25]) ^ VAR215[2]), ((((VAR61[14] ^ VAR61[15]) ^ VAR61[16]) ^ VAR61[17]) ^ VAR215[1]), ((((VAR61[7] ^ VAR61[8]) ^ VAR61[9]) ^ VAR61[10]) ^ VAR215[0]), (((VAR61[66] ^ VAR61[1]) ^ VAR61[2]) ^ VAR61[3])},
VAR63 = {((((((((VAR61[49] ^ VAR61[50]) ^ VAR61[51]) ^ VAR61[52]) ^ VAR61[53]) ^ VAR61[54]) ^ VAR61[55]) ^ VAR61[56]) ^ VAR63[2]), ((((((((VAR61[33] ^ VAR61[34]) ^ VAR61[35]) ^ VAR61[36]) ^ VAR61[37]) ^ VAR61[38]) ^ VAR61[39]) ^ VAR61[40]) ^ VAR63[1]), ((((((((VAR61[18] ^ VAR61[19]) ^ VAR61[20]) ^ VAR61[21]) ^ VAR61[22]) ^ VAR61[23]) ^ VAR61[24]) ^ VAR61[25]) ^ VAR63[0]), (((((((VAR61[67] ^ VAR61[4]) ^ VAR61[5]) ^ VAR61[6]) ^ VAR61[7]) ^ VAR61[8]) ^ VAR61[9]) ^ VAR61[10])},
VAR104 = {((((((((((((((((VAR61[41] ^ VAR61[42]) ^ VAR61[43]) ^ VAR61[44]) ^ VAR61[45]) ^ VAR61[46]) ^ VAR61[47]) ^ VAR61[48]) ^ VAR61[49]) ^ VAR61[50]) ^ VAR61[51]) ^ VAR61[52]) ^ VAR61[53]) ^ VAR61[54]) ^ VAR61[55]) ^ VAR61[56]) ^ VAR104[0]), (((((((((((((((VAR61[68] ^ VAR61[11]) ^ VAR61[12]) ^ VAR61[13]) ^ VAR61[14]) ^ VAR61[15]) ^ VAR61[16]) ^ VAR61[17]) ^ VAR61[18]) ^ VAR61[19]) ^ VAR61[20]) ^ VAR61[21]) ^ VAR61[22]) ^ VAR61[23]) ^ VAR61[24]) ^ VAR61[25])},
VAR99 = {(VAR61[56] ^ VAR99[29]), (VAR61[55] ^ VAR99[28]), (VAR61[54] ^ VAR99[27]), (VAR61[53] ^ VAR99[26]), (VAR61[52] ^ VAR99[25]), (VAR61[51] ^ VAR99[24]), (VAR61[50] ^ VAR99[23]), (VAR61[49] ^ VAR99[22]), (VAR61[48] ^ VAR99[21]), (VAR61[47] ^ VAR99[20]), (VAR61[46] ^ VAR99[19]), (VAR61[45] ^ VAR99[18]), (VAR61[44] ^ VAR99[17]), (VAR61[43] ^ VAR99[16]), (VAR61[42] ^ VAR99[15]), (VAR61[41] ^ VAR99[14]), (VAR61[40] ^ VAR99[13]), (VAR61[39] ^ VAR99[12]), (VAR61[38] ^ VAR99[11]), (VAR61[37] ^ VAR99[10]), (VAR61[36] ^ VAR99[9]), (VAR61[35] ^ VAR99[8]), (VAR61[34] ^ VAR99[7]), (VAR61[33] ^ VAR99[6]), (VAR61[32] ^ VAR99[5]), (VAR61[31] ^ VAR99[4]), (VAR61[30] ^ VAR99[3]), (VAR61[29] ^ VAR99[2]), (VAR61[28] ^ VAR99[1]), (VAR61[27] ^ VAR99[0]), (VAR61[69] ^ VAR61[26])},
VAR113 = {(VAR61[63] ^ VAR113[5]), (VAR61[62] ^ VAR113[4]), (VAR61[61] ^ VAR113[3]), (VAR61[60] ^ VAR113[2]), (VAR61[59] ^ VAR113[1]), (VAR61[58] ^ VAR113[0]), (VAR61[70] ^ VAR61[57])},
VAR71 = VAR142[6],
VAR82 = {(VAR61[70] ^ VAR82[69]), (VAR61[69] ^ VAR82[68]), (VAR61[68] ^ VAR82[67]), (VAR61[67] ^ VAR82[66]), (VAR61[66] ^ VAR82[65]), (VAR61[65] ^ VAR82[64]), (VAR61[64] ^ VAR82[63]), (VAR61[63] ^ VAR82[62]), (VAR61[62] ^ VAR82[61]), (VAR61[61] ^ VAR82[60]), (VAR61[60] ^ VAR82[59]), (VAR61[59] ^ VAR82[58]), (VAR61[58] ^ VAR82[57]), (VAR61[57] ^ VAR82[56]), (VAR61[56] ^ VAR82[55]), (VAR61[55] ^ VAR82[54]), (VAR61[54] ^ VAR82[53]), (VAR61[53] ^ VAR82[52]), (VAR61[52] ^ VAR82[51]), (VAR61[51] ^ VAR82[50]), (VAR61[50] ^ VAR82[49]), (VAR61[49] ^ VAR82[48]), (VAR61[48] ^ VAR82[47]), (VAR61[47] ^ VAR82[46]), (VAR61[46] ^ VAR82[45]), (VAR61[45] ^ VAR82[44]), (VAR61[44] ^ VAR82[43]), (VAR61[43] ^ VAR82[42]), (VAR61[42] ^ VAR82[41]), (VAR61[41] ^ VAR82[40]), (VAR61[40] ^ VAR82[39]), (VAR61[39] ^ VAR82[38]), (VAR61[38] ^ VAR82[37]), (VAR61[37] ^ VAR82[36]), (VAR61[36] ^ VAR82[35]), (VAR61[35] ^ VAR82[34]), (VAR61[34] ^ VAR82[33]), (VAR61[33] ^ VAR82[32]), (VAR61[32] ^ VAR82[31]), (VAR61[31] ^ VAR82[30]), (VAR61[30] ^ VAR82[29]), (VAR61[29] ^ VAR82[28]), (VAR61[28] ^ VAR82[27]), (VAR61[27] ^ VAR82[26]), (VAR61[26] ^ VAR82[25]), (VAR61[25] ^ VAR82[24]), (VAR61[24] ^ VAR82[23]), (VAR61[23] ^ VAR82[22]), (VAR61[22] ^ VAR82[21]), (VAR61[21] ^
VAR82[20]), (VAR61[20] ^ VAR82[19]), (VAR61[19] ^ VAR82[18]), (VAR61[18] ^ VAR82[17]), (VAR61[17] ^ VAR82[16]), (VAR61[16] ^ VAR82[15]), (VAR61[15] ^ VAR82[14]), (VAR61[14] ^ VAR82[13]), (VAR61[13] ^ VAR82[12]), (VAR61[12] ^ VAR82[11]), (VAR61[11] ^ VAR82[10]), (VAR61[10] ^ VAR82[9]), (VAR61[9] ^ VAR82[8]), (VAR61[8] ^ VAR82[7]), (VAR61[7] ^ VAR82[6]), (VAR61[6] ^ VAR82[5]), (VAR61[5] ^ VAR82[4]), (VAR61[4] ^ VAR82[3]), (VAR61[3] ^ VAR82[2]), (VAR61[2] ^ VAR82[1]), (VAR61[1] ^ VAR82[0]), (VAR61[71] ^ VAR61[0])},
VAR142 = {(VAR142[5] | VAR192[64]), (VAR142[4] | VAR192[32]), (VAR142[3] | VAR192[16]), (VAR142[2] | VAR192[8]), (VAR142[1] | VAR192[4]), (VAR142[0] | VAR192[2]), VAR192[1]},
VAR233 = VAR239,
VAR239 = {VAR19, VAR139, VAR213, VAR93, VAR125, VAR114, VAR4, VAR242, VAR23, VAR171, VAR33, VAR179, VAR90, VAR246, VAR216, VAR5, VAR25, VAR40, VAR135, VAR132, VAR78, VAR152, VAR200, VAR249, VAR240, VAR225, VAR218, VAR1, VAR30, VAR84, VAR68, VAR88, VAR51, VAR159, VAR3, VAR124, VAR77, VAR70, VAR183, VAR115, VAR153, VAR143, VAR9, VAR65, VAR137, VAR127, VAR17, VAR96, VAR220, VAR187, VAR234, VAR56, VAR38, VAR156, VAR147, VAR119, VAR163, VAR80, VAR29, VAR226, VAR54, VAR26, VAR168, VAR161},
VAR189 = VAR237[5],
VAR131 = VAR162[7],
VAR237 = {(VAR237[4] | VAR162[6]), (VAR237[3] | VAR162[5]), (VAR237[2] | VAR162[4]), (VAR237[1] | VAR162[3]), (VAR237[0] | VAR162[2]), (VAR162[0] | VAR162[1])},
VAR162 = {VAR82[70], VAR113[6], VAR99[30], VAR104[1], VAR63[3], VAR215[8], VAR210[17], VAR83[35]};
endmodule
module MODULE1 (
VAR121,
VAR14,
VAR94,
VAR193,
VAR233);
input [71:0] VAR121;
output VAR14;
output VAR94;
output VAR193;
output [63:0] VAR233;
wire VAR219;
wire VAR41;
wire VAR37;
wire [63:0] VAR18;
wire VAR94 = VAR219;
wire VAR193 = VAR41;
wire VAR14 = VAR37;
wire [63:0] VAR233 = VAR18[63:0];
MODULE3 MODULE2 (
.VAR121 (VAR121),
.VAR94 (VAR219),
.VAR193 (VAR41),
.VAR14 (VAR37),
.VAR233 (VAR18));
endmodule
|
lgpl-3.0
|
trivoldus28/pulsarch-verilog
|
design/sys/iop/dram/rtl/dram_mem.v
| 6,531 |
module MODULE1 (
VAR3, VAR6,
VAR23, VAR16, VAR20, VAR34, clk,
VAR13, VAR15, VAR28, VAR12
);
output [255:0] VAR3;
output [64:0] VAR6;
input [4:0] VAR23; input [3:0] VAR16;
input [63:0] VAR20;
input VAR34;
input clk;
input [3:0] VAR13;
input [4:0] VAR15;
input VAR28;
input VAR12;
wire VAR29;
wire VAR14;
wire VAR33;
wire VAR2;
wire VAR11;
wire [64:0] VAR24;
wire [64:0] VAR17;
wire [64:0] VAR26;
VAR31 VAR7(
.VAR1 (VAR1),
.do ({VAR29, VAR3[63:0]}), .VAR6(VAR6[64:0]),
.VAR27 (VAR34), .VAR4 (clk), .VAR21 (VAR23[4]), .VAR19 (VAR13[0]), .VAR9 (VAR28), .VAR25(VAR12), .VAR22 (1'b0), .VAR15 (VAR15[4:0]),
.VAR10 (VAR23[3:0]), .VAR8 (VAR16[3:0]), .VAR5 ({1'b0, VAR20[63:0]}), .VAR11 (VAR11));
VAR31 VAR32(
.VAR1 (VAR1),
.do ({VAR14, VAR3[127:64]}), .VAR6(VAR24[64:0]),
.VAR27 (VAR34), .VAR4 (clk), .VAR21 (VAR23[4]), .VAR19 (VAR13[1]), .VAR9 (VAR28), .VAR25(VAR12), .VAR22 (1'b0), .VAR15 (VAR15[4:0]),
.VAR10 (VAR23[3:0]), .VAR8 (VAR16[3:0]), .VAR5 ({1'b0, VAR20[63:0]}), .VAR11 (VAR11));
VAR31 VAR30(
.VAR1 (VAR1),
.do ({VAR33, VAR3[191:128]}), .VAR6(VAR17[64:0]),
.VAR27 (VAR34), .VAR4 (clk), .VAR21 (VAR23[4]), .VAR19 (VAR13[2]), .VAR9 (VAR28), .VAR25(VAR12), .VAR22 (1'b0), .VAR15 (VAR15[4:0]),
.VAR10 (VAR23[3:0]), .VAR8 (VAR16[3:0]), .VAR5 ({1'b0, VAR20[63:0]}), .VAR11 (VAR11));
VAR31 VAR18(
.VAR1 (VAR1),
.do ({VAR2, VAR3[255:192]}), .VAR6(VAR26[64:0]),
.VAR27 (VAR34), .VAR4 (clk), .VAR21 (VAR23[4]), .VAR19 (VAR13[3]), .VAR9 (VAR28), .VAR25(VAR12), .VAR22 (1'b0), .VAR15 (VAR15[4:0]),
.VAR10 (VAR23[3:0]), .VAR8 (VAR16[3:0]), .VAR5 ({1'b0, VAR20[63:0]}), .VAR11 (VAR11));
endmodule
|
gpl-2.0
|
scalable-networks/ext
|
uhd/fpga/usrp2/gpif/gpmc16_to_fifo36.v
| 2,190 |
module MODULE1
parameter VAR25 = 9,
parameter VAR44 = 128
)
(
input VAR6, input VAR27,
input [15:0] VAR5,
input valid,
output reg ready,
input VAR9, input VAR23,
output [35:0] VAR35,
output VAR31,
input VAR26
);
wire [35:0] VAR43;
wire VAR21, VAR10;
wire [18:0] VAR38;
wire VAR20, VAR30;
wire [15:0] VAR1;
always @(posedge VAR6)
ready <= (VAR1 >= VAR44/2);
VAR7 VAR7
(.clk(VAR6), .reset(VAR27), .VAR24(1'b0),
.VAR40(VAR5), .VAR29(valid), .VAR45(),
.VAR39(VAR38), .VAR19(VAR20), .VAR42(VAR30));
VAR37 #(.VAR33(1)) VAR32
(.clk(VAR6), .reset(VAR27), .VAR24(1'b0),
.VAR28(VAR38), .VAR14(VAR20), .VAR2(VAR30),
.VAR22(VAR43), .VAR36(VAR21), .VAR41(VAR10));
VAR17 #(.VAR16(36), .VAR12(VAR25)) VAR18
(.VAR4(VAR6), .VAR3(VAR43), .VAR29(VAR21), .VAR45(VAR10), .VAR11(VAR1),
.VAR34(VAR9), .VAR13(VAR35), .VAR19(VAR31), .VAR42(VAR26), .VAR8(),
.VAR15(VAR23 | VAR27));
endmodule
|
gpl-2.0
|
everskar2013/PentiumX
|
Hardware/Code/led_Dev_IO.v
| 1,260 |
module MODULE1(
clk,
rst,
VAR1,
VAR6,
VAR4,
VAR2,
VAR3
);
input wire clk, rst, VAR1;
input wire [31: 0] VAR6;
output wire [ 7: 0] VAR2;
output reg [ 1: 0] VAR4 = 0;
output reg [21: 0] VAR3 = 0;
reg [ 7: 0] VAR5 = 0;
assign VAR2 = VAR5;
always @(negedge clk or posedge rst) begin
if( rst ) begin
VAR5 <= 8'hAA;
VAR4 <= 2'b00;
end
else begin
if( VAR1 )
{VAR3[21:0], VAR5, VAR4} <= VAR6;
end
else begin
VAR5 <= VAR5;
VAR4 <= VAR4;
end
end
end
endmodule
|
mit
|
google/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0
|
cells/nor2/gf180mcu_fd_sc_mcu7t5v0__nor2_4.functional.pp.v
| 1,066 |
module MODULE1( VAR6, VAR5, VAR7, VAR4, VAR2 );
input VAR7, VAR5;
inout VAR4, VAR2;
output VAR6;
wire VAR9;
not VAR8( VAR9, VAR7 );
wire VAR3;
not VAR1( VAR3, VAR5 );
and VAR10( VAR6, VAR9, VAR3 );
endmodule
|
apache-2.0
|
solowandererY2K/FPGA-Quantum-Compiler
|
src/squarer_bb.v
| 3,523 |
module MODULE1 (
VAR2,
VAR1);
input [39:0] VAR2;
output [79:0] VAR1;
endmodule
|
mit
|
glennchid/font5-firmware
|
src/verilog/synthesis/data_processing.v
| 28,330 |
module MODULE1(
input clk,
input rst,
input VAR15,
input [12:0] VAR88,
input [12:0] VAR37,
input [12:0] VAR18,
input [12:0] VAR50,
input VAR113,
input VAR64,
input VAR116,
input VAR77,
input VAR95,
input VAR107,
input [12:0] VAR20,
input [6:0] VAR90,
input [14:0] VAR3,
input VAR60,
input [6:0] VAR108,
input [14:0] VAR48,
input VAR82,
input [12:0] VAR86,
input [12:0] VAR73,
input [6:0] VAR21,
output [6:0] VAR81,
output [6:0] VAR23,
output reg [12:0] VAR59,
output reg VAR11
);
reg [12:0] VAR104, VAR96, VAR40, VAR36;
reg [12:0] VAR27, VAR38, VAR61, VAR89;
reg [6:0] VAR78, VAR14;
always @(posedge clk or posedge rst) begin
if (rst) begin
VAR104 <= 0;
VAR40 <= 0;
VAR96 <= 0;
VAR36 <= 0;
VAR27 <= 0;
VAR61 <= 0;
VAR38 <= 0;
VAR89 <= 0;
VAR78 <= 0;
VAR14 <= 0;
end else begin
VAR104 <= VAR86;
VAR40 <= VAR73;
VAR96 <= VAR104;
VAR36 <= VAR40;
VAR27 <= VAR96;
VAR61 <= VAR36;
VAR38 <= VAR27;
VAR89 <= VAR61;
VAR78 <= VAR21;
VAR14 <= VAR78;
end
end
wire VAR72;
reg VAR12, VAR109, VAR80, VAR99, VAR55, VAR35, VAR102, VAR58;
always @(posedge clk or posedge rst) begin
if (rst) begin
VAR12 <= 0;
VAR109 <= 0;
VAR80 <= 0;
VAR99 <= 0;
VAR55 <= 0;
VAR35 <= 0;
VAR102 <= 0;
VAR58 <= 0;
end else begin
VAR12 <= VAR116 | VAR72;
VAR109 <= VAR12;
VAR80 <= VAR109;
VAR99 <= VAR80;
VAR55 <= VAR99;
VAR35 <= VAR55;
VAR102 <= VAR35;
VAR58 <= VAR102;
end
end
reg VAR52, VAR63, VAR105, VAR24, VAR4, VAR87, VAR54, VAR46;
always @(posedge clk or posedge rst) begin
if (rst) begin
VAR52 <= 0;
VAR63 <= 0;
VAR105 <= 0;
VAR24 <= 0;
VAR4 <= 0;
VAR87 <= 0;
VAR54 <= 0;
VAR46 <= 0;
end else begin
VAR52 <= VAR64 | VAR72;
VAR63 <= VAR52;
VAR105 <= VAR63;
VAR24 <= VAR105;
VAR4 <= VAR24;
VAR87 <= VAR4;
VAR54 <= VAR87;
VAR46 <= VAR54;
end
end
reg VAR103, VAR92;
always@(posedge clk or posedge rst) begin
if (rst) begin
VAR103 <= 0;
VAR92 <= 0;
end else begin
VAR103 <= VAR113;
VAR92 <= VAR103;
end
end
assign VAR72 = ~VAR103 & VAR92;
reg [1:0] VAR32;
always @(posedge clk or posedge rst) begin
if (rst) begin
VAR32 <= 0;
end else begin
if (VAR72) begin
VAR32 <= 0;
end else begin
if (VAR102 & VAR113) begin
VAR32 <= VAR32 + 1;
end
end
end
end
wire [27:0] VAR91;
wire [20:0] VAR5;
assign VAR5 = VAR91[20:0];
VAR117 VAR112 (
.VAR16(clk),
.VAR17(), .VAR69(VAR88), .VAR62(1'b0), .VAR101(VAR91), .VAR100(VAR15),
.VAR45(VAR90), .VAR75(VAR3), .VAR51(VAR60), .VAR74(VAR81));
reg [20:0] VAR22;
always @(posedge clk) VAR22 <= VAR5;
reg [12:0] VAR30, VAR67;
always @(posedge clk or posedge rst) begin
if (rst) begin
VAR30 <= 0;
VAR67 <= 0;
end else begin
VAR30 <= VAR37;
VAR67 <= VAR30;
end
end
wire [47:0] VAR79;
VAR110 VAR7 (
.VAR41(VAR22),
.VAR1(VAR67),
.VAR57(1'b0),
.VAR26(clk),
.VAR25(48'b0),
.VAR42(VAR79)
);
reg [47:0] VAR84;
always @(posedge clk or posedge rst) begin
if (rst) begin
VAR84 <= 0;
end else begin
if (VAR72) begin
VAR84 <= 48'b0;
end else begin
if (VAR4 & VAR113) begin
VAR84 <= VAR79;
end
end
end
end
wire [27:0] VAR43;
wire [20:0] VAR68;
assign VAR68 = VAR43[20:0];
VAR117 VAR39 (
.VAR16(clk),
.VAR17(), .VAR69(VAR18), .VAR62(1'b0), .VAR101(VAR43), .VAR100(VAR15),
.VAR45(VAR108), .VAR75(VAR48), .VAR51(VAR82), .VAR74(VAR23));
reg [20:0] VAR49;
always @(posedge clk) VAR49 <= VAR68;
reg [12:0] VAR2, VAR76;
always @(posedge clk or posedge rst) begin
if (rst) begin
VAR2 <= 0;
VAR76 <= 0;
end else begin
VAR2 <= VAR50;
VAR76 <= VAR2;
end
end
wire [47:0] VAR85;
wire [47:0] VAR94;
VAR110 VAR29 (
.VAR41(VAR49),
.VAR1(VAR76),
.VAR57(1'b0),
.VAR26(clk),
.VAR25(VAR85),
.VAR42(VAR94)
);
wire [47:0] VAR53;
VAR110 VAR28 (
.VAR41(VAR49),
.VAR1(VAR76),
.VAR57(1'b0),
.VAR26(clk),
.VAR25(VAR84),
.VAR42(VAR53)
);
reg [47:0] VAR97;
reg [41:0] VAR33;
always @(posedge clk or posedge rst) begin
if (rst) begin
VAR97 <= 0;
VAR33 <= 0;
end else begin
if (VAR72) begin
VAR97 <= 48'b0;
VAR33 <= 29'b0;
end else begin
if (VAR55 & VAR113) begin
if (VAR95) begin
VAR97 <= VAR94;
end else begin
VAR97 <= 48'b0;
end
VAR33 <= VAR53[47:6];
end
end
end
end
wire [48:0] VAR66;
VAR98 VAR47 (
.clk(clk),
.VAR8(VAR33), .VAR44(VAR14), .VAR65(VAR66));
reg [47:0] VAR13;
always @(posedge clk or posedge rst) begin
if (rst) begin
VAR13 <= 0;
end else begin
case (VAR32)
2'd0: begin
if (VAR96[12]) begin
VAR13 <= {23'd8388607, VAR38, 12'b0};
end else begin
VAR13 <= {23'd0, VAR38, 12'b0};
end
end
2'd1: begin
if (VAR36[12]) begin
VAR13 <= {23'd8388607, VAR89, 12'b0};
end else begin
VAR13 <= {23'd0, VAR89, 12'b0};
end
end
endcase
end
end
wire [47:0] VAR10;
assign VAR10 = (VAR66[48] & ~VAR66[47]) ? {1'b1, 47'b0} :
(~VAR66[48] & VAR66[47]) ? {1'b0, 47'b1} :
VAR66[47:0];
wire [47:0] VAR93;
VAR56 VAR19 (
.VAR34(VAR10),
.VAR106(1'b1),
.VAR6(1'b1),
.VAR57(0),
.VAR26(clk),
.VAR25(VAR13),
.VAR42(VAR93)
);
wire [47:0] VAR9;
VAR56 VAR115 (
.VAR34(VAR97),
.VAR106(1'b1),
.VAR6(1'b1),
.VAR57(0),
.VAR26(clk),
.VAR25(VAR93),
.VAR42(VAR9)
);
VAR56 VAR83 (
.VAR34(VAR84),
.VAR106(1'b1),
.VAR6(1'b1),
.VAR57(0),
.VAR26(clk),
.VAR25(VAR9),
.VAR42(VAR85)
);
wire [35:0] VAR111;
assign VAR111 = VAR94[47:12];
reg [12:0] VAR31;
always @(VAR111) begin
VAR31 = 0; if (VAR111[35]) begin
if ( (~VAR111[34:12]) == 23'b0) begin
VAR31 = VAR111[12:0];
end else begin
VAR31 = 13'b1000000000000;
end
end else begin
if ( (VAR111[34:12]) == 23'b0) begin
VAR31 = VAR111[12:0];
end else begin
VAR31 = 13'b0111111111111;
end
end
end
wire [12:0] VAR114, VAR70;
assign VAR114 = VAR107 ? VAR20 : VAR31;
wire VAR71;
assign VAR71 = (~VAR113 | ~VAR77);
assign VAR70 = VAR71 ? 13'b0 : VAR114;
always @(posedge clk) if (VAR55) VAR59 <= VAR70;
always @(posedge clk) VAR11 <= VAR35 | VAR102;
endmodule
|
gpl-3.0
|
google/skywater-pdk-libs-sky130_fd_sc_ms
|
cells/nand4/sky130_fd_sc_ms__nand4.functional.v
| 1,312 |
module MODULE1 (
VAR2,
VAR5,
VAR8,
VAR1,
VAR7
);
output VAR2;
input VAR5;
input VAR8;
input VAR1;
input VAR7;
wire VAR6;
nand VAR3 (VAR6, VAR7, VAR1, VAR8, VAR5 );
buf VAR4 (VAR2 , VAR6 );
endmodule
|
apache-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_hd
|
cells/clkdlybuf4s15/sky130_fd_sc_hd__clkdlybuf4s15.blackbox.v
| 1,322 |
module MODULE1 (
VAR3,
VAR6
);
output VAR3;
input VAR6;
supply1 VAR4;
supply0 VAR1;
supply1 VAR5 ;
supply0 VAR2 ;
endmodule
|
apache-2.0
|
EliasVansteenkiste/ConnectionRouter
|
vtr_flow/benchmarks/arithmetic/generated_circuits/FIR_filters/verilog/fir_pipe_31.v
| 22,983 |
module MODULE3 (
clk,
reset,
VAR85,
VAR95,
VAR174,
VAR26,
VAR110
);
parameter VAR178 = 18;
parameter VAR92 = 31;
parameter VAR86 = 16;
localparam VAR140 = 37;
input clk;
input reset;
input VAR85;
input VAR95;
input [VAR178-1:0] VAR174; output VAR26;
output [VAR178-1:0] VAR110;
localparam VAR124 = 18; localparam VAR171 = 36; localparam VAR146 = 17;
localparam VAR63 = 31;
reg [VAR178-1:0] VAR129;
reg [VAR178-1:0] VAR109;
reg [VAR178-1:0] VAR89;
reg [VAR178-1:0] VAR179;
reg [VAR178-1:0] VAR142;
reg [VAR178-1:0] VAR112;
reg [VAR178-1:0] VAR5;
reg [VAR178-1:0] VAR71;
reg [VAR178-1:0] VAR184;
reg [VAR178-1:0] VAR104;
reg [VAR178-1:0] VAR101;
reg [VAR178-1:0] VAR2;
reg [VAR178-1:0] VAR82;
reg [VAR178-1:0] VAR67;
reg [VAR178-1:0] VAR76;
reg [VAR178-1:0] VAR53;
always@(posedge clk) begin
VAR129 <= 18'd88;
VAR109 <= 18'd0;
VAR89 <= -18'd97;
VAR179 <= -18'd197;
VAR142 <= -18'd294;
VAR112 <= -18'd380;
VAR5 <= -18'd447;
VAR71 <= -18'd490;
VAR184 <= -18'd504;
VAR104 <= -18'd481;
VAR101 <= -18'd420;
VAR2 <= -18'd319;
VAR82 <= -18'd178;
VAR67 <= 18'd0;
VAR76 <= 18'd212;
VAR53 <= 18'd451;
end
reg [VAR140-1:0] VAR91;
always@(posedge clk or posedge reset) begin
if(reset) begin
VAR91 <= 0;
end else begin
if(VAR85) begin
VAR91 <= {VAR91[VAR140-2:0], VAR95};
end else begin
VAR91 <= VAR91;
end
end
end
wire [VAR178-1:0] VAR149;
wire [VAR178-1:0] VAR108;
wire [VAR178-1:0] VAR175;
wire [VAR178-1:0] VAR43;
wire [VAR178-1:0] VAR38;
wire [VAR178-1:0] VAR159;
wire [VAR178-1:0] VAR181;
wire [VAR178-1:0] VAR141;
wire [VAR178-1:0] VAR18;
wire [VAR178-1:0] VAR28;
wire [VAR178-1:0] VAR162;
wire [VAR178-1:0] VAR121;
wire [VAR178-1:0] VAR185;
wire [VAR178-1:0] VAR97;
wire [VAR178-1:0] VAR156;
wire [VAR178-1:0] VAR79;
wire [VAR178-1:0] VAR102;
wire [VAR178-1:0] VAR143;
wire [VAR178-1:0] VAR33;
wire [VAR178-1:0] VAR19;
wire [VAR178-1:0] VAR47;
wire [VAR178-1:0] VAR50;
wire [VAR178-1:0] VAR173;
wire [VAR178-1:0] VAR145;
wire [VAR178-1:0] VAR57;
wire [VAR178-1:0] VAR58;
wire [VAR178-1:0] VAR27;
wire [VAR178-1:0] VAR176;
wire [VAR178-1:0] VAR98;
wire [VAR178-1:0] VAR119;
wire [VAR178-1:0] VAR103;
MODULE1 MODULE6(
.clk(clk), .VAR85(VAR85),
.VAR48(VAR174),
.VAR62(VAR149),
.VAR120(VAR108),
.VAR73(VAR175),
.VAR66(VAR43),
.VAR22(VAR38),
.VAR114(VAR159),
.VAR118(VAR181),
.VAR192(VAR141),
.VAR13(VAR18),
.VAR133(VAR28),
.VAR36(VAR162),
.VAR161(VAR121),
.VAR113(VAR185),
.VAR123(VAR97),
.VAR152(VAR156),
.VAR190(VAR79),
.VAR125(VAR102),
.VAR61(VAR143),
.VAR139(VAR33),
.VAR154(VAR19),
.VAR32(VAR47),
.VAR41(VAR50),
.VAR183(VAR173),
.VAR116(VAR145),
.VAR83(VAR57),
.VAR10(VAR58),
.VAR126(VAR27),
.VAR54(VAR176),
.VAR90(VAR98),
.VAR105(VAR119),
.VAR80(VAR103),
.reset(reset) );
wire [VAR178-1:0] VAR70;
wire [VAR178-1:0] VAR21;
wire [VAR178-1:0] VAR64;
wire [VAR178-1:0] VAR106;
wire [VAR178-1:0] VAR15;
wire [VAR178-1:0] VAR1;
wire [VAR178-1:0] VAR24;
wire [VAR178-1:0] VAR4;
wire [VAR178-1:0] VAR170;
wire [VAR178-1:0] VAR100;
wire [VAR178-1:0] VAR151;
wire [VAR178-1:0] VAR78;
wire [VAR178-1:0] VAR167;
wire [VAR178-1:0] VAR144;
wire [VAR178-1:0] VAR127;
wire [VAR178-1:0] VAR94;
MODULE2 VAR11(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR149),
.VAR93 (VAR103),
.VAR37(VAR70)
);
MODULE2 VAR180(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR108),
.VAR93 (VAR119),
.VAR37(VAR21)
);
MODULE2 VAR31(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR175),
.VAR93 (VAR98),
.VAR37(VAR64)
);
MODULE2 VAR155(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR43),
.VAR93 (VAR176),
.VAR37(VAR106)
);
MODULE2 VAR138(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR38),
.VAR93 (VAR27),
.VAR37(VAR15)
);
MODULE2 VAR39(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR159),
.VAR93 (VAR58),
.VAR37(VAR1)
);
MODULE2 VAR122(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR181),
.VAR93 (VAR57),
.VAR37(VAR24)
);
MODULE2 VAR72(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR141),
.VAR93 (VAR145),
.VAR37(VAR4)
);
MODULE2 VAR88(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR18),
.VAR93 (VAR173),
.VAR37(VAR170)
);
MODULE2 VAR9(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR28),
.VAR93 (VAR50),
.VAR37(VAR100)
);
MODULE2 VAR168(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR162),
.VAR93 (VAR47),
.VAR37(VAR151)
);
MODULE2 VAR77(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR121),
.VAR93 (VAR19),
.VAR37(VAR78)
);
MODULE2 VAR163(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR185),
.VAR93 (VAR33),
.VAR37(VAR167)
);
MODULE2 VAR153(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR97),
.VAR93 (VAR143),
.VAR37(VAR144)
);
MODULE2 VAR191(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR156),
.VAR93 (VAR102),
.VAR37(VAR127)
);
MODULE4 VAR60(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR79),
.VAR37(VAR94)
);
wire [VAR178-1:0] VAR128;
wire [VAR178-1:0] VAR158;
wire [VAR178-1:0] VAR20;
wire [VAR178-1:0] VAR117;
wire [VAR178-1:0] VAR115;
wire [VAR178-1:0] VAR165;
wire [VAR178-1:0] VAR8;
wire [VAR178-1:0] VAR6;
wire [VAR178-1:0] VAR148;
wire [VAR178-1:0] VAR107;
wire [VAR178-1:0] VAR56;
wire [VAR178-1:0] VAR169;
wire [VAR178-1:0] VAR157;
wire [VAR178-1:0] VAR136;
wire [VAR178-1:0] VAR177;
wire [VAR178-1:0] VAR12;
MODULE5 VAR111(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR70),
.VAR93 (VAR129),
.VAR37(VAR128)
);
MODULE5 VAR96(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR21),
.VAR93 (VAR109),
.VAR37(VAR158)
);
MODULE5 VAR134(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR64),
.VAR93 (VAR89),
.VAR37(VAR20)
);
MODULE5 VAR51(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR106),
.VAR93 (VAR179),
.VAR37(VAR117)
);
MODULE5 VAR44(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR15),
.VAR93 (VAR142),
.VAR37(VAR115)
);
MODULE5 VAR17(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR1),
.VAR93 (VAR112),
.VAR37(VAR165)
);
MODULE5 VAR164(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR24),
.VAR93 (VAR5),
.VAR37(VAR8)
);
MODULE5 VAR84(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR4),
.VAR93 (VAR71),
.VAR37(VAR6)
);
MODULE5 VAR46(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR170),
.VAR93 (VAR184),
.VAR37(VAR148)
);
MODULE5 VAR59(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR100),
.VAR93 (VAR104),
.VAR37(VAR107)
);
MODULE5 VAR189(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR151),
.VAR93 (VAR101),
.VAR37(VAR56)
);
MODULE5 VAR68(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR78),
.VAR93 (VAR2),
.VAR37(VAR169)
);
MODULE5 VAR23(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR167),
.VAR93 (VAR82),
.VAR37(VAR157)
);
MODULE5 VAR49(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR144),
.VAR93 (VAR67),
.VAR37(VAR136)
);
MODULE5 VAR35(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR127),
.VAR93 (VAR76),
.VAR37(VAR177)
);
MODULE5 VAR81(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR94),
.VAR93 (VAR53),
.VAR37(VAR12)
);
wire [VAR178-1:0] VAR52;
wire [VAR178-1:0] VAR55;
wire [VAR178-1:0] VAR172;
wire [VAR178-1:0] VAR160;
wire [VAR178-1:0] VAR166;
wire [VAR178-1:0] VAR130;
wire [VAR178-1:0] VAR30;
wire [VAR178-1:0] VAR29;
MODULE2 VAR99(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR128),
.VAR93 (VAR158),
.VAR37(VAR52)
);
MODULE2 VAR45(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR20),
.VAR93 (VAR117),
.VAR37(VAR55)
);
MODULE2 VAR135(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR115),
.VAR93 (VAR165),
.VAR37(VAR172)
);
MODULE2 VAR131(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR8),
.VAR93 (VAR6),
.VAR37(VAR160)
);
MODULE2 VAR150(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR148),
.VAR93 (VAR107),
.VAR37(VAR166)
);
MODULE2 VAR42(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR56),
.VAR93 (VAR169),
.VAR37(VAR130)
);
MODULE2 VAR187(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR157),
.VAR93 (VAR136),
.VAR37(VAR30)
);
MODULE2 VAR25(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR177),
.VAR93 (VAR12),
.VAR37(VAR29)
);
wire [VAR178-1:0] VAR182;
wire [VAR178-1:0] VAR188;
wire [VAR178-1:0] VAR74;
wire [VAR178-1:0] VAR7;
MODULE2 VAR40(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR52),
.VAR93 (VAR55),
.VAR37(VAR182)
);
MODULE2 VAR137(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR172),
.VAR93 (VAR160),
.VAR37(VAR188)
);
MODULE2 VAR14(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR166),
.VAR93 (VAR130),
.VAR37(VAR74)
);
MODULE2 VAR69(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR30),
.VAR93 (VAR29),
.VAR37(VAR7)
);
wire [VAR178-1:0] VAR3;
wire [VAR178-1:0] VAR16;
MODULE2 VAR132(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR182),
.VAR93 (VAR188),
.VAR37(VAR3)
);
MODULE2 VAR87(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR74),
.VAR93 (VAR7),
.VAR37(VAR16)
);
wire [VAR178-1:0] VAR34;
MODULE2 VAR186(
.clk(clk), .VAR85(VAR85),
.VAR75 (VAR3),
.VAR93 (VAR16),
.VAR37(VAR34)
);
assign VAR110 = VAR34;
assign VAR26 = VAR91[VAR140-1];
endmodule
module MODULE1 (
clk,
VAR85,
VAR48,
VAR62,
VAR120,
VAR73,
VAR66,
VAR22,
VAR114,
VAR118,
VAR192,
VAR13,
VAR133,
VAR36,
VAR161,
VAR113,
VAR123,
VAR152,
VAR190,
VAR125,
VAR61,
VAR139,
VAR154,
VAR32,
VAR41,
VAR183,
VAR116,
VAR83,
VAR10,
VAR126,
VAR54,
VAR90,
VAR105,
VAR80,
reset);
parameter VAR147 = 1;
input clk;
input VAR85;
input [VAR147-1:0] VAR48;
output [VAR147-1:0] VAR62;
output [VAR147-1:0] VAR120;
output [VAR147-1:0] VAR73;
output [VAR147-1:0] VAR66;
output [VAR147-1:0] VAR22;
output [VAR147-1:0] VAR114;
output [VAR147-1:0] VAR118;
output [VAR147-1:0] VAR192;
output [VAR147-1:0] VAR13;
output [VAR147-1:0] VAR133;
output [VAR147-1:0] VAR36;
output [VAR147-1:0] VAR161;
output [VAR147-1:0] VAR113;
output [VAR147-1:0] VAR123;
output [VAR147-1:0] VAR152;
output [VAR147-1:0] VAR190;
output [VAR147-1:0] VAR125;
output [VAR147-1:0] VAR61;
output [VAR147-1:0] VAR139;
output [VAR147-1:0] VAR154;
output [VAR147-1:0] VAR32;
output [VAR147-1:0] VAR41;
output [VAR147-1:0] VAR183;
output [VAR147-1:0] VAR116;
output [VAR147-1:0] VAR83;
output [VAR147-1:0] VAR10;
output [VAR147-1:0] VAR126;
output [VAR147-1:0] VAR54;
output [VAR147-1:0] VAR90;
output [VAR147-1:0] VAR105;
output [VAR147-1:0] VAR80;
reg [VAR147-1:0] VAR62;
reg [VAR147-1:0] VAR120;
reg [VAR147-1:0] VAR73;
reg [VAR147-1:0] VAR66;
reg [VAR147-1:0] VAR22;
reg [VAR147-1:0] VAR114;
reg [VAR147-1:0] VAR118;
reg [VAR147-1:0] VAR192;
reg [VAR147-1:0] VAR13;
reg [VAR147-1:0] VAR133;
reg [VAR147-1:0] VAR36;
reg [VAR147-1:0] VAR161;
reg [VAR147-1:0] VAR113;
reg [VAR147-1:0] VAR123;
reg [VAR147-1:0] VAR152;
reg [VAR147-1:0] VAR190;
reg [VAR147-1:0] VAR125;
reg [VAR147-1:0] VAR61;
reg [VAR147-1:0] VAR139;
reg [VAR147-1:0] VAR154;
reg [VAR147-1:0] VAR32;
reg [VAR147-1:0] VAR41;
reg [VAR147-1:0] VAR183;
reg [VAR147-1:0] VAR116;
reg [VAR147-1:0] VAR83;
reg [VAR147-1:0] VAR10;
reg [VAR147-1:0] VAR126;
reg [VAR147-1:0] VAR54;
reg [VAR147-1:0] VAR90;
reg [VAR147-1:0] VAR105;
reg [VAR147-1:0] VAR80;
input reset;
always@(posedge clk or posedge reset) begin
if(reset) begin
VAR62 <= 0;
VAR120 <= 0;
VAR73 <= 0;
VAR66 <= 0;
VAR22 <= 0;
VAR114 <= 0;
VAR118 <= 0;
VAR192 <= 0;
VAR13 <= 0;
VAR133 <= 0;
VAR36 <= 0;
VAR161 <= 0;
VAR113 <= 0;
VAR123 <= 0;
VAR152 <= 0;
VAR190 <= 0;
VAR125 <= 0;
VAR61 <= 0;
VAR139 <= 0;
VAR154 <= 0;
VAR32 <= 0;
VAR41 <= 0;
VAR183 <= 0;
VAR116 <= 0;
VAR83 <= 0;
VAR10 <= 0;
VAR126 <= 0;
VAR54 <= 0;
VAR90 <= 0;
VAR105 <= 0;
VAR80 <= 0;
end else begin
if(VAR85) begin
VAR62 <= VAR48;
VAR120 <= VAR62;
VAR73 <= VAR120;
VAR66 <= VAR73;
VAR22 <= VAR66;
VAR114 <= VAR22;
VAR118 <= VAR114;
VAR192 <= VAR118;
VAR13 <= VAR192;
VAR133 <= VAR13;
VAR36 <= VAR133;
VAR161 <= VAR36;
VAR113 <= VAR161;
VAR123 <= VAR113;
VAR152 <= VAR123;
VAR190 <= VAR152;
VAR125 <= VAR190;
VAR61 <= VAR125;
VAR139 <= VAR61;
VAR154 <= VAR139;
VAR32 <= VAR154;
VAR41 <= VAR32;
VAR183 <= VAR41;
VAR116 <= VAR183;
VAR83 <= VAR116;
VAR10 <= VAR83;
VAR126 <= VAR10;
VAR54 <= VAR126;
VAR90 <= VAR54;
VAR105 <= VAR90;
VAR80 <= VAR105;
end end
end
endmodule
module MODULE2 (
clk,
VAR85,
VAR75,
VAR93,
VAR37);
input clk;
input VAR85;
input [17:0] VAR75;
input [17:0] VAR93;
output [17:0] VAR37;
reg [17:0] VAR37;
always @(posedge clk) begin
if(VAR85) begin
VAR37 <= VAR75 + VAR93;
end
end
endmodule
module MODULE5 (
clk,
VAR85,
VAR75,
VAR93,
VAR37);
input clk;
input VAR85;
input [17:0] VAR75;
input [17:0] VAR93;
output [17:0] VAR37;
reg [17:0] VAR37;
always @(posedge clk) begin
if(VAR85) begin
VAR37 <= VAR75 * VAR93;
end
end
endmodule
module MODULE4 (
clk,
VAR85,
VAR75,
VAR37);
input clk;
input VAR85;
input [17:0] VAR75;
output [17:0] VAR37;
reg [17:0] VAR37;
always @(posedge clk) begin
if(VAR85) begin
VAR37 <= VAR75;
end
end
endmodule
|
mit
|
andrewandrepowell/zybo_petalinux
|
zybo_petalinux_vga/zybo_petalinux_vga.srcs/sources_1/bd/block_design/ip/block_design_xbar_0/synth/block_design_xbar_0.v
| 13,320 |
module MODULE1 (
VAR25,
VAR8,
VAR58,
VAR123,
VAR72,
VAR71,
VAR30,
VAR127,
VAR47,
VAR125,
VAR69,
VAR110,
VAR122,
VAR45,
VAR118,
VAR103,
VAR76,
VAR49,
VAR41,
VAR14,
VAR15,
VAR97,
VAR67,
VAR126,
VAR120,
VAR81,
VAR62,
VAR50,
VAR132,
VAR40,
VAR12,
VAR59,
VAR94,
VAR11,
VAR89,
VAR1,
VAR38,
VAR52,
VAR5,
VAR4
);
input wire VAR25;
input wire VAR8;
input wire [31 : 0] VAR58;
input wire [2 : 0] VAR123;
input wire [0 : 0] VAR72;
output wire [0 : 0] VAR71;
input wire [31 : 0] VAR30;
input wire [3 : 0] VAR127;
input wire [0 : 0] VAR47;
output wire [0 : 0] VAR125;
output wire [1 : 0] VAR69;
output wire [0 : 0] VAR110;
input wire [0 : 0] VAR122;
input wire [31 : 0] VAR45;
input wire [2 : 0] VAR118;
input wire [0 : 0] VAR103;
output wire [0 : 0] VAR76;
output wire [31 : 0] VAR49;
output wire [1 : 0] VAR41;
output wire [0 : 0] VAR14;
input wire [0 : 0] VAR15;
output wire [63 : 0] VAR97;
output wire [5 : 0] VAR67;
output wire [1 : 0] VAR126;
input wire [1 : 0] VAR120;
output wire [63 : 0] VAR81;
output wire [7 : 0] VAR62;
output wire [1 : 0] VAR50;
input wire [1 : 0] VAR132;
input wire [3 : 0] VAR40;
input wire [1 : 0] VAR12;
output wire [1 : 0] VAR59;
output wire [63 : 0] VAR94;
output wire [5 : 0] VAR11;
output wire [1 : 0] VAR89;
input wire [1 : 0] VAR1;
input wire [63 : 0] VAR38;
input wire [3 : 0] VAR52;
input wire [1 : 0] VAR5;
output wire [1 : 0] VAR4;
VAR33 #(
.VAR63("VAR9"),
.VAR117(1),
.VAR31(2),
.VAR77(1),
.VAR19(32),
.VAR65(32),
.VAR98(2),
.VAR109(1),
.VAR32(128'VAR70),
.VAR104(64'VAR68),
.VAR115(32'VAR3),
.VAR88(32'VAR102),
.VAR75(0),
.VAR130(1),
.VAR131(1),
.VAR93(1),
.VAR16(1),
.VAR37(1),
.VAR28(64'VAR34),
.VAR60(64'VAR34),
.VAR53(0),
.VAR108(32'VAR55),
.VAR82(32'VAR55),
.VAR57(32'VAR55),
.VAR90(64'VAR44),
.VAR100(64'VAR44),
.VAR56(32'VAR3),
.VAR54(32'VAR3),
.VAR18(0)
) VAR79 (
.VAR25(VAR25),
.VAR8(VAR8),
.VAR124(1'VAR80),
.VAR58(VAR58),
.VAR106(8'VAR17),
.VAR133(3'VAR80),
.VAR105(2'VAR80),
.VAR46(1'VAR80),
.VAR7(4'VAR80),
.VAR123(VAR123),
.VAR23(4'VAR80),
.VAR74(1'VAR80),
.VAR72(VAR72),
.VAR71(VAR71),
.VAR91(1'VAR80),
.VAR30(VAR30),
.VAR127(VAR127),
.VAR86(1'VAR66),
.VAR92(1'VAR80),
.VAR47(VAR47),
.VAR125(VAR125),
.VAR6(),
.VAR69(VAR69),
.VAR85(),
.VAR110(VAR110),
.VAR122(VAR122),
.VAR51(1'VAR80),
.VAR45(VAR45),
.VAR22(8'VAR17),
.VAR64(3'VAR80),
.VAR114(2'VAR80),
.VAR87(1'VAR80),
.VAR29(4'VAR80),
.VAR118(VAR118),
.VAR83(4'VAR80),
.VAR112(1'VAR80),
.VAR103(VAR103),
.VAR76(VAR76),
.VAR129(),
.VAR49(VAR49),
.VAR41(VAR41),
.VAR111(),
.VAR26(),
.VAR14(VAR14),
.VAR15(VAR15),
.VAR13(),
.VAR97(VAR97),
.VAR113(),
.VAR128(),
.VAR27(),
.VAR20(),
.VAR78(),
.VAR67(VAR67),
.VAR95(),
.VAR43(),
.VAR119(),
.VAR126(VAR126),
.VAR120(VAR120),
.VAR61(),
.VAR81(VAR81),
.VAR62(VAR62),
.VAR39(),
.VAR107(),
.VAR50(VAR50),
.VAR132(VAR132),
.VAR99(2'VAR80),
.VAR40(VAR40),
.VAR48(2'VAR80),
.VAR12(VAR12),
.VAR59(VAR59),
.VAR73(),
.VAR94(VAR94),
.VAR10(),
.VAR2(),
.VAR36(),
.VAR35(),
.VAR84(),
.VAR11(VAR11),
.VAR21(),
.VAR96(),
.VAR24(),
.VAR89(VAR89),
.VAR1(VAR1),
.VAR116(2'VAR80),
.VAR38(VAR38),
.VAR52(VAR52),
.VAR101(2'VAR42),
.VAR121(2'VAR80),
.VAR5(VAR5),
.VAR4(VAR4)
);
endmodule
|
gpl-3.0
|
google/skywater-pdk-libs-sky130_fd_sc_hdll
|
cells/xnor3/sky130_fd_sc_hdll__xnor3.functional.v
| 1,308 |
module MODULE1 (
VAR5,
VAR2,
VAR4,
VAR6
);
output VAR5;
input VAR2;
input VAR4;
input VAR6;
wire VAR3;
xnor VAR7 (VAR3, VAR2, VAR4, VAR6 );
buf VAR1 (VAR5 , VAR3 );
endmodule
|
apache-2.0
|
franmolinaca/papiGB
|
rtl/bios.v
| 8,057 |
module MODULE1
(
input wire VAR3,
input wire [7:0] VAR2,
output reg [7:0] VAR1
);
always @ ( posedge VAR3 )
begin
case ( VAR2 )
8'd0: VAR1 = 8'h31;
8'd1: VAR1 = 8'hFE;
8'd2 : VAR1 = 8'hFF;
8'd3 : VAR1 = 8'hAF;
8'd4 : VAR1 = 8'h21;
8'd5 : VAR1 = 8'hFF;
8'd6 : VAR1 = 8'h9F;
8'd7 : VAR1 = 8'h32;
8'd8 : VAR1 = 8'hCB;
8'd9 : VAR1 = 8'h7C;
8'd10 : VAR1 = 8'h20;
8'd11 : VAR1 = 8'hFB;
8'd12 : VAR1 = 8'h21;
8'd13 : VAR1 = 8'h26;
8'd14 : VAR1 = 8'hFF;
8'd15 : VAR1 = 8'h0E;
8'd16 : VAR1 = 8'h11;
8'd17 : VAR1 = 8'h3E;
8'd18 : VAR1 = 8'h80;
8'd19 : VAR1 = 8'h32;
8'd20 : VAR1 = 8'hE2;
8'd21 : VAR1 = 8'h0C;
8'd22 : VAR1 = 8'h3E;
8'd23 : VAR1 = 8'hF3;
8'd24 : VAR1 = 8'hE2;
8'd25 : VAR1 = 8'h32;
8'd26 : VAR1 = 8'h3E;
8'd27 : VAR1 = 8'h77;
8'd28 : VAR1 = 8'h77;
8'd29 : VAR1 = 8'h3E;
8'd30 : VAR1 = 8'hFC;
8'd31 : VAR1 = 8'hE0;
8'd32 : VAR1 = 8'h47;
8'd33 : VAR1 = 8'h11;
8'd34 : VAR1 = 8'h04;
8'd35 : VAR1 = 8'h01;
8'd36 : VAR1 = 8'h21;
8'd37 : VAR1 = 8'h10;
8'd38 : VAR1 = 8'h80;
8'd39 : VAR1 = 8'h1A;
8'd40 : VAR1 = 8'hCD;
8'd41 : VAR1 = 8'h95;
8'd42 : VAR1 = 8'h00;
8'd43 : VAR1 = 8'hCD;
8'd44 : VAR1 = 8'h96;
8'd45 : VAR1 = 8'h00;
8'd46 : VAR1 = 8'h13;
8'd47 : VAR1 = 8'h7B;
8'd48 : VAR1 = 8'hFE;
8'd49 : VAR1 = 8'h34;
8'd50 : VAR1 = 8'h20;
8'd51 : VAR1 = 8'hF3;
8'd52 : VAR1 = 8'h11;
8'd53 : VAR1 = 8'hD8;
8'd54 : VAR1 = 8'h00;
8'd55 : VAR1 = 8'h06;
8'd56 : VAR1 = 8'h08;
8'd57 : VAR1 = 8'h1A;
8'd58 : VAR1 = 8'h13;
8'd59 : VAR1 = 8'h22;
8'd60 : VAR1 = 8'h23;
8'd61 : VAR1 = 8'h05;
8'd62 : VAR1 = 8'h20;
8'd63 : VAR1 = 8'hF9;
8'd64 : VAR1 = 8'h3E;
8'd65 : VAR1 = 8'h19;
8'd66 : VAR1 = 8'hEA;
8'd67 : VAR1 = 8'h10;
8'd68 : VAR1 = 8'h99;
8'd69 : VAR1 = 8'h21;
8'd70 : VAR1 = 8'h2F;
8'd71 : VAR1 = 8'h99;
8'd72 : VAR1 = 8'h0E;
8'd73 : VAR1 = 8'h0C;
8'd74 : VAR1 = 8'h3D;
8'd75 : VAR1 = 8'h28;
8'd76 : VAR1 = 8'h08;
8'd77 : VAR1 = 8'h32;
8'd78 : VAR1 = 8'h0D;
8'd79 : VAR1 = 8'h20;
8'd80 : VAR1 = 8'hF9;
8'd81 : VAR1 = 8'h2E;
8'd82 : VAR1 = 8'h0F;
8'd83 : VAR1 = 8'h18;
8'd84 : VAR1 = 8'hF3;
8'd85 : VAR1 = 8'h67;
8'd86 : VAR1 = 8'h3E;
8'd87 : VAR1 = 8'h64;
8'd88 : VAR1 = 8'h57;
8'd89 : VAR1 = 8'hE0;
8'd90 : VAR1 = 8'h42;
8'd91 : VAR1 = 8'h3E;
8'd92 : VAR1 = 8'h91;
8'd93 : VAR1 = 8'hE0;
8'd94 : VAR1 = 8'h40;
8'd95 : VAR1 = 8'h04;
8'd96 : VAR1 = 8'h1E;
8'd97 : VAR1 = 8'h02;
8'd98 : VAR1 = 8'h0E;
8'd99 : VAR1 = 8'h0C;
8'd100 : VAR1 = 8'hF0;
8'd101 : VAR1 = 8'h44;
8'd102 : VAR1 = 8'hFE;
8'd103 : VAR1 = 8'h90;
8'd104 : VAR1 = 8'h20;
8'd105 : VAR1 = 8'hFA;
8'd106 : VAR1 = 8'h0D;
8'd107 : VAR1 = 8'h20;
8'd108 : VAR1 = 8'hF7;
8'd109 : VAR1 = 8'h1D;
8'd110 : VAR1 = 8'h20;
8'd111 : VAR1 = 8'hF2;
8'd112 : VAR1 = 8'h0E;
8'd113 : VAR1 = 8'h13;
8'd114 : VAR1 = 8'h24;
8'd115 : VAR1 = 8'h7C;
8'd116 : VAR1 = 8'h1E;
8'd117 : VAR1 = 8'h83;
8'd118 : VAR1 = 8'hFE;
8'd119 : VAR1 = 8'h62;
8'd120 : VAR1 = 8'h28;
8'd121 : VAR1 = 8'h06;
8'd122 : VAR1 = 8'h1E;
8'd123 : VAR1 = 8'hC1;
8'd124 : VAR1 = 8'hFE;
8'd125 : VAR1 = 8'h64;
8'd126 : VAR1 = 8'h20;
8'd127 : VAR1 = 8'h06;
8'd128 : VAR1 = 8'h7B;
8'd129 : VAR1 = 8'hE2;
8'd130 : VAR1 = 8'h0C;
8'd131 : VAR1 = 8'h3E;
8'd132 : VAR1 = 8'h87;
8'd133 : VAR1 = 8'hF2;
8'd134 : VAR1 = 8'hF0;
8'd135 : VAR1 = 8'h42;
8'd136 : VAR1 = 8'h90;
8'd137 : VAR1 = 8'hE0;
8'd138 : VAR1 = 8'h42;
8'd139 : VAR1 = 8'h15;
8'd140 : VAR1 = 8'h20;
8'd141 : VAR1 = 8'hD2;
8'd142 : VAR1 = 8'h05;
8'd143 : VAR1 = 8'h20;
8'd144 : VAR1 = 8'h4F;
8'd145 : VAR1 = 8'h16;
8'd146 : VAR1 = 8'h20;
8'd147 : VAR1 = 8'h18;
8'd148 : VAR1 = 8'hCB;
8'd149 : VAR1 = 8'h4F;
8'd150 : VAR1 = 8'h06;
8'd151 : VAR1 = 8'h04;
8'd152 : VAR1 = 8'hC5;
8'd153 : VAR1 = 8'hCB;
8'd154 : VAR1 = 8'h11;
8'd155 : VAR1 = 8'h17;
8'd156 : VAR1 = 8'hC1;
8'd157 : VAR1 = 8'hCB;
8'd158 : VAR1 = 8'h11;
8'd159 : VAR1 = 8'h17;
8'd160 : VAR1 = 8'h05;
8'd161 : VAR1 = 8'h20;
8'd162 : VAR1 = 8'hF5;
8'd163 : VAR1 = 8'h22;
8'd164 : VAR1 = 8'h23;
8'd165 : VAR1 = 8'h22;
8'd166 : VAR1 = 8'h23;
8'd167 : VAR1 = 8'hC9;
8'd168 : VAR1 = 8'hCE;
8'd169 : VAR1 = 8'hED;
8'd170 : VAR1 = 8'h66;
8'd171 : VAR1 = 8'h66;
8'd172 : VAR1 = 8'hCC;
8'd173 : VAR1 = 8'h0D;
8'd174 : VAR1 = 8'h00;
8'd175 : VAR1 = 8'h0B;
8'd176 : VAR1 = 8'h03;
8'd177 : VAR1 = 8'h73;
8'd178 : VAR1 = 8'h00;
8'd179 : VAR1 = 8'h83;
8'd180 : VAR1 = 8'h00;
8'd181 : VAR1 = 8'h0C;
8'd182 : VAR1 = 8'h00;
8'd183 : VAR1 = 8'h0D;
8'd184 : VAR1 = 8'h00;
8'd185 : VAR1 = 8'h08;
8'd186 : VAR1 = 8'h11;
8'd187 : VAR1 = 8'h1F;
8'd188 : VAR1 = 8'h88;
8'd189 : VAR1 = 8'h89;
8'd190 : VAR1 = 8'h00;
8'd191 : VAR1 = 8'h0E;
8'd192 : VAR1 = 8'hDC;
8'd193 : VAR1 = 8'hCC;
8'd194 : VAR1 = 8'h6E;
8'd195 : VAR1 = 8'hE6;
8'd196 : VAR1 = 8'hDD;
8'd197 : VAR1 = 8'hDD;
8'd198 : VAR1 = 8'hD9;
8'd199 : VAR1 = 8'h99;
8'd200 : VAR1 = 8'hBB;
8'd201 : VAR1 = 8'hBB;
8'd202 : VAR1 = 8'h67;
8'd203 : VAR1 = 8'h63;
8'd204 : VAR1 = 8'h6E;
8'd205 : VAR1 = 8'h0E;
8'd206 : VAR1 = 8'hEC;
8'd207 : VAR1 = 8'hCC;
8'd208 : VAR1 = 8'hDD;
8'd209 : VAR1 = 8'hDC;
8'd210 : VAR1 = 8'h99;
8'd211 : VAR1 = 8'h9F;
8'd212 : VAR1 = 8'hBB;
8'd213 : VAR1 = 8'hB9;
8'd214 : VAR1 = 8'h33;
8'd215 : VAR1 = 8'h3E;
8'd216 : VAR1 = 8'h3c;
8'd217 : VAR1 = 8'h42;
8'd218 : VAR1 = 8'hB9;
8'd219 : VAR1 = 8'hA5;
8'd220 : VAR1 = 8'hB9;
8'd221 : VAR1 = 8'hA5;
8'd222 : VAR1 = 8'h42;
8'd223 : VAR1 = 8'h3C;
8'd224 : VAR1 = 8'h21;
8'd225 : VAR1 = 8'h04;
8'd226 : VAR1 = 8'h01;
8'd227 : VAR1 = 8'h11;
8'd228 : VAR1 = 8'hA8;
8'd229 : VAR1 = 8'h00;
8'd230 : VAR1 = 8'h1A;
8'd231 : VAR1 = 8'h13;
8'd232 : VAR1 = 8'hBE;
8'd233 : VAR1 = 8'h20;
8'd234 : VAR1 = 8'hFE;
8'd235 : VAR1 = 8'h23;
8'd236 : VAR1 = 8'h7D;
8'd237 : VAR1 = 8'hFE;
8'd238 : VAR1 = 8'h34;
8'd239 : VAR1 = 8'h20;
8'd240 : VAR1 = 8'hF5;
8'd241 : VAR1 = 8'h06;
8'd242 : VAR1 = 8'h19;
8'd243 : VAR1 = 8'h78;
8'd244 : VAR1 = 8'h86;
8'd245 : VAR1 = 8'h23;
8'd246 : VAR1 = 8'h05;
8'd247 : VAR1 = 8'h20;
8'd248 : VAR1 = 8'hFB;
8'd249 : VAR1 = 8'h86;
8'd250 : VAR1 = 8'h20;
8'd251 : VAR1 = 8'hFE;
8'd252 : VAR1 = 8'h3E;
8'd253 : VAR1 = 8'h01;
8'd254 : VAR1 = 8'hE0;
8'd255 : VAR1 = 8'h50;
default:
VAR1 = 8'h0;
endcase
end
endmodule
|
gpl-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_ls
|
cells/o221ai/sky130_fd_sc_ls__o221ai.functional.pp.v
| 2,212 |
module MODULE1 (
VAR3 ,
VAR1 ,
VAR18 ,
VAR4 ,
VAR11 ,
VAR16 ,
VAR15,
VAR17,
VAR7 ,
VAR6
);
output VAR3 ;
input VAR1 ;
input VAR18 ;
input VAR4 ;
input VAR11 ;
input VAR16 ;
input VAR15;
input VAR17;
input VAR7 ;
input VAR6 ;
wire VAR2 ;
wire VAR12 ;
wire VAR14 ;
wire VAR13;
or VAR19 (VAR2 , VAR11, VAR4 );
or VAR9 (VAR12 , VAR18, VAR1 );
nand VAR8 (VAR14 , VAR12, VAR2, VAR16 );
VAR10 VAR5 (VAR13, VAR14, VAR15, VAR17);
buf VAR20 (VAR3 , VAR13 );
endmodule
|
apache-2.0
|
DreamSourceLab/DSLogic-hdl
|
src/sdramc/sdram_io.v
| 4,118 |
module MODULE1 (
input VAR39,
input [12:0] VAR26,
input [1:0] VAR56,
input [15:0] VAR40,
output reg [15:0] VAR59,
input VAR44,
input VAR55,
input VAR19,
input VAR32,
input VAR38,
input VAR18,
input VAR33,
output [12:0] VAR28,
output [1:0] VAR47,
output [15:0] VAR23,
input [15:0] VAR49,
output [15:0] VAR17,
output VAR45,
output VAR24,
output VAR9,
output VAR11,
output VAR31,
output VAR41,
output VAR35
);
reg [12:0] VAR7;
reg [1:0] VAR22;
reg [15:0] VAR25;
wire [15:0] VAR13;
reg [15:0] VAR15;
reg VAR12;
reg VAR60;
reg VAR16;
reg VAR42;
reg VAR58;
reg VAR46;
reg VAR51;
assign VAR23 = VAR25;
assign VAR17 = VAR15;
assign VAR13 = VAR49;
always @(posedge VAR39) begin
VAR7 <= VAR26;
VAR22 <= VAR56;
VAR25 <= VAR40;
VAR12 <= VAR55;
VAR60 <= VAR19;
VAR16 <= VAR32;
VAR42 <= VAR38;
VAR58 <= VAR38;
VAR46 <= VAR18;
VAR51 <= VAR33;
end
always @(posedge VAR39) begin
VAR15 <= {16{VAR44}};
end
always @(posedge VAR39) begin
VAR59 <= VAR13;
end
VAR37 VAR2 (.VAR1(VAR7[0]), .VAR20(VAR28[0]));
VAR37 VAR43 (.VAR1(VAR7[1]), .VAR20(VAR28[1]));
VAR37 VAR27 (.VAR1(VAR7[2]), .VAR20(VAR28[2]));
VAR37 VAR30 (.VAR1(VAR7[3]), .VAR20(VAR28[3]));
VAR37 VAR21 (.VAR1(VAR7[4]), .VAR20(VAR28[4]));
VAR37 VAR54 (.VAR1(VAR7[5]), .VAR20(VAR28[5]));
VAR37 VAR53 (.VAR1(VAR7[6]), .VAR20(VAR28[6]));
VAR37 VAR36 (.VAR1(VAR7[7]), .VAR20(VAR28[7]));
VAR37 VAR61 (.VAR1(VAR7[8]), .VAR20(VAR28[8]));
VAR37 VAR14 (.VAR1(VAR7[9]), .VAR20(VAR28[9]));
VAR37 VAR5 (.VAR1(VAR7[10]), .VAR20(VAR28[10]));
VAR37 VAR8 (.VAR1(VAR7[11]), .VAR20(VAR28[11]));
VAR37 VAR48 (.VAR1(VAR7[12]), .VAR20(VAR28[12]));
VAR37 VAR10 (.VAR1(VAR22[0]), .VAR20(VAR47[0]));
VAR37 VAR3 (.VAR1(VAR22[1]), .VAR20(VAR47[1]));
VAR37 VAR57 (.VAR1(VAR12), .VAR20(VAR45));
VAR37 VAR50 (.VAR1(VAR60), .VAR20(VAR24));
VAR37 VAR29 (.VAR1(VAR16), .VAR20(VAR9));
VAR37 VAR4 (.VAR1(VAR42), .VAR20(VAR11));
VAR37 VAR34 (.VAR1(VAR58), .VAR20(VAR31));
VAR37 VAR6 (.VAR1(VAR46), .VAR20(VAR41));
VAR37 VAR52 (.VAR1(VAR51), .VAR20(VAR35));
endmodule
|
gpl-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_hs
|
cells/sdfstp/sky130_fd_sc_hs__sdfstp.blackbox.v
| 1,382 |
module MODULE1 (
VAR5 ,
VAR8 ,
VAR4 ,
VAR1 ,
VAR3 ,
VAR2
);
input VAR5 ;
input VAR8 ;
output VAR4 ;
input VAR1 ;
input VAR3 ;
input VAR2;
supply1 VAR7;
supply0 VAR6;
endmodule
|
apache-2.0
|
vad-rulezz/megabot
|
minsoc/rtl/verilog/ethmac/rtl/verilog/eth_random.v
| 5,701 |
module MODULE1 (VAR9, VAR12, VAR8, VAR4, VAR5, VAR13, VAR11,
VAR6, VAR10);
input VAR9;
input VAR12;
input VAR8;
input VAR4;
input [3:0] VAR5;
input [15:0] VAR13;
input [9:0] VAR11;
output VAR6;
output VAR10;
wire VAR3;
reg [9:0] VAR2;
wire [9:0] VAR1;
reg [9:0] VAR7;
always @ (posedge VAR9 or posedge VAR12)
begin
if(VAR12)
VAR2[9:0] <= 0;
end
else
VAR2[9:0] <= {VAR2[8:0], VAR3};
end
assign VAR3 = ~(VAR2[2] ^ VAR2[9]);
assign VAR1 [0] = VAR2[0];
assign VAR1 [1] = (VAR5 > 1) ? VAR2[1] : 1'b0;
assign VAR1 [2] = (VAR5 > 2) ? VAR2[2] : 1'b0;
assign VAR1 [3] = (VAR5 > 3) ? VAR2[3] : 1'b0;
assign VAR1 [4] = (VAR5 > 4) ? VAR2[4] : 1'b0;
assign VAR1 [5] = (VAR5 > 5) ? VAR2[5] : 1'b0;
assign VAR1 [6] = (VAR5 > 6) ? VAR2[6] : 1'b0;
assign VAR1 [7] = (VAR5 > 7) ? VAR2[7] : 1'b0;
assign VAR1 [8] = (VAR5 > 8) ? VAR2[8] : 1'b0;
assign VAR1 [9] = (VAR5 > 9) ? VAR2[9] : 1'b0;
always @ (posedge VAR9 or posedge VAR12)
begin
if(VAR12)
VAR7 <= 10'h000;
end
else
begin
if(VAR8 & VAR4)
VAR7 <= VAR1;
end
end
assign VAR6 = VAR7 == 10'h0;
assign VAR10 = VAR11[9:0] == VAR7 & (&VAR13[6:0]);
endmodule
|
gpl-2.0
|
GSejas/Dise-o-ASIC-FPGA-FPU
|
ASIC_FLOW/ASIC_fpu/integracion_fisica/front_end/source/subRecursiveKOA.v
| 4,965 |
module MODULE1
(
input wire clk,
input wire [VAR12-1:0] VAR21,
input wire [VAR12-1:0] VAR13,
output wire [2*VAR12-1:0] VAR4
);
localparam integer VAR26 = VAR26;
generate
if (VAR12 <= VAR26) begin : VAR28
VAR23 #(.VAR12(VAR12))
VAR27 (
.clk(clk),
.VAR21(VAR21),
.VAR13(VAR13),
.VAR4(VAR4)
);
end else begin : VAR17
reg [2*VAR12-1:0] VAR25;
wire [1:0] VAR3;
wire [3:0] VAR8;
assign VAR3 = 2'b00;
assign VAR8 = 4'b0000;
wire [VAR12/2-1:0] VAR6;
wire [VAR12/2:0] VAR5;
wire [VAR12/2-3:0] VAR31;
wire [VAR12/2-4:0] VAR10;
reg [4*(VAR12/2)+2:0] VAR11;
reg [4*(VAR12/2)-1:0] VAR14;
localparam VAR32 = VAR12/2;
assign VAR6 = {(VAR12/2){1'b0}};
assign VAR5 = {(VAR12/2+1){1'b0}};
assign VAR31 = {(VAR12/2-4){1'b0}}; assign VAR10 = {(VAR12/2-5){1'b0}};
case (VAR12%2)
0:begin : VAR18
reg [VAR12/2:0] VAR19;
reg [VAR12/2:0] VAR7;
wire [VAR12-1:0] VAR1;
wire [VAR12-1:0] VAR20;
wire [VAR12+1:0] VAR16;
reg [2*(VAR12/2+2)-1:0] VAR33;
reg [VAR12+1:0] VAR30;
always @* begin : VAR9
VAR19 <= (VAR21[((VAR12/2)-1):0] + VAR21[(VAR12-1) -: VAR12/2]);
VAR7 <= (VAR13[((VAR12/2)-1):0] + VAR13[(VAR12-1) -: VAR12/2]);
VAR30 <= (VAR16 - VAR1 - VAR20);
VAR25 <= {VAR31,VAR30,VAR6} + {VAR1,VAR20};
end
MODULE1 #(.VAR12(VAR12/2)) VAR2(
.clk(clk),
.VAR21(VAR21[VAR12-1:VAR12-VAR12/2]),
.VAR13(VAR13[VAR12-1:VAR12-VAR12/2]),
.VAR4(VAR1)
);
MODULE1 #(.VAR12(VAR12/2)) VAR24(
.clk(clk),
.VAR21(VAR21[VAR12-VAR12/2-1:0]),
.VAR13(VAR13[VAR12-VAR12/2-1:0]),
.VAR4(VAR20)
);
MODULE1 #(.VAR12((VAR12/2)+1)) VAR22 (
.clk(clk),
.VAR21(VAR19),
.VAR13(VAR7),
.VAR4(VAR16)
);
assign VAR4 = VAR25;
end
1:begin : VAR29
reg [VAR12/2+1:0] VAR19;
reg [VAR12/2+1:0] VAR7;
wire [2*(VAR12/2)-1:0] VAR1;
wire [2*(VAR12/2+1)-1:0] VAR20;
wire [2*(VAR12/2+2)-1:0] VAR16;
reg [2*(VAR12/2+2)-1:0] VAR33;
reg [VAR12+4-1:0] VAR30;
always @* begin : VAR15
VAR19 <= (VAR21[VAR12-VAR12/2-1:0] + VAR21[VAR12-1:VAR12-VAR12/2]);
VAR7 <= VAR13[VAR12-VAR12/2-1:0] + VAR13[VAR12-1:VAR12-VAR12/2];
VAR30 <= (VAR16 - VAR1 - VAR20);
VAR25<= {VAR10,VAR30,VAR5} + {VAR1,VAR20};
end
assign VAR4 = VAR25;
MODULE1 #(.VAR12(VAR12/2)) VAR2(
.clk(clk),
.VAR21(VAR21[VAR12-1:VAR12-VAR12/2]),
.VAR13(VAR13[VAR12-1:VAR12-VAR12/2]),
.VAR4(VAR1)
);
MODULE1 #(.VAR12((VAR12/2)+1)) VAR24(
.clk(clk),
.VAR21(VAR21[VAR12-VAR12/2-1:0]),
.VAR13(VAR13[VAR12-VAR12/2-1:0]),
.VAR4(VAR20)
);
MODULE1 #(.VAR12((VAR12/2)+2)) VAR22 (
.clk(clk),
.VAR21(VAR19),
.VAR13(VAR7),
.VAR4(VAR16)
);
end
endcase
end
endgenerate
endmodule
|
gpl-3.0
|
google/skywater-pdk-libs-sky130_fd_sc_hdll
|
cells/sdfstp/sky130_fd_sc_hdll__sdfstp.blackbox.v
| 1,426 |
module MODULE1 (
VAR8 ,
VAR6 ,
VAR4 ,
VAR3 ,
VAR2 ,
VAR5
);
output VAR8 ;
input VAR6 ;
input VAR4 ;
input VAR3 ;
input VAR2 ;
input VAR5;
supply1 VAR9;
supply0 VAR7;
supply1 VAR10 ;
supply0 VAR1 ;
endmodule
|
apache-2.0
|
Chapna/TTCache
|
src/way.v
| 4,321 |
module MODULE1 (enable, word, VAR1,
write, rst, VAR11, VAR23, VAR2,
VAR14, VAR12, VAR24,
VAR21, VAR22, ack);
parameter VAR4 = 2;
input enable;
input rst;
input [0:1] word;
input VAR1;
input write;
input rst;
input [0:4] VAR11;
input [0:15] VAR23;
input VAR2;
output reg VAR14;
output reg VAR12;
output reg [0:4] VAR24;
output reg [0:15] VAR21;
output reg VAR22;
output reg ack;
reg [0:VAR4 - 1] counter;
reg flag;
reg VAR15 [0:VAR4];
reg [0:1] VAR9 [0:VAR4];
reg VAR7 [0:VAR4];
reg VAR13 [0:VAR4];
reg [0:4] VAR25 [0:VAR4];
reg [0:15] VAR16 [0:VAR4];
reg VAR26 [0:VAR4];
reg VAR28 [0:VAR4];
wire VAR29 [0:VAR4];
wire VAR5 [0:VAR4];
wire [0:4] VAR6 [0:VAR4];
wire [0:15] VAR17 [0:VAR4];
wire VAR8 [0:VAR4];
wire VAR3 [0:VAR4];
generate
genvar VAR18;
for (VAR18 = 0; VAR18 < VAR4; VAR18 = VAR18 + 1) begin
VAR30 VAR20 (VAR15[VAR18], VAR9[VAR18], VAR7[VAR18], VAR13[VAR18], 1'b0,
VAR25[VAR18], VAR16[VAR18], VAR26[VAR18], VAR29[VAR18], VAR5[VAR18],
VAR6[VAR18], VAR17[VAR18], VAR8[VAR18], VAR3[VAR18]);
end
endgenerate
reg VAR19;
reg VAR27 = 1'b0;
wire [4:0] rand;
VAR10 rnd (VAR19, VAR27, rand);
always @ (enable) begin
ack = 1'b0;
if (enable) begin
if (VAR1 && !write) begin
for (counter = 0; counter < VAR4; counter = counter + 1) begin
VAR25[counter] = VAR11;
VAR13[counter] = write;
VAR7[counter] = VAR1;
VAR9 [counter] = word;
VAR15[counter] = 1'b1;
wait (VAR3[counter]) begin
if (VAR29[counter]) begin
VAR14 = 1'b1;
VAR22 = VAR8[counter];
VAR12 = VAR5[counter];
VAR21 = VAR17[counter];
VAR24 = VAR6[counter];
VAR15[counter] = 1'b0;
end else begin
VAR15[counter] = 1'b0;
end
end
end
if (!VAR14) begin
VAR14 = 1'b0;
end
ack = 1'b1;
end
if (VAR1 && write) begin
for (counter = 0; counter < VAR4; counter = counter + 1) begin
VAR15[counter] = 1'b1;
VAR25[counter] = VAR11;
VAR16[counter] = VAR23;
wait (VAR3[counter]) begin
if (VAR29[counter]) begin
VAR14 = 1'b1;
VAR15[counter] = 1'b0;
end else begin
VAR15[counter] = 1'b0;
end
end
end
if (!VAR14) begin
VAR14 = 1'b0;
end
ack = 1'b1;
end
if (!VAR1 && !write) begin
ack = 1'b1;
end
if (!VAR1 && write) begin
flag = 0;
for (counter = 0; counter < VAR4; counter = counter + 1) begin
VAR16[counter] = VAR23;
VAR7[counter] = 1'b0;
VAR13[counter] = 1'b0;
VAR15[counter] = 1'b1;
wait (VAR3[counter]) begin
if (!VAR8[counter] && !flag) begin
flag = 1;
VAR15[counter] = 1'b0;
wait (!VAR3[counter]) begin
end
VAR9[counter] = word;
VAR26[counter] = VAR2;
VAR25[counter] = VAR11;
VAR13[counter] = 1'b1;
VAR7[counter] = 1'b0;
VAR15[counter] = 1'b1;
wait (VAR3[counter]) begin
VAR15[counter] = 1'b0;
end
end
end
end
if (!flag) begin
VAR19 = 1'b1;
VAR16[rand[4]] = VAR23;
VAR9[rand[4]] = word;
VAR26[rand[4]] = VAR2;
VAR25[rand[4]] = VAR11;
VAR13[rand[4]] = 1'b1;
VAR7[rand[4]] = 1'b0;
VAR15[rand[4]] = 1'b1;
wait (VAR3[rand[4]]) begin
end
VAR15[rand[4]] = 1'b0;
VAR19 = 1'b0;
end
ack = 1'b1;
end
end else begin
VAR14 = 1'b0;
end
end
endmodule
|
gpl-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_hs
|
cells/o2bb2ai/sky130_fd_sc_hs__o2bb2ai.pp.symbol.v
| 1,358 |
module MODULE1 (
input VAR1,
input VAR2,
input VAR4 ,
input VAR5 ,
output VAR6 ,
input VAR7,
input VAR3
);
endmodule
|
apache-2.0
|
yht1995/Digital-WeighingScale
|
FPGA/DispScan.v
| 1,325 |
module MODULE1
(
input clk,en,
input [3:0]VAR4,VAR1,VAR8,VAR7,
input VAR5,
output reg [3:0]select,out,
output reg VAR10
);
reg [1:0]state;
localparam VAR2 = 0, VAR9 = 1, VAR3 = 2, VAR6 = 3;
always @ (state or en)
begin
if (en)
begin
case (state)
VAR2:
begin
select <= 4'b0001;
out[3:0] <= VAR4[3:0];
VAR10 <= 0;
end
VAR9:
begin
select <= 4'b0010;
out[3:0] <= VAR1[3:0];
if(VAR5)
VAR10 <= 1;
end
else
VAR10 <= 0;
end
VAR3:
begin
select <= 4'b0100;
out[3:0] <= VAR8[3:0];
VAR10 <= 0;
end
VAR6:
begin
select <= 4'b1000;
out[3:0] <= VAR7[3:0];
VAR10 <= 0;
end
default:
{out, VAR10} = 5'b00000;
endcase
end
else
{select, VAR10} <= 5'b00000;
end
always @ (posedge clk) begin
case (state)
VAR2:
state <= VAR9;
VAR9:
state <= VAR3;
VAR3:
state <= VAR6;
VAR6:
state <= VAR2;
endcase
end
endmodule
|
gpl-3.0
|
google/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0
|
cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.functional.v
| 1,787 |
module MODULE1( VAR16, VAR20, VAR24, VAR7, VAR6, VAR5, VAR3, VAR23 );
input VAR7, VAR24, VAR5, VAR16, VAR6, VAR20, VAR23;
output VAR3;
not VAR2( VAR19, VAR5 );
not VAR21( VAR18, VAR6 );
wire VAR15;
not VAR26( VAR15, VAR24 );
wire VAR22;
not VAR28( VAR22, VAR16 );
wire VAR27;
and VAR11( VAR27, VAR15, VAR22 );
wire VAR8;
not VAR4( VAR8, VAR20 );
wire VAR25;
and VAR29( VAR25, VAR15, VAR8 );
wire VAR12;
and VAR17( VAR12, VAR8, VAR16 );
or VAR1( VAR10, VAR27, VAR25, VAR12 );
VAR13( VAR14, VAR18, VAR19, VAR7, VAR10, VAR23 );
not VAR9( VAR3, VAR14 );
endmodule
|
apache-2.0
|
lneuhaus/pyrpl
|
pyrpl/fpga/rtl/red_pitaya_trigger_block.v
| 8,009 |
module MODULE1 #(
parameter VAR8 = 1,
parameter VAR22 = 5,
parameter VAR5 = 1
)
(
input VAR47 , input VAR12 , input [ 14-1: 0] VAR1 , input [ 14-1: 0] VAR43 , output [ 14-1: 0] VAR20 , output [ 14-1: 0] VAR2 , output VAR9 ,
input [ 16-1: 0] addr,
input VAR6,
input VAR19,
output reg ack,
output reg [ 32-1: 0] VAR42,
input [ 32-1: 0] VAR14
);
localparam VAR27 = 4'd0;
localparam VAR39 = 4'd1;
reg [ 32-1: 0] VAR46; reg [ 2-1: 0] VAR28 ;
reg [ 4-1: 0] VAR13;
reg [ 14-1: 0] VAR16 ;
reg [ 14-1: 0] VAR30 ;
reg VAR26;
reg VAR32;
reg [ 14-1: 0] VAR38;
reg VAR33;
always @(posedge VAR47) begin
if (VAR12 == 1'b0) begin
VAR46 <= 32'd0;
VAR28 <= 2'b00;
VAR13 <= 4'b0000;
VAR16 <= 14'd0;
VAR30 <= 14'd20; VAR26 <= 1'b0;
VAR32 <= 1'b0;
VAR38 <= 14'd0;
VAR33 <= 1'b0;
end
else begin
if (addr==16'h100 && VAR6)
VAR26 <= 1'b1;
end
else
VAR26 <= 1'b0;
if (VAR6) begin
if (addr==16'h104) {VAR33, VAR32} <= VAR14[2-1:0];
if (addr==16'h108) VAR28 <= VAR14[2-1:0];
if (addr==16'h10C) VAR13 <= VAR14[4-1:0];
if (addr==16'h110) VAR38 <= VAR14[14-1:0];
if (addr==16'h118) VAR16 <= VAR14[14-1:0];
if (addr==16'h11C) VAR30 <= VAR14[14-1:0];
if (addr==16'h120) VAR46 <= VAR14;
end
casez (addr)
16'h100 : begin ack <= VAR6|VAR19; VAR42 <= {{32-1{1'b0}},VAR18}; end
16'h104 : begin ack <= VAR6|VAR19; VAR42 <= {{32-1{2'b0}},VAR33,VAR32}; end
16'h108 : begin ack <= VAR6|VAR19; VAR42 <= {{32-2{1'b0}},VAR28}; end
16'h10C : begin ack <= VAR6|VAR19; VAR42 <= {{32-4{1'b0}},VAR13}; end
16'h110 : begin ack <= VAR6|VAR19; VAR42 <= {{32-14{1'b0}},VAR38}; end
16'h118 : begin ack <= VAR6|VAR19; VAR42 <= VAR16; end
16'h11C : begin ack <= VAR6|VAR19; VAR42 <= VAR30; end
16'h120 : begin ack <= VAR6|VAR19; VAR42 <= VAR46; end
16'h15C : begin ack <= VAR6|VAR19; VAR42 <= VAR36[32-1:0]; end
16'h160 : begin ack <= VAR6|VAR19; VAR42 <= VAR36[64-1:32]; end
16'h164 : begin ack <= VAR6|VAR19; VAR42 <= VAR31[32-1:0]; end
16'h168 : begin ack <= VAR6|VAR19; VAR42 <= VAR31[64-1:32]; end
16'h220 : begin ack <= VAR6|VAR19; VAR42 <= VAR8; end
16'h224 : begin ack <= VAR6|VAR19; VAR42 <= VAR22; end
16'h228 : begin ack <= VAR6|VAR19; VAR42 <= VAR5; end
default: begin ack <= VAR6|VAR19; VAR42 <= 32'h0; end
endcase
end
end
wire signed [14-1:0] VAR45;
VAR37 #(
.VAR35(VAR8),
.VAR25(VAR22),
.VAR41(14),
.VAR29(VAR5)
)
VAR15
(
.VAR47(VAR47),
.VAR12(VAR12),
.VAR46(VAR46),
.VAR1(VAR1),
.VAR20(VAR45)
);
reg [ 2-1: 0] VAR17 ;
reg [ 2-1: 0] VAR21 ;
reg [ 14-1: 0] VAR23 ;
reg [ 14-1: 0] VAR7 ;
reg VAR10;
reg VAR11;
always @(posedge VAR47) begin
VAR23 <= VAR16 + VAR30 ; VAR7 <= VAR16 - VAR30 ; if (VAR12 == 1'b0) begin
VAR17 <= 2'h0 ;
VAR21 <= 2'h0 ;
VAR10 <= 1'b0 ;
VAR11 <= 1'b0 ;
end else begin
end
if ((VAR45) >= (VAR16 )) VAR17[0] <= 1'b1 ; else if ((VAR45) < (VAR7)) VAR17[0] <= 1'b0 ; if ((VAR45) <= (VAR16 )) VAR21[0] <= 1'b1 ; else if ((VAR45) > (VAR23)) VAR21[0] <= 1'b0 ;
VAR17[1] <= VAR17[0] ;
VAR21[1] <= VAR21[0] ;
VAR10 <= VAR17[0] && !VAR17[1] ; VAR11 <= VAR21[0] && !VAR21[1] ;
end
end
reg VAR44;
reg VAR18;
reg [ 64 - 1:0] VAR36 ;
reg [ 64 - 1:0] VAR31;
reg [ 14 - 1:0] VAR34;
reg [ 14 - 1:0] VAR24;
reg [ 14 - 1:0] VAR4;
wire [ 14 - 1:0] VAR40;
wire [ 14 - 1:0] VAR3;
assign VAR40 = VAR43;
assign VAR3 = VAR40 + VAR38;
always @(posedge VAR47)
if (VAR12 == 1'b0) begin
VAR44 <= 1'b0;
VAR18 <= 1'b0;
VAR36 <= 64'h0;
VAR31 <= 64'h0;
VAR24 <= 14'd0;
VAR4 <= 14'd0;
VAR34 <= 14'd0;
end else begin
VAR44 <= ((VAR10 && VAR28[0]) || (VAR11 && VAR28[1])) && VAR18;
VAR18 <= (VAR18 && (!VAR44)) || VAR26 || VAR32;
VAR36 <= VAR36 + 1'b1;
if ((VAR33 == 1'b1) && (VAR3[14-1] == 1'b1))
VAR34 <= (~VAR3)+14'd1;
end
else
VAR34 <= VAR3;
if (VAR44==1'b1) begin
VAR31 <= VAR36; VAR24 <= VAR34;
end
if (VAR13==VAR27)
VAR4 <= {1'b0,{13{VAR44}}};
end
else if (VAR13==VAR39)
VAR4 <= VAR24;
end
assign VAR20 = VAR4;
assign VAR2 = VAR4;
assign VAR9 = VAR44;
endmodule
|
mit
|
google/skywater-pdk-libs-sky130_fd_sc_hvl
|
cells/fill/sky130_fd_sc_hvl__fill.behavioral.pp.v
| 1,151 |
module MODULE1 (
VAR3,
VAR4,
VAR1 ,
VAR2
);
input VAR3;
input VAR4;
input VAR1 ;
input VAR2 ;
endmodule
|
apache-2.0
|
bbrown1867/ObjectTracking
|
hw/measure/measure.v
| 10,655 |
module MODULE1(
input VAR133,
input VAR125,
input VAR60,
output [8:0] VAR108,
output [17:0] VAR34,
input [3:0] VAR161,
input [17:0] VAR142,
output [7:0] VAR118,
output VAR164,
output VAR177,
output [7:0] VAR75,
output VAR146,
output [7:0] VAR2,
output VAR13,
output VAR111,
output VAR26,
inout VAR178,
input VAR69,
input [7:0] VAR95,
input VAR65,
output VAR140,
input VAR53,
output [12:0] VAR167,
output [1:0] VAR187,
output VAR88,
output VAR182,
output VAR59,
output VAR82,
inout [31:0] VAR35,
output [3:0] VAR153,
output VAR149,
output VAR85,
output [19:0] VAR23,
output VAR189,
inout [15:0] VAR1,
output VAR151,
output VAR42,
output VAR28,
output VAR41
);
localparam VAR73 = 11;
localparam VAR136 = 10;
localparam VAR37 = 16;
localparam VAR124 = 20;
localparam VAR4 = 5;
localparam VAR17 = 40;
localparam VAR3 = 10;
localparam VAR10 = 1'b0; localparam VAR150 = 16; localparam VAR39 = 98; localparam VAR43 = 46; localparam VAR61 = 640; localparam VAR48 = 11; localparam VAR127 = 2; localparam VAR24 = 31; localparam VAR86 = 480; localparam VAR132 = 240;
localparam VAR104 = VAR37 - VAR136;
localparam VAR92 = VAR48 + VAR127;
localparam VAR56 = VAR92 + VAR132;
localparam VAR109 = VAR56 + VAR92 + 1;
localparam VAR179 = VAR109 + VAR132;
wire VAR128;
wire VAR96;
wire VAR160;
wire VAR91;
wire [(VAR136-1):0] VAR172;
wire [(VAR136-1):0] VAR22; wire [(VAR136-1):0] VAR145; wire [(VAR136-1):0] VAR83; wire VAR159;
wire [(VAR136-1):0] VAR180;
wire VAR114;
wire [(VAR37-1):0] VAR64; wire [(VAR37-1):0] VAR119; wire [(VAR37-1):0] VAR31; wire VAR120; wire VAR105;
wire [(VAR37-1):0] VAR156;
wire VAR97;
wire [(VAR136-1):0] VAR188;
wire [(VAR73-1):0] VAR11;
wire [(VAR73-1):0] VAR7;
wire [(VAR136-1):0] VAR32;
wire [(VAR136-1):0] VAR113;
wire [(VAR136-1):0] VAR186;
wire [(VAR73-1):0] VAR101; wire [(VAR73-1):0] VAR102; wire VAR169;
assign VAR128 = VAR161[0];
assign VAR96 = ~VAR161[1];
assign VAR97 = VAR142[15];
assign VAR160 = VAR142[16];
assign VAR91 = VAR142[17];
assign VAR172 = VAR142[(VAR136-1):0];
VAR27 VAR176
(
.VAR128 (VAR128),
.VAR69 (VAR69),
.VAR95 (VAR95),
.VAR65 (VAR65),
.VAR140 (VAR140),
.VAR53 (VAR53),
.VAR122 (VAR22),
.VAR134 (VAR83),
.VAR162 (VAR145),
.VAR159 (VAR159)
);
VAR123 #(
.VAR170 (VAR136)
) VAR116 (
.clk (VAR69),
.VAR128 (VAR128),
.VAR138 (VAR22),
.VAR66 (VAR145),
.VAR171 (VAR83),
.VAR19 (VAR159),
.VAR67 (VAR180),
.VAR147 (VAR114)
);
VAR62 VAR8
(
.VAR185 (VAR69),
.VAR14 (VAR128),
.VAR87 ({{VAR104{1'b0}}, VAR180}),
.VAR78 (VAR114), .VAR46 (0), .VAR80 (VAR61*VAR179), .VAR21 (9'h80), .VAR110 (~VAR128), .VAR173 (VAR69),
.VAR126 (VAR119),
.VAR175 (VAR120), .VAR36 (VAR61*VAR92), .VAR29 (VAR61*VAR56 ), .VAR52 (9'h80), .VAR141 (~VAR128), .VAR131 (VAR69),
.VAR93 (VAR31),
.VAR165 (VAR105), .VAR163 (VAR61*VAR109), .VAR112 (VAR61*VAR179 ), .VAR168 (9'h80), .VAR18 (~VAR128), .VAR90 (VAR69),
.VAR94 (VAR167),
.VAR40 (VAR187),
.VAR74 (VAR82),
.VAR47 (VAR182),
.VAR33 (VAR149),
.VAR121 (VAR88),
.VAR30 (VAR85),
.VAR139 (VAR35),
.VAR44 ({VAR153[1], VAR153[0]}),
.VAR99 (VAR59)
);
assign VAR120 = VAR102[0] ? 1'b0 : VAR169;
assign VAR105 = VAR102[0] ? VAR169 : 1'b0;
assign VAR64 = ~VAR102[0] ? VAR119 : VAR31;
VAR20 VAR72
(
.clk (VAR69),
.VAR128 (VAR128),
.VAR5 (VAR96),
.addr ({VAR101[9:0], VAR102[9:0]}),
.din (VAR64),
.dout (VAR156),
.VAR23 (VAR23),
.VAR189 (VAR189),
.VAR1 (VAR1),
.VAR151 (VAR151),
.VAR42 (VAR42),
.VAR28 (VAR28),
.VAR41 (VAR41)
);
VAR188 #(
.VAR136 (VAR136),
.VAR124 (VAR124),
.VAR4 (VAR4)
) VAR6 (
.clk (VAR69),
.VAR128 (VAR128),
.VAR115 (VAR97),
.VAR129 (VAR169),
.VAR107 (VAR172),
.VAR100 (VAR156 [(VAR136-1):0]),
.VAR25 (VAR64[(VAR136-1):0]),
.VAR188 (VAR188)
);
VAR9 #(
.VAR174 (VAR73),
.VAR136 (VAR136),
.VAR158 (VAR61),
.VAR157 (VAR86),
.VAR184 (VAR17)
) VAR51 (
.clk (VAR69),
.VAR128 (VAR128),
.enable (VAR160),
.VAR101 (VAR101),
.VAR102 (VAR102),
.VAR188 (VAR188),
.VAR106 (VAR11),
.VAR68 (VAR7)
);
VAR152 #(
.VAR181 (VAR3),
.VAR136 (VAR136),
.VAR73 (VAR73)
) VAR16 (
.clk (VAR69),
.VAR128 (VAR128),
.enable (VAR160),
.VAR166 (VAR101),
.VAR71 (VAR102),
.VAR155 (VAR11),
.VAR57 (VAR7),
.VAR55 (VAR91 ? VAR188 : VAR64[(VAR136-1):0]),
.VAR135 (VAR32),
.VAR117 (VAR113),
.VAR15 (VAR186)
);
VAR63 #(
.VAR103 (VAR73),
.VAR89 (VAR73),
.VAR154 (VAR10),
.VAR70 (VAR150),
.VAR58 (VAR39),
.VAR98 (VAR43),
.VAR84 (VAR61),
.VAR137 (VAR48),
.VAR183 (VAR127),
.VAR76 (VAR24),
.VAR81 (VAR86)
) VAR144 (
.VAR12 (VAR69),
.VAR128 (VAR128),
.VAR130 (VAR32),
.VAR54 (VAR113),
.VAR45 (VAR186),
.VAR148 (VAR101),
.VAR50 (VAR102),
.ready (VAR169),
.VAR77 (VAR177),
.VAR122 (VAR2),
.VAR162 (VAR75),
.VAR134 (VAR118),
.VAR79 (VAR146),
.VAR49 (VAR111),
.VAR143 (VAR164),
.VAR38 (VAR13)
);
endmodule
|
mit
|
Given-Jiang/Gaussian_Filter_Altera_OpenCL_DE1-SoC
|
Gaussian_Filter/ip/Gaussian_Filter/route_switch.v
| 2,131 |
module MODULE1(VAR4, VAR8,
VAR9, VAR7, VAR12,
VAR5, VAR3, VAR2);
parameter VAR1 = 32;
parameter VAR11 = 2;
input VAR4, VAR8;
input [VAR1-1:0] VAR9;
input VAR7;
output VAR12;
output reg [VAR1-1:0] VAR5;
input [VAR11-1:0] VAR3;
output [VAR11-1:0] VAR2;
wire [VAR11-1:0] VAR6;
reg [VAR11-1:0] VAR10;
assign VAR6 = VAR3 & VAR10;
assign VAR12 = ( | VAR6 );
assign VAR2 = VAR10;
always @ (negedge VAR8 or posedge VAR4)
begin
if (~VAR8)
begin
VAR10 <= {VAR11{1'b0}};
end
else
begin
if (VAR12)
begin
VAR10 <= VAR3 & VAR2;
end
else
begin
VAR10 <= {VAR11{VAR7}};
end
end
end
always @ (negedge VAR8 or posedge VAR4)
begin
if (~VAR8)
begin
VAR5 <= 0;
end
else
begin
if (~VAR12)
begin
VAR5 = VAR9;
end
end
end
endmodule
|
mit
|
google/skywater-pdk-libs-sky130_fd_sc_hd
|
cells/nor4b/sky130_fd_sc_hd__nor4b.pp.symbol.v
| 1,324 |
module MODULE1 (
input VAR3 ,
input VAR7 ,
input VAR2 ,
input VAR6 ,
output VAR1 ,
input VAR5 ,
input VAR9,
input VAR8,
input VAR4
);
endmodule
|
apache-2.0
|
patrick-samy/ace
|
control/instruction-decoder.v
| 1,309 |
module MODULE1(input[31:0] VAR17,
output[3:0] VAR10,
output VAR15,
output[1:0] VAR8,
output[7:0] VAR4,
output VAR9,
output[1:0] VAR1,
output[7:0] VAR14,
output[1:0] VAR6);
register#(4) VAR3(VAR17[31:28], 1, VAR10);
register#(1) VAR5(VAR17[27], 1, VAR15);
register#(2) VAR13(VAR17[26:25], 1,
VAR8);
register#(8) VAR7(VAR17[26:19], 1,
VAR4);
register#(1) VAR11(VAR17[18], 1, VAR15);
register#(2) VAR12(VAR17[17:16], 1,
VAR1);
register#(8) VAR16(VAR17[17:10], 1,
VAR14);
register#(2) VAR2(VAR17[9:8], 1,
VAR6);
endmodule
|
mit
|
bigeagle/riffa
|
fpga/riffa_hdl/interrupt.v
| 7,145 |
module MODULE1 #(
parameter VAR38 = 4'd12
)
(
input VAR36,
input VAR3,
input [VAR38-1:0] VAR13, input [VAR38-1:0] VAR20, input [VAR38-1:0] VAR23, input [VAR38-1:0] VAR18, input [VAR38-1:0] VAR29, input VAR14, input VAR10, input [31:0] VAR9, output [31:0] VAR16, output [31:0] VAR26, input VAR37, input VAR30, input VAR4, output VAR15 );
reg [1:0] VAR25=0;
reg [31:0] VAR8=0;
reg [31:0] VAR17=0;
wire [31:0] VAR22;
wire [31:0] VAR21;
wire VAR33 = (VAR25 == VAR27);
wire VAR24;
assign VAR16 = VAR8;
assign VAR26 = VAR17;
genvar VAR2;
generate
for (VAR2 = 0; VAR2 < VAR38; VAR2 = VAR2 + 1) begin: VAR12
if (VAR2 < 6) begin : VAR32
assign VAR22[(5*VAR2)+0] = VAR23[VAR2];
assign VAR22[(5*VAR2)+1] = VAR18[VAR2];
assign VAR22[(5*VAR2)+2] = VAR29[VAR2];
assign VAR22[(5*VAR2)+3] = VAR13[VAR2];
assign VAR22[(5*VAR2)+4] = VAR20[VAR2];
end
else begin : VAR5
assign VAR21[(5*(VAR2-6))+0] = VAR23[VAR2];
assign VAR21[(5*(VAR2-6))+1] = VAR18[VAR2];
assign VAR21[(5*(VAR2-6))+2] = VAR29[VAR2];
assign VAR21[(5*(VAR2-6))+3] = VAR13[VAR2];
assign VAR21[(5*(VAR2-6))+4] = VAR20[VAR2];
end
end
for (VAR2 = VAR38; VAR2 < 12; VAR2 = VAR2 + 1) begin: VAR7
if (VAR2 < 6) begin : VAR6
assign VAR22[(5*VAR2)+0] = 1'b0;
assign VAR22[(5*VAR2)+1] = 1'b0;
assign VAR22[(5*VAR2)+2] = 1'b0;
assign VAR22[(5*VAR2)+3] = 1'b0;
assign VAR22[(5*VAR2)+4] = 1'b0;
end
else begin : VAR34
assign VAR21[(5*(VAR2-6))+0] = 1'b0;
assign VAR21[(5*(VAR2-6))+1] = 1'b0;
assign VAR21[(5*(VAR2-6))+2] = 1'b0;
assign VAR21[(5*(VAR2-6))+3] = 1'b0;
assign VAR21[(5*(VAR2-6))+4] = 1'b0;
end
end
assign VAR22[30] = 1'b0;
assign VAR22[31] = 1'b0;
assign VAR21[30] = 1'b0;
assign VAR21[31] = 1'b0;
endgenerate
VAR11 VAR31 (
.VAR36(VAR36),
.VAR3(VAR3),
.VAR1(VAR33),
.VAR37(VAR37),
.VAR35(VAR24),
.VAR28(),
.VAR30(VAR30),
.VAR4(VAR4),
.VAR15(VAR15)
);
always @(posedge VAR36) begin
if (VAR3) begin
VAR8 <= 0;
VAR17 <= 0;
end
else begin
if (VAR14) begin
VAR8 <= (VAR22 | (VAR8 & ~VAR9));
VAR17 <= (VAR21 | VAR17);
end
else if (VAR10) begin
VAR8 <= (VAR22 | VAR8);
VAR17 <= (VAR21 | (VAR17 & ~VAR9));
end
else begin
VAR8 <= (VAR22 | VAR8);
VAR17 <= (VAR21 | VAR17);
end
end
end
always @(posedge VAR36) begin
if (VAR3) begin
VAR25 <= VAR19;
end
else begin
case (VAR25)
endcase
end
end
endmodule
|
bsd-3-clause
|
tmolteno/TART
|
hardware/FPGA/ddr_controller/spartan3/rtl/mybufg.v
| 2,504 |
module MODULE1 (
VAR3,
VAR1
);
input VAR3;
output VAR1;
VAR2 VAR4 (VAR1,VAR3);
endmodule
|
lgpl-3.0
|
borti4938/sd2snes
|
verilog/sd2snes_gsu/ipcore_dir/gsu_umult.v
| 6,162 |
module MODULE1 (
VAR29, VAR42, VAR21
);
output [15 : 0] VAR29;
input [7 : 0] VAR42;
input [7 : 0] VAR21;
wire \VAR28/VAR39 ;
wire \VAR18/VAR22<35>VAR12 ;
wire \VAR18/VAR22<34>VAR12 ;
wire \VAR18/VAR22<33>VAR12 ;
wire \VAR18/VAR22<32>VAR12 ;
wire \VAR18/VAR22<31>VAR12 ;
wire \VAR18/VAR22<30>VAR12 ;
wire \VAR18/VAR22<29>VAR12 ;
wire \VAR18/VAR22<28>VAR12 ;
wire \VAR18/VAR22<27>VAR12 ;
wire \VAR18/VAR22<26>VAR12 ;
wire \VAR18/VAR22<25>VAR12 ;
wire \VAR18/VAR22<24>VAR12 ;
wire \VAR18/VAR22<23>VAR12 ;
wire \VAR18/VAR22<22>VAR12 ;
wire \VAR18/VAR22<21>VAR12 ;
wire \VAR18/VAR22<20>VAR12 ;
wire \VAR18/VAR22<19>VAR12 ;
wire \VAR18/VAR22<18>VAR12 ;
wire \VAR18/VAR22<17>VAR12 ;
wire \VAR18/VAR22<16>VAR12 ;
VAR19 \VAR28/VAR3 (
.VAR45({\VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 ,
\VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 , VAR42[7], VAR42[6],
VAR42[5], VAR42[4], VAR42[3], VAR42[2], VAR42[1], VAR42[0]}),
.VAR17({\VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 ,
\VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 , \VAR28/VAR39 , VAR21[7], VAR21[6],
VAR21[5], VAR21[4], VAR21[3], VAR21[2], VAR21[1], VAR21[0]}),
.VAR35({\VAR18/VAR22<35>VAR12 , \VAR18/VAR22<34>VAR12 ,
\VAR18/VAR22<33>VAR12 , \VAR18/VAR22<32>VAR12 , \VAR18/VAR22<31>VAR12 ,
\VAR18/VAR22<30>VAR12 , \VAR18/VAR22<29>VAR12 , \VAR18/VAR22<28>VAR12 ,
\VAR18/VAR22<27>VAR12 , \VAR18/VAR22<26>VAR12 , \VAR18/VAR22<25>VAR12 ,
\VAR18/VAR22<24>VAR12 , \VAR18/VAR22<23>VAR12 , \VAR18/VAR22<22>VAR12 ,
\VAR18/VAR22<21>VAR12 , \VAR18/VAR22<20>VAR12 , \VAR18/VAR22<19>VAR12 ,
\VAR18/VAR22<18>VAR12 , \VAR18/VAR22<17>VAR12 , \VAR18/VAR22<16>VAR12 ,
VAR29[15], VAR29[14], VAR29[13], VAR29[12], VAR29[11], VAR29[10], VAR29[9], VAR29[8], VAR29[7], VAR29[6], VAR29[5], VAR29[4], VAR29[3], VAR29[2], VAR29[1], VAR29[0]})
);
VAR14 \VAR28/VAR34 (
.VAR5(\VAR28/VAR39 )
);
endmodule
module MODULE2 ();
parameter VAR24 = 100000;
parameter VAR4 = 0;
wire VAR36;
wire VAR2;
wire VAR30;
wire VAR46;
tri1 VAR13;
tri (weak1, strong0) VAR33 = VAR13;
wire VAR47;
wire VAR25;
reg VAR15;
reg VAR32;
reg VAR48;
wire VAR8;
wire VAR6;
wire VAR16;
wire VAR7;
wire VAR20;
reg VAR9;
reg VAR41;
reg VAR44;
reg VAR1;
reg VAR43;
reg VAR11 = 0;
reg VAR23 = 0 ;
reg VAR38 = 0;
reg VAR37 = 0;
reg VAR31 = 1'VAR26;
reg VAR10 = 1'VAR26;
reg VAR40 = 1'VAR26;
reg VAR27 = 1'VAR26;
assign (weak1, weak0) VAR36 = VAR15;
assign (weak1, weak0) VAR2 = VAR32;
assign (weak1, weak0) VAR46 = VAR48;
|
gpl-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_lp
|
cells/buf/sky130_fd_sc_lp__buf.pp.symbol.v
| 1,236 |
module MODULE1 (
input VAR3 ,
output VAR2 ,
input VAR4 ,
input VAR6,
input VAR1,
input VAR5
);
endmodule
|
apache-2.0
|
cr88192/bgbtech_bjx1core
|
bjx1c32b/RegGPR2.v
| 13,821 |
module MODULE1(
VAR99, reset,
VAR40, VAR96,
VAR21, VAR98,
VAR76, VAR41,
VAR94, VAR2,
VAR51, VAR44,
VAR71,
VAR104, VAR83,
VAR58, VAR69,
VAR91, VAR86,
VAR16, VAR11,
VAR6, VAR79,
VAR66, VAR85,
VAR82, VAR18,
VAR3, VAR64,
VAR12, VAR107,
VAR52, VAR81,
VAR48, VAR90,
VAR28, VAR70
);
input VAR99;
input reset;
input[6:0] VAR40;
input[6:0] VAR21;
input[6:0] VAR76;
output[31:0] VAR96;
output[31:0] VAR98;
output[31:0] VAR41;
input[6:0] VAR94;
input[31:0] VAR2;
input[31:0] VAR51;
input VAR44;
input[31:0] VAR71;
input[31:0] VAR83; input[31:0] VAR69; input[31:0] VAR86; input[63:0] VAR11; input[31:0] VAR85; input[31:0] VAR18; input[31:0] VAR64; input[31:0] VAR107; input[31:0] VAR81; input[31:0] VAR90; input[31:0] VAR70; input[31:0] VAR79;
output[63:0] VAR16; output[31:0] VAR58; output[31:0] VAR52; output[31:0] VAR48; output[31:0] VAR28; output[31:0] VAR104; output[31:0] VAR66; output[31:0] VAR82; output[31:0] VAR3; output[31:0] VAR12; output[31:0] VAR91; output[31:0] VAR6;
reg[63:0] VAR89; reg[31:0] VAR33; reg[31:0] VAR87; reg[31:0] VAR93; reg[31:0] VAR100; reg[31:0] VAR54; reg[31:0] VAR37; reg[31:0] VAR13; reg[31:0] VAR110; reg[31:0] VAR68; reg[31:0] VAR4; reg[31:0] VAR92;
assign VAR16 = VAR89;
assign VAR58 = VAR33;
assign VAR52 = VAR87;
assign VAR48 = VAR93;
assign VAR28 = VAR100;
assign VAR104 = VAR54;
assign VAR66 = VAR37;
assign VAR82 = VAR13;
assign VAR3 = VAR110;
assign VAR12 = VAR68;
assign VAR91 = VAR4;
assign VAR6 = VAR92;
reg VAR29;
reg VAR55;
reg[31:0] VAR43;
reg[31:0] VAR5;
reg[31:0] VAR114;
reg[31:0] VAR80;
reg[31:0] VAR15;
reg[31:0] VAR8;
reg[31:0] VAR32;
reg[31:0] VAR74;
reg[31:0] VAR77;
reg[31:0] VAR67;
reg[31:0] VAR56;
reg[31:0] VAR30;
reg[31:0] VAR109;
reg[31:0] VAR53;
reg[31:0] VAR72;
reg[31:0] VAR108;
reg[31:0] VAR17;
reg[31:0] VAR105;
reg[31:0] VAR95;
reg[31:0] VAR19;
reg[31:0] VAR46;
reg[31:0] VAR73;
reg[31:0] VAR106;
reg[31:0] VAR78;
reg[31:0] VAR39;
reg[31:0] VAR36;
assign VAR96 = VAR43;
assign VAR98 = VAR5;
assign VAR41 = VAR114;
always @*
begin
VAR43=VAR1;
VAR5=VAR1;
VAR114=VAR1;
VAR55=VAR51[29];
case(VAR40)
VAR24: VAR43=VAR80;
VAR103: VAR43=VAR15;
VAR113: VAR43=VAR8;
VAR25: VAR43=VAR32;
VAR45: VAR43=VAR74;
VAR22: VAR43=VAR77;
VAR47: VAR43=VAR67;
VAR35: VAR43=VAR56;
VAR61: VAR43=VAR19;
VAR97: VAR43=VAR46;
VAR9: VAR43=VAR73;
VAR49: VAR43=VAR106;
VAR27: VAR43=VAR78;
VAR65: VAR43=VAR39;
VAR26: VAR43=VAR36;
VAR102: VAR43=VAR92;
VAR23: VAR43 = VAR71;
VAR62: VAR43 = 0;
VAR63: VAR43 = VAR89[63:32];
VAR14: VAR43 = VAR89[31: 0];
VAR101: VAR43 = VAR33;
VAR112: VAR43 = VAR87;
VAR84: VAR43 = VAR93;
VAR75: VAR43 = VAR100;
VAR88: VAR43 = VAR54;
VAR42: VAR43 = VAR37;
VAR50: VAR43 = VAR13;
VAR60: VAR43 = VAR110;
VAR115: VAR43 = VAR68;
VAR7: VAR43 = VAR4;
default: VAR43=VAR1;
endcase
case(VAR21)
VAR24: VAR5=VAR80;
VAR103: VAR5=VAR15;
VAR113: VAR5=VAR8;
VAR25: VAR5=VAR32;
VAR45: VAR5=VAR74;
VAR22: VAR5=VAR77;
VAR47: VAR5=VAR67;
VAR35: VAR5=VAR56;
VAR61: VAR5=VAR19;
VAR97: VAR5=VAR46;
VAR9: VAR5=VAR73;
VAR49: VAR5=VAR106;
VAR27: VAR5=VAR78;
VAR65: VAR5=VAR39;
VAR26: VAR5=VAR36;
VAR102: VAR5=VAR92;
VAR23: VAR5 = VAR71;
VAR62: VAR5 = 0;
default: VAR5=VAR1;
endcase
case(VAR76)
VAR24: VAR114=VAR80;
VAR103: VAR114=VAR15;
VAR113: VAR114=VAR8;
VAR25: VAR114=VAR32;
VAR45: VAR114=VAR74;
VAR22: VAR114=VAR77;
VAR47: VAR114=VAR67;
VAR35: VAR114=VAR56;
VAR61: VAR114=VAR19;
VAR97: VAR114=VAR46;
VAR9: VAR114=VAR73;
VAR49: VAR114=VAR106;
VAR27: VAR114=VAR78;
VAR65: VAR114=VAR39;
VAR26: VAR114=VAR36;
VAR102: VAR114=VAR92;
VAR42: VAR114 = VAR37;
default: VAR114=VAR1;
endcase
end
always @ (posedge VAR99)
begin
VAR29 <= VAR55;
if(VAR29^VAR55)
begin
VAR80 <= VAR30;
VAR15 <= VAR109;
VAR8 <= VAR53;
VAR32 <= VAR72;
VAR74 <= VAR108;
VAR77 <= VAR17;
VAR67 <= VAR105;
VAR56 <= VAR95;
VAR30 <= VAR80;
VAR109 <= VAR15;
VAR53 <= VAR8;
VAR72 <= VAR32;
VAR108 <= VAR74;
VAR17 <= VAR77;
VAR105 <= VAR67;
VAR95 <= VAR56;
end
else
begin
VAR80 <= (VAR94==VAR24) ? VAR2 : VAR80;
VAR15 <= (VAR94==VAR103) ? VAR2 : VAR15;
VAR8 <= (VAR94==VAR113) ? VAR2 : VAR8;
VAR32 <= (VAR94==VAR25) ? VAR2 : VAR32;
VAR74 <= (VAR94==VAR45) ? VAR2 : VAR74;
VAR77 <= (VAR94==VAR22) ? VAR2 : VAR77;
VAR67 <= (VAR94==VAR47) ? VAR2 : VAR67;
VAR56 <= (VAR94==VAR35) ? VAR2 : VAR56;
VAR30 <= (VAR94==VAR10) ? VAR2 : VAR30;
VAR109 <= (VAR94==VAR111) ? VAR2 : VAR109;
VAR53 <= (VAR94==VAR57) ? VAR2 : VAR53;
VAR72 <= (VAR94==VAR38) ? VAR2 : VAR72;
VAR108 <= (VAR94==VAR20) ? VAR2 : VAR108;
VAR17 <= (VAR94==VAR31) ? VAR2 : VAR17;
VAR105 <= (VAR94==VAR59) ? VAR2 : VAR105;
VAR95 <= (VAR94==VAR34) ? VAR2 : VAR95;
end
VAR19 <= (VAR94==VAR61 ) ? VAR2 : VAR19 ;
VAR46 <= (VAR94==VAR97 ) ? VAR2 : VAR46 ;
VAR73 <= (VAR94==VAR9) ? VAR2 : VAR73;
VAR106 <= (VAR94==VAR49) ? VAR2 : VAR106;
VAR78 <= (VAR94==VAR27) ? VAR2 : VAR78;
VAR39 <= (VAR94==VAR65) ? VAR2 : VAR39;
VAR36 <= (VAR94==VAR26) ? VAR2 : VAR36;
if(reset)
begin
VAR54 <= 0;
VAR33 <= 0;
VAR4 <= 32'hA0000000;
VAR89 <= 0;
VAR92 <= 0;
VAR37 <= 0;
VAR13 <= 0;
VAR110 <= 0;
VAR68 <= 0;
VAR87 <= 0;
VAR93 <= 0;
VAR100 <= 0;
end
else
if(!VAR44)
begin
VAR54 <= (VAR94==VAR88 ) ? VAR2 : VAR83;
VAR33 <= (VAR94==VAR101 ) ? VAR2 : VAR69;
VAR4 <= (VAR94==VAR7 ) ? VAR2 : VAR86;
VAR89[31: 0] <= (VAR94==VAR14) ? VAR2 : VAR11[31: 0];
VAR89[63:32] <= (VAR94==VAR63) ? VAR2 : VAR11[63:32];
VAR92 <= (VAR94==VAR102 ) ? VAR2 : VAR79;
VAR37 <= (VAR94==VAR42 ) ? VAR2 : VAR85;
VAR13 <= (VAR94==VAR50 ) ? VAR2 : VAR18;
VAR110 <= (VAR94==VAR60 ) ? VAR2 : VAR64;
VAR68 <= (VAR94==VAR115 ) ? VAR2 : VAR107;
VAR87 <= (VAR94==VAR112 ) ? VAR2 : VAR81;
VAR93 <= (VAR94==VAR84 ) ? VAR2 : VAR90;
VAR100 <= (VAR94==VAR75 ) ? VAR2 : VAR70;
end
end
endmodule
|
mit
|
cliffordwolf/picorv32
|
picorv32.v
| 94,474 |
module MODULE1 #(
parameter [ 0:0] VAR31 = 1,
parameter [ 0:0] VAR52 = 1,
parameter [ 0:0] VAR61 = 1,
parameter [ 0:0] VAR114 = 1,
parameter [ 0:0] VAR38 = 0,
parameter [ 0:0] VAR99 = 1,
parameter [ 0:0] VAR48 = 0,
parameter [ 0:0] VAR32 = 0,
parameter [ 0:0] VAR13 = 0,
parameter [ 0:0] VAR34 = 0,
parameter [ 0:0] VAR1 = 1,
parameter [ 0:0] VAR68 = 1,
parameter [ 0:0] VAR2 = 0,
parameter [ 0:0] VAR17 = 0,
parameter [ 0:0] VAR73 = 0,
parameter [ 0:0] VAR12 = 0,
parameter [ 0:0] VAR115 = 0,
parameter [ 0:0] VAR56 = 1,
parameter [ 0:0] VAR6 = 1,
parameter [ 0:0] VAR41 = 0,
parameter [ 0:0] VAR85 = 0,
parameter [31:0] VAR33 = 32'VAR118 00000000,
parameter [31:0] VAR18 = 32'VAR118 VAR96,
parameter [31:0] VAR111 = 32'VAR118 00000000,
parameter [31:0] VAR7 = 32'VAR118 00000010,
parameter [31:0] VAR103 = 32'VAR118 VAR96
) (
input clk, VAR77,
output reg VAR11,
output reg VAR117,
output reg VAR100,
input VAR97,
output reg [31:0] VAR59,
output reg [31:0] VAR39,
output reg [ 3:0] VAR58,
input [31:0] VAR112,
output VAR75,
output VAR40,
output [31:0] VAR43,
output reg [31:0] VAR92,
output reg [ 3:0] VAR50,
output reg VAR88,
output reg [31:0] VAR72,
output [31:0] VAR10,
output [31:0] VAR16,
input VAR89,
input [31:0] VAR81,
input VAR105,
input VAR47,
input [31:0] irq,
output reg [31:0] VAR55,
output reg VAR27,
output reg [63:0] VAR35,
output reg [31:0] VAR51,
output reg VAR21,
output reg VAR54,
output reg VAR116,
output reg [ 1:0] VAR63,
output reg [ 1:0] VAR87,
output reg [ 4:0] VAR107,
output reg [ 4:0] VAR22,
output reg [31:0] VAR71,
output reg [31:0] VAR62,
output reg [ 4:0] VAR42,
output reg [31:0] VAR106,
output reg [31:0] VAR46,
output reg [31:0] VAR94,
output reg [31:0] VAR64,
output reg [ 3:0] VAR69,
output reg [ 3:0] VAR8,
output reg [31:0] VAR15,
output reg [31:0] VAR78,
output reg [63:0] VAR79,
output reg [63:0] VAR49,
output reg [63:0] VAR19,
output reg [63:0] VAR9,
output reg [63:0] VAR26,
output reg [63:0] VAR102,
output reg [63:0] VAR24,
output reg [63:0] VAR37,
output reg VAR110,
output reg [35:0] VAR80
);
localparam integer VAR82 = 0;
localparam integer VAR119 = 1;
localparam integer VAR5 = 2;
localparam integer VAR109 = VAR61 ? 32 : 16;
localparam integer VAR91 = (VAR61 ? 32 : 16) + 4*VAR115*VAR56;
localparam integer VAR44 = (VAR61 ? 5 : 4) + VAR115*VAR56;
localparam VAR74 = VAR2 || VAR17 || VAR73 || VAR12;
localparam [35:0] VAR66 = {4'VAR84 0001, 32'VAR84 0};
localparam [35:0] VAR113 = {4'VAR84 0010, 32'VAR84 0};
localparam [35:0] VAR108 = {4'VAR84 1000, 32'VAR84 0};
reg [63:0] VAR45, VAR23;
reg [31:0] VAR76, VAR98, VAR20, VAR4, VAR70;
reg [4:0] VAR3;
reg [31:0] VAR53;
reg [31:0] VAR65;
reg [31:0] VAR25;
wire VAR90 = VAR117;
wire VAR101 = VAR100;
wire VAR36 = VAR97;
wire [31:0] VAR57 = VAR59;
wire [31:0] VAR86 = VAR39;
wire [ 3:0] VAR30 = VAR58;
wire [31:0] VAR60 = VAR112;
assign VAR10 = VAR20;
assign VAR16 = VAR4;
wire [31:0] VAR28;
reg VAR14;
reg VAR83;
reg [31:0] VAR93;
reg [31:0] VAR104;
reg [31:0] VAR67;
reg [31:0] VAR29 [0:VAR91-1];
integer VAR95;
|
isc
|
The-OpenROAD-Project/asap7
|
asap7sc6t_26/Verilog/asap7sc6t_AO_SLVT_FF_210930.v
| 231,331 |
module MODULE1 (VAR10, VAR2, VAR3, VAR8, VAR4);
output VAR10;
input VAR2, VAR3, VAR8, VAR4;
wire VAR7, VAR9, VAR11;
wire VAR6, VAR1, VAR5;
not (VAR6, VAR4);
not (VAR11, VAR8);
not (VAR9, VAR3);
and (VAR1, VAR9, VAR11);
not (VAR7, VAR2);
and (VAR5, VAR7, VAR11);
or (VAR10, VAR5, VAR1, VAR6);
|
bsd-3-clause
|
CospanDesign/nysa-verilog
|
verilog/axi/slave/axi_sdb/rtl/axi_sdb.v
| 10,282 |
module MODULE1 #(
input clk,
input VAR15,
input VAR27,
output reg VAR8,
input [31:0] VAR16,
input [2:0] VAR21,
input VAR11,
output reg VAR25,
input [31:0] VAR24,
input [3:0] VAR4,
output reg VAR29,
input VAR1,
output reg [1:0] VAR30,
input VAR18,
output reg VAR23,
input [31:0] VAR3,
input [2:0] VAR6,
output reg VAR26,
input VAR12,
output [31:0] VAR2,
output reg [2:0] VAR14
);
localparam VAR17 = 0;
localparam VAR22 = 1;
localparam VAR7 = 2;
localparam VAR9 = 1;
localparam VAR19 = 2;
parameter VAR20 = VAR28 + (VAR5 * VAR10);
reg [31:0] VAR13 [(VAR20 - 1):0];
|
mit
|
olgirard/openmsp430
|
core/synthesis/actel/src/omsp_clock_module.v
| 9,432 |
module MODULE1 (
VAR41, VAR47, VAR8, VAR31, VAR33, VAR36,
VAR45, VAR17, VAR20, VAR21, VAR38, VAR39, VAR11, VAR37, VAR46, VAR3, VAR29 );
output VAR41; output VAR47; output [15:0] VAR8; output VAR31; output VAR33; output VAR36;
input VAR45; input VAR17; input VAR20; input VAR21; input [7:0] VAR38; input [15:0] VAR39; input VAR11; input [1:0] VAR37; input VAR46; input VAR3; input VAR29;
parameter VAR15 = 9'h057;
parameter VAR35 = 9'h058;
parameter VAR16 = (256'h1 << (VAR15 /2));
parameter VAR12 = (256'h1 << (VAR35 /2));
reg [255:0] VAR13;
always @(VAR38)
case (VAR38)
(VAR15 /2): VAR13 = VAR16;
(VAR35 /2): VAR13 = VAR12;
default : VAR13 = {256{1'b0}};
endcase
wire VAR28 = VAR37[0] & VAR11;
wire VAR23 = VAR37[1] & VAR11;
wire VAR6 = ~|VAR37 & VAR11;
wire [255:0] VAR10 = VAR13 & {256{VAR23}};
wire [255:0] VAR1 = VAR13 & {256{VAR28}};
wire [255:0] VAR14 = VAR13 & {256{VAR6}};
reg [7:0] VAR43;
wire VAR2 = VAR15[0] ? VAR10[VAR15/2] : VAR1[VAR15/2];
wire [7:0] VAR7 = VAR15[0] ? VAR39[15:8] : VAR39[7:0];
always @ (posedge VAR47 or posedge VAR33)
if (VAR33) VAR43 <= 8'h00;
else if (VAR2) VAR43 <= VAR7 & 8'h30;
reg [7:0] VAR26;
wire VAR25 = VAR35[0] ? VAR10[VAR35/2] : VAR1[VAR35/2];
wire [7:0] VAR49 = VAR35[0] ? VAR39[15:8] : VAR39[7:0];
always @ (posedge VAR47 or posedge VAR33)
if (VAR33) VAR26 <= 8'h00;
else if (VAR25) VAR26 <= VAR49 & 8'h0e;
wire [15:0] VAR48 = (VAR43 & {8{VAR14[VAR15/2]}}) << (8 & {4{VAR15[0]}});
wire [15:0] VAR24 = (VAR26 & {8{VAR14[VAR35/2]}}) << (8 & {4{VAR35[0]}});
wire [15:0] VAR8 = VAR48 |
VAR24;
reg [2:0] VAR32;
always @ (posedge VAR47 or posedge VAR33)
if (VAR33) VAR32 <= 3'b000;
else VAR32 <= {VAR32[1:0], VAR20};
wire VAR30 = (VAR32[1] & ~VAR32[2]) & ~(VAR21 & ~VAR26[VAR40]);
wire VAR47 = VAR17;
wire VAR34 = !VAR17;
reg [2:0] VAR42;
wire VAR41 = VAR30 & ((VAR43[VAR27]==2'b00) ? 1'b1 :
(VAR43[VAR27]==2'b01) ? VAR42[0] :
(VAR43[VAR27]==2'b10) ? &VAR42[1:0] :
&VAR42[2:0]);
always @ (posedge VAR47 or posedge VAR33)
if (VAR33) VAR42 <= 3'h0;
else if ((VAR43[VAR27]!=2'b00) & VAR30) VAR42 <= VAR42+3'h1;
reg [2:0] VAR9;
wire VAR19 = ~VAR3 & (VAR26[VAR40] ? VAR30 : 1'b1);
wire VAR36 = VAR19 & ((VAR26[VAR18]==2'b00) ? 1'b1 :
(VAR26[VAR18]==2'b01) ? VAR9[0] :
(VAR26[VAR18]==2'b10) ? &VAR9[1:0] :
&VAR9[2:0]);
always @ (posedge VAR47 or posedge VAR33)
if (VAR33) VAR9 <= 3'h0;
else if ((VAR26[VAR18]!=2'b00) & VAR19) VAR9 <= VAR9+3'h1;
wire VAR22 = !VAR46;
reg [1:0] VAR44;
always @(posedge VAR34 or posedge VAR22)
if (VAR22) VAR44 <= 2'b11;
else VAR44 <= {VAR44[0], 1'b0};
wire VAR31 = VAR44[1];
wire VAR4 = VAR22 | VAR29 | VAR45;
reg [1:0] VAR5;
always @(posedge VAR34 or posedge VAR4)
if (VAR4) VAR5 <= 2'b11;
else VAR5 <= {VAR5[0], 1'b0};
wire VAR33 = VAR5[1];
endmodule
|
bsd-3-clause
|
google/skywater-pdk-libs-sky130_fd_sc_hs
|
cells/clkdlyinv3sd2/sky130_fd_sc_hs__clkdlyinv3sd2.functional.v
| 1,759 |
module MODULE1 (
VAR6 ,
VAR4 ,
VAR1,
VAR5
);
output VAR6 ;
input VAR4 ;
input VAR1;
input VAR5;
wire VAR2 ;
wire VAR3;
not VAR10 (VAR2 , VAR4 );
VAR7 VAR8 (VAR3, VAR2, VAR1, VAR5);
buf VAR9 (VAR6 , VAR3 );
endmodule
|
apache-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_hd
|
cells/o2111a/sky130_fd_sc_hd__o2111a.pp.symbol.v
| 1,400 |
module MODULE1 (
input VAR2 ,
input VAR8 ,
input VAR5 ,
input VAR4 ,
input VAR6 ,
output VAR1 ,
input VAR7 ,
input VAR9,
input VAR3,
input VAR10
);
endmodule
|
apache-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_hdll
|
cells/or2/sky130_fd_sc_hdll__or2_6.v
| 2,091 |
module MODULE1 (
VAR8 ,
VAR6 ,
VAR2 ,
VAR7,
VAR5,
VAR4 ,
VAR1
);
output VAR8 ;
input VAR6 ;
input VAR2 ;
input VAR7;
input VAR5;
input VAR4 ;
input VAR1 ;
VAR9 VAR3 (
.VAR8(VAR8),
.VAR6(VAR6),
.VAR2(VAR2),
.VAR7(VAR7),
.VAR5(VAR5),
.VAR4(VAR4),
.VAR1(VAR1)
);
endmodule
module MODULE1 (
VAR8,
VAR6,
VAR2
);
output VAR8;
input VAR6;
input VAR2;
supply1 VAR7;
supply0 VAR5;
supply1 VAR4 ;
supply0 VAR1 ;
VAR9 VAR3 (
.VAR8(VAR8),
.VAR6(VAR6),
.VAR2(VAR2)
);
endmodule
|
apache-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_lp
|
cells/dfbbp/sky130_fd_sc_lp__dfbbp.behavioral.v
| 2,671 |
module MODULE1 (
VAR16 ,
VAR5 ,
VAR9 ,
VAR6 ,
VAR18 ,
VAR8
);
output VAR16 ;
output VAR5 ;
input VAR9 ;
input VAR6 ;
input VAR18 ;
input VAR8;
supply1 VAR25;
supply0 VAR15;
supply1 VAR17 ;
supply0 VAR24 ;
wire VAR23 ;
wire VAR12 ;
wire VAR28 ;
wire VAR4 ;
wire VAR21;
wire VAR13 ;
reg VAR20 ;
wire VAR14 ;
wire VAR7 ;
wire VAR11 ;
wire VAR27 ;
wire VAR1 ;
not VAR22 (VAR23 , VAR21 );
not VAR19 (VAR12 , VAR13 );
VAR3 VAR26 (VAR28 , VAR12, VAR23, VAR4, VAR14, VAR20, VAR25, VAR15);
assign VAR7 = ( VAR25 === 1'b1 );
assign VAR11 = ( VAR7 && ( VAR21 === 1'b1 ) );
assign VAR27 = ( VAR7 && ( VAR13 === 1'b1 ) );
assign VAR1 = ( VAR11 & VAR27 );
buf VAR2 (VAR16 , VAR28 );
not VAR10 (VAR5 , VAR28 );
endmodule
|
apache-2.0
|
thinkoco/de1_soc_opencl
|
de1soc_sharedonly_vga/ip/vga_pll/vga_pll.v
| 17,417 |
module MODULE1 (
input wire VAR3, input wire rst, output wire VAR5, output wire VAR6, output wire VAR4 );
VAR2 VAR1 (
.VAR3 (VAR3), .rst (rst), .VAR5 (VAR5), .VAR6 (VAR6), .VAR4 (VAR4) );
endmodule
|
apache-2.0
|
parallella/oh
|
elink/hdl/etx_arbiter.v
| 4,463 |
module MODULE1 (
VAR25, VAR14, VAR33, VAR12, VAR10,
VAR44,
clk, VAR36, VAR18, VAR52, VAR29, VAR34,
VAR13, VAR39, VAR28, VAR30
);
parameter VAR20 = 32;
parameter VAR53 = 2*VAR20+40;
parameter VAR45 = 0;
input clk;
input VAR36;
input VAR18;
input [VAR53-1:0] VAR52;
output VAR25;
input VAR29;
input [VAR53-1:0] VAR34;
output VAR14;
input VAR13;
input [VAR53-1:0] VAR39;
output VAR33;
input VAR28;
input VAR30;
output VAR12; output VAR10; output [VAR53-1:0] VAR44;
reg VAR12;
reg [VAR53-1:0] VAR44;
reg VAR10; reg [VAR53-1:0] VAR50;
wire [3:0] VAR22;
wire [3:0] VAR16;
wire VAR37;
wire [VAR53-1:0] VAR32;
wire VAR1;
wire VAR8;
wire VAR11;
wire [VAR53-1:0] VAR15;
wire [31:0] VAR46;
VAR17 #(.VAR41(3)) VAR9 (.VAR35({VAR8,
VAR11, VAR1
}),
.VAR5({VAR29,
VAR18,
VAR13
})
);
VAR31 #(.VAR24(VAR53))
VAR48(.out (VAR15[VAR53-1:0]),
.VAR2 (VAR52[VAR53-1:0]),.VAR21 (VAR11),
.VAR7 (VAR34[VAR53-1:0]),.VAR26 (VAR8),
.VAR49 (VAR39[VAR53-1:0]),.VAR19 (VAR1)
);
assign VAR23 = (VAR28 & ~VAR40) |
(VAR30 & VAR40);
assign VAR33 = VAR23;
assign VAR25 = VAR23 |
VAR13;
assign VAR14 = VAR23 |
VAR13 |
VAR18;
assign VAR37 = VAR11 |
VAR8 |
VAR1;
VAR3 #(.VAR20(VAR20))
VAR42 (.VAR51 (),
.VAR6 (),
.VAR4 (),
.VAR43 (VAR46[31:0]),
.VAR27 (),
.VAR47 (),
.VAR38 (VAR15[VAR53-1:0]));
assign VAR40 = (VAR46[31:20]==VAR45);
always @ (posedge clk)
if (!VAR36)
VAR12 <= 1'b0;
else if (~VAR28)
VAR12 <= VAR37 & ~VAR40;
always @ (posedge clk)
if (!VAR36)
VAR10 <= 1'b0;
else if (~VAR30)
VAR10 <= (VAR11 | VAR8) & VAR40;
always @ (posedge clk)
if (VAR37 & ~VAR23)
VAR44[VAR53-1:0] <= VAR15[VAR53-1:0];
endmodule
|
mit
|
Given-Jiang/Gaussian_Filter_Altera_OpenCL_DE1-SoC
|
Gaussian_Filter/ip/Gaussian_Filter/vfabric_ldexp.v
| 2,442 |
module MODULE1(VAR28, VAR7,
VAR27, VAR19, VAR11,
VAR18, VAR15, VAR22,
VAR4, VAR3, VAR26);
parameter VAR31 = 32;
parameter VAR23 = 64;
input VAR28, VAR7;
input [VAR31-1:0] VAR27, VAR18;
input VAR19, VAR15;
output VAR11, VAR22;
output [VAR31-1:0] VAR4;
output VAR3;
input VAR26;
wire [VAR31-1:0] VAR10, VAR32;
wire VAR24, VAR12;
wire VAR5;
wire VAR2;
VAR14 VAR6 ( .VAR28(VAR28), .VAR7(VAR7),
.VAR9(VAR27), .VAR1(VAR10), .VAR25(VAR19),
.VAR20( VAR24 ), .VAR17(VAR5), .VAR29(VAR11) );
VAR14 VAR16 ( .VAR28(VAR28), .VAR7(VAR7),
.VAR9(VAR18), .VAR1(VAR32), .VAR25(VAR15),
.VAR20( VAR12 ), .VAR17(VAR5), .VAR29(VAR22) );
assign VAR5 = !(VAR24 & VAR12) | VAR2 ;
VAR30 VAR8(.VAR28(VAR28), .VAR7(VAR7),
.VAR10(VAR10), .VAR32(VAR32), .VAR25(VAR24 & VAR12),
.VAR20(VAR3),
.VAR17(VAR26), .VAR29(VAR2), .VAR13(VAR4));
endmodule
|
mit
|
hoangt/NOCulator
|
hring/hw/buffered/src/vcr_la_routing_logic.v
| 10,522 |
module MODULE1
(clk, reset, VAR23, VAR31, VAR26, VAR7,
VAR12);
parameter VAR14 = 2;
parameter VAR30 = 4;
localparam VAR24 = VAR9(VAR30);
parameter VAR15 = 2;
localparam VAR22 = VAR15 * VAR24;
parameter VAR32 = 1;
localparam VAR33 = VAR9(VAR32);
localparam VAR29 = VAR22 + VAR33;
parameter VAR21 = VAR27;
localparam VAR17
= ((VAR21 == VAR27) ||
(VAR21 == VAR5)) ?
2 :
(VAR21 == VAR35) ?
(VAR30 - 1) :
-1;
localparam VAR40
= VAR15 * VAR17 + VAR32;
localparam VAR41 = VAR9(VAR40);
localparam VAR45
= VAR41 + ((VAR14 > 1) ? 1 : 0);
parameter VAR37 = VAR38;
parameter VAR20 = VAR3;
parameter VAR2 = 0;
localparam VAR43
= (VAR2 == (VAR14 - 1)) ?
VAR29 :
(VAR2 == (VAR14 - 2)) ?
(VAR22 + VAR29) :
(2 * VAR22);
parameter VAR4 = VAR10;
input clk;
input reset;
input [0:VAR22-1] VAR23;
input [0:VAR41-1] VAR31;
input VAR26;
input [0:VAR43-1] VAR7;
output [0:VAR45-1] VAR12;
wire [0:VAR45-1] VAR12;
wire [0:VAR22-1] VAR34;
wire [0:VAR22-1] VAR36;
wire [0:VAR15-1] VAR11;
wire [0:VAR40-1] VAR25;
generate
if(VAR14 > 1)
begin
wire VAR18;
if(VAR2 == (VAR14 - 1))
begin
assign VAR34
= VAR7[0:VAR22-1];
assign VAR18 = 1'b0;
end
else
begin
assign VAR34
= VAR26 ?
VAR7[VAR22:2*VAR22-1] :
VAR7[0:VAR22-1];
assign VAR18
= (VAR36 == VAR34);
end
assign VAR12[VAR41] = VAR18;
end
else
assign VAR34 = VAR7[0:VAR22-1];
case(VAR37)
begin
genvar VAR44;
for(VAR44 = 0; VAR44 < VAR15; VAR44 = VAR44 + 1)
begin:VAR42
wire [0:VAR24-1] VAR19;
assign VAR19
= VAR34[VAR44*VAR24:
(VAR44+1)*VAR24-1];
wire [0:VAR24-1] VAR39;
assign VAR39
= VAR23[VAR44*VAR24:
(VAR44+1)*VAR24-1];
wire [0:VAR24-1] VAR8;
assign VAR11[VAR44] = (VAR8 == VAR19);
wire VAR6;
case(VAR20)
begin
if(VAR44 == 0)
assign VAR6 = ~VAR11[VAR44];
end
else
assign VAR6 = &VAR11[0:VAR44-1] &
~VAR11[VAR44];
end
begin
if(VAR44 == (VAR15 - 1))
assign VAR6 = ~VAR11[VAR44];
end
else
assign VAR6 = ~VAR11[VAR44] &
VAR11[(VAR44+1):
(VAR15-1)];
end
endcase
wire [0:VAR17-1] VAR28;
assign VAR36[VAR44*VAR24:
(VAR44+1)*VAR24-1]
= VAR8;
case(VAR21)
begin
wire VAR16;
assign VAR16
= (VAR31 == VAR44*VAR17);
wire VAR13;
assign VAR13
= (VAR31 == VAR44*VAR17+1);
wire [0:VAR24-1] VAR1;
if(VAR24 > 1)
assign VAR1[0:VAR24-2]
= {(VAR24-1){VAR16}};
assign VAR1[VAR24-1]
= VAR16 | VAR13;
assign VAR8 = VAR39 + VAR1;
case(VAR21)
begin
assign VAR28
= {VAR19 < VAR8,
VAR19 > VAR8};
end
begin
begin
begin
begin
|
mit
|
trivoldus28/pulsarch-verilog
|
design/sys/iop/sctag/rtl/sctag_wbctl.v
| 43,193 |
module MODULE1(
VAR73, VAR164, VAR210, VAR145, VAR89,
VAR225, VAR178,
VAR161, VAR171,
VAR53, VAR113,
VAR184, VAR165, VAR39,
VAR197, VAR195, VAR65,
VAR9, VAR69, VAR194,
VAR35, VAR23,
VAR98, VAR56, VAR41,
VAR33, VAR159, VAR156, VAR196, VAR45, VAR188, VAR38,
VAR149, VAR80, VAR215,
VAR18, VAR168, VAR155,
VAR219, VAR139, VAR4,
VAR222, VAR102, VAR162,
VAR180
);
input VAR33, VAR159;
output VAR73;
input VAR156;
input VAR196;
input VAR45;
input VAR188;
input VAR38;
input VAR149;
input VAR80;
input [3:0] VAR215;
input VAR18;
input VAR168;
input VAR155;
input [7:0] VAR219;
output [7:0] VAR164; output VAR210; output [7:0] VAR145;
output VAR89;
input VAR139;
input VAR4; input VAR222;
input VAR102;
output [2:0] VAR225; output [3:0] VAR178; output [2:0] VAR161;
output VAR171;
output [2:0] VAR53;
output VAR113;
output VAR184;
output VAR165; output VAR39;
output [3:0] VAR197;
output VAR195;
output [3:0] VAR65;
output VAR9;
input [3:0] VAR162 ; input VAR180 ;
output VAR69;
output VAR194;
output [1:0] VAR35;
output VAR23;
output [3:0] VAR98;
output [3:0] VAR56;
output VAR41;
wire VAR157;
wire [7:0] VAR14;
wire [7:0] VAR57;
wire VAR160;
wire [2:0] VAR76;
wire [2:0] VAR68;
wire [7:0] VAR105;
wire [7:0] VAR231;
wire [7:0] VAR125;
wire VAR165;
wire VAR72;
wire VAR74;
wire VAR223;
wire [7:0] VAR8;
wire [7:0] VAR229;
wire [7:0] VAR22;
wire [7:0] VAR221;
wire [7:0] VAR204;
wire VAR85;
wire [7:0] VAR36;
wire [3:0] VAR216;
wire [3:0] VAR47;
wire [3:0] VAR132;
wire [3:0] VAR79;
wire [3:0] VAR66;
wire [3:0] VAR19;
wire [3:0] VAR122;
wire [3:0] VAR50;
wire [7:0] VAR150;
wire [7:0] VAR29;
wire VAR211;
wire VAR100;
wire [7:0] VAR151;
wire VAR152;
wire VAR166;
wire VAR5;
wire [3:0] VAR84;
wire [3:0] VAR31;
wire [3:0] VAR177;
wire VAR6;
wire VAR108;
wire VAR200;
wire VAR181;
wire VAR147;
wire VAR109;
wire VAR111;
wire [2:0] VAR58;
wire [2:0] state;
wire VAR86;
wire VAR206;
wire VAR77;
wire [3:0] VAR187;
wire [3:0] VAR78;
wire [3:0] VAR93;
wire [3:0] VAR153;
wire VAR138;
wire VAR20;
wire VAR1;
wire VAR205;
wire [2:0] VAR96;
wire [2:0] VAR230;
wire [2:0] VAR124;
wire VAR154;
wire VAR40;
wire [3:0] VAR143;
wire [3:0] VAR141;
wire [3:0] VAR32;
wire VAR67;
wire VAR218;
wire [3:0] VAR193;
wire [3:0] VAR224;
wire [3:0] VAR186;
wire VAR81;
wire VAR209;
wire [3:0] VAR15;
wire [3:0] VAR43;
wire [3:0] VAR116;
wire [3:0] VAR83;
wire [3:0] VAR13;
wire [3:0] VAR49;
wire [2:0] VAR158;
wire [3:0] VAR71;
wire [3:0] VAR88;
wire [3:0] VAR220;
wire [2:0] VAR199;
wire [7:0] VAR114;
wire [3:0] VAR61 ;
wire [7:0] VAR217;
wire [3:0] VAR7;
wire VAR91, VAR90 ;
wire [3:0] VAR42;
wire [3:0] VAR233;
wire [3:0] VAR120;
wire [3:0] VAR106;
wire VAR198;
wire VAR130;
wire VAR64;
wire VAR175;
wire VAR112;
wire VAR174;
wire VAR70;
wire [7:0] VAR236;
wire VAR137, VAR60;
wire VAR227;
wire [7:0] VAR104;
wire VAR213;
wire VAR142;
wire [7:0] VAR173;
VAR30 #(1) VAR25 (.VAR212(VAR142),
.clk(VAR156),
.VAR170(VAR196),
.din(VAR45),
.VAR159(VAR159), .VAR33(), .VAR73());
VAR26 #(1) VAR185
(.VAR212 (VAR27),
.din (VAR222),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR26 #(1) VAR94
(.VAR212 (VAR44),
.din (VAR80),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR26 #(1) VAR63
(.VAR212 (VAR207),
.din (VAR4),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR26 #(1) VAR46
(.VAR212 (VAR157),
.din (VAR102),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR164[0] = ~VAR57[0] ;
assign VAR164[1] = ~VAR57[1] & VAR57[0] ;
assign VAR164[2] = ~VAR57[2] & (&(VAR57[1:0])) ;
assign VAR164[3] = ~VAR57[3] & (&(VAR57[2:0])) ;
assign VAR164[4] = ~VAR57[4] & (&(VAR57[3:0])) ;
assign VAR164[5] = ~VAR57[5] & (&(VAR57[4:0])) ;
assign VAR164[6] = ~VAR57[6] & (&(VAR57[5:0])) ;
assign VAR164[7] = ~VAR57[7] & (&(VAR57[6:0])) ;
VAR26 #(8) VAR134
(.VAR212 (VAR236[7:0]),
.din (VAR164[7:0]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR76[0] = (VAR236[1] | VAR236[3] |
VAR236[5] | VAR236[7]) ;
assign VAR76[1] = (VAR236[2] | VAR236[3] |
VAR236[6] | VAR236[7]) ;
assign VAR76[2] = (VAR236[4] | VAR236[5] |
VAR236[6] | VAR236[7]) ;
VAR26 #(3) VAR176
(.VAR212 (VAR68[2:0]),
.din (VAR76[2:0]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR26 #(1) VAR48
(.VAR212 (VAR203),
.din (VAR155),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR213 = VAR149 |
(VAR203 & VAR44 &
VAR27) ;
VAR26 #(1) VAR146
(.VAR212 (VAR210),
.din (VAR213),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR26 #(1) VAR235
(.VAR212 (VAR10),
.din (VAR210),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR26 #(1) VAR37
(.VAR212 (VAR192),
.din (VAR10),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR225[2:0] = VAR68[2:0] ;
assign VAR178[3:0] = {4{VAR192}} ;
assign VAR98 = {4{VAR111}} & VAR7 ;
assign VAR56 = {4{VAR147}} & VAR7 ;
assign VAR8 = {8{VAR10}} & VAR236 ;
assign VAR229 = {8{VAR111}} & VAR217 ;
assign VAR14 = (VAR57 | VAR8) & ~(VAR229) ;
VAR24 #(8) VAR2
(.VAR212 (VAR57[7:0]),
.din (VAR14[7:0]),
.clk (VAR156), .VAR170(VAR142),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR160 = |(VAR57[7:0]) ;
assign VAR22 = ({8{VAR147}} & VAR217) ;
assign VAR221 = (VAR204 | VAR22) & ~VAR229 ;
VAR24 #(8) VAR182
(.VAR212 (VAR204[7:0]),
.din (VAR221[7:0]),
.clk (VAR156), .VAR170(VAR142),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR137 = VAR139 & VAR210;
VAR26 #(1) VAR55
(.VAR212 (VAR60),
.din (VAR137),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR227 = ( VAR60 & ~VAR207 ) ;
assign VAR104 = ( (VAR219[7:0] & VAR57[7:0]) &
~(VAR204[7:0] | {8{VAR207}}) ) ;
assign VAR165 = (|(VAR104[7:0])) |
VAR227 ;
assign VAR105 = ( VAR104 ) |
( {8{VAR227}} & VAR236 ) ;
VAR26 #(8) VAR208
(.VAR212 (VAR231[7:0]),
.din (VAR105[7:0]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR26 #(8) VAR128
(.VAR212 (VAR125[7:0]),
.din (VAR231[7:0]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR72 = VAR165 & VAR222 ;
VAR26 #(1) VAR191
(.VAR212 (VAR74),
.din (VAR72),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR26 #(1) VAR148
(.VAR212 (VAR223),
.din (VAR74),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR85 = VAR223 & ~VAR18;
assign VAR36 = {8{VAR85}} & VAR125[7:0] ;
VAR131 #(4) VAR140
(.VAR212 (VAR216[3:0]),
.din (VAR215[3:0]),
.en (VAR36[0]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR131 #(4) VAR121
(.VAR212 (VAR47[3:0]),
.din (VAR215[3:0]),
.en (VAR36[1]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR131 #(4) VAR82
(.VAR212 (VAR132[3:0]),
.din (VAR215[3:0]),
.en (VAR36[2]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR131 #(4) VAR101
(.VAR212 (VAR79[3:0]),
.din (VAR215[3:0]),
.en (VAR36[3]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR131 #(4) VAR183
(.VAR212 (VAR66[3:0]),
.din (VAR215[3:0]),
.en (VAR36[4]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR131 #(4) VAR169
(.VAR212 (VAR19[3:0]),
.din (VAR215[3:0]),
.en (VAR36[5]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR131 #(4) VAR126
(.VAR212 (VAR122[3:0]),
.din (VAR215[3:0]),
.en (VAR36[6]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR131 #(4) VAR232
(.VAR212 (VAR50[3:0]),
.din (VAR215[3:0]),
.en (VAR36[7]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR150[7:0] = (VAR29[7:0] | VAR36[7:0]) &
~(VAR151[7:0]) ;
VAR24 #(8) VAR172
(.VAR212 (VAR29[7:0]),
.din (VAR150[7:0]),
.clk (VAR156), .VAR170(VAR142),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR211 = |(VAR150[7:0]) ;
VAR24 #(1) VAR228
(.VAR212 (VAR100),
.din (VAR211),
.clk (VAR156), .VAR170(VAR142),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR151[7:0] = VAR204[7:0] & VAR29[7:0] ;
assign VAR152 = ~(VAR151[0] | VAR151[1] | VAR151[2]) ;
assign VAR166 = ~(VAR151[4] | VAR151[5] | VAR151[6]) ;
assign VAR5 = |(VAR151[3:0]) ;
assign VAR173[0] = VAR151[0] & ~VAR38 ;
assign VAR173[1] = VAR151[1] & ~VAR38 ;
assign VAR173[2] = VAR151[2] & ~VAR38 ;
assign VAR173[3] = VAR152 | VAR38 ;
assign VAR173[4] = VAR151[4] & ~VAR38 ;
assign VAR173[5] = VAR151[5] & ~VAR38 ;
assign VAR173[6] = VAR151[6] & ~VAR38 ;
assign VAR173[7] = VAR166 | VAR38 ;
VAR34 #(4) VAR117
(.dout (VAR84[3:0]),
.VAR51 (VAR216[3:0]), .VAR144 (VAR173[0]),
.VAR3 (VAR47[3:0]), .VAR226 (VAR173[1]),
.VAR190 (VAR132[3:0]), .VAR107 (VAR173[2]),
.VAR103 (VAR79[3:0]), .VAR75 (VAR173[3])
) ;
VAR34 #(4) VAR16
(.dout (VAR31[3:0]),
.VAR51 (VAR66[3:0]), .VAR144 (VAR173[4]),
.VAR3 (VAR19[3:0]), .VAR226 (VAR173[5]),
.VAR190 (VAR122[3:0]), .VAR107 (VAR173[6]),
.VAR103 (VAR50[3:0]), .VAR75 (VAR173[7])
) ;
VAR163 #(4) VAR189
(.dout (VAR177[3:0]),
.VAR51 (VAR84[3:0]), .VAR144 (VAR5),
.VAR3 (VAR31[3:0]), .VAR226 (~VAR5)
) ;
assign VAR39 = |(VAR151[7:0]) ;
assign VAR197 = VAR177[3:0] ;
assign VAR6 = ( VAR160 | VAR180 )
& ~VAR206 & ~VAR168 ;
assign VAR108 = ~VAR142 | VAR111 ;
assign VAR200 = state[0] & VAR6 ;
assign VAR58[0] = (state[0] | VAR108) & ~VAR200 ;
assign VAR181 = VAR200 ;
assign VAR147 = state[1] & VAR157 ;
assign VAR58[1] = (state[1] | VAR181) & ~VAR147 & VAR142 ;
assign VAR109 = VAR147 ;
assign VAR111 = state[2] & (VAR153[3:0] == 4'd12) ;
assign VAR58[2] = (state[2] | VAR109) & ~VAR111 & VAR142 ;
VAR26 #(3) VAR214
(.VAR212 (state[2:0]),
.din (VAR58[2:0]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR86 = (VAR206 | VAR200) & ~VAR111 ;
VAR24 #(1) VAR118
(.VAR212 (VAR206),
.din (VAR86),
.clk (VAR156), .VAR170(VAR142),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR77 = (VAR109 | state[2]) ;
assign VAR187 = VAR153 + 4'b1 ;
assign VAR78 = VAR187 & ~{4{VAR111}} ;
VAR163 #(4) VAR135
(.dout (VAR93[3:0]),
.VAR51 (VAR153[3:0]), .VAR144 (~VAR77),
.VAR3 (VAR78[3:0]), .VAR226 (VAR77)
) ;
VAR24 #(4) VAR11
(.VAR212 (VAR153[3:0]),
.din (VAR93[3:0]),
.clk (VAR156), .VAR170(VAR142),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR89 = VAR200 & ~VAR158[2] ;
assign VAR145 = VAR114 ;
assign VAR9 = VAR200 & VAR158[2] ;
assign VAR65 = VAR61;
VAR131 #(8) VAR97
(.VAR212 (VAR217[7:0]),
.din (VAR114[7:0]),
.en (VAR200),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR131 #(1) VAR59
(.VAR212 (VAR90),
.din (VAR89),
.en (VAR200),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR131 #(4) VAR87
(.VAR212 (VAR7[3:0]),
.din (VAR61[3:0]),
.en (VAR200),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR131 #(1) VAR123
(.VAR212 (VAR91),
.din (VAR9),
.en (VAR200),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR26 #(1) VAR12
(.VAR212 (VAR69),
.din (VAR89),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR26 #(1) VAR52
(.VAR212 (VAR194),
.din (VAR200),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR26 #(1) VAR119
(.VAR212 (VAR184),
.din (VAR194),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR161[0] = (VAR217[1] | VAR217[3] |
VAR217[5] | VAR217[7]) ;
assign VAR161[1] = (VAR217[2] | VAR217[3] |
VAR217[6] | VAR217[7]) ;
assign VAR161[2] = (VAR217[4] | VAR217[5] |
VAR217[6] | VAR217[7]) ;
assign VAR171 = (VAR113 & ~VAR138) &
VAR90 ;
assign VAR35[0] = (VAR7[1] | VAR7[3] );
assign VAR35[1] = (VAR7[2] | VAR7[3] );
assign VAR23 = (VAR113 & ~VAR138) &
VAR91 ;
assign VAR53 = VAR153[2:0] ;
assign VAR113 = VAR147 | (state[2] & (VAR153 < 4'd8)) ;
VAR26 #(1) VAR62
(.VAR212 (VAR138),
.din (VAR113),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR70 = VAR111 &
VAR91 ;
VAR26 #(1) VAR234
(.VAR212 (VAR41),
.din (VAR70),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
VAR163 #(4) VAR133
(.dout (VAR71[3:0]),
.VAR51 (VAR57[3:0]), .VAR144 (~VAR100),
.VAR3 (VAR29[3:0]), .VAR226 (VAR100)
) ;
VAR163 #(4) VAR17
(.dout (VAR88[3:0]),
.VAR51 (VAR57[7:4]), .VAR144 (~VAR100),
.VAR3 (VAR29[7:4]), .VAR226 (VAR100)
) ;
assign VAR220[3:0] = VAR162[3:0] ;
assign VAR199[0] = |(VAR71[3:0]) ;
assign VAR199[1] = |(VAR88[3:0]) ;
assign VAR199[2] = |(VAR220[3:0]) ;
assign VAR20 = ~VAR142 | ~VAR188 ;
assign VAR1 = VAR147 & ~VAR20 ;
assign VAR205 = ~VAR1 & ~VAR20 ;
assign VAR96 = {VAR124[1:0], VAR124[2]} ;
VAR202 #(3) VAR54
(.dout (VAR230[2:0]),
.VAR51 (3'b01), .VAR144 (VAR20),
.VAR3 (VAR124[2:0]), .VAR226 (VAR205),
.VAR190 (VAR96[2:0]), .VAR107 (VAR1)
) ;
VAR26 #(3) VAR167
(.VAR212 (VAR124[2:0]),
.din (VAR230[2:0]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR154 = VAR147 & |(VAR217[3:0]) & ~VAR20 ;
assign VAR40 = ~VAR154 & ~VAR20 ;
assign VAR143 = {VAR32[2:0], VAR32[3]} ;
VAR202 #(4) VAR99
(.dout (VAR141[3:0]),
.VAR51 (4'b0001), .VAR144 (VAR20),
.VAR3 (VAR32[3:0]), .VAR226 (VAR40),
.VAR190 (VAR143[3:0]), .VAR107 (VAR154)
) ;
VAR26 #(4) VAR92
(.VAR212 (VAR32[3:0]),
.din (VAR141[3:0]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR67 = VAR147 & |(VAR217[7:4]) & ~VAR20 ;
assign VAR218 = ~VAR67 & ~VAR20 ;
assign VAR193 = {VAR186[2:0], VAR186[3]} ;
VAR202 #(4) VAR179
(.dout (VAR224[3:0]),
.VAR51 (4'b0001), .VAR144 (VAR20),
.VAR3 (VAR186[3:0]), .VAR226 (VAR218),
.VAR190 (VAR193[3:0]), .VAR107 (VAR67)
) ;
VAR26 #(4) VAR110
(.VAR212 (VAR186[3:0]),
.din (VAR224[3:0]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR81 = VAR147 & |(VAR217[7:4]) & ~VAR20 ;
assign VAR209 = ~VAR81 & ~VAR20 ;
assign VAR15 = {VAR116[2:0], VAR116[3]} ;
VAR202 #(4) VAR21
(.dout (VAR43[3:0]),
.VAR51 (4'b0001), .VAR144 (VAR20),
.VAR3 (VAR116[3:0]), .VAR226 (VAR209),
.VAR190 (VAR15[3:0]), .VAR107 (VAR81)
) ;
VAR26 #(4) VAR28
(.VAR212 (VAR116[3:0]),
.din (VAR43[3:0]),
.clk (VAR156),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
assign VAR83[0] = VAR71[0] &
(VAR32[0] |
(VAR32[1] & ~(VAR71[1] |
VAR71[2] |
VAR71[3])) |
(VAR32[2] & ~(VAR71[2] |
VAR71[3])) |
(VAR32[3] & ~(VAR71[3])) ) ;
assign VAR83[1] = VAR71[1] &
(VAR32[1] |
(VAR32[2] & ~(VAR71[2] |
VAR71[3] |
VAR71[0])) |
(VAR32[3] & ~(VAR71[3] |
VAR71[0])) |
(VAR32[0] & ~(VAR71[0])) ) ;
assign VAR83[2] = VAR71[2] &
(VAR32[2] |
(VAR32[3] & ~(VAR71[3] |
VAR71[0] |
VAR71[1])) |
(VAR32[0] & ~(VAR71[0] |
VAR71[1])) |
(VAR32[1] & ~(VAR71[1])) ) ;
assign VAR83[3] = VAR71[3] &
(VAR32[3] |
(VAR32[0] & ~(VAR71[0] |
VAR71[1] |
VAR71[2])) |
(VAR32[1] & ~(VAR71[1] |
VAR71[2])) |
(VAR32[2] & ~(VAR71[2])) ) ;
assign VAR13[0] = VAR88[0] &
(VAR186[0] |
(VAR186[1] & ~(VAR88[1] |
VAR88[2] |
VAR88[3])) |
(VAR186[2] & ~(VAR88[2] |
VAR88[3])) |
(VAR186[3] & ~(VAR88[3])) ) ;
assign VAR13[1] = VAR88[1] &
(VAR186[1] |
(VAR186[2] & ~(VAR88[2] |
VAR88[3] |
VAR88[0])) |
(VAR186[3] & ~(VAR88[3] |
VAR88[0])) |
(VAR186[0] & ~(VAR88[0])) ) ;
assign VAR13[2] = VAR88[2] &
(VAR186[2] |
(VAR186[3] & ~(VAR88[3] |
VAR88[0] |
VAR88[1])) |
(VAR186[0] & ~(VAR88[0] |
VAR88[1])) |
(VAR186[1] & ~(VAR88[1])) ) ;
assign VAR13[3] = VAR88[3] &
(VAR186[3] |
(VAR186[0] & ~(VAR88[0] |
VAR88[1] |
VAR88[2])) |
(VAR186[1] & ~(VAR88[1] |
VAR88[2])) |
(VAR186[2] & ~(VAR88[2])) ) ;
assign VAR49[0] = VAR220[0] &
(VAR116[0] |
(VAR116[1] & ~(VAR220[1] |
VAR220[2] |
VAR220[3])) |
(VAR116[2] & ~(VAR220[2] |
VAR220[3])) |
(VAR116[3] & ~(VAR220[3])) ) ;
assign VAR49[1] = VAR220[1] &
(VAR116[1] |
(VAR116[2] & ~(VAR220[2] |
VAR220[3] |
VAR220[0])) |
(VAR116[3] & ~(VAR220[3] |
VAR220[0])) |
(VAR116[0] & ~(VAR220[0])) ) ;
assign VAR49[2] = VAR220[2] &
(VAR116[2] |
(VAR116[3] & ~(VAR220[3] |
VAR220[0] |
VAR220[1])) |
(VAR116[0] & ~(VAR220[0] |
VAR220[1])) |
(VAR116[1] & ~(VAR220[1])) ) ;
assign VAR49[3] = VAR220[3] &
(VAR116[3] |
(VAR116[0] & ~(VAR220[0] |
VAR220[1] |
VAR220[2])) |
(VAR116[1] & ~(VAR220[1] |
VAR220[2])) |
(VAR116[2] & ~(VAR220[2])) ) ;
assign VAR158[0] = VAR199[0] & ( VAR124[0] |
( VAR124[1] & ~( VAR199[1] | VAR199[2] ) ) |
( VAR124[2] & ~VAR199[2] ) ) ;
assign VAR158[1] = VAR199[1] & ( VAR124[1] |
( VAR124[2] & ~( VAR199[2] | VAR199[0] ) ) |
( VAR124[0] & ~VAR199[0] ) ) ;
assign VAR158[2] = VAR199[2] & ( VAR124[2] |
( VAR124[0] & ~( VAR199[0] | VAR199[1] ) ) |
( VAR124[1] & ~VAR199[1] ) ) ;
assign VAR114[3:0] = (VAR83[3:0] & {4{VAR158[0]}}) ;
assign VAR114[7:4] = (VAR13[3:0] & {4{VAR158[1]}}) ;
assign VAR61[3:0]= (VAR49[3:0] & {4{VAR158[2]}}) ;
assign VAR198 = VAR210 & ~(VAR111 &
VAR90 ) ;
assign VAR130 = ~VAR210 &
( VAR111 & VAR90 ) ;
assign VAR64 = ~(VAR198 | VAR130) ;
assign VAR120 = VAR42 + 4'b1 ;
assign VAR106 = VAR42 - 4'b1 ;
VAR202 #(4) VAR95
(.dout (VAR233[3:0]),
.VAR51 (VAR42[3:0]), .VAR144 (VAR64),
.VAR3 (VAR120[3:0]), .VAR226 (VAR198),
.VAR190 (VAR106[3:0]), .VAR107 (VAR130)
) ;
VAR24 #(4) VAR127
(.VAR212 (VAR42[3:0]),
.din (VAR233[3:0]),
.clk (VAR156), .VAR170(VAR142),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
always @(VAR42 ) begin
if( VAR42 > 4'd8 ) begin
("VAR136", "VAR129 VAR115.");
end
end
assign VAR175 = (VAR42[3:0] == 4'd5) ;
assign VAR112 = (VAR42[3:0] > 4'd5) ;
assign VAR174 = VAR112 | (VAR175 & VAR198) ;
VAR24 #(1) VAR201
(.VAR212 (VAR195),
.din (VAR174),
.clk (VAR156), .VAR170(VAR142),
.VAR159(VAR159), .VAR33 (), .VAR73 ()
) ;
endmodule
|
gpl-2.0
|
ShepardSiegel/ocpi
|
coregen/dram_v6_mig37/iodelay_ctrl_eco20100428.v
| 3,792 |
module MODULE1 #
(
parameter VAR12 = 100, parameter VAR7 = "VAR9", parameter VAR8 = 0 )
(
input VAR5,
input VAR15,
output VAR1
);
localparam VAR13 = 31;
wire VAR19;
wire VAR17;
wire VAR11;
reg [VAR13-1:0] VAR14 ;
wire VAR10;
wire VAR4;
assign VAR4 = VAR8 ? ~VAR15: VAR15;
assign VAR19 = VAR5;
assign VAR10 = VAR4;
always @(posedge VAR19 or posedge VAR10)
assign VAR11 = VAR14[VAR13-1];
VAR6 VAR16
(
.VAR18 (VAR1),
.VAR3 (VAR19),
.VAR2 (VAR11)
);
endmodule
|
lgpl-3.0
|
drom/quark
|
v/mux16.v
| 1,027 |
module MODULE1 #( parameter VAR8 = 1 ) (
sel,
VAR9,
VAR4,
VAR2,
VAR11,
VAR10,
VAR1,
VAR13,
VAR5,
VAR18,
VAR14,
VAR6,
VAR12,
VAR16,
VAR7,
VAR3,
VAR15,
VAR17
);
input [3:0] sel;
input [VAR8-1:0]
VAR9,
VAR4,
VAR2,
VAR11,
VAR10,
VAR1,
VAR13,
VAR5,
VAR18,
VAR14,
VAR6,
VAR12,
VAR16,
VAR7,
VAR3,
VAR15;
output [VAR8-1:0] VAR17;
reg [VAR8-1:0] VAR17;
always @ (
sel,
VAR9,
VAR4,
VAR2,
VAR11,
VAR10,
VAR1,
VAR13,
VAR5,
VAR18,
VAR14,
VAR6,
VAR12,
VAR16,
VAR7,
VAR3,
VAR15
) begin
case (sel)
0: VAR17 = VAR15;
1: VAR17 = VAR3;
2: VAR17 = VAR7;
3: VAR17 = VAR16;
4: VAR17 = VAR12;
5: VAR17 = VAR6;
6: VAR17 = VAR14;
7: VAR17 = VAR18;
8: VAR17 = VAR5;
9: VAR17 = VAR13;
10: VAR17 = VAR1;
11: VAR17 = VAR10;
12: VAR17 = VAR11;
13: VAR17 = VAR2;
14: VAR17 = VAR4;
default VAR17 = VAR9;
endcase
end
endmodule
|
mit
|
google/skywater-pdk-libs-sky130_fd_sc_ms
|
cells/o211ai/sky130_fd_sc_ms__o211ai_2.v
| 2,361 |
module MODULE2 (
VAR1 ,
VAR3 ,
VAR7 ,
VAR5 ,
VAR11 ,
VAR2,
VAR9,
VAR6 ,
VAR10
);
output VAR1 ;
input VAR3 ;
input VAR7 ;
input VAR5 ;
input VAR11 ;
input VAR2;
input VAR9;
input VAR6 ;
input VAR10 ;
VAR4 VAR8 (
.VAR1(VAR1),
.VAR3(VAR3),
.VAR7(VAR7),
.VAR5(VAR5),
.VAR11(VAR11),
.VAR2(VAR2),
.VAR9(VAR9),
.VAR6(VAR6),
.VAR10(VAR10)
);
endmodule
module MODULE2 (
VAR1 ,
VAR3,
VAR7,
VAR5,
VAR11
);
output VAR1 ;
input VAR3;
input VAR7;
input VAR5;
input VAR11;
supply1 VAR2;
supply0 VAR9;
supply1 VAR6 ;
supply0 VAR10 ;
VAR4 VAR8 (
.VAR1(VAR1),
.VAR3(VAR3),
.VAR7(VAR7),
.VAR5(VAR5),
.VAR11(VAR11)
);
endmodule
|
apache-2.0
|
Obijuan/open-fpga-verilog-tutorial
|
tutorial/ICESTICK/T26-rom/rom32x4.v
| 1,232 |
module MODULE1 (input clk,
input wire [4:0] addr,
output reg [3:0] VAR2);
reg [3:0] VAR1 [0:31];
always @(negedge clk) begin
VAR2 <= VAR1[addr];
end
|
gpl-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_hd
|
cells/tapvgnd2/sky130_fd_sc_hd__tapvgnd2.pp.symbol.v
| 1,265 |
module MODULE1 (
input VAR3 ,
input VAR1,
input VAR4,
input VAR2
);
endmodule
|
apache-2.0
|
sgq995/rc4-de0-nano-soc
|
fpga/hps/soc_system/synthesis/submodules/soc_system_leds.v
| 2,145 |
module MODULE1 (
address,
VAR9,
clk,
VAR4,
VAR1,
VAR8,
VAR2,
VAR3
)
;
output [ 7: 0] VAR2;
output [ 31: 0] VAR3;
input [ 1: 0] address;
input VAR9;
input clk;
input VAR4;
input VAR1;
input [ 31: 0] VAR8;
wire VAR5;
reg [ 7: 0] VAR6;
wire [ 7: 0] VAR2;
wire [ 7: 0] VAR7;
wire [ 31: 0] VAR3;
assign VAR5 = 1;
assign VAR7 = {8 {(address == 0)}} & VAR6;
always @(posedge clk or negedge VAR4)
begin
if (VAR4 == 0)
VAR6 <= 0;
end
else if (VAR9 && ~VAR1 && (address == 0))
VAR6 <= VAR8[7 : 0];
end
assign VAR3 = {32'b0 | VAR7};
assign VAR2 = VAR6;
endmodule
|
mit
|
google/skywater-pdk-libs-sky130_fd_sc_hdll
|
cells/nor3/sky130_fd_sc_hdll__nor3.behavioral.v
| 1,413 |
module MODULE1 (
VAR9,
VAR4,
VAR6,
VAR10
);
output VAR9;
input VAR4;
input VAR6;
input VAR10;
supply1 VAR5;
supply0 VAR1;
supply1 VAR8 ;
supply0 VAR11 ;
wire VAR2;
nor VAR7 (VAR2, VAR10, VAR4, VAR6 );
buf VAR3 (VAR9 , VAR2 );
endmodule
|
apache-2.0
|
shangdawei/proxmark3-lcd
|
fpga/lo_read.v
| 3,759 |
module MODULE1(
VAR1, VAR18, VAR12,
VAR19, VAR5, VAR21, VAR9, VAR13, VAR17,
VAR20, VAR8,
VAR15, VAR4, VAR10, VAR14,
VAR6, VAR22,
VAR2,
VAR11, VAR7
);
input VAR1, VAR18, VAR12;
output VAR19, VAR5, VAR21, VAR9, VAR13, VAR17;
input [7:0] VAR20;
output VAR8;
input VAR10;
output VAR15, VAR4, VAR14;
input VAR6, VAR22;
output VAR2;
input VAR11; input [7:0] VAR7;
reg [7:0] VAR16;
reg [7:0] VAR3;
reg VAR23;
always @(posedge VAR1)
begin
if(VAR3 == VAR7[7:0])
begin
VAR3 <= 8'd0;
VAR23 = !VAR23;
end
else
begin
VAR3 <= VAR3 + 1;
end
end
always @(posedge VAR1)
begin
if((VAR3 == 8'd7) && !VAR23)
VAR16 <= VAR20;
end
else
begin
VAR16[7:1] <= VAR16[6:0];
VAR16[0] <= 1'b0;
end
end
assign VAR4 = VAR16[7] && !VAR23;
assign VAR14 = VAR1;
assign VAR15 = (VAR3[7:3] == 5'd1) && !VAR23;
assign VAR5 = 1'b0;
assign VAR21 = 1'b0;
assign VAR9 = 1'b0;
assign VAR13 = 1'b0;
assign VAR17 = 1'b0;
assign VAR19 = VAR23;
assign VAR8 = ~VAR23;
assign VAR2 = VAR8;
endmodule
|
gpl-2.0
|
vineeshvs/research
|
full_adder.v
| 1,352 |
module MODULE1 (VAR15, b0, VAR24, VAR17, b1, VAR11, VAR29, VAR25, VAR21);
input VAR15;
input b0;
input VAR24;
input VAR17;
input b1;
output VAR11;
output VAR29;
output VAR25;
output VAR1;
output VAR21;
wire VAR5;
wire VAR13;
wire VAR7;
wire VAR1;
wire VAR26;
assign VAR2 = VAR5 | VAR13;
assign VAR29 = VAR7;
VAR3 VAR16 (
.VAR12(VAR15),
.VAR10(b0),
.VAR8(VAR9),
.VAR6(VAR5)
);
VAR3 VAR30 (
.VAR12(VAR9),
.VAR10(VAR24),
.VAR8(VAR7),
.VAR6(VAR13)
);
VAR18 VAR18 (
.VAR28(VAR7),
.VAR20(VAR9),
.VAR22(VAR17),
.VAR4(b1),
.VAR14(VAR25),
.VAR23(VAR1),
.VAR27(VAR26)
);
VAR19 VAR19 (
.VAR28(VAR1),
.VAR20(VAR26),
.VAR22(b1),
.VAR14(VAR21)
);
endmodule
|
gpl-3.0
|
google/skywater-pdk-libs-sky130_fd_sc_hs
|
cells/dlygate4sd3/sky130_fd_sc_hs__dlygate4sd3.behavioral.v
| 1,724 |
module MODULE1 (
VAR1 ,
VAR8 ,
VAR5,
VAR9
);
output VAR1 ;
input VAR8 ;
input VAR5;
input VAR9;
wire VAR10 ;
wire VAR4;
buf VAR7 (VAR10 , VAR8 );
VAR2 VAR3 (VAR4, VAR10, VAR5, VAR9);
buf VAR6 (VAR1 , VAR4 );
endmodule
|
apache-2.0
|
aj-michael/Digital-Systems
|
Pong/Phase4/hsyncModule.v
| 1,809 |
module MODULE1(VAR3, VAR15, VAR16, VAR1, VAR12, VAR8, VAR10, VAR11, reset, VAR7);
parameter VAR6=10;
input [VAR6-1:0] VAR15, VAR12, VAR1, VAR16;
input VAR3, reset, VAR7;
output VAR8, VAR10;
output reg [VAR6-1:0] VAR11;
wire [VAR6-1:0] VAR4;
VAR9 VAR5(VAR3, VAR14, reset, VAR7);
assign VAR10=VAR4==VAR13; wire [VAR6-1:0] VAR13=VAR15+VAR12+VAR1+VAR16;
assign VAR8 = ~(VAR4>=(VAR1+VAR12)&&VAR4<=(VAR1+VAR12+VAR15));
always@(VAR4, VAR15, VAR16, VAR1, VAR12)
VAR11<=VAR4;
VAR2 VAR17(10'd0,10'd0, VAR13, VAR4, VAR10,VAR10||VAR14, , reset, VAR7) ;
endmodule
|
mit
|
google/skywater-pdk-libs-sky130_fd_sc_hs
|
cells/clkdlyinv3sd1/sky130_fd_sc_hs__clkdlyinv3sd1.blackbox.v
| 1,287 |
module MODULE1 (
VAR2,
VAR3
);
output VAR2;
input VAR3;
supply1 VAR4;
supply0 VAR1;
endmodule
|
apache-2.0
|
andrewandrepowell/axiplasma
|
hdl/projects/Nexys4/bd/mig_wrap/ip/mig_wrap_mig_7series_0_0/mig_wrap_mig_7series_0_0/user_design/rtl/axi/mig_7series_v4_0_axi_mc_cmd_translator.v
| 9,737 |
module MODULE1 #
(
parameter integer VAR23 = 32,
parameter integer VAR11 = 30,
parameter integer VAR9 = 32,
parameter integer VAR16 = 1,
parameter integer VAR28 = 2,
parameter integer VAR7 = 2,
parameter integer VAR15 = 0
)
(
input wire clk ,
input wire reset ,
input wire [VAR23-1:0] VAR27 ,
input wire [7:0] VAR10 ,
input wire [2:0] VAR25 ,
input wire [1:0] VAR35 ,
input wire VAR24 ,
input wire VAR8 ,
output wire [VAR11-1:0] VAR3 ,
output wire VAR20 ,
output wire VAR21 ,
input wire VAR33 ,
output wire VAR18
);
localparam VAR22 = {VAR11{1'b1}} ^
{VAR16+(VAR28/2){1'b1}};
wire [VAR23-1:0] VAR36;
wire [VAR23-1:0] VAR17;
wire VAR29;
wire [VAR23-1:0] VAR6;
wire VAR26;
wire VAR13;
wire VAR37;
wire VAR14;
wire VAR2;
wire VAR19;
wire VAR1;
wire VAR4;
wire VAR12;
wire VAR5;
assign VAR19 = VAR24 & VAR8;
assign VAR3 = (VAR28 == 4) ?
(VAR36 >> VAR7-3) & VAR22 :
(VAR36 >> VAR7-2) & VAR22;
assign VAR36 = (VAR35[1]) ? VAR6 : VAR17;
assign VAR20 = (VAR35[1]) ? VAR14 : VAR13;
assign VAR21 = (VAR35[1]) ? VAR2 : VAR37;
assign VAR18 = (VAR35[1]) ? VAR26 : VAR29;
assign VAR1 = (VAR35[1]) ? 1'b0 : VAR19;
assign VAR4 = (VAR35[1]) ? VAR19 : 1'b0;
assign VAR12 = (VAR35[1]) ? 1'b0 : VAR33;
assign VAR5 = (VAR35[1]) ? VAR33 : 1'b0;
VAR34 #
(
.VAR23 (VAR23),
.VAR11 (VAR11),
.VAR9 (VAR9),
.VAR16 (VAR16),
.VAR7 (VAR7),
.VAR15 (VAR15)
)
VAR32
(
.clk ( clk ) ,
.reset ( reset ) ,
.VAR27 ( VAR27 ) ,
.VAR10 ( VAR10 ) ,
.VAR25 ( VAR25 ) ,
.VAR19 ( VAR1 ) ,
.VAR3 ( VAR17 ) ,
.VAR20 ( VAR13 ) ,
.VAR21 ( VAR37 ) ,
.VAR33 ( VAR12 ) ,
.VAR18 ( VAR29 )
);
VAR31 #
(
.VAR23 (VAR23),
.VAR11 (VAR11),
.VAR16 (VAR16),
.VAR9 (VAR9),
.VAR7 (VAR7),
.VAR15 (VAR15)
)
VAR30
(
.clk ( clk ) ,
.reset ( reset ) ,
.VAR27 ( VAR27 ) ,
.VAR10 ( VAR10 ) ,
.VAR25 ( VAR25 ) ,
.VAR19 ( VAR4 ) ,
.VAR20 ( VAR14 ) ,
.VAR21 ( VAR2 ) ,
.VAR3 ( VAR6 ) ,
.VAR33 ( VAR5 ) ,
.VAR18 ( VAR26 )
);
endmodule
|
mit
|
mistryalok/Zedboard
|
learning/opencv_hls/xapp1167_vivado/sw/median/prj/solution1/impl/verilog/image_filter.v
| 45,290 |
module MODULE1 (
VAR217,
VAR137,
VAR209,
VAR23,
VAR17,
VAR218,
VAR109,
VAR12,
VAR76,
VAR24,
VAR156,
VAR48,
VAR250,
VAR47,
VAR237,
VAR16,
VAR284,
VAR111,
VAR128,
VAR155,
VAR330,
VAR221,
VAR317,
VAR208,
VAR172,
VAR95
);
parameter VAR96 = 32'b00000000000000000000000000000000;
parameter VAR129 = 4'b0000;
parameter VAR283 = 1'b0;
parameter VAR123 = 1'b1;
parameter VAR50 = 1'b0;
parameter VAR25 = 1'b1;
parameter VAR333 = 8'b00000000;
parameter VAR216 = 8'b1;
input [31:0] VAR217;
input [3:0] VAR137;
input [3:0] VAR209;
input [0:0] VAR23;
input [0:0] VAR17;
input [0:0] VAR218;
input [0:0] VAR109;
output [31:0] VAR12;
output [3:0] VAR76;
output [3:0] VAR24;
output [0:0] VAR156;
output [0:0] VAR48;
output [0:0] VAR250;
output [0:0] VAR47;
input [31:0] VAR237;
input [31:0] VAR16;
input VAR284;
input VAR111;
input VAR128;
input VAR155;
output VAR330;
output VAR221;
input VAR317;
output VAR208;
output VAR172;
output VAR95;
reg VAR172;
reg VAR158;
wire VAR150;
wire VAR37;
reg VAR183;
wire VAR212;
wire VAR21;
wire [31:0] VAR281;
wire [31:0] VAR251;
wire [11:0] VAR66;
wire [11:0] VAR227;
wire [11:0] VAR256;
wire [11:0] VAR324;
reg VAR215;
wire VAR69;
reg VAR231 = 1'b0;
reg VAR43;
reg VAR81;
wire VAR326;
reg VAR306 = 1'b0;
reg VAR304;
reg VAR240;
wire VAR102;
reg VAR124 = 1'b0;
reg VAR271;
reg VAR1;
wire VAR336;
reg VAR131 = 1'b0;
reg VAR312;
wire VAR258;
wire VAR83;
wire VAR61;
wire VAR323;
wire VAR125;
wire [31:0] VAR167;
wire VAR84;
wire VAR2;
wire [3:0] VAR4;
wire [3:0] VAR197;
wire [0:0] VAR211;
wire [0:0] VAR54;
wire [0:0] VAR87;
wire [0:0] VAR162;
wire [11:0] VAR337;
wire [11:0] VAR143;
wire [7:0] VAR13;
wire VAR297;
wire VAR198;
wire [7:0] VAR52;
wire VAR78;
wire VAR222;
wire [7:0] VAR338;
wire VAR214;
wire VAR39;
wire VAR138;
wire VAR34;
wire VAR170;
wire VAR29;
wire VAR36;
wire [31:0] VAR236;
wire [31:0] VAR204;
wire [7:0] VAR127;
wire VAR247;
wire VAR120;
wire [7:0] VAR126;
wire VAR68;
wire VAR27;
wire [7:0] VAR186;
wire VAR22;
wire VAR299;
wire [7:0] VAR201;
wire VAR196;
wire VAR203;
wire [7:0] VAR254;
wire VAR239;
wire VAR331;
wire [7:0] VAR320;
wire VAR141;
wire VAR32;
wire [1:0] VAR276;
wire VAR309;
wire VAR244;
wire [7:0] VAR108;
wire [7:0] VAR161;
wire [1:0] VAR80;
wire VAR205;
wire VAR182;
wire [7:0] VAR55;
wire [7:0] VAR117;
wire [1:0] VAR6;
wire VAR267;
wire VAR92;
wire [7:0] VAR133;
wire [7:0] VAR88;
wire [1:0] VAR263;
wire VAR178;
wire VAR142;
wire [7:0] VAR113;
wire [7:0] VAR77;
wire [1:0] VAR49;
wire VAR86;
wire VAR149;
wire [7:0] VAR97;
wire [7:0] VAR93;
wire [1:0] VAR132;
wire VAR33;
wire VAR225;
wire [7:0] VAR261;
wire [7:0] VAR153;
wire VAR280;
wire VAR99;
wire VAR194;
wire VAR289;
wire VAR75;
wire [11:0] VAR253;
wire [11:0] VAR192;
wire [7:0] VAR339;
wire VAR303;
wire VAR272;
wire [7:0] VAR103;
wire VAR14;
wire VAR314;
wire [7:0] VAR188;
wire VAR246;
wire VAR226;
wire [31:0] VAR282;
wire VAR82;
wire VAR190;
wire [3:0] VAR73;
wire [3:0] VAR322;
wire [0:0] VAR118;
wire [0:0] VAR26;
wire [0:0] VAR206;
wire [0:0] VAR340;
wire VAR179;
wire VAR292;
wire [11:0] VAR101;
wire VAR219;
wire [11:0] VAR130;
wire VAR148;
wire VAR119;
wire VAR35;
wire [11:0] VAR341;
wire VAR310;
wire [11:0] VAR293;
wire VAR140;
wire VAR9;
wire VAR275;
wire [11:0] VAR335;
wire VAR90;
wire [11:0] VAR305;
wire VAR136;
wire VAR94;
wire VAR7;
wire [11:0] VAR177;
wire VAR185;
wire [11:0] VAR264;
wire VAR3;
wire VAR168;
wire VAR74;
wire [7:0] VAR274;
wire VAR28;
wire VAR89;
wire [7:0] VAR319;
wire VAR110;
wire VAR46;
wire VAR252;
wire [7:0] VAR152;
wire VAR10;
wire VAR207;
wire [7:0] VAR19;
wire VAR146;
wire VAR165;
wire VAR315;
wire [7:0] VAR151;
wire VAR11;
wire VAR255;
wire [7:0] VAR171;
wire VAR301;
wire VAR147;
wire VAR8;
wire [7:0] VAR166;
wire VAR60;
wire VAR200;
wire [7:0] VAR265;
wire VAR329;
wire VAR248;
wire VAR159;
wire [7:0] VAR213;
wire VAR269;
wire VAR277;
wire [7:0] VAR85;
wire VAR100;
wire VAR229;
wire VAR169;
wire [7:0] VAR20;
wire VAR184;
wire VAR91;
wire [7:0] VAR302;
wire VAR154;
wire VAR259;
reg VAR243 = 1'b0;
reg VAR238;
reg VAR296 = 1'b0;
reg VAR295 = 1'b0;
reg VAR288 = 1'b0;
reg VAR45;
wire VAR327;
VAR210 VAR67(
.VAR284( VAR284 ),
.VAR287( VAR158 ),
.VAR128( VAR150 ),
.VAR208( VAR37 ),
.VAR245( VAR183 ),
.VAR172( VAR212 ),
.VAR95( VAR21 ),
.VAR237( VAR281 ),
.VAR16( VAR251 ),
.VAR268( VAR66 ),
.VAR134( VAR227 ),
.VAR44( VAR256 ),
.VAR193( VAR324 )
);
VAR307 VAR308(
.VAR284( VAR284 ),
.VAR287( VAR158 ),
.VAR128( VAR258 ),
.VAR208( VAR83 ),
.VAR245( VAR61 ),
.VAR172( VAR323 ),
.VAR95( VAR125 ),
.VAR217( VAR167 ),
.VAR155( VAR84 ),
.VAR330( VAR2 ),
.VAR137( VAR4 ),
.VAR209( VAR197 ),
.VAR23( VAR211 ),
.VAR17( VAR54 ),
.VAR218( VAR87 ),
.VAR109( VAR162 ),
.VAR160( VAR337 ),
.VAR291( VAR143 ),
.VAR189( VAR13 ),
.VAR270( VAR297 ),
.VAR262( VAR198 ),
.VAR191( VAR52 ),
.VAR112( VAR78 ),
.VAR249( VAR222 ),
.VAR5( VAR338 ),
.VAR70( VAR214 ),
.VAR241( VAR39 )
);
VAR242 VAR234(
.VAR284( VAR284 ),
.VAR287( VAR158 ),
.VAR128( VAR138 ),
.VAR208( VAR34 ),
.VAR245( VAR170 ),
.VAR172( VAR29 ),
.VAR95( VAR36 ),
.VAR237( VAR236 ),
.VAR16( VAR204 ),
.VAR166( VAR127 ),
.VAR60( VAR247 ),
.VAR200( VAR120 ),
.VAR213( VAR126 ),
.VAR269( VAR68 ),
.VAR277( VAR27 ),
.VAR20( VAR186 ),
.VAR184( VAR22 ),
.VAR91( VAR299 ),
.VAR319( VAR201 ),
.VAR110( VAR196 ),
.VAR46( VAR203 ),
.VAR19( VAR254 ),
.VAR146( VAR239 ),
.VAR165( VAR331 ),
.VAR171( VAR320 ),
.VAR301( VAR141 ),
.VAR147( VAR32 ),
.VAR300( VAR276 ),
.VAR285( VAR309 ),
.VAR328( VAR244 ),
.VAR235( VAR108 ),
.VAR316( VAR161 ),
.VAR106( VAR80 ),
.VAR181( VAR205 ),
.VAR290( VAR182 ),
.VAR220( VAR55 ),
.VAR145( VAR117 ),
.VAR144( VAR6 ),
.VAR98( VAR267 ),
.VAR157( VAR92 ),
.VAR71( VAR133 ),
.VAR18( VAR88 ),
.VAR175( VAR263 ),
.VAR224( VAR178 ),
.VAR56( VAR142 ),
.VAR62( VAR113 ),
.VAR122( VAR77 ),
.VAR199( VAR49 ),
.VAR311( VAR86 ),
.VAR332( VAR149 ),
.VAR53( VAR97 ),
.VAR273( VAR93 ),
.VAR57( VAR132 ),
.VAR121( VAR33 ),
.VAR135( VAR225 ),
.VAR232( VAR261 ),
.VAR115( VAR153 )
);
VAR64 VAR116(
.VAR284( VAR284 ),
.VAR287( VAR158 ),
.VAR128( VAR280 ),
.VAR208( VAR99 ),
.VAR245( VAR194 ),
.VAR172( VAR289 ),
.VAR95( VAR75 ),
.VAR160( VAR253 ),
.VAR291( VAR192 ),
.VAR286( VAR339 ),
.VAR38( VAR303 ),
.VAR313( VAR272 ),
.VAR30( VAR103 ),
.VAR278( VAR14 ),
.VAR187( VAR314 ),
.VAR266( VAR188 ),
.VAR233( VAR246 ),
.VAR59( VAR226 ),
.VAR12( VAR282 ),
.VAR221( VAR82 ),
.VAR317( VAR190 ),
.VAR76( VAR73 ),
.VAR24( VAR322 ),
.VAR156( VAR118 ),
.VAR48( VAR26 ),
.VAR250( VAR206 ),
.VAR47( VAR340 )
);
VAR104 VAR139(
.clk( VAR284 ),
.reset( VAR158 ),
.VAR51( VAR292 ),
.VAR72( VAR292 ),
.VAR180( VAR101 ),
.VAR42( VAR326 ),
.VAR58( VAR219 ),
.VAR41( VAR130 ),
.VAR63( VAR148 ),
.VAR294( VAR119 )
);
VAR174 VAR79(
.clk( VAR284 ),
.reset( VAR158 ),
.VAR51( VAR35 ),
.VAR72( VAR35 ),
.VAR180( VAR341 ),
.VAR42( VAR336 ),
.VAR58( VAR310 ),
.VAR41( VAR293 ),
.VAR63( VAR140 ),
.VAR294( VAR9 )
);
VAR107 VAR260(
.clk( VAR284 ),
.reset( VAR158 ),
.VAR51( VAR275 ),
.VAR72( VAR275 ),
.VAR180( VAR335 ),
.VAR42( VAR69 ),
.VAR58( VAR90 ),
.VAR41( VAR305 ),
.VAR63( VAR136 ),
.VAR294( VAR94 )
);
VAR318 VAR31(
.clk( VAR284 ),
.reset( VAR158 ),
.VAR51( VAR7 ),
.VAR72( VAR7 ),
.VAR180( VAR177 ),
.VAR42( VAR102 ),
.VAR58( VAR185 ),
.VAR41( VAR264 ),
.VAR63( VAR3 ),
.VAR294( VAR168 )
);
VAR163 VAR257(
.clk( VAR284 ),
.reset( VAR158 ),
.VAR51( VAR74 ),
.VAR72( VAR74 ),
.VAR180( VAR274 ),
.VAR42( VAR28 ),
.VAR58( VAR89 ),
.VAR41( VAR319 ),
.VAR63( VAR110 ),
.VAR294( VAR46 )
);
VAR223 VAR176(
.clk( VAR284 ),
.reset( VAR158 ),
.VAR51( VAR252 ),
.VAR72( VAR252 ),
.VAR180( VAR152 ),
.VAR42( VAR10 ),
.VAR58( VAR207 ),
.VAR41( VAR19 ),
.VAR63( VAR146 ),
.VAR294( VAR165 )
);
VAR195 VAR173(
.clk( VAR284 ),
.reset( VAR158 ),
.VAR51( VAR315 ),
.VAR72( VAR315 ),
.VAR180( VAR151 ),
.VAR42( VAR11 ),
.VAR58( VAR255 ),
.VAR41( VAR171 ),
.VAR63( VAR301 ),
.VAR294( VAR147 )
);
VAR279 VAR105(
.clk( VAR284 ),
.reset( VAR158 ),
.VAR51( VAR8 ),
.VAR72( VAR8 ),
.VAR180( VAR166 ),
.VAR42( VAR60 ),
.VAR58( VAR200 ),
.VAR41( VAR265 ),
.VAR63( VAR329 ),
.VAR294( VAR248 )
);
VAR114 VAR202(
.clk( VAR284 ),
.reset( VAR158 ),
.VAR51( VAR159 ),
.VAR72( VAR159 ),
.VAR180( VAR213 ),
.VAR42( VAR269 ),
.VAR58( VAR277 ),
.VAR41( VAR85 ),
.VAR63( VAR100 ),
.VAR294( VAR229 )
);
VAR40 VAR164(
.clk( VAR284 ),
.reset( VAR158 ),
.VAR51( VAR169 ),
.VAR72( VAR169 ),
.VAR180( VAR20 ),
.VAR42( VAR184 ),
.VAR58( VAR91 ),
.VAR41( VAR302 ),
.VAR63( VAR154 ),
.VAR294( VAR259 )
);
always @ (posedge VAR284)
begin : VAR298
if (VAR158 == 1'b1) begin
VAR296 <= VAR50;
end else begin
if ((VAR25 == VAR238)) begin
VAR296 <= VAR50;
end else if ((VAR25 == VAR83)) begin
VAR296 <= VAR25;
end
end
end
always @ (posedge VAR284)
begin : VAR334
if (VAR158 == 1'b1) begin
VAR243 <= VAR50;
end else begin
if ((VAR25 == VAR238)) begin
VAR243 <= VAR50;
end else if ((VAR37 == VAR25)) begin
VAR243 <= VAR25;
end
end
end
always @ (posedge VAR284)
begin : VAR228
if (VAR158 == 1'b1) begin
VAR295 <= VAR50;
end else begin
if ((VAR25 == VAR238)) begin
VAR295 <= VAR50;
end else if ((VAR25 == VAR34)) begin
VAR295 <= VAR25;
end
end
end
always @ (posedge VAR284)
begin : VAR65
if (VAR158 == 1'b1) begin
VAR288 <= VAR50;
end else begin
if ((VAR25 == VAR238)) begin
VAR288 <= VAR50;
end else if ((VAR25 == VAR99)) begin
VAR288 <= VAR25;
end
end
end
always @ (posedge VAR284)
begin : VAR325
if (VAR158 == 1'b1) begin
VAR131 <= VAR50;
end else begin
if (((VAR37 == VAR25) & (VAR183 == VAR25))) begin
VAR131 <= VAR50;
end else if (((VAR37 == VAR25) & (VAR25 == VAR336))) begin
VAR131 <= VAR25;
end
end
end
always @ (posedge VAR284)
begin : VAR230
if (VAR158 == 1'b1) begin
VAR306 <= VAR50;
end else begin
if (((VAR37 == VAR25) & (VAR183 == VAR25))) begin
VAR306 <= VAR50;
end else if (((VAR37 == VAR25) & (VAR25 == VAR326))) begin
VAR306 <= VAR25;
end
end
end
always @ (posedge VAR284)
begin : VAR321
if (VAR158 == 1'b1) begin
VAR124 <= VAR50;
end else begin
if (((VAR37 == VAR25) & (VAR183 == VAR25))) begin
VAR124 <= VAR50;
end else if (((VAR37 == VAR25) & (VAR25 == VAR102))) begin
VAR124 <= VAR25;
end
end
end
always @ (posedge VAR284)
begin : VAR15
if (VAR158 == 1'b1) begin
VAR231 <= VAR50;
end else begin
if (((VAR37 == VAR25) & (VAR183 == VAR25))) begin
VAR231 <= VAR50;
end else if (((VAR37 == VAR25) & (VAR69 == VAR25))) begin
VAR231 <= VAR25;
end
end
end
always @(posedge VAR284)
begin
VAR45 <= VAR50;
end
always @ (VAR37 or VAR131)
begin
if ((VAR25 == VAR131)) begin
VAR1 = VAR50;
end else begin
VAR1 = VAR37;
end
end
always @ (VAR37 or VAR306)
begin
if ((VAR25 == VAR306)) begin
VAR81 = VAR50;
end else begin
VAR81 = VAR37;
end
end
always @ (VAR37 or VAR124)
begin
if ((VAR25 == VAR124)) begin
VAR240 = VAR50;
end else begin
VAR240 = VAR37;
end
end
always @ (VAR37 or VAR231)
begin
if ((VAR231 == VAR25)) begin
VAR215 = VAR50;
end else begin
VAR215 = VAR37;
end
end
always @ (VAR212 or VAR323 or VAR29 or VAR289 or VAR148 or VAR140 or VAR136 or VAR3)
begin
if (((VAR212 == VAR25) & (VAR25 == VAR323) & (VAR25 == VAR29) & (VAR25 == VAR289) & (VAR50 == VAR148) & (VAR50 == VAR140) & (VAR50 == VAR136) & (VAR50 == VAR3))) begin
VAR172 = VAR25;
end else begin
VAR172 = VAR50;
end
end
always @ (VAR99)
begin
if ((VAR25 == VAR99)) begin
VAR238 = VAR25;
end else begin
VAR238 = VAR50;
end
end
always @ (VAR336 or VAR131)
begin
if ((VAR50 == VAR131)) begin
VAR312 = VAR336;
end else begin
VAR312 = VAR25;
end
end
always @ (VAR326 or VAR306)
begin
if ((VAR50 == VAR306)) begin
VAR304 = VAR326;
end else begin
VAR304 = VAR25;
end
end
always @ (VAR102 or VAR124)
begin
if ((VAR50 == VAR124)) begin
VAR271 = VAR102;
end else begin
VAR271 = VAR25;
end
end
always @ (VAR69 or VAR231)
begin
if ((VAR231 == VAR50)) begin
VAR43 = VAR69;
end else begin
VAR43 = VAR25;
end
end
always @ (VAR43 or VAR304 or VAR271 or VAR312)
begin
if (((VAR43 == VAR25) & (VAR25 == VAR304) & (VAR25 == VAR271) & (VAR25 == VAR312))) begin
VAR183 = VAR25;
end else begin
VAR183 = VAR50;
end
end
assign VAR330 = VAR2;
assign VAR12 = VAR282;
assign VAR47 = VAR340;
assign VAR250 = VAR206;
assign VAR76 = VAR73;
assign VAR48 = VAR26;
assign VAR24 = VAR322;
assign VAR156 = VAR118;
assign VAR221 = VAR82;
assign VAR208 = VAR238;
assign VAR95 = VAR327;
always @ (VAR111)
begin
VAR158 = ~VAR111;
end
assign VAR179 = VAR25;
assign VAR327 = VAR125;
assign VAR167 = VAR217;
assign VAR162 = VAR109;
assign VAR87 = VAR218;
assign VAR4 = VAR137;
assign VAR54 = VAR17;
assign VAR197 = VAR209;
assign VAR211 = VAR23;
assign VAR84 = VAR155;
assign VAR61 = VAR25;
assign VAR258 = (VAR128 & VAR148 & VAR140);
assign VAR143 = VAR293;
assign VAR297 = VAR28;
assign VAR78 = VAR10;
assign VAR214 = VAR11;
assign VAR337 = VAR130;
assign VAR150 = VAR128;
assign VAR251 = VAR16;
assign VAR281 = VAR237;
assign VAR170 = VAR25;
assign VAR138 = VAR128;
assign VAR161 = VAR333;
assign VAR117 = VAR333;
assign VAR88 = VAR333;
assign VAR77 = VAR333;
assign VAR93 = VAR333;
assign VAR153 = VAR333;
assign VAR204 = VAR16;
assign VAR201 = VAR319;
assign VAR196 = VAR110;
assign VAR254 = VAR19;
assign VAR239 = VAR146;
assign VAR320 = VAR171;
assign VAR141 = VAR301;
assign VAR247 = VAR60;
assign VAR68 = VAR269;
assign VAR22 = VAR184;
assign VAR236 = VAR237;
assign VAR190 = VAR317;
assign VAR194 = VAR179;
assign VAR280 = (VAR136 & VAR3);
assign VAR192 = VAR264;
assign VAR339 = VAR265;
assign VAR303 = VAR329;
assign VAR103 = VAR85;
assign VAR14 = VAR100;
assign VAR188 = VAR302;
assign VAR246 = VAR154;
assign VAR253 = VAR305;
assign VAR35 = VAR25;
assign VAR341 = VAR227;
assign VAR9 = VAR125;
assign VAR310 = VAR1;
assign VAR74 = VAR25;
assign VAR274 = VAR13;
assign VAR46 = VAR203;
assign VAR89 = VAR198;
assign VAR252 = VAR25;
assign VAR152 = VAR52;
assign VAR165 = VAR331;
assign VAR207 = VAR222;
assign VAR315 = VAR25;
assign VAR151 = VAR338;
assign VAR147 = VAR32;
assign VAR255 = VAR39;
assign VAR292 = VAR25;
assign VAR101 = VAR66;
assign VAR119 = VAR125;
assign VAR219 = VAR81;
assign VAR7 = VAR25;
assign VAR177 = VAR324;
assign VAR168 = VAR75;
assign VAR185 = VAR240;
assign VAR8 = VAR25;
assign VAR166 = VAR127;
assign VAR248 = VAR272;
assign VAR200 = VAR120;
assign VAR159 = VAR25;
assign VAR213 = VAR126;
assign VAR229 = VAR314;
assign VAR277 = VAR27;
assign VAR169 = VAR25;
assign VAR20 = VAR186;
assign VAR259 = VAR226;
assign VAR91 = VAR299;
assign VAR275 = VAR25;
assign VAR335 = VAR256;
assign VAR94 = VAR75;
assign VAR90 = VAR215;
endmodule
|
gpl-3.0
|
google/skywater-pdk-libs-sky130_fd_sc_ms
|
cells/bufbuf/sky130_fd_sc_ms__bufbuf_16.v
| 2,036 |
module MODULE1 (
VAR6 ,
VAR7 ,
VAR3,
VAR5,
VAR2 ,
VAR1
);
output VAR6 ;
input VAR7 ;
input VAR3;
input VAR5;
input VAR2 ;
input VAR1 ;
VAR4 VAR8 (
.VAR6(VAR6),
.VAR7(VAR7),
.VAR3(VAR3),
.VAR5(VAR5),
.VAR2(VAR2),
.VAR1(VAR1)
);
endmodule
module MODULE1 (
VAR6,
VAR7
);
output VAR6;
input VAR7;
supply1 VAR3;
supply0 VAR5;
supply1 VAR2 ;
supply0 VAR1 ;
VAR4 VAR8 (
.VAR6(VAR6),
.VAR7(VAR7)
);
endmodule
|
apache-2.0
|
kyzhai/NUNY
|
src/hardware/city_bb.v
| 4,974 |
module MODULE1 (
address,
VAR2,
VAR1);
input [14:0] address;
input VAR2;
output [15:0] VAR1;
tri1 VAR2;
endmodule
|
gpl-2.0
|
google/skywater-pdk-libs-sky130_fd_sc_ls
|
cells/conb/sky130_fd_sc_ls__conb.behavioral.v
| 1,279 |
module MODULE1 (
VAR4,
VAR1
);
output VAR4;
output VAR1;
supply1 VAR7;
supply0 VAR2;
supply1 VAR8 ;
supply0 VAR6 ;
pullup VAR3 (VAR4 );
pulldown VAR5 (VAR1 );
endmodule
|
apache-2.0
|
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